diff --git a/Cargo.lock b/Cargo.lock index fdfb9de0..cbb1dbe7 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -13,21 +13,6 @@ dependencies = [ "num-traits", ] -[[package]] -name = "addr2line" -version = "0.24.2" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "dfbe277e56a376000877090da837660b4427aad530e3028d44e0bffe4f89a1c1" -dependencies = [ - "gimli", -] - -[[package]] -name = "adler2" -version = "2.0.0" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "512761e0bb2578dd7380c6baaa0f4ce03e84f95e960231d1dec8bf4d7d6e2627" - [[package]] name = "aho-corasick" version = "1.1.3" @@ -91,18 +76,6 @@ name = "anyhow" version = "1.0.94" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "c1fd03a028ef38ba2276dce7e33fcd6369c158a1bca17946c4b1b701891c1ff7" -dependencies = [ - "backtrace", -] - -[[package]] -name = "approx" -version = "0.5.1" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "cab112f0a86d568ea0e627cc1d6be74a1e9cd55214684db5561995f6dad897c6" -dependencies = [ - "num-traits", -] [[package]] name = "autocfg" @@ -110,21 +83,6 @@ version = "1.4.0" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "ace50bade8e6234aa140d9a2f552bbee1db4d353f69b8217bc503490fc1a9f26" -[[package]] -name = "backtrace" -version = "0.3.74" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "8d82cb332cdfaed17ae235a638438ac4d4839913cc2af585c3c6746e8f8bee1a" -dependencies = [ - "addr2line", - "cfg-if", - "libc", - "miniz_oxide", - "object", - "rustc-demangle", - "windows-targets 0.52.6", -] - [[package]] name = "bitflags" version = "1.3.2" @@ -368,73 +326,6 @@ dependencies = [ "typenum", ] -[[package]] -name = "cust" -version = "0.3.2" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "0d6cc71911e179f12483b9734120b45bd00bf64fab085cc4818428523eedd469" -dependencies = [ - "bitflags 1.3.2", - "bytemuck", - "cust_core", - "cust_derive", - "cust_raw", - "find_cuda_helper", -] - -[[package]] -name = "cust_core" -version = "0.1.1" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "039f79662cb8f890cbf335e818cd522d6e3a53fe63f61d1aaaf859cd3d975f06" -dependencies = [ - "cust_derive", - "glam", - "mint", - "vek", -] - -[[package]] -name = "cust_derive" -version = "0.2.0" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "e8a3bc95fe629aed92b2423de6ccff9e40174b21d19cb6ee6281a4d04ac72f66" -dependencies = [ - "proc-macro2", - "quote", - "syn 1.0.109", -] - -[[package]] -name = "cust_raw" -version = "0.11.3" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "fbf40d6ade12cb9828bbc844b9875c7b93d25e67a3c9bf61c7aa3ae09e402bf8" -dependencies = [ - "find_cuda_helper", -] - -[[package]] -name = "derive_more" -version = "1.0.0" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "4a9b99b9cbbe49445b21764dc0625032a89b145a2642e67603e1c936f5458d05" -dependencies = [ - "derive_more-impl", -] - -[[package]] -name = "derive_more-impl" -version = "1.0.0" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "cb7330aeadfbe296029522e6c40f315320aba36fc43a5b3632f3795348f3bd22" -dependencies = [ - "proc-macro2", - "quote", - "syn 2.0.90", - "unicode-xid", -] - [[package]] name = "diff" version = "0.1.13" @@ -480,12 +371,6 @@ version = "1.13.0" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "60b1af1c220855b6ceac025d3f6ecdd2b7c4894bfe9cd9bda4fbb4bc7c0d4cf0" -[[package]] -name = "elf" -version = "0.7.4" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "4445909572dbd556c457c849c4ca58623d84b27c8fff1e74b0b4227d8b90d17b" - [[package]] name = "env_filter" version = "0.1.2" @@ -560,15 +445,6 @@ dependencies = [ "syn 1.0.109", ] -[[package]] -name = "find_cuda_helper" -version = "0.2.0" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "f9f9e65c593dd01ac77daad909ea4ad17f0d6d1776193fc8ea766356177abdad" -dependencies = [ - "glob", -] - [[package]] name = "foreign-types" version = "0.5.0" @@ -700,21 +576,6 @@ dependencies = [ "wasi", ] -[[package]] -name = "gimli" -version = "0.31.1" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "07e28edb80900c19c28f1072f2e8aeca7fa06b23cd4169cefe1af5aa3260783f" - -[[package]] -name = "glam" -version = "0.20.5" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "f43e957e744be03f5801a55472f593d43fabdebf25a4585db250f04d86b1675f" -dependencies = [ - "num-traits", -] - [[package]] name = "glob" version = "0.3.1" @@ -745,15 +606,6 @@ version = "0.4.1" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "6fe2267d4ed49bc07b63801559be28c718ea06c4738b7a03c94df7386d2cde46" -[[package]] -name = "home" -version = "0.5.9" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "e3d1354bf6b7235cb4a0576c2619fd4ed18183f689b12b006a0ee7329eeff9a5" -dependencies = [ - "windows-sys 0.52.0", -] - [[package]] name = "humantime" version = "2.1.0" @@ -806,12 +658,6 @@ version = "0.2.167" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "09d6582e104315a817dff97f75133544b2e094ee22447d2acf4a74e189ba06fc" -[[package]] -name = "libm" -version = "0.2.11" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "8355be11b20d696c8f18f6cc018c4e372165b1fa8126cef092399c9951984ffa" - [[package]] name = "libredox" version = "0.1.3" @@ -893,21 +739,6 @@ dependencies = [ "paste", ] -[[package]] -name = "miniz_oxide" -version = "0.8.0" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "e2d80299ef12ff69b16a84bb182e3b9df68b5a91574d3d4fa6e41b65deec4df1" -dependencies = [ - "adler2", -] - -[[package]] -name = "mint" -version = "0.5.9" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "e53debba6bda7a793e5f99b8dacf19e626084f525f7829104ba9898f367d85ff" - [[package]] name = "ndarray" version = "0.16.1" @@ -954,17 +785,6 @@ dependencies = [ "num-traits", ] -[[package]] -name = "num-derive" -version = "0.4.2" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "ed3955f1a9c7c0c15e092f9c887db08b1fc683305fdf6eb6684f22555355e202" -dependencies = [ - "proc-macro2", - "quote", - "syn 2.0.90", -] - [[package]] name = "num-integer" version = "0.1.46" @@ -981,7 +801,6 @@ source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "071dfc062690e90b734c0b2273ce72ad0ffa95f0c74596bc250dcfd960262841" dependencies = [ "autocfg", - "libm", ] [[package]] @@ -1002,15 +821,6 @@ dependencies = [ "malloc_buf", ] -[[package]] -name = "object" -version = "0.36.5" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "aedf0a2d09c573ed1d8d85b30c119153926a2b36dce0ab28322c09a117a4683e" -dependencies = [ - "memchr", -] - [[package]] name = "once_cell" version = "1.20.2" @@ -1271,20 +1081,6 @@ version = "0.8.5" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "2b15c43186be67a4fd63bee50d0303afffcef381492ebe2c5d87f324e1b8815c" -[[package]] -name = "risc0-binfmt" -version = "1.3.0-alpha.1" -source = "git+https://github.com/risc0/risc0.git?rev=17ed98c3243258ad912fd52a289fef6725f17c90#17ed98c3243258ad912fd52a289fef6725f17c90" -dependencies = [ - "anyhow", - "borsh", - "elf", - "risc0-zkp", - "risc0-zkvm-platform", - "serde", - "tracing", -] - [[package]] name = "risc0-build-kernel" version = "1.3.0-alpha.1" @@ -1311,45 +1107,6 @@ dependencies = [ "risc0-zkp", ] -[[package]] -name = "risc0-circuit-rv32im-v2" -version = "0.1.0" -dependencies = [ - "anyhow", - "bytemuck", - "cfg-if", - "clap", - "derive_more", - "num-derive", - "num-traits", - "paste", - "rand", - "rayon", - "risc0-binfmt", - "risc0-circuit-rv32im-v2-sys", - "risc0-core", - "risc0-sys", - "risc0-zkp", - "serde", - "test-log", - "tracing", - "tracing-subscriber", -] - -[[package]] -name = "risc0-circuit-rv32im-v2-sys" -version = "0.1.0" -dependencies = [ - "cc", - "cust", - "derive_more", - "glob", - "risc0-build-kernel", - "risc0-core", - "risc0-sys", - "sppark", -] - [[package]] name = "risc0-core" version = "1.3.0-alpha.1" @@ -1367,9 +1124,7 @@ version = "1.3.0-alpha.1" source = "git+https://github.com/risc0/risc0.git?rev=17ed98c3243258ad912fd52a289fef6725f17c90#17ed98c3243258ad912fd52a289fef6725f17c90" dependencies = [ "anyhow", - "cust", "risc0-build-kernel", - "sppark", ] [[package]] @@ -1404,7 +1159,6 @@ dependencies = [ "borsh", "bytemuck", "cfg-if", - "cust", "digest", "ff", "hex", @@ -1432,21 +1186,6 @@ dependencies = [ "stability", ] -[[package]] -name = "rustc-demangle" -version = "0.1.24" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "719b953e2095829ee67db738b3bfa9fa368c94900df327b3f07fe6e794d2fe1f" - -[[package]] -name = "rustc_version" -version = "0.4.1" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "cfcb3a22ef46e85b45de6ee7e79d063319ebb6594faafcf1c225ea92ab6e9b92" -dependencies = [ - "semver", -] - [[package]] name = "rustix" version = "0.38.41" @@ -1487,12 +1226,6 @@ version = "3.0.4" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "49c1eeaf4b6a87c7479688c6d52b9f1153cedd3c489300564f932b065c6eab95" -[[package]] -name = "semver" -version = "1.0.23" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "61697e0a1c7e512e84a621326239844a24d8207b4669b41bc18b32ea5cbf988b" - [[package]] name = "serde" version = "1.0.216" @@ -1579,16 +1312,6 @@ version = "1.13.2" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "3c5e1a9a646d36c3599cd173a41282daf47c44583ad367b8e6837255952e5c67" -[[package]] -name = "sppark" -version = "0.1.10" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "ac5090642d9ae844edd9a5c23cb1fce6724ca88d50c55178ee8d1f656df5826b" -dependencies = [ - "cc", - "which", -] - [[package]] name = "stability" version = "0.2.1" @@ -1816,12 +1539,6 @@ version = "1.0.14" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "adb9e6ca4f869e1180728b7950e35922a7fc6397f7b641499e8f3ef06e50dc83" -[[package]] -name = "unicode-xid" -version = "0.2.6" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "ebc1c04c71510c7f702b52b7c350734c9ff1295c464a03335b00bb84fc54f853" - [[package]] name = "utf8parse" version = "0.2.2" @@ -1834,18 +1551,6 @@ version = "0.1.0" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "830b7e5d4d90034032940e4ace0d9a9a057e7a45cd94e6c007832e39edb82f6d" -[[package]] -name = "vek" -version = "0.15.10" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "8085882662f9bc47fc8b0cdafa5e19df8f592f650c02b9083da8d45ac9eebd17" -dependencies = [ - "approx", - "num-integer", - "num-traits", - "rustc_version", -] - [[package]] name = "version_check" version = "0.9.5" @@ -1858,18 +1563,6 @@ version = "0.11.0+wasi-snapshot-preview1" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "9c8d87e72b64a3b4db28d11ce29237c246188f4f51057d65a7eab63b7987e423" -[[package]] -name = "which" -version = "4.4.2" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "87ba24419a2078cd2b0f2ede2691b6c66d8e47836da3b6db8265ebad47afbfc7" -dependencies = [ - "either", - "home", - "once_cell", - "rustix", -] - [[package]] name = "winapi" version = "0.3.9" diff --git a/Cargo.toml b/Cargo.toml index 80edc8ac..263f8d27 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -1,62 +1,21 @@ [workspace] resolver = "2" -members = [ - "risc0/circuit/rv32im-v2", - "risc0/circuit/rv32im-v2-sys", - "zirgen/circuit/fib", - "zirgen/dsl", -] +members = ["zirgen/circuit/fib", "zirgen/dsl"] [workspace.dependencies] -risc0-circuit-rv32im-v2 = { path = "risc0/circuit/rv32im-v2" } -risc0-circuit-rv32im-v2-sys = { path = "risc0/circuit/rv32im-v2-sys" } risc0-zirgen-dsl = { path = "zirgen/dsl" } sppark = "0.1.10" -[workspace.dependencies.risc0-binfmt] -git = "https://github.com/risc0/risc0.git" -rev = "17ed98c3243258ad912fd52a289fef6725f17c90" -default-features = false - -[workspace.dependencies.risc0-build] -git = "https://github.com/risc0/risc0.git" -rev = "17ed98c3243258ad912fd52a289fef6725f17c90" -default-features = false - -[workspace.dependencies.risc0-build-kernel] -git = "https://github.com/risc0/risc0.git" -rev = "17ed98c3243258ad912fd52a289fef6725f17c90" - -[workspace.dependencies.risc0-circuit-recursion] -git = "https://github.com/risc0/risc0.git" -rev = "17ed98c3243258ad912fd52a289fef6725f17c90" -default-features = false - [workspace.dependencies.risc0-core] git = "https://github.com/risc0/risc0.git" rev = "17ed98c3243258ad912fd52a289fef6725f17c90" default-features = false -[workspace.dependencies.risc0-sys] -git = "https://github.com/risc0/risc0.git" -rev = "17ed98c3243258ad912fd52a289fef6725f17c90" -default-features = false - [workspace.dependencies.risc0-zkp] git = "https://github.com/risc0/risc0.git" rev = "17ed98c3243258ad912fd52a289fef6725f17c90" default-features = false -[workspace.dependencies.risc0-zkvm] -git = "https://github.com/risc0/risc0.git" -rev = "17ed98c3243258ad912fd52a289fef6725f17c90" -default-features = false - -[workspace.dependencies.risc0-zkvm-platform] -git = "https://github.com/risc0/risc0.git" -rev = "17ed98c3243258ad912fd52a289fef6725f17c90" -default-features = false - [profile.bench] lto = true diff --git a/risc0/circuit/rv32im-v2-sys/Cargo.toml b/risc0/circuit/rv32im-v2-sys/Cargo.toml deleted file mode 100644 index f814760f..00000000 --- a/risc0/circuit/rv32im-v2-sys/Cargo.toml +++ /dev/null @@ -1,23 +0,0 @@ -[package] -name = "risc0-circuit-rv32im-v2-sys" -description = "Generated HAL code for rv32im-v2 cicuit" -edition = "2021" -version = "0.1.0" -links = "risc0-circuit-rv32im-v2-sys" - -[dependencies] -cust = { version = "0.3", optional = true } -derive_more = { version = "1.0", features = ["debug"] } -risc0-core = { workspace = true } -risc0-sys = { workspace = true } -sppark = { workspace = true, optional = true } - -[build-dependencies] -cc = { version = "1.2.4", features = ["parallel"] } -glob = "0.3" -risc0-build-kernel = { workspace = true } - -[features] -default = [] -cuda = ["dep:cust", "dep:sppark", "risc0-sys/cuda"] -metal = [] diff --git a/risc0/circuit/rv32im-v2-sys/build.rs b/risc0/circuit/rv32im-v2-sys/build.rs deleted file mode 100644 index 215f0fd1..00000000 --- a/risc0/circuit/rv32im-v2-sys/build.rs +++ /dev/null @@ -1,94 +0,0 @@ -// Copyright 2024 RISC Zero, Inc. -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -use std::{ - env, - path::{Path, PathBuf}, -}; - -use risc0_build_kernel::{KernelBuild, KernelType}; - -fn main() { - if env::var("CARGO_FEATURE_CUDA").is_ok() { - build_cuda_kernels(); - } - - build_cpu_kernels(); -} - -fn build_cpu_kernels() { - rerun_if_changed("kernels/cxx"); - KernelBuild::new(KernelType::Cpp) - .files(glob_paths("kernels/cxx/*.cpp")) - .deps(glob_paths("kernels/cxx/*.h")) - .deps(glob_paths("kernels/cxx/*.cpp.inc")) - .deps(glob_paths("kernels/cxx/*.h.inc")) - .include(env::var("DEP_RISC0_SYS_CXX_ROOT").unwrap()) - .compile("risc0_rv32im_v2_cpu"); -} - -fn build_cuda_kernels() { - let output = "risc0_rv32im_v2_cuda"; - - println!("cargo:rerun-if-env-changed=NVCC_APPEND_FLAGS"); - println!("cargo:rerun-if-env-changed=NVCC_PREPEND_FLAGS"); - println!("cargo:rerun-if-env-changed=SCCACHE_RECACHE"); - rerun_if_changed("kernels/cuda"); - - env::set_var("SCCACHE_IDLE_TIMEOUT", "0"); - - if env::var("RISC0_SKIP_BUILD_KERNELS").is_ok() { - let out_dir = env::var("OUT_DIR").map(PathBuf::from).unwrap(); - let out_path = out_dir.join(format!("lib{output}-skip.a")); - std::fs::OpenOptions::new() - .create(true) - .truncate(true) - .write(true) - .open(&out_path) - .unwrap(); - println!("cargo:{}={}", output, out_path.display()); - return; - } - - let mut build = cc::Build::new(); - build - .cuda(true) - .cudart("static") - .debug(false) - .flag("-diag-suppress=177") - .flag("-diag-suppress=550") - .flag("-diag-suppress=2922") - .flag("-std=c++17") - .flag("-Xcompiler") - .flag("-Wno-unused-function,-Wno-unused-parameter") - .flag("-Xcompiler") - .flag("-O3") - .flag("-Xptxas") - .flag("-O3") - .include(env::var("DEP_RISC0_SYS_CUDA_ROOT").unwrap()) - .include(env::var("DEP_RISC0_SYS_CXX_ROOT").unwrap()) - .include(env::var("DEP_SPPARK_ROOT").unwrap()); - if env::var_os("NVCC_PREPEND_FLAGS").is_none() && env::var_os("NVCC_APPEND_FLAGS").is_none() { - build.flag("-arch=native"); - } - build.files(glob_paths("kernels/cuda/*.cu")).compile(output); -} - -fn rerun_if_changed>(path: P) { - println!("cargo:rerun-if-changed={}", path.as_ref().display()); -} - -fn glob_paths(pattern: &str) -> Vec { - glob::glob(pattern).unwrap().map(|x| x.unwrap()).collect() -} diff --git a/risc0/circuit/rv32im-v2-sys/kernels/cuda/buffers.h b/risc0/circuit/rv32im-v2-sys/kernels/cuda/buffers.h deleted file mode 100644 index 025c6bf0..00000000 --- a/risc0/circuit/rv32im-v2-sys/kernels/cuda/buffers.h +++ /dev/null @@ -1,55 +0,0 @@ -// Copyright 2024 RISC Zero, Inc. -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include "fp.h" - -#include -#include - -namespace risc0::circuit::rv32im_v2::cuda { - -struct Buffer { - Fp* buf; - size_t rows; - size_t cols; - bool checkedReads; - - __device__ void set(size_t row, size_t col, Fp val) { - Fp& elem = buf[col * rows + row]; - if (elem != Fp::invalid() && elem != val) { - printf("set(row: %lu, col: %lu, val: 0x%08x) cur: 0x%08x\n", - row, - col, - val.asUInt32(), - elem.asUInt32()); - assert(false && "Inconsistent set"); - } - // printf("set(row: %lu, col: %lu, val: 0x%08x)\n", row, col, val.asUInt32()); - elem = val; - } - - __device__ Fp get(size_t row, size_t col) { - Fp ret = buf[col * rows + row]; - if (ret == Fp::invalid() && checkedReads) { - printf("get(row: %lu, col: %lu) -> 0x%08x\n", row, col, ret.asRaw()); - assert(false && "Read of unset value"); - } - // printf("get(row: %lu, col: %lu) -> 0x%08x\n", row, col, ret.asUInt32()); - return ret; - } -}; - -} // namespace risc0::circuit::rv32im_v2::cuda diff --git a/risc0/circuit/rv32im-v2-sys/kernels/cuda/defs.cu.inc b/risc0/circuit/rv32im-v2-sys/kernels/cuda/defs.cu.inc deleted file mode 100644 index 5fd202ef..00000000 --- a/risc0/circuit/rv32im-v2-sys/kernels/cuda/defs.cu.inc +++ /dev/null @@ -1,7 +0,0 @@ -SET_FIELD(BabyBear); -constexpr size_t kRegCountAccum = 76; -constexpr size_t kRegCountCode = 1; -constexpr size_t kRegCountData = 192; -constexpr size_t kRegCountGlobal = 73; -constexpr size_t kRegCountMix = 32; -constexpr size_t kRegCountTest = 192; diff --git a/risc0/circuit/rv32im-v2-sys/kernels/cuda/eval_check.cuh b/risc0/circuit/rv32im-v2-sys/kernels/cuda/eval_check.cuh deleted file mode 100644 index 47f9908e..00000000 --- a/risc0/circuit/rv32im-v2-sys/kernels/cuda/eval_check.cuh +++ /dev/null @@ -1,197 +0,0 @@ -// This code is automatically generated - -#include "supra/fp.h" - -#include - -namespace risc0::circuit::rv32im_v2::cuda { - -extern __device__ FpExt rv32im_v2_12(uint32_t idx, - uint32_t size, - Fp* arg0, - FpExt arg1, - FpExt arg2, - FpExt arg3, - FpExt arg4, - FpExt arg5, - FpExt arg6, - FpExt arg7, - FpExt arg8, - FpExt* arg9, - const Fp* arg10, - const Fp* arg11, - const Fp* arg12, - const Fp* arg13); -extern __device__ FpExt rv32im_v2_11(uint32_t idx, - uint32_t size, - FpExt arg0, - Fp* arg1, - FpExt arg2, - FpExt arg3, - FpExt arg4, - FpExt arg5, - FpExt* arg6, - const Fp* arg7, - const Fp* arg8, - const Fp* arg9, - const Fp* arg10); -extern __device__ FpExt rv32im_v2_10(uint32_t idx, - uint32_t size, - Fp* arg0, - FpExt arg1, - FpExt arg2, - FpExt arg3, - FpExt arg4, - FpExt arg5, - FpExt arg6, - FpExt arg7, - FpExt arg8, - FpExt arg9, - FpExt arg10, - FpExt arg11, - FpExt* arg12, - FpExt arg13, - const Fp* arg14, - const Fp* arg15, - const Fp* arg16, - const Fp* arg17); -extern __device__ FpExt rv32im_v2_9(uint32_t idx, - uint32_t size, - FpExt arg0, - Fp* arg1, - FpExt arg2, - FpExt arg3, - FpExt arg4, - FpExt arg5, - FpExt arg6, - FpExt arg7, - FpExt arg8, - FpExt* arg9, - FpExt arg10, - const Fp* arg11, - const Fp* arg12, - const Fp* arg13, - const Fp* arg14); -extern __device__ FpExt rv32im_v2_8(uint32_t idx, - uint32_t size, - Fp* arg0, - FpExt arg1, - FpExt arg2, - FpExt arg3, - FpExt arg4, - FpExt arg5, - FpExt arg6, - FpExt arg7, - FpExt* arg8, - FpExt arg9, - const Fp* arg10, - const Fp* arg11, - const Fp* arg12, - const Fp* arg13); -extern __device__ FpExt rv32im_v2_7(uint32_t idx, - uint32_t size, - FpExt arg0, - FpExt arg1, - Fp* arg2, - FpExt arg3, - FpExt arg4, - FpExt arg5, - FpExt* arg6, - FpExt arg7, - const Fp* arg8, - const Fp* arg9, - const Fp* arg10, - const Fp* arg11); -extern __device__ FpExt rv32im_v2_6(uint32_t idx, - uint32_t size, - Fp* arg0, - FpExt arg1, - FpExt arg2, - FpExt* arg3, - FpExt arg4, - FpExt arg5, - FpExt arg6, - FpExt arg7, - FpExt arg8, - const Fp* arg9, - const Fp* arg10, - const Fp* arg11, - const Fp* arg12); -extern __device__ FpExt rv32im_v2_5(uint32_t idx, - uint32_t size, - Fp* arg0, - FpExt arg1, - FpExt* arg2, - FpExt arg3, - FpExt arg4, - FpExt arg5, - FpExt arg6, - FpExt arg7, - const Fp* arg8, - const Fp* arg9, - const Fp* arg10); -extern __device__ FpExt rv32im_v2_4(uint32_t idx, - uint32_t size, - Fp* arg0, - FpExt arg1, - FpExt* arg2, - FpExt arg3, - FpExt arg4, - FpExt arg5, - const Fp* arg6, - const Fp* arg7, - const Fp* arg8); -extern __device__ FpExt rv32im_v2_3(uint32_t idx, - uint32_t size, - Fp* arg0, - FpExt arg1, - FpExt* arg2, - FpExt arg3, - FpExt arg4, - FpExt arg5, - FpExt arg6, - const Fp* arg7, - const Fp* arg8, - const Fp* arg9); -extern __device__ FpExt rv32im_v2_2(uint32_t idx, - uint32_t size, - Fp* arg0, - FpExt arg1, - FpExt* arg2, - FpExt arg3, - FpExt arg4, - FpExt arg5, - FpExt arg6, - const Fp* arg7, - const Fp* arg8, - const Fp* arg9); -extern __device__ FpExt rv32im_v2_1(uint32_t idx, - uint32_t size, - FpExt* arg0, - FpExt arg1, - FpExt arg2, - FpExt arg3, - const Fp* arg4, - const Fp* arg5, - const Fp* arg6); -extern __device__ FpExt rv32im_v2_0(uint32_t idx, - uint32_t size, - FpExt* arg0, - FpExt arg1, - FpExt arg2, - FpExt arg3, - const Fp* arg4, - const Fp* arg5); -extern __device__ FpExt poly_fp(uint32_t idx, - uint32_t size, - const Fp* ctrl, - const Fp* out, - const Fp* data, - const Fp* mix, - const Fp* accum); - -constexpr size_t INV_RATE = 4; -constexpr size_t kNumPolyMixPows = 411; -extern __constant__ FpExt poly_mix[kNumPolyMixPows]; - -} // namespace risc0::circuit::rv32im_v2::cuda diff --git a/risc0/circuit/rv32im-v2-sys/kernels/cuda/eval_check_0.cu b/risc0/circuit/rv32im-v2-sys/kernels/cuda/eval_check_0.cu deleted file mode 100644 index 9e80e19b..00000000 --- a/risc0/circuit/rv32im-v2-sys/kernels/cuda/eval_check_0.cu +++ /dev/null @@ -1,5051 +0,0 @@ -// This code is automatically generated - -#include "supra/fp.h" - -#include "eval_check.cuh" - -#include - -namespace risc0::circuit::rv32im_v2::cuda { - -__device__ FpExt rv32im_v2_12(uint32_t idx, - uint32_t size, - Fp* arg0, - FpExt arg1, - FpExt arg2, - FpExt arg3, - FpExt arg4, - FpExt arg5, - FpExt arg6, - FpExt arg7, - FpExt arg8, - FpExt* arg9, - const Fp* arg10, - const Fp* arg11, - const Fp* arg12, - const Fp* arg13) { - uint32_t mask = size - 1; - Fp x0(115); - Fp x1(23); - Fp x2(55); - Fp x3(103); - Fp x4(111); - Fp x5(5); - Fp x6(65520); - Fp x7(99); - Fp x8(0); - Fp x9(2013265920); - Fp x10(65536); - Fp x11(16384); - Fp x12(8192); - Fp x13(4096); - Fp x14(2048); - Fp x15(1024); - Fp x16(512); - Fp x17(256); - Fp x18(128); - Fp x19(64); - Fp x20(32); - Fp x21(16); - Fp x22(8); - Fp x23(4); - Fp x24(19); - Fp x25(3); - Fp x26(2); - Fp x27(1006632961); - Fp x28(32768); - Fp x29(1); - Fp x30 = arg10[31 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x31 = arg10[120 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x32 = arg10[32 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x33 = arg10[103 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x34 = arg10[33 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x35 = arg10[121 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x36 = arg10[34 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x37 = arg10[114 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x38 = arg10[35 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x39 = arg10[122 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x40 = arg10[36 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x41 = arg10[30 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x42 = arg10[123 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x43 = arg10[124 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x44 = arg10[24 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x45 = arg10[25 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x46 = arg10[77 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x47 = arg10[27 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x48 = arg10[29 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x49 = arg10[26 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x50 = arg10[102 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x51 = arg10[113 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x52 = arg10[19 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x53 = arg10[20 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x54 = arg10[118 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x55 = arg10[134 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x56 = arg10[119 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x57 = arg10[135 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x58 = arg10[120 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x59 = arg10[136 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x60 = arg10[121 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x61 = arg10[137 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x62 = arg10[122 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x63 = arg10[138 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x64 = arg10[123 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x65 = arg10[139 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x66 = arg10[124 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x67 = arg10[140 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x68 = arg10[125 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x69 = arg10[141 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x70 = arg10[126 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x71 = arg10[142 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x72 = arg10[127 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x73 = arg10[143 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x74 = arg10[128 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x75 = arg10[144 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x76 = arg10[129 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x77 = arg10[145 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x78 = arg10[130 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x79 = arg10[146 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x80 = arg10[131 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x81 = arg10[147 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x82 = arg10[132 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x83 = arg10[148 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x84 = arg10[133 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x85 = arg10[149 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x86 = arg10[21 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x87 = arg10[22 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x88 = arg10[23 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x89 = arg10[150 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x90 = arg10[166 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x91 = arg10[151 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x92 = arg10[167 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x93 = arg10[152 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x94 = arg10[168 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x95 = arg10[153 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x96 = arg10[169 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x97 = arg10[154 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x98 = arg10[170 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x99 = arg10[155 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x100 = arg10[171 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x101 = arg10[156 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x102 = arg10[172 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x103 = arg10[157 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x104 = arg10[173 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x105 = arg10[158 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x106 = arg10[174 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x107 = arg10[159 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x108 = arg10[175 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x109 = arg10[160 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x110 = arg10[176 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x111 = arg10[161 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x112 = arg10[177 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x113 = arg10[162 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x114 = arg10[178 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x115 = arg10[163 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x116 = arg10[179 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x117 = arg10[164 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x118 = arg10[180 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x119 = arg10[165 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x120 = arg10[181 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x121 = arg10[37 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x122 = arg10[39 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x123 = arg10[38 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x124 = arg10[40 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x125 = arg10[42 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x126 = arg10[41 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x127 = arg10[43 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x128 = arg10[45 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x129 = arg10[44 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x130 = arg10[46 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x131 = arg10[48 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x132 = arg10[47 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x133 = arg10[49 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x134 = arg10[50 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x135 = arg10[51 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x136 = arg10[53 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x137 = arg10[57 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x138 = arg10[52 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x139 = arg10[0 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x140 = arg10[54 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x141 = arg10[60 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x142 = arg10[61 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x143 = arg10[58 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x144 = arg10[59 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x145 = arg10[1 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x146 = arg10[76 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x147 = arg10[118 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x148 = arg10[119 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x149 = arg10[2 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x150 = arg10[68 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x151 = arg10[62 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x152 = arg10[70 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x153 = arg10[93 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x154 = arg10[3 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x155 = arg10[82 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x156 = arg10[83 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x157 = arg10[84 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x158 = arg10[85 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x159 = arg10[86 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x160 = arg10[87 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x161 = arg10[88 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x162 = arg0[0]; - Fp x163 = arg0[1]; - Fp x164 = x162 - x163; - FpExt x165 = arg1 + poly_mix[8] * x164; - Fp x166 = arg0[2]; - FpExt x167 = x165 + poly_mix[9] * x166; - Fp x168 = x30 - x29; - arg0[146] = x168; - FpExt x169 = x167 + poly_mix[10] * x168; - Fp x170 = x31 * x28; - Fp x171 = x32 * x27; - arg0[192] = x171; - Fp x172 = x170 + x171; - Fp x173 = x33 - x172; - FpExt x174 = x169 + poly_mix[11] * x173; - Fp x175 = arg0[3]; - FpExt x176 = x174 + poly_mix[12] * x175; - Fp x177 = x34 - x29; - arg0[147] = x177; - FpExt x178 = x176 + poly_mix[13] * x177; - Fp x179 = x35 * x28; - arg0[152] = x179; - Fp x180 = x36 * x27; - arg0[176] = x180; - Fp x181 = x179 + x180; - Fp x182 = x37 - x181; - FpExt x183 = x178 + poly_mix[14] * x182; - Fp x184 = arg0[4]; - FpExt x185 = x183 + poly_mix[15] * x184; - Fp x186 = x38 - x29; - arg0[149] = x186; - FpExt x187 = x185 + poly_mix[16] * x186; - Fp x188 = x39 * x28; - arg0[153] = x188; - Fp x189 = x40 * x27; - arg0[183] = x189; - Fp x190 = x188 + x189; - Fp x191 = x41 - x190; - FpExt x192 = x187 + poly_mix[17] * x191; - Fp x193 = arg0[5]; - Fp x194 = x31 * x193; - Fp x195 = arg0[6]; - Fp x196 = x194 * x195; - Fp x197 = arg0[7]; - Fp x198 = x197 * x35; - Fp x199 = x198 * x39; - Fp x200 = x196 + x199; - Fp x201 = x200 - x42; - FpExt x202 = x192 + poly_mix[18] * x201; - Fp x203 = x42 + x39; - Fp x204 = x42 * x26; - Fp x205 = x204 * x39; - Fp x206 = x203 - x205; - Fp x207 = x206 - x43; - FpExt x208 = x202 + poly_mix[19] * x207; - FpExt x209 = arg2 + x44 * x208 * poly_mix[261]; - Fp x210 = arg0[8]; - Fp x211 = x210 - x25; - FpExt x212 = arg3 + poly_mix[1] * x211; - Fp x213 = arg0[9]; - FpExt x214 = x212 + poly_mix[2] * x213; - Fp x215 = arg0[10]; - FpExt x216 = x214 + poly_mix[3] * x215; - Fp x217 = arg0[11]; - FpExt x218 = x216 + poly_mix[4] * x217; - Fp x219 = arg0[12]; - FpExt x220 = x218 + poly_mix[5] * x219; - Fp x221 = arg0[13]; - FpExt x222 = x220 + poly_mix[6] * x221; - Fp x223 = arg0[14]; - FpExt x224 = x222 + poly_mix[7] * x223; - FpExt x225 = x224 + poly_mix[8] * x164; - FpExt x226 = x225 + poly_mix[9] * x30; - FpExt x227 = x226 + poly_mix[10] * x34; - FpExt x228 = x227 + poly_mix[11] * x38; - FpExt x229 = x209 + x45 * x228 * poly_mix[272]; - Fp x230 = x46 - x24; - FpExt x231 = arg4 + poly_mix[0] * x230; - FpExt x232 = x231 + poly_mix[1] * x210; - FpExt x233 = x232 + poly_mix[2] * x47; - FpExt x234 = x233 + poly_mix[3] * x48; - FpExt x235 = x234 + poly_mix[4] * x30; - FpExt x236 = x235 + poly_mix[5] * x34; - FpExt x237 = x236 + poly_mix[6] * x38; - FpExt x238 = x229 + x49 * x237 * poly_mix[275]; - Fp x239 = x50 + x51; - Fp x240 = x239 * x52; - Fp x241 = arg0[15]; - Fp x242 = x241 * x53; - Fp x243 = x54 * x55; - Fp x244 = x56 * x57; - Fp x245 = x58 * x59; - Fp x246 = x60 * x61; - Fp x247 = x62 * x63; - Fp x248 = x64 * x65; - Fp x249 = x66 * x67; - Fp x250 = x68 * x69; - Fp x251 = x70 * x71; - Fp x252 = x72 * x73; - Fp x253 = x74 * x75; - Fp x254 = x76 * x77; - Fp x255 = x78 * x79; - Fp x256 = x80 * x81; - Fp x257 = x82 * x83; - Fp x258 = x84 * x85; - Fp x259 = x244 * x26; - Fp x260 = x245 * x23; - Fp x261 = x246 * x22; - Fp x262 = x247 * x21; - Fp x263 = x248 * x20; - Fp x264 = x249 * x19; - Fp x265 = x250 * x18; - Fp x266 = x251 * x17; - Fp x267 = x252 * x16; - Fp x268 = x253 * x15; - Fp x269 = x254 * x14; - Fp x270 = x255 * x13; - Fp x271 = x256 * x12; - Fp x272 = x257 * x11; - Fp x273 = x258 * x28; - Fp x274 = x243 + x259; - Fp x275 = x274 + x260; - Fp x276 = x275 + x261; - Fp x277 = x276 + x262; - Fp x278 = x277 + x263; - Fp x279 = x278 + x264; - Fp x280 = x279 + x265; - Fp x281 = x280 + x266; - Fp x282 = x281 + x267; - Fp x283 = x282 + x268; - Fp x284 = x283 + x269; - Fp x285 = x284 + x270; - Fp x286 = x285 + x271; - Fp x287 = x286 + x272; - Fp x288 = x287 + x273; - Fp x289 = x288 * x26; - Fp x290 = x239 - x289; - Fp x291 = x290 * x86; - Fp x292 = x239 - x288; - Fp x293 = x292 * x87; - Fp x294 = x288 * x88; - Fp x295 = x66 * x44; - Fp x296 = x29 - x56; - Fp x297 = x296 * x45; - Fp x298 = arg0[16]; - Fp x299 = x50 + x298; - Fp x300 = x299 * x49; - Fp x301 = x240 + x242; - Fp x302 = x301 + x291; - Fp x303 = x302 + x293; - Fp x304 = x303 + x294; - Fp x305 = x304 + x295; - Fp x306 = x305 + x297; - Fp x307 = x306 + x300; - Fp x308 = x33 + x37; - Fp x309 = x308 * x52; - Fp x310 = arg0[17]; - Fp x311 = x310 * x53; - Fp x312 = x89 * x90; - Fp x313 = x91 * x92; - Fp x314 = x93 * x94; - Fp x315 = x95 * x96; - Fp x316 = x97 * x98; - Fp x317 = x99 * x100; - Fp x318 = x101 * x102; - Fp x319 = x103 * x104; - Fp x320 = x105 * x106; - Fp x321 = x107 * x108; - Fp x322 = x109 * x110; - Fp x323 = x111 * x112; - Fp x324 = x113 * x114; - Fp x325 = x115 * x116; - Fp x326 = x117 * x118; - Fp x327 = x119 * x120; - Fp x328 = x313 * x26; - Fp x329 = x314 * x23; - Fp x330 = x315 * x22; - Fp x331 = x316 * x21; - Fp x332 = x317 * x20; - Fp x333 = x318 * x19; - Fp x334 = x319 * x18; - Fp x335 = x320 * x17; - Fp x336 = x321 * x16; - Fp x337 = x322 * x15; - Fp x338 = x323 * x14; - Fp x339 = x324 * x13; - Fp x340 = x325 * x12; - Fp x341 = x326 * x11; - Fp x342 = x327 * x28; - Fp x343 = x312 + x328; - Fp x344 = x343 + x329; - Fp x345 = x344 + x330; - Fp x346 = x345 + x331; - Fp x347 = x346 + x332; - Fp x348 = x347 + x333; - Fp x349 = x348 + x334; - Fp x350 = x349 + x335; - Fp x351 = x350 + x336; - Fp x352 = x351 + x337; - Fp x353 = x352 + x338; - Fp x354 = x353 + x339; - Fp x355 = x354 + x340; - Fp x356 = x355 + x341; - Fp x357 = x356 + x342; - Fp x358 = x357 * x26; - Fp x359 = x308 - x358; - Fp x360 = x359 * x86; - Fp x361 = x308 - x357; - Fp x362 = x361 * x87; - Fp x363 = x357 * x88; - Fp x364 = arg0[18]; - Fp x365 = x33 + x364; - Fp x366 = x365 * x49; - Fp x367 = x309 + x311; - Fp x368 = x367 + x360; - Fp x369 = x368 + x362; - Fp x370 = x369 + x363; - Fp x371 = x370 + x366; - Fp x372 = x121 - x29; - arg0[150] = x372; - FpExt x373 = x238 + poly_mix[277] * x372; - Fp x374 = x29 - x122; - Fp x375 = x122 * x374; - arg0[203] = x375; - FpExt x376 = x373 + poly_mix[278] * x375; - Fp x377 = x122 * x10; - Fp x378 = x377 + x123; - Fp x379 = x307 - x378; - FpExt x380 = x376 + poly_mix[279] * x379; - Fp x381 = x371 + x122; - Fp x382 = x124 - x29; - arg0[239] = x382; - FpExt x383 = x380 + poly_mix[280] * x382; - Fp x384 = x29 - x125; - Fp x385 = x125 * x384; - arg0[204] = x385; - FpExt x386 = x383 + poly_mix[281] * x385; - Fp x387 = x125 * x10; - Fp x388 = x387 + x126; - Fp x389 = x381 - x388; - FpExt x390 = x386 + poly_mix[282] * x389; - Fp x391 = x127 - x29; - arg0[144] = x391; - FpExt x392 = x390 + poly_mix[283] * x391; - Fp x393 = x29 - x128; - Fp x394 = x128 * x393; - arg0[205] = x394; - FpExt x395 = x392 + poly_mix[284] * x394; - Fp x396 = x128 * x10; - Fp x397 = x396 + x129; - Fp x398 = arg0[19]; - Fp x399 = x398 - x397; - FpExt x400 = x395 + poly_mix[285] * x399; - Fp x401 = arg0[20]; - Fp x402 = x401 + x128; - Fp x403 = x130 - x29; - FpExt x404 = x400 + poly_mix[286] * x403; - Fp x405 = x29 - x131; - Fp x406 = x131 * x405; - arg0[226] = x406; - FpExt x407 = x404 + poly_mix[287] * x406; - Fp x408 = x131 * x10; - Fp x409 = x408 + x132; - Fp x410 = x402 - x409; - FpExt x411 = x407 + poly_mix[288] * x410; - Fp x412 = x29 - x133; - Fp x413 = x133 * x412; - arg0[227] = x413; - FpExt x414 = x411 + poly_mix[289] * x413; - Fp x415 = arg0[21]; - Fp x416 = x415 * x134; - Fp x417 = x416 - x412; - FpExt x418 = x414 + poly_mix[290] * x417; - Fp x419 = x133 * x415; - FpExt x420 = x418 + poly_mix[291] * x419; - Fp x421 = x133 * x134; - FpExt x422 = x420 + poly_mix[292] * x421; - Fp x423 = arg0[22]; - Fp x424 = x412 * x423; - Fp x425 = x424 * x415; - Fp x426 = x29 - x424; - Fp x427 = x426 * x19; - Fp x428 = arg0[23]; - Fp x429 = x428 + x427; - Fp x430 = x429 + x425; - Fp x431 = x430 - x135; - FpExt x432 = x422 + poly_mix[293] * x431; - Fp x433 = x136 - x9; - FpExt x434 = x432 + poly_mix[294] * x433; - Fp x435 = x137 - x29; - arg0[145] = x435; - FpExt x436 = x434 + poly_mix[295] * x435; - FpExt x437 = x436 + poly_mix[296] * x8; - FpExt x438 = x437 + poly_mix[297] * x8; - Fp x439 = x138 - x135; - FpExt x440 = x438 + poly_mix[298] * x439; - Fp x441 = x139 - x140; - Fp x442 = x141 - x29; - FpExt x443 = x440 + poly_mix[299] * x442; - Fp x444 = x142 - x441; - FpExt x445 = x443 + poly_mix[300] * x444; - Fp x446 = x143 - x123; - FpExt x447 = x445 + poly_mix[301] * x446; - Fp x448 = x144 - x126; - FpExt x449 = x447 + poly_mix[302] * x448; - FpExt x450 = arg5 + x145 * x449 * poly_mix[24]; - Fp x451 = x146 * x14; - Fp x452 = arg0[24]; - Fp x453 = x452 + x451; - Fp x454 = arg0[25]; - Fp x455 = x454 * x20; - Fp x456 = x453 + x455; - Fp x457 = arg0[26]; - Fp x458 = x456 + x457; - Fp x459 = arg0[27]; - Fp x460 = x458 + x459; - Fp x461 = arg0[28]; - FpExt x462 = x231 + poly_mix[1] * x461; - FpExt x463 = x462 + poly_mix[2] * x217; - FpExt x464 = x463 + poly_mix[3] * x223; - FpExt x465 = x464 + poly_mix[4] * x166; - FpExt x466 = x465 + poly_mix[5] * x175; - FpExt x467 = x466 + poly_mix[6] * x184; - Fp x468 = arg0[29]; - FpExt x469 = x467 + poly_mix[7] * x468; - Fp x470 = arg0[30]; - FpExt x471 = x469 + poly_mix[8] * x470; - Fp x472 = arg0[31]; - FpExt x473 = x471 + poly_mix[9] * x472; - Fp x474 = arg0[32]; - FpExt x475 = x473 + poly_mix[10] * x474; - Fp x476 = arg0[33]; - FpExt x477 = x475 + poly_mix[11] * x476; - Fp x478 = arg0[34]; - FpExt x479 = x477 + poly_mix[12] * x478; - Fp x480 = arg0[35]; - FpExt x481 = x479 + poly_mix[13] * x480; - Fp x482 = arg0[36]; - FpExt x483 = x481 + poly_mix[14] * x482; - Fp x484 = arg0[37]; - FpExt x485 = x483 + poly_mix[15] * x484; - Fp x486 = arg0[38]; - FpExt x487 = x485 + poly_mix[16] * x486; - Fp x488 = arg0[39]; - FpExt x489 = x487 + poly_mix[17] * x488; - Fp x490 = arg0[40]; - FpExt x491 = x489 + poly_mix[18] * x490; - Fp x492 = arg0[41]; - FpExt x493 = x491 + poly_mix[19] * x492; - Fp x494 = arg0[42]; - FpExt x495 = x493 + poly_mix[20] * x494; - Fp x496 = arg0[43]; - FpExt x497 = x495 + poly_mix[21] * x496; - Fp x498 = arg0[44]; - FpExt x499 = x497 + poly_mix[22] * x498; - Fp x500 = arg0[45]; - FpExt x501 = x499 + poly_mix[23] * x500; - Fp x502 = arg0[46]; - FpExt x503 = x501 + poly_mix[24] * x502; - Fp x504 = arg0[47]; - FpExt x505 = x503 + poly_mix[25] * x504; - Fp x506 = arg0[48]; - FpExt x507 = x505 + poly_mix[26] * x506; - Fp x508 = arg0[49]; - FpExt x509 = x507 + poly_mix[27] * x508; - Fp x510 = arg0[50]; - FpExt x511 = x509 + poly_mix[28] * x510; - Fp x512 = arg0[51]; - FpExt x513 = x511 + poly_mix[29] * x512; - Fp x514 = arg0[52]; - FpExt x515 = x513 + poly_mix[30] * x514; - Fp x516 = arg0[53]; - FpExt x517 = x515 + poly_mix[31] * x516; - Fp x518 = arg0[54]; - FpExt x519 = x517 + poly_mix[32] * x518; - Fp x520 = arg0[55]; - FpExt x521 = x519 + poly_mix[33] * x520; - Fp x522 = arg0[56]; - FpExt x523 = x521 + poly_mix[34] * x522; - Fp x524 = arg0[57]; - Fp x525 = x298 - x524; - FpExt x526 = x523 + poly_mix[35] * x525; - Fp x527 = arg0[58]; - FpExt x528 = x526 + poly_mix[36] * x527; - Fp x529 = arg0[59]; - FpExt x530 = x528 + poly_mix[37] * x529; - Fp x531 = arg0[60]; - FpExt x532 = x530 + poly_mix[38] * x531; - Fp x533 = arg0[61]; - FpExt x534 = x532 + poly_mix[39] * x533; - Fp x535 = arg0[62]; - FpExt x536 = x534 + poly_mix[40] * x535; - Fp x537 = arg0[63]; - FpExt x538 = x536 + poly_mix[41] * x537; - Fp x539 = arg0[64]; - FpExt x540 = x538 + poly_mix[42] * x539; - Fp x541 = arg0[65]; - FpExt x542 = x540 + poly_mix[43] * x541; - Fp x543 = arg0[66]; - FpExt x544 = x542 + poly_mix[44] * x543; - Fp x545 = arg0[67]; - FpExt x546 = x544 + poly_mix[45] * x545; - Fp x547 = arg0[68]; - FpExt x548 = x546 + poly_mix[46] * x547; - Fp x549 = arg0[69]; - FpExt x550 = x548 + poly_mix[47] * x549; - Fp x551 = arg0[70]; - FpExt x552 = x550 + poly_mix[48] * x551; - Fp x553 = arg0[71]; - FpExt x554 = x552 + poly_mix[49] * x553; - Fp x555 = arg0[72]; - FpExt x556 = x554 + poly_mix[50] * x555; - Fp x557 = arg0[73]; - FpExt x558 = x556 + poly_mix[51] * x557; - Fp x559 = arg0[74]; - FpExt x560 = x558 + poly_mix[52] * x559; - Fp x561 = arg0[75]; - FpExt x562 = x560 + poly_mix[53] * x561; - Fp x563 = arg0[76]; - FpExt x564 = x562 + poly_mix[54] * x563; - Fp x565 = arg0[77]; - FpExt x566 = x564 + poly_mix[55] * x565; - Fp x567 = arg0[78]; - FpExt x568 = x566 + poly_mix[56] * x567; - Fp x569 = arg0[79]; - FpExt x570 = x568 + poly_mix[57] * x569; - Fp x571 = arg0[80]; - FpExt x572 = x570 + poly_mix[58] * x571; - Fp x573 = arg0[81]; - FpExt x574 = x572 + poly_mix[59] * x573; - Fp x575 = arg0[82]; - FpExt x576 = x574 + poly_mix[60] * x575; - Fp x577 = arg0[83]; - FpExt x578 = x576 + poly_mix[61] * x577; - Fp x579 = arg0[84]; - FpExt x580 = x578 + poly_mix[62] * x579; - Fp x581 = arg0[85]; - FpExt x582 = x580 + poly_mix[63] * x581; - Fp x583 = arg0[86]; - FpExt x584 = x582 + poly_mix[64] * x583; - Fp x585 = arg0[87]; - FpExt x586 = x584 + poly_mix[65] * x585; - Fp x587 = arg0[88]; - FpExt x588 = x586 + poly_mix[66] * x587; - Fp x589 = arg0[89]; - FpExt x590 = x588 + poly_mix[67] * x589; - Fp x591 = arg0[90]; - FpExt x592 = x590 + poly_mix[68] * x591; - Fp x593 = arg0[91]; - Fp x594 = x364 - x593; - FpExt x595 = x592 + poly_mix[69] * x594; - FpExt x596 = x595 + poly_mix[70] * x47; - FpExt x597 = x596 + poly_mix[71] * x48; - FpExt x598 = x597 + poly_mix[72] * x30; - FpExt x599 = x598 + poly_mix[73] * x34; - FpExt x600 = x599 + poly_mix[74] * x38; - FpExt x601 = arg6 + x52 * x600 * poly_mix[59]; - Fp x602 = arg0[92]; - FpExt x603 = x231 + poly_mix[1] * x602; - FpExt x604 = x603 + poly_mix[2] * x217; - FpExt x605 = x604 + poly_mix[3] * x223; - FpExt x606 = x605 + poly_mix[4] * x166; - FpExt x607 = x606 + poly_mix[5] * x175; - FpExt x608 = x607 + poly_mix[6] * x184; - FpExt x609 = x608 + poly_mix[7] * x468; - FpExt x610 = x609 + poly_mix[8] * x470; - FpExt x611 = x610 + poly_mix[9] * x472; - FpExt x612 = x611 + poly_mix[10] * x474; - FpExt x613 = x612 + poly_mix[11] * x476; - FpExt x614 = x613 + poly_mix[12] * x478; - FpExt x615 = x614 + poly_mix[13] * x480; - FpExt x616 = x615 + poly_mix[14] * x482; - FpExt x617 = x616 + poly_mix[15] * x484; - FpExt x618 = x617 + poly_mix[16] * x486; - FpExt x619 = x618 + poly_mix[17] * x488; - FpExt x620 = x619 + poly_mix[18] * x490; - FpExt x621 = x620 + poly_mix[19] * x492; - FpExt x622 = x621 + poly_mix[20] * x494; - FpExt x623 = x622 + poly_mix[21] * x496; - FpExt x624 = x623 + poly_mix[22] * x498; - FpExt x625 = x624 + poly_mix[23] * x500; - FpExt x626 = x625 + poly_mix[24] * x502; - FpExt x627 = x626 + poly_mix[25] * x504; - FpExt x628 = x627 + poly_mix[26] * x506; - FpExt x629 = x628 + poly_mix[27] * x508; - FpExt x630 = x629 + poly_mix[28] * x510; - FpExt x631 = x630 + poly_mix[29] * x512; - FpExt x632 = x631 + poly_mix[30] * x514; - FpExt x633 = x632 + poly_mix[31] * x516; - FpExt x634 = x633 + poly_mix[32] * x518; - FpExt x635 = x634 + poly_mix[33] * x520; - FpExt x636 = x635 + poly_mix[34] * x522; - FpExt x637 = x636 + poly_mix[35] * x525; - FpExt x638 = x637 + poly_mix[36] * x527; - FpExt x639 = x638 + poly_mix[37] * x529; - FpExt x640 = x639 + poly_mix[38] * x531; - FpExt x641 = x640 + poly_mix[39] * x533; - FpExt x642 = x641 + poly_mix[40] * x535; - FpExt x643 = x642 + poly_mix[41] * x537; - FpExt x644 = x643 + poly_mix[42] * x539; - FpExt x645 = x644 + poly_mix[43] * x541; - FpExt x646 = x645 + poly_mix[44] * x543; - FpExt x647 = x646 + poly_mix[45] * x545; - FpExt x648 = x647 + poly_mix[46] * x547; - FpExt x649 = x648 + poly_mix[47] * x549; - FpExt x650 = x649 + poly_mix[48] * x551; - FpExt x651 = x650 + poly_mix[49] * x553; - FpExt x652 = x651 + poly_mix[50] * x555; - FpExt x653 = x652 + poly_mix[51] * x557; - FpExt x654 = x653 + poly_mix[52] * x559; - FpExt x655 = x654 + poly_mix[53] * x561; - FpExt x656 = x655 + poly_mix[54] * x563; - FpExt x657 = x656 + poly_mix[55] * x565; - FpExt x658 = x657 + poly_mix[56] * x567; - FpExt x659 = x658 + poly_mix[57] * x569; - FpExt x660 = x659 + poly_mix[58] * x571; - FpExt x661 = x660 + poly_mix[59] * x573; - FpExt x662 = x661 + poly_mix[60] * x575; - FpExt x663 = x662 + poly_mix[61] * x577; - FpExt x664 = x663 + poly_mix[62] * x579; - FpExt x665 = x664 + poly_mix[63] * x581; - FpExt x666 = x665 + poly_mix[64] * x583; - FpExt x667 = x666 + poly_mix[65] * x585; - FpExt x668 = x667 + poly_mix[66] * x587; - FpExt x669 = x668 + poly_mix[67] * x589; - FpExt x670 = x669 + poly_mix[68] * x591; - FpExt x671 = x670 + poly_mix[69] * x594; - FpExt x672 = x671 + poly_mix[70] * x47; - FpExt x673 = x672 + poly_mix[71] * x48; - FpExt x674 = x673 + poly_mix[72] * x30; - FpExt x675 = x674 + poly_mix[73] * x34; - FpExt x676 = x675 + poly_mix[74] * x38; - FpExt x677 = x601 + x53 * x676 * poly_mix[134]; - Fp x678 = arg0[93]; - FpExt x679 = x231 + poly_mix[1] * x678; - FpExt x680 = x679 + poly_mix[2] * x217; - FpExt x681 = x680 + poly_mix[3] * x223; - FpExt x682 = x681 + poly_mix[4] * x166; - FpExt x683 = x682 + poly_mix[5] * x175; - FpExt x684 = x683 + poly_mix[6] * x184; - FpExt x685 = x684 + poly_mix[7] * x468; - FpExt x686 = x685 + poly_mix[8] * x470; - FpExt x687 = x686 + poly_mix[9] * x472; - FpExt x688 = x687 + poly_mix[10] * x474; - FpExt x689 = x688 + poly_mix[11] * x476; - FpExt x690 = x689 + poly_mix[12] * x478; - FpExt x691 = x690 + poly_mix[13] * x480; - FpExt x692 = x691 + poly_mix[14] * x482; - FpExt x693 = x692 + poly_mix[15] * x484; - FpExt x694 = x693 + poly_mix[16] * x486; - FpExt x695 = x694 + poly_mix[17] * x488; - FpExt x696 = x695 + poly_mix[18] * x490; - FpExt x697 = x696 + poly_mix[19] * x492; - FpExt x698 = x697 + poly_mix[20] * x494; - FpExt x699 = x698 + poly_mix[21] * x496; - FpExt x700 = x699 + poly_mix[22] * x498; - FpExt x701 = x700 + poly_mix[23] * x500; - FpExt x702 = x701 + poly_mix[24] * x502; - FpExt x703 = x702 + poly_mix[25] * x504; - FpExt x704 = x703 + poly_mix[26] * x506; - FpExt x705 = x704 + poly_mix[27] * x508; - FpExt x706 = x705 + poly_mix[28] * x510; - FpExt x707 = x706 + poly_mix[29] * x512; - FpExt x708 = x707 + poly_mix[30] * x514; - FpExt x709 = x708 + poly_mix[31] * x516; - FpExt x710 = x709 + poly_mix[32] * x518; - FpExt x711 = x710 + poly_mix[33] * x520; - FpExt x712 = x711 + poly_mix[34] * x522; - FpExt x713 = x712 + poly_mix[35] * x525; - FpExt x714 = x713 + poly_mix[36] * x527; - FpExt x715 = x714 + poly_mix[37] * x529; - FpExt x716 = x715 + poly_mix[38] * x531; - FpExt x717 = x716 + poly_mix[39] * x533; - FpExt x718 = x717 + poly_mix[40] * x535; - FpExt x719 = x718 + poly_mix[41] * x537; - FpExt x720 = x719 + poly_mix[42] * x539; - FpExt x721 = x720 + poly_mix[43] * x541; - FpExt x722 = x721 + poly_mix[44] * x543; - FpExt x723 = x722 + poly_mix[45] * x545; - FpExt x724 = x723 + poly_mix[46] * x547; - FpExt x725 = x724 + poly_mix[47] * x549; - FpExt x726 = x725 + poly_mix[48] * x551; - FpExt x727 = x726 + poly_mix[49] * x553; - FpExt x728 = x727 + poly_mix[50] * x555; - FpExt x729 = x728 + poly_mix[51] * x557; - FpExt x730 = x729 + poly_mix[52] * x559; - FpExt x731 = x730 + poly_mix[53] * x561; - FpExt x732 = x731 + poly_mix[54] * x563; - FpExt x733 = x732 + poly_mix[55] * x565; - FpExt x734 = x733 + poly_mix[56] * x567; - FpExt x735 = x734 + poly_mix[57] * x569; - FpExt x736 = x735 + poly_mix[58] * x571; - FpExt x737 = x736 + poly_mix[59] * x573; - FpExt x738 = x737 + poly_mix[60] * x575; - FpExt x739 = x738 + poly_mix[61] * x577; - FpExt x740 = x739 + poly_mix[62] * x579; - FpExt x741 = x740 + poly_mix[63] * x581; - FpExt x742 = x741 + poly_mix[64] * x583; - FpExt x743 = x742 + poly_mix[65] * x585; - FpExt x744 = x743 + poly_mix[66] * x587; - FpExt x745 = x744 + poly_mix[67] * x589; - FpExt x746 = x745 + poly_mix[68] * x591; - FpExt x747 = x746 + poly_mix[69] * x594; - FpExt x748 = x747 + poly_mix[70] * x47; - FpExt x749 = x748 + poly_mix[71] * x48; - FpExt x750 = x749 + poly_mix[72] * x30; - FpExt x751 = x750 + poly_mix[73] * x34; - FpExt x752 = x751 + poly_mix[74] * x38; - FpExt x753 = x677 + x86 * x752 * poly_mix[186]; - Fp x754 = arg0[94]; - Fp x755 = x754 - x298; - Fp x756 = arg0[95]; - Fp x757 = x756 - x364; - Fp x758 = arg0[96]; - FpExt x759 = x231 + poly_mix[1] * x758; - FpExt x760 = x759 + poly_mix[2] * x215; - FpExt x761 = x760 + poly_mix[3] * x217; - Fp x762 = arg0[97]; - Fp x763 = x755 - x762; - FpExt x764 = x761 + poly_mix[4] * x763; - Fp x765 = x757 + x147; - FpExt x766 = x764 + poly_mix[5] * x221; - FpExt x767 = x766 + poly_mix[6] * x223; - Fp x768 = x765 - x163; - FpExt x769 = x767 + poly_mix[7] * x768; - FpExt x770 = x769 + poly_mix[8] * x166; - FpExt x771 = x770 + poly_mix[9] * x168; - FpExt x772 = x771 + poly_mix[10] * x173; - FpExt x773 = x772 + poly_mix[11] * x175; - FpExt x774 = x773 + poly_mix[12] * x177; - Fp x775 = x364 - x181; - FpExt x776 = x774 + poly_mix[13] * x775; - FpExt x777 = x776 + poly_mix[14] * x184; - FpExt x778 = x777 + poly_mix[15] * x186; - FpExt x779 = x778 + poly_mix[16] * x191; - FpExt x780 = x779 + poly_mix[17] * x201; - FpExt x781 = x780 + poly_mix[18] * x207; - FpExt x782 = x753 + x87 * x781 * poly_mix[251]; - FpExt x783 = x231 + poly_mix[1] * x211; - FpExt x784 = x783 + poly_mix[2] * x215; - FpExt x785 = x784 + poly_mix[3] * x217; - FpExt x786 = x785 + poly_mix[4] * x763; - FpExt x787 = x786 + poly_mix[5] * x221; - FpExt x788 = x787 + poly_mix[6] * x223; - FpExt x789 = x788 + poly_mix[7] * x768; - FpExt x790 = x789 + poly_mix[8] * x30; - FpExt x791 = x790 + poly_mix[9] * x34; - FpExt x792 = x791 + poly_mix[10] * x38; - FpExt x793 = x782 + x88 * x792 * poly_mix[261]; - Fp x794 = x46 - x7; - Fp x795 = x50 - x51; - Fp x796 = x33 - x37; - FpExt x797 = arg4 + poly_mix[0] * x794; - FpExt x798 = x797 + poly_mix[1] * x210; - FpExt x799 = x798 + poly_mix[2] * x217; - Fp x800 = x795 * x148; - Fp x801 = arg0[98]; - Fp x802 = x800 - x801; - FpExt x803 = x799 + poly_mix[3] * x802; - Fp x804 = x147 * x795; - FpExt x805 = x803 + poly_mix[4] * x804; - Fp x806 = x147 * x148; - FpExt x807 = x805 + poly_mix[5] * x806; - FpExt x808 = x807 + poly_mix[6] * x166; - Fp x809 = x796 * x35; - Fp x810 = x809 - x197; - FpExt x811 = x808 + poly_mix[7] * x810; - Fp x812 = x31 * x796; - FpExt x813 = x811 + poly_mix[8] * x812; - Fp x814 = x31 * x35; - FpExt x815 = x813 + poly_mix[9] * x814; - Fp x816 = x147 * x31; - Fp x817 = x816 - x39; - FpExt x818 = x815 + poly_mix[10] * x817; - FpExt x819 = x818 + poly_mix[11] * x47; - FpExt x820 = x819 + poly_mix[12] * x48; - FpExt x821 = x820 + poly_mix[13] * x30; - FpExt x822 = x821 + poly_mix[14] * x34; - FpExt x823 = x822 + poly_mix[15] * x38; - FpExt x824 = x793 + x44 * x823 * poly_mix[271]; - Fp x825 = x210 - x29; - FpExt x826 = x797 + poly_mix[1] * x825; - FpExt x827 = x826 + poly_mix[2] * x217; - FpExt x828 = x827 + poly_mix[3] * x802; - FpExt x829 = x828 + poly_mix[4] * x804; - FpExt x830 = x829 + poly_mix[5] * x806; - FpExt x831 = x830 + poly_mix[6] * x166; - FpExt x832 = x831 + poly_mix[7] * x810; - FpExt x833 = x832 + poly_mix[8] * x812; - FpExt x834 = x833 + poly_mix[9] * x814; - FpExt x835 = x834 + poly_mix[10] * x817; - FpExt x836 = x835 + poly_mix[11] * x47; - FpExt x837 = x836 + poly_mix[12] * x48; - FpExt x838 = x837 + poly_mix[13] * x30; - FpExt x839 = x838 + poly_mix[14] * x34; - FpExt x840 = x839 + poly_mix[15] * x38; - FpExt x841 = x824 + x45 * x840 * poly_mix[273]; - FpExt x842 = x797 + poly_mix[1] * x461; - FpExt x843 = x842 + poly_mix[2] * x215; - FpExt x844 = x843 + poly_mix[3] * x217; - FpExt x845 = x844 + poly_mix[4] * x219; - FpExt x846 = x845 + poly_mix[5] * x221; - FpExt x847 = x846 + poly_mix[6] * x223; - FpExt x848 = x847 + poly_mix[7] * x164; - FpExt x849 = x848 + poly_mix[8] * x166; - FpExt x850 = x849 + poly_mix[9] * x168; - FpExt x851 = x850 + poly_mix[10] * x173; - FpExt x852 = x851 + poly_mix[11] * x175; - FpExt x853 = x852 + poly_mix[12] * x177; - FpExt x854 = x853 + poly_mix[13] * x182; - FpExt x855 = x854 + poly_mix[14] * x184; - FpExt x856 = x855 + poly_mix[15] * x186; - FpExt x857 = x856 + poly_mix[16] * x191; - FpExt x858 = x857 + poly_mix[17] * x201; - FpExt x859 = x858 + poly_mix[18] * x207; - FpExt x860 = x841 + x49 * x859 * poly_mix[281]; - Fp x861 = x299 - x289; - Fp x862 = x861 * x52; - Fp x863 = x299 - x288; - Fp x864 = x863 * x53; - Fp x865 = x288 * x86; - Fp x866 = x66 * x87; - Fp x867 = x296 * x88; - Fp x868 = x862 + x864; - Fp x869 = x868 + x865; - Fp x870 = x869 + x866; - Fp x871 = x870 + x867; - Fp x872 = x365 - x358; - Fp x873 = x872 * x52; - Fp x874 = x365 - x357; - Fp x875 = x874 * x53; - Fp x876 = x357 * x86; - Fp x877 = x873 + x875; - Fp x878 = x877 + x876; - Fp x879 = arg0[99]; - Fp x880 = x879 + x460; - Fp x881 = x62 * x880; - Fp x882 = x29 - x62; - Fp x883 = arg0[100]; - Fp x884 = x882 * x883; - Fp x885 = x881 + x884; - Fp x886 = x885 * x44; - Fp x887 = x882 * x880; - Fp x888 = x29 - x882; - Fp x889 = x888 * x883; - Fp x890 = x887 + x889; - Fp x891 = x890 * x45; - Fp x892 = x66 * x880; - Fp x893 = x29 - x66; - Fp x894 = x893 * x883; - Fp x895 = x892 + x894; - Fp x896 = x895 * x49; - Fp x897 = arg0[101]; - Fp x898 = x897 + x886; - Fp x899 = x898 + x891; - Fp x900 = x899 + x896; - Fp x901 = arg0[102]; - Fp x902 = x901 + x364; - Fp x903 = x62 * x902; - Fp x904 = x882 * x901; - Fp x905 = x903 + x904; - Fp x906 = x905 * x44; - Fp x907 = x882 * x902; - Fp x908 = x888 * x901; - Fp x909 = x907 + x908; - Fp x910 = x909 * x45; - Fp x911 = x66 * x902; - Fp x912 = x893 * x901; - Fp x913 = x911 + x912; - Fp x914 = x913 * x49; - Fp x915 = arg0[103]; - Fp x916 = x915 + x906; - Fp x917 = x916 + x910; - Fp x918 = x917 + x914; - FpExt x919 = x860 + poly_mix[300] * x372; - FpExt x920 = x919 + poly_mix[301] * x375; - Fp x921 = x871 - x378; - FpExt x922 = x920 + poly_mix[302] * x921; - Fp x923 = x878 + x122; - FpExt x924 = x922 + poly_mix[303] * x382; - FpExt x925 = x924 + poly_mix[304] * x385; - Fp x926 = x923 - x388; - FpExt x927 = x925 + poly_mix[305] * x926; - FpExt x928 = x927 + poly_mix[306] * x391; - FpExt x929 = x928 + poly_mix[307] * x394; - Fp x930 = x900 - x397; - FpExt x931 = x929 + poly_mix[308] * x930; - Fp x932 = x918 + x128; - FpExt x933 = x931 + poly_mix[309] * x403; - FpExt x934 = x933 + poly_mix[310] * x406; - Fp x935 = x932 - x409; - FpExt x936 = x934 + poly_mix[311] * x935; - FpExt x937 = x936 + poly_mix[312] * x413; - FpExt x938 = x937 + poly_mix[313] * x417; - FpExt x939 = x938 + poly_mix[314] * x419; - FpExt x940 = x939 + poly_mix[315] * x421; - Fp x941 = arg0[104]; - Fp x942 = x412 * x941; - Fp x943 = x942 * x415; - Fp x944 = x29 - x942; - Fp x945 = x944 * x19; - Fp x946 = x428 + x945; - Fp x947 = x946 + x943; - Fp x948 = x947 - x135; - FpExt x949 = x940 + poly_mix[316] * x948; - FpExt x950 = x949 + poly_mix[317] * x433; - FpExt x951 = x950 + poly_mix[318] * x435; - FpExt x952 = x951 + poly_mix[319] * x8; - FpExt x953 = x952 + poly_mix[320] * x8; - FpExt x954 = x953 + poly_mix[321] * x439; - FpExt x955 = x954 + poly_mix[322] * x442; - FpExt x956 = x955 + poly_mix[323] * x444; - FpExt x957 = x956 + poly_mix[324] * x446; - FpExt x958 = x957 + poly_mix[325] * x448; - FpExt x959 = x450 + x149 * x958 * poly_mix[327]; - Fp x960 = x87 + x88; - Fp x961 = x960 + x44; - Fp x962 = x961 + x45; - Fp x963 = arg0[105]; - Fp x964 = arg0[106]; - Fp x965 = x963 + x964; - Fp x966 = arg0[107]; - Fp x967 = arg0[108]; - Fp x968 = x966 + x967; - Fp x969 = x879 * x49; - Fp x970 = x210 * x13; - Fp x971 = arg0[109]; - Fp x972 = x971 + x970; - Fp x973 = x150 * x14; - Fp x974 = x972 + x973; - Fp x975 = x974 + x455; - Fp x976 = arg0[110]; - Fp x977 = x975 + x976; - Fp x978 = arg0[111]; - Fp x979 = x977 + x978; - Fp x980 = x151 * x6; - Fp x981 = arg0[112]; - Fp x982 = x980 + x981; - Fp x983 = x982 + x152; - Fp x984 = x210 - x5; - FpExt x985 = x797 + poly_mix[1] * x984; - FpExt x986 = x985 + poly_mix[2] * x215; - FpExt x987 = x986 + poly_mix[3] * x217; - FpExt x988 = x987 + poly_mix[4] * x219; - FpExt x989 = x988 + poly_mix[5] * x221; - FpExt x990 = x989 + poly_mix[6] * x223; - FpExt x991 = x990 + poly_mix[7] * x164; - FpExt x992 = x991 + poly_mix[8] * x166; - FpExt x993 = x992 + poly_mix[9] * x168; - FpExt x994 = x993 + poly_mix[10] * x173; - FpExt x995 = x994 + poly_mix[11] * x175; - FpExt x996 = x995 + poly_mix[12] * x177; - FpExt x997 = x996 + poly_mix[13] * x182; - FpExt x998 = x997 + poly_mix[14] * x184; - FpExt x999 = x998 + poly_mix[15] * x186; - FpExt x1000 = x999 + poly_mix[16] * x191; - FpExt x1001 = x1000 + poly_mix[17] * x201; - FpExt x1002 = x1001 + poly_mix[18] * x207; - FpExt x1003 = arg6 + x52 * x1002 * poly_mix[59]; - FpExt x1004 = x797 + poly_mix[1] * x602; - FpExt x1005 = x1004 + poly_mix[2] * x215; - FpExt x1006 = x1005 + poly_mix[3] * x217; - FpExt x1007 = x1006 + poly_mix[4] * x219; - FpExt x1008 = x1007 + poly_mix[5] * x221; - FpExt x1009 = x1008 + poly_mix[6] * x223; - FpExt x1010 = x1009 + poly_mix[7] * x164; - FpExt x1011 = x1010 + poly_mix[8] * x30; - FpExt x1012 = x1011 + poly_mix[9] * x34; - FpExt x1013 = x1012 + poly_mix[10] * x38; - FpExt x1014 = x1003 + x53 * x1013 * poly_mix[78]; - FpExt x1015 = x797 + poly_mix[1] * x678; - FpExt x1016 = x1015 + poly_mix[2] * x215; - FpExt x1017 = x1016 + poly_mix[3] * x217; - FpExt x1018 = x1017 + poly_mix[4] * x219; - FpExt x1019 = x1018 + poly_mix[5] * x221; - FpExt x1020 = x1019 + poly_mix[6] * x223; - FpExt x1021 = x1020 + poly_mix[7] * x164; - FpExt x1022 = x1021 + poly_mix[8] * x30; - FpExt x1023 = x1022 + poly_mix[9] * x34; - FpExt x1024 = x1023 + poly_mix[10] * x38; - FpExt x1025 = x1014 + x86 * x1024 * poly_mix[89]; - Fp x1026 = x46 - x4; - FpExt x1027 = arg4 + poly_mix[0] * x1026; - FpExt x1028 = x1027 + poly_mix[1] * x47; - FpExt x1029 = x1028 + poly_mix[2] * x48; - FpExt x1030 = x1029 + poly_mix[3] * x30; - FpExt x1031 = x1030 + poly_mix[4] * x34; - FpExt x1032 = x1031 + poly_mix[5] * x38; - FpExt x1033 = x1025 + x87 * x1032 * poly_mix[100]; - Fp x1034 = x46 - x3; - FpExt x1035 = arg4 + poly_mix[0] * x1034; - FpExt x1036 = x1035 + poly_mix[1] * x210; - FpExt x1037 = x1036 + poly_mix[2] * x47; - FpExt x1038 = x1037 + poly_mix[3] * x48; - FpExt x1039 = x1038 + poly_mix[4] * x30; - FpExt x1040 = x1039 + poly_mix[5] * x34; - FpExt x1041 = x1040 + poly_mix[6] * x38; - FpExt x1042 = x1033 + x88 * x1041 * poly_mix[106]; - Fp x1043 = x46 - x2; - FpExt x1044 = arg4 + poly_mix[0] * x1043; - FpExt x1045 = x1044 + poly_mix[1] * x47; - FpExt x1046 = x1045 + poly_mix[2] * x48; - FpExt x1047 = x1046 + poly_mix[3] * x30; - FpExt x1048 = x1047 + poly_mix[4] * x34; - FpExt x1049 = x1048 + poly_mix[5] * x38; - FpExt x1050 = x1042 + x44 * x1049 * poly_mix[113]; - Fp x1051 = x46 - x1; - FpExt x1052 = arg4 + poly_mix[0] * x1051; - FpExt x1053 = x1052 + poly_mix[1] * x47; - FpExt x1054 = x1053 + poly_mix[2] * x48; - FpExt x1055 = x1054 + poly_mix[3] * x30; - FpExt x1056 = x1055 + poly_mix[4] * x34; - FpExt x1057 = x1056 + poly_mix[5] * x38; - FpExt x1058 = x1050 + x45 * x1057 * poly_mix[119]; - Fp x1059 = x46 - x0; - FpExt x1060 = arg4 + poly_mix[0] * x1059; - FpExt x1061 = x1060 + poly_mix[1] * x210; - FpExt x1062 = x1061 + poly_mix[2] * x213; - FpExt x1063 = x1062 + poly_mix[3] * x47; - FpExt x1064 = x1063 + poly_mix[4] * x48; - FpExt x1065 = x1064 + poly_mix[5] * x30; - FpExt x1066 = x1065 + poly_mix[6] * x34; - FpExt x1067 = x1066 + poly_mix[7] * x38; - FpExt x1068 = x1058 + x49 * x1067 * poly_mix[125]; - Fp x1069 = arg0[113]; - Fp x1070 = x1069 * x44; - Fp x1071 = x879 + x1069; - Fp x1072 = x1071 * x45; - Fp x1073 = x965 + x1070; - Fp x1074 = x1073 + x1072; - Fp x1075 = x153 * x44; - Fp x1076 = x901 + x153; - Fp x1077 = x1076 * x45; - Fp x1078 = x968 + x1075; - Fp x1079 = x1078 + x1077; - Fp x1080 = x893 * x880; - Fp x1081 = x29 - x893; - Fp x1082 = x1081 * x883; - Fp x1083 = x1080 + x1082; - Fp x1084 = x1083 * x52; - Fp x1085 = x296 * x880; - Fp x1086 = x29 - x296; - Fp x1087 = x1086 * x883; - Fp x1088 = x1085 + x1087; - Fp x1089 = x1088 * x53; - Fp x1090 = x1086 * x880; - Fp x1091 = x29 - x1086; - Fp x1092 = x1091 * x883; - Fp x1093 = x1090 + x1092; - Fp x1094 = x1093 * x86; - Fp x1095 = x879 + x979; - Fp x1096 = x1095 * x87; - Fp x1097 = x299 * x88; - Fp x1098 = x1084 + x1089; - Fp x1099 = x1098 + x1094; - Fp x1100 = x1099 + x1096; - Fp x1101 = x1100 + x1097; - Fp x1102 = arg0[114]; - Fp x1103 = x1101 + x1102; - Fp x1104 = arg0[115]; - Fp x1105 = x1103 + x1104; - Fp x1106 = x1105 + x969; - Fp x1107 = x893 * x902; - Fp x1108 = x1081 * x901; - Fp x1109 = x1107 + x1108; - Fp x1110 = x1109 * x52; - Fp x1111 = x296 * x902; - Fp x1112 = x1086 * x901; - Fp x1113 = x1111 + x1112; - Fp x1114 = x1113 * x53; - Fp x1115 = x1086 * x902; - Fp x1116 = x1091 * x901; - Fp x1117 = x1115 + x1116; - Fp x1118 = x1117 * x86; - Fp x1119 = x901 + x983; - Fp x1120 = x1119 * x87; - Fp x1121 = x365 * x88; - Fp x1122 = x1110 + x1114; - Fp x1123 = x1122 + x1118; - Fp x1124 = x1123 + x1120; - Fp x1125 = x1124 + x1121; - Fp x1126 = arg0[116]; - Fp x1127 = x1125 + x1126; - Fp x1128 = arg0[117]; - Fp x1129 = x1127 + x1128; - Fp x1130 = arg0[118]; - Fp x1131 = x1129 + x1130; - FpExt x1132 = x1068 + poly_mix[133] * x372; - FpExt x1133 = x1132 + poly_mix[134] * x375; - Fp x1134 = x1074 - x378; - FpExt x1135 = x1133 + poly_mix[135] * x1134; - Fp x1136 = x1079 + x122; - FpExt x1137 = x1135 + poly_mix[136] * x382; - FpExt x1138 = x1137 + poly_mix[137] * x385; - Fp x1139 = x1136 - x388; - FpExt x1140 = x1138 + poly_mix[138] * x1139; - FpExt x1141 = x1140 + poly_mix[139] * x391; - FpExt x1142 = x1141 + poly_mix[140] * x394; - Fp x1143 = x1106 - x397; - FpExt x1144 = x1142 + poly_mix[141] * x1143; - Fp x1145 = x1131 + x128; - FpExt x1146 = x1144 + poly_mix[142] * x403; - FpExt x1147 = x1146 + poly_mix[143] * x406; - Fp x1148 = x1145 - x409; - FpExt x1149 = x1147 + poly_mix[144] * x1148; - FpExt x1150 = x1149 + poly_mix[145] * x413; - FpExt x1151 = x1150 + poly_mix[146] * x417; - FpExt x1152 = x1151 + poly_mix[147] * x419; - FpExt x1153 = x1152 + poly_mix[148] * x421; - Fp x1154 = x412 * x962; - Fp x1155 = x1154 * x415; - Fp x1156 = x29 - x1154; - Fp x1157 = x1156 * x19; - Fp x1158 = x428 + x1157; - Fp x1159 = x1158 + x1155; - Fp x1160 = x1159 - x135; - FpExt x1161 = x1153 + poly_mix[149] * x1160; - FpExt x1162 = x1161 + poly_mix[150] * x433; - FpExt x1163 = x1162 + poly_mix[151] * x435; - FpExt x1164 = x1163 + poly_mix[152] * x8; - FpExt x1165 = x1164 + poly_mix[153] * x8; - FpExt x1166 = x1165 + poly_mix[154] * x439; - FpExt x1167 = x1166 + poly_mix[155] * x442; - FpExt x1168 = x1167 + poly_mix[156] * x444; - FpExt x1169 = x1168 + poly_mix[157] * x446; - FpExt x1170 = x1169 + poly_mix[158] * x448; - FpExt x1171 = x959 + x154 * x1170 * poly_mix[380]; - Fp x1172 = x26 - x155; - Fp x1173 = arg0[119]; - Fp x1174 = x1173 * x1172; - Fp x1175 = x25 - x155; - Fp x1176 = x1174 * x1175; - arg0[158] = x1176; - FpExt x1177 = arg7 + poly_mix[2] * x1176; - Fp x1178 = x156 - x29; - FpExt x1179 = x1177 + poly_mix[3] * x1178; - Fp x1180 = arg0[120]; - Fp x1181 = x157 - x1180; - FpExt x1182 = x1179 + poly_mix[4] * x1181; - Fp x1183 = x29 - x158; - arg0[215] = x1183; - Fp x1184 = x158 * x1183; - arg0[159] = x1184; - FpExt x1185 = x1182 + poly_mix[5] * x1184; - Fp x1186 = x901 * x159; - Fp x1187 = x1186 - x1183; - FpExt x1188 = x1185 + poly_mix[6] * x1187; - Fp x1189 = x158 * x901; - FpExt x1190 = x1188 + poly_mix[7] * x1189; - Fp x1191 = x158 * x159; - FpExt x1192 = x1190 + poly_mix[8] * x1191; - FpExt x1193 = x1192 + poly_mix[9] * x158; - Fp x1194 = x160 - x29; - arg0[332] = x1194; - FpExt x1195 = x1193 + poly_mix[10] * x1194; - Fp x1196 = x161 * x23; - Fp x1197 = x1196 + x155; - Fp x1198 = x1197 - x879; - FpExt x1199 = x1195 + poly_mix[11] * x1198; - Fp x1200 = arg0[121]; - Fp x1201 = x1200 + x161; - arg0[123] = x1201; - auto x1202 = rv32im_v2_11( - idx, size, x1199, arg0, arg4, x1171, arg7, arg8, arg9, arg10, arg11, arg12, arg13); - - return x1202; -} -__device__ FpExt rv32im_v2_8(uint32_t idx, - uint32_t size, - Fp* arg0, - FpExt arg1, - FpExt arg2, - FpExt arg3, - FpExt arg4, - FpExt arg5, - FpExt arg6, - FpExt arg7, - FpExt* arg8, - FpExt arg9, - const Fp* arg10, - const Fp* arg11, - const Fp* arg12, - const Fp* arg13) { - uint32_t mask = size - 1; - Fp x0(1073725483); - Fp x1(1073725482); - Fp x2(1073725457); - Fp x3(256); - Fp x4(16); - Fp x5(15); - Fp x6(14); - Fp x7(13); - Fp x8(12); - Fp x9(11); - Fp x10(10); - Fp x11(9); - Fp x12(8); - Fp x13(7); - Fp x14(6); - Fp x15(5); - Fp x16(3); - Fp x17(1797558858); - Fp x18(32); - Fp x19(1073725591); - Fp x20(1073725590); - Fp x21(1073725589); - Fp x22(1073725588); - Fp x23(1073725587); - Fp x24(1073725586); - Fp x25(1073725585); - Fp x26(1073725584); - Fp x27(65536); - Fp x28(12320); - Fp x29(1073725568); - Fp x30(1073726464); - Fp x31(128); - Fp x32(1073725489); - Fp x33(115); - Fp x34(4); - Fp x35(49151); - Fp x36(65535); - Fp x37(2); - Fp x38(1); - Fp x39(1073725599); - Fp x40(1073725598); - Fp x41(0); - Fp x42 = arg10[73 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x43 = arg13[10]; - Fp x44 = arg10[74 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x45 = arg13[11]; - Fp x46 = arg10[76 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x47 = arg10[0 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x48 = arg10[77 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x49 = arg10[104 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x50 = arg10[81 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x51 = arg13[12]; - Fp x52 = arg10[82 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x53 = arg13[13]; - Fp x54 = arg10[84 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x55 = arg10[85 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x56 = arg10[105 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x57 = arg10[106 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x58 = arg10[89 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x59 = arg13[14]; - Fp x60 = arg10[90 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x61 = arg13[15]; - Fp x62 = arg10[107 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x63 = arg10[109 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x64 = arg10[111 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x65 = arg10[113 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x66 = arg10[115 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x67 = arg10[117 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x68 = arg10[119 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x69 = arg10[121 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x70 = arg10[123 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x71 = arg10[125 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x72 = arg10[127 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x73 = arg10[129 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x74 = arg10[131 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x75 = arg10[133 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x76 = arg10[135 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x77 = arg10[137 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x78 = arg10[139 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x79 = arg10[141 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x80 = arg10[143 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x81 = arg10[145 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x82 = arg10[147 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x83 = arg10[149 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x84 = arg10[151 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x85 = arg10[153 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x86 = arg10[155 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x87 = arg10[157 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x88 = arg10[159 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x89 = arg10[161 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x90 = arg10[163 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x91 = arg10[165 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x92 = arg10[167 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x93 = arg10[169 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x94 = arg10[20 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x95 = arg10[171 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x96 = arg10[173 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x97 = arg10[172 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x98 = arg10[108 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x99 = arg10[175 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x100 = arg10[174 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x101 = arg10[110 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x102 = arg10[28 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x103 = arg10[34 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x104 = arg10[33 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x105 = arg10[36 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x106 = arg10[42 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x107 = arg10[41 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x108 = arg10[112 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x109 = arg10[44 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x110 = arg10[52 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x111 = arg10[57 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x112 = arg10[58 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x113 = arg10[59 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x114 = arg10[64 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x115 = arg10[67 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x116 = arg10[72 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x117 = arg10[75 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x118 = arg10[80 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x119 = arg10[83 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x120 = arg10[88 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x121 = arg10[99 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x122 = arg10[101 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x123 = arg10[103 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x124 = arg10[21 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x125 = arg10[176 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x126 = arg10[177 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x127 = arg10[114 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x128 = arg10[43 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x129 = arg10[48 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x130 = arg10[51 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x131 = arg10[56 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x132 = arg10[95 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x133 = arg10[97 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x134 = arg10[22 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x135 = arg10[60 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x136 = arg10[68 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x137 = arg13[17]; - Fp x138 = arg13[18]; - Fp x139 = arg13[19]; - Fp x140 = arg13[20]; - Fp x141 = arg10[49 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x142 = arg13[21]; - Fp x143 = arg10[50 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x144 = arg13[22]; - Fp x145 = arg13[23]; - Fp x146 = arg13[24]; - Fp x147 = arg10[65 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x148 = arg13[25]; - Fp x149 = arg10[66 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x150 = arg13[26]; - Fp x151 = arg13[27]; - Fp x152 = arg13[28]; - Fp x153 = arg13[29]; - Fp x154 = arg13[30]; - Fp x155 = arg13[31]; - Fp x156 = arg13[32]; - Fp x157 = arg13[16]; - Fp x158 = arg13[70]; - Fp x159 = arg13[69]; - Fp x160 = arg13[72]; - Fp x161 = arg13[71]; - Fp x162 = arg10[23 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x163 = arg10[30 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x164 = arg13[53]; - Fp x165 = arg10[31 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x166 = arg13[54]; - Fp x167 = arg10[38 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x168 = arg13[55]; - Fp x169 = arg10[39 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x170 = arg13[56]; - Fp x171 = arg10[46 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x172 = arg13[57]; - Fp x173 = arg10[47 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x174 = arg13[58]; - Fp x175 = arg10[54 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x176 = arg13[59]; - Fp x177 = arg10[55 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x178 = arg13[60]; - Fp x179 = arg10[62 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x180 = arg13[61]; - Fp x181 = arg10[63 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x182 = arg13[62]; - Fp x183 = arg10[70 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x184 = arg13[63]; - Fp x185 = arg10[71 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x186 = arg13[64]; - Fp x187 = arg10[78 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x188 = arg13[65]; - Fp x189 = arg10[79 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x190 = arg13[66]; - Fp x191 = arg10[86 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x192 = arg13[67]; - Fp x193 = arg10[87 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x194 = arg13[68]; - Fp x195 = arg10[24 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x196 = arg10[116 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x197 = arg10[118 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x198 = arg10[120 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x199 = arg10[122 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x200 = arg10[124 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x201 = arg10[126 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x202 = arg10[128 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x203 = arg10[130 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x204 = arg10[132 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x205 = arg10[134 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x206 = arg10[136 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x207 = arg10[138 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x208 = arg10[140 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x209 = arg10[142 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x210 = arg10[144 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x211 = arg10[146 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x212 = arg10[148 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x213 = arg10[150 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x214 = arg10[152 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x215 = arg10[154 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x216 = arg10[156 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x217 = arg10[158 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x218 = arg10[160 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x219 = arg10[162 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x220 = arg10[164 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x221 = arg10[166 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x222 = arg10[168 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x223 = arg10[170 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x224 = arg10[27 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x225 = arg10[32 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x226 = arg10[35 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x227 = arg10[40 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x228 = arg10[91 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x229 = arg10[93 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x230 = arg10[25 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x231 = arg10[26 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x232 = arg10[8 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x233 = arg10[69 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x234 = arg10[19 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x235 = arg0[244]; - FpExt x236 = arg1 + poly_mix[51] * x235; - Fp x237 = x42 - x43; - FpExt x238 = x236 + poly_mix[52] * x237; - Fp x239 = x44 - x45; - FpExt x240 = x238 + poly_mix[53] * x239; - Fp x241 = arg0[245]; - FpExt x242 = x240 + poly_mix[54] * x241; - Fp x243 = arg0[240]; - FpExt x244 = x242 + poly_mix[55] * x243; - FpExt x245 = x244 + poly_mix[56] * x41; - FpExt x246 = x245 + poly_mix[57] * x41; - Fp x247 = x46 - x40; - FpExt x248 = x246 + poly_mix[58] * x247; - Fp x249 = x47 - x48; - Fp x250 = arg0[230]; - FpExt x251 = x248 + poly_mix[59] * x250; - Fp x252 = x49 - x249; - FpExt x253 = x251 + poly_mix[60] * x252; - Fp x254 = x50 - x51; - FpExt x255 = x253 + poly_mix[61] * x254; - Fp x256 = x52 - x53; - FpExt x257 = x255 + poly_mix[62] * x256; - Fp x258 = arg0[246]; - FpExt x259 = x257 + poly_mix[63] * x258; - Fp x260 = arg0[247]; - FpExt x261 = x259 + poly_mix[64] * x260; - FpExt x262 = x261 + poly_mix[65] * x41; - FpExt x263 = x262 + poly_mix[66] * x41; - Fp x264 = x54 - x39; - FpExt x265 = x263 + poly_mix[67] * x264; - Fp x266 = x47 - x55; - Fp x267 = x56 - x38; - FpExt x268 = x265 + poly_mix[68] * x267; - Fp x269 = x57 - x266; - FpExt x270 = x268 + poly_mix[69] * x269; - Fp x271 = x58 - x59; - FpExt x272 = x270 + poly_mix[70] * x271; - Fp x273 = x60 - x61; - FpExt x274 = x272 + poly_mix[71] * x273; - Fp x275 = arg0[241]; - FpExt x276 = arg2 + x275 * x274 * poly_mix[41]; - FpExt x277 = x276 + poly_mix[113] * x62; - FpExt x278 = x277 + poly_mix[114] * x63; - FpExt x279 = x278 + poly_mix[115] * x64; - FpExt x280 = x279 + poly_mix[116] * x65; - FpExt x281 = x280 + poly_mix[117] * x66; - FpExt x282 = x281 + poly_mix[118] * x67; - FpExt x283 = x282 + poly_mix[119] * x68; - FpExt x284 = x283 + poly_mix[120] * x69; - FpExt x285 = x284 + poly_mix[121] * x70; - FpExt x286 = x285 + poly_mix[122] * x71; - FpExt x287 = x286 + poly_mix[123] * x72; - FpExt x288 = x287 + poly_mix[124] * x73; - FpExt x289 = x288 + poly_mix[125] * x74; - FpExt x290 = x289 + poly_mix[126] * x75; - FpExt x291 = x290 + poly_mix[127] * x76; - FpExt x292 = x291 + poly_mix[128] * x77; - FpExt x293 = x292 + poly_mix[129] * x78; - FpExt x294 = x293 + poly_mix[130] * x79; - FpExt x295 = x294 + poly_mix[131] * x80; - FpExt x296 = x295 + poly_mix[132] * x81; - FpExt x297 = x296 + poly_mix[133] * x82; - FpExt x298 = x297 + poly_mix[134] * x83; - FpExt x299 = x298 + poly_mix[135] * x84; - FpExt x300 = x299 + poly_mix[136] * x85; - FpExt x301 = x300 + poly_mix[137] * x86; - FpExt x302 = x301 + poly_mix[138] * x87; - FpExt x303 = x302 + poly_mix[139] * x88; - FpExt x304 = x303 + poly_mix[140] * x89; - FpExt x305 = x304 + poly_mix[141] * x90; - FpExt x306 = x305 + poly_mix[142] * x91; - FpExt x307 = x306 + poly_mix[143] * x92; - FpExt x308 = x307 + poly_mix[144] * x93; - FpExt x309 = arg3 + x94 * x308 * poly_mix[114]; - Fp x310 = arg0[238]; - Fp x311 = x310 - x95; - FpExt x312 = arg4 + poly_mix[0] * x311; - Fp x313 = arg0[81]; - FpExt x314 = x312 + poly_mix[1] * x313; - Fp x315 = arg0[82]; - FpExt x316 = x314 + poly_mix[2] * x315; - Fp x317 = x96 * x37; - Fp x318 = x317 + x97; - Fp x319 = x95 * x36; - Fp x320 = x275 * x35; - Fp x321 = x319 + x320; - Fp x322 = arg0[102]; - Fp x323 = x321 - x322; - Fp x324 = arg0[248]; - FpExt x325 = x316 + poly_mix[3] * x324; - Fp x326 = x98 - x323; - FpExt x327 = x325 + poly_mix[4] * x326; - Fp x328 = arg0[83]; - FpExt x329 = x327 + poly_mix[5] * x328; - Fp x330 = x322 * x99; - Fp x331 = arg0[249]; - Fp x332 = x330 - x331; - FpExt x333 = x329 + poly_mix[6] * x332; - Fp x334 = x100 * x322; - FpExt x335 = x333 + poly_mix[7] * x334; - Fp x336 = x100 * x99; - FpExt x337 = x335 + poly_mix[8] * x336; - FpExt x338 = x337 + poly_mix[9] * x100; - Fp x339 = x63 - x38; - FpExt x340 = x338 + poly_mix[10] * x339; - Fp x341 = x101 * x34; - Fp x342 = x341 + x318; - Fp x343 = arg0[99]; - Fp x344 = x342 - x343; - FpExt x345 = x340 + poly_mix[11] * x344; - Fp x346 = arg0[121]; - Fp x347 = x346 + x101; - FpExt x348 = x345 + poly_mix[12] * x318; - Fp x349 = arg0[250]; - FpExt x350 = x348 + poly_mix[13] * x349; - Fp x351 = arg0[251]; - FpExt x352 = x350 + poly_mix[14] * x351; - FpExt x353 = x352 + poly_mix[15] * x41; - FpExt x354 = x353 + poly_mix[16] * x41; - Fp x355 = x102 - x347; - FpExt x356 = x354 + poly_mix[17] * x355; - Fp x357 = arg0[252]; - FpExt x358 = x356 + poly_mix[18] * x357; - Fp x359 = arg0[253]; - FpExt x360 = x358 + poly_mix[19] * x359; - Fp x361 = arg0[229]; - FpExt x362 = x360 + poly_mix[20] * x361; - Fp x363 = arg0[254]; - FpExt x364 = x362 + poly_mix[21] * x363; - FpExt x365 = x364 + poly_mix[22] * x103; - Fp x366 = x104 - x33; - FpExt x367 = x365 + poly_mix[23] * x366; - Fp x368 = arg0[255]; - FpExt x369 = x367 + poly_mix[24] * x368; - FpExt x370 = x369 + poly_mix[25] * x310; - Fp x371 = arg0[256]; - FpExt x372 = x370 + poly_mix[26] * x371; - Fp x373 = arg0[239]; - FpExt x374 = x372 + poly_mix[27] * x373; - FpExt x375 = x374 + poly_mix[28] * x41; - FpExt x376 = x375 + poly_mix[29] * x41; - Fp x377 = x105 - x32; - FpExt x378 = x376 + poly_mix[30] * x377; - Fp x379 = arg0[257]; - FpExt x380 = x378 + poly_mix[31] * x379; - Fp x381 = arg0[258]; - FpExt x382 = x380 + poly_mix[32] * x381; - Fp x383 = arg0[242]; - FpExt x384 = x382 + poly_mix[33] * x383; - Fp x385 = arg0[259]; - FpExt x386 = x384 + poly_mix[34] * x385; - FpExt x387 = x386 + poly_mix[35] * x106; - Fp x388 = x107 * x31; - Fp x389 = arg0[260]; - FpExt x390 = x387 + poly_mix[36] * x389; - Fp x391 = x108 - x388; - FpExt x392 = x390 + poly_mix[37] * x391; - Fp x393 = x107 + x30; - Fp x394 = arg0[261]; - FpExt x395 = x392 + poly_mix[38] * x394; - Fp x396 = arg0[262]; - FpExt x397 = x395 + poly_mix[39] * x396; - FpExt x398 = x397 + poly_mix[40] * x41; - FpExt x399 = x398 + poly_mix[41] * x41; - Fp x400 = x109 - x393; - FpExt x401 = x399 + poly_mix[42] * x400; - Fp x402 = arg0[263]; - FpExt x403 = x401 + poly_mix[43] * x402; - Fp x404 = arg0[264]; - FpExt x405 = x403 + poly_mix[44] * x404; - Fp x406 = arg0[265]; - FpExt x407 = x405 + poly_mix[45] * x406; - Fp x408 = arg0[266]; - FpExt x409 = x407 + poly_mix[46] * x408; - Fp x410 = arg0[267]; - FpExt x411 = x409 + poly_mix[47] * x410; - Fp x412 = arg0[268]; - FpExt x413 = x411 + poly_mix[48] * x412; - FpExt x414 = x413 + poly_mix[49] * x41; - FpExt x415 = x414 + poly_mix[50] * x41; - Fp x416 = x110 - x29; - FpExt x417 = x415 + poly_mix[51] * x416; - Fp x418 = arg0[213]; - FpExt x419 = x417 + poly_mix[52] * x418; - Fp x420 = arg0[269]; - FpExt x421 = x419 + poly_mix[53] * x420; - Fp x422 = x111 - x343; - FpExt x423 = x421 + poly_mix[54] * x422; - Fp x424 = x112 - x322; - FpExt x425 = x423 + poly_mix[55] * x424; - FpExt x426 = x425 + poly_mix[56] * x113; - FpExt x427 = x426 + poly_mix[57] * x114; - FpExt x428 = x427 + poly_mix[58] * x115; - FpExt x429 = x428 + poly_mix[59] * x116; - FpExt x430 = x429 + poly_mix[60] * x117; - FpExt x431 = x430 + poly_mix[61] * x118; - FpExt x432 = x431 + poly_mix[62] * x119; - FpExt x433 = x432 + poly_mix[63] * x120; - FpExt x434 = x433 + poly_mix[64] * x121; - FpExt x435 = x434 + poly_mix[65] * x122; - FpExt x436 = x435 + poly_mix[66] * x123; - FpExt x437 = x436 + poly_mix[67] * x56; - FpExt x438 = x437 + poly_mix[68] * x65; - FpExt x439 = x438 + poly_mix[69] * x66; - FpExt x440 = x439 + poly_mix[70] * x67; - FpExt x441 = x440 + poly_mix[71] * x68; - FpExt x442 = x441 + poly_mix[72] * x69; - FpExt x443 = x442 + poly_mix[73] * x70; - FpExt x444 = x443 + poly_mix[74] * x71; - FpExt x445 = x444 + poly_mix[75] * x72; - FpExt x446 = x445 + poly_mix[76] * x73; - FpExt x447 = x446 + poly_mix[77] * x74; - FpExt x448 = x447 + poly_mix[78] * x75; - FpExt x449 = x448 + poly_mix[79] * x76; - FpExt x450 = x449 + poly_mix[80] * x77; - FpExt x451 = x450 + poly_mix[81] * x78; - FpExt x452 = x451 + poly_mix[82] * x79; - FpExt x453 = x452 + poly_mix[83] * x80; - FpExt x454 = x453 + poly_mix[84] * x81; - FpExt x455 = x454 + poly_mix[85] * x82; - FpExt x456 = x455 + poly_mix[86] * x83; - FpExt x457 = x456 + poly_mix[87] * x84; - FpExt x458 = x457 + poly_mix[88] * x85; - FpExt x459 = x458 + poly_mix[89] * x86; - FpExt x460 = x459 + poly_mix[90] * x87; - FpExt x461 = x460 + poly_mix[91] * x88; - FpExt x462 = x461 + poly_mix[92] * x89; - FpExt x463 = x462 + poly_mix[93] * x90; - FpExt x464 = x463 + poly_mix[94] * x91; - FpExt x465 = x464 + poly_mix[95] * x92; - FpExt x466 = x465 + poly_mix[96] * x93; - FpExt x467 = x309 + x124 * x466 * poly_mix[234]; - Fp x468 = x103 - x28; - FpExt x469 = x364 + poly_mix[22] * x468; - FpExt x470 = x469 + poly_mix[23] * x366; - FpExt x471 = x470 + poly_mix[24] * x368; - Fp x472 = arg0[270]; - FpExt x473 = x471 + poly_mix[25] * x472; - FpExt x474 = x473 + poly_mix[26] * x371; - FpExt x475 = x474 + poly_mix[27] * x373; - FpExt x476 = x475 + poly_mix[28] * x41; - FpExt x477 = x476 + poly_mix[29] * x41; - Fp x478 = x105 - x29; - FpExt x479 = x477 + poly_mix[30] * x478; - FpExt x480 = x479 + poly_mix[31] * x379; - FpExt x481 = x480 + poly_mix[32] * x381; - FpExt x482 = x481 + poly_mix[33] * x383; - FpExt x483 = x482 + poly_mix[34] * x385; - Fp x484 = x107 + x34; - FpExt x485 = x483 + poly_mix[35] * x389; - Fp x486 = arg0[85]; - FpExt x487 = x485 + poly_mix[36] * x486; - Fp x488 = x125 * x27; - Fp x489 = x488 + x108; - Fp x490 = x484 - x489; - FpExt x491 = x487 + poly_mix[37] * x490; - Fp x492 = x106 + x125; - Fp x493 = arg0[235]; - FpExt x494 = x491 + poly_mix[38] * x493; - Fp x495 = arg0[86]; - FpExt x496 = x494 + poly_mix[39] * x495; - Fp x497 = x126 * x27; - Fp x498 = x497 + x127; - Fp x499 = x492 - x498; - FpExt x500 = x496 + poly_mix[40] * x499; - FpExt x501 = x500 + poly_mix[41] * x128; - FpExt x502 = x501 + poly_mix[42] * x129; - FpExt x503 = x502 + poly_mix[43] * x130; - FpExt x504 = x503 + poly_mix[44] * x131; - FpExt x505 = x504 + poly_mix[45] * x113; - FpExt x506 = x505 + poly_mix[46] * x114; - FpExt x507 = x506 + poly_mix[47] * x115; - FpExt x508 = x507 + poly_mix[48] * x116; - FpExt x509 = x508 + poly_mix[49] * x117; - FpExt x510 = x509 + poly_mix[50] * x118; - FpExt x511 = x510 + poly_mix[51] * x119; - FpExt x512 = x511 + poly_mix[52] * x120; - FpExt x513 = x512 + poly_mix[53] * x132; - FpExt x514 = x513 + poly_mix[54] * x133; - FpExt x515 = x514 + poly_mix[55] * x121; - FpExt x516 = x515 + poly_mix[56] * x122; - FpExt x517 = x516 + poly_mix[57] * x123; - FpExt x518 = x517 + poly_mix[58] * x56; - FpExt x519 = x518 + poly_mix[59] * x66; - FpExt x520 = x519 + poly_mix[60] * x67; - FpExt x521 = x520 + poly_mix[61] * x68; - FpExt x522 = x521 + poly_mix[62] * x69; - FpExt x523 = x522 + poly_mix[63] * x70; - FpExt x524 = x523 + poly_mix[64] * x71; - FpExt x525 = x524 + poly_mix[65] * x72; - FpExt x526 = x525 + poly_mix[66] * x73; - FpExt x527 = x526 + poly_mix[67] * x74; - FpExt x528 = x527 + poly_mix[68] * x75; - FpExt x529 = x528 + poly_mix[69] * x76; - FpExt x530 = x529 + poly_mix[70] * x77; - FpExt x531 = x530 + poly_mix[71] * x78; - FpExt x532 = x531 + poly_mix[72] * x79; - FpExt x533 = x532 + poly_mix[73] * x80; - FpExt x534 = x533 + poly_mix[74] * x81; - FpExt x535 = x534 + poly_mix[75] * x82; - FpExt x536 = x535 + poly_mix[76] * x83; - FpExt x537 = x536 + poly_mix[77] * x84; - FpExt x538 = x537 + poly_mix[78] * x85; - FpExt x539 = x538 + poly_mix[79] * x86; - FpExt x540 = x539 + poly_mix[80] * x87; - FpExt x541 = x540 + poly_mix[81] * x88; - FpExt x542 = x541 + poly_mix[82] * x89; - FpExt x543 = x542 + poly_mix[83] * x90; - FpExt x544 = x543 + poly_mix[84] * x91; - FpExt x545 = x544 + poly_mix[85] * x92; - FpExt x546 = x545 + poly_mix[86] * x93; - FpExt x547 = x467 + x134 * x546 * poly_mix[291]; - Fp x548 = arg0[271]; - FpExt x549 = arg4 + poly_mix[0] * x548; - FpExt x550 = x549 + poly_mix[1] * x313; - Fp x551 = arg0[272]; - Fp x552 = x551 * x96; - Fp x553 = arg0[273]; - Fp x554 = x552 - x553; - FpExt x555 = x550 + poly_mix[2] * x554; - Fp x556 = arg0[274]; - FpExt x557 = x555 + poly_mix[3] * x556; - Fp x558 = x97 * x96; - FpExt x559 = x557 + poly_mix[4] * x558; - Fp x560 = x102 - x26; - FpExt x561 = arg5 + poly_mix[4] * x560; - FpExt x562 = x561 + poly_mix[5] * x357; - FpExt x563 = x562 + poly_mix[6] * x359; - FpExt x564 = x563 + poly_mix[7] * x361; - FpExt x565 = x564 + poly_mix[8] * x363; - FpExt x566 = x565 + poly_mix[9] * x371; - FpExt x567 = x566 + poly_mix[10] * x373; - FpExt x568 = x567 + poly_mix[11] * x41; - FpExt x569 = x568 + poly_mix[12] * x41; - Fp x570 = x105 - x25; - FpExt x571 = x569 + poly_mix[13] * x570; - FpExt x572 = x571 + poly_mix[14] * x379; - FpExt x573 = x572 + poly_mix[15] * x381; - FpExt x574 = x573 + poly_mix[16] * x383; - FpExt x575 = x574 + poly_mix[17] * x385; - FpExt x576 = x575 + poly_mix[18] * x394; - FpExt x577 = x576 + poly_mix[19] * x396; - FpExt x578 = x577 + poly_mix[20] * x41; - FpExt x579 = x578 + poly_mix[21] * x41; - Fp x580 = x109 - x24; - FpExt x581 = x579 + poly_mix[22] * x580; - FpExt x582 = x581 + poly_mix[23] * x402; - FpExt x583 = x582 + poly_mix[24] * x404; - FpExt x584 = x583 + poly_mix[25] * x406; - FpExt x585 = x584 + poly_mix[26] * x408; - FpExt x586 = x585 + poly_mix[27] * x410; - FpExt x587 = x586 + poly_mix[28] * x412; - FpExt x588 = x587 + poly_mix[29] * x41; - FpExt x589 = x588 + poly_mix[30] * x41; - Fp x590 = x110 - x23; - FpExt x591 = x589 + poly_mix[31] * x590; - Fp x592 = arg0[275]; - FpExt x593 = x591 + poly_mix[32] * x592; - Fp x594 = arg0[276]; - FpExt x595 = x593 + poly_mix[33] * x594; - FpExt x596 = x595 + poly_mix[34] * x418; - FpExt x597 = x596 + poly_mix[35] * x420; - Fp x598 = arg0[277]; - FpExt x599 = x597 + poly_mix[36] * x598; - Fp x600 = arg0[278]; - FpExt x601 = x599 + poly_mix[37] * x600; - FpExt x602 = x601 + poly_mix[38] * x41; - FpExt x603 = x602 + poly_mix[39] * x41; - Fp x604 = x135 - x22; - FpExt x605 = x603 + poly_mix[40] * x604; - Fp x606 = arg0[279]; - FpExt x607 = x605 + poly_mix[41] * x606; - Fp x608 = arg0[280]; - FpExt x609 = x607 + poly_mix[42] * x608; - Fp x610 = arg0[281]; - FpExt x611 = x609 + poly_mix[43] * x610; - Fp x612 = arg0[282]; - FpExt x613 = x611 + poly_mix[44] * x612; - Fp x614 = arg0[283]; - FpExt x615 = x613 + poly_mix[45] * x614; - Fp x616 = arg0[284]; - FpExt x617 = x615 + poly_mix[46] * x616; - FpExt x618 = x617 + poly_mix[47] * x41; - FpExt x619 = x618 + poly_mix[48] * x41; - Fp x620 = x136 - x21; - FpExt x621 = x619 + poly_mix[49] * x620; - Fp x622 = arg0[285]; - FpExt x623 = x621 + poly_mix[50] * x622; - Fp x624 = arg0[286]; - FpExt x625 = x623 + poly_mix[51] * x624; - Fp x626 = arg0[243]; - FpExt x627 = x625 + poly_mix[52] * x626; - FpExt x628 = x627 + poly_mix[53] * x235; - FpExt x629 = x628 + poly_mix[54] * x241; - FpExt x630 = x629 + poly_mix[55] * x243; - FpExt x631 = x630 + poly_mix[56] * x41; - FpExt x632 = x631 + poly_mix[57] * x41; - Fp x633 = x46 - x20; - FpExt x634 = x632 + poly_mix[58] * x633; - Fp x635 = arg0[287]; - FpExt x636 = x634 + poly_mix[59] * x635; - Fp x637 = arg0[288]; - FpExt x638 = x636 + poly_mix[60] * x637; - FpExt x639 = x638 + poly_mix[61] * x250; - FpExt x640 = x639 + poly_mix[62] * x252; - FpExt x641 = x640 + poly_mix[63] * x258; - FpExt x642 = x641 + poly_mix[64] * x260; - FpExt x643 = x642 + poly_mix[65] * x41; - FpExt x644 = x643 + poly_mix[66] * x41; - Fp x645 = x54 - x19; - FpExt x646 = x644 + poly_mix[67] * x645; - Fp x647 = arg0[289]; - FpExt x648 = x646 + poly_mix[68] * x647; - Fp x649 = arg0[290]; - FpExt x650 = x648 + poly_mix[69] * x649; - FpExt x651 = x650 + poly_mix[70] * x267; - FpExt x652 = x651 + poly_mix[71] * x269; - Fp x653 = x104 - x137; - FpExt x654 = x652 + poly_mix[72] * x653; - Fp x655 = x103 - x138; - FpExt x656 = x654 + poly_mix[73] * x655; - Fp x657 = x107 - x139; - FpExt x658 = x656 + poly_mix[74] * x657; - Fp x659 = x106 - x140; - FpExt x660 = x658 + poly_mix[75] * x659; - Fp x661 = x141 - x142; - FpExt x662 = x660 + poly_mix[76] * x661; - Fp x663 = x143 - x144; - FpExt x664 = x662 + poly_mix[77] * x663; - Fp x665 = x111 - x145; - FpExt x666 = x664 + poly_mix[78] * x665; - Fp x667 = x112 - x146; - FpExt x668 = x666 + poly_mix[79] * x667; - Fp x669 = x147 - x148; - FpExt x670 = x668 + poly_mix[80] * x669; - Fp x671 = x149 - x150; - FpExt x672 = x670 + poly_mix[81] * x671; - Fp x673 = x42 - x151; - FpExt x674 = x672 + poly_mix[82] * x673; - Fp x675 = x44 - x152; - FpExt x676 = x674 + poly_mix[83] * x675; - Fp x677 = x50 - x153; - FpExt x678 = x676 + poly_mix[84] * x677; - Fp x679 = x52 - x154; - FpExt x680 = x678 + poly_mix[85] * x679; - Fp x681 = x58 - x155; - FpExt x682 = x680 + poly_mix[86] * x681; - Fp x683 = x60 - x156; - FpExt x684 = x682 + poly_mix[87] * x683; - Fp x685 = x38 - x157; - Fp x686 = x41 - x158; - FpExt x687 = arg4 + poly_mix[0] * x686; - Fp x688 = x41 - x159; - FpExt x689 = x687 + poly_mix[1] * x688; - Fp x690 = x41 - x160; - FpExt x691 = x689 + poly_mix[2] * x690; - Fp x692 = x41 - x161; - FpExt x693 = x691 + poly_mix[3] * x692; - FpExt x694 = x684 + x685 * x693 * poly_mix[88]; - FpExt x695 = x559 + x97 * x694 * poly_mix[5]; - Fp x696 = arg0[237]; - Fp x697 = x696 - x95; - FpExt x698 = arg4 + poly_mix[0] * x697; - Fp x699 = x95 - x18; - Fp x700 = x95 - x34; - Fp x701 = x699 * x700; - FpExt x702 = x698 + poly_mix[1] * x701; - Fp x703 = x699 * x17; - Fp x704 = x703 - x157; - FpExt x705 = x702 + poly_mix[2] * x704; - FpExt x706 = x705 + poly_mix[3] * x349; - FpExt x707 = x706 + poly_mix[4] * x351; - FpExt x708 = x707 + poly_mix[5] * x41; - FpExt x709 = x708 + poly_mix[6] * x41; - Fp x710 = arg0[291]; - FpExt x711 = x709 + poly_mix[7] * x710; - FpExt x712 = x711 + poly_mix[8] * x361; - FpExt x713 = x712 + poly_mix[9] * x363; - Fp x714 = x104 - x343; - FpExt x715 = x713 + poly_mix[10] * x714; - Fp x716 = x103 - x322; - FpExt x717 = x715 + poly_mix[11] * x716; - FpExt x718 = x717 + poly_mix[12] * x371; - FpExt x719 = x718 + poly_mix[13] * x373; - FpExt x720 = x719 + poly_mix[14] * x41; - FpExt x721 = x720 + poly_mix[15] * x41; - Fp x722 = arg0[292]; - FpExt x723 = x721 + poly_mix[16] * x722; - FpExt x724 = x723 + poly_mix[17] * x383; - FpExt x725 = x724 + poly_mix[18] * x385; - Fp x726 = x107 - x310; - FpExt x727 = x725 + poly_mix[19] * x726; - FpExt x728 = x727 + poly_mix[20] * x106; - FpExt x729 = x728 + poly_mix[21] * x128; - FpExt x730 = x729 + poly_mix[22] * x129; - FpExt x731 = x730 + poly_mix[23] * x130; - FpExt x732 = x731 + poly_mix[24] * x131; - FpExt x733 = x732 + poly_mix[25] * x113; - FpExt x734 = x733 + poly_mix[26] * x114; - FpExt x735 = x734 + poly_mix[27] * x115; - FpExt x736 = x735 + poly_mix[28] * x116; - FpExt x737 = x736 + poly_mix[29] * x117; - FpExt x738 = x737 + poly_mix[30] * x118; - FpExt x739 = x738 + poly_mix[31] * x119; - FpExt x740 = x739 + poly_mix[32] * x120; - FpExt x741 = x740 + poly_mix[33] * x132; - FpExt x742 = x741 + poly_mix[34] * x133; - FpExt x743 = x742 + poly_mix[35] * x121; - FpExt x744 = x743 + poly_mix[36] * x122; - FpExt x745 = x744 + poly_mix[37] * x123; - FpExt x746 = x745 + poly_mix[38] * x56; - FpExt x747 = x695 + x553 * x746 * poly_mix[97]; - FpExt x748 = x747 + poly_mix[136] * x62; - FpExt x749 = x748 + poly_mix[137] * x63; - FpExt x750 = x749 + poly_mix[138] * x64; - FpExt x751 = x750 + poly_mix[139] * x65; - FpExt x752 = x751 + poly_mix[140] * x66; - FpExt x753 = x752 + poly_mix[141] * x67; - FpExt x754 = x753 + poly_mix[142] * x68; - FpExt x755 = x754 + poly_mix[143] * x69; - FpExt x756 = x755 + poly_mix[144] * x70; - FpExt x757 = x756 + poly_mix[145] * x71; - FpExt x758 = x757 + poly_mix[146] * x72; - FpExt x759 = x758 + poly_mix[147] * x73; - FpExt x760 = x759 + poly_mix[148] * x74; - FpExt x761 = x760 + poly_mix[149] * x75; - FpExt x762 = x761 + poly_mix[150] * x76; - FpExt x763 = x762 + poly_mix[151] * x77; - FpExt x764 = x763 + poly_mix[152] * x78; - FpExt x765 = x764 + poly_mix[153] * x79; - FpExt x766 = x765 + poly_mix[154] * x80; - FpExt x767 = x766 + poly_mix[155] * x81; - FpExt x768 = x767 + poly_mix[156] * x82; - FpExt x769 = x768 + poly_mix[157] * x83; - FpExt x770 = x769 + poly_mix[158] * x84; - FpExt x771 = x770 + poly_mix[159] * x85; - FpExt x772 = x771 + poly_mix[160] * x86; - FpExt x773 = x772 + poly_mix[161] * x87; - FpExt x774 = x773 + poly_mix[162] * x88; - FpExt x775 = x774 + poly_mix[163] * x89; - FpExt x776 = x775 + poly_mix[164] * x90; - FpExt x777 = x776 + poly_mix[165] * x91; - FpExt x778 = x777 + poly_mix[166] * x92; - FpExt x779 = x778 + poly_mix[167] * x93; - FpExt x780 = x547 + x162 * x779 * poly_mix[338]; - Fp x781 = arg0[293]; - FpExt x782 = arg4 + poly_mix[0] * x781; - FpExt x783 = x782 + poly_mix[1] * x349; - FpExt x784 = x783 + poly_mix[2] * x351; - FpExt x785 = x784 + poly_mix[3] * x41; - FpExt x786 = x785 + poly_mix[4] * x41; - Fp x787 = arg0[294]; - FpExt x788 = x786 + poly_mix[5] * x787; - FpExt x789 = x788 + poly_mix[6] * x361; - FpExt x790 = x789 + poly_mix[7] * x363; - FpExt x791 = x790 + poly_mix[8] * x371; - FpExt x792 = x791 + poly_mix[9] * x373; - FpExt x793 = x792 + poly_mix[10] * x41; - FpExt x794 = x793 + poly_mix[11] * x41; - Fp x795 = arg0[295]; - FpExt x796 = x794 + poly_mix[12] * x795; - FpExt x797 = x796 + poly_mix[13] * x383; - FpExt x798 = x797 + poly_mix[14] * x385; - FpExt x799 = x798 + poly_mix[15] * x394; - FpExt x800 = x799 + poly_mix[16] * x396; - FpExt x801 = x800 + poly_mix[17] * x41; - FpExt x802 = x801 + poly_mix[18] * x41; - Fp x803 = arg0[296]; - FpExt x804 = x802 + poly_mix[19] * x803; - FpExt x805 = x804 + poly_mix[20] * x406; - FpExt x806 = x805 + poly_mix[21] * x408; - FpExt x807 = x806 + poly_mix[22] * x410; - FpExt x808 = x807 + poly_mix[23] * x412; - FpExt x809 = x808 + poly_mix[24] * x41; - FpExt x810 = x809 + poly_mix[25] * x41; - Fp x811 = arg0[297]; - FpExt x812 = x810 + poly_mix[26] * x811; - FpExt x813 = x812 + poly_mix[27] * x418; - FpExt x814 = x813 + poly_mix[28] * x420; - FpExt x815 = x814 + poly_mix[29] * x598; - FpExt x816 = x815 + poly_mix[30] * x600; - FpExt x817 = x816 + poly_mix[31] * x41; - FpExt x818 = x817 + poly_mix[32] * x41; - Fp x819 = arg0[298]; - FpExt x820 = x818 + poly_mix[33] * x819; - FpExt x821 = x820 + poly_mix[34] * x610; - FpExt x822 = x821 + poly_mix[35] * x612; - FpExt x823 = x822 + poly_mix[36] * x614; - FpExt x824 = x823 + poly_mix[37] * x616; - FpExt x825 = x824 + poly_mix[38] * x41; - FpExt x826 = x825 + poly_mix[39] * x41; - Fp x827 = arg0[299]; - FpExt x828 = x826 + poly_mix[40] * x827; - FpExt x829 = x828 + poly_mix[41] * x626; - FpExt x830 = x829 + poly_mix[42] * x235; - FpExt x831 = x830 + poly_mix[43] * x241; - FpExt x832 = x831 + poly_mix[44] * x243; - FpExt x833 = x832 + poly_mix[45] * x41; - FpExt x834 = x833 + poly_mix[46] * x41; - Fp x835 = arg0[300]; - FpExt x836 = x834 + poly_mix[47] * x835; - FpExt x837 = x836 + poly_mix[48] * x250; - FpExt x838 = x837 + poly_mix[49] * x252; - FpExt x839 = x838 + poly_mix[50] * x258; - FpExt x840 = x839 + poly_mix[51] * x260; - FpExt x841 = x840 + poly_mix[52] * x41; - FpExt x842 = x841 + poly_mix[53] * x41; - Fp x843 = arg0[301]; - FpExt x844 = x842 + poly_mix[54] * x843; - FpExt x845 = x844 + poly_mix[55] * x267; - FpExt x846 = x845 + poly_mix[56] * x269; - Fp x847 = x163 - x164; - FpExt x848 = x846 + poly_mix[57] * x847; - Fp x849 = x165 - x166; - FpExt x850 = x848 + poly_mix[58] * x849; - Fp x851 = x167 - x168; - FpExt x852 = x850 + poly_mix[59] * x851; - Fp x853 = x169 - x170; - FpExt x854 = x852 + poly_mix[60] * x853; - Fp x855 = x171 - x172; - FpExt x856 = x854 + poly_mix[61] * x855; - Fp x857 = x173 - x174; - FpExt x858 = x856 + poly_mix[62] * x857; - Fp x859 = x175 - x176; - FpExt x860 = x858 + poly_mix[63] * x859; - Fp x861 = x177 - x178; - FpExt x862 = x860 + poly_mix[64] * x861; - Fp x863 = x179 - x180; - FpExt x864 = x862 + poly_mix[65] * x863; - Fp x865 = x181 - x182; - FpExt x866 = x864 + poly_mix[66] * x865; - Fp x867 = x183 - x184; - FpExt x868 = x866 + poly_mix[67] * x867; - Fp x869 = x185 - x186; - FpExt x870 = x868 + poly_mix[68] * x869; - Fp x871 = x187 - x188; - FpExt x872 = x870 + poly_mix[69] * x871; - Fp x873 = x189 - x190; - FpExt x874 = x872 + poly_mix[70] * x873; - Fp x875 = x191 - x192; - FpExt x876 = x874 + poly_mix[71] * x875; - Fp x877 = x193 - x194; - FpExt x878 = x876 + poly_mix[72] * x877; - FpExt x879 = x878 + poly_mix[73] * x62; - FpExt x880 = x879 + poly_mix[74] * x63; - FpExt x881 = x880 + poly_mix[75] * x64; - FpExt x882 = x881 + poly_mix[76] * x65; - FpExt x883 = x882 + poly_mix[77] * x66; - FpExt x884 = x883 + poly_mix[78] * x67; - FpExt x885 = x884 + poly_mix[79] * x68; - FpExt x886 = x885 + poly_mix[80] * x69; - FpExt x887 = x886 + poly_mix[81] * x70; - FpExt x888 = x887 + poly_mix[82] * x71; - FpExt x889 = x888 + poly_mix[83] * x72; - FpExt x890 = x889 + poly_mix[84] * x73; - FpExt x891 = x890 + poly_mix[85] * x74; - FpExt x892 = x891 + poly_mix[86] * x75; - FpExt x893 = x892 + poly_mix[87] * x76; - FpExt x894 = x893 + poly_mix[88] * x77; - FpExt x895 = x894 + poly_mix[89] * x78; - FpExt x896 = x895 + poly_mix[90] * x79; - FpExt x897 = x896 + poly_mix[91] * x80; - FpExt x898 = x897 + poly_mix[92] * x81; - FpExt x899 = x898 + poly_mix[93] * x82; - FpExt x900 = x899 + poly_mix[94] * x83; - FpExt x901 = x900 + poly_mix[95] * x84; - FpExt x902 = x901 + poly_mix[96] * x85; - FpExt x903 = x902 + poly_mix[97] * x86; - FpExt x904 = x903 + poly_mix[98] * x87; - FpExt x905 = x904 + poly_mix[99] * x88; - FpExt x906 = x905 + poly_mix[100] * x89; - FpExt x907 = x906 + poly_mix[101] * x90; - FpExt x908 = x907 + poly_mix[102] * x91; - FpExt x909 = x908 + poly_mix[103] * x92; - FpExt x910 = x909 + poly_mix[104] * x93; - FpExt x911 = x780 + x195 * x910 * poly_mix[361]; - Fp x912 = arg0[302]; - FpExt x913 = arg4 + poly_mix[0] * x912; - Fp x914 = x343 - x96; - FpExt x915 = x913 + poly_mix[1] * x914; - Fp x916 = x310 - x100; - FpExt x917 = x915 + poly_mix[2] * x916; - Fp x918 = x96 + x38; - Fp x919 = x96 + x37; - Fp x920 = x96 + x16; - Fp x921 = x96 + x34; - Fp x922 = x96 + x15; - Fp x923 = x96 + x14; - Fp x924 = x96 + x13; - Fp x925 = x96 + x12; - Fp x926 = x96 + x11; - Fp x927 = x96 + x10; - Fp x928 = x96 + x9; - Fp x929 = x96 + x8; - Fp x930 = x96 + x7; - Fp x931 = x96 + x6; - Fp x932 = x96 + x5; - Fp x933 = x96 + x4; - Fp x934 = x933 - x27; - Fp x935 = x98 - x96; - FpExt x936 = arg4 + poly_mix[0] * x935; - Fp x937 = x101 - x918; - FpExt x938 = x936 + poly_mix[1] * x937; - Fp x939 = x108 - x919; - FpExt x940 = x938 + poly_mix[2] * x939; - Fp x941 = x127 - x920; - FpExt x942 = x940 + poly_mix[3] * x941; - Fp x943 = x196 - x921; - FpExt x944 = x942 + poly_mix[4] * x943; - Fp x945 = x197 - x922; - FpExt x946 = x944 + poly_mix[5] * x945; - Fp x947 = x198 - x923; - FpExt x948 = x946 + poly_mix[6] * x947; - Fp x949 = x199 - x924; - FpExt x950 = x948 + poly_mix[7] * x949; - Fp x951 = x200 - x925; - FpExt x952 = x950 + poly_mix[8] * x951; - Fp x953 = x201 - x926; - FpExt x954 = x952 + poly_mix[9] * x953; - Fp x955 = x202 - x927; - FpExt x956 = x954 + poly_mix[10] * x955; - Fp x957 = x203 - x928; - FpExt x958 = x956 + poly_mix[11] * x957; - Fp x959 = x204 - x929; - FpExt x960 = x958 + poly_mix[12] * x959; - Fp x961 = x205 - x930; - FpExt x962 = x960 + poly_mix[13] * x961; - Fp x963 = x206 - x931; - FpExt x964 = x962 + poly_mix[14] * x963; - Fp x965 = x207 - x932; - FpExt x966 = x964 + poly_mix[15] * x965; - Fp x967 = arg0[80]; - FpExt x968 = x966 + poly_mix[16] * x967; - Fp x969 = x934 * x97; - Fp x970 = x969 - x275; - FpExt x971 = x968 + poly_mix[17] * x970; - Fp x972 = x95 * x934; - FpExt x973 = x971 + poly_mix[18] * x972; - Fp x974 = arg0[303]; - FpExt x975 = x973 + poly_mix[19] * x974; - FpExt x976 = x975 + poly_mix[20] * x78; - FpExt x977 = x976 + poly_mix[21] * x79; - FpExt x978 = x977 + poly_mix[22] * x80; - FpExt x979 = x978 + poly_mix[23] * x81; - FpExt x980 = x979 + poly_mix[24] * x82; - FpExt x981 = x980 + poly_mix[25] * x83; - FpExt x982 = x981 + poly_mix[26] * x84; - FpExt x983 = x982 + poly_mix[27] * x85; - FpExt x984 = x983 + poly_mix[28] * x86; - FpExt x985 = x984 + poly_mix[29] * x87; - FpExt x986 = x985 + poly_mix[30] * x88; - FpExt x987 = x986 + poly_mix[31] * x89; - FpExt x988 = x987 + poly_mix[32] * x90; - FpExt x989 = x988 + poly_mix[33] * x91; - FpExt x990 = x989 + poly_mix[34] * x92; - FpExt x991 = x990 + poly_mix[35] * x93; - FpExt x992 = x917 + x100 * x991 * poly_mix[3]; - Fp x993 = x933 - x3; - Fp x994 = x208 - x96; - FpExt x995 = arg4 + poly_mix[0] * x994; - Fp x996 = x209 - x918; - FpExt x997 = x995 + poly_mix[1] * x996; - Fp x998 = x210 - x919; - FpExt x999 = x997 + poly_mix[2] * x998; - Fp x1000 = x211 - x920; - FpExt x1001 = x999 + poly_mix[3] * x1000; - Fp x1002 = x212 - x921; - FpExt x1003 = x1001 + poly_mix[4] * x1002; - Fp x1004 = x213 - x922; - FpExt x1005 = x1003 + poly_mix[5] * x1004; - Fp x1006 = x214 - x923; - FpExt x1007 = x1005 + poly_mix[6] * x1006; - Fp x1008 = x215 - x924; - FpExt x1009 = x1007 + poly_mix[7] * x1008; - Fp x1010 = x216 - x925; - FpExt x1011 = x1009 + poly_mix[8] * x1010; - Fp x1012 = x217 - x926; - FpExt x1013 = x1011 + poly_mix[9] * x1012; - Fp x1014 = x218 - x927; - FpExt x1015 = x1013 + poly_mix[10] * x1014; - Fp x1016 = x219 - x928; - FpExt x1017 = x1015 + poly_mix[11] * x1016; - Fp x1018 = x220 - x929; - FpExt x1019 = x1017 + poly_mix[12] * x1018; - Fp x1020 = x221 - x930; - FpExt x1021 = x1019 + poly_mix[13] * x1020; - Fp x1022 = x222 - x931; - FpExt x1023 = x1021 + poly_mix[14] * x1022; - Fp x1024 = x223 - x932; - FpExt x1025 = x1023 + poly_mix[15] * x1024; - FpExt x1026 = x1025 + poly_mix[16] * x967; - Fp x1027 = x993 * x97; - Fp x1028 = x1027 - x275; - FpExt x1029 = x1026 + poly_mix[17] * x1028; - Fp x1030 = x95 * x993; - FpExt x1031 = x1029 + poly_mix[18] * x1030; - FpExt x1032 = x1031 + poly_mix[19] * x974; - FpExt x1033 = x1032 + poly_mix[20] * x62; - FpExt x1034 = x1033 + poly_mix[21] * x63; - FpExt x1035 = x1034 + poly_mix[22] * x64; - FpExt x1036 = x1035 + poly_mix[23] * x65; - FpExt x1037 = x1036 + poly_mix[24] * x66; - FpExt x1038 = x1037 + poly_mix[25] * x67; - FpExt x1039 = x1038 + poly_mix[26] * x68; - FpExt x1040 = x1039 + poly_mix[27] * x69; - FpExt x1041 = x1040 + poly_mix[28] * x70; - FpExt x1042 = x1041 + poly_mix[29] * x71; - FpExt x1043 = x1042 + poly_mix[30] * x72; - FpExt x1044 = x1043 + poly_mix[31] * x73; - FpExt x1045 = x1044 + poly_mix[32] * x74; - FpExt x1046 = x1045 + poly_mix[33] * x75; - FpExt x1047 = x1046 + poly_mix[34] * x76; - FpExt x1048 = x1047 + poly_mix[35] * x77; - FpExt x1049 = x992 + x331 * x1048 * poly_mix[39]; - FpExt x1050 = x1049 + poly_mix[75] * x224; - FpExt x1051 = x1050 + poly_mix[76] * x225; - FpExt x1052 = x1051 + poly_mix[77] * x226; - FpExt x1053 = x1052 + poly_mix[78] * x227; - FpExt x1054 = x1053 + poly_mix[79] * x128; - FpExt x1055 = x1054 + poly_mix[80] * x129; - FpExt x1056 = x1055 + poly_mix[81] * x130; - FpExt x1057 = x1056 + poly_mix[82] * x131; - FpExt x1058 = x1057 + poly_mix[83] * x113; - FpExt x1059 = x1058 + poly_mix[84] * x114; - FpExt x1060 = x1059 + poly_mix[85] * x115; - FpExt x1061 = x1060 + poly_mix[86] * x116; - FpExt x1062 = x1061 + poly_mix[87] * x117; - FpExt x1063 = x1062 + poly_mix[88] * x118; - FpExt x1064 = x1063 + poly_mix[89] * x119; - FpExt x1065 = x1064 + poly_mix[90] * x120; - FpExt x1066 = x1065 + poly_mix[91] * x228; - FpExt x1067 = x1066 + poly_mix[92] * x229; - FpExt x1068 = x1067 + poly_mix[93] * x132; - FpExt x1069 = x1068 + poly_mix[94] * x133; - FpExt x1070 = x1069 + poly_mix[95] * x121; - FpExt x1071 = x1070 + poly_mix[96] * x122; - FpExt x1072 = x1071 + poly_mix[97] * x123; - FpExt x1073 = x1072 + poly_mix[98] * x56; - FpExt x1074 = x911 + x230 * x1073 * poly_mix[374]; - Fp x1075 = arg0[304]; - FpExt x1076 = arg4 + poly_mix[0] * x1075; - FpExt x1077 = x1076 + poly_mix[1] * x224; - FpExt x1078 = x1077 + poly_mix[2] * x225; - FpExt x1079 = x1078 + poly_mix[3] * x226; - FpExt x1080 = x1079 + poly_mix[4] * x227; - FpExt x1081 = x1080 + poly_mix[5] * x128; - FpExt x1082 = x1081 + poly_mix[6] * x129; - FpExt x1083 = x1082 + poly_mix[7] * x130; - FpExt x1084 = x1083 + poly_mix[8] * x131; - FpExt x1085 = x1084 + poly_mix[9] * x113; - FpExt x1086 = x1085 + poly_mix[10] * x114; - FpExt x1087 = x1086 + poly_mix[11] * x115; - FpExt x1088 = x1087 + poly_mix[12] * x116; - FpExt x1089 = x1088 + poly_mix[13] * x117; - FpExt x1090 = x1089 + poly_mix[14] * x118; - FpExt x1091 = x1090 + poly_mix[15] * x119; - FpExt x1092 = x1091 + poly_mix[16] * x120; - FpExt x1093 = x1092 + poly_mix[17] * x228; - FpExt x1094 = x1093 + poly_mix[18] * x229; - FpExt x1095 = x1094 + poly_mix[19] * x132; - FpExt x1096 = x1095 + poly_mix[20] * x133; - FpExt x1097 = x1096 + poly_mix[21] * x121; - FpExt x1098 = x1097 + poly_mix[22] * x122; - FpExt x1099 = x1098 + poly_mix[23] * x123; - FpExt x1100 = x1099 + poly_mix[24] * x56; - FpExt x1101 = x1100 + poly_mix[25] * x62; - FpExt x1102 = x1101 + poly_mix[26] * x63; - FpExt x1103 = x1102 + poly_mix[27] * x64; - FpExt x1104 = x1103 + poly_mix[28] * x65; - FpExt x1105 = x1104 + poly_mix[29] * x66; - FpExt x1106 = x1105 + poly_mix[30] * x67; - FpExt x1107 = x1106 + poly_mix[31] * x68; - FpExt x1108 = x1107 + poly_mix[32] * x69; - FpExt x1109 = x1108 + poly_mix[33] * x70; - FpExt x1110 = x1109 + poly_mix[34] * x71; - FpExt x1111 = x1110 + poly_mix[35] * x72; - FpExt x1112 = x1111 + poly_mix[36] * x73; - FpExt x1113 = x1112 + poly_mix[37] * x74; - FpExt x1114 = x1113 + poly_mix[38] * x75; - FpExt x1115 = x1114 + poly_mix[39] * x76; - FpExt x1116 = x1115 + poly_mix[40] * x77; - FpExt x1117 = x1116 + poly_mix[41] * x78; - FpExt x1118 = x1117 + poly_mix[42] * x79; - FpExt x1119 = x1118 + poly_mix[43] * x80; - FpExt x1120 = x1119 + poly_mix[44] * x81; - FpExt x1121 = x1120 + poly_mix[45] * x82; - FpExt x1122 = x1121 + poly_mix[46] * x83; - FpExt x1123 = x1122 + poly_mix[47] * x84; - FpExt x1124 = x1123 + poly_mix[48] * x85; - FpExt x1125 = x1124 + poly_mix[49] * x86; - FpExt x1126 = x1125 + poly_mix[50] * x87; - FpExt x1127 = x1126 + poly_mix[51] * x88; - FpExt x1128 = x1127 + poly_mix[52] * x89; - FpExt x1129 = x1128 + poly_mix[53] * x90; - FpExt x1130 = x1129 + poly_mix[54] * x91; - FpExt x1131 = x1130 + poly_mix[55] * x92; - FpExt x1132 = x1131 + poly_mix[56] * x93; - FpExt x1133 = x1074 + x231 * x1132 * poly_mix[381]; - FpExt x1134 = arg6 + x232 * x1133 * poly_mix[392]; - Fp x1135 = x696 - x11; - Fp x1136 = x696 - x10; - arg0[311] = x1136; - Fp x1137 = x696 - x9; - arg0[325] = x1137; - Fp x1138 = x696 - x8; - arg0[326] = x1138; - Fp x1139 = x696 - x7; - arg0[327] = x1139; - Fp x1140 = x94 * x34; - arg0[328] = x1140; - Fp x1141 = x134 * x18; - arg0[329] = x1141; - Fp x1142 = x162 * x4; - arg0[330] = x1142; - Fp x1143 = arg0[133]; - FpExt x1144 = arg4 + poly_mix[0] * x1143; - Fp x1145 = arg0[134]; - FpExt x1146 = x1144 + poly_mix[1] * x1145; - Fp x1147 = arg0[27]; - Fp x1148 = x1147 + x44; - Fp x1149 = x46 - x38; - FpExt x1150 = x1146 + poly_mix[2] * x1149; - Fp x1151 = arg0[120]; - Fp x1152 = x48 - x1151; - FpExt x1153 = x1150 + poly_mix[3] * x1152; - Fp x1154 = arg0[305]; - FpExt x1155 = x1153 + poly_mix[4] * x1154; - Fp x1156 = x322 * x189; - Fp x1157 = arg0[306]; - Fp x1158 = x1156 - x1157; - FpExt x1159 = x1155 + poly_mix[5] * x1158; - Fp x1160 = x187 * x322; - FpExt x1161 = x1159 + poly_mix[6] * x1160; - Fp x1162 = x187 * x189; - FpExt x1163 = x1161 + poly_mix[7] * x1162; - FpExt x1164 = x1163 + poly_mix[8] * x187; - FpExt x1165 = x1164 + poly_mix[9] * x243; - Fp x1166 = arg0[307]; - Fp x1167 = x1166 + x1148; - Fp x1168 = x1167 - x343; - FpExt x1169 = x1165 + poly_mix[10] * x1168; - Fp x1170 = x346 + x50; - FpExt x1171 = x1169 + poly_mix[11] * x1148; - Fp x1172 = x102 - x1170; - FpExt x1173 = arg5 + poly_mix[4] * x1172; - FpExt x1174 = x1173 + poly_mix[5] * x357; - FpExt x1175 = x1174 + poly_mix[6] * x359; - Fp x1176 = arg0[173]; - FpExt x1177 = x1175 + poly_mix[7] * x1176; - Fp x1178 = arg0[308]; - Fp x1179 = x135 - x1178; - arg0[312] = x1179; - FpExt x1180 = x1177 + poly_mix[8] * x1179; - FpExt x1181 = x1180 + poly_mix[9] * x368; - FpExt x1182 = x1181 + poly_mix[10] * x103; - FpExt x1183 = x1182 + poly_mix[11] * x366; - FpExt x1184 = x1183 + poly_mix[12] * x472; - FpExt x1185 = x1184 + poly_mix[13] * x371; - FpExt x1186 = x1185 + poly_mix[14] * x373; - FpExt x1187 = x1186 + poly_mix[15] * x41; - FpExt x1188 = x1187 + poly_mix[16] * x41; - Fp x1189 = x105 - x2; - FpExt x1190 = x1188 + poly_mix[17] * x1189; - FpExt x1191 = x1190 + poly_mix[18] * x379; - FpExt x1192 = x1191 + poly_mix[19] * x381; - Fp x1193 = arg0[174]; - FpExt x1194 = x1192 + poly_mix[20] * x1193; - Fp x1195 = arg0[309]; - Fp x1196 = x179 - x1195; - arg0[313] = x1196; - FpExt x1197 = x1194 + poly_mix[21] * x1196; - FpExt x1198 = x1197 + poly_mix[22] * x106; - Fp x1199 = arg0[119]; - FpExt x1200 = x1198 + poly_mix[23] * x1199; - Fp x1201 = arg0[208]; - FpExt x1202 = x1200 + poly_mix[24] * x1201; - Fp x1203 = arg0[209]; - FpExt x1204 = x1202 + poly_mix[25] * x1203; - Fp x1205 = arg0[159]; - FpExt x1206 = x1204 + poly_mix[26] * x1205; - Fp x1207 = x52 + x119; - Fp x1208 = x1207 + x54; - Fp x1209 = x1208 + x55; - Fp x1210 = x1209 - x38; - FpExt x1211 = x1206 + poly_mix[27] * x1210; - Fp x1212 = x55 * x16; - Fp x1213 = arg0[310]; - Fp x1214 = x119 + x1213; - Fp x1215 = x1214 + x1212; - Fp x1216 = x1215 - x107; - FpExt x1217 = x1211 + poly_mix[28] * x1216; - FpExt x1218 = x1217 + poly_mix[29] * x128; - FpExt x1219 = x1218 + poly_mix[30] * x129; - FpExt x1220 = x1219 + poly_mix[31] * x130; - FpExt x1221 = x1220 + poly_mix[32] * x131; - FpExt x1222 = x1221 + poly_mix[33] * x181; - FpExt x1223 = x1222 + poly_mix[34] * x147; - FpExt x1224 = x1223 + poly_mix[35] * x115; - FpExt x1225 = x1224 + poly_mix[36] * x233; - FpExt x1226 = x1171 + x234 * x1225 * poly_mix[12]; - FpExt x1227 = arg4 + poly_mix[0] * x1135; - FpExt x1228 = x1227 + poly_mix[1] * x349; - FpExt x1229 = x1228 + poly_mix[2] * x351; - FpExt x1230 = x1229 + poly_mix[3] * x41; - FpExt x1231 = x1230 + poly_mix[4] * x41; - Fp x1232 = x102 - x1; - FpExt x1233 = x1231 + poly_mix[5] * x1232; - FpExt x1234 = x1233 + poly_mix[6] * x357; - FpExt x1235 = x1234 + poly_mix[7] * x359; - FpExt x1236 = x1235 + poly_mix[8] * x1176; - FpExt x1237 = x1236 + poly_mix[9] * x1179; - FpExt x1238 = x1237 + poly_mix[10] * x371; - FpExt x1239 = x1238 + poly_mix[11] * x373; - FpExt x1240 = x1239 + poly_mix[12] * x41; - FpExt x1241 = x1240 + poly_mix[13] * x41; - Fp x1242 = x105 - x0; - FpExt x1243 = x1241 + poly_mix[14] * x1242; - FpExt x1244 = x1243 + poly_mix[15] * x379; - FpExt x1245 = x1244 + poly_mix[16] * x381; - FpExt x1246 = x1245 + poly_mix[17] * x1193; - FpExt x1247 = x1246 + poly_mix[18] * x1196; - Fp x1248 = x104 - x158; - FpExt x1249 = x1247 + poly_mix[19] * x1248; - auto x1250 = rv32im_v2_7( - idx, size, x1249, x1226, arg0, arg4, arg7, x1134, arg8, arg9, arg10, arg11, arg12, arg13); - - return x1250; -} -__device__ FpExt rv32im_v2_4(uint32_t idx, - uint32_t size, - Fp* arg0, - FpExt arg1, - FpExt* arg2, - FpExt arg3, - FpExt arg4, - FpExt arg5, - const Fp* arg6, - const Fp* arg7, - const Fp* arg8) { - uint32_t mask = size - 1; - Fp x0(1052077299); - Fp x1(1930103076); - Fp x2(918610824); - Fp x3(13683276); - Fp x4(606789471); - Fp x5(1974912880); - Fp x6(65998480); - Fp x7(1461037801); - Fp x8(1997365680); - Fp x9(801504236); - Fp x10(1792686146); - Fp x11(1001081699); - Fp x12(98371040); - Fp x13(1389833583); - Fp x14(106789798); - Fp x15(1188752902); - Fp x16(20525701); - Fp x17(1558116381); - Fp x18(1942928017); - Fp x19(1928969209); - Fp x20(51866717); - Fp x21(658182609); - Fp x22(1867716110); - Fp x23(111593398); - Fp x24(375892129); - Fp x25(1083257840); - Fp x26(497520322); - Fp x27(4); - Fp x28(2); - Fp x29(1380248020); - Fp x30(1608891156); - Fp x31(1672219447); - Fp x32(1262312258); - Fp x33(162506101); - Fp x34(809508074); - Fp x35(1303271640); - Fp x36(1393671120); - Fp x37(641665156); - Fp x38(1090783436); - Fp x39(1111203133); - Fp x40(1296144415); - Fp x41(202271745); - Fp x42(459826664); - Fp x43(781141772); - Fp x44(1832911930); - Fp x45(228520958); - Fp x46(813674331); - Fp x47(1889898); - Fp x48(1124078057); - Fp x49(738091882); - Fp x50(1003792297); - Fp x51(1896271507); - Fp x52(1206940496); - Fp x53(1827572010); - Fp x54(1507649755); - Fp x55(1042892522); - Fp x56(760115692); - Fp x57(1841795381); - Fp x58(457372011); - Fp x59(1748789933); - Fp x60(1478577620); - Fp x61(76770019); - Fp x62(1293938517); - Fp x63(1150410028); - Fp x64(1065075039); - Fp x65(1198261138); - Fp x66(59510015); - Fp x67(1402624179); - Fp x68(158646617); - Fp x69(890243564); - Fp x70(1463323727); - Fp x71(1080533265); - Fp x72(192082241); - Fp x73(1891637550); - Fp x74(1950429111); - Fp x75(1663353317); - Fp x76(1567618575); - Fp x77(150307788); - Fp x78(755691969); - Fp x79(1715719711); - Fp x80(1545325389); - Fp x81(989618631); - Fp x82(1401020792); - Fp x83(930036496); - Fp x84(238616145); - Fp x85(1006235079); - Fp x86(942439428); - Fp x87(1649953458); - Fp x88(1647665372); - Fp x89(708123747); - Fp x90(925018226); - Fp x91(78845751); - Fp x92(1889603648); - Fp x93(993455846); - Fp x94(140621810); - Fp x95(117294666); - Fp x96(790726260); - Fp x97(1213686459); - Fp x98(390340387); - Fp x99(714957516); - Fp x100(1209164052); - Fp x101(1040977421); - Fp x102(1792450386); - Fp x103(1470845646); - Fp x104(1363837384); - Fp x105(1878280202); - Fp x106(434078361); - Fp x107(1946596189); - Fp x108(875839332); - Fp x109(463976218); - Fp x110(976057819); - Fp x111(48375137); - Fp x112(1549779579); - Fp x113(1679178250); - Fp x114(530151394); - Fp x115(1629316321); - Fp x116(1854174607); - Fp x117(720724951); - Fp x118(14387587); - Fp x119(1883820770); - Fp x120(205609311); - Fp x121(1136469704); - Fp x122(1439947916); - Fp x123(723038058); - Fp x124(53041581); - Fp x125(1291790245); - Fp x126(1781980094); - Fp x127(273790406); - Fp x128(1239734761); - Fp x129(1221257987); - Fp x130(51256176); - Fp x131(172614232); - Fp x132(306391314); - Fp x133(1647670797); - Fp x134(53007114); - Fp x135(1269493554); - Fp x136(1338899225); - Fp x137(1740472809); - Fp x138(1454563174); - Fp x139(204228775); - Fp x140(588764636); - Fp x141(1718628547); - Fp x142(427731030); - Fp x143(825405577); - Fp x144(342857858); - Fp x145(1290028279); - Fp x146(608401422); - Fp x147(1587822577); - Fp x148(128479034); - Fp x149(862495875); - Fp x150(447555988); - Fp x151(1910423126); - Fp x152(1099252725); - Fp x153(1584033957); - Fp x154(1079030649); - Fp x155(1622328571); - Fp x156(1908416316); - Fp x157(1549062383); - Fp x158(623051854); - Fp x159(162510541); - Fp x160(1608853840); - Fp x161(538103555); - Fp x162(1424297384); - Fp x163(552696906); - Fp x164(946500736); - Fp x165(1215259350); - Fp x166(855276054); - Fp x167(1664590951); - Fp x168(217046702); - Fp x169(142102402); - Fp x170(1257820264); - Fp x171(27129487); - Fp x172(1147522062); - Fp x173(989176635); - Fp x174(241306552); - Fp x175(1507936940); - Fp x176 = arg6[121 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x177 = arg6[122 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x178 = arg6[123 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x179 = arg6[124 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x180 = arg6[125 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x181 = arg6[126 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x182 = arg6[127 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x183 = arg6[38 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x184 = arg6[73 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x185 = arg6[72 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x186 = arg6[39 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x187 = arg6[75 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x188 = arg6[74 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x189 = arg6[40 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x190 = arg6[77 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x191 = arg6[76 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x192 = arg6[41 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x193 = arg6[79 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x194 = arg6[78 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x195 = arg6[42 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x196 = arg6[81 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x197 = arg6[80 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x198 = arg6[43 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x199 = arg6[83 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x200 = arg6[82 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x201 = arg6[44 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x202 = arg6[85 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x203 = arg6[84 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x204 = arg6[45 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x205 = arg6[87 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x206 = arg6[86 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x207 = arg6[46 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x208 = arg6[89 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x209 = arg6[88 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x210 = arg6[47 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x211 = arg6[91 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x212 = arg6[90 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x213 = arg6[48 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x214 = arg6[93 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x215 = arg6[92 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x216 = arg6[49 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x217 = arg6[95 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x218 = arg6[94 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x219 = arg6[50 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x220 = arg6[97 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x221 = arg6[96 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x222 = arg6[51 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x223 = arg6[99 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x224 = arg6[98 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x225 = arg6[52 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x226 = arg6[101 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x227 = arg6[100 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x228 = arg6[53 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x229 = arg6[103 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x230 = arg6[102 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x231 = arg6[54 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x232 = arg6[105 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x233 = arg6[104 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x234 = arg6[55 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x235 = arg6[107 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x236 = arg6[106 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x237 = arg6[56 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x238 = arg6[109 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x239 = arg6[108 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x240 = arg6[57 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x241 = arg6[111 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x242 = arg6[110 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x243 = arg6[58 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x244 = arg6[113 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x245 = arg6[112 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x246 = arg6[59 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x247 = arg6[115 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x248 = arg6[114 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x249 = arg6[60 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x250 = arg6[117 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x251 = arg6[116 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x252 = arg6[61 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x253 = arg6[119 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x254 = arg6[118 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x255 = arg6[33 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x256 = arg6[34 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x257 = arg6[36 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x258 = arg6[38 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x259 = arg6[39 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x260 = arg6[40 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x261 = arg6[41 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x262 = arg6[42 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x263 = arg6[43 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x264 = arg6[44 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x265 = arg6[45 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x266 = arg6[46 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x267 = arg6[47 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x268 = arg6[48 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x269 = arg6[49 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x270 = arg6[50 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x271 = arg6[51 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x272 = arg6[52 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x273 = arg6[53 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x274 = arg6[54 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x275 = arg6[55 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x276 = arg6[56 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x277 = arg6[57 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x278 = arg6[58 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x279 = arg6[59 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x280 = arg6[60 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x281 = arg6[61 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x282 = arg6[19 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x283 = arg6[67 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x284 = arg6[66 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x285 = arg6[69 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x286 = arg6[68 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x287 = arg6[71 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x288 = arg6[70 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x289 = x176 * x175; - Fp x290 = x176 * x174; - Fp x291 = x176 * x173; - Fp x292 = x177 * x172; - Fp x293 = x177 * x171; - Fp x294 = x177 * x170; - Fp x295 = x177 * x169; - Fp x296 = x177 * x168; - Fp x297 = x177 * x167; - Fp x298 = x177 * x166; - Fp x299 = x177 * x165; - Fp x300 = x177 * x164; - Fp x301 = x177 * x163; - Fp x302 = x177 * x162; - Fp x303 = x177 * x161; - Fp x304 = x177 * x160; - Fp x305 = x177 * x159; - Fp x306 = x177 * x158; - Fp x307 = x177 * x157; - Fp x308 = x177 * x156; - Fp x309 = x177 * x155; - Fp x310 = x177 * x154; - Fp x311 = x177 * x153; - Fp x312 = x177 * x152; - Fp x313 = x177 * x151; - Fp x314 = x177 * x150; - Fp x315 = x177 * x149; - Fp x316 = x178 * x148; - Fp x317 = x178 * x147; - Fp x318 = x178 * x146; - Fp x319 = x178 * x145; - Fp x320 = x178 * x144; - Fp x321 = x178 * x143; - Fp x322 = x178 * x142; - Fp x323 = x178 * x141; - Fp x324 = x178 * x140; - Fp x325 = x178 * x139; - Fp x326 = x178 * x138; - Fp x327 = x178 * x137; - Fp x328 = x178 * x136; - Fp x329 = x178 * x135; - Fp x330 = x178 * x134; - Fp x331 = x178 * x133; - Fp x332 = x178 * x132; - Fp x333 = x178 * x131; - Fp x334 = x178 * x130; - Fp x335 = x178 * x129; - Fp x336 = x178 * x128; - Fp x337 = x178 * x127; - Fp x338 = x178 * x126; - Fp x339 = x178 * x125; - Fp x340 = x179 * x124; - Fp x341 = x179 * x123; - Fp x342 = x179 * x122; - Fp x343 = x179 * x121; - Fp x344 = x179 * x120; - Fp x345 = x179 * x119; - Fp x346 = x179 * x118; - Fp x347 = x179 * x117; - Fp x348 = x179 * x116; - Fp x349 = x179 * x115; - Fp x350 = x179 * x114; - Fp x351 = x179 * x113; - Fp x352 = x179 * x112; - Fp x353 = x179 * x111; - Fp x354 = x179 * x110; - Fp x355 = x179 * x109; - Fp x356 = x179 * x108; - Fp x357 = x179 * x107; - Fp x358 = x179 * x106; - Fp x359 = x179 * x105; - Fp x360 = x179 * x104; - Fp x361 = x179 * x103; - Fp x362 = x179 * x102; - Fp x363 = x179 * x101; - Fp x364 = x180 * x100; - Fp x365 = x180 * x99; - Fp x366 = x180 * x98; - Fp x367 = x180 * x97; - Fp x368 = x180 * x96; - Fp x369 = x180 * x95; - Fp x370 = x180 * x94; - Fp x371 = x180 * x93; - Fp x372 = x180 * x92; - Fp x373 = x180 * x91; - Fp x374 = x180 * x90; - Fp x375 = x180 * x89; - Fp x376 = x180 * x88; - Fp x377 = x180 * x87; - Fp x378 = x180 * x86; - Fp x379 = x180 * x85; - Fp x380 = x180 * x84; - Fp x381 = x180 * x83; - Fp x382 = x180 * x82; - Fp x383 = x180 * x81; - Fp x384 = x180 * x80; - Fp x385 = x180 * x79; - Fp x386 = x180 * x78; - Fp x387 = x180 * x77; - Fp x388 = x181 * x76; - Fp x389 = x181 * x75; - Fp x390 = x181 * x74; - Fp x391 = x181 * x73; - Fp x392 = x181 * x72; - Fp x393 = x181 * x71; - Fp x394 = x181 * x70; - Fp x395 = x181 * x69; - Fp x396 = x181 * x68; - Fp x397 = x181 * x67; - Fp x398 = x181 * x66; - Fp x399 = x181 * x65; - Fp x400 = x181 * x64; - Fp x401 = x181 * x63; - Fp x402 = x181 * x62; - Fp x403 = x181 * x61; - Fp x404 = x181 * x60; - Fp x405 = x181 * x59; - Fp x406 = x181 * x58; - Fp x407 = x181 * x57; - Fp x408 = x181 * x56; - Fp x409 = x181 * x55; - Fp x410 = x181 * x54; - Fp x411 = x181 * x53; - Fp x412 = x182 * x52; - Fp x413 = x182 * x51; - Fp x414 = x182 * x50; - Fp x415 = x182 * x49; - Fp x416 = x182 * x48; - Fp x417 = x182 * x47; - Fp x418 = x182 * x46; - Fp x419 = x182 * x45; - Fp x420 = x182 * x44; - Fp x421 = x182 * x43; - Fp x422 = x182 * x42; - Fp x423 = x182 * x41; - Fp x424 = x182 * x40; - Fp x425 = x182 * x39; - Fp x426 = x182 * x38; - Fp x427 = x182 * x37; - Fp x428 = x182 * x36; - Fp x429 = x182 * x35; - Fp x430 = x182 * x34; - Fp x431 = x182 * x33; - Fp x432 = x182 * x32; - Fp x433 = x182 * x31; - Fp x434 = x182 * x30; - Fp x435 = x182 * x29; - Fp x436 = arg0[487]; - Fp x437 = arg0[488]; - Fp x438 = x436 + x437; - Fp x439 = arg0[489]; - Fp x440 = arg0[490]; - Fp x441 = x439 + x440; - Fp x442 = arg0[491]; - Fp x443 = arg0[492]; - Fp x444 = x442 + x443; - Fp x445 = arg0[493]; - Fp x446 = arg0[494]; - Fp x447 = x445 + x446; - Fp x448 = arg0[495]; - Fp x449 = arg0[496]; - Fp x450 = x448 + x449; - Fp x451 = arg0[497]; - Fp x452 = arg0[498]; - Fp x453 = x451 + x452; - Fp x454 = arg0[499]; - Fp x455 = arg0[500]; - Fp x456 = x454 + x455; - Fp x457 = arg0[501]; - Fp x458 = arg0[502]; - Fp x459 = x457 + x458; - Fp x460 = arg0[503]; - Fp x461 = arg0[504]; - Fp x462 = x460 + x461; - Fp x463 = arg0[505]; - Fp x464 = arg0[506]; - Fp x465 = x463 + x464; - Fp x466 = arg0[507]; - Fp x467 = arg0[508]; - Fp x468 = x466 + x467; - Fp x469 = arg0[509]; - Fp x470 = arg0[510]; - Fp x471 = x469 + x470; - Fp x472 = arg0[511]; - Fp x473 = arg0[512]; - Fp x474 = x472 + x473; - Fp x475 = arg0[513]; - Fp x476 = arg0[514]; - Fp x477 = x475 + x476; - Fp x478 = arg0[515]; - Fp x479 = arg0[516]; - Fp x480 = x478 + x479; - Fp x481 = arg0[517]; - Fp x482 = arg0[518]; - Fp x483 = x481 + x482; - Fp x484 = arg0[519]; - Fp x485 = arg0[520]; - Fp x486 = x484 + x485; - Fp x487 = arg0[521]; - Fp x488 = arg0[522]; - Fp x489 = x487 + x488; - Fp x490 = arg0[523]; - Fp x491 = arg0[524]; - Fp x492 = x490 + x491; - Fp x493 = arg0[525]; - Fp x494 = arg0[526]; - Fp x495 = x493 + x494; - Fp x496 = arg0[527]; - Fp x497 = arg0[528]; - Fp x498 = x496 + x497; - Fp x499 = arg0[529]; - Fp x500 = x499 + x289; - Fp x501 = arg0[530]; - Fp x502 = x501 + x290; - Fp x503 = arg0[531]; - Fp x504 = x503 + x291; - Fp x505 = x438 + x292; - Fp x506 = x441 + x293; - Fp x507 = x444 + x294; - Fp x508 = x447 + x295; - Fp x509 = x450 + x296; - Fp x510 = x453 + x297; - Fp x511 = x456 + x298; - Fp x512 = x459 + x299; - Fp x513 = x462 + x300; - Fp x514 = x465 + x301; - Fp x515 = x468 + x302; - Fp x516 = x471 + x303; - Fp x517 = x474 + x304; - Fp x518 = x477 + x305; - Fp x519 = x480 + x306; - Fp x520 = x483 + x307; - Fp x521 = x486 + x308; - Fp x522 = x489 + x309; - Fp x523 = x492 + x310; - Fp x524 = x495 + x311; - Fp x525 = x498 + x312; - Fp x526 = x500 + x313; - Fp x527 = x502 + x314; - Fp x528 = x504 + x315; - Fp x529 = x505 + x316; - Fp x530 = x506 + x317; - Fp x531 = x507 + x318; - Fp x532 = x508 + x319; - Fp x533 = x509 + x320; - Fp x534 = x510 + x321; - Fp x535 = x511 + x322; - Fp x536 = x512 + x323; - Fp x537 = x513 + x324; - Fp x538 = x514 + x325; - Fp x539 = x515 + x326; - Fp x540 = x516 + x327; - Fp x541 = x517 + x328; - Fp x542 = x518 + x329; - Fp x543 = x519 + x330; - Fp x544 = x520 + x331; - Fp x545 = x521 + x332; - Fp x546 = x522 + x333; - Fp x547 = x523 + x334; - Fp x548 = x524 + x335; - Fp x549 = x525 + x336; - Fp x550 = x526 + x337; - Fp x551 = x527 + x338; - Fp x552 = x528 + x339; - Fp x553 = x529 + x340; - Fp x554 = x530 + x341; - Fp x555 = x531 + x342; - Fp x556 = x532 + x343; - Fp x557 = x533 + x344; - Fp x558 = x534 + x345; - Fp x559 = x535 + x346; - Fp x560 = x536 + x347; - Fp x561 = x537 + x348; - Fp x562 = x538 + x349; - Fp x563 = x539 + x350; - Fp x564 = x540 + x351; - Fp x565 = x541 + x352; - Fp x566 = x542 + x353; - Fp x567 = x543 + x354; - Fp x568 = x544 + x355; - Fp x569 = x545 + x356; - Fp x570 = x546 + x357; - Fp x571 = x547 + x358; - Fp x572 = x548 + x359; - Fp x573 = x549 + x360; - Fp x574 = x550 + x361; - Fp x575 = x551 + x362; - Fp x576 = x552 + x363; - Fp x577 = x553 + x364; - Fp x578 = x554 + x365; - Fp x579 = x555 + x366; - Fp x580 = x556 + x367; - Fp x581 = x557 + x368; - Fp x582 = x558 + x369; - Fp x583 = x559 + x370; - Fp x584 = x560 + x371; - Fp x585 = x561 + x372; - Fp x586 = x562 + x373; - Fp x587 = x563 + x374; - Fp x588 = x564 + x375; - Fp x589 = x565 + x376; - Fp x590 = x566 + x377; - Fp x591 = x567 + x378; - Fp x592 = x568 + x379; - Fp x593 = x569 + x380; - Fp x594 = x570 + x381; - Fp x595 = x571 + x382; - Fp x596 = x572 + x383; - Fp x597 = x573 + x384; - Fp x598 = x574 + x385; - Fp x599 = x575 + x386; - Fp x600 = x576 + x387; - Fp x601 = x577 + x388; - Fp x602 = x578 + x389; - Fp x603 = x579 + x390; - Fp x604 = x580 + x391; - Fp x605 = x581 + x392; - Fp x606 = x582 + x393; - Fp x607 = x583 + x394; - Fp x608 = x584 + x395; - Fp x609 = x585 + x396; - Fp x610 = x586 + x397; - Fp x611 = x587 + x398; - Fp x612 = x588 + x399; - Fp x613 = x589 + x400; - Fp x614 = x590 + x401; - Fp x615 = x591 + x402; - Fp x616 = x592 + x403; - Fp x617 = x593 + x404; - Fp x618 = x594 + x405; - Fp x619 = x595 + x406; - Fp x620 = x596 + x407; - Fp x621 = x597 + x408; - Fp x622 = x598 + x409; - Fp x623 = x599 + x410; - Fp x624 = x600 + x411; - Fp x625 = x601 + x412; - Fp x626 = x602 + x413; - Fp x627 = x603 + x414; - Fp x628 = x604 + x415; - Fp x629 = x605 + x416; - Fp x630 = x606 + x417; - Fp x631 = x607 + x418; - Fp x632 = x608 + x419; - Fp x633 = x609 + x420; - Fp x634 = x610 + x421; - Fp x635 = x611 + x422; - Fp x636 = x612 + x423; - Fp x637 = x613 + x424; - Fp x638 = x614 + x425; - Fp x639 = x615 + x426; - Fp x640 = x616 + x427; - Fp x641 = x617 + x428; - Fp x642 = x618 + x429; - Fp x643 = x619 + x430; - Fp x644 = x620 + x431; - Fp x645 = x621 + x432; - Fp x646 = x622 + x433; - Fp x647 = x623 + x434; - Fp x648 = x624 + x435; - Fp x649 = x183 + x625; - Fp x650 = x649 * x649; - Fp x651 = x650 * x649; - Fp x652 = x651 - x184; - FpExt x653 = arg1 + poly_mix[22] * x652; - Fp x654 = x184 * x184; - arg0[557] = x654; - Fp x655 = x654 * x649; - Fp x656 = x655 - x185; - FpExt x657 = x653 + poly_mix[23] * x656; - Fp x658 = x186 + x626; - Fp x659 = x658 * x658; - Fp x660 = x659 * x658; - Fp x661 = x660 - x187; - FpExt x662 = x657 + poly_mix[24] * x661; - Fp x663 = x187 * x187; - arg0[565] = x663; - Fp x664 = x663 * x658; - Fp x665 = x664 - x188; - FpExt x666 = x662 + poly_mix[25] * x665; - Fp x667 = x189 + x627; - Fp x668 = x667 * x667; - Fp x669 = x668 * x667; - Fp x670 = x669 - x190; - FpExt x671 = x666 + poly_mix[26] * x670; - Fp x672 = x190 * x190; - arg0[566] = x672; - Fp x673 = x672 * x667; - Fp x674 = x673 - x191; - FpExt x675 = x671 + poly_mix[27] * x674; - Fp x676 = x192 + x628; - Fp x677 = x676 * x676; - Fp x678 = x677 * x676; - Fp x679 = x678 - x193; - FpExt x680 = x675 + poly_mix[28] * x679; - Fp x681 = x193 * x193; - arg0[567] = x681; - Fp x682 = x681 * x676; - Fp x683 = x682 - x194; - FpExt x684 = x680 + poly_mix[29] * x683; - Fp x685 = x195 + x629; - Fp x686 = x685 * x685; - Fp x687 = x686 * x685; - Fp x688 = x687 - x196; - FpExt x689 = x684 + poly_mix[30] * x688; - Fp x690 = x196 * x196; - arg0[568] = x690; - Fp x691 = x690 * x685; - Fp x692 = x691 - x197; - FpExt x693 = x689 + poly_mix[31] * x692; - Fp x694 = x198 + x630; - Fp x695 = x694 * x694; - Fp x696 = x695 * x694; - Fp x697 = x696 - x199; - FpExt x698 = x693 + poly_mix[32] * x697; - Fp x699 = x199 * x199; - arg0[569] = x699; - Fp x700 = x699 * x694; - Fp x701 = x700 - x200; - FpExt x702 = x698 + poly_mix[33] * x701; - Fp x703 = x201 + x631; - Fp x704 = x703 * x703; - Fp x705 = x704 * x703; - Fp x706 = x705 - x202; - FpExt x707 = x702 + poly_mix[34] * x706; - Fp x708 = x202 * x202; - arg0[570] = x708; - Fp x709 = x708 * x703; - Fp x710 = x709 - x203; - FpExt x711 = x707 + poly_mix[35] * x710; - Fp x712 = x204 + x632; - Fp x713 = x712 * x712; - Fp x714 = x713 * x712; - Fp x715 = x714 - x205; - FpExt x716 = x711 + poly_mix[36] * x715; - Fp x717 = x205 * x205; - arg0[571] = x717; - Fp x718 = x717 * x712; - Fp x719 = x718 - x206; - FpExt x720 = x716 + poly_mix[37] * x719; - Fp x721 = x207 + x633; - Fp x722 = x721 * x721; - Fp x723 = x722 * x721; - Fp x724 = x723 - x208; - FpExt x725 = x720 + poly_mix[38] * x724; - Fp x726 = x208 * x208; - arg0[572] = x726; - Fp x727 = x726 * x721; - Fp x728 = x727 - x209; - FpExt x729 = x725 + poly_mix[39] * x728; - Fp x730 = x210 + x634; - Fp x731 = x730 * x730; - Fp x732 = x731 * x730; - Fp x733 = x732 - x211; - FpExt x734 = x729 + poly_mix[40] * x733; - Fp x735 = x211 * x211; - arg0[573] = x735; - Fp x736 = x735 * x730; - Fp x737 = x736 - x212; - FpExt x738 = x734 + poly_mix[41] * x737; - Fp x739 = x213 + x635; - Fp x740 = x739 * x739; - Fp x741 = x740 * x739; - Fp x742 = x741 - x214; - FpExt x743 = x738 + poly_mix[42] * x742; - Fp x744 = x214 * x214; - arg0[574] = x744; - Fp x745 = x744 * x739; - Fp x746 = x745 - x215; - FpExt x747 = x743 + poly_mix[43] * x746; - Fp x748 = x216 + x636; - Fp x749 = x748 * x748; - Fp x750 = x749 * x748; - Fp x751 = x750 - x217; - FpExt x752 = x747 + poly_mix[44] * x751; - Fp x753 = x217 * x217; - arg0[575] = x753; - Fp x754 = x753 * x748; - Fp x755 = x754 - x218; - FpExt x756 = x752 + poly_mix[45] * x755; - Fp x757 = x219 + x637; - Fp x758 = x757 * x757; - Fp x759 = x758 * x757; - Fp x760 = x759 - x220; - FpExt x761 = x756 + poly_mix[46] * x760; - Fp x762 = x220 * x220; - arg0[600] = x762; - Fp x763 = x762 * x757; - Fp x764 = x763 - x221; - FpExt x765 = x761 + poly_mix[47] * x764; - Fp x766 = x222 + x638; - Fp x767 = x766 * x766; - Fp x768 = x767 * x766; - Fp x769 = x768 - x223; - FpExt x770 = x765 + poly_mix[48] * x769; - Fp x771 = x223 * x223; - arg0[601] = x771; - Fp x772 = x771 * x766; - Fp x773 = x772 - x224; - FpExt x774 = x770 + poly_mix[49] * x773; - Fp x775 = x225 + x639; - Fp x776 = x775 * x775; - Fp x777 = x776 * x775; - Fp x778 = x777 - x226; - FpExt x779 = x774 + poly_mix[50] * x778; - Fp x780 = x226 * x226; - arg0[602] = x780; - Fp x781 = x780 * x775; - Fp x782 = x781 - x227; - FpExt x783 = x779 + poly_mix[51] * x782; - Fp x784 = x228 + x640; - Fp x785 = x784 * x784; - Fp x786 = x785 * x784; - Fp x787 = x786 - x229; - FpExt x788 = x783 + poly_mix[52] * x787; - Fp x789 = x229 * x229; - arg0[603] = x789; - Fp x790 = x789 * x784; - Fp x791 = x790 - x230; - FpExt x792 = x788 + poly_mix[53] * x791; - Fp x793 = x231 + x641; - Fp x794 = x793 * x793; - Fp x795 = x794 * x793; - Fp x796 = x795 - x232; - FpExt x797 = x792 + poly_mix[54] * x796; - Fp x798 = x232 * x232; - arg0[604] = x798; - Fp x799 = x798 * x793; - Fp x800 = x799 - x233; - FpExt x801 = x797 + poly_mix[55] * x800; - Fp x802 = x234 + x642; - Fp x803 = x802 * x802; - Fp x804 = x803 * x802; - Fp x805 = x804 - x235; - FpExt x806 = x801 + poly_mix[56] * x805; - Fp x807 = x235 * x235; - arg0[605] = x807; - Fp x808 = x807 * x802; - Fp x809 = x808 - x236; - FpExt x810 = x806 + poly_mix[57] * x809; - Fp x811 = x237 + x643; - Fp x812 = x811 * x811; - Fp x813 = x812 * x811; - Fp x814 = x813 - x238; - FpExt x815 = x810 + poly_mix[58] * x814; - Fp x816 = x238 * x238; - Fp x817 = x816 * x811; - Fp x818 = x817 - x239; - FpExt x819 = x815 + poly_mix[59] * x818; - Fp x820 = x240 + x644; - Fp x821 = x820 * x820; - Fp x822 = x821 * x820; - Fp x823 = x822 - x241; - FpExt x824 = x819 + poly_mix[60] * x823; - Fp x825 = x241 * x241; - Fp x826 = x825 * x820; - Fp x827 = x826 - x242; - FpExt x828 = x824 + poly_mix[61] * x827; - Fp x829 = x243 + x645; - Fp x830 = x829 * x829; - Fp x831 = x830 * x829; - Fp x832 = x831 - x244; - FpExt x833 = x828 + poly_mix[62] * x832; - Fp x834 = x244 * x244; - Fp x835 = x834 * x829; - Fp x836 = x835 - x245; - FpExt x837 = x833 + poly_mix[63] * x836; - Fp x838 = x246 + x646; - Fp x839 = x838 * x838; - Fp x840 = x839 * x838; - Fp x841 = x840 - x247; - FpExt x842 = x837 + poly_mix[64] * x841; - Fp x843 = x247 * x247; - Fp x844 = x843 * x838; - Fp x845 = x844 - x248; - FpExt x846 = x842 + poly_mix[65] * x845; - Fp x847 = x249 + x647; - Fp x848 = x847 * x847; - Fp x849 = x848 * x847; - Fp x850 = x849 - x250; - FpExt x851 = x846 + poly_mix[66] * x850; - Fp x852 = x250 * x250; - Fp x853 = x852 * x847; - Fp x854 = x853 - x251; - FpExt x855 = x851 + poly_mix[67] * x854; - Fp x856 = x252 + x648; - Fp x857 = x856 * x856; - Fp x858 = x857 * x856; - Fp x859 = x858 - x253; - FpExt x860 = x855 + poly_mix[68] * x859; - Fp x861 = x253 * x253; - Fp x862 = x861 * x856; - Fp x863 = x862 - x254; - FpExt x864 = x860 + poly_mix[69] * x863; - Fp x865 = x185 + x188; - Fp x866 = x191 + x194; - Fp x867 = x188 * x28; - Fp x868 = x867 + x866; - Fp x869 = arg0[532]; - Fp x870 = x869 + x865; - Fp x871 = x866 * x27; - Fp x872 = x871 + x870; - Fp x873 = x865 * x27; - Fp x874 = x873 + x868; - Fp x875 = x870 + x874; - Fp x876 = x868 + x872; - Fp x877 = x197 + x200; - Fp x878 = x203 + x206; - Fp x879 = x200 * x28; - Fp x880 = x879 + x878; - Fp x881 = arg0[533]; - Fp x882 = x881 + x877; - Fp x883 = x878 * x27; - Fp x884 = x883 + x882; - Fp x885 = x877 * x27; - Fp x886 = x885 + x880; - Fp x887 = x882 + x886; - Fp x888 = x880 + x884; - Fp x889 = x209 + x212; - Fp x890 = x215 + x218; - Fp x891 = x212 * x28; - Fp x892 = x891 + x890; - Fp x893 = x218 * x28; - Fp x894 = x893 + x889; - Fp x895 = x890 * x27; - Fp x896 = x895 + x894; - Fp x897 = x889 * x27; - Fp x898 = x897 + x892; - Fp x899 = x894 + x898; - Fp x900 = x892 + x896; - Fp x901 = x221 + x224; - Fp x902 = x227 + x230; - Fp x903 = arg0[534]; - Fp x904 = x903 + x902; - Fp x905 = x230 * x28; - Fp x906 = x905 + x901; - Fp x907 = x902 * x27; - Fp x908 = x907 + x906; - Fp x909 = x901 * x27; - Fp x910 = x909 + x904; - Fp x911 = x906 + x910; - Fp x912 = x904 + x908; - Fp x913 = x233 + x236; - Fp x914 = x239 + x242; - Fp x915 = x236 * x28; - Fp x916 = x915 + x914; - Fp x917 = x242 * x28; - Fp x918 = x917 + x913; - Fp x919 = x914 * x27; - Fp x920 = x919 + x918; - Fp x921 = x913 * x27; - Fp x922 = x921 + x916; - Fp x923 = x918 + x922; - Fp x924 = x916 + x920; - Fp x925 = x245 + x248; - Fp x926 = x251 + x254; - Fp x927 = x248 * x28; - Fp x928 = x927 + x926; - Fp x929 = x254 * x28; - Fp x930 = x929 + x925; - Fp x931 = x926 * x27; - Fp x932 = x931 + x930; - Fp x933 = x925 * x27; - Fp x934 = x933 + x928; - Fp x935 = x930 + x934; - Fp x936 = x928 + x932; - Fp x937 = x875 + x887; - Fp x938 = x874 + x886; - Fp x939 = x876 + x888; - Fp x940 = x872 + x884; - Fp x941 = x937 + x899; - Fp x942 = x938 + x898; - Fp x943 = x939 + x900; - Fp x944 = x940 + x896; - Fp x945 = x941 + x911; - Fp x946 = x942 + x910; - Fp x947 = x943 + x912; - Fp x948 = x944 + x908; - Fp x949 = x945 + x923; - Fp x950 = x946 + x922; - Fp x951 = x947 + x924; - Fp x952 = x948 + x920; - Fp x953 = x949 + x935; - Fp x954 = x950 + x934; - Fp x955 = x951 + x936; - Fp x956 = x952 + x932; - Fp x957 = x875 + x953; - Fp x958 = x874 + x954; - Fp x959 = x876 + x955; - Fp x960 = x872 + x956; - Fp x961 = x887 + x953; - Fp x962 = x886 + x954; - Fp x963 = x888 + x955; - Fp x964 = x884 + x956; - Fp x965 = x899 + x953; - Fp x966 = x898 + x954; - Fp x967 = x900 + x955; - Fp x968 = x896 + x956; - Fp x969 = x911 + x953; - Fp x970 = x910 + x954; - Fp x971 = x912 + x955; - Fp x972 = x908 + x956; - Fp x973 = x923 + x953; - Fp x974 = x922 + x954; - Fp x975 = x924 + x955; - Fp x976 = x920 + x956; - Fp x977 = x935 + x953; - Fp x978 = x934 + x954; - Fp x979 = x936 + x955; - Fp x980 = x932 + x956; - Fp x981 = arg0[376]; - FpExt x982 = x864 + poly_mix[70] * x981; - Fp x983 = arg0[377]; - FpExt x984 = x982 + poly_mix[71] * x983; - Fp x985 = arg0[378]; - FpExt x986 = x984 + poly_mix[72] * x985; - Fp x987 = arg0[379]; - FpExt x988 = x986 + poly_mix[73] * x987; - Fp x989 = arg0[380]; - FpExt x990 = x988 + poly_mix[74] * x989; - Fp x991 = arg0[381]; - FpExt x992 = x990 + poly_mix[75] * x991; - Fp x993 = arg0[535]; - Fp x994 = x993 - x255; - FpExt x995 = x992 + poly_mix[76] * x994; - Fp x996 = arg0[536]; - Fp x997 = x996 - x256; - FpExt x998 = x995 + poly_mix[77] * x997; - Fp x999 = arg0[537]; - FpExt x1000 = x998 + poly_mix[78] * x999; - Fp x1001 = arg0[538]; - Fp x1002 = x1001 - x257; - FpExt x1003 = x1000 + poly_mix[79] * x1002; - Fp x1004 = arg0[384]; - FpExt x1005 = x1003 + poly_mix[80] * x1004; - Fp x1006 = x957 - x258; - FpExt x1007 = x1005 + poly_mix[81] * x1006; - Fp x1008 = x958 - x259; - FpExt x1009 = x1007 + poly_mix[82] * x1008; - Fp x1010 = x959 - x260; - FpExt x1011 = x1009 + poly_mix[83] * x1010; - Fp x1012 = x960 - x261; - FpExt x1013 = x1011 + poly_mix[84] * x1012; - Fp x1014 = x961 - x262; - FpExt x1015 = x1013 + poly_mix[85] * x1014; - Fp x1016 = x962 - x263; - FpExt x1017 = x1015 + poly_mix[86] * x1016; - Fp x1018 = x963 - x264; - FpExt x1019 = x1017 + poly_mix[87] * x1018; - Fp x1020 = x964 - x265; - FpExt x1021 = x1019 + poly_mix[88] * x1020; - Fp x1022 = x965 - x266; - FpExt x1023 = x1021 + poly_mix[89] * x1022; - Fp x1024 = x966 - x267; - FpExt x1025 = x1023 + poly_mix[90] * x1024; - Fp x1026 = x967 - x268; - FpExt x1027 = x1025 + poly_mix[91] * x1026; - Fp x1028 = x968 - x269; - FpExt x1029 = x1027 + poly_mix[92] * x1028; - Fp x1030 = x969 - x270; - FpExt x1031 = x1029 + poly_mix[93] * x1030; - Fp x1032 = x970 - x271; - FpExt x1033 = x1031 + poly_mix[94] * x1032; - Fp x1034 = x971 - x272; - FpExt x1035 = x1033 + poly_mix[95] * x1034; - Fp x1036 = x972 - x273; - FpExt x1037 = x1035 + poly_mix[96] * x1036; - Fp x1038 = x973 - x274; - FpExt x1039 = x1037 + poly_mix[97] * x1038; - Fp x1040 = x974 - x275; - FpExt x1041 = x1039 + poly_mix[98] * x1040; - Fp x1042 = x975 - x276; - FpExt x1043 = x1041 + poly_mix[99] * x1042; - Fp x1044 = x976 - x277; - FpExt x1045 = x1043 + poly_mix[100] * x1044; - Fp x1046 = x977 - x278; - FpExt x1047 = x1045 + poly_mix[101] * x1046; - Fp x1048 = x978 - x279; - FpExt x1049 = x1047 + poly_mix[102] * x1048; - Fp x1050 = x979 - x280; - FpExt x1051 = x1049 + poly_mix[103] * x1050; - Fp x1052 = x980 - x281; - FpExt x1053 = x1051 + poly_mix[104] * x1052; - FpExt x1054 = arg2[1]; - FpExt x1055 = arg2[0]; - FpExt x1056 = x1054 - x1055; - arg2[3] = x1056; - FpExt x1057 = x1053 + poly_mix[105] * x1056; - FpExt x1058 = arg3 + x282 * x1057 * poly_mix[0]; - Fp x1059 = x183 + x26; - Fp x1060 = x1059 * x1059; - Fp x1061 = x1060 * x1059; - Fp x1062 = x1061 - x283; - FpExt x1063 = arg3 + poly_mix[0] * x1062; - Fp x1064 = x283 * x283; - Fp x1065 = x1064 * x1059; - Fp x1066 = x1065 - x284; - FpExt x1067 = x1063 + poly_mix[1] * x1066; - Fp x1068 = x284 + x186; - Fp x1069 = x1068 + x189; - Fp x1070 = x1069 + x192; - Fp x1071 = x1070 + x195; - Fp x1072 = x1071 + x198; - Fp x1073 = x1072 + x201; - Fp x1074 = x1073 + x204; - Fp x1075 = x1074 + x207; - Fp x1076 = x1075 + x210; - Fp x1077 = x1076 + x213; - Fp x1078 = x1077 + x216; - Fp x1079 = x1078 + x219; - Fp x1080 = x1079 + x222; - Fp x1081 = x1080 + x225; - Fp x1082 = x1081 + x228; - Fp x1083 = x1082 + x231; - Fp x1084 = x1083 + x234; - Fp x1085 = x1084 + x237; - Fp x1086 = x1085 + x240; - Fp x1087 = x1086 + x243; - Fp x1088 = x1087 + x246; - Fp x1089 = x1088 + x249; - Fp x1090 = x1089 + x252; - Fp x1091 = x284 * x25; - Fp x1092 = x1090 + x1091; - Fp x1093 = x186 * x24; - Fp x1094 = x1090 + x1093; - Fp x1095 = x189 * x23; - Fp x1096 = x1090 + x1095; - Fp x1097 = x192 * x22; - Fp x1098 = x1090 + x1097; - Fp x1099 = x195 * x21; - Fp x1100 = x1090 + x1099; - Fp x1101 = x198 * x20; - Fp x1102 = x1090 + x1101; - Fp x1103 = x201 * x19; - Fp x1104 = x1090 + x1103; - Fp x1105 = x204 * x18; - Fp x1106 = x1090 + x1105; - Fp x1107 = x207 * x17; - Fp x1108 = x1090 + x1107; - Fp x1109 = x210 * x16; - Fp x1110 = x1090 + x1109; - Fp x1111 = x213 * x15; - Fp x1112 = x1090 + x1111; - Fp x1113 = x216 * x14; - Fp x1114 = x1090 + x1113; - Fp x1115 = x219 * x13; - Fp x1116 = x1090 + x1115; - Fp x1117 = x222 * x12; - Fp x1118 = x1090 + x1117; - Fp x1119 = x225 * x11; - Fp x1120 = x1090 + x1119; - Fp x1121 = x228 * x10; - Fp x1122 = x1090 + x1121; - Fp x1123 = x231 * x9; - Fp x1124 = x1090 + x1123; - Fp x1125 = x234 * x8; - Fp x1126 = x1090 + x1125; - Fp x1127 = x237 * x7; - Fp x1128 = x1090 + x1127; - Fp x1129 = x240 * x6; - Fp x1130 = x1090 + x1129; - Fp x1131 = x243 * x5; - Fp x1132 = x1090 + x1131; - Fp x1133 = x246 * x4; - Fp x1134 = x1090 + x1133; - Fp x1135 = x249 * x3; - Fp x1136 = x1090 + x1135; - Fp x1137 = x252 * x2; - Fp x1138 = x1090 + x1137; - Fp x1139 = x1092 + x1; - Fp x1140 = x1139 * x1139; - Fp x1141 = x1140 * x1139; - Fp x1142 = x1141 - x285; - FpExt x1143 = x1067 + poly_mix[2] * x1142; - Fp x1144 = x285 * x285; - Fp x1145 = x1144 * x1139; - Fp x1146 = x1145 - x286; - FpExt x1147 = x1143 + poly_mix[3] * x1146; - Fp x1148 = x286 + x1094; - Fp x1149 = x1148 + x1096; - Fp x1150 = x1149 + x1098; - Fp x1151 = x1150 + x1100; - Fp x1152 = x1151 + x1102; - Fp x1153 = x1152 + x1104; - Fp x1154 = x1153 + x1106; - Fp x1155 = x1154 + x1108; - Fp x1156 = x1155 + x1110; - Fp x1157 = x1156 + x1112; - Fp x1158 = x1157 + x1114; - Fp x1159 = x1158 + x1116; - Fp x1160 = x1159 + x1118; - Fp x1161 = x1160 + x1120; - Fp x1162 = x1161 + x1122; - Fp x1163 = x1162 + x1124; - Fp x1164 = x1163 + x1126; - Fp x1165 = x1164 + x1128; - Fp x1166 = x1165 + x1130; - Fp x1167 = x1166 + x1132; - Fp x1168 = x1167 + x1134; - Fp x1169 = x1168 + x1136; - Fp x1170 = x1169 + x1138; - Fp x1171 = x286 * x25; - Fp x1172 = x1170 + x1171; - Fp x1173 = x1094 * x24; - Fp x1174 = x1170 + x1173; - Fp x1175 = x1096 * x23; - Fp x1176 = x1170 + x1175; - Fp x1177 = x1098 * x22; - Fp x1178 = x1170 + x1177; - Fp x1179 = x1100 * x21; - Fp x1180 = x1170 + x1179; - Fp x1181 = x1102 * x20; - Fp x1182 = x1170 + x1181; - Fp x1183 = x1104 * x19; - Fp x1184 = x1170 + x1183; - Fp x1185 = x1106 * x18; - Fp x1186 = x1170 + x1185; - Fp x1187 = x1108 * x17; - Fp x1188 = x1170 + x1187; - Fp x1189 = x1110 * x16; - Fp x1190 = x1170 + x1189; - arg0[541] = x1190; - Fp x1191 = x1112 * x15; - Fp x1192 = x1170 + x1191; - arg0[542] = x1192; - Fp x1193 = x1114 * x14; - Fp x1194 = x1170 + x1193; - arg0[543] = x1194; - Fp x1195 = x1116 * x13; - Fp x1196 = x1170 + x1195; - arg0[544] = x1196; - Fp x1197 = x1118 * x12; - Fp x1198 = x1170 + x1197; - arg0[545] = x1198; - Fp x1199 = x1120 * x11; - Fp x1200 = x1170 + x1199; - arg0[546] = x1200; - Fp x1201 = x1122 * x10; - Fp x1202 = x1170 + x1201; - arg0[547] = x1202; - Fp x1203 = x1124 * x9; - Fp x1204 = x1170 + x1203; - arg0[548] = x1204; - Fp x1205 = x1126 * x8; - Fp x1206 = x1170 + x1205; - arg0[549] = x1206; - Fp x1207 = x1128 * x7; - Fp x1208 = x1170 + x1207; - arg0[550] = x1208; - Fp x1209 = x1130 * x6; - Fp x1210 = x1170 + x1209; - arg0[551] = x1210; - Fp x1211 = x1132 * x5; - Fp x1212 = x1170 + x1211; - arg0[552] = x1212; - Fp x1213 = x1134 * x4; - Fp x1214 = x1170 + x1213; - arg0[553] = x1214; - Fp x1215 = x1136 * x3; - Fp x1216 = x1170 + x1215; - arg0[554] = x1216; - Fp x1217 = x1138 * x2; - Fp x1218 = x1170 + x1217; - arg0[555] = x1218; - Fp x1219 = x1172 + x0; - Fp x1220 = x1219 * x1219; - Fp x1221 = x1220 * x1219; - Fp x1222 = x1221 - x287; - FpExt x1223 = x1147 + poly_mix[4] * x1222; - Fp x1224 = x287 * x287; - Fp x1225 = x1224 * x1219; - Fp x1226 = x1225 - x288; - FpExt x1227 = x1223 + poly_mix[5] * x1226; - Fp x1228 = x288 + x1174; - Fp x1229 = x1228 + x1176; - Fp x1230 = x1229 + x1178; - Fp x1231 = x1230 + x1180; - Fp x1232 = x1231 + x1182; - Fp x1233 = x1232 + x1184; - Fp x1234 = x1233 + x1186; - Fp x1235 = x1234 + x1188; - Fp x1236 = x1235 + x1190; - Fp x1237 = x1236 + x1192; - Fp x1238 = x1237 + x1194; - Fp x1239 = x1238 + x1196; - Fp x1240 = x1239 + x1198; - Fp x1241 = x1240 + x1200; - Fp x1242 = x1241 + x1202; - Fp x1243 = x1242 + x1204; - Fp x1244 = x1243 + x1206; - Fp x1245 = x1244 + x1208; - Fp x1246 = x1245 + x1210; - Fp x1247 = x1246 + x1212; - Fp x1248 = x1247 + x1214; - Fp x1249 = x1248 + x1216; - Fp x1250 = x1249 + x1218; - arg0[539] = x1250; - Fp x1251 = x288 * x25; - Fp x1252 = x1250 + x1251; - arg0[556] = x1252; - Fp x1253 = x1174 * x24; - Fp x1254 = x1250 + x1253; - arg0[558] = x1254; - Fp x1255 = x1176 * x23; - Fp x1256 = x1250 + x1255; - arg0[559] = x1256; - Fp x1257 = x1178 * x22; - Fp x1258 = x1250 + x1257; - arg0[560] = x1258; - Fp x1259 = x1180 * x21; - Fp x1260 = x1250 + x1259; - arg0[561] = x1260; - Fp x1261 = x1182 * x20; - Fp x1262 = x1250 + x1261; - arg0[562] = x1262; - Fp x1263 = x1184 * x19; - Fp x1264 = x1250 + x1263; - arg0[563] = x1264; - Fp x1265 = x1186 * x18; - Fp x1266 = x1250 + x1265; - arg0[564] = x1266; - Fp x1267 = x1188 * x17; - arg0[540] = x1267; - auto x1268 = rv32im_v2_3(idx, size, arg0, x1227, arg2, x1058, arg4, arg5, arg3, arg6, arg7, arg8); - - return x1268; -} -__device__ FpExt rv32im_v2_0(uint32_t idx, - uint32_t size, - FpExt* arg0, - FpExt arg1, - FpExt arg2, - FpExt arg3, - const Fp* arg4, - const Fp* arg5) { - uint32_t mask = size - 1; - FpExt x0{0, 1, 0, 0}; - Fp x1 = arg4[27 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x2 = arg4[113 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x3 = arg4[29 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x4 = arg4[34 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x5 = arg4[33 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x6 = arg4[31 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x7 = arg4[115 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x8 = arg4[117 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x9 = arg4[118 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x10 = arg4[119 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x11 = arg4[116 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x12 = arg4[121 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x13 = arg4[122 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x14 = arg4[124 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x15 = arg4[123 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x16 = arg4[120 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x17 = arg4[126 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x18 = arg4[125 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x19 = arg4[129 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x20 = arg4[128 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x21 = arg4[7 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x22 = arg4[28 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x23 = arg4[30 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x24 = arg4[178 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x25 = arg4[32 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x26 = arg4[36 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x27 = arg4[37 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x28 = arg4[38 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x29 = arg4[39 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x30 = arg4[41 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x31 = arg4[42 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x32 = arg4[40 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x33 = arg4[35 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x34 = arg4[44 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x35 = arg4[45 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x36 = arg4[46 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x37 = arg4[47 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x38 = arg4[43 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x39 = arg4[49 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x40 = arg4[50 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x41 = arg4[53 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x42 = arg4[54 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x43 = arg4[55 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x44 = arg4[51 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x45 = arg4[48 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x46 = arg4[57 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x47 = arg4[58 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x48 = arg4[56 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x49 = arg4[60 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x50 = arg4[64 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x51 = arg4[59 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x52 = arg4[68 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x53 = arg4[67 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x54 = arg4[76 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x55 = arg4[77 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x56 = arg4[78 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x57 = arg4[79 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x58 = arg4[75 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x59 = arg4[72 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x60 = arg4[81 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x61 = arg4[82 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x62 = arg4[80 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x63 = arg4[84 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x64 = arg4[85 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x65 = arg4[88 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x66 = arg4[83 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x67 = arg4[92 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x68 = arg4[91 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x69 = arg4[94 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x70 = arg4[96 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x71 = arg4[95 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x72 = arg4[93 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x73 = arg4[97 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x74 = arg4[100 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x75 = arg4[102 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x76 = arg4[101 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x77 = arg4[99 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x78 = arg4[103 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x79 = arg4[106 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x80 = arg4[108 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x81 = arg4[107 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x82 = arg4[105 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x83 = arg4[110 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x84 = arg4[109 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x85 = arg4[112 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x86 = arg4[114 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x87 = arg4[111 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x88 = arg4[127 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x89 = arg4[130 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x90 = arg4[132 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x91 = arg4[131 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x92 = arg4[134 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x93 = arg4[133 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x94 = arg4[136 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x95 = arg4[138 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x96 = arg4[137 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x97 = arg4[135 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x98 = arg4[140 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x99 = arg4[139 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x100 = arg5[55 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x101 = arg5[54 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x102 = arg5[53 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x103 = arg5[52 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x104 = arg4[142 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x105 = arg4[144 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x106 = arg4[143 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x107 = arg4[141 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x108 = arg4[146 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x109 = arg4[145 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x110 = arg5[59 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x111 = arg5[58 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x112 = arg5[57 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x113 = arg5[56 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x114 = arg4[148 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x115 = arg4[150 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x116 = arg4[149 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x117 = arg4[147 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x118 = arg4[152 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x119 = arg4[151 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x120 = arg5[63 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x121 = arg5[62 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x122 = arg5[61 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x123 = arg5[60 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x124 = arg4[154 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x125 = arg4[156 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x126 = arg4[155 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x127 = arg4[153 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x128 = arg4[158 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x129 = arg4[157 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x130 = arg5[67 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x131 = arg5[66 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x132 = arg5[65 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x133 = arg5[64 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x134 = arg4[160 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x135 = arg4[162 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x136 = arg4[161 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x137 = arg4[159 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x138 = arg4[164 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x139 = arg4[163 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x140 = arg5[71 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x141 = arg5[70 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x142 = arg5[69 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x143 = arg5[68 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x144 = arg4[166 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x145 = arg4[168 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x146 = arg4[167 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x147 = arg4[165 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x148 = arg4[170 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x149 = arg4[169 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x150 = arg4[8 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x151 = arg4[62 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x152 = arg4[61 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x153 = arg4[65 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x154 = arg4[63 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x155 = arg4[70 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x156 = arg4[69 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x157 = arg4[9 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x158 = arg4[71 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x159 = arg4[66 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x160 = arg4[74 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x161 = arg4[86 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x162 = arg4[89 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x163 = arg4[87 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x164 = arg4[90 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x165 = arg4[98 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x166 = arg4[104 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x167 = arg4[171 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x168 = arg4[173 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x169 = arg4[172 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x170 = arg4[175 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x171 = arg4[174 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x172 = arg4[177 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x173 = arg4[179 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x174 = arg4[176 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x175 = arg4[181 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x176 = arg4[180 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x177 = arg4[191 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x178 = arg4[10 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x179 = arg4[11 * size + ((idx - INV_RATE * 0) & mask)]; - FpExt x180 = arg0[26]; - FpExt x181 = arg0[27]; - FpExt x182 = x180 * x181; - FpExt x183 = arg0[28]; - FpExt x184 = arg0[29]; - FpExt x185 = x183 * x184; - FpExt x186 = arg0[30]; - FpExt x187 = x185 - x186; - FpExt x188 = x187 - x182; - FpExt x189 = arg0[31]; - FpExt x190 = x188 - x189; - FpExt x191 = arg1 + poly_mix[5] * x190; - FpExt x192 = arg0[32]; - FpExt x193 = arg0[33]; - FpExt x194 = x192 * x193; - FpExt x195 = x192 * x1; - FpExt x196 = x2 * x193; - FpExt x197 = arg0[34]; - FpExt x198 = x194 * x197; - FpExt x199 = x194 * x3; - FpExt x200 = x196 * x197; - FpExt x201 = x195 * x197; - FpExt x202 = arg0[35]; - FpExt x203 = x202 * x198; - FpExt x204 = x203 - x200; - FpExt x205 = x204 - x201; - FpExt x206 = x205 - x199; - FpExt x207 = x191 + poly_mix[6] * x206; - FpExt x208 = arg0[36]; - FpExt x209 = x208 * x4; - FpExt x210 = arg0[11]; - FpExt x211 = x209 + x210; - FpExt x212 = arg0[37]; - FpExt x213 = x212 * x211; - FpExt x214 = x212 * x5; - FpExt x215 = x6 * x211; - FpExt x216 = arg0[12]; - FpExt x217 = x216 * x7; - FpExt x218 = arg0[13]; - FpExt x219 = x218 * x8; - FpExt x220 = x217 + x219; - FpExt x221 = arg0[14]; - FpExt x222 = x221 * x9; - FpExt x223 = x220 + x222; - FpExt x224 = arg0[15]; - FpExt x225 = x224 * x10; - FpExt x226 = x223 + x225; - FpExt x227 = x226 + x210; - FpExt x228 = x213 * x227; - FpExt x229 = x213 * x11; - FpExt x230 = x215 * x227; - FpExt x231 = x214 * x227; - FpExt x232 = arg0[38]; - FpExt x233 = x232 * x228; - FpExt x234 = x233 - x230; - FpExt x235 = x234 - x231; - FpExt x236 = x235 - x229; - FpExt x237 = x207 + poly_mix[7] * x236; - FpExt x238 = arg0[16]; - FpExt x239 = x217 + x238; - FpExt x240 = x221 * x12; - FpExt x241 = x239 + x240; - FpExt x242 = x224 * x13; - FpExt x243 = x241 + x242; - FpExt x244 = x243 + x210; - FpExt x245 = arg0[10]; - FpExt x246 = x245 * x14; - FpExt x247 = x246 + x210; - FpExt x248 = x244 * x247; - FpExt x249 = x244 * x15; - FpExt x250 = x16 * x247; - FpExt x251 = arg0[17]; - FpExt x252 = x251 * x17; - FpExt x253 = x252 + x210; - FpExt x254 = x248 * x253; - FpExt x255 = x248 * x18; - FpExt x256 = x250 * x253; - FpExt x257 = x249 * x253; - FpExt x258 = arg0[39]; - FpExt x259 = x258 * x254; - FpExt x260 = x259 - x256; - FpExt x261 = x260 - x257; - FpExt x262 = x261 - x255; - FpExt x263 = x237 + poly_mix[8] * x262; - FpExt x264 = x251 * x19; - FpExt x265 = x264 + x210; - FpExt x266 = arg0[40]; - FpExt x267 = x266 * x265; - FpExt x268 = x267 - x20; - FpExt x269 = x263 + poly_mix[9] * x268; - FpExt x270 = arg0[41]; - FpExt x271 = arg0[42]; - FpExt x272 = x270 - x271; - FpExt x273 = x269 + poly_mix[10] * x272; - FpExt x274 = arg2 + x21 * x273 * poly_mix[406]; - FpExt x275 = x216 * x22; - FpExt x276 = x218 * x3; - FpExt x277 = x275 + x276; - FpExt x278 = x221 * x23; - FpExt x279 = x277 + x278; - FpExt x280 = x224 * x6; - FpExt x281 = x279 + x280; - FpExt x282 = x281 + x210; - FpExt x283 = arg0[18]; - FpExt x284 = x283 * x282; - FpExt x285 = x283 * x1; - FpExt x286 = x24 * x282; - FpExt x287 = x275 + x238; - FpExt x288 = x221 * x5; - FpExt x289 = x287 + x288; - FpExt x290 = x224 * x4; - FpExt x291 = x289 + x290; - FpExt x292 = x291 + x210; - FpExt x293 = x284 * x292; - FpExt x294 = x284 * x25; - FpExt x295 = x286 * x292; - FpExt x296 = x285 * x292; - FpExt x297 = arg0[19]; - FpExt x298 = x297 * x293; - FpExt x299 = x298 - x295; - FpExt x300 = x299 - x296; - FpExt x301 = x300 - x294; - FpExt x302 = arg3 + poly_mix[0] * x301; - FpExt x303 = x216 * x26; - FpExt x304 = x218 * x27; - FpExt x305 = x303 + x304; - FpExt x306 = x221 * x28; - FpExt x307 = x305 + x306; - FpExt x308 = x224 * x29; - FpExt x309 = x307 + x308; - FpExt x310 = x309 + x210; - FpExt x311 = x303 + x238; - FpExt x312 = x221 * x30; - FpExt x313 = x311 + x312; - FpExt x314 = x224 * x31; - FpExt x315 = x313 + x314; - FpExt x316 = x315 + x210; - FpExt x317 = x310 * x316; - FpExt x318 = x310 * x32; - FpExt x319 = x33 * x316; - FpExt x320 = x216 * x34; - FpExt x321 = x218 * x35; - FpExt x322 = x320 + x321; - FpExt x323 = x221 * x36; - FpExt x324 = x322 + x323; - FpExt x325 = x224 * x37; - FpExt x326 = x324 + x325; - FpExt x327 = x326 + x210; - FpExt x328 = x317 * x327; - FpExt x329 = x317 * x38; - FpExt x330 = x319 * x327; - FpExt x331 = x318 * x327; - FpExt x332 = arg0[22]; - FpExt x333 = x332 * x328; - FpExt x334 = x333 - x330; - FpExt x335 = x334 - x331; - FpExt x336 = x335 - x329; - FpExt x337 = x302 + poly_mix[1] * x336; - FpExt x338 = x320 + x238; - FpExt x339 = x221 * x39; - FpExt x340 = x338 + x339; - FpExt x341 = x224 * x40; - FpExt x342 = x340 + x341; - FpExt x343 = x342 + x210; - FpExt x344 = x218 * x41; - FpExt x345 = arg0[43]; - FpExt x346 = x345 + x344; - FpExt x347 = x221 * x42; - FpExt x348 = x346 + x347; - FpExt x349 = x224 * x43; - FpExt x350 = x348 + x349; - FpExt x351 = x350 + x210; - FpExt x352 = x343 * x351; - FpExt x353 = x343 * x44; - FpExt x354 = x45 * x351; - FpExt x355 = x221 * x46; - FpExt x356 = arg0[44]; - FpExt x357 = x356 + x355; - FpExt x358 = x224 * x47; - FpExt x359 = x357 + x358; - FpExt x360 = x359 + x210; - FpExt x361 = x352 * x360; - FpExt x362 = x352 * x48; - FpExt x363 = x354 * x360; - FpExt x364 = x353 * x360; - FpExt x365 = arg0[23]; - FpExt x366 = x365 * x361; - FpExt x367 = x366 - x363; - FpExt x368 = x367 - x364; - FpExt x369 = x368 - x362; - FpExt x370 = x337 + poly_mix[2] * x369; - FpExt x371 = x216 * x49; - FpExt x372 = arg0[45]; - FpExt x373 = x371 + x372; - FpExt x374 = arg0[46]; - FpExt x375 = x373 + x374; - FpExt x376 = arg0[47]; - FpExt x377 = x375 + x376; - FpExt x378 = x377 + x210; - FpExt x379 = x371 + x238; - FpExt x380 = arg0[48]; - FpExt x381 = x379 + x380; - FpExt x382 = arg0[49]; - FpExt x383 = x381 + x382; - FpExt x384 = x383 + x210; - FpExt x385 = x378 * x384; - FpExt x386 = x378 * x50; - FpExt x387 = x51 * x384; - FpExt x388 = x216 * x52; - FpExt x389 = arg0[50]; - FpExt x390 = x388 + x389; - FpExt x391 = arg0[51]; - FpExt x392 = x390 + x391; - FpExt x393 = arg0[52]; - FpExt x394 = x392 + x393; - FpExt x395 = x394 + x210; - FpExt x396 = x385 * x395; - FpExt x397 = x385 * x53; - FpExt x398 = x387 * x395; - FpExt x399 = x386 * x395; - FpExt x400 = arg0[53]; - FpExt x401 = x400 * x396; - FpExt x402 = x401 - x398; - FpExt x403 = x402 - x399; - FpExt x404 = x403 - x397; - FpExt x405 = x370 + poly_mix[3] * x404; - FpExt x406 = x388 + x238; - FpExt x407 = arg0[54]; - FpExt x408 = x406 + x407; - FpExt x409 = arg0[55]; - FpExt x410 = x408 + x409; - FpExt x411 = x410 + x210; - FpExt x412 = x216 * x54; - FpExt x413 = x218 * x55; - FpExt x414 = x412 + x413; - FpExt x415 = x221 * x56; - FpExt x416 = x414 + x415; - FpExt x417 = x224 * x57; - FpExt x418 = x416 + x417; - FpExt x419 = x418 + x210; - FpExt x420 = x411 * x419; - FpExt x421 = x411 * x58; - FpExt x422 = x59 * x419; - FpExt x423 = x412 + x238; - FpExt x424 = x221 * x60; - FpExt x425 = x423 + x424; - FpExt x426 = x224 * x61; - FpExt x427 = x425 + x426; - FpExt x428 = x427 + x210; - FpExt x429 = x420 * x428; - FpExt x430 = x420 * x62; - FpExt x431 = x422 * x428; - FpExt x432 = x421 * x428; - FpExt x433 = arg0[56]; - FpExt x434 = x433 * x429; - FpExt x435 = x434 - x431; - FpExt x436 = x435 - x432; - FpExt x437 = x436 - x430; - FpExt x438 = x405 + poly_mix[4] * x437; - FpExt x439 = x216 * x63; - FpExt x440 = x218 * x64; - FpExt x441 = x439 + x440; - FpExt x442 = arg0[57]; - FpExt x443 = x441 + x442; - FpExt x444 = arg0[58]; - FpExt x445 = x443 + x444; - FpExt x446 = x445 + x210; - FpExt x447 = x439 + x238; - FpExt x448 = arg0[59]; - FpExt x449 = x447 + x448; - FpExt x450 = arg0[60]; - FpExt x451 = x449 + x450; - FpExt x452 = x451 + x210; - FpExt x453 = x446 * x452; - FpExt x454 = x446 * x65; - FpExt x455 = x66 * x452; - FpExt x456 = x245 * x67; - FpExt x457 = x456 + x210; - FpExt x458 = x453 * x457; - FpExt x459 = x453 * x68; - FpExt x460 = x455 * x457; - FpExt x461 = x454 * x457; - FpExt x462 = x183 * x458; - FpExt x463 = x462 - x460; - FpExt x464 = x463 - x461; - FpExt x465 = x464 - x459; - FpExt x466 = x438 + poly_mix[5] * x465; - FpExt x467 = x245 * x69; - FpExt x468 = x467 + x210; - FpExt x469 = x245 * x70; - FpExt x470 = x469 + x210; - FpExt x471 = x468 * x470; - FpExt x472 = x468 * x71; - FpExt x473 = x72 * x470; - FpExt x474 = arg0[61]; - FpExt x475 = x471 * x474; - FpExt x476 = x471 * x73; - FpExt x477 = x473 * x474; - FpExt x478 = x472 * x474; - FpExt x479 = x202 * x475; - FpExt x480 = x479 - x477; - FpExt x481 = x480 - x478; - FpExt x482 = x481 - x476; - FpExt x483 = x466 + poly_mix[6] * x482; - FpExt x484 = x245 * x74; - FpExt x485 = x484 + x210; - FpExt x486 = x245 * x75; - FpExt x487 = x486 + x210; - FpExt x488 = x485 * x487; - FpExt x489 = x485 * x76; - FpExt x490 = x77 * x487; - FpExt x491 = arg0[62]; - FpExt x492 = x488 * x491; - FpExt x493 = x488 * x78; - FpExt x494 = x490 * x491; - FpExt x495 = x489 * x491; - FpExt x496 = x232 * x492; - FpExt x497 = x496 - x494; - FpExt x498 = x497 - x495; - FpExt x499 = x498 - x493; - FpExt x500 = x483 + poly_mix[7] * x499; - FpExt x501 = x245 * x79; - FpExt x502 = x501 + x210; - FpExt x503 = x251 * x80; - FpExt x504 = x503 + x210; - FpExt x505 = x502 * x504; - FpExt x506 = x502 * x81; - FpExt x507 = x82 * x504; - FpExt x508 = x251 * x83; - FpExt x509 = x508 + x210; - FpExt x510 = x505 * x509; - FpExt x511 = x505 * x84; - FpExt x512 = x507 * x509; - FpExt x513 = x506 * x509; - FpExt x514 = x258 * x510; - FpExt x515 = x514 - x512; - FpExt x516 = x515 - x513; - FpExt x517 = x516 - x511; - FpExt x518 = x500 + poly_mix[8] * x517; - FpExt x519 = x251 * x85; - FpExt x520 = x519 + x210; - FpExt x521 = x251 * x86; - FpExt x522 = x521 + x210; - FpExt x523 = x520 * x522; - FpExt x524 = x520 * x2; - FpExt x525 = x87 * x522; - FpExt x526 = x251 * x11; - FpExt x527 = x526 + x210; - FpExt x528 = x523 * x527; - FpExt x529 = x523 * x7; - FpExt x530 = x525 * x527; - FpExt x531 = x524 * x527; - FpExt x532 = x266 * x528; - FpExt x533 = x532 - x530; - FpExt x534 = x533 - x531; - FpExt x535 = x534 - x529; - FpExt x536 = x518 + poly_mix[9] * x535; - FpExt x537 = x251 * x9; - FpExt x538 = x537 + x210; - FpExt x539 = arg0[63]; - FpExt x540 = x538 * x539; - FpExt x541 = x538 * x10; - FpExt x542 = x8 * x539; - FpExt x543 = x251 * x13; - FpExt x544 = x543 + x210; - FpExt x545 = x540 * x544; - FpExt x546 = x540 * x12; - FpExt x547 = x542 * x544; - FpExt x548 = x541 * x544; - FpExt x549 = arg0[64]; - FpExt x550 = x549 * x545; - FpExt x551 = x550 - x547; - FpExt x552 = x551 - x548; - FpExt x553 = x552 - x546; - FpExt x554 = x536 + poly_mix[10] * x553; - FpExt x555 = x251 * x14; - FpExt x556 = x555 + x210; - FpExt x557 = x556 * x253; - FpExt x558 = x556 * x18; - FpExt x559 = x15 * x253; - FpExt x560 = x251 * x20; - FpExt x561 = x560 + x210; - FpExt x562 = x557 * x561; - FpExt x563 = x557 * x88; - FpExt x564 = x559 * x561; - FpExt x565 = x558 * x561; - FpExt x566 = arg0[65]; - FpExt x567 = x566 * x562; - FpExt x568 = x567 - x564; - FpExt x569 = x568 - x565; - FpExt x570 = x569 - x563; - FpExt x571 = x554 + poly_mix[11] * x570; - FpExt x572 = x251 * x89; - FpExt x573 = x572 + x210; - FpExt x574 = x251 * x90; - FpExt x575 = x574 + x210; - FpExt x576 = x573 * x575; - FpExt x577 = x573 * x91; - FpExt x578 = x19 * x575; - FpExt x579 = x251 * x92; - FpExt x580 = x579 + x210; - FpExt x581 = x576 * x580; - FpExt x582 = x576 * x93; - FpExt x583 = x578 * x580; - FpExt x584 = x577 * x580; - FpExt x585 = arg0[66]; - FpExt x586 = x585 * x581; - FpExt x587 = x586 - x583; - FpExt x588 = x587 - x584; - FpExt x589 = x588 - x582; - FpExt x590 = x571 + poly_mix[12] * x589; - FpExt x591 = x251 * x94; - FpExt x592 = x591 + x210; - FpExt x593 = x251 * x95; - FpExt x594 = x593 + x210; - FpExt x595 = x592 * x594; - FpExt x596 = x592 * x96; - FpExt x597 = x97 * x594; - FpExt x598 = x208 * x98; - FpExt x599 = x598 + x210; - FpExt x600 = x595 * x599; - FpExt x601 = x595 * x99; - FpExt x602 = x597 * x599; - FpExt x603 = x596 * x599; - FpExt x604 = x100 * x0; - FpExt x605 = x101 + x604; - FpExt x606 = x605 * x0; - FpExt x607 = x102 + x606; - FpExt x608 = x607 * x0; - FpExt x609 = x103 + x608; - FpExt x610 = arg0[67]; - FpExt x611 = x609 - x610; - FpExt x612 = x611 * x600; - FpExt x613 = x612 - x602; - FpExt x614 = x613 - x603; - FpExt x615 = x614 - x601; - FpExt x616 = x590 + poly_mix[13] * x615; - FpExt x617 = x208 * x104; - FpExt x618 = x617 + x210; - FpExt x619 = x208 * x105; - FpExt x620 = x619 + x210; - FpExt x621 = x618 * x620; - FpExt x622 = x618 * x106; - FpExt x623 = x107 * x620; - FpExt x624 = x208 * x108; - FpExt x625 = x624 + x210; - FpExt x626 = x621 * x625; - FpExt x627 = x621 * x109; - FpExt x628 = x623 * x625; - FpExt x629 = x622 * x625; - FpExt x630 = x110 * x0; - FpExt x631 = x111 + x630; - FpExt x632 = x631 * x0; - FpExt x633 = x112 + x632; - FpExt x634 = x633 * x0; - FpExt x635 = x113 + x634; - FpExt x636 = x635 - x609; - FpExt x637 = x636 * x626; - FpExt x638 = x637 - x628; - FpExt x639 = x638 - x629; - FpExt x640 = x639 - x627; - FpExt x641 = x616 + poly_mix[14] * x640; - FpExt x642 = x208 * x114; - FpExt x643 = x642 + x210; - FpExt x644 = x208 * x115; - FpExt x645 = x644 + x210; - FpExt x646 = x643 * x645; - FpExt x647 = x643 * x116; - FpExt x648 = x117 * x645; - FpExt x649 = x208 * x118; - FpExt x650 = x649 + x210; - FpExt x651 = x646 * x650; - FpExt x652 = x646 * x119; - FpExt x653 = x648 * x650; - FpExt x654 = x647 * x650; - FpExt x655 = x120 * x0; - FpExt x656 = x121 + x655; - FpExt x657 = x656 * x0; - FpExt x658 = x122 + x657; - FpExt x659 = x658 * x0; - FpExt x660 = x123 + x659; - FpExt x661 = x660 - x635; - FpExt x662 = x661 * x651; - FpExt x663 = x662 - x653; - FpExt x664 = x663 - x654; - FpExt x665 = x664 - x652; - FpExt x666 = x641 + poly_mix[15] * x665; - FpExt x667 = x208 * x124; - FpExt x668 = x667 + x210; - FpExt x669 = x208 * x125; - FpExt x670 = x669 + x210; - FpExt x671 = x668 * x670; - FpExt x672 = x668 * x126; - FpExt x673 = x127 * x670; - FpExt x674 = x208 * x128; - FpExt x675 = x674 + x210; - FpExt x676 = x671 * x675; - FpExt x677 = x671 * x129; - FpExt x678 = x673 * x675; - FpExt x679 = x672 * x675; - FpExt x680 = x130 * x0; - FpExt x681 = x131 + x680; - FpExt x682 = x681 * x0; - FpExt x683 = x132 + x682; - FpExt x684 = x683 * x0; - FpExt x685 = x133 + x684; - FpExt x686 = x685 - x660; - FpExt x687 = x686 * x676; - FpExt x688 = x687 - x678; - FpExt x689 = x688 - x679; - FpExt x690 = x689 - x677; - FpExt x691 = x666 + poly_mix[16] * x690; - FpExt x692 = x208 * x134; - FpExt x693 = x692 + x210; - FpExt x694 = x208 * x135; - FpExt x695 = x694 + x210; - FpExt x696 = x693 * x695; - FpExt x697 = x693 * x136; - FpExt x698 = x137 * x695; - FpExt x699 = x208 * x138; - FpExt x700 = x699 + x210; - FpExt x701 = x696 * x700; - FpExt x702 = x696 * x139; - FpExt x703 = x698 * x700; - FpExt x704 = x697 * x700; - FpExt x705 = x140 * x0; - FpExt x706 = x141 + x705; - FpExt x707 = x706 * x0; - FpExt x708 = x142 + x707; - FpExt x709 = x708 * x0; - FpExt x710 = x143 + x709; - FpExt x711 = x710 - x685; - FpExt x712 = x711 * x701; - FpExt x713 = x712 - x703; - FpExt x714 = x713 - x704; - FpExt x715 = x714 - x702; - FpExt x716 = x691 + poly_mix[17] * x715; - FpExt x717 = x208 * x144; - FpExt x718 = x717 + x210; - FpExt x719 = x208 * x145; - FpExt x720 = x719 + x210; - FpExt x721 = x718 * x720; - FpExt x722 = x718 * x146; - FpExt x723 = x147 * x720; - FpExt x724 = x208 * x148; - FpExt x725 = x724 + x210; - FpExt x726 = x721 * x725; - FpExt x727 = x721 * x149; - FpExt x728 = x723 * x725; - FpExt x729 = x722 * x725; - FpExt x730 = x270 - x710; - FpExt x731 = x730 * x726; - FpExt x732 = x731 - x728; - FpExt x733 = x732 - x729; - FpExt x734 = x733 - x727; - FpExt x735 = x716 + poly_mix[18] * x734; - FpExt x736 = x274 + x150 * x735 * poly_mix[407]; - FpExt x737 = x251 * x55; - FpExt x738 = x737 + x210; - FpExt x739 = arg0[68]; - FpExt x740 = x738 * x739; - FpExt x741 = x738 * x62; - FpExt x742 = x54 * x739; - FpExt x743 = x740 * x282; - FpExt x744 = x740 * x1; - FpExt x745 = x742 * x282; - FpExt x746 = x741 * x282; - FpExt x747 = x297 * x743; - FpExt x748 = x747 - x745; - FpExt x749 = x748 - x746; - FpExt x750 = x749 - x744; - FpExt x751 = arg3 + poly_mix[0] * x750; - FpExt x752 = x292 * x310; - FpExt x753 = x292 * x33; - FpExt x754 = x25 * x310; - FpExt x755 = x752 * x316; - FpExt x756 = x752 * x32; - FpExt x757 = x754 * x316; - FpExt x758 = x753 * x316; - FpExt x759 = x332 * x755; - FpExt x760 = x759 - x757; - FpExt x761 = x760 - x758; - FpExt x762 = x761 - x756; - FpExt x763 = x751 + poly_mix[1] * x762; - FpExt x764 = x327 * x343; - FpExt x765 = x327 * x45; - FpExt x766 = x38 * x343; - FpExt x767 = x764 * x351; - FpExt x768 = x764 * x44; - FpExt x769 = x766 * x351; - FpExt x770 = x765 * x351; - FpExt x771 = x365 * x767; - FpExt x772 = x771 - x769; - FpExt x773 = x772 - x770; - FpExt x774 = x773 - x768; - FpExt x775 = x763 + poly_mix[2] * x774; - FpExt x776 = x245 * x49; - FpExt x777 = x776 + x210; - FpExt x778 = x360 * x777; - FpExt x779 = x360 * x51; - FpExt x780 = x48 * x777; - FpExt x781 = x245 * x151; - FpExt x782 = x781 + x210; - FpExt x783 = x778 * x782; - FpExt x784 = x778 * x152; - FpExt x785 = x780 * x782; - FpExt x786 = x779 * x782; - FpExt x787 = x400 * x783; - FpExt x788 = x787 - x785; - FpExt x789 = x788 - x786; - FpExt x790 = x789 - x784; - FpExt x791 = x775 + poly_mix[3] * x790; - FpExt x792 = x245 * x50; - FpExt x793 = x792 + x210; - FpExt x794 = arg0[69]; - FpExt x795 = x793 * x794; - FpExt x796 = x793 * x153; - FpExt x797 = x154 * x794; - FpExt x798 = x251 * x52; - FpExt x799 = x798 + x210; - FpExt x800 = x795 * x799; - FpExt x801 = x795 * x53; - FpExt x802 = x797 * x799; - FpExt x803 = x796 * x799; - FpExt x804 = x433 * x800; - FpExt x805 = x804 - x802; - FpExt x806 = x805 - x803; - FpExt x807 = x806 - x801; - FpExt x808 = x791 + poly_mix[4] * x807; - FpExt x809 = x251 * x155; - FpExt x810 = x809 + x210; - FpExt x811 = x251 * x87; - FpExt x812 = x811 + x210; - FpExt x813 = x810 * x812; - FpExt x814 = x810 * x83; - FpExt x815 = x156 * x812; - FpExt x816 = x813 * x522; - FpExt x817 = x813 * x2; - FpExt x818 = x815 * x522; - FpExt x819 = x814 * x522; - FpExt x820 = x183 * x816; - FpExt x821 = x820 - x818; - FpExt x822 = x821 - x819; - FpExt x823 = x822 - x817; - FpExt x824 = x808 + poly_mix[5] * x823; - FpExt x825 = x202 * x283; - FpExt x826 = x825 - x11; - FpExt x827 = x824 + poly_mix[6] * x826; - FpExt x828 = arg0[70]; - FpExt x829 = x270 - x828; - FpExt x830 = x827 + poly_mix[7] * x829; - FpExt x831 = x736 + x157 * x830 * poly_mix[408]; - FpExt x832 = x218 * x52; - FpExt x833 = arg0[71]; - FpExt x834 = x833 + x832; - FpExt x835 = x221 * x156; - FpExt x836 = x834 + x835; - FpExt x837 = x224 * x155; - FpExt x838 = x836 + x837; - FpExt x839 = x838 + x210; - FpExt x840 = arg0[72]; - FpExt x841 = arg0[73]; - FpExt x842 = x840 + x841; - FpExt x843 = arg0[74]; - FpExt x844 = x842 + x843; - FpExt x845 = x844 + x210; - FpExt x846 = x839 * x845; - FpExt x847 = x839 * x158; - FpExt x848 = x159 * x845; - FpExt x849 = x216 * x58; - FpExt x850 = x218 * x54; - FpExt x851 = x849 + x850; - FpExt x852 = x221 * x55; - FpExt x853 = x851 + x852; - FpExt x854 = x224 * x56; - FpExt x855 = x853 + x854; - FpExt x856 = x855 + x210; - FpExt x857 = x846 * x856; - FpExt x858 = x846 * x160; - FpExt x859 = x848 * x856; - FpExt x860 = x847 * x856; - FpExt x861 = x297 * x857; - FpExt x862 = x861 - x859; - FpExt x863 = x862 - x860; - FpExt x864 = x863 - x858; - FpExt x865 = arg3 + poly_mix[0] * x864; - FpExt x866 = x849 + x238; - FpExt x867 = x221 * x62; - FpExt x868 = x866 + x867; - FpExt x869 = x224 * x60; - FpExt x870 = x868 + x869; - FpExt x871 = x870 + x210; - FpExt x872 = x216 * x66; - FpExt x873 = x218 * x63; - FpExt x874 = x872 + x873; - FpExt x875 = x221 * x64; - FpExt x876 = x874 + x875; - FpExt x877 = x224 * x161; - FpExt x878 = x876 + x877; - FpExt x879 = x878 + x210; - FpExt x880 = x871 * x879; - FpExt x881 = x871 * x61; - FpExt x882 = x57 * x879; - FpExt x883 = x872 + x238; - FpExt x884 = x221 * x65; - FpExt x885 = x883 + x884; - FpExt x886 = x224 * x162; - FpExt x887 = x885 + x886; - FpExt x888 = x887 + x210; - FpExt x889 = x880 * x888; - FpExt x890 = x880 * x163; - FpExt x891 = x882 * x888; - FpExt x892 = x881 * x888; - FpExt x893 = x332 * x889; - FpExt x894 = x893 - x891; - FpExt x895 = x894 - x892; - FpExt x896 = x895 - x890; - FpExt x897 = x865 + poly_mix[1] * x896; - FpExt x898 = x216 * x68; - FpExt x899 = x218 * x67; - FpExt x900 = x898 + x899; - FpExt x901 = x221 * x72; - FpExt x902 = x900 + x901; - FpExt x903 = x224 * x69; - FpExt x904 = x902 + x903; - FpExt x905 = x904 + x210; - FpExt x906 = x898 + x238; - FpExt x907 = x221 * x70; - FpExt x908 = x906 + x907; - FpExt x909 = x224 * x73; - FpExt x910 = x908 + x909; - FpExt x911 = x910 + x210; - FpExt x912 = x905 * x911; - FpExt x913 = x905 * x71; - FpExt x914 = x164 * x911; - FpExt x915 = x218 * x74; - FpExt x916 = arg0[75]; - FpExt x917 = x916 + x915; - FpExt x918 = arg0[76]; - FpExt x919 = x917 + x918; - FpExt x920 = arg0[77]; - FpExt x921 = x919 + x920; - FpExt x922 = x921 + x210; - FpExt x923 = x912 * x922; - FpExt x924 = x912 * x165; - FpExt x925 = x914 * x922; - FpExt x926 = x913 * x922; - FpExt x927 = x365 * x923; - FpExt x928 = x927 - x925; - FpExt x929 = x928 - x926; - FpExt x930 = x929 - x924; - FpExt x931 = x897 + poly_mix[2] * x930; - FpExt x932 = x221 * x166; - FpExt x933 = arg0[78]; - FpExt x934 = x933 + x932; - FpExt x935 = x224 * x82; - FpExt x936 = x934 + x935; - FpExt x937 = x936 + x210; - FpExt x938 = arg0[79]; - FpExt x939 = arg0[80]; - FpExt x940 = x938 + x939; - FpExt x941 = arg0[81]; - FpExt x942 = x940 + x941; - FpExt x943 = arg0[82]; - FpExt x944 = x942 + x943; - FpExt x945 = x944 + x210; - FpExt x946 = x937 * x945; - FpExt x947 = x937 * x79; - FpExt x948 = x78 * x945; - FpExt x949 = arg0[83]; - FpExt x950 = arg0[84]; - FpExt x951 = x949 + x950; - FpExt x952 = arg0[85]; - FpExt x953 = x951 + x952; - FpExt x954 = x953 + x210; - FpExt x955 = x946 * x954; - FpExt x956 = x946 * x87; - FpExt x957 = x948 * x954; - FpExt x958 = x947 * x954; - FpExt x959 = x400 * x955; - FpExt x960 = x959 - x957; - FpExt x961 = x960 - x958; - FpExt x962 = x961 - x956; - FpExt x963 = x931 + poly_mix[3] * x962; - FpExt x964 = x218 * x11; - FpExt x965 = x217 + x964; - FpExt x966 = x221 * x8; - FpExt x967 = x965 + x966; - FpExt x968 = x224 * x9; - FpExt x969 = x967 + x968; - FpExt x970 = x969 + x210; - FpExt x971 = x221 * x16; - FpExt x972 = x239 + x971; - FpExt x973 = x224 * x12; - FpExt x974 = x972 + x973; - FpExt x975 = x974 + x210; - FpExt x976 = x970 * x975; - FpExt x977 = x970 * x10; - FpExt x978 = x86 * x975; - FpExt x979 = x216 * x15; - FpExt x980 = x218 * x14; - FpExt x981 = x979 + x980; - FpExt x982 = x221 * x18; - FpExt x983 = x981 + x982; - FpExt x984 = x224 * x17; - FpExt x985 = x983 + x984; - FpExt x986 = x985 + x210; - FpExt x987 = x976 * x986; - FpExt x988 = x976 * x13; - FpExt x989 = x978 * x986; - FpExt x990 = x977 * x986; - FpExt x991 = x433 * x987; - FpExt x992 = x991 - x989; - FpExt x993 = x992 - x990; - FpExt x994 = x993 - x988; - FpExt x995 = x963 + poly_mix[4] * x994; - FpExt x996 = x979 + x238; - FpExt x997 = x221 * x20; - FpExt x998 = x996 + x997; - FpExt x999 = x224 * x19; - FpExt x1000 = x998 + x999; - FpExt x1001 = x1000 + x210; - FpExt x1002 = x245 * x91; - FpExt x1003 = x1002 + x210; - FpExt x1004 = x1001 * x1003; - FpExt x1005 = x1001 * x89; - FpExt x1006 = x88 * x1003; - FpExt x1007 = x245 * x93; - FpExt x1008 = x1007 + x210; - FpExt x1009 = x1004 * x1008; - FpExt x1010 = x1004 * x90; - FpExt x1011 = x1006 * x1008; - FpExt x1012 = x1005 * x1008; - FpExt x1013 = x183 * x1009; - FpExt x1014 = x1013 - x1011; - FpExt x1015 = x1014 - x1012; - FpExt x1016 = x1015 - x1010; - FpExt x1017 = x995 + poly_mix[5] * x1016; - FpExt x1018 = x245 * x97; - FpExt x1019 = x1018 + x210; - FpExt x1020 = x245 * x96; - FpExt x1021 = x1020 + x210; - FpExt x1022 = x1019 * x1021; - FpExt x1023 = x1019 * x94; - FpExt x1024 = x92 * x1021; - FpExt x1025 = x245 * x99; - FpExt x1026 = x1025 + x210; - FpExt x1027 = x1022 * x1026; - FpExt x1028 = x1022 * x95; - FpExt x1029 = x1024 * x1026; - FpExt x1030 = x1023 * x1026; - FpExt x1031 = x202 * x1027; - FpExt x1032 = x1031 - x1029; - FpExt x1033 = x1032 - x1030; - FpExt x1034 = x1033 - x1028; - FpExt x1035 = x1017 + poly_mix[6] * x1034; - FpExt x1036 = x245 * x107; - FpExt x1037 = x1036 + x210; - FpExt x1038 = x245 * x106; - FpExt x1039 = x1038 + x210; - FpExt x1040 = x1037 * x1039; - FpExt x1041 = x1037 * x104; - FpExt x1042 = x98 * x1039; - FpExt x1043 = x245 * x109; - FpExt x1044 = x1043 + x210; - FpExt x1045 = x1040 * x1044; - FpExt x1046 = x1040 * x105; - FpExt x1047 = x1042 * x1044; - FpExt x1048 = x1041 * x1044; - FpExt x1049 = x232 * x1045; - FpExt x1050 = x1049 - x1047; - FpExt x1051 = x1050 - x1048; - FpExt x1052 = x1051 - x1046; - FpExt x1053 = x1035 + poly_mix[7] * x1052; - FpExt x1054 = x251 * x117; - FpExt x1055 = x1054 + x210; - FpExt x1056 = x251 * x116; - FpExt x1057 = x1056 + x210; - FpExt x1058 = x1055 * x1057; - FpExt x1059 = x1055 * x114; - FpExt x1060 = x108 * x1057; - FpExt x1061 = x251 * x119; - FpExt x1062 = x1061 + x210; - FpExt x1063 = x1058 * x1062; - FpExt x1064 = x1058 * x115; - FpExt x1065 = x1060 * x1062; - FpExt x1066 = x1059 * x1062; - FpExt x1067 = x258 * x1063; - FpExt x1068 = x1067 - x1065; - FpExt x1069 = x1068 - x1066; - FpExt x1070 = x1069 - x1064; - FpExt x1071 = x1053 + poly_mix[8] * x1070; - FpExt x1072 = x251 * x127; - FpExt x1073 = x1072 + x210; - FpExt x1074 = x251 * x126; - FpExt x1075 = x1074 + x210; - FpExt x1076 = x1073 * x1075; - FpExt x1077 = x1073 * x124; - FpExt x1078 = x118 * x1075; - FpExt x1079 = arg0[86]; - FpExt x1080 = x1076 * x1079; - FpExt x1081 = x1076 * x125; - FpExt x1082 = x1078 * x1079; - FpExt x1083 = x1077 * x1079; - FpExt x1084 = x266 * x1080; - FpExt x1085 = x1084 - x1082; - FpExt x1086 = x1085 - x1083; - FpExt x1087 = x1086 - x1081; - FpExt x1088 = x1071 + poly_mix[9] * x1087; - FpExt x1089 = x251 * x137; - FpExt x1090 = x1089 + x210; - FpExt x1091 = x251 * x136; - FpExt x1092 = x1091 + x210; - FpExt x1093 = x1090 * x1092; - FpExt x1094 = x1090 * x134; - FpExt x1095 = x128 * x1092; - FpExt x1096 = x251 * x139; - FpExt x1097 = x1096 + x210; - FpExt x1098 = x1093 * x1097; - FpExt x1099 = x1093 * x135; - FpExt x1100 = x1095 * x1097; - FpExt x1101 = x1094 * x1097; - FpExt x1102 = x549 * x1098; - FpExt x1103 = x1102 - x1100; - FpExt x1104 = x1103 - x1101; - FpExt x1105 = x1104 - x1099; - FpExt x1106 = x1088 + poly_mix[10] * x1105; - FpExt x1107 = x251 * x147; - FpExt x1108 = x1107 + x210; - FpExt x1109 = arg0[87]; - FpExt x1110 = x1108 * x1109; - FpExt x1111 = x1108 * x144; - FpExt x1112 = x138 * x1109; - FpExt x1113 = x251 * x149; - FpExt x1114 = x1113 + x210; - FpExt x1115 = x1110 * x1114; - FpExt x1116 = x1110 * x145; - FpExt x1117 = x1112 * x1114; - FpExt x1118 = x1111 * x1114; - FpExt x1119 = x566 * x1115; - FpExt x1120 = x1119 - x1117; - FpExt x1121 = x1120 - x1118; - FpExt x1122 = x1121 - x1116; - FpExt x1123 = x1106 + poly_mix[11] * x1122; - FpExt x1124 = x251 * x167; - FpExt x1125 = x1124 + x210; - FpExt x1126 = x251 * x168; - FpExt x1127 = x1126 + x210; - FpExt x1128 = x1125 * x1127; - FpExt x1129 = x1125 * x169; - FpExt x1130 = x148 * x1127; - FpExt x1131 = x251 * x170; - FpExt x1132 = x1131 + x210; - FpExt x1133 = x1128 * x1132; - FpExt x1134 = x1128 * x171; - FpExt x1135 = x1130 * x1132; - FpExt x1136 = x1129 * x1132; - FpExt x1137 = x585 * x1133; - FpExt x1138 = x1137 - x1135; - FpExt x1139 = x1138 - x1136; - FpExt x1140 = x1139 - x1134; - FpExt x1141 = x1123 + poly_mix[12] * x1140; - FpExt x1142 = x251 * x172; - FpExt x1143 = x1142 + x210; - FpExt x1144 = x208 * x173; - FpExt x1145 = x1144 + x210; - FpExt x1146 = x1143 * x1145; - FpExt x1147 = x1143 * x24; - FpExt x1148 = x174 * x1145; - FpExt x1149 = x208 * x175; - FpExt x1150 = x1149 + x210; - FpExt x1151 = x1146 * x1150; - FpExt x1152 = x1146 * x176; - FpExt x1153 = x1148 * x1150; - FpExt x1154 = x1147 * x1150; - FpExt x1155 = x611 * x1151; - FpExt x1156 = x1155 - x1153; - FpExt x1157 = x1156 - x1154; - FpExt x1158 = x1157 - x1152; - FpExt x1159 = x1141 + poly_mix[13] * x1158; - FpExt x1160 = x636 * x283; - FpExt x1161 = x1160 - x177; - FpExt x1162 = x1159 + poly_mix[14] * x1161; - FpExt x1163 = x270 - x635; - FpExt x1164 = x1162 + poly_mix[15] * x1163; - FpExt x1165 = x831 + x178 * x1164 * poly_mix[409]; - FpExt x1166 = x297 * x283; - FpExt x1167 = x1166 - x20; - FpExt x1168 = arg3 + poly_mix[0] * x1167; - FpExt x1169 = arg0[88]; - FpExt x1170 = x270 - x1169; - FpExt x1171 = x1168 + poly_mix[1] * x1170; - FpExt x1172 = x1165 + x179 * x1171 * poly_mix[410]; - return x1172; -} - -} // namespace risc0::circuit::rv32im_v2::cuda diff --git a/risc0/circuit/rv32im-v2-sys/kernels/cuda/eval_check_1.cu b/risc0/circuit/rv32im-v2-sys/kernels/cuda/eval_check_1.cu deleted file mode 100644 index ce2add76..00000000 --- a/risc0/circuit/rv32im-v2-sys/kernels/cuda/eval_check_1.cu +++ /dev/null @@ -1,4949 +0,0 @@ -// This code is automatically generated - -#include "supra/fp.h" - -#include "eval_check.cuh" - -#include - -namespace risc0::circuit::rv32im_v2::cuda { - -__device__ FpExt rv32im_v2_11(uint32_t idx, - uint32_t size, - FpExt arg0, - Fp* arg1, - FpExt arg2, - FpExt arg3, - FpExt arg4, - FpExt arg5, - FpExt* arg6, - const Fp* arg7, - const Fp* arg8, - const Fp* arg9, - const Fp* arg10) { - uint32_t mask = size - 1; - Fp x0(5); - Fp x1(19); - Fp x2(2013235201); - Fp x3(131070); - Fp x4(131072); - Fp x5(65536); - Fp x6(16777216); - Fp x7(1006632961); - Fp x8(51); - Fp x9(64); - Fp x10(4); - Fp x11(8); - Fp x12(256); - Fp x13(1024); - Fp x14(4096); - Fp x15(16384); - Fp x16(16); - Fp x17(32); - Fp x18(128); - Fp x19(512); - Fp x20(2048); - Fp x21(8192); - Fp x22(32768); - Fp x23(3); - Fp x24(2); - Fp x25(1); - Fp x26(0); - Fp x27(2013265920); - Fp x28 = arg7[82 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x29 = arg7[90 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x30 = arg7[89 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x31 = arg7[92 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x32 = arg7[95 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x33 = arg7[93 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x34 = arg7[96 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x35 = arg7[0 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x36 = arg7[91 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x37 = arg7[97 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x38 = arg7[98 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x39 = arg7[68 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x40 = arg7[72 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x41 = arg7[77 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x42 = arg7[78 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x43 = arg7[65 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x44 = arg7[66 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x45 = arg7[67 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x46 = arg7[69 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x47 = arg7[70 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x48 = arg7[71 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x49 = arg7[73 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x50 = arg7[74 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x51 = arg7[75 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x52 = arg7[76 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x53 = arg7[79 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x54 = arg7[80 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x55 = arg7[109 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x56 = arg7[100 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x57 = arg7[99 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x58 = arg7[102 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x59 = arg7[105 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x60 = arg7[103 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x61 = arg7[106 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x62 = arg7[101 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x63 = arg7[107 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x64 = arg7[108 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x65 = arg7[120 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x66 = arg7[111 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x67 = arg7[110 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x68 = arg7[113 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x69 = arg7[116 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x70 = arg7[114 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x71 = arg7[117 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x72 = arg7[112 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x73 = arg7[118 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x74 = arg7[119 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x75 = arg7[122 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x76 = arg7[123 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x77 = arg7[124 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x78 = arg7[125 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x79 = arg7[121 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x80 = arg7[28 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x81 = arg7[126 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x82 = arg7[127 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x83 = arg7[128 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x84 = arg7[39 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x85 = arg7[41 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x86 = arg7[45 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x87 = arg7[47 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x88 = arg7[42 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x89 = arg7[40 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x90 = arg7[48 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x91 = arg7[44 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x92 = arg7[129 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x93 = arg7[46 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x94 = arg7[49 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x95 = arg7[51 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x96 = arg7[53 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x97 = arg7[55 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x98 = arg7[52 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x99 = arg7[50 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x100 = arg7[58 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x101 = arg7[54 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x102 = arg7[130 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x103 = arg7[56 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x104 = arg7[131 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x105 = arg7[30 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x106 = arg7[59 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x107 = arg7[133 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x108 = arg7[132 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x109 = arg7[60 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x110 = arg7[32 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x111 = arg7[61 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x112 = arg7[62 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x113 = arg7[34 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x114 = arg7[63 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x115 = arg7[137 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x116 = arg7[136 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x117 = arg7[64 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x118 = arg7[36 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x119 = arg7[38 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x120 = arg7[139 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x121 = arg7[138 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x122 = arg7[19 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x123 = arg7[20 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x124 = arg7[37 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x125 = arg7[21 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x126 = arg7[22 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x127 = arg7[23 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x128 = arg7[24 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x129 = arg7[27 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x130 = arg7[29 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x131 = arg7[31 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x132 = arg7[33 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x133 = arg7[35 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x134 = arg7[43 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x135 = arg7[57 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x136 = arg7[25 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x137 = arg7[26 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x138 = arg7[32 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x139 = arg7[30 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x140 = arg7[34 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x141 = arg7[36 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x142 = arg7[141 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x143 = arg7[140 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x144 = arg7[142 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x145 = arg7[144 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x146 = arg7[148 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x147 = arg7[143 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x148 = arg7[145 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x149 = arg7[151 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x150 = arg7[152 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x151 = arg7[149 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x152 = arg7[150 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x153 = arg7[153 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x154 = arg7[155 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x155 = arg7[154 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x156 = arg7[156 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x157 = arg7[158 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x158 = arg7[157 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x159 = arg7[4 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x160 = arg7[88 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x161 = arg7[94 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x162 = arg7[104 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x163 = arg7[81 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x164 = arg7[83 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x165 = arg7[84 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x166 = arg7[85 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x167 = arg7[86 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x168 = arg7[115 * size + ((idx - INV_RATE * 0) & mask)]; - FpExt x169 = arg0 + poly_mix[12] * x28; - Fp x170 = x29 - x27; - arg1[333] = x170; - FpExt x171 = x169 + poly_mix[13] * x170; - Fp x172 = arg1[122]; - FpExt x173 = x171 + poly_mix[14] * x172; - FpExt x174 = x173 + poly_mix[15] * x26; - FpExt x175 = x174 + poly_mix[16] * x26; - Fp x176 = arg1[123]; - Fp x177 = x30 - x176; - FpExt x178 = x175 + poly_mix[17] * x177; - Fp x179 = x31 - x32; - FpExt x180 = x178 + poly_mix[18] * x179; - Fp x181 = x33 - x34; - arg1[334] = x181; - FpExt x182 = x180 + poly_mix[19] * x181; - Fp x183 = x35 - x36; - Fp x184 = x37 - x25; - arg1[213] = x184; - FpExt x185 = x182 + poly_mix[20] * x184; - Fp x186 = x38 - x183; - FpExt x187 = x185 + poly_mix[21] * x186; - Fp x188 = arg1[124]; - FpExt x189 = x187 + poly_mix[22] * x188; - Fp x190 = arg1[125]; - FpExt x191 = x189 + poly_mix[23] * x190; - Fp x192 = arg1[126]; - FpExt x193 = x191 + poly_mix[24] * x192; - Fp x194 = x24 - x39; - Fp x195 = arg1[127]; - Fp x196 = x195 * x194; - Fp x197 = x23 - x39; - Fp x198 = x196 * x197; - FpExt x199 = x193 + poly_mix[25] * x198; - Fp x200 = arg1[128]; - FpExt x201 = x199 + poly_mix[26] * x200; - Fp x202 = arg1[129]; - FpExt x203 = x201 + poly_mix[27] * x202; - Fp x204 = arg1[130]; - FpExt x205 = x203 + poly_mix[28] * x204; - Fp x206 = x24 - x40; - Fp x207 = arg1[131]; - Fp x208 = x207 * x206; - Fp x209 = x23 - x40; - Fp x210 = x208 * x209; - FpExt x211 = x205 + poly_mix[29] * x210; - Fp x212 = arg1[132]; - FpExt x213 = x211 + poly_mix[30] * x212; - Fp x214 = arg1[133]; - FpExt x215 = x213 + poly_mix[31] * x214; - Fp x216 = arg1[134]; - FpExt x217 = x215 + poly_mix[32] * x216; - Fp x218 = arg1[135]; - FpExt x219 = x217 + poly_mix[33] * x218; - Fp x220 = x25 - x41; - Fp x221 = x41 * x220; - Fp x222 = x24 - x41; - Fp x223 = x221 * x222; - Fp x224 = x23 - x41; - Fp x225 = x223 * x224; - FpExt x226 = x219 + poly_mix[34] * x225; - Fp x227 = x25 - x42; - arg1[306] = x227; - Fp x228 = x42 * x227; - arg1[305] = x228; - Fp x229 = x24 - x42; - Fp x230 = x228 * x229; - Fp x231 = x23 - x42; - Fp x232 = x230 * x231; - FpExt x233 = x226 + poly_mix[35] * x232; - Fp x234 = arg1[136]; - FpExt x235 = x233 + poly_mix[36] * x234; - Fp x236 = x43 * x22; - Fp x237 = x44 * x21; - Fp x238 = x236 + x237; - Fp x239 = x45 * x20; - Fp x240 = x238 + x239; - Fp x241 = x39 * x19; - Fp x242 = x240 + x241; - Fp x243 = x46 * x18; - Fp x244 = x242 + x243; - Fp x245 = x47 * x17; - Fp x246 = x244 + x245; - Fp x247 = x48 * x16; - Fp x248 = x246 + x247; - Fp x249 = arg1[137]; - Fp x250 = x248 + x249; - Fp x251 = x250 + x49; - Fp x252 = x34 - x251; - FpExt x253 = x235 + poly_mix[37] * x252; - Fp x254 = x50 * x22; - Fp x255 = x51 * x15; - Fp x256 = x254 + x255; - Fp x257 = x52 * x14; - Fp x258 = x256 + x257; - Fp x259 = x41 * x13; - Fp x260 = x258 + x259; - Fp x261 = x42 * x12; - Fp x262 = x260 + x261; - Fp x263 = x53 * x18; - Fp x264 = x262 + x263; - Fp x265 = x264 + x54; - Fp x266 = x32 - x265; - FpExt x267 = x253 + poly_mix[38] * x266; - Fp x268 = x40 * x11; - Fp x269 = x49 * x24; - Fp x270 = x268 + x269; - Fp x271 = x270 + x50; - Fp x272 = x41 * x11; - Fp x273 = x42 * x24; - arg1[532] = x273; - Fp x274 = x272 + x273; - Fp x275 = x274 + x53; - Fp x276 = x44 * x16; - Fp x277 = x45 * x10; - Fp x278 = x276 + x277; - Fp x279 = x278 + x39; - Fp x280 = x43 * x9; - Fp x281 = x280 + x279; - Fp x282 = x51 * x10; - Fp x283 = x282 + x52; - Fp x284 = arg1[23]; - Fp x285 = x284 + x271; - Fp x286 = x285 - x55; - FpExt x287 = x267 + poly_mix[39] * x286; - Fp x288 = x56 - x27; - FpExt x289 = x287 + poly_mix[40] * x288; - Fp x290 = arg1[138]; - FpExt x291 = x289 + poly_mix[41] * x290; - FpExt x292 = x291 + poly_mix[42] * x26; - FpExt x293 = x292 + poly_mix[43] * x26; - Fp x294 = x57 - x55; - FpExt x295 = x293 + poly_mix[44] * x294; - Fp x296 = x58 - x59; - arg1[335] = x296; - FpExt x297 = x295 + poly_mix[45] * x296; - Fp x298 = x60 - x61; - FpExt x299 = x297 + poly_mix[46] * x298; - Fp x300 = x35 - x62; - Fp x301 = x63 - x25; - arg1[248] = x301; - FpExt x302 = x299 + poly_mix[47] * x301; - Fp x303 = x64 - x300; - FpExt x304 = x302 + poly_mix[48] * x303; - Fp x305 = arg1[139]; - Fp x306 = x305 - x65; - FpExt x307 = x304 + poly_mix[49] * x306; - Fp x308 = x66 - x27; - FpExt x309 = x307 + poly_mix[50] * x308; - Fp x310 = arg1[140]; - FpExt x311 = x309 + poly_mix[51] * x310; - FpExt x312 = x311 + poly_mix[52] * x26; - FpExt x313 = x312 + poly_mix[53] * x26; - Fp x314 = x67 - x65; - FpExt x315 = x313 + poly_mix[54] * x314; - Fp x316 = x68 - x69; - FpExt x317 = x315 + poly_mix[55] * x316; - Fp x318 = x70 - x71; - FpExt x319 = x317 + poly_mix[56] * x318; - Fp x320 = x35 - x72; - Fp x321 = x73 - x25; - FpExt x322 = x319 + poly_mix[57] * x321; - Fp x323 = x74 - x320; - FpExt x324 = x322 + poly_mix[58] * x323; - Fp x325 = x54 - x8; - Fp x326 = x283 - x25; - FpExt x327 = arg2 + poly_mix[0] * x325; - FpExt x328 = x327 + poly_mix[1] * x326; - FpExt x329 = x328 + poly_mix[2] * x281; - Fp x330 = arg1[3]; - FpExt x331 = x329 + poly_mix[3] * x330; - Fp x332 = arg1[4]; - FpExt x333 = x331 + poly_mix[4] * x332; - Fp x334 = arg1[29]; - FpExt x335 = x333 + poly_mix[5] * x334; - Fp x336 = arg1[30]; - FpExt x337 = x335 + poly_mix[6] * x336; - Fp x338 = arg1[31]; - FpExt x339 = x337 + poly_mix[7] * x338; - Fp x340 = x75 * x24; - Fp x341 = x76 * x10; - Fp x342 = x77 * x11; - Fp x343 = x78 * x16; - Fp x344 = x79 + x340; - arg1[486] = x344; - Fp x345 = x344 + x341; - Fp x346 = x345 + x342; - Fp x347 = x346 + x343; - Fp x348 = arg1[10]; - FpExt x349 = x339 + poly_mix[8] * x348; - Fp x350 = x80 * x17; - arg1[160] = x350; - Fp x351 = x350 + x347; - Fp x352 = x351 - x69; - FpExt x353 = x349 + poly_mix[9] * x352; - Fp x354 = x79 * x24; - Fp x355 = arg1[5]; - Fp x356 = x354 + x355; - Fp x357 = x75 * x356; - Fp x358 = x357 * x10; - Fp x359 = arg1[6]; - Fp x360 = x359 * x356; - Fp x361 = x358 + x360; - Fp x362 = x76 * x361; - Fp x363 = x362 * x16; - Fp x364 = arg1[141]; - Fp x365 = x364 * x361; - Fp x366 = x363 + x365; - Fp x367 = x366 - x81; - FpExt x368 = x353 + poly_mix[10] * x367; - Fp x369 = x77 * x81; - Fp x370 = x369 * x12; - Fp x371 = arg1[142]; - Fp x372 = x371 * x81; - Fp x373 = x370 + x372; - Fp x374 = arg1[143]; - Fp x375 = x374 * x373; - Fp x376 = x375 - x82; - FpExt x377 = x368 + poly_mix[11] * x376; - Fp x378 = x78 * x373; - Fp x379 = x378 - x83; - FpExt x380 = x377 + poly_mix[12] * x379; - Fp x381 = x84 - x25; - arg1[178] = x381; - FpExt x382 = x380 + poly_mix[13] * x381; - Fp x383 = x85 - x25; - arg1[179] = x383; - FpExt x384 = x382 + poly_mix[14] * x383; - Fp x385 = arg1[144]; - FpExt x386 = x384 + poly_mix[15] * x385; - Fp x387 = x86 - x25; - arg1[167] = x387; - FpExt x388 = x386 + poly_mix[16] * x387; - Fp x389 = x87 - x25; - arg1[168] = x389; - FpExt x390 = x388 + poly_mix[17] * x389; - Fp x391 = arg1[35]; - FpExt x392 = x390 + poly_mix[18] * x391; - Fp x393 = x88 * x12; - Fp x394 = x89 + x393; - Fp x395 = x59 - x394; - FpExt x396 = x392 + poly_mix[19] * x395; - Fp x397 = x90 * x18; - Fp x398 = x91 + x397; - Fp x399 = x92 * x22; - arg1[187] = x399; - Fp x400 = x398 + x399; - Fp x401 = x61 - x400; - FpExt x402 = x396 + poly_mix[20] * x401; - Fp x403 = x90 * x7; - Fp x404 = x92 * x18; - arg1[188] = x404; - Fp x405 = x403 + x404; - Fp x406 = x93 - x405; - FpExt x407 = x402 + poly_mix[21] * x406; - Fp x408 = x94 - x25; - arg1[169] = x408; - FpExt x409 = x407 + poly_mix[22] * x408; - Fp x410 = x95 - x25; - arg1[170] = x410; - FpExt x411 = x409 + poly_mix[23] * x410; - Fp x412 = x96 - x25; - arg1[171] = x412; - FpExt x413 = x411 + poly_mix[24] * x412; - Fp x414 = x97 - x25; - arg1[172] = x414; - FpExt x415 = x413 + poly_mix[25] * x414; - Fp x416 = arg1[145]; - FpExt x417 = x415 + poly_mix[26] * x416; - Fp x418 = arg1[36]; - FpExt x419 = x417 + poly_mix[27] * x418; - Fp x420 = x98 * x12; - Fp x421 = x99 + x420; - arg1[199] = x421; - Fp x422 = x82 - x421; - FpExt x423 = x419 + poly_mix[28] * x422; - Fp x424 = x100 * x18; - Fp x425 = x101 + x424; - Fp x426 = x102 * x22; - arg1[189] = x426; - Fp x427 = x425 + x426; - Fp x428 = x83 - x427; - FpExt x429 = x423 + poly_mix[29] * x428; - Fp x430 = x100 * x7; - Fp x431 = x102 * x18; - arg1[190] = x431; - Fp x432 = x430 + x431; - Fp x433 = x103 - x432; - FpExt x434 = x429 + poly_mix[30] * x433; - Fp x435 = arg1[37]; - FpExt x436 = x434 + poly_mix[31] * x435; - Fp x437 = arg1[13]; - FpExt x438 = x436 + poly_mix[32] * x437; - Fp x439 = x104 * x22; - arg1[191] = x439; - Fp x440 = x105 * x7; - arg1[181] = x440; - Fp x441 = x439 + x440; - Fp x442 = x26 - x441; - FpExt x443 = x438 + poly_mix[33] * x442; - Fp x444 = x89 * x99; - Fp x445 = x89 * x98; - Fp x446 = x88 * x99; - Fp x447 = x445 + x446; - Fp x448 = x447 * x12; - Fp x449 = x444 + x448; - Fp x450 = arg1[146]; - FpExt x451 = x443 + poly_mix[34] * x450; - Fp x452 = x106 - x25; - arg1[173] = x452; - FpExt x453 = x451 + poly_mix[35] * x452; - Fp x454 = arg1[38]; - FpExt x455 = x453 + poly_mix[36] * x454; - Fp x456 = arg1[39]; - FpExt x457 = x455 + poly_mix[37] * x456; - Fp x458 = x107 * x24; - Fp x459 = x458 + x108; - Fp x460 = x459 * x6; - arg1[193] = x460; - Fp x461 = x109 * x5; - Fp x462 = x460 + x461; - Fp x463 = x462 + x110; - Fp x464 = x449 - x463; - FpExt x465 = x457 + poly_mix[38] * x464; - Fp x466 = x459 * x12; - arg1[194] = x466; - Fp x467 = x466 + x109; - Fp x468 = x89 * x101; - Fp x469 = x467 + x468; - Fp x470 = x88 * x98; - Fp x471 = x469 + x470; - Fp x472 = x91 * x99; - Fp x473 = x471 + x472; - Fp x474 = x89 * x103; - Fp x475 = x88 * x101; - Fp x476 = x474 + x475; - Fp x477 = x91 * x98; - Fp x478 = x476 + x477; - Fp x479 = x93 * x99; - Fp x480 = x478 + x479; - Fp x481 = x480 * x12; - Fp x482 = x473 + x481; - Fp x483 = arg1[147]; - FpExt x484 = x465 + poly_mix[39] * x483; - Fp x485 = x111 - x25; - arg1[174] = x485; - FpExt x486 = x484 + poly_mix[40] * x485; - Fp x487 = arg1[41]; - FpExt x488 = x486 + poly_mix[41] * x487; - Fp x489 = arg1[42]; - FpExt x490 = x488 + poly_mix[42] * x489; - Fp x491 = arg1[148]; - Fp x492 = x491 * x6; - arg1[195] = x492; - Fp x493 = x112 * x5; - Fp x494 = x492 + x493; - Fp x495 = x494 + x113; - Fp x496 = x482 - x495; - FpExt x497 = x490 + poly_mix[43] * x496; - Fp x498 = x491 * x12; - arg1[196] = x498; - Fp x499 = x498 + x112; - Fp x500 = x499 + x4; - Fp x501 = x88 * x103; - Fp x502 = x500 + x501; - Fp x503 = x91 * x101; - Fp x504 = x502 + x503; - Fp x505 = x93 * x98; - Fp x506 = x504 + x505; - Fp x507 = x91 * x103; - Fp x508 = x93 * x101; - Fp x509 = x507 + x508; - Fp x510 = x509 * x12; - Fp x511 = x506 + x510; - Fp x512 = arg1[149]; - FpExt x513 = x497 + poly_mix[44] * x512; - Fp x514 = x114 - x25; - arg1[175] = x514; - FpExt x515 = x513 + poly_mix[45] * x514; - Fp x516 = arg1[43]; - FpExt x517 = x515 + poly_mix[46] * x516; - Fp x518 = arg1[44]; - FpExt x519 = x517 + poly_mix[47] * x518; - Fp x520 = x115 * x24; - Fp x521 = x520 + x116; - Fp x522 = x521 * x6; - arg1[197] = x522; - Fp x523 = x117 * x5; - Fp x524 = x522 + x523; - Fp x525 = x524 + x118; - Fp x526 = x511 - x525; - FpExt x527 = x519 + poly_mix[48] * x526; - Fp x528 = x521 * x12; - arg1[198] = x528; - Fp x529 = x528 + x117; - Fp x530 = x529 + x3; - Fp x531 = x93 * x103; - arg1[177] = x531; - Fp x532 = x530 + x531; - Fp x533 = arg1[150]; - FpExt x534 = x527 + poly_mix[49] * x533; - Fp x535 = x532 - x119; - Fp x536 = x535 * x2; - Fp x537 = arg1[45]; - FpExt x538 = x534 + poly_mix[50] * x537; - Fp x539 = arg1[46]; - FpExt x540 = x538 + poly_mix[51] * x539; - Fp x541 = x120 * x24; - Fp x542 = x541 + x121; - arg1[200] = x542; - Fp x543 = x536 - x542; - FpExt x544 = x540 + poly_mix[52] * x543; - FpExt x545 = x324 + x122 * x544 * poly_mix[59]; - Fp x546 = x54 - x1; - FpExt x547 = arg2 + poly_mix[0] * x546; - FpExt x548 = x547 + poly_mix[1] * x326; - FpExt x549 = x548 + poly_mix[2] * x281; - FpExt x550 = x549 + poly_mix[3] * x330; - FpExt x551 = x550 + poly_mix[4] * x332; - FpExt x552 = x551 + poly_mix[5] * x334; - FpExt x553 = x552 + poly_mix[6] * x336; - FpExt x554 = x553 + poly_mix[7] * x338; - FpExt x555 = x554 + poly_mix[8] * x348; - Fp x556 = arg1[151]; - Fp x557 = x351 - x556; - FpExt x558 = x555 + poly_mix[9] * x557; - FpExt x559 = x558 + poly_mix[10] * x367; - FpExt x560 = x559 + poly_mix[11] * x376; - FpExt x561 = x560 + poly_mix[12] * x379; - FpExt x562 = x561 + poly_mix[13] * x381; - FpExt x563 = x562 + poly_mix[14] * x383; - FpExt x564 = x563 + poly_mix[15] * x385; - FpExt x565 = x564 + poly_mix[16] * x387; - FpExt x566 = x565 + poly_mix[17] * x389; - FpExt x567 = x566 + poly_mix[18] * x391; - FpExt x568 = x567 + poly_mix[19] * x395; - FpExt x569 = x568 + poly_mix[20] * x401; - FpExt x570 = x569 + poly_mix[21] * x406; - FpExt x571 = x570 + poly_mix[22] * x408; - FpExt x572 = x571 + poly_mix[23] * x410; - FpExt x573 = x572 + poly_mix[24] * x412; - FpExt x574 = x573 + poly_mix[25] * x414; - FpExt x575 = x574 + poly_mix[26] * x416; - FpExt x576 = x575 + poly_mix[27] * x418; - FpExt x577 = x576 + poly_mix[28] * x422; - FpExt x578 = x577 + poly_mix[29] * x428; - FpExt x579 = x578 + poly_mix[30] * x433; - FpExt x580 = x579 + poly_mix[31] * x435; - FpExt x581 = x580 + poly_mix[32] * x437; - FpExt x582 = x581 + poly_mix[33] * x442; - FpExt x583 = x582 + poly_mix[34] * x450; - FpExt x584 = x583 + poly_mix[35] * x452; - FpExt x585 = x584 + poly_mix[36] * x454; - FpExt x586 = x585 + poly_mix[37] * x456; - FpExt x587 = x586 + poly_mix[38] * x464; - FpExt x588 = x587 + poly_mix[39] * x483; - FpExt x589 = x588 + poly_mix[40] * x485; - FpExt x590 = x589 + poly_mix[41] * x487; - FpExt x591 = x590 + poly_mix[42] * x489; - FpExt x592 = x591 + poly_mix[43] * x496; - FpExt x593 = x592 + poly_mix[44] * x512; - FpExt x594 = x593 + poly_mix[45] * x514; - FpExt x595 = x594 + poly_mix[46] * x516; - FpExt x596 = x595 + poly_mix[47] * x518; - FpExt x597 = x596 + poly_mix[48] * x526; - FpExt x598 = x597 + poly_mix[49] * x533; - FpExt x599 = x598 + poly_mix[50] * x537; - FpExt x600 = x599 + poly_mix[51] * x539; - FpExt x601 = x600 + poly_mix[52] * x543; - FpExt x602 = x545 + x123 * x601 * poly_mix[112]; - Fp x603 = x281 - x25; - FpExt x604 = x327 + poly_mix[1] * x283; - FpExt x605 = x604 + poly_mix[2] * x603; - FpExt x606 = x605 + poly_mix[3] * x381; - FpExt x607 = x606 + poly_mix[4] * x383; - FpExt x608 = x607 + poly_mix[5] * x385; - FpExt x609 = x608 + poly_mix[6] * x387; - FpExt x610 = x609 + poly_mix[7] * x389; - FpExt x611 = x610 + poly_mix[8] * x330; - FpExt x612 = x611 + poly_mix[9] * x395; - Fp x613 = arg1[152]; - Fp x614 = x398 + x613; - Fp x615 = x61 - x614; - FpExt x616 = x612 + poly_mix[10] * x615; - Fp x617 = x79 * x18; - Fp x618 = x403 + x617; - Fp x619 = x93 - x618; - FpExt x620 = x616 + poly_mix[11] * x619; - FpExt x621 = x620 + poly_mix[12] * x408; - FpExt x622 = x621 + poly_mix[13] * x410; - FpExt x623 = x622 + poly_mix[14] * x412; - FpExt x624 = x623 + poly_mix[15] * x414; - FpExt x625 = x624 + poly_mix[16] * x416; - FpExt x626 = x625 + poly_mix[17] * x332; - Fp x627 = x69 - x421; - FpExt x628 = x626 + poly_mix[18] * x627; - Fp x629 = arg1[153]; - Fp x630 = x425 + x629; - Fp x631 = x71 - x630; - FpExt x632 = x628 + poly_mix[19] * x631; - Fp x633 = x75 * x18; - Fp x634 = x430 + x633; - Fp x635 = x103 - x634; - FpExt x636 = x632 + poly_mix[20] * x635; - FpExt x637 = x636 + poly_mix[21] * x334; - FpExt x638 = x637 + poly_mix[22] * x348; - Fp x639 = x76 * x22; - Fp x640 = x80 * x7; - arg1[217] = x640; - Fp x641 = x639 + x640; - Fp x642 = x26 - x641; - FpExt x643 = x638 + poly_mix[23] * x642; - FpExt x644 = x643 + poly_mix[24] * x437; - FpExt x645 = x644 + poly_mix[25] * x452; - FpExt x646 = x645 + poly_mix[26] * x336; - FpExt x647 = x646 + poly_mix[27] * x338; - Fp x648 = x78 * x24; - Fp x649 = x648 + x77; - Fp x650 = x649 * x6; - Fp x651 = x650 + x461; - Fp x652 = x651 + x105; - Fp x653 = x449 - x652; - FpExt x654 = x647 + poly_mix[28] * x653; - Fp x655 = x649 * x12; - Fp x656 = x655 + x109; - Fp x657 = x656 + x468; - Fp x658 = x657 + x470; - Fp x659 = x658 + x472; - Fp x660 = x659 + x481; - FpExt x661 = x654 + poly_mix[29] * x450; - FpExt x662 = x661 + poly_mix[30] * x485; - Fp x663 = arg1[32]; - FpExt x664 = x662 + poly_mix[31] * x663; - Fp x665 = arg1[33]; - FpExt x666 = x664 + poly_mix[32] * x665; - Fp x667 = x82 * x24; - arg1[161] = x667; - Fp x668 = x667 + x81; - Fp x669 = x668 * x6; - Fp x670 = x669 + x493; - Fp x671 = x670 + x110; - Fp x672 = x660 - x671; - FpExt x673 = x666 + poly_mix[33] * x672; - Fp x674 = x668 * x12; - Fp x675 = x674 + x112; - Fp x676 = x675 + x4; - Fp x677 = x676 + x501; - Fp x678 = x677 + x503; - Fp x679 = x678 + x505; - Fp x680 = x679 + x510; - FpExt x681 = x673 + poly_mix[34] * x483; - FpExt x682 = x681 + poly_mix[35] * x514; - Fp x683 = arg1[34]; - FpExt x684 = x682 + poly_mix[36] * x683; - FpExt x685 = x684 + poly_mix[37] * x391; - Fp x686 = x92 * x24; - Fp x687 = x686 + x83; - Fp x688 = x687 * x6; - Fp x689 = x688 + x523; - Fp x690 = x689 + x113; - Fp x691 = x680 - x690; - FpExt x692 = x685 + poly_mix[38] * x691; - Fp x693 = x687 * x12; - Fp x694 = x693 + x117; - Fp x695 = x694 + x3; - Fp x696 = x695 + x531; - FpExt x697 = x692 + poly_mix[39] * x512; - Fp x698 = x696 - x118; - Fp x699 = x698 * x2; - FpExt x700 = x697 + poly_mix[40] * x418; - FpExt x701 = x700 + poly_mix[41] * x435; - Fp x702 = x104 * x24; - Fp x703 = x702 + x102; - Fp x704 = x699 - x703; - FpExt x705 = x701 + poly_mix[42] * x704; - FpExt x706 = x705 + poly_mix[43] * x124; - FpExt x707 = x602 + x125 * x706 * poly_mix[165]; - FpExt x708 = x328 + poly_mix[2] * x603; - FpExt x709 = x708 + poly_mix[3] * x381; - FpExt x710 = x709 + poly_mix[4] * x383; - FpExt x711 = x710 + poly_mix[5] * x385; - FpExt x712 = x711 + poly_mix[6] * x387; - FpExt x713 = x712 + poly_mix[7] * x389; - FpExt x714 = x713 + poly_mix[8] * x330; - FpExt x715 = x714 + poly_mix[9] * x395; - FpExt x716 = x715 + poly_mix[10] * x615; - FpExt x717 = x716 + poly_mix[11] * x619; - FpExt x718 = x717 + poly_mix[12] * x408; - FpExt x719 = x718 + poly_mix[13] * x410; - FpExt x720 = x719 + poly_mix[14] * x412; - FpExt x721 = x720 + poly_mix[15] * x414; - FpExt x722 = x721 + poly_mix[16] * x416; - FpExt x723 = x722 + poly_mix[17] * x332; - FpExt x724 = x723 + poly_mix[18] * x627; - FpExt x725 = x724 + poly_mix[19] * x631; - FpExt x726 = x725 + poly_mix[20] * x635; - FpExt x727 = x726 + poly_mix[21] * x334; - FpExt x728 = x727 + poly_mix[22] * x348; - FpExt x729 = x728 + poly_mix[23] * x642; - FpExt x730 = x729 + poly_mix[24] * x437; - FpExt x731 = x730 + poly_mix[25] * x452; - FpExt x732 = x731 + poly_mix[26] * x336; - FpExt x733 = x732 + poly_mix[27] * x338; - FpExt x734 = x733 + poly_mix[28] * x653; - FpExt x735 = x734 + poly_mix[29] * x450; - FpExt x736 = x735 + poly_mix[30] * x485; - FpExt x737 = x736 + poly_mix[31] * x663; - FpExt x738 = x737 + poly_mix[32] * x665; - FpExt x739 = x738 + poly_mix[33] * x672; - Fp x740 = x394 * x75; - Fp x741 = x676 - x740; - Fp x742 = x421 * x79; - Fp x743 = x741 - x742; - Fp x744 = x743 + x501; - Fp x745 = x744 + x503; - Fp x746 = x745 + x505; - Fp x747 = x746 + x510; - FpExt x748 = x739 + poly_mix[34] * x483; - FpExt x749 = x748 + poly_mix[35] * x514; - FpExt x750 = x749 + poly_mix[36] * x683; - FpExt x751 = x750 + poly_mix[37] * x391; - Fp x752 = x747 - x690; - FpExt x753 = x751 + poly_mix[38] * x752; - Fp x754 = x93 * x12; - arg1[206] = x754; - Fp x755 = x91 + x754; - Fp x756 = x755 * x75; - Fp x757 = x695 - x756; - Fp x758 = x103 * x12; - Fp x759 = x101 + x758; - Fp x760 = x759 * x79; - Fp x761 = x757 - x760; - Fp x762 = x761 + x531; - FpExt x763 = x753 + poly_mix[39] * x512; - Fp x764 = x762 - x118; - Fp x765 = x764 * x2; - FpExt x766 = x763 + poly_mix[40] * x418; - FpExt x767 = x766 + poly_mix[41] * x435; - Fp x768 = x765 - x703; - FpExt x769 = x767 + poly_mix[42] * x768; - FpExt x770 = x769 + poly_mix[43] * x124; - FpExt x771 = x707 + x126 * x770 * poly_mix[186]; - Fp x772 = x283 - x24; - FpExt x773 = x327 + poly_mix[1] * x772; - FpExt x774 = x773 + poly_mix[2] * x603; - FpExt x775 = x774 + poly_mix[3] * x381; - FpExt x776 = x775 + poly_mix[4] * x383; - FpExt x777 = x776 + poly_mix[5] * x385; - FpExt x778 = x777 + poly_mix[6] * x387; - FpExt x779 = x778 + poly_mix[7] * x389; - FpExt x780 = x779 + poly_mix[8] * x330; - FpExt x781 = x780 + poly_mix[9] * x395; - FpExt x782 = x781 + poly_mix[10] * x615; - FpExt x783 = x782 + poly_mix[11] * x619; - FpExt x784 = x783 + poly_mix[12] * x408; - FpExt x785 = x784 + poly_mix[13] * x410; - FpExt x786 = x785 + poly_mix[14] * x412; - FpExt x787 = x786 + poly_mix[15] * x414; - FpExt x788 = x787 + poly_mix[16] * x416; - FpExt x789 = x788 + poly_mix[17] * x332; - FpExt x790 = x789 + poly_mix[18] * x627; - FpExt x791 = x790 + poly_mix[19] * x631; - FpExt x792 = x791 + poly_mix[20] * x635; - FpExt x793 = x792 + poly_mix[21] * x334; - FpExt x794 = x793 + poly_mix[22] * x348; - FpExt x795 = x794 + poly_mix[23] * x642; - FpExt x796 = x795 + poly_mix[24] * x437; - FpExt x797 = x796 + poly_mix[25] * x452; - FpExt x798 = x797 + poly_mix[26] * x336; - FpExt x799 = x798 + poly_mix[27] * x338; - FpExt x800 = x799 + poly_mix[28] * x653; - FpExt x801 = x800 + poly_mix[29] * x450; - FpExt x802 = x801 + poly_mix[30] * x485; - FpExt x803 = x802 + poly_mix[31] * x663; - FpExt x804 = x803 + poly_mix[32] * x665; - FpExt x805 = x804 + poly_mix[33] * x672; - Fp x806 = x676 - x742; - Fp x807 = x806 + x501; - Fp x808 = x807 + x503; - Fp x809 = x808 + x505; - Fp x810 = x809 + x510; - FpExt x811 = x805 + poly_mix[34] * x483; - FpExt x812 = x811 + poly_mix[35] * x514; - FpExt x813 = x812 + poly_mix[36] * x683; - FpExt x814 = x813 + poly_mix[37] * x391; - Fp x815 = x810 - x690; - FpExt x816 = x814 + poly_mix[38] * x815; - Fp x817 = x695 - x760; - Fp x818 = x817 + x531; - FpExt x819 = x816 + poly_mix[39] * x512; - Fp x820 = x818 - x118; - Fp x821 = x820 * x2; - FpExt x822 = x819 + poly_mix[40] * x418; - FpExt x823 = x822 + poly_mix[41] * x435; - Fp x824 = x821 - x703; - FpExt x825 = x823 + poly_mix[42] * x824; - FpExt x826 = x825 + poly_mix[43] * x124; - FpExt x827 = x771 + x127 * x826 * poly_mix[228]; - Fp x828 = x283 - x23; - FpExt x829 = x327 + poly_mix[1] * x828; - FpExt x830 = x829 + poly_mix[2] * x603; - FpExt x831 = x830 + poly_mix[3] * x381; - FpExt x832 = x831 + poly_mix[4] * x383; - FpExt x833 = x832 + poly_mix[5] * x385; - FpExt x834 = x833 + poly_mix[6] * x387; - FpExt x835 = x834 + poly_mix[7] * x389; - FpExt x836 = x835 + poly_mix[8] * x330; - FpExt x837 = x836 + poly_mix[9] * x395; - FpExt x838 = x837 + poly_mix[10] * x615; - FpExt x839 = x838 + poly_mix[11] * x619; - FpExt x840 = x839 + poly_mix[12] * x408; - FpExt x841 = x840 + poly_mix[13] * x410; - FpExt x842 = x841 + poly_mix[14] * x412; - FpExt x843 = x842 + poly_mix[15] * x414; - FpExt x844 = x843 + poly_mix[16] * x416; - FpExt x845 = x844 + poly_mix[17] * x332; - FpExt x846 = x845 + poly_mix[18] * x627; - FpExt x847 = x846 + poly_mix[19] * x631; - FpExt x848 = x847 + poly_mix[20] * x635; - FpExt x849 = x848 + poly_mix[21] * x334; - FpExt x850 = x849 + poly_mix[22] * x348; - FpExt x851 = x850 + poly_mix[23] * x642; - FpExt x852 = x851 + poly_mix[24] * x437; - FpExt x853 = x852 + poly_mix[25] * x452; - FpExt x854 = x853 + poly_mix[26] * x336; - FpExt x855 = x854 + poly_mix[27] * x338; - FpExt x856 = x855 + poly_mix[28] * x653; - FpExt x857 = x856 + poly_mix[29] * x450; - FpExt x858 = x857 + poly_mix[30] * x485; - FpExt x859 = x858 + poly_mix[31] * x663; - FpExt x860 = x859 + poly_mix[32] * x665; - FpExt x861 = x860 + poly_mix[33] * x672; - FpExt x862 = x861 + poly_mix[34] * x483; - FpExt x863 = x862 + poly_mix[35] * x514; - FpExt x864 = x863 + poly_mix[36] * x683; - FpExt x865 = x864 + poly_mix[37] * x391; - FpExt x866 = x865 + poly_mix[38] * x691; - FpExt x867 = x866 + poly_mix[39] * x512; - FpExt x868 = x867 + poly_mix[40] * x418; - FpExt x869 = x868 + poly_mix[41] * x435; - FpExt x870 = x869 + poly_mix[42] * x704; - FpExt x871 = x870 + poly_mix[43] * x124; - FpExt x872 = x827 + x128 * x871 * poly_mix[255]; - FpExt x873 = arg2 + poly_mix[0] * x27; - FpExt x874 = x873 + poly_mix[1] * x129; - FpExt x875 = x874 + poly_mix[2] * x130; - FpExt x876 = x875 + poly_mix[3] * x131; - FpExt x877 = x876 + poly_mix[4] * x132; - FpExt x878 = x877 + poly_mix[5] * x133; - FpExt x879 = x878 + poly_mix[6] * x124; - FpExt x880 = x879 + poly_mix[7] * x84; - FpExt x881 = x880 + poly_mix[8] * x85; - FpExt x882 = x881 + poly_mix[9] * x134; - FpExt x883 = x882 + poly_mix[10] * x86; - FpExt x884 = x883 + poly_mix[11] * x87; - FpExt x885 = x884 + poly_mix[12] * x94; - FpExt x886 = x885 + poly_mix[13] * x95; - FpExt x887 = x886 + poly_mix[14] * x96; - FpExt x888 = x887 + poly_mix[15] * x97; - FpExt x889 = x888 + poly_mix[16] * x135; - FpExt x890 = x889 + poly_mix[17] * x106; - FpExt x891 = x890 + poly_mix[18] * x111; - FpExt x892 = x891 + poly_mix[19] * x114; - FpExt x893 = x872 + x136 * x892 * poly_mix[276]; - FpExt x894 = x893 + x137 * x892 * poly_mix[296]; - Fp x895 = x138 * x122; - Fp x896 = x138 * x123; - Fp x897 = x139 * x125; - Fp x898 = x140 * x126; - Fp x899 = x140 * x127; - Fp x900 = x140 * x128; - Fp x901 = x895 + x896; - Fp x902 = x901 + x897; - Fp x903 = x902 + x898; - Fp x904 = x903 + x899; - Fp x905 = x904 + x900; - Fp x906 = x140 * x122; - Fp x907 = x140 * x123; - Fp x908 = x138 * x125; - Fp x909 = x141 * x126; - Fp x910 = x141 * x127; - Fp x911 = x141 * x128; - Fp x912 = x906 + x907; - Fp x913 = x912 + x908; - Fp x914 = x913 + x909; - Fp x915 = x914 + x910; - Fp x916 = x915 + x911; - Fp x917 = arg1[47]; - FpExt x918 = x894 + poly_mix[316] * x917; - Fp x919 = x275 * x142; - Fp x920 = arg1[154]; - Fp x921 = x919 - x920; - FpExt x922 = x918 + poly_mix[317] * x921; - Fp x923 = x143 * x275; - FpExt x924 = x922 + poly_mix[318] * x923; - Fp x925 = x143 * x142; - FpExt x926 = x924 + poly_mix[319] * x925; - Fp x927 = x920 * x275; - Fp x928 = x25 - x920; - Fp x929 = x928 * x9; - Fp x930 = x284 + x929; - Fp x931 = x930 + x927; - Fp x932 = x931 - x144; - FpExt x933 = x926 + poly_mix[320] * x932; - Fp x934 = x145 - x27; - FpExt x935 = x933 + poly_mix[321] * x934; - Fp x936 = x146 - x25; - arg1[446] = x936; - FpExt x937 = x935 + poly_mix[322] * x936; - FpExt x938 = x937 + poly_mix[323] * x26; - FpExt x939 = x938 + poly_mix[324] * x26; - Fp x940 = x147 - x144; - FpExt x941 = x939 + poly_mix[325] * x940; - Fp x942 = x35 - x148; - Fp x943 = x149 - x25; - FpExt x944 = x941 + poly_mix[326] * x943; - Fp x945 = x150 - x942; - FpExt x946 = x944 + poly_mix[327] * x945; - Fp x947 = x151 - x905; - FpExt x948 = x946 + poly_mix[328] * x947; - Fp x949 = x152 - x916; - FpExt x950 = x948 + poly_mix[329] * x949; - Fp x951 = x153 - x25; - FpExt x952 = x950 + poly_mix[330] * x951; - Fp x953 = arg1[63]; - FpExt x954 = x952 + poly_mix[331] * x953; - Fp x955 = x154 * x5; - Fp x956 = x955 + x155; - Fp x957 = arg1[100]; - Fp x958 = x957 - x956; - FpExt x959 = x954 + poly_mix[332] * x958; - Fp x960 = arg1[102]; - Fp x961 = x960 + x154; - Fp x962 = x156 - x25; - arg1[451] = x962; - FpExt x963 = x959 + poly_mix[333] * x962; - Fp x964 = arg1[66]; - FpExt x965 = x963 + poly_mix[334] * x964; - Fp x966 = x157 * x5; - Fp x967 = x966 + x158; - Fp x968 = x961 - x967; - FpExt x969 = x965 + poly_mix[335] * x968; - FpExt x970 = arg3 + x159 * x969 * poly_mix[382]; - Fp x971 = x25 - x160; - arg1[212] = x971; - Fp x972 = x160 * x971; - arg1[211] = x972; - Fp x973 = x24 - x160; - Fp x974 = x972 * x973; - Fp x975 = x23 - x160; - Fp x976 = x974 * x975; - FpExt x977 = arg4 + poly_mix[2] * x976; - Fp x978 = x30 - x25; - FpExt x979 = x977 + poly_mix[3] * x978; - Fp x980 = arg1[120]; - Fp x981 = x29 - x980; - FpExt x982 = x979 + poly_mix[4] * x981; - Fp x983 = x25 - x36; - Fp x984 = x36 * x983; - FpExt x985 = x982 + poly_mix[5] * x984; - Fp x986 = x960 * x31; - Fp x987 = x986 - x983; - FpExt x988 = x985 + poly_mix[6] * x987; - Fp x989 = x36 * x960; - FpExt x990 = x988 + poly_mix[7] * x989; - Fp x991 = x36 * x31; - FpExt x992 = x990 + poly_mix[8] * x991; - FpExt x993 = x992 + poly_mix[9] * x36; - Fp x994 = x33 - x25; - arg1[242] = x994; - FpExt x995 = x993 + poly_mix[10] * x994; - Fp x996 = x161 * x10; - Fp x997 = x996 + x160; - Fp x998 = arg1[99]; - Fp x999 = x997 - x998; - FpExt x1000 = x995 + poly_mix[11] * x999; - Fp x1001 = arg1[121]; - Fp x1002 = x1001 + x161; - FpExt x1003 = x1000 + poly_mix[12] * x160; - Fp x1004 = x34 - x27; - FpExt x1005 = x1003 + poly_mix[13] * x1004; - Fp x1006 = x56 - x25; - arg1[214] = x1006; - FpExt x1007 = x1005 + poly_mix[14] * x1006; - FpExt x1008 = x1007 + poly_mix[15] * x26; - FpExt x1009 = x1008 + poly_mix[16] * x26; - Fp x1010 = x32 - x1002; - FpExt x1011 = x1009 + poly_mix[17] * x1010; - Fp x1012 = x38 - x62; - FpExt x1013 = x1011 + poly_mix[18] * x1012; - Fp x1014 = arg1[155]; - FpExt x1015 = x1013 + poly_mix[19] * x1014; - Fp x1016 = x35 - x37; - Fp x1017 = x60 - x25; - arg1[230] = x1017; - FpExt x1018 = x1015 + poly_mix[20] * x1017; - Fp x1019 = x162 - x1016; - FpExt x1020 = x1018 + poly_mix[21] * x1019; - FpExt x1021 = x1020 + poly_mix[22] * x204; - FpExt x1022 = x1021 + poly_mix[23] * x210; - FpExt x1023 = x1022 + poly_mix[24] * x212; - Fp x1024 = arg1[156]; - FpExt x1025 = x1023 + poly_mix[25] * x1024; - Fp x1026 = arg1[157]; - FpExt x1027 = x1025 + poly_mix[26] * x1026; - FpExt x1028 = x1027 + poly_mix[27] * x218; - FpExt x1029 = x1028 + poly_mix[28] * x221; - FpExt x1030 = x1029 + poly_mix[29] * x232; - FpExt x1031 = x1030 + poly_mix[30] * x234; - Fp x1032 = x25 - x54; - Fp x1033 = x54 * x1032; - arg1[207] = x1033; - FpExt x1034 = x1031 + poly_mix[31] * x1033; - Fp x1035 = x25 - x163; - Fp x1036 = x163 * x1035; - FpExt x1037 = x1034 + poly_mix[32] * x1036; - Fp x1038 = arg1[158]; - FpExt x1039 = x1037 + poly_mix[33] * x1038; - Fp x1040 = x25 - x164; - Fp x1041 = x164 * x1040; - arg1[208] = x1041; - Fp x1042 = x24 - x164; - Fp x1043 = x1041 * x1042; - Fp x1044 = x23 - x164; - Fp x1045 = x1043 * x1044; - FpExt x1046 = x1039 + poly_mix[34] * x1045; - Fp x1047 = x25 - x165; - arg1[216] = x1047; - Fp x1048 = x165 * x1047; - arg1[209] = x1048; - Fp x1049 = x24 - x165; - Fp x1050 = x1048 * x1049; - Fp x1051 = x23 - x165; - Fp x1052 = x1050 * x1051; - FpExt x1053 = x1046 + poly_mix[35] * x1052; - Fp x1054 = x24 - x166; - Fp x1055 = arg1[159]; - Fp x1056 = x1055 * x1054; - Fp x1057 = x23 - x166; - Fp x1058 = x1056 * x1057; - FpExt x1059 = x1053 + poly_mix[36] * x1058; - Fp x1060 = x40 * x21; - Fp x1061 = arg1[109]; - Fp x1062 = x1061 + x1060; - Fp x1063 = x49 * x20; - Fp x1064 = x1062 + x1063; - Fp x1065 = x50 * x19; - Fp x1066 = x1064 + x1065; - Fp x1067 = x51 * x18; - Fp x1068 = x1066 + x1067; - Fp x1069 = x52 * x17; - Fp x1070 = x1068 + x1069; - Fp x1071 = x41 * x16; - Fp x1072 = x1070 + x1071; - Fp x1073 = x42 * x10; - Fp x1074 = x1072 + x1073; - Fp x1075 = x1074 + x53; - Fp x1076 = x58 - x1075; - FpExt x1077 = x1059 + poly_mix[37] * x1076; - Fp x1078 = x54 * x22; - Fp x1079 = x163 * x15; - arg1[331] = x1079; - Fp x1080 = x1078 + x1079; - Fp x1081 = x28 * x14; - Fp x1082 = x1080 + x1081; - Fp x1083 = x164 * x13; - Fp x1084 = x1082 + x1083; - Fp x1085 = x165 * x12; - Fp x1086 = x1084 + x1085; - Fp x1087 = x166 * x18; - Fp x1088 = x1086 + x1087; - Fp x1089 = x1088 + x167; - Fp x1090 = x62 - x1089; - FpExt x1091 = x1077 + poly_mix[38] * x1090; - Fp x1092 = x42 * x11; - Fp x1093 = x53 * x24; - Fp x1094 = x1092 + x1093; - Fp x1095 = x1094 + x54; - Fp x1096 = x51 * x11; - Fp x1097 = x52 * x24; - Fp x1098 = x1096 + x1097; - Fp x1099 = x1098 + x41; - arg1[185] = x1099; - Fp x1100 = x164 * x11; - Fp x1101 = x165 * x24; - arg1[310] = x1101; - Fp x1102 = x1100 + x1101; - Fp x1103 = x1102 + x166; - arg1[201] = x1103; - Fp x1104 = x40 * x16; - Fp x1105 = x49 * x10; - Fp x1106 = x1104 + x1105; - Fp x1107 = x1106 + x50; - Fp x1108 = x48 * x9; - Fp x1109 = x1108 + x1107; - arg1[180] = x1109; - Fp x1110 = x163 * x10; - arg1[307] = x1110; - Fp x1111 = x1110 + x28; - arg1[186] = x1111; - Fp x1112 = x284 + x1095; - Fp x1113 = x1112 - x168; - FpExt x1114 = x1091 + poly_mix[39] * x1113; - Fp x1115 = x61 - x27; - arg1[231] = x1115; - FpExt x1116 = x1114 + poly_mix[40] * x1115; - Fp x1117 = x67 - x25; - arg1[232] = x1117; - FpExt x1118 = x1116 + poly_mix[41] * x1117; - FpExt x1119 = x1118 + poly_mix[42] * x26; - FpExt x1120 = x1119 + poly_mix[43] * x26; - Fp x1121 = x59 - x168; - FpExt x1122 = x1120 + poly_mix[44] * x1121; - Fp x1123 = x64 - x66; - arg1[233] = x1123; - FpExt x1124 = x1122 + poly_mix[45] * x1123; - Fp x1125 = x55 - x72; - arg1[234] = x1125; - FpExt x1126 = x1124 + poly_mix[46] * x1125; - Fp x1127 = x35 - x63; - Fp x1128 = x68 - x25; - arg1[235] = x1128; - FpExt x1129 = x1126 + poly_mix[47] * x1128; - Fp x1130 = x70 - x1127; - arg1[236] = x1130; - FpExt x1131 = x1129 + poly_mix[48] * x1130; - Fp x1132 = x284 + x1099; - Fp x1133 = x1132 - x81; - FpExt x1134 = x1131 + poly_mix[49] * x1133; - Fp x1135 = x71 - x27; - FpExt x1136 = x1134 + poly_mix[50] * x1135; - Fp x1137 = x79 - x25; - FpExt x1138 = x1136 + poly_mix[51] * x1137; - FpExt x1139 = x1138 + poly_mix[52] * x26; - FpExt x1140 = x1139 + poly_mix[53] * x26; - Fp x1141 = x69 - x81; - FpExt x1142 = x1140 + poly_mix[54] * x1141; - Fp x1143 = x74 - x75; - FpExt x1144 = x1142 + poly_mix[55] * x1143; - Fp x1145 = x65 - x76; - FpExt x1146 = x1144 + poly_mix[56] * x1145; - Fp x1147 = x35 - x73; - Fp x1148 = x77 - x25; - FpExt x1149 = x1146 + poly_mix[57] * x1148; - Fp x1150 = x78 - x1147; - FpExt x1151 = x1149 + poly_mix[58] * x1150; - Fp x1152 = x167 - x8; - Fp x1153 = x1111 - x0; - arg1[184] = x1153; - FpExt x1154 = arg2 + poly_mix[0] * x1152; - FpExt x1155 = x1154 + poly_mix[1] * x1153; - FpExt x1156 = x1155 + poly_mix[2] * x1109; - FpExt x1157 = x1156 + poly_mix[3] * x665; - auto x1158 = rv32im_v2_10(idx, - size, - arg1, - x1157, - x1151, - x1155, - arg2, - x1154, - x970, - arg4, - x876, - x877, - arg5, - x874, - arg6, - x873, - arg7, - arg8, - arg9, - arg10); - - return x1158; -} -__device__ FpExt rv32im_v2_7(uint32_t idx, - uint32_t size, - FpExt arg0, - FpExt arg1, - Fp* arg2, - FpExt arg3, - FpExt arg4, - FpExt arg5, - FpExt* arg6, - FpExt arg7, - const Fp* arg8, - const Fp* arg9, - const Fp* arg10, - const Fp* arg11) { - uint32_t mask = size - 1; - Fp x0(7); - Fp x1(6); - Fp x2(5); - Fp x3(18); - Fp x4(17); - Fp x5(32768); - Fp x6(1073725453); - Fp x7(1509949441); - FpExt x8{0, 0, 0, 0}; - FpExt x9{0, 1, 0, 0}; - Fp x10(22); - Fp x11(1140850688); - Fp x12(1073741824); - Fp x13(1342177281); - Fp x14(65536); - Fp x15(16384); - Fp x16(13); - Fp x17(12); - Fp x18(32); - Fp x19(16); - Fp x20(11); - Fp x21(10); - Fp x22(9); - Fp x23(4); - Fp x24(1073725504); - Fp x25(2013265920); - Fp x26(3); - Fp x27(2); - Fp x28(1); - Fp x29(1073725452); - Fp x30(1073725451); - Fp x31(1073725450); - Fp x32(0); - Fp x33 = arg8[34 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x34 = arg11[69]; - Fp x35 = arg8[41 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x36 = arg11[72]; - Fp x37 = arg8[42 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x38 = arg11[71]; - Fp x39 = arg8[43 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x40 = arg8[48 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x41 = arg8[51 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x42 = arg8[56 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x43 = arg8[63 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x44 = arg8[65 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x45 = arg8[67 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x46 = arg8[69 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x47 = arg8[20 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x48 = arg8[28 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x49 = arg8[36 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x50 = arg8[44 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x51 = arg8[64 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x52 = arg8[50 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x53 = arg8[49 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x54 = arg8[68 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x55 = arg8[70 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x56 = arg8[52 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x57 = arg8[66 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x58 = arg8[57 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x59 = arg8[58 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x60 = arg8[86 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x61 = arg8[87 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x62 = arg8[84 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x63 = arg8[85 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x64 = arg8[83 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x65 = arg8[88 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x66 = arg8[90 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x67 = arg8[94 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x68 = arg8[95 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x69 = arg8[93 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x70 = arg8[96 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x71 = arg8[92 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x72 = arg8[91 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x73 = arg8[98 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x74 = arg8[97 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x75 = arg8[99 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x76 = arg8[100 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x77 = arg8[101 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x78 = arg8[21 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x79 = arg8[22 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x80 = arg8[27 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x81 = arg8[32 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x82 = arg8[35 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x83 = arg8[40 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x84 = arg8[59 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x85 = arg8[61 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x86 = arg8[23 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x87 = arg8[71 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x88 = arg8[102 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x89 = arg8[103 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x90 = arg8[73 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x91 = arg8[104 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x92 = arg8[105 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x93 = arg8[24 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x94 = arg8[25 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x95 = arg8[26 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x96 = arg8[82 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x97 = arg8[83 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x98 = arg8[84 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x99 = arg8[85 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x100 = arg8[19 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x101 = arg8[99 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x102 = arg8[101 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x103 = arg8[86 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x104 = arg8[87 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x105 = arg8[104 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x106 = arg8[42 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x107 = arg8[94 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x108 = arg8[97 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x109 = arg8[95 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x110 = arg8[96 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x111 = arg8[71 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x112 = arg8[68 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x113 = arg8[73 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x114 = arg8[71 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x115 = arg8[72 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x116 = arg8[73 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x117 = arg8[106 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x118 = arg8[107 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x119 = arg8[108 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x120 = arg8[109 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x121 = arg8[112 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x122 = arg8[111 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x123 = arg8[115 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x124 = arg8[114 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x125 = arg8[9 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x126 = arg8[188 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x127 = arg8[189 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x128 = arg8[29 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x129 = arg8[30 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x130 = arg8[31 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x131 = arg8[33 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x132 = arg8[37 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x133 = arg8[38 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x134 = arg8[39 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x135 = arg8[45 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x136 = arg8[46 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x137 = arg8[47 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x138 = arg8[53 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x139 = arg8[54 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x140 = arg8[55 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x141 = arg8[60 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x142 = arg8[62 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x143 = arg8[74 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x144 = arg8[79 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x145 = arg8[82 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x146 = arg8[130 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x147 = arg8[132 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x148 = arg8[134 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x149 = arg8[136 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x150 = arg8[0 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x151 = arg8[131 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x152 = arg8[75 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x153 = arg8[77 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x154 = arg8[80 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x155 = arg8[76 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x156 = arg8[133 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x157 = arg8[135 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x158 = arg8[89 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x159 = arg8[137 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x160 = arg8[182 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x161 = arg8[183 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x162 = arg8[184 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x163 = arg8[185 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x164 = arg8[186 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x165 = arg8[187 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x166 = arg8[119 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x167 = arg8[122 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x168 = arg8[127 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x169 = arg8[138 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x170 = arg8[140 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x171 = arg8[142 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x172 = arg8[144 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x173 = arg8[146 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x174 = arg8[148 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x175 = arg8[150 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x176 = arg8[152 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x177 = arg8[154 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x178 = arg8[156 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x179 = arg8[158 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x180 = arg8[160 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x181 = arg8[162 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x182 = arg8[164 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x183 = arg8[166 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x184 = arg8[168 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x185 = arg8[170 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x186 = arg8[172 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x187 = arg8[174 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x188 = arg8[176 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x189 = arg8[178 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x190 = arg8[180 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x191 = arg8[28 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x192 = arg8[81 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x193 = arg8[139 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x194 = arg8[141 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x195 = arg8[113 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x196 = arg8[117 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x197 = arg8[120 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x198 = arg8[118 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x199 = arg8[121 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x200 = arg8[116 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x201 = arg8[143 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x202 = arg8[123 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x203 = arg8[125 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x204 = arg8[128 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x205 = arg8[126 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x206 = arg8[129 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x207 = arg8[124 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x208 = arg8[145 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x209 = arg8[27 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x210 = arg8[29 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x211 = arg8[30 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x212 = arg8[31 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x213 = arg8[32 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x214 = arg8[35 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x215 = arg8[36 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x216 = arg8[37 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x217 = arg8[65 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x218 = arg8[64 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x219 = arg8[63 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x220 = arg8[62 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x221 = arg8[34 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x222 = x33 - x34; - FpExt x223 = arg0 + poly_mix[20] * x222; - Fp x224 = x35 - x36; - FpExt x225 = x223 + poly_mix[21] * x224; - Fp x226 = x37 - x38; - FpExt x227 = x225 + poly_mix[22] * x226; - FpExt x228 = x227 + poly_mix[23] * x39; - FpExt x229 = x228 + poly_mix[24] * x40; - FpExt x230 = x229 + poly_mix[25] * x41; - FpExt x231 = x230 + poly_mix[26] * x42; - FpExt x232 = x231 + poly_mix[27] * x43; - FpExt x233 = x232 + poly_mix[28] * x44; - FpExt x234 = x233 + poly_mix[29] * x45; - FpExt x235 = x234 + poly_mix[30] * x46; - FpExt x236 = arg1 + x47 * x235 * poly_mix[49]; - Fp x237 = arg2[311]; - FpExt x238 = arg3 + poly_mix[0] * x237; - Fp x239 = arg2[250]; - FpExt x240 = x238 + poly_mix[1] * x239; - Fp x241 = arg2[251]; - FpExt x242 = x240 + poly_mix[2] * x241; - FpExt x243 = x242 + poly_mix[3] * x32; - FpExt x244 = x243 + poly_mix[4] * x32; - Fp x245 = x48 - x31; - FpExt x246 = x244 + poly_mix[5] * x245; - Fp x247 = arg2[252]; - FpExt x248 = x246 + poly_mix[6] * x247; - Fp x249 = arg2[253]; - FpExt x250 = x248 + poly_mix[7] * x249; - Fp x251 = arg2[173]; - FpExt x252 = x250 + poly_mix[8] * x251; - Fp x253 = arg2[312]; - FpExt x254 = x252 + poly_mix[9] * x253; - Fp x255 = arg2[256]; - FpExt x256 = x254 + poly_mix[10] * x255; - Fp x257 = arg2[239]; - FpExt x258 = x256 + poly_mix[11] * x257; - FpExt x259 = x258 + poly_mix[12] * x32; - FpExt x260 = x259 + poly_mix[13] * x32; - Fp x261 = x49 - x30; - FpExt x262 = x260 + poly_mix[14] * x261; - Fp x263 = arg2[257]; - FpExt x264 = x262 + poly_mix[15] * x263; - Fp x265 = arg2[258]; - FpExt x266 = x264 + poly_mix[16] * x265; - Fp x267 = arg2[174]; - FpExt x268 = x266 + poly_mix[17] * x267; - Fp x269 = arg2[313]; - FpExt x270 = x268 + poly_mix[18] * x269; - Fp x271 = arg2[261]; - FpExt x272 = x270 + poly_mix[19] * x271; - Fp x273 = arg2[262]; - FpExt x274 = x272 + poly_mix[20] * x273; - FpExt x275 = x274 + poly_mix[21] * x32; - FpExt x276 = x275 + poly_mix[22] * x32; - Fp x277 = x50 - x29; - FpExt x278 = x276 + poly_mix[23] * x277; - Fp x279 = arg2[263]; - FpExt x280 = x278 + poly_mix[24] * x279; - Fp x281 = arg2[264]; - FpExt x282 = x280 + poly_mix[25] * x281; - Fp x283 = arg2[175]; - FpExt x284 = x282 + poly_mix[26] * x283; - Fp x285 = arg2[314]; - Fp x286 = x51 - x285; - FpExt x287 = x284 + poly_mix[27] * x286; - FpExt x288 = x287 + poly_mix[28] * x33; - FpExt x289 = x288 + poly_mix[29] * x52; - Fp x290 = arg2[219]; - FpExt x291 = x289 + poly_mix[30] * x290; - Fp x292 = x53 - x54; - Fp x293 = arg2[315]; - FpExt x294 = x291 + poly_mix[31] * x293; - Fp x295 = x55 - x292; - FpExt x296 = x294 + poly_mix[32] * x295; - Fp x297 = arg2[267]; - FpExt x298 = x296 + poly_mix[33] * x297; - Fp x299 = arg2[268]; - FpExt x300 = x298 + poly_mix[34] * x299; - FpExt x301 = x300 + poly_mix[35] * x32; - FpExt x302 = x301 + poly_mix[36] * x32; - Fp x303 = x56 - x31; - FpExt x304 = x302 + poly_mix[37] * x303; - Fp x305 = arg2[316]; - FpExt x306 = x304 + poly_mix[38] * x305; - Fp x307 = arg2[317]; - Fp x308 = x57 - x307; - FpExt x309 = x306 + poly_mix[39] * x308; - Fp x310 = x58 - x54; - FpExt x311 = x309 + poly_mix[40] * x310; - FpExt x312 = x311 + poly_mix[41] * x59; - Fp x313 = arg2[209]; - FpExt x314 = x312 + poly_mix[42] * x313; - Fp x315 = arg2[159]; - FpExt x316 = x314 + poly_mix[43] * x315; - Fp x317 = x28 - x60; - Fp x318 = x60 * x317; - FpExt x319 = x316 + poly_mix[44] * x318; - Fp x320 = x28 - x61; - Fp x321 = x61 * x320; - FpExt x322 = x319 + poly_mix[45] * x321; - Fp x323 = x62 + x63; - Fp x324 = x323 + x60; - Fp x325 = x324 + x61; - Fp x326 = x325 - x28; - FpExt x327 = x322 + poly_mix[46] * x326; - Fp x328 = x60 * x27; - arg2[533] = x328; - Fp x329 = x61 * x26; - Fp x330 = x63 + x328; - Fp x331 = x330 + x329; - Fp x332 = x331 - x64; - FpExt x333 = x327 + poly_mix[47] * x332; - Fp x334 = arg2[211]; - FpExt x335 = x333 + poly_mix[48] * x334; - Fp x336 = arg2[318]; - FpExt x337 = x335 + poly_mix[49] * x336; - Fp x338 = arg2[319]; - FpExt x339 = x337 + poly_mix[50] * x338; - Fp x340 = arg2[320]; - FpExt x341 = x339 + poly_mix[51] * x340; - Fp x342 = x65 * x62; - Fp x343 = x342 - x66; - FpExt x344 = x341 + poly_mix[52] * x343; - Fp x345 = x63 + x60; - Fp x346 = x345 + x61; - Fp x347 = arg2[321]; - FpExt x348 = x344 + poly_mix[53] * x347; - Fp x349 = x28 - x67; - Fp x350 = x67 * x349; - FpExt x351 = x348 + poly_mix[54] * x350; - Fp x352 = x28 - x68; - Fp x353 = x68 * x352; - FpExt x354 = x351 + poly_mix[55] * x353; - Fp x355 = arg2[322]; - FpExt x356 = x354 + poly_mix[56] * x355; - Fp x357 = x69 + x67; - Fp x358 = x357 + x68; - Fp x359 = x358 + x70; - Fp x360 = x359 - x28; - FpExt x361 = x356 + poly_mix[57] * x360; - Fp x362 = x68 * x27; - Fp x363 = x70 * x26; - Fp x364 = x67 + x362; - Fp x365 = x364 + x363; - Fp x366 = x365 - x71; - FpExt x367 = x361 + poly_mix[58] * x366; - Fp x368 = arg2[323]; - FpExt x369 = x367 + poly_mix[59] * x368; - Fp x370 = x72 * x73; - Fp x371 = arg2[324]; - Fp x372 = x370 - x371; - FpExt x373 = x369 + poly_mix[60] * x372; - Fp x374 = x74 * x72; - FpExt x375 = x373 + poly_mix[61] * x374; - Fp x376 = x74 * x73; - FpExt x377 = x375 + poly_mix[62] * x376; - Fp x378 = x74 * x69; - Fp x379 = x378 - x75; - FpExt x380 = x377 + poly_mix[63] * x379; - Fp x381 = x67 + x68; - Fp x382 = x381 + x70; - Fp x383 = x74 * x382; - Fp x384 = x383 - x76; - FpExt x385 = x380 + poly_mix[64] * x384; - Fp x386 = x76 * x346; - Fp x387 = x386 - x77; - FpExt x388 = x385 + poly_mix[65] * x387; - FpExt x389 = x236 + x78 * x388 * poly_mix[80]; - Fp x390 = arg2[325]; - FpExt x391 = arg3 + poly_mix[0] * x390; - FpExt x392 = x391 + poly_mix[1] * x239; - FpExt x393 = x392 + poly_mix[2] * x241; - FpExt x394 = x393 + poly_mix[3] * x32; - FpExt x395 = x394 + poly_mix[4] * x32; - FpExt x396 = x395 + poly_mix[5] * x245; - FpExt x397 = x396 + poly_mix[6] * x247; - FpExt x398 = x397 + poly_mix[7] * x249; - FpExt x399 = x398 + poly_mix[8] * x251; - FpExt x400 = x399 + poly_mix[9] * x253; - FpExt x401 = x400 + poly_mix[10] * x255; - FpExt x402 = x401 + poly_mix[11] * x257; - FpExt x403 = x402 + poly_mix[12] * x32; - FpExt x404 = x403 + poly_mix[13] * x32; - FpExt x405 = x404 + poly_mix[14] * x261; - FpExt x406 = x405 + poly_mix[15] * x263; - FpExt x407 = x406 + poly_mix[16] * x265; - FpExt x408 = x407 + poly_mix[17] * x267; - FpExt x409 = x408 + poly_mix[18] * x269; - FpExt x410 = x409 + poly_mix[19] * x271; - FpExt x411 = x410 + poly_mix[20] * x273; - FpExt x412 = x411 + poly_mix[21] * x32; - FpExt x413 = x412 + poly_mix[22] * x32; - FpExt x414 = x413 + poly_mix[23] * x277; - FpExt x415 = x414 + poly_mix[24] * x279; - FpExt x416 = x415 + poly_mix[25] * x281; - FpExt x417 = x416 + poly_mix[26] * x283; - FpExt x418 = x417 + poly_mix[27] * x286; - FpExt x419 = x418 + poly_mix[28] * x33; - FpExt x420 = x419 + poly_mix[29] * x52; - FpExt x421 = x420 + poly_mix[30] * x290; - FpExt x422 = x421 + poly_mix[31] * x293; - FpExt x423 = x422 + poly_mix[32] * x295; - FpExt x424 = x423 + poly_mix[33] * x297; - FpExt x425 = x424 + poly_mix[34] * x299; - FpExt x426 = x425 + poly_mix[35] * x32; - FpExt x427 = x426 + poly_mix[36] * x32; - FpExt x428 = x427 + poly_mix[37] * x303; - FpExt x429 = x428 + poly_mix[38] * x305; - FpExt x430 = x429 + poly_mix[39] * x308; - FpExt x431 = x430 + poly_mix[40] * x310; - FpExt x432 = x431 + poly_mix[41] * x59; - FpExt x433 = x389 + x79 * x432 * poly_mix[146]; - Fp x434 = arg2[326]; - FpExt x435 = arg3 + poly_mix[0] * x434; - FpExt x436 = x435 + poly_mix[1] * x25; - FpExt x437 = x436 + poly_mix[2] * x80; - FpExt x438 = x437 + poly_mix[3] * x81; - FpExt x439 = x438 + poly_mix[4] * x82; - FpExt x440 = x439 + poly_mix[5] * x83; - FpExt x441 = x440 + poly_mix[6] * x39; - FpExt x442 = x441 + poly_mix[7] * x40; - FpExt x443 = x442 + poly_mix[8] * x41; - FpExt x444 = x443 + poly_mix[9] * x42; - FpExt x445 = x444 + poly_mix[10] * x84; - FpExt x446 = x445 + poly_mix[11] * x85; - FpExt x447 = x446 + poly_mix[12] * x43; - FpExt x448 = x447 + poly_mix[13] * x44; - FpExt x449 = x448 + poly_mix[14] * x45; - FpExt x450 = x449 + poly_mix[15] * x46; - FpExt x451 = x433 + x86 * x450 * poly_mix[172]; - Fp x452 = arg2[327]; - FpExt x453 = arg3 + poly_mix[0] * x452; - FpExt x454 = x453 + poly_mix[1] * x313; - FpExt x455 = x454 + poly_mix[2] * x315; - FpExt x456 = x455 + poly_mix[3] * x318; - FpExt x457 = x456 + poly_mix[4] * x321; - FpExt x458 = x457 + poly_mix[5] * x326; - FpExt x459 = x458 + poly_mix[6] * x332; - FpExt x460 = x459 + poly_mix[7] * x334; - FpExt x461 = x460 + poly_mix[8] * x336; - FpExt x462 = x461 + poly_mix[9] * x338; - FpExt x463 = x462 + poly_mix[10] * x340; - FpExt x464 = x463 + poly_mix[11] * x343; - FpExt x465 = x464 + poly_mix[12] * x347; - FpExt x466 = x465 + poly_mix[13] * x350; - FpExt x467 = x466 + poly_mix[14] * x353; - FpExt x468 = x467 + poly_mix[15] * x355; - FpExt x469 = x468 + poly_mix[16] * x360; - FpExt x470 = x469 + poly_mix[17] * x366; - FpExt x471 = x470 + poly_mix[18] * x368; - FpExt x472 = x471 + poly_mix[19] * x372; - FpExt x473 = x472 + poly_mix[20] * x374; - FpExt x474 = x473 + poly_mix[21] * x376; - FpExt x475 = x474 + poly_mix[22] * x379; - Fp x476 = x67 * x74; - Fp x477 = x68 * x74; - Fp x478 = x70 * x74; - Fp x479 = x476 + x477; - Fp x480 = x479 + x478; - Fp x481 = x480 + x371; - Fp x482 = x476 * x87; - Fp x483 = x28 - x476; - Fp x484 = x483 * x24; - Fp x485 = x482 + x484; - Fp x486 = x485 - x76; - FpExt x487 = x475 + poly_mix[23] * x486; - FpExt x488 = x487 + poly_mix[24] * x239; - FpExt x489 = x488 + poly_mix[25] * x241; - FpExt x490 = x489 + poly_mix[26] * x32; - FpExt x491 = x490 + poly_mix[27] * x32; - Fp x492 = x48 - x76; - FpExt x493 = x491 + poly_mix[28] * x492; - FpExt x494 = x493 + poly_mix[29] * x251; - FpExt x495 = x494 + poly_mix[30] * x253; - Fp x496 = x87 + x28; - Fp x497 = x477 * x496; - Fp x498 = x28 - x477; - Fp x499 = x498 * x24; - Fp x500 = x497 + x499; - Fp x501 = x500 - x77; - FpExt x502 = x495 + poly_mix[31] * x501; - FpExt x503 = x502 + poly_mix[32] * x255; - FpExt x504 = x503 + poly_mix[33] * x257; - FpExt x505 = x504 + poly_mix[34] * x32; - FpExt x506 = x505 + poly_mix[35] * x32; - Fp x507 = x49 - x77; - FpExt x508 = x506 + poly_mix[36] * x507; - FpExt x509 = x508 + poly_mix[37] * x267; - FpExt x510 = x509 + poly_mix[38] * x269; - Fp x511 = x87 + x27; - Fp x512 = x478 * x511; - Fp x513 = x28 - x478; - Fp x514 = x513 * x24; - Fp x515 = x512 + x514; - Fp x516 = x515 - x88; - FpExt x517 = x510 + poly_mix[39] * x516; - FpExt x518 = x517 + poly_mix[40] * x271; - FpExt x519 = x518 + poly_mix[41] * x273; - FpExt x520 = x519 + poly_mix[42] * x32; - FpExt x521 = x520 + poly_mix[43] * x32; - Fp x522 = x50 - x88; - FpExt x523 = x521 + poly_mix[44] * x522; - FpExt x524 = x523 + poly_mix[45] * x283; - FpExt x525 = x524 + poly_mix[46] * x286; - Fp x526 = x87 + x26; - Fp x527 = x371 * x526; - Fp x528 = x28 - x371; - Fp x529 = x528 * x24; - Fp x530 = x527 + x529; - Fp x531 = x530 - x89; - FpExt x532 = x525 + poly_mix[47] * x531; - FpExt x533 = x532 + poly_mix[48] * x297; - FpExt x534 = x533 + poly_mix[49] * x299; - FpExt x535 = x534 + poly_mix[50] * x32; - FpExt x536 = x535 + poly_mix[51] * x32; - Fp x537 = x56 - x89; - FpExt x538 = x536 + poly_mix[52] * x537; - FpExt x539 = x538 + poly_mix[53] * x305; - FpExt x540 = x539 + poly_mix[54] * x308; - Fp x541 = x481 * x23; - Fp x542 = x90 - x541; - Fp x543 = x28 - x91; - Fp x544 = x91 * x543; - FpExt x545 = x540 + poly_mix[55] * x544; - Fp x546 = x542 * x92; - Fp x547 = x546 - x543; - FpExt x548 = x545 + poly_mix[56] * x547; - Fp x549 = x91 * x542; - FpExt x550 = x548 + poly_mix[57] * x549; - Fp x551 = x91 * x92; - FpExt x552 = x550 + poly_mix[58] * x551; - FpExt x553 = x552 + poly_mix[59] * x45; - FpExt x554 = x553 + poly_mix[60] * x46; - FpExt x555 = x451 + x93 * x554 * poly_mix[181]; - FpExt x556 = arg4 + poly_mix[2] * x81; - FpExt x557 = x556 + poly_mix[3] * x82; - FpExt x558 = x557 + poly_mix[4] * x83; - FpExt x559 = x558 + poly_mix[5] * x39; - FpExt x560 = x559 + poly_mix[6] * x40; - FpExt x561 = x560 + poly_mix[7] * x41; - FpExt x562 = x561 + poly_mix[8] * x42; - FpExt x563 = x562 + poly_mix[9] * x84; - FpExt x564 = x563 + poly_mix[10] * x85; - FpExt x565 = x564 + poly_mix[11] * x43; - FpExt x566 = x565 + poly_mix[12] * x44; - FpExt x567 = x566 + poly_mix[13] * x45; - FpExt x568 = x567 + poly_mix[14] * x46; - FpExt x569 = x555 + x94 * x568 * poly_mix[240]; - FpExt x570 = x569 + x95 * x568 * poly_mix[250]; - Fp x571 = x96 * x22; - Fp x572 = x97 * x21; - Fp x573 = x98 * x20; - Fp x574 = x99 * x19; - Fp x575 = x571 + x572; - Fp x576 = x575 + x573; - Fp x577 = x576 + x574; - Fp x578 = x577 * x100; - Fp x579 = x101 * x18; - Fp x580 = x28 - x101; - Fp x581 = x580 * x102; - Fp x582 = x581 * x17; - Fp x583 = x579 + x582; - Fp x584 = x28 - x102; - Fp x585 = x580 * x584; - Fp x586 = x585 * x16; - Fp x587 = x583 + x586; - Fp x588 = x587 * x78; - Fp x589 = x99 + x103; - Fp x590 = x589 + x104; - Fp x591 = x105 * x18; - Fp x592 = x28 - x105; - Fp x593 = x592 * x590; - Fp x594 = x593 * x17; - Fp x595 = x591 + x594; - Fp x596 = x28 - x590; - Fp x597 = x592 * x596; - Fp x598 = x597 * x16; - Fp x599 = x595 + x598; - Fp x600 = x599 * x93; - Fp x601 = arg2[328]; - Fp x602 = x578 + x601; - Fp x603 = x602 + x588; - Fp x604 = arg2[329]; - Fp x605 = x603 + x604; - Fp x606 = arg2[330]; - Fp x607 = x605 + x606; - Fp x608 = x607 + x600; - arg2[608] = x608; - Fp x609 = x106 * x15; - Fp x610 = x609 + x96; - Fp x611 = x610 * x78; - Fp x612 = x107 * x108; - Fp x613 = x109 * x108; - Fp x614 = x110 * x108; - Fp x615 = x28 - x108; - Fp x616 = x612 + x613; - Fp x617 = x616 + x614; - Fp x618 = x617 + x615; - Fp x619 = x111 + x618; - Fp x620 = x619 * x93; - Fp x621 = x611 + x620; - Fp x622 = x97 * x78; - Fp x623 = x112 * x78; - Fp x624 = x618 * x23; - Fp x625 = x113 - x624; - Fp x626 = x625 * x93; - Fp x627 = x623 + x626; - Fp x628 = x621 - x114; - FpExt x629 = x570 + poly_mix[253] * x628; - Fp x630 = x622 - x115; - FpExt x631 = x629 + poly_mix[254] * x630; - Fp x632 = x627 - x116; - FpExt x633 = x631 + poly_mix[255] * x632; - Fp x634 = x608 - x18; - Fp x635 = x28 - x117; - Fp x636 = x117 * x635; - FpExt x637 = x633 + poly_mix[256] * x636; - Fp x638 = x634 * x118; - Fp x639 = x638 - x635; - FpExt x640 = x637 + poly_mix[257] * x639; - Fp x641 = x117 * x634; - FpExt x642 = x640 + poly_mix[258] * x641; - Fp x643 = x117 * x118; - FpExt x644 = x642 + poly_mix[259] * x643; - Fp x645 = x608 - x19; - Fp x646 = x28 - x119; - Fp x647 = x119 * x646; - FpExt x648 = x644 + poly_mix[260] * x647; - Fp x649 = x645 * x120; - Fp x650 = x649 - x646; - FpExt x651 = x648 + poly_mix[261] * x650; - Fp x652 = x119 * x645; - FpExt x653 = x651 + poly_mix[262] * x652; - Fp x654 = x119 * x120; - FpExt x655 = x653 + poly_mix[263] * x654; - Fp x656 = x117 + x119; - Fp x657 = x656 * x23; - Fp x658 = arg2[99]; - Fp x659 = x658 + x657; - Fp x660 = arg2[232]; - FpExt x661 = x655 + poly_mix[264] * x660; - Fp x662 = x28 - x121; - Fp x663 = x121 * x662; - FpExt x664 = x661 + poly_mix[265] * x663; - Fp x665 = x121 * x14; - Fp x666 = x665 + x122; - Fp x667 = x659 - x666; - FpExt x668 = x664 + poly_mix[266] * x667; - Fp x669 = arg2[102]; - Fp x670 = x669 + x121; - Fp x671 = arg2[235]; - FpExt x672 = x668 + poly_mix[267] * x671; - Fp x673 = x28 - x123; - Fp x674 = x123 * x673; - FpExt x675 = x672 + poly_mix[268] * x674; - Fp x676 = x123 * x14; - Fp x677 = x676 + x124; - Fp x678 = x670 - x677; - FpExt x679 = x675 + poly_mix[269] * x678; - FpExt x680 = x679 + poly_mix[270] * x32; - FpExt x681 = arg5 + x125 * x680 * poly_mix[393]; - Fp x682 = arg2[238]; - Fp x683 = x682 * x13; - Fp x684 = x683 * x12; - Fp x685 = x28 - x683; - Fp x686 = x685 * x11; - Fp x687 = x684 + x686; - Fp x688 = x28 - x126; - Fp x689 = x126 * x688; - arg2[461] = x689; - FpExt x690 = arg3 + poly_mix[0] * x689; - Fp x691 = arg2[272]; - Fp x692 = x691 * x127; - Fp x693 = x692 - x688; - FpExt x694 = x690 + poly_mix[1] * x693; - Fp x695 = x126 * x691; - FpExt x696 = x694 + poly_mix[2] * x695; - Fp x697 = x126 * x127; - FpExt x698 = x696 + poly_mix[3] * x697; - Fp x699 = x32 - x80; - arg2[387] = x699; - FpExt x700 = arg3 + poly_mix[0] * x699; - Fp x701 = x32 - x48; - arg2[388] = x701; - FpExt x702 = x700 + poly_mix[1] * x701; - Fp x703 = x687 - x128; - FpExt x704 = x702 + poly_mix[2] * x703; - Fp x705 = x28 - x129; - arg2[462] = x705; - FpExt x706 = x704 + poly_mix[3] * x705; - Fp x707 = x28 - x130; - arg2[463] = x707; - FpExt x708 = x706 + poly_mix[4] * x707; - Fp x709 = x28 - x81; - arg2[464] = x709; - FpExt x710 = x708 + poly_mix[5] * x709; - Fp x711 = x10 - x131; - FpExt x712 = x710 + poly_mix[6] * x711; - Fp x713 = x32 - x33; - arg2[382] = x713; - FpExt x714 = x712 + poly_mix[7] * x713; - Fp x715 = x32 - x82; - arg2[390] = x715; - FpExt x716 = x714 + poly_mix[8] * x715; - Fp x717 = x32 - x49; - arg2[391] = x717; - FpExt x718 = x716 + poly_mix[9] * x717; - Fp x719 = x682 - x132; - FpExt x720 = x718 + poly_mix[10] * x719; - Fp x721 = x32 - x133; - arg2[392] = x721; - FpExt x722 = x720 + poly_mix[11] * x721; - Fp x723 = x32 - x134; - arg2[393] = x723; - FpExt x724 = x722 + poly_mix[12] * x723; - Fp x725 = x32 - x83; - arg2[394] = x725; - FpExt x726 = x724 + poly_mix[13] * x725; - Fp x727 = x32 - x35; - arg2[395] = x727; - FpExt x728 = x726 + poly_mix[14] * x727; - Fp x729 = x32 - x37; - arg2[396] = x729; - FpExt x730 = x728 + poly_mix[15] * x729; - Fp x731 = x32 - x39; - arg2[397] = x731; - FpExt x732 = x730 + poly_mix[16] * x731; - Fp x733 = x32 - x50; - arg2[398] = x733; - FpExt x734 = x732 + poly_mix[17] * x733; - Fp x735 = x32 - x135; - arg2[399] = x735; - FpExt x736 = x734 + poly_mix[18] * x735; - Fp x737 = x32 - x136; - arg2[400] = x737; - FpExt x738 = x736 + poly_mix[19] * x737; - Fp x739 = x32 - x137; - arg2[401] = x739; - FpExt x740 = x738 + poly_mix[20] * x739; - Fp x741 = x32 - x40; - arg2[402] = x741; - FpExt x742 = x740 + poly_mix[21] * x741; - Fp x743 = x32 - x53; - arg2[403] = x743; - FpExt x744 = x742 + poly_mix[22] * x743; - Fp x745 = x32 - x52; - arg2[404] = x745; - FpExt x746 = x744 + poly_mix[23] * x745; - Fp x747 = x32 - x41; - arg2[405] = x747; - FpExt x748 = x746 + poly_mix[24] * x747; - Fp x749 = x32 - x56; - arg2[406] = x749; - FpExt x750 = x748 + poly_mix[25] * x749; - Fp x751 = x32 - x138; - arg2[407] = x751; - FpExt x752 = x750 + poly_mix[26] * x751; - Fp x753 = x32 - x139; - arg2[408] = x753; - FpExt x754 = x752 + poly_mix[27] * x753; - Fp x755 = x32 - x140; - arg2[409] = x755; - FpExt x756 = x754 + poly_mix[28] * x755; - Fp x757 = x32 - x42; - arg2[410] = x757; - FpExt x758 = x756 + poly_mix[29] * x757; - Fp x759 = x32 - x58; - arg2[411] = x759; - FpExt x760 = x758 + poly_mix[30] * x759; - Fp x761 = x32 - x59; - arg2[412] = x761; - FpExt x762 = x760 + poly_mix[31] * x761; - Fp x763 = x32 - x84; - arg2[413] = x763; - FpExt x764 = x762 + poly_mix[32] * x763; - Fp x765 = x32 - x141; - arg2[414] = x765; - FpExt x766 = x764 + poly_mix[33] * x765; - Fp x767 = x32 - x85; - arg2[415] = x767; - FpExt x768 = x766 + poly_mix[34] * x767; - FpExt x769 = x44 * x9; - FpExt x770 = x51 + x769; - FpExt x771 = x770 * x9; - FpExt x772 = x43 + x771; - FpExt x773 = x772 * x9; - FpExt x774 = x142 + x773; - arg6[1] = x774; - FpExt x775 = x774 - x8; - arg6[2] = x775; - FpExt x776 = x768 + poly_mix[35] * x775; - FpExt x777 = x776 + poly_mix[36] * x57; - FpExt x778 = x777 + poly_mix[37] * x114; - FpExt x779 = x778 + poly_mix[38] * x143; - FpExt x780 = x779 + poly_mix[39] * x144; - FpExt x781 = x780 + poly_mix[40] * x145; - FpExt x782 = x781 + poly_mix[41] * x61; - FpExt x783 = x782 + poly_mix[42] * x66; - FpExt x784 = x783 + poly_mix[43] * x68; - FpExt x785 = x784 + poly_mix[44] * x146; - FpExt x786 = x785 + poly_mix[45] * x147; - FpExt x787 = x786 + poly_mix[46] * x148; - FpExt x788 = x787 + poly_mix[47] * x149; - FpExt x789 = x698 + x126 * x788 * poly_mix[4]; - Fp x790 = x57 - x25; - arg2[447] = x790; - FpExt x791 = arg3 + poly_mix[0] * x790; - Fp x792 = x114 - x28; - arg2[448] = x792; - FpExt x793 = x791 + poly_mix[1] * x792; - FpExt x794 = x793 + poly_mix[2] * x32; - FpExt x795 = x794 + poly_mix[3] * x32; - Fp x796 = x45 - x31; - FpExt x797 = x795 + poly_mix[4] * x796; - Fp x798 = x46 - x115; - arg2[342] = x798; - FpExt x799 = x797 + poly_mix[5] * x798; - Fp x800 = arg2[285]; - FpExt x801 = x799 + poly_mix[6] * x800; - Fp x802 = x150 - x54; - Fp x803 = x146 - x28; - arg2[343] = x803; - FpExt x804 = x801 + poly_mix[7] * x803; - Fp x805 = x151 - x802; - arg2[344] = x805; - FpExt x806 = x804 + poly_mix[8] * x805; - Fp x807 = x116 * x15; - Fp x808 = x115 * x7; - Fp x809 = x807 + x808; - Fp x810 = x143 - x25; - arg2[345] = x810; - FpExt x811 = x806 + poly_mix[9] * x810; - Fp x812 = x144 - x28; - arg2[346] = x812; - FpExt x813 = x811 + poly_mix[10] * x812; - FpExt x814 = x813 + poly_mix[11] * x32; - FpExt x815 = x814 + poly_mix[12] * x32; - Fp x816 = x152 - x30; - FpExt x817 = x815 + poly_mix[13] * x816; - Fp x818 = x153 - x154; - arg2[348] = x818; - FpExt x819 = x817 + poly_mix[14] * x818; - Fp x820 = arg2[287]; - FpExt x821 = x819 + poly_mix[15] * x820; - Fp x822 = x150 - x155; - Fp x823 = x147 - x28; - arg2[349] = x823; - FpExt x824 = x821 + poly_mix[16] * x823; - Fp x825 = x156 - x822; - arg2[350] = x825; - FpExt x826 = x824 + poly_mix[17] * x825; - Fp x827 = x154 * x7; - Fp x828 = arg2[331]; - Fp x829 = x828 + x827; - Fp x830 = x145 - x25; - arg2[351] = x830; - FpExt x831 = x826 + poly_mix[18] * x830; - Fp x832 = arg2[332]; - FpExt x833 = x831 + poly_mix[19] * x832; - FpExt x834 = x833 + poly_mix[20] * x32; - FpExt x835 = x834 + poly_mix[21] * x32; - Fp x836 = x64 - x29; - FpExt x837 = x835 + poly_mix[22] * x836; - Fp x838 = x63 - x65; - arg2[353] = x838; - FpExt x839 = x837 + poly_mix[23] * x838; - Fp x840 = arg2[289]; - FpExt x841 = x839 + poly_mix[24] * x840; - Fp x842 = x150 - x62; - Fp x843 = x148 - x28; - arg2[354] = x843; - FpExt x844 = x841 + poly_mix[25] * x843; - Fp x845 = x157 - x842; - arg2[355] = x845; - FpExt x846 = x844 + poly_mix[26] * x845; - Fp x847 = x158 * x15; - Fp x848 = x65 * x7; - Fp x849 = x847 + x848; - Fp x850 = arg2[333]; - FpExt x851 = x846 + poly_mix[27] * x850; - Fp x852 = arg2[265]; - FpExt x853 = x851 + poly_mix[28] * x852; - FpExt x854 = x853 + poly_mix[29] * x32; - FpExt x855 = x854 + poly_mix[30] * x32; - Fp x856 = x72 - x6; - FpExt x857 = x855 + poly_mix[31] * x856; - Fp x858 = arg2[334]; - FpExt x859 = x857 + poly_mix[32] * x858; - Fp x860 = x67 - x74; - arg2[356] = x860; - FpExt x861 = x859 + poly_mix[33] * x860; - Fp x862 = x150 - x71; - Fp x863 = x149 - x28; - arg2[357] = x863; - FpExt x864 = x861 + poly_mix[34] * x863; - Fp x865 = x159 - x862; - arg2[358] = x865; - FpExt x866 = x864 + poly_mix[35] * x865; - Fp x867 = x28 - x160; - arg2[426] = x867; - Fp x868 = x160 * x867; - arg2[340] = x868; - FpExt x869 = x866 + poly_mix[36] * x868; - Fp x870 = x809 * x161; - Fp x871 = x870 - x867; - FpExt x872 = x869 + poly_mix[37] * x871; - Fp x873 = x160 * x809; - FpExt x874 = x872 + poly_mix[38] * x873; - Fp x875 = x160 * x161; - arg2[427] = x875; - FpExt x876 = x874 + poly_mix[39] * x875; - Fp x877 = x28 - x162; - Fp x878 = x162 * x877; - arg2[341] = x878; - FpExt x879 = x876 + poly_mix[40] * x878; - Fp x880 = x28 - x163; - Fp x881 = x163 * x880; - arg2[458] = x881; - FpExt x882 = x879 + poly_mix[41] * x881; - Fp x883 = x162 * x5; - Fp x884 = x163 * x15; - Fp x885 = x883 + x884; - Fp x886 = x74 - x885; - FpExt x887 = x882 + poly_mix[42] * x886; - Fp x888 = x28 - x164; - Fp x889 = x164 * x888; - arg2[459] = x889; - FpExt x890 = x887 + poly_mix[43] * x889; - Fp x891 = x70 * x165; - Fp x892 = x891 - x888; - FpExt x893 = x890 + poly_mix[44] * x892; - Fp x894 = x164 * x70; - FpExt x895 = x893 + poly_mix[45] * x894; - Fp x896 = x164 * x165; - FpExt x897 = x895 + poly_mix[46] * x896; - Fp x898 = x164 * x18; - Fp x899 = x888 * x867; - Fp x900 = x899 * x4; - Fp x901 = x898 + x900; - Fp x902 = x28 - x867; - Fp x903 = x888 * x902; - Fp x904 = x903 * x3; - Fp x905 = x901 + x904; - Fp x906 = x867 - x80; - FpExt x907 = x897 + poly_mix[47] * x906; - Fp x908 = x809 - x48; - FpExt x909 = x907 + poly_mix[48] * x908; - Fp x910 = x849 - x128; - FpExt x911 = x909 + poly_mix[49] * x910; - Fp x912 = x162 - x129; - FpExt x913 = x911 + poly_mix[50] * x912; - Fp x914 = x163 - x130; - FpExt x915 = x913 + poly_mix[51] * x914; - Fp x916 = x32 - x81; - arg2[389] = x916; - FpExt x917 = x915 + poly_mix[52] * x916; - Fp x918 = x905 - x131; - FpExt x919 = x917 + poly_mix[53] * x918; - FpExt x920 = x919 + poly_mix[54] * x713; - Fp x921 = x829 - x82; - FpExt x922 = x920 + poly_mix[55] * x921; - Fp x923 = x70 - x49; - FpExt x924 = x922 + poly_mix[56] * x923; - FpExt x925 = x924 + poly_mix[57] * x719; - FpExt x926 = x925 + poly_mix[58] * x721; - FpExt x927 = x926 + poly_mix[59] * x723; - FpExt x928 = x927 + poly_mix[60] * x725; - FpExt x929 = x928 + poly_mix[61] * x727; - FpExt x930 = x929 + poly_mix[62] * x729; - FpExt x931 = x930 + poly_mix[63] * x731; - FpExt x932 = x931 + poly_mix[64] * x733; - FpExt x933 = x932 + poly_mix[65] * x735; - FpExt x934 = x933 + poly_mix[66] * x737; - FpExt x935 = x934 + poly_mix[67] * x739; - FpExt x936 = x935 + poly_mix[68] * x741; - FpExt x937 = x936 + poly_mix[69] * x743; - FpExt x938 = x937 + poly_mix[70] * x745; - FpExt x939 = x938 + poly_mix[71] * x747; - FpExt x940 = x939 + poly_mix[72] * x749; - FpExt x941 = x940 + poly_mix[73] * x751; - FpExt x942 = x941 + poly_mix[74] * x753; - FpExt x943 = x942 + poly_mix[75] * x755; - FpExt x944 = x943 + poly_mix[76] * x757; - FpExt x945 = x944 + poly_mix[77] * x759; - FpExt x946 = x945 + poly_mix[78] * x761; - FpExt x947 = x946 + poly_mix[79] * x763; - FpExt x948 = x947 + poly_mix[80] * x765; - FpExt x949 = x948 + poly_mix[81] * x767; - FpExt x950 = x949 + poly_mix[82] * x775; - FpExt x951 = x789 + x688 * x950 * poly_mix[52]; - FpExt x952 = x951 + poly_mix[135] * x73; - FpExt x953 = x952 + poly_mix[136] * x89; - FpExt x954 = x953 + poly_mix[137] * x117; - FpExt x955 = x954 + poly_mix[138] * x122; - FpExt x956 = x955 + poly_mix[139] * x124; - FpExt x957 = x956 + poly_mix[140] * x166; - FpExt x958 = x957 + poly_mix[141] * x167; - FpExt x959 = x958 + poly_mix[142] * x168; - FpExt x960 = x959 + poly_mix[143] * x169; - FpExt x961 = x960 + poly_mix[144] * x170; - FpExt x962 = x961 + poly_mix[145] * x171; - FpExt x963 = x962 + poly_mix[146] * x172; - FpExt x964 = x963 + poly_mix[147] * x173; - FpExt x965 = x964 + poly_mix[148] * x174; - FpExt x966 = x965 + poly_mix[149] * x175; - FpExt x967 = x966 + poly_mix[150] * x176; - FpExt x968 = x967 + poly_mix[151] * x177; - FpExt x969 = x968 + poly_mix[152] * x178; - FpExt x970 = x969 + poly_mix[153] * x179; - FpExt x971 = x970 + poly_mix[154] * x180; - FpExt x972 = x971 + poly_mix[155] * x181; - FpExt x973 = x972 + poly_mix[156] * x182; - FpExt x974 = x973 + poly_mix[157] * x183; - FpExt x975 = x974 + poly_mix[158] * x184; - FpExt x976 = x975 + poly_mix[159] * x185; - FpExt x977 = x976 + poly_mix[160] * x186; - FpExt x978 = x977 + poly_mix[161] * x187; - FpExt x979 = x978 + poly_mix[162] * x188; - FpExt x980 = x979 + poly_mix[163] * x189; - FpExt x981 = x980 + poly_mix[164] * x190; - FpExt x982 = arg3 + x100 * x981 * poly_mix[0]; - Fp x983 = x45 - x191; - arg2[473] = x983; - FpExt x984 = x795 + poly_mix[4] * x983; - FpExt x985 = x984 + poly_mix[5] * x798; - FpExt x986 = x985 + poly_mix[6] * x800; - FpExt x987 = x986 + poly_mix[7] * x803; - FpExt x988 = x987 + poly_mix[8] * x805; - Fp x989 = x116 * x14; - Fp x990 = x989 + x115; - arg2[416] = x990; - Fp x991 = x191 + x28; - FpExt x992 = x988 + poly_mix[9] * x810; - FpExt x993 = x992 + poly_mix[10] * x812; - FpExt x994 = x993 + poly_mix[11] * x32; - FpExt x995 = x994 + poly_mix[12] * x32; - Fp x996 = x152 - x991; - arg2[474] = x996; - FpExt x997 = x995 + poly_mix[13] * x996; - FpExt x998 = x997 + poly_mix[14] * x818; - FpExt x999 = x998 + poly_mix[15] * x820; - FpExt x1000 = x999 + poly_mix[16] * x823; - FpExt x1001 = x1000 + poly_mix[17] * x825; - Fp x1002 = x192 * x14; - Fp x1003 = x1002 + x154; - arg2[417] = x1003; - Fp x1004 = x191 + x27; - FpExt x1005 = x1001 + poly_mix[18] * x830; - FpExt x1006 = x1005 + poly_mix[19] * x832; - FpExt x1007 = x1006 + poly_mix[20] * x32; - FpExt x1008 = x1007 + poly_mix[21] * x32; - Fp x1009 = x64 - x1004; - arg2[475] = x1009; - FpExt x1010 = x1008 + poly_mix[22] * x1009; - FpExt x1011 = x1010 + poly_mix[23] * x838; - FpExt x1012 = x1011 + poly_mix[24] * x840; - FpExt x1013 = x1012 + poly_mix[25] * x843; - FpExt x1014 = x1013 + poly_mix[26] * x845; - Fp x1015 = x158 * x14; - Fp x1016 = x1015 + x65; - arg2[418] = x1016; - Fp x1017 = x191 + x26; - FpExt x1018 = x1014 + poly_mix[27] * x850; - FpExt x1019 = x1018 + poly_mix[28] * x852; - FpExt x1020 = x1019 + poly_mix[29] * x32; - FpExt x1021 = x1020 + poly_mix[30] * x32; - Fp x1022 = x72 - x1017; - arg2[476] = x1022; - FpExt x1023 = x1021 + poly_mix[31] * x1022; - FpExt x1024 = x1023 + poly_mix[32] * x858; - FpExt x1025 = x1024 + poly_mix[33] * x860; - FpExt x1026 = x1025 + poly_mix[34] * x863; - FpExt x1027 = x1026 + poly_mix[35] * x865; - Fp x1028 = x74 * x14; - Fp x1029 = x1028 + x70; - arg2[419] = x1029; - Fp x1030 = x191 + x23; - Fp x1031 = x73 - x25; - arg2[359] = x1031; - FpExt x1032 = x1027 + poly_mix[36] * x1031; - Fp x1033 = arg2[230]; - FpExt x1034 = x1032 + poly_mix[37] * x1033; - FpExt x1035 = x1034 + poly_mix[38] * x32; - FpExt x1036 = x1035 + poly_mix[39] * x32; - Fp x1037 = x75 - x1030; - arg2[477] = x1037; - FpExt x1038 = x1036 + poly_mix[40] * x1037; - Fp x1039 = x77 - x91; - arg2[360] = x1039; - FpExt x1040 = x1038 + poly_mix[41] * x1039; - Fp x1041 = arg2[335]; - FpExt x1042 = x1040 + poly_mix[42] * x1041; - Fp x1043 = x150 - x76; - Fp x1044 = x169 - x28; - arg2[361] = x1044; - FpExt x1045 = x1042 + poly_mix[43] * x1044; - Fp x1046 = x193 - x1043; - arg2[362] = x1046; - FpExt x1047 = x1045 + poly_mix[44] * x1046; - Fp x1048 = x92 * x14; - Fp x1049 = x1048 + x91; - arg2[420] = x1049; - Fp x1050 = x191 + x2; - Fp x1051 = arg2[231]; - FpExt x1052 = x1047 + poly_mix[45] * x1051; - Fp x1053 = arg2[260]; - FpExt x1054 = x1052 + poly_mix[46] * x1053; - FpExt x1055 = x1054 + poly_mix[47] * x32; - FpExt x1056 = x1055 + poly_mix[48] * x32; - Fp x1057 = x118 - x1050; - arg2[478] = x1057; - FpExt x1058 = x1056 + poly_mix[49] * x1057; - Fp x1059 = arg2[234]; - FpExt x1060 = x1058 + poly_mix[50] * x1059; - Fp x1061 = arg2[336]; - FpExt x1062 = x1060 + poly_mix[51] * x1061; - Fp x1063 = x170 - x28; - arg2[363] = x1063; - FpExt x1064 = x1062 + poly_mix[52] * x1063; - Fp x1065 = arg2[337]; - Fp x1066 = x194 - x1065; - arg2[364] = x1066; - FpExt x1067 = x1064 + poly_mix[53] * x1066; - Fp x1068 = x195 * x14; - Fp x1069 = x1068 + x121; - arg2[422] = x1069; - Fp x1070 = x191 + x1; - Fp x1071 = x124 - x25; - arg2[365] = x1071; - FpExt x1072 = x1067 + poly_mix[54] * x1071; - Fp x1073 = arg2[338]; - FpExt x1074 = x1072 + poly_mix[55] * x1073; - FpExt x1075 = x1074 + poly_mix[56] * x32; - FpExt x1076 = x1075 + poly_mix[57] * x32; - Fp x1077 = x123 - x1070; - arg2[479] = x1077; - FpExt x1078 = x1076 + poly_mix[58] * x1077; - Fp x1079 = x196 - x197; - arg2[366] = x1079; - FpExt x1080 = x1078 + poly_mix[59] * x1079; - Fp x1081 = x198 - x199; - arg2[367] = x1081; - FpExt x1082 = x1080 + poly_mix[60] * x1081; - Fp x1083 = x150 - x200; - Fp x1084 = x171 - x28; - arg2[368] = x1084; - FpExt x1085 = x1082 + poly_mix[61] * x1084; - Fp x1086 = x201 - x1083; - arg2[369] = x1086; - FpExt x1087 = x1085 + poly_mix[62] * x1086; - Fp x1088 = x191 + x0; - Fp x1089 = x167 - x25; - arg2[370] = x1089; - FpExt x1090 = x1087 + poly_mix[63] * x1089; - Fp x1091 = x168 - x28; - arg2[371] = x1091; - FpExt x1092 = x1090 + poly_mix[64] * x1091; - FpExt x1093 = x1092 + poly_mix[65] * x32; - FpExt x1094 = x1093 + poly_mix[66] * x32; - Fp x1095 = x202 - x1088; - arg2[480] = x1095; - FpExt x1096 = x1094 + poly_mix[67] * x1095; - Fp x1097 = x203 - x204; - arg2[372] = x1097; - FpExt x1098 = x1096 + poly_mix[68] * x1097; - Fp x1099 = x205 - x206; - arg2[373] = x1099; - FpExt x1100 = x1098 + poly_mix[69] * x1099; - Fp x1101 = x150 - x207; - Fp x1102 = x172 - x28; - arg2[374] = x1102; - FpExt x1103 = x1100 + poly_mix[70] * x1102; - Fp x1104 = x208 - x1101; - arg2[375] = x1104; - FpExt x1105 = x1103 + poly_mix[71] * x1104; - Fp x1106 = x206 * x14; - Fp x1107 = x1106 + x204; - arg2[425] = x1107; - Fp x1108 = x209 - x80; - arg2[376] = x1108; - FpExt x1109 = x1105 + poly_mix[72] * x1108; - Fp x1110 = x191 - x48; - arg2[377] = x1110; - FpExt x1111 = x1109 + poly_mix[73] * x1110; - Fp x1112 = x210 - x128; - arg2[378] = x1112; - FpExt x1113 = x1111 + poly_mix[74] * x1112; - Fp x1114 = x211 - x129; - arg2[379] = x1114; - FpExt x1115 = x1113 + poly_mix[75] * x1114; - Fp x1116 = x212 - x130; - arg2[380] = x1116; - FpExt x1117 = x1115 + poly_mix[76] * x1116; - Fp x1118 = x213 - x81; - arg2[381] = x1118; - FpExt x1119 = x1117 + poly_mix[77] * x1118; - Fp x1120 = x3 - x131; - arg2[385] = x1120; - FpExt x1121 = x1119 + poly_mix[78] * x1120; - FpExt x1122 = x1121 + poly_mix[79] * x713; - Fp x1123 = x214 - x82; - arg2[537] = x1123; - FpExt x1124 = x1122 + poly_mix[80] * x1123; - Fp x1125 = x215 - x49; - arg2[383] = x1125; - FpExt x1126 = x1124 + poly_mix[81] * x1125; - Fp x1127 = x216 - x132; - arg2[384] = x1127; - FpExt x1128 = x1126 + poly_mix[82] * x1127; - FpExt x1129 = x1128 + poly_mix[83] * x721; - FpExt x1130 = x1129 + poly_mix[84] * x723; - FpExt x1131 = x1130 + poly_mix[85] * x725; - FpExt x1132 = x1131 + poly_mix[86] * x727; - FpExt x1133 = x1132 + poly_mix[87] * x729; - FpExt x1134 = x1133 + poly_mix[88] * x731; - FpExt x1135 = x1134 + poly_mix[89] * x733; - FpExt x1136 = x1135 + poly_mix[90] * x735; - FpExt x1137 = x1136 + poly_mix[91] * x737; - FpExt x1138 = x1137 + poly_mix[92] * x739; - FpExt x1139 = x1138 + poly_mix[93] * x741; - FpExt x1140 = x1139 + poly_mix[94] * x743; - FpExt x1141 = x1140 + poly_mix[95] * x745; - FpExt x1142 = x1141 + poly_mix[96] * x747; - FpExt x1143 = x1142 + poly_mix[97] * x749; - FpExt x1144 = x1143 + poly_mix[98] * x751; - Fp x1145 = x990 - x139; - FpExt x1146 = x1144 + poly_mix[99] * x1145; - Fp x1147 = x1003 - x140; - FpExt x1148 = x1146 + poly_mix[100] * x1147; - Fp x1149 = x1016 - x42; - FpExt x1150 = x1148 + poly_mix[101] * x1149; - Fp x1151 = x1029 - x58; - FpExt x1152 = x1150 + poly_mix[102] * x1151; - Fp x1153 = x1049 - x59; - FpExt x1154 = x1152 + poly_mix[103] * x1153; - Fp x1155 = x1069 - x84; - FpExt x1156 = x1154 + poly_mix[104] * x1155; - Fp x1157 = arg2[339]; - Fp x1158 = x1157 - x141; - FpExt x1159 = x1156 + poly_mix[105] * x1158; - Fp x1160 = x1107 - x85; - FpExt x1161 = x1159 + poly_mix[106] * x1160; - FpExt x1162 = x1161 + poly_mix[107] * x775; - FpExt x1163 = x1162 + poly_mix[108] * x173; - FpExt x1164 = x1163 + poly_mix[109] * x174; - FpExt x1165 = x1164 + poly_mix[110] * x175; - FpExt x1166 = x1165 + poly_mix[111] * x176; - FpExt x1167 = x1166 + poly_mix[112] * x177; - FpExt x1168 = x1167 + poly_mix[113] * x178; - FpExt x1169 = x1168 + poly_mix[114] * x179; - FpExt x1170 = x1169 + poly_mix[115] * x180; - FpExt x1171 = x1170 + poly_mix[116] * x181; - FpExt x1172 = x1171 + poly_mix[117] * x182; - FpExt x1173 = x1172 + poly_mix[118] * x183; - FpExt x1174 = x1173 + poly_mix[119] * x184; - FpExt x1175 = x1174 + poly_mix[120] * x185; - FpExt x1176 = x1175 + poly_mix[121] * x186; - FpExt x1177 = x1176 + poly_mix[122] * x187; - FpExt x1178 = x1177 + poly_mix[123] * x188; - FpExt x1179 = x1178 + poly_mix[124] * x189; - FpExt x1180 = x1179 + poly_mix[125] * x190; - FpExt x1181 = x982 + x47 * x1180 * poly_mix[165]; - FpExt x1182 = x217 * x9; - FpExt x1183 = x218 + x1182; - FpExt x1184 = x1183 * x9; - FpExt x1185 = x219 + x1184; - FpExt x1186 = x1185 * x9; - FpExt x1187 = x220 + x1186; - arg6[0] = x1187; - Fp x1188 = x211 + x221; - FpExt x1189 = arg3 + poly_mix[0] * x881; - FpExt x1190 = x1189 + poly_mix[1] * x889; - Fp x1191 = x28 - x165; - Fp x1192 = x165 * x1191; - arg2[460] = x1192; - FpExt x1193 = x1190 + poly_mix[2] * x1192; - Fp x1194 = x163 + x164; - Fp x1195 = x1194 + x165; - Fp x1196 = x1195 - x28; - FpExt x1197 = x1193 + poly_mix[3] * x1196; - Fp x1198 = x165 * x27; - Fp x1199 = x164 + x1198; - Fp x1200 = x1199 - x1188; - FpExt x1201 = x1197 + poly_mix[4] * x1200; - Fp x1202 = x214 + x28; - arg2[347] = x1202; - Fp x1203 = x214 + x27; - arg2[352] = x1203; - auto x1204 = rv32im_v2_6( - idx, size, arg2, arg3, x795, arg6, x1201, x1181, arg7, x702, x681, arg8, arg9, arg10, arg11); - - return x1204; -} -__device__ FpExt rv32im_v2_3(uint32_t idx, - uint32_t size, - Fp* arg0, - FpExt arg1, - FpExt* arg2, - FpExt arg3, - FpExt arg4, - FpExt arg5, - FpExt arg6, - const Fp* arg7, - const Fp* arg8, - const Fp* arg9) { - uint32_t mask = size - 1; - Fp x0(1199068823); - Fp x1(1240419708); - Fp x2(1708681573); - Fp x3(308575117); - Fp x4(1111544260); - Fp x5(822033215); - Fp x6(1891545577); - Fp x7(440300254); - Fp x8(1726563304); - Fp x9(1365519753); - Fp x10(924863639); - Fp x11(1558116381); - Fp x12(1942928017); - Fp x13(1928969209); - Fp x14(51866717); - Fp x15(658182609); - Fp x16(1867716110); - Fp x17(111593398); - Fp x18(375892129); - Fp x19(1083257840); - Fp x20(20525701); - Fp x21(1188752902); - Fp x22(106789798); - Fp x23(1389833583); - Fp x24(98371040); - Fp x25(1001081699); - Fp x26(1792686146); - Fp x27(801504236); - Fp x28(1997365680); - Fp x29(1461037801); - Fp x30(65998480); - Fp x31(1974912880); - Fp x32(606789471); - Fp x33(13683276); - Fp x34(918610824); - Fp x35(1540960371); - Fp x36 = arg7[73 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x37 = arg7[72 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x38 = arg7[75 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x39 = arg7[74 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x40 = arg7[77 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x41 = arg7[76 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x42 = arg7[79 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x43 = arg7[78 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x44 = arg7[81 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x45 = arg7[80 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x46 = arg7[83 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x47 = arg7[82 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x48 = arg7[85 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x49 = arg7[84 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x50 = arg7[87 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x51 = arg7[86 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x52 = arg7[89 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x53 = arg7[88 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x54 = arg7[91 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x55 = arg7[90 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x56 = arg7[93 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x57 = arg7[92 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x58 = arg7[95 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x59 = arg7[94 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x60 = arg0[539]; - Fp x61 = arg0[540]; - Fp x62 = x60 + x61; - Fp x63 = arg0[541]; - Fp x64 = x63 * x20; - Fp x65 = x60 + x64; - Fp x66 = arg0[542]; - Fp x67 = x66 * x21; - Fp x68 = x60 + x67; - Fp x69 = arg0[543]; - Fp x70 = x69 * x22; - Fp x71 = x60 + x70; - Fp x72 = arg0[544]; - Fp x73 = x72 * x23; - Fp x74 = x60 + x73; - Fp x75 = arg0[545]; - Fp x76 = x75 * x24; - Fp x77 = x60 + x76; - Fp x78 = arg0[546]; - Fp x79 = x78 * x25; - Fp x80 = x60 + x79; - Fp x81 = arg0[547]; - Fp x82 = x81 * x26; - Fp x83 = x60 + x82; - Fp x84 = arg0[548]; - Fp x85 = x84 * x27; - Fp x86 = x60 + x85; - Fp x87 = arg0[549]; - Fp x88 = x87 * x28; - Fp x89 = x60 + x88; - Fp x90 = arg0[550]; - Fp x91 = x90 * x29; - Fp x92 = x60 + x91; - Fp x93 = arg0[551]; - Fp x94 = x93 * x30; - Fp x95 = x60 + x94; - Fp x96 = arg0[552]; - Fp x97 = x96 * x31; - Fp x98 = x60 + x97; - Fp x99 = arg0[553]; - Fp x100 = x99 * x32; - Fp x101 = x60 + x100; - Fp x102 = arg0[554]; - Fp x103 = x102 * x33; - Fp x104 = x60 + x103; - Fp x105 = arg0[555]; - Fp x106 = x105 * x34; - Fp x107 = x60 + x106; - Fp x108 = arg0[556]; - Fp x109 = x108 + x35; - Fp x110 = x109 * x109; - Fp x111 = x110 * x109; - Fp x112 = x111 - x36; - FpExt x113 = arg1 + poly_mix[6] * x112; - Fp x114 = arg0[557]; - Fp x115 = x114 * x109; - Fp x116 = x115 - x37; - FpExt x117 = x113 + poly_mix[7] * x116; - Fp x118 = arg0[558]; - Fp x119 = x37 + x118; - Fp x120 = arg0[559]; - Fp x121 = x119 + x120; - Fp x122 = arg0[560]; - Fp x123 = x121 + x122; - Fp x124 = arg0[561]; - Fp x125 = x123 + x124; - Fp x126 = arg0[562]; - Fp x127 = x125 + x126; - Fp x128 = arg0[563]; - Fp x129 = x127 + x128; - Fp x130 = arg0[564]; - Fp x131 = x129 + x130; - Fp x132 = x131 + x62; - Fp x133 = x132 + x65; - Fp x134 = x133 + x68; - Fp x135 = x134 + x71; - Fp x136 = x135 + x74; - Fp x137 = x136 + x77; - Fp x138 = x137 + x80; - Fp x139 = x138 + x83; - Fp x140 = x139 + x86; - Fp x141 = x140 + x89; - Fp x142 = x141 + x92; - Fp x143 = x142 + x95; - Fp x144 = x143 + x98; - Fp x145 = x144 + x101; - Fp x146 = x145 + x104; - Fp x147 = x146 + x107; - Fp x148 = x37 * x19; - Fp x149 = x147 + x148; - Fp x150 = x118 * x18; - Fp x151 = x147 + x150; - Fp x152 = x120 * x17; - Fp x153 = x147 + x152; - Fp x154 = x122 * x16; - Fp x155 = x147 + x154; - Fp x156 = x124 * x15; - Fp x157 = x147 + x156; - Fp x158 = x126 * x14; - Fp x159 = x147 + x158; - Fp x160 = x128 * x13; - Fp x161 = x147 + x160; - Fp x162 = x130 * x12; - Fp x163 = x147 + x162; - Fp x164 = x62 * x11; - Fp x165 = x147 + x164; - Fp x166 = x65 * x20; - Fp x167 = x147 + x166; - Fp x168 = x68 * x21; - Fp x169 = x147 + x168; - Fp x170 = x71 * x22; - Fp x171 = x147 + x170; - Fp x172 = x74 * x23; - Fp x173 = x147 + x172; - Fp x174 = x77 * x24; - Fp x175 = x147 + x174; - Fp x176 = x80 * x25; - Fp x177 = x147 + x176; - Fp x178 = x83 * x26; - Fp x179 = x147 + x178; - Fp x180 = x86 * x27; - Fp x181 = x147 + x180; - Fp x182 = x89 * x28; - Fp x183 = x147 + x182; - Fp x184 = x92 * x29; - Fp x185 = x147 + x184; - Fp x186 = x95 * x30; - Fp x187 = x147 + x186; - Fp x188 = x98 * x31; - Fp x189 = x147 + x188; - Fp x190 = x101 * x32; - Fp x191 = x147 + x190; - Fp x192 = x104 * x33; - Fp x193 = x147 + x192; - Fp x194 = x107 * x34; - Fp x195 = x147 + x194; - Fp x196 = x149 + x10; - Fp x197 = x196 * x196; - Fp x198 = x197 * x196; - Fp x199 = x198 - x38; - FpExt x200 = x117 + poly_mix[8] * x199; - Fp x201 = arg0[565]; - Fp x202 = x201 * x196; - Fp x203 = x202 - x39; - FpExt x204 = x200 + poly_mix[9] * x203; - Fp x205 = x39 + x151; - Fp x206 = x205 + x153; - Fp x207 = x206 + x155; - Fp x208 = x207 + x157; - Fp x209 = x208 + x159; - Fp x210 = x209 + x161; - Fp x211 = x210 + x163; - Fp x212 = x211 + x165; - Fp x213 = x212 + x167; - Fp x214 = x213 + x169; - Fp x215 = x214 + x171; - Fp x216 = x215 + x173; - Fp x217 = x216 + x175; - Fp x218 = x217 + x177; - Fp x219 = x218 + x179; - Fp x220 = x219 + x181; - Fp x221 = x220 + x183; - Fp x222 = x221 + x185; - Fp x223 = x222 + x187; - Fp x224 = x223 + x189; - Fp x225 = x224 + x191; - Fp x226 = x225 + x193; - Fp x227 = x226 + x195; - Fp x228 = x39 * x19; - Fp x229 = x227 + x228; - Fp x230 = x151 * x18; - Fp x231 = x227 + x230; - Fp x232 = x153 * x17; - Fp x233 = x227 + x232; - Fp x234 = x155 * x16; - Fp x235 = x227 + x234; - Fp x236 = x157 * x15; - Fp x237 = x227 + x236; - Fp x238 = x159 * x14; - Fp x239 = x227 + x238; - Fp x240 = x161 * x13; - Fp x241 = x227 + x240; - Fp x242 = x163 * x12; - Fp x243 = x227 + x242; - Fp x244 = x165 * x11; - Fp x245 = x227 + x244; - Fp x246 = x167 * x20; - Fp x247 = x227 + x246; - Fp x248 = x169 * x21; - Fp x249 = x227 + x248; - Fp x250 = x171 * x22; - Fp x251 = x227 + x250; - Fp x252 = x173 * x23; - Fp x253 = x227 + x252; - Fp x254 = x175 * x24; - Fp x255 = x227 + x254; - Fp x256 = x177 * x25; - Fp x257 = x227 + x256; - Fp x258 = x179 * x26; - Fp x259 = x227 + x258; - Fp x260 = x181 * x27; - Fp x261 = x227 + x260; - Fp x262 = x183 * x28; - Fp x263 = x227 + x262; - Fp x264 = x185 * x29; - Fp x265 = x227 + x264; - Fp x266 = x187 * x30; - Fp x267 = x227 + x266; - Fp x268 = x189 * x31; - Fp x269 = x227 + x268; - Fp x270 = x191 * x32; - Fp x271 = x227 + x270; - Fp x272 = x193 * x33; - Fp x273 = x227 + x272; - Fp x274 = x195 * x34; - Fp x275 = x227 + x274; - Fp x276 = x229 + x9; - Fp x277 = x276 * x276; - Fp x278 = x277 * x276; - Fp x279 = x278 - x40; - FpExt x280 = x204 + poly_mix[10] * x279; - Fp x281 = arg0[566]; - Fp x282 = x281 * x276; - Fp x283 = x282 - x41; - FpExt x284 = x280 + poly_mix[11] * x283; - Fp x285 = x41 + x231; - Fp x286 = x285 + x233; - Fp x287 = x286 + x235; - Fp x288 = x287 + x237; - Fp x289 = x288 + x239; - Fp x290 = x289 + x241; - Fp x291 = x290 + x243; - Fp x292 = x291 + x245; - Fp x293 = x292 + x247; - Fp x294 = x293 + x249; - Fp x295 = x294 + x251; - Fp x296 = x295 + x253; - Fp x297 = x296 + x255; - Fp x298 = x297 + x257; - Fp x299 = x298 + x259; - Fp x300 = x299 + x261; - Fp x301 = x300 + x263; - Fp x302 = x301 + x265; - Fp x303 = x302 + x267; - Fp x304 = x303 + x269; - Fp x305 = x304 + x271; - Fp x306 = x305 + x273; - Fp x307 = x306 + x275; - Fp x308 = x41 * x19; - Fp x309 = x307 + x308; - Fp x310 = x231 * x18; - Fp x311 = x307 + x310; - Fp x312 = x233 * x17; - Fp x313 = x307 + x312; - Fp x314 = x235 * x16; - Fp x315 = x307 + x314; - Fp x316 = x237 * x15; - Fp x317 = x307 + x316; - Fp x318 = x239 * x14; - Fp x319 = x307 + x318; - Fp x320 = x241 * x13; - Fp x321 = x307 + x320; - Fp x322 = x243 * x12; - Fp x323 = x307 + x322; - Fp x324 = x245 * x11; - Fp x325 = x307 + x324; - Fp x326 = x247 * x20; - Fp x327 = x307 + x326; - Fp x328 = x249 * x21; - Fp x329 = x307 + x328; - Fp x330 = x251 * x22; - Fp x331 = x307 + x330; - Fp x332 = x253 * x23; - Fp x333 = x307 + x332; - Fp x334 = x255 * x24; - Fp x335 = x307 + x334; - Fp x336 = x257 * x25; - Fp x337 = x307 + x336; - Fp x338 = x259 * x26; - Fp x339 = x307 + x338; - Fp x340 = x261 * x27; - Fp x341 = x307 + x340; - Fp x342 = x263 * x28; - Fp x343 = x307 + x342; - Fp x344 = x265 * x29; - Fp x345 = x307 + x344; - Fp x346 = x267 * x30; - Fp x347 = x307 + x346; - Fp x348 = x269 * x31; - Fp x349 = x307 + x348; - Fp x350 = x271 * x32; - Fp x351 = x307 + x350; - Fp x352 = x273 * x33; - Fp x353 = x307 + x352; - Fp x354 = x275 * x34; - Fp x355 = x307 + x354; - Fp x356 = x309 + x8; - Fp x357 = x356 * x356; - Fp x358 = x357 * x356; - Fp x359 = x358 - x42; - FpExt x360 = x284 + poly_mix[12] * x359; - Fp x361 = arg0[567]; - Fp x362 = x361 * x356; - Fp x363 = x362 - x43; - FpExt x364 = x360 + poly_mix[13] * x363; - Fp x365 = x43 + x311; - Fp x366 = x365 + x313; - Fp x367 = x366 + x315; - Fp x368 = x367 + x317; - Fp x369 = x368 + x319; - Fp x370 = x369 + x321; - Fp x371 = x370 + x323; - Fp x372 = x371 + x325; - Fp x373 = x372 + x327; - Fp x374 = x373 + x329; - Fp x375 = x374 + x331; - Fp x376 = x375 + x333; - Fp x377 = x376 + x335; - Fp x378 = x377 + x337; - Fp x379 = x378 + x339; - Fp x380 = x379 + x341; - Fp x381 = x380 + x343; - Fp x382 = x381 + x345; - Fp x383 = x382 + x347; - Fp x384 = x383 + x349; - Fp x385 = x384 + x351; - Fp x386 = x385 + x353; - Fp x387 = x386 + x355; - Fp x388 = x43 * x19; - Fp x389 = x387 + x388; - Fp x390 = x311 * x18; - Fp x391 = x387 + x390; - Fp x392 = x313 * x17; - Fp x393 = x387 + x392; - Fp x394 = x315 * x16; - Fp x395 = x387 + x394; - Fp x396 = x317 * x15; - Fp x397 = x387 + x396; - Fp x398 = x319 * x14; - Fp x399 = x387 + x398; - Fp x400 = x321 * x13; - Fp x401 = x387 + x400; - Fp x402 = x323 * x12; - Fp x403 = x387 + x402; - Fp x404 = x325 * x11; - Fp x405 = x387 + x404; - Fp x406 = x327 * x20; - Fp x407 = x387 + x406; - Fp x408 = x329 * x21; - Fp x409 = x387 + x408; - Fp x410 = x331 * x22; - Fp x411 = x387 + x410; - Fp x412 = x333 * x23; - Fp x413 = x387 + x412; - Fp x414 = x335 * x24; - Fp x415 = x387 + x414; - Fp x416 = x337 * x25; - Fp x417 = x387 + x416; - Fp x418 = x339 * x26; - Fp x419 = x387 + x418; - Fp x420 = x341 * x27; - Fp x421 = x387 + x420; - Fp x422 = x343 * x28; - Fp x423 = x387 + x422; - Fp x424 = x345 * x29; - Fp x425 = x387 + x424; - Fp x426 = x347 * x30; - Fp x427 = x387 + x426; - Fp x428 = x349 * x31; - Fp x429 = x387 + x428; - Fp x430 = x351 * x32; - Fp x431 = x387 + x430; - Fp x432 = x353 * x33; - Fp x433 = x387 + x432; - Fp x434 = x355 * x34; - Fp x435 = x387 + x434; - Fp x436 = x389 + x7; - Fp x437 = x436 * x436; - Fp x438 = x437 * x436; - Fp x439 = x438 - x44; - FpExt x440 = x364 + poly_mix[14] * x439; - Fp x441 = arg0[568]; - Fp x442 = x441 * x436; - Fp x443 = x442 - x45; - FpExt x444 = x440 + poly_mix[15] * x443; - Fp x445 = x45 + x391; - Fp x446 = x445 + x393; - Fp x447 = x446 + x395; - Fp x448 = x447 + x397; - Fp x449 = x448 + x399; - Fp x450 = x449 + x401; - Fp x451 = x450 + x403; - Fp x452 = x451 + x405; - Fp x453 = x452 + x407; - Fp x454 = x453 + x409; - Fp x455 = x454 + x411; - Fp x456 = x455 + x413; - Fp x457 = x456 + x415; - Fp x458 = x457 + x417; - Fp x459 = x458 + x419; - Fp x460 = x459 + x421; - Fp x461 = x460 + x423; - Fp x462 = x461 + x425; - Fp x463 = x462 + x427; - Fp x464 = x463 + x429; - Fp x465 = x464 + x431; - Fp x466 = x465 + x433; - Fp x467 = x466 + x435; - Fp x468 = x45 * x19; - Fp x469 = x467 + x468; - Fp x470 = x391 * x18; - Fp x471 = x467 + x470; - Fp x472 = x393 * x17; - Fp x473 = x467 + x472; - Fp x474 = x395 * x16; - Fp x475 = x467 + x474; - Fp x476 = x397 * x15; - Fp x477 = x467 + x476; - Fp x478 = x399 * x14; - Fp x479 = x467 + x478; - Fp x480 = x401 * x13; - Fp x481 = x467 + x480; - Fp x482 = x403 * x12; - Fp x483 = x467 + x482; - Fp x484 = x405 * x11; - Fp x485 = x467 + x484; - Fp x486 = x407 * x20; - Fp x487 = x467 + x486; - Fp x488 = x409 * x21; - Fp x489 = x467 + x488; - Fp x490 = x411 * x22; - Fp x491 = x467 + x490; - Fp x492 = x413 * x23; - Fp x493 = x467 + x492; - Fp x494 = x415 * x24; - Fp x495 = x467 + x494; - Fp x496 = x417 * x25; - Fp x497 = x467 + x496; - Fp x498 = x419 * x26; - Fp x499 = x467 + x498; - Fp x500 = x421 * x27; - Fp x501 = x467 + x500; - Fp x502 = x423 * x28; - Fp x503 = x467 + x502; - Fp x504 = x425 * x29; - Fp x505 = x467 + x504; - Fp x506 = x427 * x30; - Fp x507 = x467 + x506; - Fp x508 = x429 * x31; - Fp x509 = x467 + x508; - Fp x510 = x431 * x32; - Fp x511 = x467 + x510; - Fp x512 = x433 * x33; - Fp x513 = x467 + x512; - Fp x514 = x435 * x34; - Fp x515 = x467 + x514; - Fp x516 = x469 + x6; - Fp x517 = x516 * x516; - Fp x518 = x517 * x516; - Fp x519 = x518 - x46; - FpExt x520 = x444 + poly_mix[16] * x519; - Fp x521 = arg0[569]; - Fp x522 = x521 * x516; - Fp x523 = x522 - x47; - FpExt x524 = x520 + poly_mix[17] * x523; - Fp x525 = x47 + x471; - Fp x526 = x525 + x473; - Fp x527 = x526 + x475; - Fp x528 = x527 + x477; - Fp x529 = x528 + x479; - Fp x530 = x529 + x481; - Fp x531 = x530 + x483; - Fp x532 = x531 + x485; - Fp x533 = x532 + x487; - Fp x534 = x533 + x489; - Fp x535 = x534 + x491; - Fp x536 = x535 + x493; - Fp x537 = x536 + x495; - Fp x538 = x537 + x497; - Fp x539 = x538 + x499; - Fp x540 = x539 + x501; - Fp x541 = x540 + x503; - Fp x542 = x541 + x505; - Fp x543 = x542 + x507; - Fp x544 = x543 + x509; - Fp x545 = x544 + x511; - Fp x546 = x545 + x513; - Fp x547 = x546 + x515; - Fp x548 = x47 * x19; - Fp x549 = x547 + x548; - Fp x550 = x471 * x18; - Fp x551 = x547 + x550; - Fp x552 = x473 * x17; - Fp x553 = x547 + x552; - Fp x554 = x475 * x16; - Fp x555 = x547 + x554; - Fp x556 = x477 * x15; - Fp x557 = x547 + x556; - Fp x558 = x479 * x14; - Fp x559 = x547 + x558; - Fp x560 = x481 * x13; - Fp x561 = x547 + x560; - Fp x562 = x483 * x12; - Fp x563 = x547 + x562; - Fp x564 = x485 * x11; - Fp x565 = x547 + x564; - Fp x566 = x487 * x20; - Fp x567 = x547 + x566; - Fp x568 = x489 * x21; - Fp x569 = x547 + x568; - Fp x570 = x491 * x22; - Fp x571 = x547 + x570; - Fp x572 = x493 * x23; - Fp x573 = x547 + x572; - Fp x574 = x495 * x24; - Fp x575 = x547 + x574; - Fp x576 = x497 * x25; - Fp x577 = x547 + x576; - Fp x578 = x499 * x26; - Fp x579 = x547 + x578; - Fp x580 = x501 * x27; - Fp x581 = x547 + x580; - Fp x582 = x503 * x28; - Fp x583 = x547 + x582; - Fp x584 = x505 * x29; - Fp x585 = x547 + x584; - Fp x586 = x507 * x30; - Fp x587 = x547 + x586; - Fp x588 = x509 * x31; - Fp x589 = x547 + x588; - Fp x590 = x511 * x32; - Fp x591 = x547 + x590; - Fp x592 = x513 * x33; - Fp x593 = x547 + x592; - Fp x594 = x515 * x34; - Fp x595 = x547 + x594; - Fp x596 = x549 + x5; - Fp x597 = x596 * x596; - Fp x598 = x597 * x596; - Fp x599 = x598 - x48; - FpExt x600 = x524 + poly_mix[18] * x599; - Fp x601 = arg0[570]; - Fp x602 = x601 * x596; - Fp x603 = x602 - x49; - FpExt x604 = x600 + poly_mix[19] * x603; - Fp x605 = x49 + x551; - Fp x606 = x605 + x553; - Fp x607 = x606 + x555; - Fp x608 = x607 + x557; - Fp x609 = x608 + x559; - Fp x610 = x609 + x561; - Fp x611 = x610 + x563; - Fp x612 = x611 + x565; - Fp x613 = x612 + x567; - Fp x614 = x613 + x569; - Fp x615 = x614 + x571; - Fp x616 = x615 + x573; - Fp x617 = x616 + x575; - Fp x618 = x617 + x577; - Fp x619 = x618 + x579; - Fp x620 = x619 + x581; - Fp x621 = x620 + x583; - Fp x622 = x621 + x585; - Fp x623 = x622 + x587; - Fp x624 = x623 + x589; - Fp x625 = x624 + x591; - Fp x626 = x625 + x593; - Fp x627 = x626 + x595; - Fp x628 = x49 * x19; - Fp x629 = x627 + x628; - Fp x630 = x551 * x18; - Fp x631 = x627 + x630; - Fp x632 = x553 * x17; - Fp x633 = x627 + x632; - Fp x634 = x555 * x16; - Fp x635 = x627 + x634; - Fp x636 = x557 * x15; - Fp x637 = x627 + x636; - Fp x638 = x559 * x14; - Fp x639 = x627 + x638; - Fp x640 = x561 * x13; - Fp x641 = x627 + x640; - Fp x642 = x563 * x12; - Fp x643 = x627 + x642; - Fp x644 = x565 * x11; - Fp x645 = x627 + x644; - Fp x646 = x567 * x20; - Fp x647 = x627 + x646; - Fp x648 = x569 * x21; - Fp x649 = x627 + x648; - Fp x650 = x571 * x22; - Fp x651 = x627 + x650; - Fp x652 = x573 * x23; - Fp x653 = x627 + x652; - Fp x654 = x575 * x24; - Fp x655 = x627 + x654; - Fp x656 = x577 * x25; - Fp x657 = x627 + x656; - Fp x658 = x579 * x26; - Fp x659 = x627 + x658; - Fp x660 = x581 * x27; - Fp x661 = x627 + x660; - Fp x662 = x583 * x28; - Fp x663 = x627 + x662; - Fp x664 = x585 * x29; - Fp x665 = x627 + x664; - Fp x666 = x587 * x30; - Fp x667 = x627 + x666; - Fp x668 = x589 * x31; - Fp x669 = x627 + x668; - Fp x670 = x591 * x32; - Fp x671 = x627 + x670; - Fp x672 = x593 * x33; - Fp x673 = x627 + x672; - Fp x674 = x595 * x34; - Fp x675 = x627 + x674; - Fp x676 = x629 + x4; - Fp x677 = x676 * x676; - Fp x678 = x677 * x676; - Fp x679 = x678 - x50; - FpExt x680 = x604 + poly_mix[20] * x679; - Fp x681 = arg0[571]; - Fp x682 = x681 * x676; - Fp x683 = x682 - x51; - FpExt x684 = x680 + poly_mix[21] * x683; - Fp x685 = x51 + x631; - Fp x686 = x685 + x633; - Fp x687 = x686 + x635; - Fp x688 = x687 + x637; - Fp x689 = x688 + x639; - Fp x690 = x689 + x641; - Fp x691 = x690 + x643; - Fp x692 = x691 + x645; - Fp x693 = x692 + x647; - Fp x694 = x693 + x649; - Fp x695 = x694 + x651; - Fp x696 = x695 + x653; - Fp x697 = x696 + x655; - Fp x698 = x697 + x657; - Fp x699 = x698 + x659; - Fp x700 = x699 + x661; - Fp x701 = x700 + x663; - Fp x702 = x701 + x665; - Fp x703 = x702 + x667; - Fp x704 = x703 + x669; - Fp x705 = x704 + x671; - Fp x706 = x705 + x673; - Fp x707 = x706 + x675; - Fp x708 = x51 * x19; - Fp x709 = x707 + x708; - Fp x710 = x631 * x18; - Fp x711 = x707 + x710; - Fp x712 = x633 * x17; - Fp x713 = x707 + x712; - Fp x714 = x635 * x16; - Fp x715 = x707 + x714; - Fp x716 = x637 * x15; - Fp x717 = x707 + x716; - Fp x718 = x639 * x14; - Fp x719 = x707 + x718; - Fp x720 = x641 * x13; - Fp x721 = x707 + x720; - Fp x722 = x643 * x12; - Fp x723 = x707 + x722; - Fp x724 = x645 * x11; - Fp x725 = x707 + x724; - Fp x726 = x647 * x20; - Fp x727 = x707 + x726; - Fp x728 = x649 * x21; - Fp x729 = x707 + x728; - Fp x730 = x651 * x22; - Fp x731 = x707 + x730; - Fp x732 = x653 * x23; - Fp x733 = x707 + x732; - Fp x734 = x655 * x24; - Fp x735 = x707 + x734; - Fp x736 = x657 * x25; - Fp x737 = x707 + x736; - Fp x738 = x659 * x26; - Fp x739 = x707 + x738; - Fp x740 = x661 * x27; - Fp x741 = x707 + x740; - Fp x742 = x663 * x28; - Fp x743 = x707 + x742; - Fp x744 = x665 * x29; - Fp x745 = x707 + x744; - Fp x746 = x667 * x30; - Fp x747 = x707 + x746; - Fp x748 = x669 * x31; - Fp x749 = x707 + x748; - Fp x750 = x671 * x32; - Fp x751 = x707 + x750; - Fp x752 = x673 * x33; - Fp x753 = x707 + x752; - Fp x754 = x675 * x34; - Fp x755 = x707 + x754; - Fp x756 = x709 + x3; - Fp x757 = x756 * x756; - Fp x758 = x757 * x756; - Fp x759 = x758 - x52; - FpExt x760 = x684 + poly_mix[22] * x759; - Fp x761 = arg0[572]; - Fp x762 = x761 * x756; - Fp x763 = x762 - x53; - FpExt x764 = x760 + poly_mix[23] * x763; - Fp x765 = x53 + x711; - Fp x766 = x765 + x713; - Fp x767 = x766 + x715; - Fp x768 = x767 + x717; - Fp x769 = x768 + x719; - Fp x770 = x769 + x721; - Fp x771 = x770 + x723; - Fp x772 = x771 + x725; - Fp x773 = x772 + x727; - Fp x774 = x773 + x729; - Fp x775 = x774 + x731; - Fp x776 = x775 + x733; - Fp x777 = x776 + x735; - Fp x778 = x777 + x737; - Fp x779 = x778 + x739; - Fp x780 = x779 + x741; - Fp x781 = x780 + x743; - Fp x782 = x781 + x745; - Fp x783 = x782 + x747; - Fp x784 = x783 + x749; - Fp x785 = x784 + x751; - Fp x786 = x785 + x753; - Fp x787 = x786 + x755; - Fp x788 = x53 * x19; - Fp x789 = x787 + x788; - Fp x790 = x711 * x18; - Fp x791 = x787 + x790; - Fp x792 = x713 * x17; - Fp x793 = x787 + x792; - Fp x794 = x715 * x16; - Fp x795 = x787 + x794; - Fp x796 = x717 * x15; - Fp x797 = x787 + x796; - Fp x798 = x719 * x14; - Fp x799 = x787 + x798; - Fp x800 = x721 * x13; - Fp x801 = x787 + x800; - Fp x802 = x723 * x12; - Fp x803 = x787 + x802; - Fp x804 = x725 * x11; - Fp x805 = x787 + x804; - Fp x806 = x727 * x20; - Fp x807 = x787 + x806; - Fp x808 = x729 * x21; - Fp x809 = x787 + x808; - Fp x810 = x731 * x22; - Fp x811 = x787 + x810; - Fp x812 = x733 * x23; - Fp x813 = x787 + x812; - Fp x814 = x735 * x24; - Fp x815 = x787 + x814; - Fp x816 = x737 * x25; - Fp x817 = x787 + x816; - Fp x818 = x739 * x26; - Fp x819 = x787 + x818; - Fp x820 = x741 * x27; - Fp x821 = x787 + x820; - Fp x822 = x743 * x28; - Fp x823 = x787 + x822; - Fp x824 = x745 * x29; - Fp x825 = x787 + x824; - Fp x826 = x747 * x30; - Fp x827 = x787 + x826; - Fp x828 = x749 * x31; - Fp x829 = x787 + x828; - Fp x830 = x751 * x32; - Fp x831 = x787 + x830; - Fp x832 = x753 * x33; - Fp x833 = x787 + x832; - Fp x834 = x755 * x34; - Fp x835 = x787 + x834; - Fp x836 = x789 + x2; - Fp x837 = x836 * x836; - Fp x838 = x837 * x836; - Fp x839 = x838 - x54; - FpExt x840 = x764 + poly_mix[24] * x839; - Fp x841 = arg0[573]; - Fp x842 = x841 * x836; - Fp x843 = x842 - x55; - FpExt x844 = x840 + poly_mix[25] * x843; - Fp x845 = x55 + x791; - Fp x846 = x845 + x793; - Fp x847 = x846 + x795; - Fp x848 = x847 + x797; - Fp x849 = x848 + x799; - Fp x850 = x849 + x801; - Fp x851 = x850 + x803; - Fp x852 = x851 + x805; - Fp x853 = x852 + x807; - Fp x854 = x853 + x809; - Fp x855 = x854 + x811; - Fp x856 = x855 + x813; - Fp x857 = x856 + x815; - Fp x858 = x857 + x817; - Fp x859 = x858 + x819; - Fp x860 = x859 + x821; - Fp x861 = x860 + x823; - Fp x862 = x861 + x825; - Fp x863 = x862 + x827; - Fp x864 = x863 + x829; - Fp x865 = x864 + x831; - Fp x866 = x865 + x833; - Fp x867 = x866 + x835; - Fp x868 = x55 * x19; - Fp x869 = x867 + x868; - Fp x870 = x791 * x18; - Fp x871 = x867 + x870; - Fp x872 = x793 * x17; - Fp x873 = x867 + x872; - Fp x874 = x795 * x16; - Fp x875 = x867 + x874; - Fp x876 = x797 * x15; - Fp x877 = x867 + x876; - Fp x878 = x799 * x14; - Fp x879 = x867 + x878; - Fp x880 = x801 * x13; - Fp x881 = x867 + x880; - Fp x882 = x803 * x12; - Fp x883 = x867 + x882; - Fp x884 = x805 * x11; - Fp x885 = x867 + x884; - Fp x886 = x807 * x20; - Fp x887 = x867 + x886; - Fp x888 = x809 * x21; - Fp x889 = x867 + x888; - Fp x890 = x811 * x22; - Fp x891 = x867 + x890; - Fp x892 = x813 * x23; - Fp x893 = x867 + x892; - Fp x894 = x815 * x24; - Fp x895 = x867 + x894; - Fp x896 = x817 * x25; - Fp x897 = x867 + x896; - Fp x898 = x819 * x26; - Fp x899 = x867 + x898; - Fp x900 = x821 * x27; - Fp x901 = x867 + x900; - Fp x902 = x823 * x28; - Fp x903 = x867 + x902; - Fp x904 = x825 * x29; - Fp x905 = x867 + x904; - Fp x906 = x827 * x30; - Fp x907 = x867 + x906; - Fp x908 = x829 * x31; - Fp x909 = x867 + x908; - Fp x910 = x831 * x32; - Fp x911 = x867 + x910; - Fp x912 = x833 * x33; - Fp x913 = x867 + x912; - Fp x914 = x835 * x34; - Fp x915 = x867 + x914; - Fp x916 = x869 + x1; - Fp x917 = x916 * x916; - Fp x918 = x917 * x916; - Fp x919 = x918 - x56; - FpExt x920 = x844 + poly_mix[26] * x919; - Fp x921 = arg0[574]; - Fp x922 = x921 * x916; - Fp x923 = x922 - x57; - FpExt x924 = x920 + poly_mix[27] * x923; - Fp x925 = x57 + x871; - Fp x926 = x925 + x873; - Fp x927 = x926 + x875; - Fp x928 = x927 + x877; - Fp x929 = x928 + x879; - Fp x930 = x929 + x881; - Fp x931 = x930 + x883; - Fp x932 = x931 + x885; - Fp x933 = x932 + x887; - Fp x934 = x933 + x889; - Fp x935 = x934 + x891; - Fp x936 = x935 + x893; - Fp x937 = x936 + x895; - Fp x938 = x937 + x897; - Fp x939 = x938 + x899; - Fp x940 = x939 + x901; - Fp x941 = x940 + x903; - Fp x942 = x941 + x905; - Fp x943 = x942 + x907; - Fp x944 = x943 + x909; - Fp x945 = x944 + x911; - Fp x946 = x945 + x913; - Fp x947 = x946 + x915; - Fp x948 = x57 * x19; - Fp x949 = x947 + x948; - Fp x950 = x871 * x18; - Fp x951 = x947 + x950; - arg0[591] = x951; - Fp x952 = x873 * x17; - Fp x953 = x947 + x952; - arg0[592] = x953; - Fp x954 = x875 * x16; - Fp x955 = x947 + x954; - arg0[593] = x955; - Fp x956 = x877 * x15; - Fp x957 = x947 + x956; - arg0[594] = x957; - Fp x958 = x879 * x14; - Fp x959 = x947 + x958; - arg0[595] = x959; - Fp x960 = x881 * x13; - Fp x961 = x947 + x960; - arg0[596] = x961; - Fp x962 = x883 * x12; - Fp x963 = x947 + x962; - arg0[597] = x963; - Fp x964 = x885 * x11; - Fp x965 = x947 + x964; - arg0[598] = x965; - Fp x966 = x887 * x20; - Fp x967 = x947 + x966; - arg0[599] = x967; - Fp x968 = x889 * x21; - Fp x969 = x947 + x968; - arg0[577] = x969; - Fp x970 = x891 * x22; - Fp x971 = x947 + x970; - arg0[578] = x971; - Fp x972 = x893 * x23; - Fp x973 = x947 + x972; - arg0[579] = x973; - Fp x974 = x895 * x24; - Fp x975 = x947 + x974; - arg0[580] = x975; - Fp x976 = x897 * x25; - Fp x977 = x947 + x976; - arg0[581] = x977; - Fp x978 = x899 * x26; - Fp x979 = x947 + x978; - arg0[582] = x979; - Fp x980 = x901 * x27; - Fp x981 = x947 + x980; - arg0[583] = x981; - Fp x982 = x903 * x28; - Fp x983 = x947 + x982; - arg0[584] = x983; - Fp x984 = x905 * x29; - Fp x985 = x947 + x984; - arg0[585] = x985; - Fp x986 = x907 * x30; - Fp x987 = x947 + x986; - arg0[586] = x987; - Fp x988 = x909 * x31; - Fp x989 = x947 + x988; - arg0[587] = x989; - Fp x990 = x911 * x32; - Fp x991 = x947 + x990; - arg0[588] = x991; - Fp x992 = x913 * x33; - Fp x993 = x947 + x992; - arg0[589] = x993; - Fp x994 = x915 * x34; - Fp x995 = x947 + x994; - arg0[590] = x995; - Fp x996 = x949 + x0; - Fp x997 = x996 * x996; - Fp x998 = x997 * x996; - Fp x999 = x998 - x58; - FpExt x1000 = x924 + poly_mix[28] * x999; - Fp x1001 = arg0[575]; - Fp x1002 = x1001 * x996; - Fp x1003 = x1002 - x59; - FpExt x1004 = x1000 + poly_mix[29] * x1003; - Fp x1005 = x59 + x951; - Fp x1006 = x1005 + x953; - Fp x1007 = x1006 + x955; - Fp x1008 = x1007 + x957; - Fp x1009 = x1008 + x959; - Fp x1010 = x1009 + x961; - Fp x1011 = x1010 + x963; - Fp x1012 = x1011 + x965; - Fp x1013 = x1012 + x967; - arg0[576] = x1013; - auto x1014 = rv32im_v2_2(idx, size, arg0, x1004, arg2, arg3, arg4, arg5, arg6, arg7, arg8, arg9); - - return x1014; -} -__device__ FpExt poly_fp(uint32_t idx, - uint32_t size, - const Fp* ctrl, - const Fp* out, - const Fp* data, - const Fp* mix, - const Fp* accum) { - uint32_t mask = size - 1; - Fp x0(65536); - Fp x1(51); - Fp x2(1073725472); - Fp x3(1073725440); - Fp x4(32768); - Fp x5(8192); - Fp x6(2048); - Fp x7(512); - Fp x8(128); - Fp x9(16); - Fp x10(4096); - Fp x11(1024); - Fp x12(256); - Fp x13(64); - Fp x14(61440); - Fp x15(2013265920); - Fp x16(65535); - Fp x17(49151); - Fp x18(16384); - Fp x19(32); - Fp x20(8); - Fp x21(9); - Fp x22(10); - Fp x23(0); - Fp x24(2); - Fp x25(3); - Fp x26(4); - Fp x27(5); - Fp x28(6); - Fp x29(7); - Fp x30(1); - Fp x31[609]; - - FpExt x32[89]; - - Fp x33 = data[16 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x34 = data[0 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x35 = data[12 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x36 = data[13 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x37 = data[14 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x38 = data[15 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x39 = data[17 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x40 = data[18 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x41 = data[19 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x42 = data[20 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x43 = data[21 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x44 = data[22 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x45 = data[23 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x46 = data[24 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x47 = data[25 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x48 = data[26 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x49 = data[1 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x50 = data[2 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x51 = data[3 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x52 = data[4 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x53 = data[5 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x54 = data[6 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x55 = data[7 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x56 = data[8 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x57 = data[9 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x58 = data[10 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x59 = data[11 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x60 = data[79 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x61 = data[80 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x62 = data[81 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x63 = data[82 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x64 = data[83 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x65 = data[84 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x66 = data[85 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x67 = data[87 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x68 = data[86 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x69 = data[88 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x70 = data[89 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x71 = data[90 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x72 = data[91 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x73 = data[92 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x74 = data[93 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x75 = data[94 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x76 = data[95 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x77 = data[62 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x78 = data[63 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x79 = data[64 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x80 = data[65 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x81 = data[66 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x82 = data[67 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x83 = data[68 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x84 = data[69 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x85 = data[70 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x86 = data[71 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x87 = data[72 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x88 = data[73 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x89 = data[74 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x90 = data[75 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x91 = data[76 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x92 = data[77 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x93 = data[106 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x94 = data[97 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x95 = data[96 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x96 = data[98 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x97 = data[99 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x98 = data[100 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x99 = data[101 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x100 = data[102 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x101 = data[103 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x102 = data[104 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x103 = data[105 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x104 = data[117 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x105 = data[108 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x106 = data[107 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x107 = data[109 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x108 = data[110 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x109 = data[111 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x110 = data[112 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x111 = data[113 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x112 = data[114 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x113 = data[115 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x114 = data[116 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x115 = data[27 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x116 = data[29 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x117 = data[31 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x118 = data[33 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x119 = data[35 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x120 = data[118 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x121 = data[119 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x122 = data[120 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x123 = data[121 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x124 = data[122 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x125 = data[123 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x126 = data[124 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x127 = data[125 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x128 = data[126 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x129 = data[127 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x130 = data[128 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x131 = data[129 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x132 = data[130 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x133 = data[131 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x134 = data[132 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x135 = data[133 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x136 = data[134 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x137 = data[135 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x138 = data[136 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x139 = data[137 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x140 = data[138 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x141 = data[139 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x142 = data[140 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x143 = data[141 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x144 = data[142 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x145 = data[143 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x146 = data[144 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x147 = data[145 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x148 = data[146 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x149 = data[147 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x150 = data[148 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x151 = data[149 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x152 = data[150 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x153 = data[151 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x154 = data[152 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x155 = data[153 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x156 = data[154 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x157 = data[155 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x158 = data[156 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x159 = data[157 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x160 = data[158 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x161 = data[159 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x162 = data[160 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x163 = data[161 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x164 = data[162 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x165 = data[163 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x166 = data[164 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x167 = data[165 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x168 = data[166 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x169 = data[167 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x170 = data[168 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x171 = data[169 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x172 = data[170 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x173 = data[171 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x174 = data[172 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x175 = data[173 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x176 = data[174 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x177 = data[175 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x178 = data[176 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x179 = data[177 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x180 = data[178 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x181 = data[179 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x182 = data[180 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x183 = data[181 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x184 = data[28 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x185 = data[30 * size + ((idx - INV_RATE * 0) & mask)]; - FpExt x186 = FpExt(0); - FpExt x187 = x186 + poly_mix[0] * x23; - Fp x188 = x30 - x33; - Fp x189 = x188 * x35; - x31[99] = x189; - Fp x190 = x188 * x36; - x31[102] = x190; - Fp x191 = x188 * x37; - x31[237] = x191; - Fp x192 = x188 * x38; - Fp x193 = x192 + x33; - x31[238] = x193; - Fp x194 = x30 - x41; - Fp x195 = x41 * x194; - FpExt x196 = x187 + poly_mix[1] * x195; - Fp x197 = x30 - x42; - Fp x198 = x42 * x197; - FpExt x199 = x196 + poly_mix[2] * x198; - Fp x200 = x30 - x43; - Fp x201 = x43 * x200; - FpExt x202 = x199 + poly_mix[3] * x201; - Fp x203 = x30 - x44; - Fp x204 = x44 * x203; - FpExt x205 = x202 + poly_mix[4] * x204; - Fp x206 = x30 - x45; - Fp x207 = x45 * x206; - FpExt x208 = x205 + poly_mix[5] * x207; - Fp x209 = x30 - x46; - Fp x210 = x46 * x209; - FpExt x211 = x208 + poly_mix[6] * x210; - Fp x212 = x30 - x47; - Fp x213 = x47 * x212; - FpExt x214 = x211 + poly_mix[7] * x213; - Fp x215 = x30 - x48; - Fp x216 = x48 * x215; - FpExt x217 = x214 + poly_mix[8] * x216; - Fp x218 = x41 + x42; - Fp x219 = x218 + x43; - Fp x220 = x219 + x44; - Fp x221 = x220 + x45; - x31[104] = x221; - Fp x222 = x221 + x46; - Fp x223 = x222 + x47; - Fp x224 = x223 + x48; - x31[22] = x224; - Fp x225 = x224 - x30; - FpExt x226 = x217 + poly_mix[9] * x225; - Fp x227 = x43 * x24; - Fp x228 = x44 * x25; - Fp x229 = x45 * x26; - Fp x230 = x46 * x27; - Fp x231 = x47 * x28; - Fp x232 = x48 * x29; - x31[607] = x232; - Fp x233 = x42 + x227; - Fp x234 = x233 + x228; - Fp x235 = x234 + x229; - Fp x236 = x235 + x230; - Fp x237 = x236 + x231; - Fp x238 = x237 + x232; - Fp x239 = x238 - x40; - FpExt x240 = x226 + poly_mix[10] * x239; - Fp x241 = x30 - x49; - Fp x242 = x49 * x241; - FpExt x243 = x240 + poly_mix[11] * x242; - Fp x244 = x30 - x50; - Fp x245 = x50 * x244; - FpExt x246 = x243 + poly_mix[12] * x245; - Fp x247 = x30 - x51; - Fp x248 = x51 * x247; - FpExt x249 = x246 + poly_mix[13] * x248; - Fp x250 = x30 - x52; - Fp x251 = x52 * x250; - FpExt x252 = x249 + poly_mix[14] * x251; - Fp x253 = x30 - x53; - Fp x254 = x53 * x253; - FpExt x255 = x252 + poly_mix[15] * x254; - Fp x256 = x30 - x54; - Fp x257 = x54 * x256; - FpExt x258 = x255 + poly_mix[16] * x257; - Fp x259 = x30 - x55; - Fp x260 = x55 * x259; - FpExt x261 = x258 + poly_mix[17] * x260; - Fp x262 = x30 - x56; - Fp x263 = x56 * x262; - FpExt x264 = x261 + poly_mix[18] * x263; - Fp x265 = x30 - x57; - Fp x266 = x57 * x265; - FpExt x267 = x264 + poly_mix[19] * x266; - Fp x268 = x30 - x58; - Fp x269 = x58 * x268; - FpExt x270 = x267 + poly_mix[20] * x269; - Fp x271 = x30 - x59; - Fp x272 = x59 * x271; - FpExt x273 = x270 + poly_mix[21] * x272; - Fp x274 = x49 + x50; - Fp x275 = x274 + x51; - Fp x276 = x275 + x52; - Fp x277 = x276 + x53; - Fp x278 = x277 + x54; - Fp x279 = x278 + x55; - Fp x280 = x279 + x56; - Fp x281 = x280 + x57; - Fp x282 = x281 + x58; - Fp x283 = x282 + x59; - Fp x284 = x283 - x30; - FpExt x285 = x273 + poly_mix[22] * x284; - Fp x286 = x51 * x24; - Fp x287 = x52 * x25; - Fp x288 = x53 * x26; - Fp x289 = x54 * x27; - Fp x290 = x55 * x28; - Fp x291 = x56 * x29; - Fp x292 = x57 * x20; - Fp x293 = x58 * x21; - Fp x294 = x59 * x22; - Fp x295 = x50 + x286; - Fp x296 = x295 + x287; - Fp x297 = x296 + x288; - Fp x298 = x297 + x289; - Fp x299 = x298 + x290; - Fp x300 = x299 + x291; - Fp x301 = x300 + x292; - Fp x302 = x301 + x293; - Fp x303 = x302 + x294; - Fp x304 = x303 - x39; - FpExt x305 = x285 + poly_mix[23] * x304; - Fp x306 = x191 - x19; - x31[255] = x306; - Fp x307 = x193 * x16; - Fp x308 = x30 - x193; - Fp x309 = x308 * x17; - Fp x310 = x307 + x309; - x31[210] = x310; - Fp x311 = x310 - x190; - x31[120] = x311; - Fp x312 = x190 * x18; - x31[121] = x312; - Fp x313 = x193 * x3; - Fp x314 = x308 * x2; - Fp x315 = x313 + x314; - x31[23] = x315; - Fp x316 = x189 + x26; - x31[100] = x316; - Fp x317 = x316 * x41; - Fp x318 = x316 * x42; - Fp x319 = x316 * x43; - Fp x320 = x316 * x44; - x31[105] = x320; - Fp x321 = x316 * x45; - x31[106] = x321; - Fp x322 = x316 * x46; - x31[114] = x322; - Fp x323 = x316 * x47; - x31[115] = x323; - Fp x324 = x316 * x48; - Fp x325 = x317 + x318; - Fp x326 = x325 + x319; - Fp x327 = x326 + x320; - Fp x328 = x327 + x321; - x31[101] = x328; - Fp x329 = x328 + x322; - Fp x330 = x329 + x323; - Fp x331 = x330 + x324; - x31[19] = x331; - Fp x332 = x190 * x41; - Fp x333 = x190 * x42; - Fp x334 = x190 * x43; - Fp x335 = x190 * x44; - x31[107] = x335; - Fp x336 = x190 * x45; - x31[108] = x336; - Fp x337 = x190 * x46; - x31[116] = x337; - Fp x338 = x190 * x47; - x31[117] = x338; - Fp x339 = x190 * x48; - x31[118] = x339; - Fp x340 = x332 + x333; - Fp x341 = x340 + x334; - Fp x342 = x341 + x335; - Fp x343 = x342 + x336; - x31[103] = x343; - Fp x344 = x343 + x337; - Fp x345 = x344 + x338; - Fp x346 = x345 + x339; - x31[20] = x346; - FpExt x347 = x186 + poly_mix[0] * x306; - FpExt x348 = x347 + poly_mix[1] * x23; - Fp x349 = x30 - x60; - Fp x350 = x60 * x349; - Fp x351 = x24 - x60; - Fp x352 = x350 * x351; - Fp x353 = x25 - x60; - Fp x354 = x352 * x353; - x31[136] = x354; - FpExt x355 = x348 + poly_mix[2] * x354; - Fp x356 = x61 - x30; - x31[240] = x356; - FpExt x357 = x355 + poly_mix[3] * x356; - Fp x358 = x62 - x311; - FpExt x359 = x357 + poly_mix[4] * x358; - Fp x360 = x30 - x63; - Fp x361 = x63 * x360; - x31[119] = x361; - FpExt x362 = x359 + poly_mix[5] * x361; - Fp x363 = x190 * x64; - Fp x364 = x363 - x360; - FpExt x365 = x362 + poly_mix[6] * x364; - Fp x366 = x63 * x190; - FpExt x367 = x365 + poly_mix[7] * x366; - Fp x368 = x63 * x64; - FpExt x369 = x367 + poly_mix[8] * x368; - FpExt x370 = x369 + poly_mix[9] * x63; - Fp x371 = x65 - x30; - FpExt x372 = x370 + poly_mix[10] * x371; - Fp x373 = x66 * x26; - Fp x374 = x373 + x60; - Fp x375 = x374 - x189; - FpExt x376 = x372 + poly_mix[11] * x375; - Fp x377 = x312 + x66; - FpExt x378 = x376 + poly_mix[12] * x60; - Fp x379 = x67 - x15; - FpExt x380 = x378 + poly_mix[13] * x379; - Fp x381 = x72 - x30; - x31[229] = x381; - FpExt x382 = x380 + poly_mix[14] * x381; - FpExt x383 = x382 + poly_mix[15] * x23; - FpExt x384 = x383 + poly_mix[16] * x23; - Fp x385 = x68 - x377; - FpExt x386 = x384 + poly_mix[17] * x385; - Fp x387 = x70 - x73; - FpExt x388 = x386 + poly_mix[18] * x387; - Fp x389 = x71 - x74; - FpExt x390 = x388 + poly_mix[19] * x389; - Fp x391 = x34 - x69; - Fp x392 = x75 - x30; - x31[122] = x392; - FpExt x393 = x390 + poly_mix[20] * x392; - Fp x394 = x76 - x391; - FpExt x395 = x393 + poly_mix[21] * x394; - Fp x396 = x30 - x77; - Fp x397 = x77 * x396; - FpExt x398 = x395 + poly_mix[22] * x397; - Fp x399 = x30 - x78; - Fp x400 = x78 * x399; - Fp x401 = x24 - x78; - Fp x402 = x400 * x401; - Fp x403 = x25 - x78; - Fp x404 = x402 * x403; - FpExt x405 = x398 + poly_mix[23] * x404; - Fp x406 = x30 - x79; - Fp x407 = x79 * x406; - Fp x408 = x24 - x79; - Fp x409 = x407 * x408; - Fp x410 = x25 - x79; - Fp x411 = x409 * x410; - FpExt x412 = x405 + poly_mix[24] * x411; - Fp x413 = x30 - x80; - Fp x414 = x80 * x413; - x31[124] = x414; - Fp x415 = x24 - x80; - Fp x416 = x414 * x415; - Fp x417 = x25 - x80; - Fp x418 = x416 * x417; - FpExt x419 = x412 + poly_mix[25] * x418; - Fp x420 = x30 - x81; - x31[482] = x420; - Fp x421 = x81 * x420; - x31[481] = x421; - Fp x422 = x24 - x81; - Fp x423 = x421 * x422; - Fp x424 = x25 - x81; - Fp x425 = x423 * x424; - x31[125] = x425; - FpExt x426 = x419 + poly_mix[26] * x425; - Fp x427 = x30 - x82; - Fp x428 = x82 * x427; - Fp x429 = x24 - x82; - Fp x430 = x428 * x429; - Fp x431 = x25 - x82; - Fp x432 = x430 * x431; - x31[126] = x432; - FpExt x433 = x426 + poly_mix[27] * x432; - Fp x434 = x30 - x83; - x31[483] = x434; - Fp x435 = x83 * x434; - x31[127] = x435; - FpExt x436 = x433 + poly_mix[28] * x435; - Fp x437 = x30 - x84; - Fp x438 = x84 * x437; - Fp x439 = x24 - x84; - Fp x440 = x438 * x439; - Fp x441 = x25 - x84; - Fp x442 = x440 * x441; - x31[128] = x442; - FpExt x443 = x436 + poly_mix[29] * x442; - Fp x444 = x30 - x85; - x31[485] = x444; - Fp x445 = x85 * x444; - x31[484] = x445; - Fp x446 = x24 - x85; - Fp x447 = x445 * x446; - Fp x448 = x25 - x85; - Fp x449 = x447 * x448; - x31[129] = x449; - FpExt x450 = x443 + poly_mix[30] * x449; - Fp x451 = x30 - x86; - Fp x452 = x86 * x451; - x31[130] = x452; - FpExt x453 = x450 + poly_mix[31] * x452; - Fp x454 = x30 - x87; - Fp x455 = x87 * x454; - x31[131] = x455; - FpExt x456 = x453 + poly_mix[32] * x455; - Fp x457 = x30 - x88; - Fp x458 = x88 * x457; - Fp x459 = x24 - x88; - Fp x460 = x458 * x459; - Fp x461 = x25 - x88; - Fp x462 = x460 * x461; - x31[132] = x462; - FpExt x463 = x456 + poly_mix[33] * x462; - Fp x464 = x30 - x89; - Fp x465 = x89 * x464; - x31[133] = x465; - Fp x466 = x24 - x89; - Fp x467 = x465 * x466; - Fp x468 = x25 - x89; - Fp x469 = x467 * x468; - x31[156] = x469; - FpExt x470 = x463 + poly_mix[34] * x469; - Fp x471 = x30 - x90; - Fp x472 = x90 * x471; - x31[134] = x472; - Fp x473 = x24 - x90; - Fp x474 = x472 * x473; - Fp x475 = x25 - x90; - Fp x476 = x474 * x475; - x31[157] = x476; - FpExt x477 = x470 + poly_mix[35] * x476; - Fp x478 = x30 - x91; - Fp x479 = x91 * x478; - Fp x480 = x24 - x91; - Fp x481 = x479 * x480; - Fp x482 = x25 - x91; - Fp x483 = x481 * x482; - x31[135] = x483; - FpExt x484 = x477 + poly_mix[36] * x483; - Fp x485 = x77 * x4; - Fp x486 = x78 * x5; - Fp x487 = x485 + x486; - Fp x488 = x79 * x6; - Fp x489 = x487 + x488; - Fp x490 = x80 * x7; - Fp x491 = x489 + x490; - Fp x492 = x81 * x8; - Fp x493 = x491 + x492; - Fp x494 = x82 * x19; - Fp x495 = x493 + x494; - Fp x496 = x83 * x9; - Fp x497 = x495 + x496; - Fp x498 = x84 * x26; - x31[112] = x498; - Fp x499 = x497 + x498; - Fp x500 = x499 + x85; - Fp x501 = x74 - x500; - FpExt x502 = x484 + poly_mix[37] * x501; - Fp x503 = x86 * x4; - x31[109] = x503; - Fp x504 = x87 * x18; - Fp x505 = x503 + x504; - Fp x506 = x88 * x10; - Fp x507 = x505 + x506; - x31[113] = x507; - Fp x508 = x89 * x11; - Fp x509 = x507 + x508; - Fp x510 = x90 * x12; - Fp x511 = x509 + x510; - Fp x512 = x91 * x8; - Fp x513 = x511 + x512; - Fp x514 = x513 + x92; - Fp x515 = x73 - x514; - FpExt x516 = x502 + poly_mix[38] * x515; - Fp x517 = x84 * x20; - Fp x518 = x85 * x24; - Fp x519 = x517 + x518; - Fp x520 = x519 + x86; - x31[151] = x520; - Fp x521 = x81 * x20; - x31[110] = x521; - Fp x522 = x82 * x24; - x31[111] = x522; - Fp x523 = x521 + x522; - Fp x524 = x523 + x83; - Fp x525 = x89 * x20; - x31[26] = x525; - Fp x526 = x90 * x24; - x31[27] = x526; - Fp x527 = x525 + x526; - Fp x528 = x527 + x91; - x31[21] = x528; - Fp x529 = x78 * x9; - Fp x530 = x79 * x26; - Fp x531 = x529 + x530; - Fp x532 = x531 + x80; - x31[25] = x532; - Fp x533 = x77 * x13; - Fp x534 = x533 + x532; - x31[9] = x534; - Fp x535 = x87 * x26; - x31[137] = x535; - Fp x536 = x535 + x88; - x31[8] = x536; - Fp x537 = x77 * x14; - x31[24] = x537; - Fp x538 = x534 * x19; - Fp x539 = x537 + x538; - Fp x540 = x539 + x524; - x31[16] = x540; - Fp x541 = x77 * x16; - x31[18] = x541; - Fp x542 = x315 + x520; - x31[139] = x542; - Fp x543 = x542 - x93; - FpExt x544 = x516 + poly_mix[39] * x543; - Fp x545 = x94 - x15; - FpExt x546 = x544 + poly_mix[40] * x545; - Fp x547 = x99 - x30; - x31[243] = x547; - FpExt x548 = x546 + poly_mix[41] * x547; - FpExt x549 = x548 + poly_mix[42] * x23; - FpExt x550 = x549 + poly_mix[43] * x23; - Fp x551 = x95 - x93; - FpExt x552 = x550 + poly_mix[44] * x551; - Fp x553 = x97 - x100; - x31[155] = x553; - FpExt x554 = x552 + poly_mix[45] * x553; - Fp x555 = x98 - x101; - FpExt x556 = x554 + poly_mix[46] * x555; - Fp x557 = x34 - x96; - Fp x558 = x102 - x30; - x31[138] = x558; - FpExt x559 = x556 + poly_mix[47] * x558; - Fp x560 = x103 - x557; - FpExt x561 = x559 + poly_mix[48] * x560; - Fp x562 = x315 + x524; - Fp x563 = x562 - x104; - FpExt x564 = x561 + poly_mix[49] * x563; - Fp x565 = x105 - x15; - FpExt x566 = x564 + poly_mix[50] * x565; - Fp x567 = x110 - x30; - FpExt x568 = x566 + poly_mix[51] * x567; - FpExt x569 = x568 + poly_mix[52] * x23; - FpExt x570 = x569 + poly_mix[53] * x23; - Fp x571 = x106 - x104; - FpExt x572 = x570 + poly_mix[54] * x571; - Fp x573 = x108 - x111; - x31[336] = x573; - FpExt x574 = x572 + poly_mix[55] * x573; - Fp x575 = x109 - x112; - FpExt x576 = x574 + poly_mix[56] * x575; - Fp x577 = x34 - x107; - Fp x578 = x113 - x30; - x31[140] = x578; - FpExt x579 = x576 + poly_mix[57] * x578; - Fp x580 = x114 - x577; - FpExt x581 = x579 + poly_mix[58] * x580; - Fp x582 = x92 - x1; - FpExt x583 = x186 + poly_mix[0] * x582; - FpExt x584 = x583 + poly_mix[1] * x536; - FpExt x585 = x584 + poly_mix[2] * x534; - FpExt x586 = x585 + poly_mix[3] * x115; - FpExt x587 = x586 + poly_mix[4] * x116; - FpExt x588 = x587 + poly_mix[5] * x117; - FpExt x589 = x588 + poly_mix[6] * x118; - FpExt x590 = x589 + poly_mix[7] * x119; - FpExt x591 = x581 + x41 * x590 * poly_mix[59]; - Fp x592 = x534 - x19; - FpExt x593 = x584 + poly_mix[2] * x592; - FpExt x594 = x593 + poly_mix[3] * x115; - FpExt x595 = x594 + poly_mix[4] * x116; - FpExt x596 = x595 + poly_mix[5] * x117; - FpExt x597 = x596 + poly_mix[6] * x118; - FpExt x598 = x597 + poly_mix[7] * x119; - FpExt x599 = x591 + x42 * x598 * poly_mix[67]; - Fp x600 = x536 - x26; - x31[28] = x600; - FpExt x601 = x583 + poly_mix[1] * x600; - FpExt x602 = x601 + poly_mix[2] * x534; - Fp x603 = x30 - x120; - x31[98] = x603; - Fp x604 = x120 * x603; - x31[11] = x604; - FpExt x605 = x602 + poly_mix[3] * x604; - Fp x606 = x30 - x121; - Fp x607 = x121 * x606; - x31[14] = x607; - FpExt x608 = x605 + poly_mix[4] * x607; - Fp x609 = x30 - x122; - x31[7] = x609; - Fp x610 = x122 * x609; - x31[2] = x610; - FpExt x611 = x608 + poly_mix[5] * x610; - Fp x612 = x30 - x123; - x31[5] = x612; - Fp x613 = x123 * x612; - x31[3] = x613; - FpExt x614 = x611 + poly_mix[6] * x613; - Fp x615 = x30 - x124; - x31[6] = x615; - Fp x616 = x124 * x615; - x31[4] = x616; - FpExt x617 = x614 + poly_mix[7] * x616; - Fp x618 = x30 - x125; - x31[141] = x618; - Fp x619 = x125 * x618; - x31[29] = x619; - FpExt x620 = x617 + poly_mix[8] * x619; - Fp x621 = x30 - x126; - x31[142] = x621; - Fp x622 = x126 * x621; - x31[30] = x622; - FpExt x623 = x620 + poly_mix[9] * x622; - Fp x624 = x30 - x127; - x31[143] = x624; - Fp x625 = x127 * x624; - x31[31] = x625; - FpExt x626 = x623 + poly_mix[10] * x625; - Fp x627 = x30 - x128; - Fp x628 = x128 * x627; - x31[32] = x628; - FpExt x629 = x626 + poly_mix[11] * x628; - Fp x630 = x30 - x129; - x31[162] = x630; - Fp x631 = x129 * x630; - x31[33] = x631; - FpExt x632 = x629 + poly_mix[12] * x631; - Fp x633 = x30 - x130; - x31[163] = x633; - Fp x634 = x130 * x633; - x31[34] = x634; - FpExt x635 = x632 + poly_mix[13] * x634; - Fp x636 = x30 - x131; - x31[164] = x636; - Fp x637 = x131 * x636; - x31[35] = x637; - FpExt x638 = x635 + poly_mix[14] * x637; - Fp x639 = x30 - x132; - x31[165] = x639; - Fp x640 = x132 * x639; - x31[36] = x640; - FpExt x641 = x638 + poly_mix[15] * x640; - Fp x642 = x30 - x133; - x31[166] = x642; - Fp x643 = x133 * x642; - x31[37] = x643; - FpExt x644 = x641 + poly_mix[16] * x643; - Fp x645 = x30 - x134; - Fp x646 = x134 * x645; - x31[38] = x646; - FpExt x647 = x644 + poly_mix[17] * x646; - Fp x648 = x30 - x135; - Fp x649 = x135 * x648; - x31[39] = x649; - FpExt x650 = x647 + poly_mix[18] * x649; - Fp x651 = x121 * x24; - Fp x652 = x122 * x26; - Fp x653 = x123 * x20; - Fp x654 = x124 * x9; - Fp x655 = x125 * x19; - Fp x656 = x126 * x13; - Fp x657 = x127 * x8; - Fp x658 = x128 * x12; - Fp x659 = x129 * x7; - Fp x660 = x130 * x11; - Fp x661 = x131 * x6; - Fp x662 = x132 * x10; - Fp x663 = x133 * x5; - Fp x664 = x134 * x18; - Fp x665 = x135 * x4; - Fp x666 = x120 + x651; - Fp x667 = x666 + x652; - Fp x668 = x667 + x653; - Fp x669 = x668 + x654; - Fp x670 = x669 + x655; - Fp x671 = x670 + x656; - Fp x672 = x671 + x657; - Fp x673 = x672 + x658; - Fp x674 = x673 + x659; - Fp x675 = x674 + x660; - Fp x676 = x675 + x661; - Fp x677 = x676 + x662; - Fp x678 = x677 + x663; - Fp x679 = x678 + x664; - Fp x680 = x679 + x665; - Fp x681 = x100 - x680; - x31[40] = x681; - FpExt x682 = x650 + poly_mix[19] * x681; - Fp x683 = x30 - x136; - Fp x684 = x136 * x683; - x31[41] = x684; - FpExt x685 = x682 + poly_mix[20] * x684; - Fp x686 = x30 - x137; - x31[182] = x686; - Fp x687 = x137 * x686; - x31[42] = x687; - FpExt x688 = x685 + poly_mix[21] * x687; - Fp x689 = x30 - x138; - Fp x690 = x138 * x689; - x31[43] = x690; - FpExt x691 = x688 + poly_mix[22] * x690; - Fp x692 = x30 - x139; - Fp x693 = x139 * x692; - x31[44] = x693; - FpExt x694 = x691 + poly_mix[23] * x693; - Fp x695 = x30 - x140; - Fp x696 = x140 * x695; - x31[45] = x696; - FpExt x697 = x694 + poly_mix[24] * x696; - Fp x698 = x30 - x141; - Fp x699 = x141 * x698; - x31[46] = x699; - FpExt x700 = x697 + poly_mix[25] * x699; - Fp x701 = x30 - x142; - x31[154] = x701; - Fp x702 = x142 * x701; - x31[47] = x702; - FpExt x703 = x700 + poly_mix[26] * x702; - Fp x704 = x30 - x143; - Fp x705 = x143 * x704; - x31[48] = x705; - FpExt x706 = x703 + poly_mix[27] * x705; - Fp x707 = x30 - x144; - Fp x708 = x144 * x707; - x31[49] = x708; - FpExt x709 = x706 + poly_mix[28] * x708; - Fp x710 = x30 - x145; - Fp x711 = x145 * x710; - x31[50] = x711; - FpExt x712 = x709 + poly_mix[29] * x711; - Fp x713 = x30 - x146; - Fp x714 = x146 * x713; - x31[51] = x714; - FpExt x715 = x712 + poly_mix[30] * x714; - Fp x716 = x30 - x147; - Fp x717 = x147 * x716; - x31[52] = x717; - FpExt x718 = x715 + poly_mix[31] * x717; - Fp x719 = x30 - x148; - Fp x720 = x148 * x719; - x31[53] = x720; - FpExt x721 = x718 + poly_mix[32] * x720; - Fp x722 = x30 - x149; - Fp x723 = x149 * x722; - x31[54] = x723; - FpExt x724 = x721 + poly_mix[33] * x723; - Fp x725 = x30 - x150; - Fp x726 = x150 * x725; - x31[55] = x726; - FpExt x727 = x724 + poly_mix[34] * x726; - Fp x728 = x30 - x151; - Fp x729 = x151 * x728; - x31[56] = x729; - FpExt x730 = x727 + poly_mix[35] * x729; - Fp x731 = x137 * x24; - Fp x732 = x138 * x26; - Fp x733 = x139 * x20; - Fp x734 = x140 * x9; - Fp x735 = x141 * x19; - Fp x736 = x142 * x13; - Fp x737 = x143 * x8; - Fp x738 = x144 * x12; - Fp x739 = x145 * x7; - Fp x740 = x146 * x11; - Fp x741 = x147 * x6; - Fp x742 = x148 * x10; - Fp x743 = x149 * x5; - Fp x744 = x150 * x18; - Fp x745 = x151 * x4; - Fp x746 = x136 + x731; - x31[148] = x746; - Fp x747 = x746 + x732; - Fp x748 = x747 + x733; - Fp x749 = x748 + x734; - Fp x750 = x749 + x735; - Fp x751 = x750 + x736; - Fp x752 = x751 + x737; - Fp x753 = x752 + x738; - Fp x754 = x753 + x739; - Fp x755 = x754 + x740; - Fp x756 = x755 + x741; - Fp x757 = x756 + x742; - Fp x758 = x757 + x743; - Fp x759 = x758 + x744; - Fp x760 = x759 + x745; - x31[57] = x760; - Fp x761 = x111 - x760; - FpExt x762 = x730 + poly_mix[36] * x761; - Fp x763 = x30 - x152; - x31[202] = x763; - Fp x764 = x152 * x763; - x31[58] = x764; - FpExt x765 = x762 + poly_mix[37] * x764; - Fp x766 = x30 - x153; - Fp x767 = x153 * x766; - x31[59] = x767; - FpExt x768 = x765 + poly_mix[38] * x767; - Fp x769 = x30 - x154; - Fp x770 = x154 * x769; - x31[60] = x770; - FpExt x771 = x768 + poly_mix[39] * x770; - Fp x772 = x30 - x155; - Fp x773 = x155 * x772; - x31[61] = x773; - FpExt x774 = x771 + poly_mix[40] * x773; - Fp x775 = x30 - x156; - Fp x776 = x156 * x775; - x31[62] = x776; - FpExt x777 = x774 + poly_mix[41] * x776; - Fp x778 = x30 - x157; - Fp x779 = x157 * x778; - x31[63] = x779; - FpExt x780 = x777 + poly_mix[42] * x779; - Fp x781 = x30 - x158; - Fp x782 = x158 * x781; - x31[64] = x782; - FpExt x783 = x780 + poly_mix[43] * x782; - Fp x784 = x30 - x159; - Fp x785 = x159 * x784; - x31[65] = x785; - FpExt x786 = x783 + poly_mix[44] * x785; - Fp x787 = x30 - x160; - Fp x788 = x160 * x787; - x31[66] = x788; - FpExt x789 = x786 + poly_mix[45] * x788; - Fp x790 = x30 - x161; - Fp x791 = x161 * x790; - x31[67] = x791; - FpExt x792 = x789 + poly_mix[46] * x791; - Fp x793 = x30 - x162; - Fp x794 = x162 * x793; - x31[68] = x794; - FpExt x795 = x792 + poly_mix[47] * x794; - Fp x796 = x30 - x163; - Fp x797 = x163 * x796; - x31[69] = x797; - FpExt x798 = x795 + poly_mix[48] * x797; - Fp x799 = x30 - x164; - Fp x800 = x164 * x799; - x31[70] = x800; - FpExt x801 = x798 + poly_mix[49] * x800; - Fp x802 = x30 - x165; - Fp x803 = x165 * x802; - x31[71] = x803; - FpExt x804 = x801 + poly_mix[50] * x803; - Fp x805 = x30 - x166; - Fp x806 = x166 * x805; - x31[72] = x806; - FpExt x807 = x804 + poly_mix[51] * x806; - Fp x808 = x30 - x167; - Fp x809 = x167 * x808; - x31[73] = x809; - FpExt x810 = x807 + poly_mix[52] * x809; - Fp x811 = x153 * x24; - Fp x812 = x154 * x26; - Fp x813 = x155 * x20; - Fp x814 = x156 * x9; - Fp x815 = x157 * x19; - Fp x816 = x158 * x13; - Fp x817 = x159 * x8; - Fp x818 = x160 * x12; - Fp x819 = x161 * x7; - Fp x820 = x162 * x11; - Fp x821 = x163 * x6; - Fp x822 = x164 * x10; - Fp x823 = x165 * x5; - Fp x824 = x166 * x18; - Fp x825 = x167 * x4; - Fp x826 = x152 + x811; - Fp x827 = x826 + x812; - Fp x828 = x827 + x813; - Fp x829 = x828 + x814; - Fp x830 = x829 + x815; - Fp x831 = x830 + x816; - Fp x832 = x831 + x817; - Fp x833 = x832 + x818; - Fp x834 = x833 + x819; - Fp x835 = x834 + x820; - Fp x836 = x835 + x821; - Fp x837 = x836 + x822; - Fp x838 = x837 + x823; - Fp x839 = x838 + x824; - Fp x840 = x839 + x825; - Fp x841 = x101 - x840; - x31[74] = x841; - FpExt x842 = x810 + poly_mix[53] * x841; - Fp x843 = x30 - x168; - Fp x844 = x168 * x843; - x31[75] = x844; - FpExt x845 = x842 + poly_mix[54] * x844; - Fp x846 = x30 - x169; - Fp x847 = x169 * x846; - x31[76] = x847; - FpExt x848 = x845 + poly_mix[55] * x847; - Fp x849 = x30 - x170; - Fp x850 = x170 * x849; - x31[77] = x850; - FpExt x851 = x848 + poly_mix[56] * x850; - Fp x852 = x30 - x171; - Fp x853 = x171 * x852; - x31[78] = x853; - FpExt x854 = x851 + poly_mix[57] * x853; - Fp x855 = x30 - x172; - Fp x856 = x172 * x855; - x31[79] = x856; - FpExt x857 = x854 + poly_mix[58] * x856; - Fp x858 = x30 - x173; - x31[241] = x858; - Fp x859 = x173 * x858; - x31[80] = x859; - FpExt x860 = x857 + poly_mix[59] * x859; - Fp x861 = x30 - x174; - x31[273] = x861; - Fp x862 = x174 * x861; - x31[81] = x862; - FpExt x863 = x860 + poly_mix[60] * x862; - Fp x864 = x30 - x175; - Fp x865 = x175 * x864; - x31[82] = x865; - FpExt x866 = x863 + poly_mix[61] * x865; - Fp x867 = x30 - x176; - x31[249] = x867; - Fp x868 = x176 * x867; - x31[83] = x868; - FpExt x869 = x866 + poly_mix[62] * x868; - Fp x870 = x30 - x177; - Fp x871 = x177 * x870; - x31[84] = x871; - FpExt x872 = x869 + poly_mix[63] * x871; - Fp x873 = x30 - x178; - Fp x874 = x178 * x873; - x31[85] = x874; - FpExt x875 = x872 + poly_mix[64] * x874; - Fp x876 = x30 - x179; - Fp x877 = x179 * x876; - x31[86] = x877; - FpExt x878 = x875 + poly_mix[65] * x877; - Fp x879 = x30 - x180; - Fp x880 = x180 * x879; - x31[87] = x880; - FpExt x881 = x878 + poly_mix[66] * x880; - Fp x882 = x30 - x181; - Fp x883 = x181 * x882; - x31[88] = x883; - FpExt x884 = x881 + poly_mix[67] * x883; - Fp x885 = x30 - x182; - Fp x886 = x182 * x885; - x31[89] = x886; - FpExt x887 = x884 + poly_mix[68] * x886; - Fp x888 = x30 - x183; - Fp x889 = x183 * x888; - x31[90] = x889; - FpExt x890 = x887 + poly_mix[69] * x889; - Fp x891 = x169 * x24; - Fp x892 = x170 * x26; - Fp x893 = x171 * x20; - Fp x894 = x172 * x9; - Fp x895 = x173 * x19; - Fp x896 = x174 * x13; - Fp x897 = x175 * x8; - Fp x898 = x176 * x12; - Fp x899 = x177 * x7; - Fp x900 = x178 * x11; - Fp x901 = x179 * x6; - Fp x902 = x180 * x10; - Fp x903 = x181 * x5; - Fp x904 = x182 * x18; - Fp x905 = x183 * x4; - Fp x906 = x168 + x891; - Fp x907 = x906 + x892; - Fp x908 = x907 + x893; - Fp x909 = x908 + x894; - Fp x910 = x909 + x895; - Fp x911 = x910 + x896; - Fp x912 = x911 + x897; - Fp x913 = x912 + x898; - Fp x914 = x913 + x899; - Fp x915 = x914 + x900; - Fp x916 = x915 + x901; - Fp x917 = x916 + x902; - Fp x918 = x917 + x903; - Fp x919 = x918 + x904; - Fp x920 = x919 + x905; - x31[91] = x920; - Fp x921 = x112 - x920; - FpExt x922 = x890 + poly_mix[70] * x921; - FpExt x923 = x922 + poly_mix[71] * x115; - FpExt x924 = x923 + poly_mix[72] * x116; - FpExt x925 = x924 + poly_mix[73] * x117; - FpExt x926 = x925 + poly_mix[74] * x118; - FpExt x927 = x926 + poly_mix[75] * x119; - FpExt x928 = x599 + x43 * x927 * poly_mix[75]; - Fp x929 = x536 - x28; - x31[92] = x929; - FpExt x930 = x583 + poly_mix[1] * x929; - FpExt x931 = x930 + poly_mix[2] * x534; - FpExt x932 = x931 + poly_mix[3] * x604; - FpExt x933 = x932 + poly_mix[4] * x607; - FpExt x934 = x933 + poly_mix[5] * x610; - FpExt x935 = x934 + poly_mix[6] * x613; - FpExt x936 = x935 + poly_mix[7] * x616; - FpExt x937 = x936 + poly_mix[8] * x619; - FpExt x938 = x937 + poly_mix[9] * x622; - FpExt x939 = x938 + poly_mix[10] * x625; - FpExt x940 = x939 + poly_mix[11] * x628; - FpExt x941 = x940 + poly_mix[12] * x631; - FpExt x942 = x941 + poly_mix[13] * x634; - FpExt x943 = x942 + poly_mix[14] * x637; - FpExt x944 = x943 + poly_mix[15] * x640; - FpExt x945 = x944 + poly_mix[16] * x643; - FpExt x946 = x945 + poly_mix[17] * x646; - FpExt x947 = x946 + poly_mix[18] * x649; - FpExt x948 = x947 + poly_mix[19] * x681; - FpExt x949 = x948 + poly_mix[20] * x684; - FpExt x950 = x949 + poly_mix[21] * x687; - FpExt x951 = x950 + poly_mix[22] * x690; - FpExt x952 = x951 + poly_mix[23] * x693; - FpExt x953 = x952 + poly_mix[24] * x696; - FpExt x954 = x953 + poly_mix[25] * x699; - FpExt x955 = x954 + poly_mix[26] * x702; - FpExt x956 = x955 + poly_mix[27] * x705; - FpExt x957 = x956 + poly_mix[28] * x708; - FpExt x958 = x957 + poly_mix[29] * x711; - FpExt x959 = x958 + poly_mix[30] * x714; - FpExt x960 = x959 + poly_mix[31] * x717; - FpExt x961 = x960 + poly_mix[32] * x720; - FpExt x962 = x961 + poly_mix[33] * x723; - FpExt x963 = x962 + poly_mix[34] * x726; - FpExt x964 = x963 + poly_mix[35] * x729; - FpExt x965 = x964 + poly_mix[36] * x761; - FpExt x966 = x965 + poly_mix[37] * x764; - FpExt x967 = x966 + poly_mix[38] * x767; - FpExt x968 = x967 + poly_mix[39] * x770; - FpExt x969 = x968 + poly_mix[40] * x773; - FpExt x970 = x969 + poly_mix[41] * x776; - FpExt x971 = x970 + poly_mix[42] * x779; - FpExt x972 = x971 + poly_mix[43] * x782; - FpExt x973 = x972 + poly_mix[44] * x785; - FpExt x974 = x973 + poly_mix[45] * x788; - FpExt x975 = x974 + poly_mix[46] * x791; - FpExt x976 = x975 + poly_mix[47] * x794; - FpExt x977 = x976 + poly_mix[48] * x797; - FpExt x978 = x977 + poly_mix[49] * x800; - FpExt x979 = x978 + poly_mix[50] * x803; - FpExt x980 = x979 + poly_mix[51] * x806; - FpExt x981 = x980 + poly_mix[52] * x809; - FpExt x982 = x981 + poly_mix[53] * x841; - FpExt x983 = x982 + poly_mix[54] * x844; - FpExt x984 = x983 + poly_mix[55] * x847; - FpExt x985 = x984 + poly_mix[56] * x850; - FpExt x986 = x985 + poly_mix[57] * x853; - FpExt x987 = x986 + poly_mix[58] * x856; - FpExt x988 = x987 + poly_mix[59] * x859; - FpExt x989 = x988 + poly_mix[60] * x862; - FpExt x990 = x989 + poly_mix[61] * x865; - FpExt x991 = x990 + poly_mix[62] * x868; - FpExt x992 = x991 + poly_mix[63] * x871; - FpExt x993 = x992 + poly_mix[64] * x874; - FpExt x994 = x993 + poly_mix[65] * x877; - FpExt x995 = x994 + poly_mix[66] * x880; - FpExt x996 = x995 + poly_mix[67] * x883; - FpExt x997 = x996 + poly_mix[68] * x886; - FpExt x998 = x997 + poly_mix[69] * x889; - FpExt x999 = x998 + poly_mix[70] * x921; - FpExt x1000 = x999 + poly_mix[71] * x115; - FpExt x1001 = x1000 + poly_mix[72] * x116; - FpExt x1002 = x1001 + poly_mix[73] * x117; - FpExt x1003 = x1002 + poly_mix[74] * x118; - FpExt x1004 = x1003 + poly_mix[75] * x119; - FpExt x1005 = x928 + x44 * x1004 * poly_mix[151]; - Fp x1006 = x536 - x29; - x31[93] = x1006; - FpExt x1007 = x583 + poly_mix[1] * x1006; - FpExt x1008 = x1007 + poly_mix[2] * x534; - FpExt x1009 = x1008 + poly_mix[3] * x604; - FpExt x1010 = x1009 + poly_mix[4] * x607; - FpExt x1011 = x1010 + poly_mix[5] * x610; - FpExt x1012 = x1011 + poly_mix[6] * x613; - FpExt x1013 = x1012 + poly_mix[7] * x616; - FpExt x1014 = x1013 + poly_mix[8] * x619; - FpExt x1015 = x1014 + poly_mix[9] * x622; - FpExt x1016 = x1015 + poly_mix[10] * x625; - FpExt x1017 = x1016 + poly_mix[11] * x628; - FpExt x1018 = x1017 + poly_mix[12] * x631; - FpExt x1019 = x1018 + poly_mix[13] * x634; - FpExt x1020 = x1019 + poly_mix[14] * x637; - FpExt x1021 = x1020 + poly_mix[15] * x640; - FpExt x1022 = x1021 + poly_mix[16] * x643; - FpExt x1023 = x1022 + poly_mix[17] * x646; - FpExt x1024 = x1023 + poly_mix[18] * x649; - FpExt x1025 = x1024 + poly_mix[19] * x681; - FpExt x1026 = x1025 + poly_mix[20] * x684; - FpExt x1027 = x1026 + poly_mix[21] * x687; - FpExt x1028 = x1027 + poly_mix[22] * x690; - FpExt x1029 = x1028 + poly_mix[23] * x693; - FpExt x1030 = x1029 + poly_mix[24] * x696; - FpExt x1031 = x1030 + poly_mix[25] * x699; - FpExt x1032 = x1031 + poly_mix[26] * x702; - FpExt x1033 = x1032 + poly_mix[27] * x705; - FpExt x1034 = x1033 + poly_mix[28] * x708; - FpExt x1035 = x1034 + poly_mix[29] * x711; - FpExt x1036 = x1035 + poly_mix[30] * x714; - FpExt x1037 = x1036 + poly_mix[31] * x717; - FpExt x1038 = x1037 + poly_mix[32] * x720; - FpExt x1039 = x1038 + poly_mix[33] * x723; - FpExt x1040 = x1039 + poly_mix[34] * x726; - FpExt x1041 = x1040 + poly_mix[35] * x729; - FpExt x1042 = x1041 + poly_mix[36] * x761; - FpExt x1043 = x1042 + poly_mix[37] * x764; - FpExt x1044 = x1043 + poly_mix[38] * x767; - FpExt x1045 = x1044 + poly_mix[39] * x770; - FpExt x1046 = x1045 + poly_mix[40] * x773; - FpExt x1047 = x1046 + poly_mix[41] * x776; - FpExt x1048 = x1047 + poly_mix[42] * x779; - FpExt x1049 = x1048 + poly_mix[43] * x782; - FpExt x1050 = x1049 + poly_mix[44] * x785; - FpExt x1051 = x1050 + poly_mix[45] * x788; - FpExt x1052 = x1051 + poly_mix[46] * x791; - FpExt x1053 = x1052 + poly_mix[47] * x794; - FpExt x1054 = x1053 + poly_mix[48] * x797; - FpExt x1055 = x1054 + poly_mix[49] * x800; - FpExt x1056 = x1055 + poly_mix[50] * x803; - FpExt x1057 = x1056 + poly_mix[51] * x806; - FpExt x1058 = x1057 + poly_mix[52] * x809; - FpExt x1059 = x1058 + poly_mix[53] * x841; - FpExt x1060 = x1059 + poly_mix[54] * x844; - FpExt x1061 = x1060 + poly_mix[55] * x847; - FpExt x1062 = x1061 + poly_mix[56] * x850; - FpExt x1063 = x1062 + poly_mix[57] * x853; - FpExt x1064 = x1063 + poly_mix[58] * x856; - FpExt x1065 = x1064 + poly_mix[59] * x859; - FpExt x1066 = x1065 + poly_mix[60] * x862; - FpExt x1067 = x1066 + poly_mix[61] * x865; - FpExt x1068 = x1067 + poly_mix[62] * x868; - FpExt x1069 = x1068 + poly_mix[63] * x871; - FpExt x1070 = x1069 + poly_mix[64] * x874; - FpExt x1071 = x1070 + poly_mix[65] * x877; - FpExt x1072 = x1071 + poly_mix[66] * x880; - FpExt x1073 = x1072 + poly_mix[67] * x883; - FpExt x1074 = x1073 + poly_mix[68] * x886; - FpExt x1075 = x1074 + poly_mix[69] * x889; - FpExt x1076 = x1075 + poly_mix[70] * x921; - FpExt x1077 = x1076 + poly_mix[71] * x115; - FpExt x1078 = x1077 + poly_mix[72] * x116; - FpExt x1079 = x1078 + poly_mix[73] * x117; - FpExt x1080 = x1079 + poly_mix[74] * x118; - FpExt x1081 = x1080 + poly_mix[75] * x119; - FpExt x1082 = x1005 + x45 * x1081 * poly_mix[204]; - Fp x1083 = x536 - x24; - x31[96] = x1083; - Fp x1084 = x100 + x0; - x31[94] = x1084; - Fp x1085 = x1084 - x111; - x31[15] = x1085; - Fp x1086 = x101 + x16; - x31[95] = x1086; - Fp x1087 = x1086 - x112; - x31[17] = x1087; - FpExt x1088 = x583 + poly_mix[1] * x1083; - FpExt x1089 = x1088 + poly_mix[2] * x534; - Fp x1090 = x115 - x30; - x31[10] = x1090; - FpExt x1091 = x1089 + poly_mix[3] * x1090; - FpExt x1092 = x1091 + poly_mix[4] * x604; - Fp x1093 = x120 * x0; - x31[218] = x1093; - Fp x1094 = x1093 + x184; - x31[97] = x1094; - Fp x1095 = x1085 - x1094; - x31[12] = x1095; - FpExt x1096 = x1092 + poly_mix[5] * x1095; - Fp x1097 = x1087 + x120; - x31[0] = x1097; - Fp x1098 = x116 - x30; - x31[13] = x1098; - FpExt x1099 = x1096 + poly_mix[6] * x1098; - FpExt x1100 = x1099 + poly_mix[7] * x607; - Fp x1101 = x121 * x0; - Fp x1102 = x1101 + x185; - x31[1] = x1102; - auto x1103 = rv32im_v2_12( - idx, size, x31, x1100, x1082, x583, x186, x305, x581, x348, x187, x32, data, accum, mix, out); - - return x1103; -} - -} // namespace risc0::circuit::rv32im_v2::cuda diff --git a/risc0/circuit/rv32im-v2-sys/kernels/cuda/eval_check_2.cu b/risc0/circuit/rv32im-v2-sys/kernels/cuda/eval_check_2.cu deleted file mode 100644 index dfb3bb71..00000000 --- a/risc0/circuit/rv32im-v2-sys/kernels/cuda/eval_check_2.cu +++ /dev/null @@ -1,3628 +0,0 @@ -// This code is automatically generated - -#include "supra/fp.h" - -#include "eval_check.cuh" - -#include - -namespace risc0::circuit::rv32im_v2::cuda { - -__device__ FpExt rv32im_v2_10(uint32_t idx, - uint32_t size, - Fp* arg0, - FpExt arg1, - FpExt arg2, - FpExt arg3, - FpExt arg4, - FpExt arg5, - FpExt arg6, - FpExt arg7, - FpExt arg8, - FpExt arg9, - FpExt arg10, - FpExt arg11, - FpExt* arg12, - FpExt arg13, - const Fp* arg14, - const Fp* arg15, - const Fp* arg16, - const Fp* arg17) { - uint32_t mask = size - 1; - Fp x0(3); - Fp x1(0); - Fp x2(2013265920); - Fp x3(64); - Fp x4(7); - Fp x5(6); - Fp x6(19); - Fp x7(32); - Fp x8(65535); - Fp x9(2013235201); - Fp x10(131070); - Fp x11(131072); - Fp x12(65536); - Fp x13(16777216); - Fp x14(1); - Fp x15(1006632961); - Fp x16(32768); - Fp x17(128); - Fp x18(256); - Fp x19(16); - Fp x20(8); - Fp x21(4); - Fp x22(2); - Fp x23 = arg14[128 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x24 = arg14[129 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x25 = arg14[130 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x26 = arg14[131 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x27 = arg14[127 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x28 = arg14[122 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x29 = arg14[132 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x30 = arg14[133 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x31 = arg14[134 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x32 = arg14[48 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x33 = arg14[46 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x34 = arg14[135 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x35 = arg14[54 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x36 = arg14[50 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x37 = arg14[137 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x38 = arg14[136 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x39 = arg14[52 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x40 = arg14[58 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x41 = arg14[56 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x42 = arg14[64 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x43 = arg14[60 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x44 = arg14[138 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x45 = arg14[62 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x46 = arg14[139 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x47 = arg14[32 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x48 = arg14[30 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x49 = arg14[65 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x50 = arg14[141 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x51 = arg14[140 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x52 = arg14[66 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x53 = arg14[36 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x54 = arg14[67 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x55 = arg14[143 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x56 = arg14[142 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x57 = arg14[68 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x58 = arg14[38 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x59 = arg14[69 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x60 = arg14[145 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x61 = arg14[144 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x62 = arg14[70 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x63 = arg14[40 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x64 = arg14[42 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x65 = arg14[147 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x66 = arg14[146 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x67 = arg14[111 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x68 = arg14[112 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x69 = arg14[148 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x70 = arg14[43 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x71 = arg14[19 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x72 = arg14[34 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x73 = arg14[44 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x74 = arg14[149 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x75 = arg14[20 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x76 = arg14[86 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x77 = arg14[21 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x78 = arg14[22 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x79 = arg14[123 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x80 = arg14[28 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x81 = arg14[41 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x82 = arg14[23 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x83 = arg14[24 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x84 = arg14[25 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x85 = arg14[26 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x86 = arg14[135 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x87 = arg14[136 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x88 = arg14[127 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x89 = arg14[28 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x90 = arg14[137 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x91 = arg14[128 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x92 = arg14[30 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x93 = arg14[151 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x94 = arg14[150 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x95 = arg14[152 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x96 = arg14[154 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x97 = arg14[158 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x98 = arg14[153 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x99 = arg14[0 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x100 = arg14[155 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x101 = arg14[161 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x102 = arg14[162 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x103 = arg14[159 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x104 = arg14[160 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x105 = arg14[163 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x106 = arg14[165 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x107 = arg14[164 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x108 = arg14[166 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x109 = arg14[168 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x110 = arg14[167 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x111 = arg14[5 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x112 = arg14[53 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x113 = arg14[57 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x114 = arg14[63 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x115 = arg14[61 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x116 = arg14[59 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x117 = arg14[33 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x118 = arg14[35 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x119 = arg14[37 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x120 = arg0[34]; - FpExt x121 = arg1 + poly_mix[4] * x120; - Fp x122 = arg0[35]; - FpExt x123 = x121 + poly_mix[5] * x122; - Fp x124 = arg0[36]; - FpExt x125 = x123 + poly_mix[6] * x124; - Fp x126 = arg0[37]; - FpExt x127 = x125 + poly_mix[7] * x126; - Fp x128 = x23 * x22; - Fp x129 = x24 * x21; - Fp x130 = x25 * x20; - Fp x131 = x26 * x19; - Fp x132 = x27 + x128; - Fp x133 = x132 + x129; - Fp x134 = x133 + x130; - Fp x135 = x134 + x131; - Fp x136 = arg0[10]; - FpExt x137 = x127 + poly_mix[8] * x136; - Fp x138 = arg0[160]; - Fp x139 = x138 + x135; - Fp x140 = x139 - x28; - FpExt x141 = x137 + poly_mix[9] * x140; - Fp x142 = arg0[161]; - Fp x143 = arg0[162]; - Fp x144 = x142 + x143; - Fp x145 = x23 * x144; - Fp x146 = x145 * x21; - Fp x147 = arg0[163]; - Fp x148 = x147 * x144; - Fp x149 = x146 + x148; - Fp x150 = x24 * x149; - Fp x151 = x150 * x19; - Fp x152 = arg0[164]; - Fp x153 = x152 * x149; - Fp x154 = x151 + x153; - Fp x155 = x154 - x29; - FpExt x156 = x141 + poly_mix[10] * x155; - Fp x157 = x25 * x29; - Fp x158 = x157 * x18; - Fp x159 = arg0[165]; - Fp x160 = x159 * x29; - Fp x161 = x158 + x160; - Fp x162 = arg0[166]; - Fp x163 = x162 * x161; - Fp x164 = x163 - x30; - FpExt x165 = x156 + poly_mix[11] * x164; - Fp x166 = x26 * x161; - Fp x167 = x166 - x31; - FpExt x168 = x165 + poly_mix[12] * x167; - Fp x169 = arg0[13]; - FpExt x170 = x168 + poly_mix[13] * x169; - Fp x171 = arg0[146]; - FpExt x172 = x170 + poly_mix[14] * x171; - Fp x173 = arg0[167]; - FpExt x174 = x172 + poly_mix[15] * x173; - Fp x175 = arg0[168]; - FpExt x176 = x174 + poly_mix[16] * x175; - Fp x177 = arg0[169]; - FpExt x178 = x176 + poly_mix[17] * x177; - Fp x179 = arg0[170]; - FpExt x180 = x178 + poly_mix[18] * x179; - Fp x181 = arg0[171]; - FpExt x182 = x180 + poly_mix[19] * x181; - Fp x183 = arg0[44]; - FpExt x184 = x182 + poly_mix[20] * x183; - Fp x185 = x32 * x18; - arg0[228] = x185; - Fp x186 = x33 + x185; - Fp x187 = x34 - x186; - FpExt x188 = x184 + poly_mix[21] * x187; - Fp x189 = x35 * x17; - Fp x190 = x36 + x189; - Fp x191 = x37 * x16; - Fp x192 = x190 + x191; - Fp x193 = x38 - x192; - FpExt x194 = x188 + poly_mix[22] * x193; - Fp x195 = x35 * x15; - Fp x196 = x37 * x17; - Fp x197 = x195 + x196; - Fp x198 = x39 - x197; - FpExt x199 = x194 + poly_mix[23] * x198; - Fp x200 = arg0[172]; - FpExt x201 = x199 + poly_mix[24] * x200; - Fp x202 = arg0[145]; - FpExt x203 = x201 + poly_mix[25] * x202; - Fp x204 = arg0[173]; - FpExt x205 = x203 + poly_mix[26] * x204; - Fp x206 = arg0[174]; - FpExt x207 = x205 + poly_mix[27] * x206; - Fp x208 = arg0[175]; - FpExt x209 = x207 + poly_mix[28] * x208; - Fp x210 = arg0[45]; - FpExt x211 = x209 + poly_mix[29] * x210; - Fp x212 = x40 * x18; - Fp x213 = x41 + x212; - Fp x214 = x30 - x213; - FpExt x215 = x211 + poly_mix[30] * x214; - Fp x216 = x42 * x17; - Fp x217 = x43 + x216; - Fp x218 = x44 * x16; - Fp x219 = x217 + x218; - Fp x220 = x31 - x219; - FpExt x221 = x215 + poly_mix[31] * x220; - Fp x222 = x42 * x15; - Fp x223 = x44 * x17; - Fp x224 = x222 + x223; - Fp x225 = x45 - x224; - FpExt x226 = x221 + poly_mix[32] * x225; - Fp x227 = arg0[46]; - FpExt x228 = x226 + poly_mix[33] * x227; - Fp x229 = arg0[147]; - FpExt x230 = x228 + poly_mix[34] * x229; - Fp x231 = x46 * x16; - Fp x232 = arg0[176]; - Fp x233 = x231 + x232; - Fp x234 = x47 - x233; - FpExt x235 = x230 + poly_mix[35] * x234; - Fp x236 = arg0[177]; - Fp x237 = x48 + x236; - Fp x238 = x33 * x40; - Fp x239 = x32 * x41; - Fp x240 = x238 + x239; - Fp x241 = x240 * x18; - Fp x242 = x237 + x241; - Fp x243 = arg0[149]; - FpExt x244 = x235 + poly_mix[36] * x243; - Fp x245 = x49 - x14; - arg0[316] = x245; - FpExt x246 = x244 + poly_mix[37] * x245; - Fp x247 = arg0[47]; - FpExt x248 = x246 + poly_mix[38] * x247; - Fp x249 = arg0[48]; - FpExt x250 = x248 + poly_mix[39] * x249; - Fp x251 = x50 * x22; - Fp x252 = x251 + x51; - Fp x253 = x252 * x13; - Fp x254 = x52 * x12; - Fp x255 = x253 + x254; - Fp x256 = x255 + x53; - Fp x257 = x242 - x256; - FpExt x258 = x250 + poly_mix[40] * x257; - Fp x259 = x252 * x18; - Fp x260 = x259 + x52; - Fp x261 = x47 + x260; - Fp x262 = x33 * x43; - Fp x263 = x261 + x262; - Fp x264 = x32 * x40; - Fp x265 = x263 + x264; - Fp x266 = x36 * x41; - Fp x267 = x265 + x266; - Fp x268 = x33 * x45; - Fp x269 = x32 * x43; - Fp x270 = x268 + x269; - Fp x271 = x36 * x40; - Fp x272 = x270 + x271; - Fp x273 = x39 * x41; - Fp x274 = x272 + x273; - Fp x275 = x274 * x18; - Fp x276 = x267 + x275; - Fp x277 = arg0[150]; - FpExt x278 = x258 + poly_mix[41] * x277; - Fp x279 = x54 - x14; - arg0[219] = x279; - FpExt x280 = x278 + poly_mix[42] * x279; - Fp x281 = arg0[49]; - FpExt x282 = x280 + poly_mix[43] * x281; - Fp x283 = arg0[50]; - FpExt x284 = x282 + poly_mix[44] * x283; - Fp x285 = x55 * x22; - Fp x286 = x285 + x56; - Fp x287 = x286 * x13; - Fp x288 = x57 * x12; - Fp x289 = x287 + x288; - Fp x290 = x289 + x58; - Fp x291 = x276 - x290; - FpExt x292 = x284 + poly_mix[45] * x291; - Fp x293 = x286 * x18; - Fp x294 = x293 + x57; - Fp x295 = x294 + x11; - Fp x296 = x32 * x45; - Fp x297 = x295 + x296; - Fp x298 = x36 * x43; - Fp x299 = x297 + x298; - Fp x300 = x39 * x40; - Fp x301 = x299 + x300; - Fp x302 = x36 * x45; - Fp x303 = x39 * x43; - Fp x304 = x302 + x303; - Fp x305 = x304 * x18; - Fp x306 = x301 + x305; - Fp x307 = arg0[178]; - FpExt x308 = x292 + poly_mix[46] * x307; - Fp x309 = x59 - x14; - arg0[315] = x309; - FpExt x310 = x308 + poly_mix[47] * x309; - Fp x311 = arg0[51]; - FpExt x312 = x310 + poly_mix[48] * x311; - Fp x313 = arg0[52]; - FpExt x314 = x312 + poly_mix[49] * x313; - Fp x315 = x60 * x22; - Fp x316 = x315 + x61; - Fp x317 = x316 * x13; - Fp x318 = x62 * x12; - Fp x319 = x317 + x318; - Fp x320 = x319 + x63; - Fp x321 = x306 - x320; - FpExt x322 = x314 + poly_mix[50] * x321; - Fp x323 = x316 * x18; - Fp x324 = x323 + x62; - Fp x325 = x324 + x10; - Fp x326 = x39 * x45; - Fp x327 = x325 + x326; - Fp x328 = arg0[179]; - FpExt x329 = x322 + poly_mix[51] * x328; - Fp x330 = x327 - x64; - Fp x331 = x330 * x9; - Fp x332 = arg0[53]; - FpExt x333 = x329 + poly_mix[52] * x332; - Fp x334 = arg0[54]; - FpExt x335 = x333 + poly_mix[53] * x334; - Fp x336 = x65 * x22; - Fp x337 = x336 + x66; - Fp x338 = x331 - x337; - FpExt x339 = x335 + poly_mix[54] * x338; - Fp x340 = x53 - x67; - FpExt x341 = x339 + poly_mix[55] * x340; - Fp x342 = x58 - x68; - FpExt x343 = x341 + poly_mix[56] * x342; - Fp x344 = arg0[55]; - FpExt x345 = x343 + poly_mix[57] * x344; - Fp x346 = x69 * x8; - Fp x347 = x63 - x346; - FpExt x348 = x345 + poly_mix[58] * x347; - Fp x349 = x64 - x346; - FpExt x350 = x348 + poly_mix[59] * x349; - FpExt x351 = x350 + poly_mix[60] * x70; - FpExt x352 = arg2 + x71 * x351 * poly_mix[59]; - Fp x353 = arg0[180]; - Fp x354 = x353 - x7; - Fp x355 = x8 - x67; - Fp x356 = x8 - x68; - FpExt x357 = arg3 + poly_mix[2] * x354; - Fp x358 = arg0[33]; - FpExt x359 = x357 + poly_mix[3] * x358; - FpExt x360 = x359 + poly_mix[4] * x120; - FpExt x361 = x360 + poly_mix[5] * x122; - FpExt x362 = x361 + poly_mix[6] * x124; - FpExt x363 = x362 + poly_mix[7] * x126; - FpExt x364 = x363 + poly_mix[8] * x136; - FpExt x365 = x364 + poly_mix[9] * x140; - FpExt x366 = x365 + poly_mix[10] * x155; - FpExt x367 = x366 + poly_mix[11] * x164; - FpExt x368 = x367 + poly_mix[12] * x167; - Fp x369 = arg0[42]; - FpExt x370 = x368 + poly_mix[13] * x369; - FpExt x371 = x370 + poly_mix[14] * x169; - Fp x372 = x34 * x16; - Fp x373 = arg0[181]; - Fp x374 = x373 + x372; - Fp x375 = x68 - x374; - FpExt x376 = x371 + poly_mix[15] * x375; - Fp x377 = x34 * x355; - Fp x378 = arg0[182]; - Fp x379 = x378 * x67; - Fp x380 = x377 + x379; - Fp x381 = x34 * x356; - Fp x382 = x378 * x68; - Fp x383 = x381 + x382; - FpExt x384 = x376 + poly_mix[16] * x171; - FpExt x385 = x384 + poly_mix[17] * x229; - FpExt x386 = x385 + poly_mix[18] * x173; - FpExt x387 = x386 + poly_mix[19] * x175; - FpExt x388 = x387 + poly_mix[20] * x177; - FpExt x389 = x388 + poly_mix[21] * x179; - FpExt x390 = x389 + poly_mix[22] * x181; - FpExt x391 = x390 + poly_mix[23] * x210; - Fp x392 = x38 - x186; - FpExt x393 = x391 + poly_mix[24] * x392; - Fp x394 = x190 + x218; - Fp x395 = x37 - x394; - FpExt x396 = x393 + poly_mix[25] * x395; - Fp x397 = x195 + x223; - Fp x398 = x39 - x397; - FpExt x399 = x396 + poly_mix[26] * x398; - FpExt x400 = x399 + poly_mix[27] * x200; - FpExt x401 = x400 + poly_mix[28] * x202; - FpExt x402 = x401 + poly_mix[29] * x204; - FpExt x403 = x402 + poly_mix[30] * x206; - FpExt x404 = x403 + poly_mix[31] * x208; - FpExt x405 = x404 + poly_mix[32] * x227; - FpExt x406 = x405 + poly_mix[33] * x214; - Fp x407 = x217 + x231; - Fp x408 = x31 - x407; - FpExt x409 = x406 + poly_mix[34] * x408; - Fp x410 = x46 * x17; - Fp x411 = x222 + x410; - Fp x412 = x45 - x411; - FpExt x413 = x409 + poly_mix[35] * x412; - FpExt x414 = x413 + poly_mix[36] * x247; - FpExt x415 = x414 + poly_mix[37] * x243; - Fp x416 = x51 * x16; - Fp x417 = arg0[183]; - Fp x418 = x416 + x417; - Fp x419 = x72 - x418; - FpExt x420 = x415 + poly_mix[38] * x419; - Fp x421 = x47 + x236; - Fp x422 = x421 + x241; - FpExt x423 = x420 + poly_mix[39] * x277; - FpExt x424 = x423 + poly_mix[40] * x245; - FpExt x425 = x424 + poly_mix[41] * x249; - FpExt x426 = x425 + poly_mix[42] * x281; - Fp x427 = x56 * x22; - Fp x428 = x427 + x50; - Fp x429 = x428 * x13; - Fp x430 = x429 + x254; - Fp x431 = x430 + x58; - Fp x432 = x422 - x431; - FpExt x433 = x426 + poly_mix[43] * x432; - Fp x434 = x428 * x18; - Fp x435 = x434 + x52; - Fp x436 = x72 + x435; - Fp x437 = x436 + x262; - Fp x438 = x437 + x264; - Fp x439 = x438 + x266; - Fp x440 = x439 + x275; - FpExt x441 = x433 + poly_mix[44] * x307; - FpExt x442 = x441 + poly_mix[45] * x279; - FpExt x443 = x442 + poly_mix[46] * x283; - FpExt x444 = x443 + poly_mix[47] * x311; - Fp x445 = x61 * x22; - Fp x446 = x445 + x55; - Fp x447 = x446 * x13; - Fp x448 = x447 + x288; - Fp x449 = x448 + x63; - Fp x450 = x440 - x449; - FpExt x451 = x444 + poly_mix[48] * x450; - Fp x452 = x446 * x18; - Fp x453 = x452 + x57; - Fp x454 = x453 + x11; - Fp x455 = x454 + x296; - Fp x456 = x455 + x298; - Fp x457 = x456 + x300; - Fp x458 = x457 + x305; - FpExt x459 = x451 + poly_mix[49] * x328; - FpExt x460 = x459 + poly_mix[50] * x309; - FpExt x461 = x460 + poly_mix[51] * x313; - FpExt x462 = x461 + poly_mix[52] * x332; - Fp x463 = x66 * x22; - Fp x464 = x463 + x60; - Fp x465 = x464 * x13; - Fp x466 = x465 + x318; - Fp x467 = x466 + x64; - Fp x468 = x458 - x467; - FpExt x469 = x462 + poly_mix[53] * x468; - Fp x470 = x464 * x18; - Fp x471 = x470 + x62; - Fp x472 = x471 + x10; - Fp x473 = x472 + x326; - Fp x474 = arg0[144]; - FpExt x475 = x469 + poly_mix[54] * x474; - Fp x476 = x473 - x73; - Fp x477 = x476 * x9; - FpExt x478 = x475 + poly_mix[55] * x334; - FpExt x479 = x478 + poly_mix[56] * x344; - Fp x480 = x69 * x22; - Fp x481 = x480 + x65; - Fp x482 = x477 - x481; - FpExt x483 = x479 + poly_mix[57] * x482; - Fp x484 = x58 - x380; - FpExt x485 = x483 + poly_mix[58] * x484; - Fp x486 = x63 - x383; - FpExt x487 = x485 + poly_mix[59] * x486; - Fp x488 = arg0[56]; - FpExt x489 = x487 + poly_mix[60] * x488; - Fp x490 = x74 * x8; - Fp x491 = x64 - x490; - FpExt x492 = x489 + poly_mix[61] * x491; - Fp x493 = x73 - x490; - FpExt x494 = x492 + poly_mix[62] * x493; - FpExt x495 = x352 + x75 * x494 * poly_mix[120]; - Fp x496 = x76 - x6; - FpExt x497 = arg4 + poly_mix[0] * x496; - Fp x498 = arg0[184]; - FpExt x499 = x497 + poly_mix[1] * x498; - FpExt x500 = x499 + poly_mix[2] * x353; - FpExt x501 = x500 + poly_mix[3] * x358; - FpExt x502 = x501 + poly_mix[4] * x120; - FpExt x503 = x502 + poly_mix[5] * x122; - FpExt x504 = x503 + poly_mix[6] * x124; - FpExt x505 = x504 + poly_mix[7] * x126; - FpExt x506 = x505 + poly_mix[8] * x136; - Fp x507 = arg0[185]; - Fp x508 = x139 - x507; - FpExt x509 = x506 + poly_mix[9] * x508; - FpExt x510 = x509 + poly_mix[10] * x155; - FpExt x511 = x510 + poly_mix[11] * x164; - FpExt x512 = x511 + poly_mix[12] * x167; - FpExt x513 = x512 + poly_mix[13] * x169; - FpExt x514 = x513 + poly_mix[14] * x171; - FpExt x515 = x514 + poly_mix[15] * x173; - FpExt x516 = x515 + poly_mix[16] * x175; - FpExt x517 = x516 + poly_mix[17] * x177; - FpExt x518 = x517 + poly_mix[18] * x179; - FpExt x519 = x518 + poly_mix[19] * x181; - FpExt x520 = x519 + poly_mix[20] * x183; - FpExt x521 = x520 + poly_mix[21] * x187; - FpExt x522 = x521 + poly_mix[22] * x193; - FpExt x523 = x522 + poly_mix[23] * x198; - FpExt x524 = x523 + poly_mix[24] * x200; - FpExt x525 = x524 + poly_mix[25] * x202; - FpExt x526 = x525 + poly_mix[26] * x204; - FpExt x527 = x526 + poly_mix[27] * x206; - FpExt x528 = x527 + poly_mix[28] * x208; - FpExt x529 = x528 + poly_mix[29] * x210; - FpExt x530 = x529 + poly_mix[30] * x214; - FpExt x531 = x530 + poly_mix[31] * x220; - FpExt x532 = x531 + poly_mix[32] * x225; - FpExt x533 = x532 + poly_mix[33] * x227; - FpExt x534 = x533 + poly_mix[34] * x229; - FpExt x535 = x534 + poly_mix[35] * x234; - FpExt x536 = x535 + poly_mix[36] * x243; - FpExt x537 = x536 + poly_mix[37] * x245; - FpExt x538 = x537 + poly_mix[38] * x247; - FpExt x539 = x538 + poly_mix[39] * x249; - FpExt x540 = x539 + poly_mix[40] * x257; - FpExt x541 = x540 + poly_mix[41] * x277; - FpExt x542 = x541 + poly_mix[42] * x279; - FpExt x543 = x542 + poly_mix[43] * x281; - FpExt x544 = x543 + poly_mix[44] * x283; - FpExt x545 = x544 + poly_mix[45] * x291; - FpExt x546 = x545 + poly_mix[46] * x307; - FpExt x547 = x546 + poly_mix[47] * x309; - FpExt x548 = x547 + poly_mix[48] * x311; - FpExt x549 = x548 + poly_mix[49] * x313; - FpExt x550 = x549 + poly_mix[50] * x321; - FpExt x551 = x550 + poly_mix[51] * x328; - FpExt x552 = x551 + poly_mix[52] * x332; - FpExt x553 = x552 + poly_mix[53] * x334; - FpExt x554 = x553 + poly_mix[54] * x338; - FpExt x555 = x554 + poly_mix[55] * x340; - FpExt x556 = x555 + poly_mix[56] * x342; - FpExt x557 = x556 + poly_mix[57] * x344; - FpExt x558 = x557 + poly_mix[58] * x347; - FpExt x559 = x558 + poly_mix[59] * x349; - FpExt x560 = x559 + poly_mix[60] * x70; - FpExt x561 = x495 + x77 * x560 * poly_mix[170]; - FpExt x562 = x499 + poly_mix[2] * x354; - FpExt x563 = x562 + poly_mix[3] * x358; - FpExt x564 = x563 + poly_mix[4] * x120; - FpExt x565 = x564 + poly_mix[5] * x122; - FpExt x566 = x565 + poly_mix[6] * x124; - FpExt x567 = x566 + poly_mix[7] * x126; - FpExt x568 = x567 + poly_mix[8] * x136; - FpExt x569 = x568 + poly_mix[9] * x508; - FpExt x570 = x569 + poly_mix[10] * x155; - FpExt x571 = x570 + poly_mix[11] * x164; - FpExt x572 = x571 + poly_mix[12] * x167; - FpExt x573 = x572 + poly_mix[13] * x369; - FpExt x574 = x573 + poly_mix[14] * x169; - FpExt x575 = x574 + poly_mix[15] * x375; - FpExt x576 = x575 + poly_mix[16] * x171; - FpExt x577 = x576 + poly_mix[17] * x229; - FpExt x578 = x577 + poly_mix[18] * x173; - FpExt x579 = x578 + poly_mix[19] * x175; - FpExt x580 = x579 + poly_mix[20] * x177; - FpExt x581 = x580 + poly_mix[21] * x179; - FpExt x582 = x581 + poly_mix[22] * x181; - FpExt x583 = x582 + poly_mix[23] * x210; - FpExt x584 = x583 + poly_mix[24] * x392; - FpExt x585 = x584 + poly_mix[25] * x395; - FpExt x586 = x585 + poly_mix[26] * x398; - FpExt x587 = x586 + poly_mix[27] * x200; - FpExt x588 = x587 + poly_mix[28] * x202; - FpExt x589 = x588 + poly_mix[29] * x204; - FpExt x590 = x589 + poly_mix[30] * x206; - FpExt x591 = x590 + poly_mix[31] * x208; - FpExt x592 = x591 + poly_mix[32] * x227; - FpExt x593 = x592 + poly_mix[33] * x214; - FpExt x594 = x593 + poly_mix[34] * x408; - FpExt x595 = x594 + poly_mix[35] * x412; - FpExt x596 = x595 + poly_mix[36] * x247; - FpExt x597 = x596 + poly_mix[37] * x243; - FpExt x598 = x597 + poly_mix[38] * x419; - FpExt x599 = x598 + poly_mix[39] * x277; - FpExt x600 = x599 + poly_mix[40] * x245; - FpExt x601 = x600 + poly_mix[41] * x249; - FpExt x602 = x601 + poly_mix[42] * x281; - FpExt x603 = x602 + poly_mix[43] * x432; - FpExt x604 = x603 + poly_mix[44] * x307; - FpExt x605 = x604 + poly_mix[45] * x279; - FpExt x606 = x605 + poly_mix[46] * x283; - FpExt x607 = x606 + poly_mix[47] * x311; - FpExt x608 = x607 + poly_mix[48] * x450; - FpExt x609 = x608 + poly_mix[49] * x328; - FpExt x610 = x609 + poly_mix[50] * x309; - FpExt x611 = x610 + poly_mix[51] * x313; - FpExt x612 = x611 + poly_mix[52] * x332; - FpExt x613 = x612 + poly_mix[53] * x468; - FpExt x614 = x613 + poly_mix[54] * x474; - FpExt x615 = x614 + poly_mix[55] * x334; - FpExt x616 = x615 + poly_mix[56] * x344; - FpExt x617 = x616 + poly_mix[57] * x482; - FpExt x618 = x617 + poly_mix[58] * x484; - FpExt x619 = x618 + poly_mix[59] * x486; - FpExt x620 = x619 + poly_mix[60] * x488; - FpExt x621 = x620 + poly_mix[61] * x491; - FpExt x622 = x621 + poly_mix[62] * x493; - FpExt x623 = x561 + x78 * x622 * poly_mix[219]; - Fp x624 = arg0[186]; - Fp x625 = x624 - x21; - Fp x626 = x353 - x14; - FpExt x627 = arg5 + poly_mix[1] * x625; - FpExt x628 = x627 + poly_mix[2] * x626; - FpExt x629 = x628 + poly_mix[3] * x136; - FpExt x630 = x629 + poly_mix[4] * x169; - FpExt x631 = x630 + poly_mix[5] * x173; - FpExt x632 = x631 + poly_mix[6] * x175; - FpExt x633 = x632 + poly_mix[7] * x177; - FpExt x634 = x633 + poly_mix[8] * x179; - FpExt x635 = x634 + poly_mix[9] * x181; - FpExt x636 = x635 + poly_mix[10] * x122; - Fp x637 = x27 - x186; - FpExt x638 = x636 + poly_mix[11] * x637; - Fp x639 = arg0[187]; - Fp x640 = x190 + x639; - Fp x641 = x23 - x640; - FpExt x642 = x638 + poly_mix[12] * x641; - Fp x643 = arg0[188]; - Fp x644 = x195 + x643; - Fp x645 = x39 - x644; - FpExt x646 = x642 + poly_mix[13] * x645; - FpExt x647 = x646 + poly_mix[14] * x200; - FpExt x648 = x647 + poly_mix[15] * x202; - FpExt x649 = x648 + poly_mix[16] * x204; - FpExt x650 = x649 + poly_mix[17] * x206; - FpExt x651 = x650 + poly_mix[18] * x208; - FpExt x652 = x651 + poly_mix[19] * x124; - Fp x653 = x28 - x213; - FpExt x654 = x652 + poly_mix[20] * x653; - Fp x655 = arg0[189]; - Fp x656 = x217 + x655; - Fp x657 = x79 - x656; - FpExt x658 = x654 + poly_mix[21] * x657; - Fp x659 = arg0[190]; - Fp x660 = x222 + x659; - Fp x661 = x45 - x660; - FpExt x662 = x658 + poly_mix[22] * x661; - FpExt x663 = x662 + poly_mix[23] * x126; - FpExt x664 = x663 + poly_mix[24] * x171; - Fp x665 = arg0[191]; - Fp x666 = arg0[192]; - Fp x667 = x665 + x666; - Fp x668 = x48 - x667; - FpExt x669 = x664 + poly_mix[25] * x668; - Fp x670 = x80 + x236; - Fp x671 = x670 + x241; - FpExt x672 = x669 + poly_mix[26] * x229; - FpExt x673 = x672 + poly_mix[27] * x245; - Fp x674 = arg0[38]; - FpExt x675 = x673 + poly_mix[28] * x674; - Fp x676 = arg0[39]; - FpExt x677 = x675 + poly_mix[29] * x676; - Fp x678 = arg0[193]; - Fp x679 = x678 + x254; - Fp x680 = x679 + x72; - Fp x681 = x671 - x680; - FpExt x682 = x677 + poly_mix[30] * x681; - Fp x683 = arg0[194]; - Fp x684 = x683 + x52; - Fp x685 = x48 + x684; - Fp x686 = x685 + x262; - Fp x687 = x686 + x264; - Fp x688 = x687 + x266; - Fp x689 = x688 + x275; - FpExt x690 = x682 + poly_mix[31] * x243; - FpExt x691 = x690 + poly_mix[32] * x279; - Fp x692 = arg0[41]; - FpExt x693 = x691 + poly_mix[33] * x692; - FpExt x694 = x693 + poly_mix[34] * x369; - Fp x695 = arg0[195]; - Fp x696 = x695 + x288; - Fp x697 = x696 + x53; - Fp x698 = x689 - x697; - FpExt x699 = x694 + poly_mix[35] * x698; - Fp x700 = arg0[196]; - Fp x701 = x700 + x57; - Fp x702 = x26 * x8; - Fp x703 = x701 + x702; - Fp x704 = x703 + x11; - Fp x705 = x186 * x25; - Fp x706 = x704 - x705; - Fp x707 = x213 * x24; - Fp x708 = x706 - x707; - Fp x709 = x708 + x296; - Fp x710 = x709 + x298; - Fp x711 = x710 + x300; - Fp x712 = x711 + x305; - FpExt x713 = x699 + poly_mix[36] * x277; - FpExt x714 = x713 + poly_mix[37] * x309; - Fp x715 = arg0[43]; - FpExt x716 = x714 + poly_mix[38] * x715; - FpExt x717 = x716 + poly_mix[39] * x183; - Fp x718 = arg0[197]; - Fp x719 = x718 + x318; - Fp x720 = x719 + x58; - Fp x721 = x712 - x720; - FpExt x722 = x717 + poly_mix[40] * x721; - Fp x723 = arg0[198]; - Fp x724 = x723 + x62; - Fp x725 = x724 + x702; - Fp x726 = x725 + x10; - Fp x727 = arg0[199]; - Fp x728 = x727 * x25; - Fp x729 = x726 - x728; - Fp x730 = x45 * x18; - Fp x731 = x43 + x730; - Fp x732 = x731 * x24; - Fp x733 = x729 - x732; - Fp x734 = x733 + x326; - FpExt x735 = x722 + poly_mix[41] * x307; - Fp x736 = x734 - x63; - Fp x737 = x736 * x9; - FpExt x738 = x735 + poly_mix[42] * x210; - FpExt x739 = x738 + poly_mix[43] * x227; - Fp x740 = arg0[200]; - Fp x741 = x737 - x740; - FpExt x742 = x739 + poly_mix[44] * x741; - Fp x743 = x72 - x67; - FpExt x744 = x742 + poly_mix[45] * x743; - Fp x745 = x53 - x68; - FpExt x746 = x744 + poly_mix[46] * x745; - FpExt x747 = x746 + poly_mix[47] * x247; - Fp x748 = x51 * x8; - Fp x749 = x58 - x748; - FpExt x750 = x747 + poly_mix[48] * x749; - Fp x751 = x63 - x748; - FpExt x752 = x750 + poly_mix[49] * x751; - FpExt x753 = x752 + poly_mix[50] * x81; - FpExt x754 = x753 + poly_mix[51] * x70; - FpExt x755 = x623 + x82 * x754 * poly_mix[265]; - FpExt x756 = arg3 + poly_mix[2] * x626; - FpExt x757 = x756 + poly_mix[3] * x136; - FpExt x758 = x757 + poly_mix[4] * x169; - FpExt x759 = x758 + poly_mix[5] * x173; - FpExt x760 = x759 + poly_mix[6] * x175; - FpExt x761 = x760 + poly_mix[7] * x177; - FpExt x762 = x761 + poly_mix[8] * x179; - FpExt x763 = x762 + poly_mix[9] * x181; - FpExt x764 = x763 + poly_mix[10] * x122; - FpExt x765 = x764 + poly_mix[11] * x637; - FpExt x766 = x765 + poly_mix[12] * x641; - FpExt x767 = x766 + poly_mix[13] * x645; - FpExt x768 = x767 + poly_mix[14] * x200; - FpExt x769 = x768 + poly_mix[15] * x202; - FpExt x770 = x769 + poly_mix[16] * x204; - FpExt x771 = x770 + poly_mix[17] * x206; - FpExt x772 = x771 + poly_mix[18] * x208; - FpExt x773 = x772 + poly_mix[19] * x124; - FpExt x774 = x773 + poly_mix[20] * x653; - FpExt x775 = x774 + poly_mix[21] * x657; - FpExt x776 = x775 + poly_mix[22] * x661; - FpExt x777 = x776 + poly_mix[23] * x126; - FpExt x778 = x777 + poly_mix[24] * x171; - FpExt x779 = x778 + poly_mix[25] * x668; - FpExt x780 = x779 + poly_mix[26] * x229; - FpExt x781 = x780 + poly_mix[27] * x245; - FpExt x782 = x781 + poly_mix[28] * x674; - FpExt x783 = x782 + poly_mix[29] * x676; - FpExt x784 = x783 + poly_mix[30] * x681; - FpExt x785 = x784 + poly_mix[31] * x243; - FpExt x786 = x785 + poly_mix[32] * x279; - FpExt x787 = x786 + poly_mix[33] * x692; - FpExt x788 = x787 + poly_mix[34] * x369; - FpExt x789 = x788 + poly_mix[35] * x698; - Fp x790 = x701 + x11; - Fp x791 = x790 + x296; - Fp x792 = x791 + x298; - Fp x793 = x792 + x300; - Fp x794 = x793 + x305; - FpExt x795 = x789 + poly_mix[36] * x277; - FpExt x796 = x795 + poly_mix[37] * x309; - FpExt x797 = x796 + poly_mix[38] * x715; - FpExt x798 = x797 + poly_mix[39] * x183; - Fp x799 = x794 - x720; - FpExt x800 = x798 + poly_mix[40] * x799; - Fp x801 = x724 + x10; - Fp x802 = x801 + x326; - FpExt x803 = x800 + poly_mix[41] * x307; - Fp x804 = x802 - x63; - Fp x805 = x804 * x9; - FpExt x806 = x803 + poly_mix[42] * x210; - FpExt x807 = x806 + poly_mix[43] * x227; - Fp x808 = x805 - x740; - FpExt x809 = x807 + poly_mix[44] * x808; - FpExt x810 = x809 + poly_mix[45] * x743; - FpExt x811 = x810 + poly_mix[46] * x745; - FpExt x812 = x811 + poly_mix[47] * x247; - FpExt x813 = x812 + poly_mix[48] * x749; - FpExt x814 = x813 + poly_mix[49] * x751; - FpExt x815 = x814 + poly_mix[50] * x81; - FpExt x816 = x815 + poly_mix[51] * x70; - FpExt x817 = x755 + x83 * x816 * poly_mix[294]; - Fp x818 = x624 - x5; - FpExt x819 = arg5 + poly_mix[1] * x818; - FpExt x820 = x819 + poly_mix[2] * x626; - FpExt x821 = x820 + poly_mix[3] * x136; - FpExt x822 = x821 + poly_mix[4] * x169; - FpExt x823 = x822 + poly_mix[5] * x173; - FpExt x824 = x823 + poly_mix[6] * x175; - FpExt x825 = x824 + poly_mix[7] * x177; - FpExt x826 = x825 + poly_mix[8] * x179; - FpExt x827 = x826 + poly_mix[9] * x181; - FpExt x828 = x827 + poly_mix[10] * x122; - FpExt x829 = x828 + poly_mix[11] * x637; - FpExt x830 = x829 + poly_mix[12] * x641; - FpExt x831 = x830 + poly_mix[13] * x645; - FpExt x832 = x831 + poly_mix[14] * x200; - FpExt x833 = x832 + poly_mix[15] * x202; - FpExt x834 = x833 + poly_mix[16] * x204; - FpExt x835 = x834 + poly_mix[17] * x206; - FpExt x836 = x835 + poly_mix[18] * x208; - FpExt x837 = x836 + poly_mix[19] * x124; - FpExt x838 = x837 + poly_mix[20] * x653; - FpExt x839 = x838 + poly_mix[21] * x657; - FpExt x840 = x839 + poly_mix[22] * x661; - FpExt x841 = x840 + poly_mix[23] * x126; - FpExt x842 = x841 + poly_mix[24] * x171; - FpExt x843 = x842 + poly_mix[25] * x668; - FpExt x844 = x843 + poly_mix[26] * x229; - FpExt x845 = x844 + poly_mix[27] * x245; - FpExt x846 = x845 + poly_mix[28] * x674; - FpExt x847 = x846 + poly_mix[29] * x676; - FpExt x848 = x847 + poly_mix[30] * x681; - FpExt x849 = x848 + poly_mix[31] * x243; - FpExt x850 = x849 + poly_mix[32] * x279; - FpExt x851 = x850 + poly_mix[33] * x692; - FpExt x852 = x851 + poly_mix[34] * x369; - FpExt x853 = x852 + poly_mix[35] * x698; - FpExt x854 = x853 + poly_mix[36] * x277; - FpExt x855 = x854 + poly_mix[37] * x309; - FpExt x856 = x855 + poly_mix[38] * x715; - FpExt x857 = x856 + poly_mix[39] * x183; - FpExt x858 = x857 + poly_mix[40] * x721; - FpExt x859 = x858 + poly_mix[41] * x307; - FpExt x860 = x859 + poly_mix[42] * x210; - FpExt x861 = x860 + poly_mix[43] * x227; - FpExt x862 = x861 + poly_mix[44] * x741; - FpExt x863 = x862 + poly_mix[45] * x743; - FpExt x864 = x863 + poly_mix[46] * x745; - FpExt x865 = x864 + poly_mix[47] * x247; - FpExt x866 = x865 + poly_mix[48] * x749; - FpExt x867 = x866 + poly_mix[49] * x751; - FpExt x868 = x867 + poly_mix[50] * x81; - FpExt x869 = x868 + poly_mix[51] * x70; - FpExt x870 = x817 + x84 * x869 * poly_mix[337]; - Fp x871 = x624 - x4; - FpExt x872 = arg5 + poly_mix[1] * x871; - FpExt x873 = x872 + poly_mix[2] * x626; - FpExt x874 = x873 + poly_mix[3] * x136; - FpExt x875 = x874 + poly_mix[4] * x169; - FpExt x876 = x875 + poly_mix[5] * x173; - FpExt x877 = x876 + poly_mix[6] * x175; - FpExt x878 = x877 + poly_mix[7] * x177; - FpExt x879 = x878 + poly_mix[8] * x179; - FpExt x880 = x879 + poly_mix[9] * x181; - FpExt x881 = x880 + poly_mix[10] * x122; - FpExt x882 = x881 + poly_mix[11] * x637; - FpExt x883 = x882 + poly_mix[12] * x641; - FpExt x884 = x883 + poly_mix[13] * x645; - FpExt x885 = x884 + poly_mix[14] * x200; - FpExt x886 = x885 + poly_mix[15] * x202; - FpExt x887 = x886 + poly_mix[16] * x204; - FpExt x888 = x887 + poly_mix[17] * x206; - FpExt x889 = x888 + poly_mix[18] * x208; - FpExt x890 = x889 + poly_mix[19] * x124; - FpExt x891 = x890 + poly_mix[20] * x653; - FpExt x892 = x891 + poly_mix[21] * x657; - FpExt x893 = x892 + poly_mix[22] * x661; - FpExt x894 = x893 + poly_mix[23] * x126; - FpExt x895 = x894 + poly_mix[24] * x171; - FpExt x896 = x895 + poly_mix[25] * x668; - FpExt x897 = x896 + poly_mix[26] * x229; - FpExt x898 = x897 + poly_mix[27] * x245; - FpExt x899 = x898 + poly_mix[28] * x674; - FpExt x900 = x899 + poly_mix[29] * x676; - FpExt x901 = x900 + poly_mix[30] * x681; - FpExt x902 = x901 + poly_mix[31] * x243; - FpExt x903 = x902 + poly_mix[32] * x279; - FpExt x904 = x903 + poly_mix[33] * x692; - FpExt x905 = x904 + poly_mix[34] * x369; - FpExt x906 = x905 + poly_mix[35] * x698; - FpExt x907 = x906 + poly_mix[36] * x277; - FpExt x908 = x907 + poly_mix[37] * x309; - FpExt x909 = x908 + poly_mix[38] * x715; - FpExt x910 = x909 + poly_mix[39] * x183; - FpExt x911 = x910 + poly_mix[40] * x799; - FpExt x912 = x911 + poly_mix[41] * x307; - FpExt x913 = x912 + poly_mix[42] * x210; - FpExt x914 = x913 + poly_mix[43] * x227; - FpExt x915 = x914 + poly_mix[44] * x808; - FpExt x916 = x915 + poly_mix[45] * x743; - FpExt x917 = x916 + poly_mix[46] * x745; - FpExt x918 = x917 + poly_mix[47] * x247; - FpExt x919 = x918 + poly_mix[48] * x749; - FpExt x920 = x919 + poly_mix[49] * x751; - FpExt x921 = x920 + poly_mix[50] * x81; - FpExt x922 = x921 + poly_mix[51] * x70; - FpExt x923 = x870 + x85 * x922 * poly_mix[339]; - Fp x924 = x86 * x71; - Fp x925 = x8 - x87; - Fp x926 = x86 * x925; - Fp x927 = x14 - x86; - Fp x928 = x927 * x87; - Fp x929 = x926 + x928; - Fp x930 = x929 * x75; - Fp x931 = x86 * x77; - Fp x932 = x929 * x78; - Fp x933 = x88 * x82; - Fp x934 = x88 * x83; - Fp x935 = x89 * x84; - Fp x936 = x89 * x85; - Fp x937 = x924 + x930; - Fp x938 = x937 + x931; - Fp x939 = x938 + x932; - Fp x940 = x939 + x933; - Fp x941 = x940 + x934; - Fp x942 = x941 + x935; - Fp x943 = x942 + x936; - Fp x944 = x87 * x71; - Fp x945 = x8 - x90; - Fp x946 = x86 * x945; - Fp x947 = x927 * x90; - Fp x948 = x946 + x947; - Fp x949 = x948 * x75; - Fp x950 = x87 * x77; - Fp x951 = x948 * x78; - Fp x952 = x91 * x82; - Fp x953 = x91 * x83; - Fp x954 = x92 * x84; - Fp x955 = x92 * x85; - Fp x956 = x944 + x949; - Fp x957 = x956 + x950; - Fp x958 = x957 + x951; - Fp x959 = x958 + x952; - Fp x960 = x959 + x953; - Fp x961 = x960 + x954; - Fp x962 = x961 + x955; - Fp x963 = arg0[58]; - FpExt x964 = x923 + poly_mix[341] * x963; - Fp x965 = arg0[201]; - Fp x966 = x965 * x93; - Fp x967 = arg0[202]; - Fp x968 = x966 - x967; - FpExt x969 = x964 + poly_mix[342] * x968; - Fp x970 = x94 * x965; - FpExt x971 = x969 + poly_mix[343] * x970; - Fp x972 = x94 * x93; - FpExt x973 = x971 + poly_mix[344] * x972; - Fp x974 = x967 * x965; - Fp x975 = x14 - x967; - Fp x976 = x975 * x3; - Fp x977 = arg0[23]; - Fp x978 = x977 + x976; - Fp x979 = x978 + x974; - Fp x980 = x979 - x95; - FpExt x981 = x973 + poly_mix[345] * x980; - Fp x982 = x96 - x2; - FpExt x983 = x981 + poly_mix[346] * x982; - Fp x984 = x97 - x14; - arg0[453] = x984; - FpExt x985 = x983 + poly_mix[347] * x984; - FpExt x986 = x985 + poly_mix[348] * x1; - FpExt x987 = x986 + poly_mix[349] * x1; - Fp x988 = x98 - x95; - FpExt x989 = x987 + poly_mix[350] * x988; - Fp x990 = x99 - x100; - Fp x991 = x101 - x14; - FpExt x992 = x989 + poly_mix[351] * x991; - Fp x993 = x102 - x990; - FpExt x994 = x992 + poly_mix[352] * x993; - Fp x995 = x103 - x943; - FpExt x996 = x994 + poly_mix[353] * x995; - Fp x997 = x104 - x962; - FpExt x998 = x996 + poly_mix[354] * x997; - Fp x999 = x105 - x14; - FpExt x1000 = x998 + poly_mix[355] * x999; - Fp x1001 = arg0[73]; - FpExt x1002 = x1000 + poly_mix[356] * x1001; - Fp x1003 = x106 * x12; - Fp x1004 = x1003 + x107; - Fp x1005 = arg0[100]; - Fp x1006 = x1005 - x1004; - FpExt x1007 = x1002 + poly_mix[357] * x1006; - Fp x1008 = arg0[102]; - Fp x1009 = x1008 + x106; - Fp x1010 = x108 - x14; - arg0[456] = x1010; - FpExt x1011 = x1007 + poly_mix[358] * x1010; - Fp x1012 = arg0[77]; - FpExt x1013 = x1011 + poly_mix[359] * x1012; - Fp x1014 = x109 * x12; - Fp x1015 = x1014 + x110; - Fp x1016 = x1009 - x1015; - FpExt x1017 = x1013 + poly_mix[360] * x1016; - FpExt x1018 = arg6 + x111 * x1017 * poly_mix[386]; - Fp x1019 = x14 - x36; - Fp x1020 = x36 * x1019; - Fp x1021 = x22 - x36; - Fp x1022 = x1020 * x1021; - Fp x1023 = x0 - x36; - Fp x1024 = x1022 * x1023; - FpExt x1025 = arg7 + poly_mix[2] * x1024; - FpExt x1026 = x1025 + poly_mix[3] * x179; - Fp x1027 = arg0[120]; - Fp x1028 = x39 - x1027; - FpExt x1029 = x1026 + poly_mix[4] * x1028; - Fp x1030 = x14 - x112; - Fp x1031 = x112 * x1030; - FpExt x1032 = x1029 + poly_mix[5] * x1031; - Fp x1033 = x1008 * x35; - Fp x1034 = x1033 - x1030; - FpExt x1035 = x1032 + poly_mix[6] * x1034; - Fp x1036 = x112 * x1008; - FpExt x1037 = x1035 + poly_mix[7] * x1036; - Fp x1038 = x112 * x35; - FpExt x1039 = x1037 + poly_mix[8] * x1038; - FpExt x1040 = x1039 + poly_mix[9] * x112; - FpExt x1041 = x1040 + poly_mix[10] * x200; - Fp x1042 = x41 * x21; - Fp x1043 = x1042 + x36; - Fp x1044 = arg0[99]; - Fp x1045 = x1043 - x1044; - FpExt x1046 = x1041 + poly_mix[11] * x1045; - Fp x1047 = arg0[121]; - Fp x1048 = x1047 + x41; - FpExt x1049 = x1046 + poly_mix[12] * x36; - Fp x1050 = x40 - x2; - FpExt x1051 = x1049 + poly_mix[13] * x1050; - Fp x1052 = x45 - x14; - FpExt x1053 = x1051 + poly_mix[14] * x1052; - FpExt x1054 = x1053 + poly_mix[15] * x1; - FpExt x1055 = x1054 + poly_mix[16] * x1; - Fp x1056 = x113 - x1048; - FpExt x1057 = x1055 + poly_mix[17] * x1056; - Fp x1058 = x43 - x114; - FpExt x1059 = x1057 + poly_mix[18] * x1058; - Fp x1060 = x115 - x42; - FpExt x1061 = x1059 + poly_mix[19] * x1060; - Fp x1062 = x99 - x116; - FpExt x1063 = x1061 + poly_mix[20] * x245; - Fp x1064 = x52 - x1062; - FpExt x1065 = x1063 + poly_mix[21] * x1064; - Fp x1066 = x14 - x117; - arg0[470] = x1066; - Fp x1067 = x117 * x1066; - FpExt x1068 = x1065 + poly_mix[22] * x1067; - Fp x1069 = x14 - x72; - arg0[386] = x1069; - Fp x1070 = x72 * x1069; - Fp x1071 = x22 - x72; - Fp x1072 = x1070 * x1071; - Fp x1073 = x0 - x72; - Fp x1074 = x1072 * x1073; - FpExt x1075 = x1068 + poly_mix[23] * x1074; - Fp x1076 = x14 - x118; - Fp x1077 = x118 * x1076; - arg0[220] = x1077; - Fp x1078 = x22 - x118; - Fp x1079 = x1077 * x1078; - Fp x1080 = x0 - x118; - Fp x1081 = x1079 * x1080; - FpExt x1082 = x1075 + poly_mix[24] * x1081; - Fp x1083 = x14 - x53; - arg0[465] = x1083; - Fp x1084 = x53 * x1083; - Fp x1085 = x22 - x53; - Fp x1086 = x1084 * x1085; - Fp x1087 = x0 - x53; - Fp x1088 = x1086 * x1087; - arg0[221] = x1088; - FpExt x1089 = x1082 + poly_mix[25] * x1088; - Fp x1090 = x14 - x119; - arg0[468] = x1090; - Fp x1091 = x119 * x1090; - Fp x1092 = x22 - x119; - arg0[471] = x1092; - Fp x1093 = x1091 * x1092; - Fp x1094 = x0 - x119; - arg0[472] = x1094; - Fp x1095 = x1093 * x1094; - arg0[222] = x1095; - FpExt x1096 = x1089 + poly_mix[26] * x1095; - Fp x1097 = x14 - x58; - Fp x1098 = x58 * x1097; - Fp x1099 = x22 - x58; - Fp x1100 = x1098 * x1099; - Fp x1101 = x0 - x58; - Fp x1102 = x1100 * x1101; - arg0[223] = x1102; - FpExt x1103 = x1096 + poly_mix[27] * x1102; - Fp x1104 = arg0[203]; - FpExt x1105 = x1103 + poly_mix[28] * x1104; - Fp x1106 = x14 - x63; - Fp x1107 = x63 * x1106; - Fp x1108 = x22 - x63; - Fp x1109 = x1107 * x1108; - Fp x1110 = x0 - x63; - Fp x1111 = x1109 * x1110; - arg0[224] = x1111; - FpExt x1112 = x1105 + poly_mix[29] * x1111; - Fp x1113 = x14 - x81; - Fp x1114 = x81 * x1113; - arg0[225] = x1114; - Fp x1115 = x22 - x81; - Fp x1116 = x1114 * x1115; - Fp x1117 = x0 - x81; - Fp x1118 = x1116 * x1117; - FpExt x1119 = x1112 + poly_mix[30] * x1118; - Fp x1120 = arg0[204]; - FpExt x1121 = x1119 + poly_mix[31] * x1120; - auto x1122 = rv32im_v2_9(idx, - size, - x1121, - arg0, - arg4, - arg8, - x1018, - arg7, - arg9, - arg10, - arg11, - arg12, - arg13, - arg14, - arg15, - arg16, - arg17); - - return x1122; -} -__device__ FpExt rv32im_v2_6(uint32_t idx, - uint32_t size, - Fp* arg0, - FpExt arg1, - FpExt arg2, - FpExt* arg3, - FpExt arg4, - FpExt arg5, - FpExt arg6, - FpExt arg7, - FpExt arg8, - const Fp* arg9, - const Fp* arg10, - const Fp* arg11, - const Fp* arg12) { - uint32_t mask = size - 1; - Fp x0(23); - Fp x1(65536); - Fp x2(24); - FpExt x3{0, 0, 0, 0}; - FpExt x4{1, 0, 0, 0}; - FpExt x5{0, 1, 0, 0}; - Fp x6(0); - Fp x7(1); - Fp x8(2); - Fp x9(8); - Fp x10(7); - Fp x11(6); - Fp x12(5); - Fp x13(4); - Fp x14(3); - Fp x15 = arg9[35 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x16 = arg9[54 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x17 = arg9[55 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x18 = arg9[56 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x19 = arg9[57 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x20 = arg9[58 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x21 = arg9[59 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x22 = arg9[60 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x23 = arg9[61 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x24 = arg9[183 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x25 = arg9[182 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x26 = arg9[184 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x27 = arg9[32 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x28 = arg9[67 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x29 = arg9[130 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x30 = arg9[72 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x31 = arg9[69 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x32 = arg9[73 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x33 = arg9[70 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x34 = arg9[0 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x35 = arg9[68 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x36 = arg9[75 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x37 = arg9[132 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x38 = arg9[80 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x39 = arg9[77 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x40 = arg9[81 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x41 = arg9[78 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x42 = arg9[76 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x43 = arg9[83 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x44 = arg9[134 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x45 = arg9[88 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x46 = arg9[85 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x47 = arg9[89 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x48 = arg9[86 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x49 = arg9[84 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x50 = arg9[91 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x51 = arg9[136 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x52 = arg9[96 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x53 = arg9[93 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x54 = arg9[97 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x55 = arg9[94 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x56 = arg9[92 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x57 = arg9[99 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x58 = arg9[138 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x59 = arg9[104 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x60 = arg9[101 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x61 = arg9[105 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x62 = arg9[102 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x63 = arg9[100 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x64 = arg9[107 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x65 = arg9[140 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x66 = arg9[112 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x67 = arg9[109 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x68 = arg9[113 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x69 = arg9[110 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x70 = arg9[108 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x71 = arg9[115 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x72 = arg9[142 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x73 = arg9[120 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x74 = arg9[117 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x75 = arg9[121 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x76 = arg9[118 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x77 = arg9[116 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x78 = arg9[123 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x79 = arg9[144 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x80 = arg9[128 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x81 = arg9[125 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x82 = arg9[129 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x83 = arg9[126 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x84 = arg9[124 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x85 = arg12[36]; - Fp x86 = arg12[35]; - Fp x87 = arg12[34]; - Fp x88 = arg12[33]; - Fp x89 = arg9[33 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x90 = arg9[35 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x91 = arg9[38 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x92 = arg9[39 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x93 = arg9[40 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x94 = arg9[41 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x95 = arg9[42 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x96 = arg9[43 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x97 = arg9[44 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x98 = arg9[45 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x99 = arg9[46 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x100 = arg9[47 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x101 = arg9[48 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x102 = arg9[49 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x103 = arg9[50 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x104 = arg9[51 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x105 = arg9[52 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x106 = arg9[53 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x107 = arg9[54 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x108 = arg9[55 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x109 = arg9[56 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x110 = arg9[57 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x111 = arg9[58 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x112 = arg9[59 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x113 = arg9[60 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x114 = arg9[61 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x115 = arg9[185 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x116 = arg9[46 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x117 = arg9[47 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x118 = arg9[48 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x119 = arg9[49 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x120 = arg9[50 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x121 = arg9[51 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x122 = arg9[52 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x123 = arg9[53 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x124 = arg9[186 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x125 = arg9[38 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x126 = arg9[39 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x127 = arg9[40 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x128 = arg9[41 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x129 = arg9[42 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x130 = arg9[43 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x131 = arg9[44 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x132 = arg9[45 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x133 = arg9[187 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x134 = arg9[146 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x135 = arg9[148 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x136 = arg9[150 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x137 = arg9[152 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x138 = arg9[154 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x139 = arg9[156 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x140 = arg9[158 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x141 = arg9[160 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x142 = arg9[162 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x143 = arg9[164 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x144 = arg9[166 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x145 = arg9[168 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x146 = arg9[170 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x147 = arg9[172 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x148 = arg9[174 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x149 = arg9[176 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x150 = arg9[178 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x151 = arg9[180 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x152 = arg9[21 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x153 = arg9[29 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x154 = arg9[30 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x155 = arg9[31 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x156 = arg9[37 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x157 = arg9[66 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x158 = arg9[71 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x159 = arg9[74 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x160 = arg9[79 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x161 = arg9[82 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x162 = arg9[87 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x163 = arg9[90 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x164 = arg9[95 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x165 = arg9[98 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x166 = arg9[103 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x167 = arg9[106 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x168 = arg9[111 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x169 = arg9[114 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x170 = arg9[119 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x171 = arg9[122 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x172 = arg9[127 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x173 = arg9[22 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x174 = arg9[23 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x175 = arg9[31 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x176 = arg9[29 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x177 = arg9[27 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x178 = x15 + x14; - Fp x179 = x15 + x13; - Fp x180 = x15 + x12; - Fp x181 = x15 + x11; - Fp x182 = x15 + x10; - Fp x183 = x15 + x9; - Fp x184 = x16 + x17; - Fp x185 = x18 + x19; - Fp x186 = x17 * x8; - Fp x187 = x186 + x185; - Fp x188 = x19 * x8; - Fp x189 = x188 + x184; - Fp x190 = x185 * x13; - Fp x191 = x190 + x189; - Fp x192 = x184 * x13; - Fp x193 = x192 + x187; - Fp x194 = x189 + x193; - Fp x195 = x187 + x191; - Fp x196 = x20 + x21; - Fp x197 = x22 + x23; - Fp x198 = x21 * x8; - Fp x199 = x198 + x197; - Fp x200 = x23 * x8; - Fp x201 = x200 + x196; - Fp x202 = x197 * x13; - Fp x203 = x202 + x201; - Fp x204 = x196 * x13; - Fp x205 = x204 + x199; - Fp x206 = x201 + x205; - Fp x207 = x199 + x203; - Fp x208 = arg0[340]; - FpExt x209 = arg1 + poly_mix[0] * x208; - Fp x210 = x7 - x24; - Fp x211 = x24 * x210; - FpExt x212 = x209 + poly_mix[1] * x211; - Fp x213 = arg0[341]; - FpExt x214 = x212 + poly_mix[2] * x213; - Fp x215 = x25 + x24; - Fp x216 = x215 + x26; - Fp x217 = x216 - x7; - FpExt x218 = x214 + poly_mix[3] * x217; - Fp x219 = x26 * x8; - Fp x220 = x24 + x219; - Fp x221 = x220 - x27; - FpExt x222 = x218 + poly_mix[4] * x221; - Fp x223 = x28 - x15; - FpExt x224 = arg2 + poly_mix[4] * x223; - Fp x225 = arg0[342]; - FpExt x226 = x224 + poly_mix[5] * x225; - Fp x227 = arg0[285]; - FpExt x228 = x226 + poly_mix[6] * x227; - Fp x229 = arg0[343]; - FpExt x230 = x228 + poly_mix[7] * x229; - Fp x231 = arg0[344]; - FpExt x232 = x230 + poly_mix[8] * x231; - FpExt x233 = x222 + x25 * x232 * poly_mix[5]; - FpExt x234 = x228 + poly_mix[7] * x29; - FpExt x235 = x233 + x24 * x234 * poly_mix[14]; - FpExt x236 = x224 + poly_mix[5] * x229; - FpExt x237 = x236 + poly_mix[6] * x231; - FpExt x238 = x235 + x26 * x237 * poly_mix[22]; - Fp x239 = x30 * x25; - Fp x240 = x30 * x24; - Fp x241 = x31 * x26; - Fp x242 = x239 + x240; - Fp x243 = x242 + x241; - Fp x244 = x32 * x25; - Fp x245 = x32 * x24; - Fp x246 = x33 * x26; - Fp x247 = x244 + x245; - Fp x248 = x247 + x246; - Fp x249 = x30 - x31; - Fp x250 = x249 * x26; - Fp x251 = x34 - x35; - Fp x252 = x251 * x24; - Fp x253 = x32 - x33; - Fp x254 = x253 * x26; - Fp x255 = x25 + x252; - Fp x256 = x255 + x254; - Fp x257 = arg0[345]; - FpExt x258 = arg1 + poly_mix[0] * x257; - Fp x259 = arg0[346]; - FpExt x260 = x258 + poly_mix[1] * x259; - FpExt x261 = x260 + poly_mix[2] * x6; - FpExt x262 = x261 + poly_mix[3] * x6; - Fp x263 = arg0[347]; - Fp x264 = x36 - x263; - FpExt x265 = x262 + poly_mix[4] * x264; - Fp x266 = arg0[348]; - FpExt x267 = x265 + poly_mix[5] * x266; - Fp x268 = arg0[287]; - FpExt x269 = x267 + poly_mix[6] * x268; - Fp x270 = arg0[349]; - FpExt x271 = x269 + poly_mix[7] * x270; - Fp x272 = arg0[350]; - FpExt x273 = x271 + poly_mix[8] * x272; - FpExt x274 = x238 + x25 * x273 * poly_mix[29]; - FpExt x275 = x269 + poly_mix[7] * x37; - FpExt x276 = x274 + x24 * x275 * poly_mix[38]; - FpExt x277 = x265 + poly_mix[5] * x270; - FpExt x278 = x277 + poly_mix[6] * x272; - FpExt x279 = x276 + x26 * x278 * poly_mix[46]; - Fp x280 = x38 * x25; - Fp x281 = x38 * x24; - Fp x282 = x39 * x26; - Fp x283 = x280 + x281; - Fp x284 = x283 + x282; - Fp x285 = x40 * x25; - Fp x286 = x40 * x24; - Fp x287 = x41 * x26; - Fp x288 = x285 + x286; - Fp x289 = x288 + x287; - Fp x290 = x38 - x39; - Fp x291 = x290 * x26; - Fp x292 = x34 - x42; - Fp x293 = x292 * x24; - Fp x294 = x40 - x41; - Fp x295 = x294 * x26; - Fp x296 = x25 + x293; - Fp x297 = x296 + x295; - Fp x298 = arg0[351]; - FpExt x299 = arg1 + poly_mix[0] * x298; - Fp x300 = arg0[332]; - FpExt x301 = x299 + poly_mix[1] * x300; - FpExt x302 = x301 + poly_mix[2] * x6; - FpExt x303 = x302 + poly_mix[3] * x6; - Fp x304 = arg0[352]; - Fp x305 = x43 - x304; - FpExt x306 = x303 + poly_mix[4] * x305; - Fp x307 = arg0[353]; - FpExt x308 = x306 + poly_mix[5] * x307; - Fp x309 = arg0[289]; - FpExt x310 = x308 + poly_mix[6] * x309; - Fp x311 = arg0[354]; - FpExt x312 = x310 + poly_mix[7] * x311; - Fp x313 = arg0[355]; - FpExt x314 = x312 + poly_mix[8] * x313; - FpExt x315 = x279 + x25 * x314 * poly_mix[53]; - FpExt x316 = x310 + poly_mix[7] * x44; - FpExt x317 = x315 + x24 * x316 * poly_mix[62]; - FpExt x318 = x306 + poly_mix[5] * x311; - FpExt x319 = x318 + poly_mix[6] * x313; - FpExt x320 = x317 + x26 * x319 * poly_mix[70]; - Fp x321 = x45 * x25; - Fp x322 = x45 * x24; - Fp x323 = x46 * x26; - Fp x324 = x321 + x322; - Fp x325 = x324 + x323; - Fp x326 = x47 * x25; - Fp x327 = x47 * x24; - Fp x328 = x48 * x26; - Fp x329 = x326 + x327; - Fp x330 = x329 + x328; - Fp x331 = x45 - x46; - Fp x332 = x331 * x26; - Fp x333 = x34 - x49; - Fp x334 = x333 * x24; - Fp x335 = x47 - x48; - Fp x336 = x335 * x26; - Fp x337 = x25 + x334; - Fp x338 = x337 + x336; - Fp x339 = arg0[333]; - FpExt x340 = arg1 + poly_mix[0] * x339; - Fp x341 = arg0[265]; - FpExt x342 = x340 + poly_mix[1] * x341; - FpExt x343 = x342 + poly_mix[2] * x6; - FpExt x344 = x343 + poly_mix[3] * x6; - Fp x345 = x50 - x178; - FpExt x346 = x344 + poly_mix[4] * x345; - Fp x347 = arg0[334]; - FpExt x348 = x346 + poly_mix[5] * x347; - Fp x349 = arg0[356]; - FpExt x350 = x348 + poly_mix[6] * x349; - Fp x351 = arg0[357]; - FpExt x352 = x350 + poly_mix[7] * x351; - Fp x353 = arg0[358]; - FpExt x354 = x352 + poly_mix[8] * x353; - FpExt x355 = x320 + x25 * x354 * poly_mix[77]; - FpExt x356 = x350 + poly_mix[7] * x51; - FpExt x357 = x355 + x24 * x356 * poly_mix[86]; - FpExt x358 = x346 + poly_mix[5] * x351; - FpExt x359 = x358 + poly_mix[6] * x353; - FpExt x360 = x357 + x26 * x359 * poly_mix[94]; - Fp x361 = x52 * x25; - Fp x362 = x52 * x24; - Fp x363 = x53 * x26; - Fp x364 = x361 + x362; - Fp x365 = x364 + x363; - Fp x366 = x54 * x25; - Fp x367 = x54 * x24; - Fp x368 = x55 * x26; - Fp x369 = x366 + x367; - Fp x370 = x369 + x368; - Fp x371 = x52 - x53; - Fp x372 = x371 * x26; - Fp x373 = x34 - x56; - Fp x374 = x373 * x24; - Fp x375 = x54 - x55; - Fp x376 = x375 * x26; - Fp x377 = x25 + x374; - Fp x378 = x377 + x376; - Fp x379 = arg0[359]; - FpExt x380 = arg1 + poly_mix[0] * x379; - Fp x381 = arg0[230]; - FpExt x382 = x380 + poly_mix[1] * x381; - FpExt x383 = x382 + poly_mix[2] * x6; - FpExt x384 = x383 + poly_mix[3] * x6; - Fp x385 = x57 - x179; - FpExt x386 = x384 + poly_mix[4] * x385; - Fp x387 = arg0[360]; - FpExt x388 = x386 + poly_mix[5] * x387; - Fp x389 = arg0[335]; - FpExt x390 = x388 + poly_mix[6] * x389; - Fp x391 = arg0[361]; - FpExt x392 = x390 + poly_mix[7] * x391; - Fp x393 = arg0[362]; - FpExt x394 = x392 + poly_mix[8] * x393; - FpExt x395 = x360 + x25 * x394 * poly_mix[101]; - FpExt x396 = x390 + poly_mix[7] * x58; - FpExt x397 = x395 + x24 * x396 * poly_mix[110]; - FpExt x398 = x386 + poly_mix[5] * x391; - FpExt x399 = x398 + poly_mix[6] * x393; - FpExt x400 = x397 + x26 * x399 * poly_mix[118]; - Fp x401 = x59 * x25; - Fp x402 = x59 * x24; - Fp x403 = x60 * x26; - Fp x404 = x401 + x402; - Fp x405 = x404 + x403; - Fp x406 = x61 * x25; - Fp x407 = x61 * x24; - Fp x408 = x62 * x26; - Fp x409 = x406 + x407; - Fp x410 = x409 + x408; - Fp x411 = x59 - x60; - Fp x412 = x411 * x26; - Fp x413 = x34 - x63; - Fp x414 = x413 * x24; - Fp x415 = x61 - x62; - Fp x416 = x415 * x26; - Fp x417 = x25 + x414; - Fp x418 = x417 + x416; - Fp x419 = arg0[231]; - FpExt x420 = arg1 + poly_mix[0] * x419; - Fp x421 = arg0[260]; - FpExt x422 = x420 + poly_mix[1] * x421; - FpExt x423 = x422 + poly_mix[2] * x6; - FpExt x424 = x423 + poly_mix[3] * x6; - Fp x425 = x64 - x180; - FpExt x426 = x424 + poly_mix[4] * x425; - Fp x427 = arg0[234]; - FpExt x428 = x426 + poly_mix[5] * x427; - Fp x429 = arg0[336]; - FpExt x430 = x428 + poly_mix[6] * x429; - Fp x431 = arg0[363]; - FpExt x432 = x430 + poly_mix[7] * x431; - Fp x433 = arg0[364]; - FpExt x434 = x432 + poly_mix[8] * x433; - FpExt x435 = x400 + x25 * x434 * poly_mix[125]; - FpExt x436 = x430 + poly_mix[7] * x65; - FpExt x437 = x435 + x24 * x436 * poly_mix[134]; - FpExt x438 = x426 + poly_mix[5] * x431; - FpExt x439 = x438 + poly_mix[6] * x433; - FpExt x440 = x437 + x26 * x439 * poly_mix[142]; - Fp x441 = x66 * x25; - Fp x442 = x66 * x24; - Fp x443 = x67 * x26; - Fp x444 = x441 + x442; - Fp x445 = x444 + x443; - Fp x446 = x68 * x25; - Fp x447 = x68 * x24; - Fp x448 = x69 * x26; - Fp x449 = x446 + x447; - Fp x450 = x449 + x448; - Fp x451 = x66 - x67; - Fp x452 = x451 * x26; - Fp x453 = x34 - x70; - Fp x454 = x453 * x24; - Fp x455 = x68 - x69; - Fp x456 = x455 * x26; - Fp x457 = x25 + x454; - Fp x458 = x457 + x456; - Fp x459 = arg0[365]; - FpExt x460 = arg1 + poly_mix[0] * x459; - Fp x461 = arg0[338]; - FpExt x462 = x460 + poly_mix[1] * x461; - FpExt x463 = x462 + poly_mix[2] * x6; - FpExt x464 = x463 + poly_mix[3] * x6; - Fp x465 = x71 - x181; - FpExt x466 = x464 + poly_mix[4] * x465; - Fp x467 = arg0[366]; - FpExt x468 = x466 + poly_mix[5] * x467; - Fp x469 = arg0[367]; - FpExt x470 = x468 + poly_mix[6] * x469; - Fp x471 = arg0[368]; - FpExt x472 = x470 + poly_mix[7] * x471; - Fp x473 = arg0[369]; - FpExt x474 = x472 + poly_mix[8] * x473; - FpExt x475 = x440 + x25 * x474 * poly_mix[149]; - FpExt x476 = x470 + poly_mix[7] * x72; - FpExt x477 = x475 + x24 * x476 * poly_mix[158]; - FpExt x478 = x466 + poly_mix[5] * x471; - FpExt x479 = x478 + poly_mix[6] * x473; - FpExt x480 = x477 + x26 * x479 * poly_mix[166]; - Fp x481 = x73 * x25; - Fp x482 = x73 * x24; - Fp x483 = x74 * x26; - Fp x484 = x481 + x482; - Fp x485 = x484 + x483; - Fp x486 = x75 * x25; - Fp x487 = x75 * x24; - Fp x488 = x76 * x26; - Fp x489 = x486 + x487; - Fp x490 = x489 + x488; - Fp x491 = x73 - x74; - Fp x492 = x491 * x26; - Fp x493 = x34 - x77; - Fp x494 = x493 * x24; - Fp x495 = x75 - x76; - Fp x496 = x495 * x26; - Fp x497 = x25 + x494; - Fp x498 = x497 + x496; - Fp x499 = arg0[370]; - FpExt x500 = arg1 + poly_mix[0] * x499; - Fp x501 = arg0[371]; - FpExt x502 = x500 + poly_mix[1] * x501; - FpExt x503 = x502 + poly_mix[2] * x6; - FpExt x504 = x503 + poly_mix[3] * x6; - Fp x505 = x78 - x182; - FpExt x506 = x504 + poly_mix[4] * x505; - Fp x507 = arg0[372]; - FpExt x508 = x506 + poly_mix[5] * x507; - Fp x509 = arg0[373]; - FpExt x510 = x508 + poly_mix[6] * x509; - Fp x511 = arg0[374]; - FpExt x512 = x510 + poly_mix[7] * x511; - Fp x513 = arg0[375]; - FpExt x514 = x512 + poly_mix[8] * x513; - FpExt x515 = x480 + x25 * x514 * poly_mix[168]; - FpExt x516 = x510 + poly_mix[7] * x79; - FpExt x517 = x515 + x24 * x516 * poly_mix[169]; - FpExt x518 = x506 + poly_mix[5] * x511; - FpExt x519 = x518 + poly_mix[6] * x513; - FpExt x520 = x517 + x26 * x519 * poly_mix[173]; - Fp x521 = x80 * x25; - Fp x522 = x80 * x24; - Fp x523 = x81 * x26; - Fp x524 = x521 + x522; - Fp x525 = x524 + x523; - Fp x526 = x82 * x25; - Fp x527 = x82 * x24; - Fp x528 = x83 * x26; - Fp x529 = x526 + x527; - Fp x530 = x529 + x528; - Fp x531 = x80 - x81; - Fp x532 = x531 * x26; - Fp x533 = x34 - x84; - Fp x534 = x533 * x24; - Fp x535 = x82 - x83; - Fp x536 = x535 * x26; - Fp x537 = x25 + x534; - Fp x538 = x537 + x536; - FpExt x539 = x85 * x5; - FpExt x540 = x86 + x539; - FpExt x541 = x540 * x5; - FpExt x542 = x87 + x541; - FpExt x543 = x542 * x5; - FpExt x544 = x88 + x543; - FpExt x545 = x544 * x4; - FpExt x546 = x250 + x3; - FpExt x547 = x546 * x4; - FpExt x548 = x547 + x3; - FpExt x549 = x545 * x544; - FpExt x550 = x256 + x3; - FpExt x551 = x550 * x545; - FpExt x552 = x548 + x551; - FpExt x553 = x549 * x544; - FpExt x554 = x291 + x3; - FpExt x555 = x554 * x549; - FpExt x556 = x552 + x555; - FpExt x557 = x553 * x544; - FpExt x558 = x297 + x3; - FpExt x559 = x558 * x553; - FpExt x560 = x556 + x559; - FpExt x561 = x557 * x544; - FpExt x562 = x332 + x3; - FpExt x563 = x562 * x557; - FpExt x564 = x560 + x563; - FpExt x565 = x561 * x544; - FpExt x566 = x338 + x3; - FpExt x567 = x566 * x561; - FpExt x568 = x564 + x567; - FpExt x569 = x565 * x544; - FpExt x570 = x372 + x3; - FpExt x571 = x570 * x565; - FpExt x572 = x568 + x571; - FpExt x573 = x569 * x544; - FpExt x574 = x378 + x3; - FpExt x575 = x574 * x569; - FpExt x576 = x572 + x575; - FpExt x577 = x573 * x544; - FpExt x578 = x412 + x3; - FpExt x579 = x578 * x573; - FpExt x580 = x576 + x579; - FpExt x581 = x577 * x544; - FpExt x582 = x418 + x3; - FpExt x583 = x582 * x577; - FpExt x584 = x580 + x583; - FpExt x585 = x581 * x544; - FpExt x586 = x452 + x3; - FpExt x587 = x586 * x581; - FpExt x588 = x584 + x587; - FpExt x589 = x585 * x544; - FpExt x590 = x458 + x3; - FpExt x591 = x590 * x585; - FpExt x592 = x588 + x591; - FpExt x593 = x589 * x544; - FpExt x594 = x492 + x3; - FpExt x595 = x594 * x589; - FpExt x596 = x592 + x595; - FpExt x597 = x593 * x544; - FpExt x598 = x498 + x3; - FpExt x599 = x598 * x593; - FpExt x600 = x596 + x599; - FpExt x601 = x597 * x544; - FpExt x602 = x532 + x3; - FpExt x603 = x602 * x597; - FpExt x604 = x600 + x603; - FpExt x605 = x538 + x3; - FpExt x606 = x605 * x601; - FpExt x607 = x604 + x606; - FpExt x608 = x601 * x544; - FpExt x609 = arg3[0]; - FpExt x610 = x609 * x608; - FpExt x611 = x610 + x607; - Fp x612 = x243 + x248; - Fp x613 = x284 + x289; - Fp x614 = x248 * x8; - Fp x615 = x614 + x613; - Fp x616 = x289 * x8; - Fp x617 = x616 + x612; - Fp x618 = x613 * x13; - Fp x619 = x618 + x617; - Fp x620 = x612 * x13; - Fp x621 = x620 + x615; - Fp x622 = x617 + x621; - Fp x623 = x615 + x619; - Fp x624 = x325 + x330; - Fp x625 = x365 + x370; - Fp x626 = x330 * x8; - Fp x627 = x626 + x625; - Fp x628 = x370 * x8; - Fp x629 = x628 + x624; - Fp x630 = x625 * x13; - Fp x631 = x630 + x629; - Fp x632 = x624 * x13; - Fp x633 = x632 + x627; - Fp x634 = x629 + x633; - Fp x635 = x627 + x631; - Fp x636 = x405 + x410; - Fp x637 = x445 + x450; - Fp x638 = x410 * x8; - Fp x639 = x638 + x637; - Fp x640 = x450 * x8; - Fp x641 = x640 + x636; - Fp x642 = x637 * x13; - Fp x643 = x642 + x641; - Fp x644 = x636 * x13; - Fp x645 = x644 + x639; - Fp x646 = x641 + x645; - Fp x647 = x639 + x643; - Fp x648 = x485 + x490; - Fp x649 = x525 + x530; - Fp x650 = x490 * x8; - Fp x651 = x650 + x649; - Fp x652 = x530 * x8; - Fp x653 = x652 + x648; - Fp x654 = x649 * x13; - Fp x655 = x654 + x653; - Fp x656 = x648 * x13; - Fp x657 = x656 + x651; - Fp x658 = x653 + x657; - Fp x659 = x651 + x655; - Fp x660 = x622 + x634; - Fp x661 = x621 + x633; - Fp x662 = x623 + x635; - Fp x663 = x619 + x631; - Fp x664 = x660 + x646; - Fp x665 = x661 + x645; - Fp x666 = x662 + x647; - Fp x667 = x663 + x643; - Fp x668 = x664 + x658; - Fp x669 = x665 + x657; - Fp x670 = x666 + x659; - Fp x671 = x667 + x655; - Fp x672 = x668 + x194; - Fp x673 = x669 + x193; - Fp x674 = x670 + x195; - Fp x675 = x671 + x191; - Fp x676 = x672 + x206; - Fp x677 = x673 + x205; - Fp x678 = x674 + x207; - Fp x679 = x675 + x203; - Fp x680 = x622 + x676; - Fp x681 = x621 + x677; - Fp x682 = x623 + x678; - Fp x683 = x619 + x679; - Fp x684 = x634 + x676; - Fp x685 = x633 + x677; - Fp x686 = x635 + x678; - Fp x687 = x631 + x679; - Fp x688 = x646 + x676; - Fp x689 = x645 + x677; - Fp x690 = x647 + x678; - Fp x691 = x643 + x679; - Fp x692 = x658 + x676; - Fp x693 = x657 + x677; - Fp x694 = x659 + x678; - Fp x695 = x655 + x679; - Fp x696 = x194 + x676; - Fp x697 = x193 + x677; - Fp x698 = x195 + x678; - Fp x699 = x191 + x679; - Fp x700 = x206 + x676; - Fp x701 = x205 + x677; - Fp x702 = x207 + x678; - Fp x703 = x203 + x679; - Fp x704 = arg0[376]; - FpExt x705 = x520 + poly_mix[174] * x704; - Fp x706 = arg0[377]; - FpExt x707 = x705 + poly_mix[175] * x706; - Fp x708 = arg0[378]; - FpExt x709 = x707 + poly_mix[176] * x708; - Fp x710 = arg0[379]; - FpExt x711 = x709 + poly_mix[177] * x710; - Fp x712 = arg0[380]; - FpExt x713 = x711 + poly_mix[178] * x712; - Fp x714 = arg0[381]; - FpExt x715 = x713 + poly_mix[179] * x714; - Fp x716 = x2 - x89; - arg0[606] = x716; - FpExt x717 = x715 + poly_mix[180] * x716; - Fp x718 = arg0[382]; - FpExt x719 = x717 + poly_mix[181] * x718; - Fp x720 = x183 - x90; - FpExt x721 = x719 + poly_mix[182] * x720; - Fp x722 = arg0[383]; - FpExt x723 = x721 + poly_mix[183] * x722; - Fp x724 = arg0[384]; - FpExt x725 = x723 + poly_mix[184] * x724; - Fp x726 = x680 - x91; - FpExt x727 = x725 + poly_mix[185] * x726; - Fp x728 = x681 - x92; - FpExt x729 = x727 + poly_mix[186] * x728; - Fp x730 = x682 - x93; - FpExt x731 = x729 + poly_mix[187] * x730; - Fp x732 = x683 - x94; - FpExt x733 = x731 + poly_mix[188] * x732; - Fp x734 = x684 - x95; - FpExt x735 = x733 + poly_mix[189] * x734; - Fp x736 = x685 - x96; - FpExt x737 = x735 + poly_mix[190] * x736; - Fp x738 = x686 - x97; - FpExt x739 = x737 + poly_mix[191] * x738; - Fp x740 = x687 - x98; - FpExt x741 = x739 + poly_mix[192] * x740; - Fp x742 = x688 - x99; - FpExt x743 = x741 + poly_mix[193] * x742; - Fp x744 = x689 - x100; - FpExt x745 = x743 + poly_mix[194] * x744; - Fp x746 = x690 - x101; - FpExt x747 = x745 + poly_mix[195] * x746; - Fp x748 = x691 - x102; - FpExt x749 = x747 + poly_mix[196] * x748; - Fp x750 = x692 - x103; - FpExt x751 = x749 + poly_mix[197] * x750; - Fp x752 = x693 - x104; - FpExt x753 = x751 + poly_mix[198] * x752; - Fp x754 = x694 - x105; - FpExt x755 = x753 + poly_mix[199] * x754; - Fp x756 = x695 - x106; - FpExt x757 = x755 + poly_mix[200] * x756; - Fp x758 = x696 - x107; - FpExt x759 = x757 + poly_mix[201] * x758; - Fp x760 = x697 - x108; - FpExt x761 = x759 + poly_mix[202] * x760; - Fp x762 = x698 - x109; - FpExt x763 = x761 + poly_mix[203] * x762; - Fp x764 = x699 - x110; - FpExt x765 = x763 + poly_mix[204] * x764; - Fp x766 = x700 - x111; - FpExt x767 = x765 + poly_mix[205] * x766; - Fp x768 = x701 - x112; - FpExt x769 = x767 + poly_mix[206] * x768; - Fp x770 = x702 - x113; - FpExt x771 = x769 + poly_mix[207] * x770; - Fp x772 = x703 - x114; - FpExt x773 = x771 + poly_mix[208] * x772; - FpExt x774 = arg3[1]; - FpExt x775 = x774 - x611; - FpExt x776 = x773 + poly_mix[209] * x775; - FpExt x777 = arg4 + x115 * x776 * poly_mix[5]; - Fp x778 = x248 * x1; - Fp x779 = x778 + x243; - Fp x780 = x289 * x1; - Fp x781 = x780 + x284; - Fp x782 = x330 * x1; - Fp x783 = x782 + x325; - Fp x784 = x370 * x1; - Fp x785 = x784 + x365; - Fp x786 = x410 * x1; - Fp x787 = x786 + x405; - Fp x788 = x450 * x1; - Fp x789 = x788 + x445; - Fp x790 = x490 * x1; - Fp x791 = x790 + x485; - Fp x792 = x530 * x1; - Fp x793 = x792 + x525; - Fp x794 = arg0[385]; - FpExt x795 = x715 + poly_mix[180] * x794; - Fp x796 = arg0[386]; - FpExt x797 = x795 + poly_mix[181] * x796; - FpExt x798 = x797 + poly_mix[182] * x720; - FpExt x799 = x798 + poly_mix[183] * x722; - FpExt x800 = x799 + poly_mix[184] * x724; - Fp x801 = x779 - x91; - FpExt x802 = x800 + poly_mix[185] * x801; - Fp x803 = x781 - x92; - FpExt x804 = x802 + poly_mix[186] * x803; - Fp x805 = x783 - x93; - FpExt x806 = x804 + poly_mix[187] * x805; - Fp x807 = x785 - x94; - FpExt x808 = x806 + poly_mix[188] * x807; - Fp x809 = x787 - x95; - FpExt x810 = x808 + poly_mix[189] * x809; - Fp x811 = x789 - x96; - FpExt x812 = x810 + poly_mix[190] * x811; - Fp x813 = x791 - x97; - FpExt x814 = x812 + poly_mix[191] * x813; - Fp x815 = x793 - x98; - FpExt x816 = x814 + poly_mix[192] * x815; - Fp x817 = x116 - x99; - arg0[430] = x817; - FpExt x818 = x816 + poly_mix[193] * x817; - Fp x819 = x117 - x100; - arg0[431] = x819; - FpExt x820 = x818 + poly_mix[194] * x819; - Fp x821 = x118 - x101; - arg0[432] = x821; - FpExt x822 = x820 + poly_mix[195] * x821; - Fp x823 = x119 - x102; - arg0[433] = x823; - FpExt x824 = x822 + poly_mix[196] * x823; - Fp x825 = x120 - x103; - arg0[434] = x825; - FpExt x826 = x824 + poly_mix[197] * x825; - Fp x827 = x121 - x104; - arg0[435] = x827; - FpExt x828 = x826 + poly_mix[198] * x827; - Fp x829 = x122 - x105; - arg0[436] = x829; - FpExt x830 = x828 + poly_mix[199] * x829; - Fp x831 = x123 - x106; - arg0[437] = x831; - FpExt x832 = x830 + poly_mix[200] * x831; - Fp x833 = x16 - x107; - arg0[438] = x833; - FpExt x834 = x832 + poly_mix[201] * x833; - Fp x835 = x17 - x108; - arg0[439] = x835; - FpExt x836 = x834 + poly_mix[202] * x835; - Fp x837 = x18 - x109; - arg0[440] = x837; - FpExt x838 = x836 + poly_mix[203] * x837; - Fp x839 = x19 - x110; - arg0[441] = x839; - FpExt x840 = x838 + poly_mix[204] * x839; - Fp x841 = x20 - x111; - arg0[442] = x841; - FpExt x842 = x840 + poly_mix[205] * x841; - Fp x843 = x21 - x112; - arg0[443] = x843; - FpExt x844 = x842 + poly_mix[206] * x843; - Fp x845 = x22 - x113; - arg0[444] = x845; - FpExt x846 = x844 + poly_mix[207] * x845; - Fp x847 = x23 - x114; - arg0[445] = x847; - FpExt x848 = x846 + poly_mix[208] * x847; - FpExt x849 = x848 + poly_mix[209] * x775; - FpExt x850 = x777 + x124 * x849 * poly_mix[213]; - Fp x851 = x125 + x126; - Fp x852 = x127 + x128; - Fp x853 = x126 * x8; - Fp x854 = x853 + x852; - Fp x855 = x128 * x8; - Fp x856 = x855 + x851; - Fp x857 = x852 * x13; - Fp x858 = x857 + x856; - Fp x859 = x851 * x13; - Fp x860 = x859 + x854; - Fp x861 = x856 + x860; - Fp x862 = x854 + x858; - Fp x863 = x129 + x130; - Fp x864 = x131 + x132; - Fp x865 = x130 * x8; - Fp x866 = x865 + x864; - Fp x867 = x132 * x8; - Fp x868 = x867 + x863; - Fp x869 = x864 * x13; - Fp x870 = x869 + x868; - Fp x871 = x863 * x13; - Fp x872 = x871 + x866; - Fp x873 = x868 + x872; - Fp x874 = x866 + x870; - Fp x875 = x861 + x873; - Fp x876 = x860 + x872; - Fp x877 = x862 + x874; - Fp x878 = x858 + x870; - Fp x879 = x779 + x781; - Fp x880 = x783 + x785; - Fp x881 = x781 * x8; - Fp x882 = x881 + x880; - Fp x883 = x785 * x8; - Fp x884 = x883 + x879; - Fp x885 = x880 * x13; - Fp x886 = x885 + x884; - Fp x887 = x879 * x13; - Fp x888 = x887 + x882; - Fp x889 = x884 + x888; - Fp x890 = x882 + x886; - Fp x891 = x787 + x789; - Fp x892 = x791 + x793; - Fp x893 = x789 * x8; - Fp x894 = x893 + x892; - Fp x895 = x793 * x8; - Fp x896 = x895 + x891; - Fp x897 = x892 * x13; - Fp x898 = x897 + x896; - Fp x899 = x891 * x13; - Fp x900 = x899 + x894; - Fp x901 = x896 + x900; - Fp x902 = x894 + x898; - Fp x903 = x875 + x889; - Fp x904 = x876 + x888; - Fp x905 = x877 + x890; - Fp x906 = x878 + x886; - Fp x907 = x903 + x901; - Fp x908 = x904 + x900; - Fp x909 = x905 + x902; - Fp x910 = x906 + x898; - Fp x911 = x907 + x194; - Fp x912 = x908 + x193; - Fp x913 = x909 + x195; - Fp x914 = x910 + x191; - Fp x915 = x911 + x206; - Fp x916 = x912 + x205; - Fp x917 = x913 + x207; - Fp x918 = x914 + x203; - Fp x919 = x861 + x915; - Fp x920 = x860 + x916; - Fp x921 = x862 + x917; - Fp x922 = x858 + x918; - Fp x923 = x873 + x915; - Fp x924 = x872 + x916; - Fp x925 = x874 + x917; - Fp x926 = x870 + x918; - Fp x927 = x889 + x915; - Fp x928 = x888 + x916; - Fp x929 = x890 + x917; - Fp x930 = x886 + x918; - Fp x931 = x901 + x915; - Fp x932 = x900 + x916; - Fp x933 = x902 + x917; - Fp x934 = x898 + x918; - Fp x935 = x194 + x915; - Fp x936 = x193 + x916; - Fp x937 = x195 + x917; - Fp x938 = x191 + x918; - Fp x939 = x206 + x915; - Fp x940 = x205 + x916; - Fp x941 = x207 + x917; - Fp x942 = x203 + x918; - Fp x943 = x919 - x91; - FpExt x944 = x725 + poly_mix[185] * x943; - Fp x945 = x920 - x92; - FpExt x946 = x944 + poly_mix[186] * x945; - Fp x947 = x921 - x93; - FpExt x948 = x946 + poly_mix[187] * x947; - Fp x949 = x922 - x94; - FpExt x950 = x948 + poly_mix[188] * x949; - Fp x951 = x923 - x95; - FpExt x952 = x950 + poly_mix[189] * x951; - Fp x953 = x924 - x96; - FpExt x954 = x952 + poly_mix[190] * x953; - Fp x955 = x925 - x97; - FpExt x956 = x954 + poly_mix[191] * x955; - Fp x957 = x926 - x98; - FpExt x958 = x956 + poly_mix[192] * x957; - Fp x959 = x927 - x99; - FpExt x960 = x958 + poly_mix[193] * x959; - Fp x961 = x928 - x100; - FpExt x962 = x960 + poly_mix[194] * x961; - Fp x963 = x929 - x101; - FpExt x964 = x962 + poly_mix[195] * x963; - Fp x965 = x930 - x102; - FpExt x966 = x964 + poly_mix[196] * x965; - Fp x967 = x931 - x103; - FpExt x968 = x966 + poly_mix[197] * x967; - Fp x969 = x932 - x104; - FpExt x970 = x968 + poly_mix[198] * x969; - Fp x971 = x933 - x105; - FpExt x972 = x970 + poly_mix[199] * x971; - Fp x973 = x934 - x106; - FpExt x974 = x972 + poly_mix[200] * x973; - Fp x975 = x935 - x107; - FpExt x976 = x974 + poly_mix[201] * x975; - Fp x977 = x936 - x108; - FpExt x978 = x976 + poly_mix[202] * x977; - Fp x979 = x937 - x109; - FpExt x980 = x978 + poly_mix[203] * x979; - Fp x981 = x938 - x110; - FpExt x982 = x980 + poly_mix[204] * x981; - Fp x983 = x939 - x111; - FpExt x984 = x982 + poly_mix[205] * x983; - Fp x985 = x940 - x112; - FpExt x986 = x984 + poly_mix[206] * x985; - Fp x987 = x941 - x113; - FpExt x988 = x986 + poly_mix[207] * x987; - Fp x989 = x942 - x114; - FpExt x990 = x988 + poly_mix[208] * x989; - FpExt x991 = x990 + poly_mix[209] * x775; - FpExt x992 = x850 + x133 * x991 * poly_mix[340]; - FpExt x993 = x992 + poly_mix[362] * x134; - FpExt x994 = x993 + poly_mix[363] * x135; - FpExt x995 = x994 + poly_mix[364] * x136; - FpExt x996 = x995 + poly_mix[365] * x137; - FpExt x997 = x996 + poly_mix[366] * x138; - FpExt x998 = x997 + poly_mix[367] * x139; - FpExt x999 = x998 + poly_mix[368] * x140; - FpExt x1000 = x999 + poly_mix[369] * x141; - FpExt x1001 = x1000 + poly_mix[370] * x142; - FpExt x1002 = x1001 + poly_mix[371] * x143; - FpExt x1003 = x1002 + poly_mix[372] * x144; - FpExt x1004 = x1003 + poly_mix[373] * x145; - FpExt x1005 = x1004 + poly_mix[374] * x146; - FpExt x1006 = x1005 + poly_mix[375] * x147; - FpExt x1007 = x1006 + poly_mix[376] * x148; - FpExt x1008 = x1007 + poly_mix[377] * x149; - FpExt x1009 = x1008 + poly_mix[378] * x150; - FpExt x1010 = x1009 + poly_mix[379] * x151; - FpExt x1011 = arg5 + x152 * x1010 * poly_mix[252]; - Fp x1012 = arg0[387]; - FpExt x1013 = arg6 + poly_mix[1] * x1012; - Fp x1014 = arg0[388]; - FpExt x1015 = x1013 + poly_mix[2] * x1014; - Fp x1016 = x6 - x153; - FpExt x1017 = x1015 + poly_mix[3] * x1016; - Fp x1018 = x6 - x154; - arg0[467] = x1018; - FpExt x1019 = x1017 + poly_mix[4] * x1018; - Fp x1020 = x6 - x155; - arg0[469] = x1020; - FpExt x1021 = x1019 + poly_mix[5] * x1020; - Fp x1022 = arg0[389]; - FpExt x1023 = x1021 + poly_mix[6] * x1022; - Fp x1024 = x6 - x89; - FpExt x1025 = x1023 + poly_mix[7] * x1024; - FpExt x1026 = x1025 + poly_mix[8] * x718; - Fp x1027 = arg0[390]; - FpExt x1028 = x1026 + poly_mix[9] * x1027; - Fp x1029 = arg0[391]; - FpExt x1030 = x1028 + poly_mix[10] * x1029; - Fp x1031 = x6 - x156; - arg0[466] = x1031; - FpExt x1032 = x1030 + poly_mix[11] * x1031; - Fp x1033 = arg0[392]; - FpExt x1034 = x1032 + poly_mix[12] * x1033; - Fp x1035 = arg0[393]; - FpExt x1036 = x1034 + poly_mix[13] * x1035; - Fp x1037 = arg0[394]; - FpExt x1038 = x1036 + poly_mix[14] * x1037; - Fp x1039 = arg0[395]; - FpExt x1040 = x1038 + poly_mix[15] * x1039; - Fp x1041 = arg0[396]; - FpExt x1042 = x1040 + poly_mix[16] * x1041; - Fp x1043 = arg0[397]; - FpExt x1044 = x1042 + poly_mix[17] * x1043; - Fp x1045 = arg0[398]; - FpExt x1046 = x1044 + poly_mix[18] * x1045; - Fp x1047 = arg0[399]; - FpExt x1048 = x1046 + poly_mix[19] * x1047; - Fp x1049 = arg0[400]; - FpExt x1050 = x1048 + poly_mix[20] * x1049; - Fp x1051 = arg0[401]; - FpExt x1052 = x1050 + poly_mix[21] * x1051; - Fp x1053 = arg0[402]; - FpExt x1054 = x1052 + poly_mix[22] * x1053; - Fp x1055 = arg0[403]; - FpExt x1056 = x1054 + poly_mix[23] * x1055; - Fp x1057 = arg0[404]; - FpExt x1058 = x1056 + poly_mix[24] * x1057; - Fp x1059 = arg0[405]; - FpExt x1060 = x1058 + poly_mix[25] * x1059; - Fp x1061 = arg0[406]; - FpExt x1062 = x1060 + poly_mix[26] * x1061; - Fp x1063 = arg0[407]; - FpExt x1064 = x1062 + poly_mix[27] * x1063; - Fp x1065 = arg0[408]; - FpExt x1066 = x1064 + poly_mix[28] * x1065; - Fp x1067 = arg0[409]; - FpExt x1068 = x1066 + poly_mix[29] * x1067; - Fp x1069 = arg0[410]; - FpExt x1070 = x1068 + poly_mix[30] * x1069; - Fp x1071 = arg0[411]; - FpExt x1072 = x1070 + poly_mix[31] * x1071; - Fp x1073 = arg0[412]; - FpExt x1074 = x1072 + poly_mix[32] * x1073; - Fp x1075 = arg0[413]; - FpExt x1076 = x1074 + poly_mix[33] * x1075; - Fp x1077 = arg0[414]; - FpExt x1078 = x1076 + poly_mix[34] * x1077; - Fp x1079 = arg0[415]; - FpExt x1080 = x1078 + poly_mix[35] * x1079; - FpExt x1081 = arg3[2]; - FpExt x1082 = x1080 + poly_mix[36] * x1081; - FpExt x1083 = x1082 + poly_mix[37] * x157; - FpExt x1084 = x1083 + poly_mix[38] * x158; - FpExt x1085 = x1084 + poly_mix[39] * x159; - FpExt x1086 = x1085 + poly_mix[40] * x160; - FpExt x1087 = x1086 + poly_mix[41] * x161; - FpExt x1088 = x1087 + poly_mix[42] * x162; - FpExt x1089 = x1088 + poly_mix[43] * x163; - FpExt x1090 = x1089 + poly_mix[44] * x164; - FpExt x1091 = x1090 + poly_mix[45] * x165; - FpExt x1092 = x1091 + poly_mix[46] * x166; - FpExt x1093 = x1092 + poly_mix[47] * x167; - FpExt x1094 = x1093 + poly_mix[48] * x168; - FpExt x1095 = x1094 + poly_mix[49] * x169; - FpExt x1096 = x1095 + poly_mix[50] * x170; - FpExt x1097 = x1096 + poly_mix[51] * x171; - FpExt x1098 = x1097 + poly_mix[52] * x172; - FpExt x1099 = x1098 + poly_mix[53] * x29; - FpExt x1100 = x1099 + poly_mix[54] * x37; - FpExt x1101 = x1100 + poly_mix[55] * x44; - FpExt x1102 = x1101 + poly_mix[56] * x51; - FpExt x1103 = x1102 + poly_mix[57] * x58; - FpExt x1104 = x1103 + poly_mix[58] * x65; - FpExt x1105 = x1104 + poly_mix[59] * x72; - FpExt x1106 = x1105 + poly_mix[60] * x79; - FpExt x1107 = x1106 + poly_mix[61] * x134; - FpExt x1108 = x1107 + poly_mix[62] * x135; - FpExt x1109 = x1108 + poly_mix[63] * x136; - FpExt x1110 = x1109 + poly_mix[64] * x137; - FpExt x1111 = x1110 + poly_mix[65] * x138; - FpExt x1112 = x1111 + poly_mix[66] * x139; - FpExt x1113 = x1112 + poly_mix[67] * x140; - FpExt x1114 = x1113 + poly_mix[68] * x141; - FpExt x1115 = x1114 + poly_mix[69] * x142; - FpExt x1116 = x1115 + poly_mix[70] * x143; - FpExt x1117 = x1116 + poly_mix[71] * x144; - FpExt x1118 = x1117 + poly_mix[72] * x145; - FpExt x1119 = x1118 + poly_mix[73] * x146; - FpExt x1120 = x1119 + poly_mix[74] * x147; - FpExt x1121 = x1120 + poly_mix[75] * x148; - FpExt x1122 = x1121 + poly_mix[76] * x149; - FpExt x1123 = x1122 + poly_mix[77] * x150; - FpExt x1124 = x1123 + poly_mix[78] * x151; - FpExt x1125 = x1011 + x173 * x1124 * poly_mix[383]; - FpExt x1126 = x1125 + x174 * x1124 * poly_mix[384]; - Fp x1127 = x7 - x175; - arg0[457] = x1127; - Fp x1128 = x176 + x7; - Fp x1129 = x176 + x8; - Fp x1130 = x176 + x14; - Fp x1131 = x176 + x13; - Fp x1132 = x176 + x12; - arg0[421] = x1132; - Fp x1133 = x176 + x11; - arg0[423] = x1133; - Fp x1134 = x176 + x10; - arg0[424] = x1134; - Fp x1135 = x177 * x0; - arg0[429] = x1135; - Fp x1136 = x7 - x177; - arg0[428] = x1136; - Fp x1137 = x28 - x176; - arg0[449] = x1137; - FpExt x1138 = arg2 + poly_mix[4] * x1137; - FpExt x1139 = x1138 + poly_mix[5] * x225; - FpExt x1140 = x1139 + poly_mix[6] * x227; - FpExt x1141 = x1140 + poly_mix[7] * x229; - FpExt x1142 = x1141 + poly_mix[8] * x231; - Fp x1143 = arg0[416]; - Fp x1144 = x1143 - x125; - FpExt x1145 = x1142 + poly_mix[9] * x1144; - FpExt x1146 = x1145 + poly_mix[10] * x257; - FpExt x1147 = x1146 + poly_mix[11] * x259; - FpExt x1148 = x1147 + poly_mix[12] * x6; - FpExt x1149 = x1148 + poly_mix[13] * x6; - Fp x1150 = x36 - x1128; - arg0[450] = x1150; - FpExt x1151 = x1149 + poly_mix[14] * x1150; - FpExt x1152 = x1151 + poly_mix[15] * x266; - FpExt x1153 = x1152 + poly_mix[16] * x268; - FpExt x1154 = x1153 + poly_mix[17] * x270; - FpExt x1155 = x1154 + poly_mix[18] * x272; - Fp x1156 = arg0[417]; - Fp x1157 = x1156 - x126; - FpExt x1158 = x1155 + poly_mix[19] * x1157; - FpExt x1159 = x1158 + poly_mix[20] * x298; - FpExt x1160 = x1159 + poly_mix[21] * x300; - FpExt x1161 = x1160 + poly_mix[22] * x6; - FpExt x1162 = x1161 + poly_mix[23] * x6; - Fp x1163 = x43 - x1129; - arg0[452] = x1163; - FpExt x1164 = x1162 + poly_mix[24] * x1163; - FpExt x1165 = x1164 + poly_mix[25] * x307; - FpExt x1166 = x1165 + poly_mix[26] * x309; - FpExt x1167 = x1166 + poly_mix[27] * x311; - FpExt x1168 = x1167 + poly_mix[28] * x313; - Fp x1169 = arg0[418]; - Fp x1170 = x1169 - x127; - FpExt x1171 = x1168 + poly_mix[29] * x1170; - FpExt x1172 = x1171 + poly_mix[30] * x339; - FpExt x1173 = x1172 + poly_mix[31] * x341; - FpExt x1174 = x1173 + poly_mix[32] * x6; - FpExt x1175 = x1174 + poly_mix[33] * x6; - Fp x1176 = x50 - x1130; - arg0[454] = x1176; - FpExt x1177 = x1175 + poly_mix[34] * x1176; - FpExt x1178 = x1177 + poly_mix[35] * x347; - FpExt x1179 = x1178 + poly_mix[36] * x349; - FpExt x1180 = x1179 + poly_mix[37] * x351; - FpExt x1181 = x1180 + poly_mix[38] * x353; - Fp x1182 = arg0[419]; - Fp x1183 = x1182 - x128; - FpExt x1184 = x1181 + poly_mix[39] * x1183; - FpExt x1185 = x1184 + poly_mix[40] * x379; - FpExt x1186 = x1185 + poly_mix[41] * x381; - FpExt x1187 = x1186 + poly_mix[42] * x6; - FpExt x1188 = x1187 + poly_mix[43] * x6; - Fp x1189 = x57 - x1131; - arg0[455] = x1189; - FpExt x1190 = x1188 + poly_mix[44] * x1189; - FpExt x1191 = x1190 + poly_mix[45] * x387; - auto x1192 = - rv32im_v2_5(idx, size, arg0, x1191, arg3, arg1, x1126, arg7, arg8, x1082, arg9, arg10, arg11); - - return x1192; -} -__device__ FpExt rv32im_v2_2(uint32_t idx, - uint32_t size, - Fp* arg0, - FpExt arg1, - FpExt* arg2, - FpExt arg3, - FpExt arg4, - FpExt arg5, - FpExt arg6, - const Fp* arg7, - const Fp* arg8, - const Fp* arg9) { - uint32_t mask = size - 1; - FpExt x0{0, 1, 0, 0}; - Fp x1(3); - Fp x2(7); - Fp x3(6); - Fp x4(32); - Fp x5(16); - Fp x6(1); - Fp x7(0); - Fp x8(4); - Fp x9(1810596765); - Fp x10(1210751726); - Fp x11(1327682690); - Fp x12(1886977120); - Fp x13(1551596046); - Fp x14(1186174623); - Fp x15(918610824); - Fp x16(13683276); - Fp x17(606789471); - Fp x18(1974912880); - Fp x19(65998480); - Fp x20(1461037801); - Fp x21(1997365680); - Fp x22(801504236); - Fp x23(1792686146); - Fp x24(1001081699); - Fp x25(98371040); - Fp x26(1389833583); - Fp x27(106789798); - Fp x28(1188752902); - Fp x29(20525701); - Fp x30(1558116381); - Fp x31(1942928017); - Fp x32(1928969209); - Fp x33(51866717); - Fp x34(658182609); - Fp x35(1867716110); - Fp x36(111593398); - Fp x37(375892129); - Fp x38(1083257840); - Fp x39 = arg7[94 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x40 = arg7[97 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x41 = arg7[96 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x42 = arg7[99 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x43 = arg7[98 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x44 = arg7[101 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x45 = arg7[100 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x46 = arg7[103 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x47 = arg7[102 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x48 = arg7[105 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x49 = arg7[104 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x50 = arg7[107 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x51 = arg7[106 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x52 = arg7[34 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x53 = arg7[38 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x54 = arg7[39 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x55 = arg7[40 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x56 = arg7[41 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x57 = arg7[42 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x58 = arg7[43 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x59 = arg7[44 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x60 = arg7[45 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x61 = arg7[46 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x62 = arg7[47 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x63 = arg7[48 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x64 = arg7[49 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x65 = arg7[50 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x66 = arg7[51 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x67 = arg7[52 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x68 = arg7[53 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x69 = arg7[54 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x70 = arg7[55 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x71 = arg7[56 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x72 = arg7[57 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x73 = arg7[58 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x74 = arg7[59 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x75 = arg7[60 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x76 = arg7[61 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x77 = arg7[20 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x78 = arg7[21 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x79 = arg7[22 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x80 = arg7[23 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x81 = arg7[24 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x82 = arg7[25 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x83 = arg7[26 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x84 = arg7[11 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x85 = arg7[44 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x86 = arg7[1 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x87 = arg7[2 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x88 = arg7[3 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x89 = arg7[154 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x90 = arg7[4 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x91 = arg7[164 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x92 = arg7[5 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x93 = arg7[117 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x94 = arg7[6 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x95 = arg7[126 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x96 = arg7[7 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x97 = arg7[171 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x98 = arg7[33 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x99 = arg7[49 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x100 = arg7[112 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x101 = arg7[174 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x102 = arg7[173 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x103 = arg7[8 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x104 = arg7[111 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x105 = arg7[9 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x106 = arg7[10 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x107 = arg7[47 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x108 = arg7[157 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x109 = arg7[167 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x110 = arg7[120 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x111 = arg7[129 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x112 = arg7[34 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x113 = arg7[50 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x114 = arg7[114 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x115 = arg7[19 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x116 = arg7[172 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x117 = arg7[41 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x118 = arg7[37 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x119 = arg7[12 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x120 = arg7[13 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x121 = arg7[14 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x122 = arg7[15 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x123 = arg9[7]; - Fp x124 = arg9[6]; - Fp x125 = arg9[5]; - Fp x126 = arg9[4]; - Fp x127 = arg9[11]; - Fp x128 = arg9[10]; - Fp x129 = arg9[9]; - Fp x130 = arg9[8]; - Fp x131 = arg9[15]; - Fp x132 = arg9[14]; - Fp x133 = arg9[13]; - Fp x134 = arg9[12]; - Fp x135 = arg9[19]; - Fp x136 = arg9[18]; - Fp x137 = arg9[17]; - Fp x138 = arg9[16]; - Fp x139 = arg9[23]; - Fp x140 = arg9[22]; - Fp x141 = arg9[21]; - Fp x142 = arg9[20]; - Fp x143 = arg9[27]; - Fp x144 = arg9[26]; - Fp x145 = arg9[25]; - Fp x146 = arg9[24]; - Fp x147 = arg9[31]; - Fp x148 = arg9[30]; - Fp x149 = arg9[29]; - Fp x150 = arg9[28]; - Fp x151 = arg8[75 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x152 = arg8[74 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x153 = arg8[73 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x154 = arg8[72 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x155 = arg7[37 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x156 = arg8[3 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x157 = arg8[2 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x158 = arg8[1 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x159 = arg8[0 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x160 = arg7[0 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x161 = arg8[7 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x162 = arg8[6 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x163 = arg8[5 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x164 = arg8[4 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x165 = arg7[78 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x166 = arg7[81 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x167 = arg7[80 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x168 = arg8[11 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x169 = arg8[10 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x170 = arg8[9 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x171 = arg8[8 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x172 = arg7[85 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x173 = arg7[86 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x174 = arg7[88 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x175 = arg7[89 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x176 = arg7[90 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x177 = arg7[87 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x178 = arg7[84 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x179 = arg7[92 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x180 = arg7[93 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x181 = arg0[576]; - Fp x182 = arg0[577]; - Fp x183 = x181 + x182; - Fp x184 = arg0[578]; - Fp x185 = x183 + x184; - Fp x186 = arg0[579]; - Fp x187 = x185 + x186; - Fp x188 = arg0[580]; - Fp x189 = x187 + x188; - Fp x190 = arg0[581]; - Fp x191 = x189 + x190; - Fp x192 = arg0[582]; - Fp x193 = x191 + x192; - Fp x194 = arg0[583]; - Fp x195 = x193 + x194; - Fp x196 = arg0[584]; - Fp x197 = x195 + x196; - Fp x198 = arg0[585]; - Fp x199 = x197 + x198; - Fp x200 = arg0[586]; - Fp x201 = x199 + x200; - Fp x202 = arg0[587]; - Fp x203 = x201 + x202; - Fp x204 = arg0[588]; - Fp x205 = x203 + x204; - Fp x206 = arg0[589]; - Fp x207 = x205 + x206; - Fp x208 = arg0[590]; - Fp x209 = x207 + x208; - Fp x210 = x39 * x38; - Fp x211 = x209 + x210; - Fp x212 = arg0[591]; - Fp x213 = x212 * x37; - Fp x214 = x209 + x213; - Fp x215 = arg0[592]; - Fp x216 = x215 * x36; - Fp x217 = x209 + x216; - Fp x218 = arg0[593]; - Fp x219 = x218 * x35; - Fp x220 = x209 + x219; - Fp x221 = arg0[594]; - Fp x222 = x221 * x34; - Fp x223 = x209 + x222; - Fp x224 = arg0[595]; - Fp x225 = x224 * x33; - Fp x226 = x209 + x225; - Fp x227 = arg0[596]; - Fp x228 = x227 * x32; - Fp x229 = x209 + x228; - Fp x230 = arg0[597]; - Fp x231 = x230 * x31; - Fp x232 = x209 + x231; - Fp x233 = arg0[598]; - Fp x234 = x233 * x30; - Fp x235 = x209 + x234; - Fp x236 = arg0[599]; - Fp x237 = x236 * x29; - Fp x238 = x209 + x237; - Fp x239 = x182 * x28; - Fp x240 = x209 + x239; - Fp x241 = x184 * x27; - Fp x242 = x209 + x241; - Fp x243 = x186 * x26; - Fp x244 = x209 + x243; - Fp x245 = x188 * x25; - Fp x246 = x209 + x245; - Fp x247 = x190 * x24; - Fp x248 = x209 + x247; - Fp x249 = x192 * x23; - Fp x250 = x209 + x249; - Fp x251 = x194 * x22; - Fp x252 = x209 + x251; - Fp x253 = x196 * x21; - Fp x254 = x209 + x253; - Fp x255 = x198 * x20; - Fp x256 = x209 + x255; - Fp x257 = x200 * x19; - Fp x258 = x209 + x257; - Fp x259 = x202 * x18; - Fp x260 = x209 + x259; - Fp x261 = x204 * x17; - Fp x262 = x209 + x261; - Fp x263 = x206 * x16; - Fp x264 = x209 + x263; - Fp x265 = x208 * x15; - Fp x266 = x209 + x265; - Fp x267 = x211 + x14; - Fp x268 = x267 * x267; - Fp x269 = x268 * x267; - Fp x270 = x269 - x40; - FpExt x271 = arg1 + poly_mix[30] * x270; - Fp x272 = arg0[600]; - Fp x273 = x272 * x267; - Fp x274 = x273 - x41; - FpExt x275 = x271 + poly_mix[31] * x274; - Fp x276 = x41 + x214; - Fp x277 = x276 + x217; - Fp x278 = x277 + x220; - Fp x279 = x278 + x223; - Fp x280 = x279 + x226; - Fp x281 = x280 + x229; - Fp x282 = x281 + x232; - Fp x283 = x282 + x235; - Fp x284 = x283 + x238; - Fp x285 = x284 + x240; - Fp x286 = x285 + x242; - Fp x287 = x286 + x244; - Fp x288 = x287 + x246; - Fp x289 = x288 + x248; - Fp x290 = x289 + x250; - Fp x291 = x290 + x252; - Fp x292 = x291 + x254; - Fp x293 = x292 + x256; - Fp x294 = x293 + x258; - Fp x295 = x294 + x260; - Fp x296 = x295 + x262; - Fp x297 = x296 + x264; - Fp x298 = x297 + x266; - Fp x299 = x41 * x38; - Fp x300 = x298 + x299; - Fp x301 = x214 * x37; - Fp x302 = x298 + x301; - Fp x303 = x217 * x36; - Fp x304 = x298 + x303; - Fp x305 = x220 * x35; - Fp x306 = x298 + x305; - Fp x307 = x223 * x34; - Fp x308 = x298 + x307; - Fp x309 = x226 * x33; - Fp x310 = x298 + x309; - Fp x311 = x229 * x32; - Fp x312 = x298 + x311; - Fp x313 = x232 * x31; - Fp x314 = x298 + x313; - Fp x315 = x235 * x30; - Fp x316 = x298 + x315; - Fp x317 = x238 * x29; - Fp x318 = x298 + x317; - Fp x319 = x240 * x28; - Fp x320 = x298 + x319; - Fp x321 = x242 * x27; - Fp x322 = x298 + x321; - Fp x323 = x244 * x26; - Fp x324 = x298 + x323; - Fp x325 = x246 * x25; - Fp x326 = x298 + x325; - Fp x327 = x248 * x24; - Fp x328 = x298 + x327; - Fp x329 = x250 * x23; - Fp x330 = x298 + x329; - Fp x331 = x252 * x22; - Fp x332 = x298 + x331; - Fp x333 = x254 * x21; - Fp x334 = x298 + x333; - Fp x335 = x256 * x20; - Fp x336 = x298 + x335; - Fp x337 = x258 * x19; - Fp x338 = x298 + x337; - Fp x339 = x260 * x18; - Fp x340 = x298 + x339; - Fp x341 = x262 * x17; - Fp x342 = x298 + x341; - Fp x343 = x264 * x16; - Fp x344 = x298 + x343; - Fp x345 = x266 * x15; - Fp x346 = x298 + x345; - Fp x347 = x300 + x13; - Fp x348 = x347 * x347; - Fp x349 = x348 * x347; - Fp x350 = x349 - x42; - FpExt x351 = x275 + poly_mix[32] * x350; - Fp x352 = arg0[601]; - Fp x353 = x352 * x347; - Fp x354 = x353 - x43; - FpExt x355 = x351 + poly_mix[33] * x354; - Fp x356 = x43 + x302; - Fp x357 = x356 + x304; - Fp x358 = x357 + x306; - Fp x359 = x358 + x308; - Fp x360 = x359 + x310; - Fp x361 = x360 + x312; - Fp x362 = x361 + x314; - Fp x363 = x362 + x316; - Fp x364 = x363 + x318; - Fp x365 = x364 + x320; - Fp x366 = x365 + x322; - Fp x367 = x366 + x324; - Fp x368 = x367 + x326; - Fp x369 = x368 + x328; - Fp x370 = x369 + x330; - Fp x371 = x370 + x332; - Fp x372 = x371 + x334; - Fp x373 = x372 + x336; - Fp x374 = x373 + x338; - Fp x375 = x374 + x340; - Fp x376 = x375 + x342; - Fp x377 = x376 + x344; - Fp x378 = x377 + x346; - Fp x379 = x43 * x38; - Fp x380 = x378 + x379; - Fp x381 = x302 * x37; - Fp x382 = x378 + x381; - Fp x383 = x304 * x36; - Fp x384 = x378 + x383; - Fp x385 = x306 * x35; - Fp x386 = x378 + x385; - Fp x387 = x308 * x34; - Fp x388 = x378 + x387; - Fp x389 = x310 * x33; - Fp x390 = x378 + x389; - Fp x391 = x312 * x32; - Fp x392 = x378 + x391; - Fp x393 = x314 * x31; - Fp x394 = x378 + x393; - Fp x395 = x316 * x30; - Fp x396 = x378 + x395; - Fp x397 = x318 * x29; - Fp x398 = x378 + x397; - Fp x399 = x320 * x28; - Fp x400 = x378 + x399; - Fp x401 = x322 * x27; - Fp x402 = x378 + x401; - Fp x403 = x324 * x26; - Fp x404 = x378 + x403; - Fp x405 = x326 * x25; - Fp x406 = x378 + x405; - Fp x407 = x328 * x24; - Fp x408 = x378 + x407; - Fp x409 = x330 * x23; - Fp x410 = x378 + x409; - Fp x411 = x332 * x22; - Fp x412 = x378 + x411; - Fp x413 = x334 * x21; - Fp x414 = x378 + x413; - Fp x415 = x336 * x20; - Fp x416 = x378 + x415; - Fp x417 = x338 * x19; - Fp x418 = x378 + x417; - Fp x419 = x340 * x18; - Fp x420 = x378 + x419; - Fp x421 = x342 * x17; - Fp x422 = x378 + x421; - Fp x423 = x344 * x16; - Fp x424 = x378 + x423; - Fp x425 = x346 * x15; - Fp x426 = x378 + x425; - Fp x427 = x380 + x12; - Fp x428 = x427 * x427; - Fp x429 = x428 * x427; - Fp x430 = x429 - x44; - FpExt x431 = x355 + poly_mix[34] * x430; - Fp x432 = arg0[602]; - Fp x433 = x432 * x427; - Fp x434 = x433 - x45; - FpExt x435 = x431 + poly_mix[35] * x434; - Fp x436 = x45 + x382; - Fp x437 = x436 + x384; - Fp x438 = x437 + x386; - Fp x439 = x438 + x388; - Fp x440 = x439 + x390; - Fp x441 = x440 + x392; - Fp x442 = x441 + x394; - Fp x443 = x442 + x396; - Fp x444 = x443 + x398; - Fp x445 = x444 + x400; - Fp x446 = x445 + x402; - Fp x447 = x446 + x404; - Fp x448 = x447 + x406; - Fp x449 = x448 + x408; - Fp x450 = x449 + x410; - Fp x451 = x450 + x412; - Fp x452 = x451 + x414; - Fp x453 = x452 + x416; - Fp x454 = x453 + x418; - Fp x455 = x454 + x420; - Fp x456 = x455 + x422; - Fp x457 = x456 + x424; - Fp x458 = x457 + x426; - Fp x459 = x45 * x38; - Fp x460 = x458 + x459; - Fp x461 = x382 * x37; - Fp x462 = x458 + x461; - Fp x463 = x384 * x36; - Fp x464 = x458 + x463; - Fp x465 = x386 * x35; - Fp x466 = x458 + x465; - Fp x467 = x388 * x34; - Fp x468 = x458 + x467; - Fp x469 = x390 * x33; - Fp x470 = x458 + x469; - Fp x471 = x392 * x32; - Fp x472 = x458 + x471; - Fp x473 = x394 * x31; - Fp x474 = x458 + x473; - Fp x475 = x396 * x30; - Fp x476 = x458 + x475; - Fp x477 = x398 * x29; - Fp x478 = x458 + x477; - Fp x479 = x400 * x28; - Fp x480 = x458 + x479; - Fp x481 = x402 * x27; - Fp x482 = x458 + x481; - Fp x483 = x404 * x26; - Fp x484 = x458 + x483; - Fp x485 = x406 * x25; - Fp x486 = x458 + x485; - Fp x487 = x408 * x24; - Fp x488 = x458 + x487; - Fp x489 = x410 * x23; - Fp x490 = x458 + x489; - Fp x491 = x412 * x22; - Fp x492 = x458 + x491; - Fp x493 = x414 * x21; - Fp x494 = x458 + x493; - Fp x495 = x416 * x20; - Fp x496 = x458 + x495; - Fp x497 = x418 * x19; - Fp x498 = x458 + x497; - Fp x499 = x420 * x18; - Fp x500 = x458 + x499; - Fp x501 = x422 * x17; - Fp x502 = x458 + x501; - Fp x503 = x424 * x16; - Fp x504 = x458 + x503; - Fp x505 = x426 * x15; - Fp x506 = x458 + x505; - Fp x507 = x460 + x11; - Fp x508 = x507 * x507; - Fp x509 = x508 * x507; - Fp x510 = x509 - x46; - FpExt x511 = x435 + poly_mix[36] * x510; - Fp x512 = arg0[603]; - Fp x513 = x512 * x507; - Fp x514 = x513 - x47; - FpExt x515 = x511 + poly_mix[37] * x514; - Fp x516 = x47 + x462; - Fp x517 = x516 + x464; - Fp x518 = x517 + x466; - Fp x519 = x518 + x468; - Fp x520 = x519 + x470; - Fp x521 = x520 + x472; - Fp x522 = x521 + x474; - Fp x523 = x522 + x476; - Fp x524 = x523 + x478; - Fp x525 = x524 + x480; - Fp x526 = x525 + x482; - Fp x527 = x526 + x484; - Fp x528 = x527 + x486; - Fp x529 = x528 + x488; - Fp x530 = x529 + x490; - Fp x531 = x530 + x492; - Fp x532 = x531 + x494; - Fp x533 = x532 + x496; - Fp x534 = x533 + x498; - Fp x535 = x534 + x500; - Fp x536 = x535 + x502; - Fp x537 = x536 + x504; - Fp x538 = x537 + x506; - Fp x539 = x47 * x38; - Fp x540 = x538 + x539; - Fp x541 = x462 * x37; - Fp x542 = x538 + x541; - Fp x543 = x464 * x36; - Fp x544 = x538 + x543; - Fp x545 = x466 * x35; - Fp x546 = x538 + x545; - Fp x547 = x468 * x34; - Fp x548 = x538 + x547; - Fp x549 = x470 * x33; - Fp x550 = x538 + x549; - Fp x551 = x472 * x32; - Fp x552 = x538 + x551; - Fp x553 = x474 * x31; - Fp x554 = x538 + x553; - Fp x555 = x476 * x30; - Fp x556 = x538 + x555; - Fp x557 = x478 * x29; - Fp x558 = x538 + x557; - Fp x559 = x480 * x28; - Fp x560 = x538 + x559; - Fp x561 = x482 * x27; - Fp x562 = x538 + x561; - Fp x563 = x484 * x26; - Fp x564 = x538 + x563; - Fp x565 = x486 * x25; - Fp x566 = x538 + x565; - Fp x567 = x488 * x24; - Fp x568 = x538 + x567; - Fp x569 = x490 * x23; - Fp x570 = x538 + x569; - Fp x571 = x492 * x22; - Fp x572 = x538 + x571; - Fp x573 = x494 * x21; - Fp x574 = x538 + x573; - Fp x575 = x496 * x20; - Fp x576 = x538 + x575; - Fp x577 = x498 * x19; - Fp x578 = x538 + x577; - Fp x579 = x500 * x18; - Fp x580 = x538 + x579; - Fp x581 = x502 * x17; - Fp x582 = x538 + x581; - Fp x583 = x504 * x16; - Fp x584 = x538 + x583; - Fp x585 = x506 * x15; - Fp x586 = x538 + x585; - Fp x587 = x540 + x10; - Fp x588 = x587 * x587; - Fp x589 = x588 * x587; - Fp x590 = x589 - x48; - FpExt x591 = x515 + poly_mix[38] * x590; - Fp x592 = arg0[604]; - Fp x593 = x592 * x587; - Fp x594 = x593 - x49; - FpExt x595 = x591 + poly_mix[39] * x594; - Fp x596 = x49 + x542; - Fp x597 = x596 + x544; - Fp x598 = x597 + x546; - Fp x599 = x598 + x548; - Fp x600 = x599 + x550; - Fp x601 = x600 + x552; - Fp x602 = x601 + x554; - Fp x603 = x602 + x556; - Fp x604 = x603 + x558; - Fp x605 = x604 + x560; - Fp x606 = x605 + x562; - Fp x607 = x606 + x564; - Fp x608 = x607 + x566; - Fp x609 = x608 + x568; - Fp x610 = x609 + x570; - Fp x611 = x610 + x572; - Fp x612 = x611 + x574; - Fp x613 = x612 + x576; - Fp x614 = x613 + x578; - Fp x615 = x614 + x580; - Fp x616 = x615 + x582; - Fp x617 = x616 + x584; - Fp x618 = x617 + x586; - Fp x619 = x49 * x38; - Fp x620 = x618 + x619; - Fp x621 = x542 * x37; - Fp x622 = x618 + x621; - Fp x623 = x544 * x36; - Fp x624 = x618 + x623; - Fp x625 = x546 * x35; - Fp x626 = x618 + x625; - Fp x627 = x548 * x34; - Fp x628 = x618 + x627; - Fp x629 = x550 * x33; - Fp x630 = x618 + x629; - Fp x631 = x552 * x32; - Fp x632 = x618 + x631; - Fp x633 = x554 * x31; - Fp x634 = x618 + x633; - Fp x635 = x556 * x30; - Fp x636 = x618 + x635; - Fp x637 = x558 * x29; - Fp x638 = x618 + x637; - Fp x639 = x560 * x28; - Fp x640 = x618 + x639; - Fp x641 = x562 * x27; - Fp x642 = x618 + x641; - Fp x643 = x564 * x26; - Fp x644 = x618 + x643; - Fp x645 = x566 * x25; - Fp x646 = x618 + x645; - Fp x647 = x568 * x24; - Fp x648 = x618 + x647; - Fp x649 = x570 * x23; - Fp x650 = x618 + x649; - Fp x651 = x572 * x22; - Fp x652 = x618 + x651; - Fp x653 = x574 * x21; - Fp x654 = x618 + x653; - Fp x655 = x576 * x20; - Fp x656 = x618 + x655; - Fp x657 = x578 * x19; - Fp x658 = x618 + x657; - Fp x659 = x580 * x18; - Fp x660 = x618 + x659; - Fp x661 = x582 * x17; - Fp x662 = x618 + x661; - Fp x663 = x584 * x16; - Fp x664 = x618 + x663; - Fp x665 = x586 * x15; - Fp x666 = x618 + x665; - Fp x667 = x620 + x9; - Fp x668 = x667 * x667; - Fp x669 = x668 * x667; - Fp x670 = x669 - x50; - FpExt x671 = x595 + poly_mix[40] * x670; - Fp x672 = arg0[605]; - Fp x673 = x672 * x667; - Fp x674 = x673 - x51; - FpExt x675 = x671 + poly_mix[41] * x674; - Fp x676 = x51 + x622; - Fp x677 = x676 + x624; - Fp x678 = x677 + x626; - Fp x679 = x678 + x628; - Fp x680 = x679 + x630; - Fp x681 = x680 + x632; - Fp x682 = x681 + x634; - Fp x683 = x682 + x636; - Fp x684 = x683 + x638; - Fp x685 = x684 + x640; - Fp x686 = x685 + x642; - Fp x687 = x686 + x644; - Fp x688 = x687 + x646; - Fp x689 = x688 + x648; - Fp x690 = x689 + x650; - Fp x691 = x690 + x652; - Fp x692 = x691 + x654; - Fp x693 = x692 + x656; - Fp x694 = x693 + x658; - Fp x695 = x694 + x660; - Fp x696 = x695 + x662; - Fp x697 = x696 + x664; - Fp x698 = x697 + x666; - Fp x699 = x51 * x38; - Fp x700 = x698 + x699; - Fp x701 = x622 * x37; - Fp x702 = x698 + x701; - Fp x703 = x624 * x36; - Fp x704 = x698 + x703; - Fp x705 = x626 * x35; - Fp x706 = x698 + x705; - Fp x707 = x628 * x34; - Fp x708 = x698 + x707; - Fp x709 = x630 * x33; - Fp x710 = x698 + x709; - Fp x711 = x632 * x32; - Fp x712 = x698 + x711; - Fp x713 = x634 * x31; - Fp x714 = x698 + x713; - Fp x715 = x636 * x30; - Fp x716 = x698 + x715; - Fp x717 = x638 * x29; - Fp x718 = x698 + x717; - Fp x719 = x640 * x28; - Fp x720 = x698 + x719; - Fp x721 = x642 * x27; - Fp x722 = x698 + x721; - Fp x723 = x644 * x26; - Fp x724 = x698 + x723; - Fp x725 = x646 * x25; - Fp x726 = x698 + x725; - Fp x727 = x648 * x24; - Fp x728 = x698 + x727; - Fp x729 = x650 * x23; - Fp x730 = x698 + x729; - Fp x731 = x652 * x22; - Fp x732 = x698 + x731; - Fp x733 = x654 * x21; - Fp x734 = x698 + x733; - Fp x735 = x656 * x20; - Fp x736 = x698 + x735; - Fp x737 = x658 * x19; - Fp x738 = x698 + x737; - Fp x739 = x660 * x18; - Fp x740 = x698 + x739; - Fp x741 = x662 * x17; - Fp x742 = x698 + x741; - Fp x743 = x664 * x16; - Fp x744 = x698 + x743; - Fp x745 = x666 * x15; - Fp x746 = x698 + x745; - Fp x747 = arg0[376]; - FpExt x748 = x675 + poly_mix[42] * x747; - Fp x749 = arg0[377]; - FpExt x750 = x748 + poly_mix[43] * x749; - Fp x751 = arg0[378]; - FpExt x752 = x750 + poly_mix[44] * x751; - Fp x753 = arg0[379]; - FpExt x754 = x752 + poly_mix[45] * x753; - Fp x755 = arg0[380]; - FpExt x756 = x754 + poly_mix[46] * x755; - Fp x757 = arg0[381]; - FpExt x758 = x756 + poly_mix[47] * x757; - Fp x759 = arg0[606]; - FpExt x760 = x758 + poly_mix[48] * x759; - Fp x761 = x8 - x52; - FpExt x762 = x760 + poly_mix[49] * x761; - Fp x763 = arg0[537]; - FpExt x764 = x762 + poly_mix[50] * x763; - Fp x765 = arg0[383]; - FpExt x766 = x764 + poly_mix[51] * x765; - Fp x767 = arg0[384]; - FpExt x768 = x766 + poly_mix[52] * x767; - Fp x769 = x700 - x53; - FpExt x770 = x768 + poly_mix[53] * x769; - Fp x771 = x702 - x54; - FpExt x772 = x770 + poly_mix[54] * x771; - Fp x773 = x704 - x55; - FpExt x774 = x772 + poly_mix[55] * x773; - Fp x775 = x706 - x56; - FpExt x776 = x774 + poly_mix[56] * x775; - Fp x777 = x708 - x57; - FpExt x778 = x776 + poly_mix[57] * x777; - Fp x779 = x710 - x58; - FpExt x780 = x778 + poly_mix[58] * x779; - Fp x781 = x712 - x59; - FpExt x782 = x780 + poly_mix[59] * x781; - Fp x783 = x714 - x60; - FpExt x784 = x782 + poly_mix[60] * x783; - Fp x785 = x716 - x61; - FpExt x786 = x784 + poly_mix[61] * x785; - Fp x787 = x718 - x62; - FpExt x788 = x786 + poly_mix[62] * x787; - Fp x789 = x720 - x63; - FpExt x790 = x788 + poly_mix[63] * x789; - Fp x791 = x722 - x64; - FpExt x792 = x790 + poly_mix[64] * x791; - Fp x793 = x724 - x65; - FpExt x794 = x792 + poly_mix[65] * x793; - Fp x795 = x726 - x66; - FpExt x796 = x794 + poly_mix[66] * x795; - Fp x797 = x728 - x67; - FpExt x798 = x796 + poly_mix[67] * x797; - Fp x799 = x730 - x68; - FpExt x800 = x798 + poly_mix[68] * x799; - Fp x801 = x732 - x69; - FpExt x802 = x800 + poly_mix[69] * x801; - Fp x803 = x734 - x70; - FpExt x804 = x802 + poly_mix[70] * x803; - Fp x805 = x736 - x71; - FpExt x806 = x804 + poly_mix[71] * x805; - Fp x807 = x738 - x72; - FpExt x808 = x806 + poly_mix[72] * x807; - Fp x809 = x740 - x73; - FpExt x810 = x808 + poly_mix[73] * x809; - Fp x811 = x742 - x74; - FpExt x812 = x810 + poly_mix[74] * x811; - Fp x813 = x744 - x75; - FpExt x814 = x812 + poly_mix[75] * x813; - Fp x815 = x746 - x76; - FpExt x816 = x814 + poly_mix[76] * x815; - FpExt x817 = arg2[3]; - FpExt x818 = x816 + poly_mix[77] * x817; - FpExt x819 = arg3 + x77 * x818 * poly_mix[106]; - FpExt x820 = x819 + x78 * arg4 * poly_mix[171]; - FpExt x821 = x820 + x79 * arg4 * poly_mix[198]; - FpExt x822 = x821 + x80 * arg4 * poly_mix[233]; - FpExt x823 = x822 + x81 * arg4 * poly_mix[253]; - FpExt x824 = x823 + x82 * arg4 * poly_mix[274]; - FpExt x825 = x824 + x83 * arg4 * poly_mix[304]; - FpExt x826 = x825 + poly_mix[336] * x7; - FpExt x827 = arg5 + x84 * x826 * poly_mix[395]; - Fp x828 = x85 * x86; - Fp x829 = x85 * x87; - Fp x830 = x85 * x88; - Fp x831 = x89 * x90; - Fp x832 = x91 * x92; - Fp x833 = x93 * x94; - Fp x834 = x95 * x96; - Fp x835 = x6 - x97; - Fp x836 = x98 * x97; - Fp x837 = arg0[99]; - Fp x838 = x837 * x835; - Fp x839 = x836 + x838; - Fp x840 = x839 * x77; - Fp x841 = x99 * x78; - Fp x842 = x100 * x79; - Fp x843 = x6 - x101; - Fp x844 = x102 + x5; - Fp x845 = x844 * x835; - Fp x846 = x845 * x101; - Fp x847 = x845 * x843; - Fp x848 = x846 + x847; - Fp x849 = x848 * x82; - Fp x850 = x840 + x841; - Fp x851 = x850 + x842; - Fp x852 = x851 + x849; - Fp x853 = x852 * x103; - Fp x854 = x104 * x105; - Fp x855 = x837 * x106; - Fp x856 = x837 * x84; - Fp x857 = x828 + x829; - Fp x858 = x857 + x830; - Fp x859 = x858 + x831; - Fp x860 = x859 + x832; - Fp x861 = x860 + x833; - Fp x862 = x861 + x834; - Fp x863 = x862 + x853; - Fp x864 = x863 + x854; - Fp x865 = x864 + x855; - Fp x866 = x865 + x856; - Fp x867 = x107 * x86; - Fp x868 = x107 * x87; - Fp x869 = x107 * x88; - Fp x870 = x108 * x90; - Fp x871 = x109 * x92; - Fp x872 = x110 * x94; - Fp x873 = x111 * x96; - Fp x874 = x112 * x97; - Fp x875 = arg0[102]; - Fp x876 = x875 * x835; - Fp x877 = x874 + x876; - Fp x878 = x877 * x77; - Fp x879 = x113 * x78; - Fp x880 = x114 * x79; - Fp x881 = x878 + x879; - Fp x882 = x881 + x880; - Fp x883 = x882 * x103; - Fp x884 = x114 * x105; - Fp x885 = x875 * x106; - Fp x886 = x875 * x84; - Fp x887 = x867 + x868; - Fp x888 = x887 + x869; - Fp x889 = x888 + x870; - Fp x890 = x889 + x871; - Fp x891 = x890 + x872; - Fp x892 = x891 + x873; - Fp x893 = x892 + x883; - Fp x894 = x893 + x884; - Fp x895 = x894 + x885; - Fp x896 = x895 + x886; - Fp x897 = x86 * x4; - Fp x898 = x87 * x4; - Fp x899 = x88 * x4; - Fp x900 = x90 * x4; - Fp x901 = x92 * x4; - Fp x902 = x94 * x4; - Fp x903 = x96 * x4; - Fp x904 = x115 * x5; - Fp x905 = x835 * x4; - Fp x906 = x97 + x905; - Fp x907 = x906 * x77; - Fp x908 = x78 * x4; - Fp x909 = x6 - x116; - Fp x910 = x116 * x5; - Fp x911 = x909 * x8; - Fp x912 = x910 + x911; - Fp x913 = x912 * x80; - Fp x914 = x81 * x3; - Fp x915 = x97 * x2; - Fp x916 = x835 * x3; - Fp x917 = x915 + x916; - Fp x918 = x917 * x101; - Fp x919 = x97 * x3; - Fp x920 = x919 + x916; - Fp x921 = x920 * x843; - Fp x922 = x918 + x921; - Fp x923 = x922 * x82; - Fp x924 = x904 + x907; - Fp x925 = x924 + x908; - Fp x926 = arg0[329]; - Fp x927 = x925 + x926; - Fp x928 = x927 + x913; - Fp x929 = x928 + x914; - Fp x930 = x929 + x923; - Fp x931 = arg0[607]; - Fp x932 = x930 + x931; - Fp x933 = x932 * x103; - Fp x934 = arg0[608]; - Fp x935 = x934 * x105; - Fp x936 = x98 * x106; - Fp x937 = x98 * x84; - Fp x938 = x897 + x898; - Fp x939 = x938 + x899; - Fp x940 = x939 + x900; - Fp x941 = x940 + x901; - Fp x942 = x941 + x902; - Fp x943 = x942 + x903; - Fp x944 = x943 + x933; - Fp x945 = x944 + x935; - Fp x946 = x945 + x936; - Fp x947 = x946 + x937; - Fp x948 = arg0[238]; - Fp x949 = x948 * x86; - Fp x950 = x948 * x87; - Fp x951 = x948 * x88; - Fp x952 = x948 * x90; - Fp x953 = x948 * x92; - Fp x954 = x948 * x94; - Fp x955 = x948 * x96; - Fp x956 = x117 * x97; - Fp x957 = x948 * x835; - Fp x958 = x956 + x957; - Fp x959 = x958 * x77; - Fp x960 = x116 * x1; - Fp x961 = x948 * x909; - Fp x962 = x960 + x961; - Fp x963 = x962 * x80; - Fp x964 = x835 * x101; - Fp x965 = x97 * x843; - Fp x966 = x964 + x965; - Fp x967 = x966 * x82; - Fp x968 = x959 + x78; - Fp x969 = x968 + x963; - Fp x970 = x969 + x967; - Fp x971 = x970 * x103; - Fp x972 = x118 * x106; - Fp x973 = x118 * x84; - Fp x974 = x949 + x950; - Fp x975 = x974 + x951; - Fp x976 = x975 + x952; - Fp x977 = x976 + x953; - Fp x978 = x977 + x954; - Fp x979 = x978 + x955; - Fp x980 = x979 + x971; - Fp x981 = x980 + x105; - Fp x982 = x981 + x972; - Fp x983 = x982 + x973; - Fp x984 = x866 - x119; - FpExt x985 = x827 + poly_mix[396] * x984; - Fp x986 = x896 - x120; - FpExt x987 = x985 + poly_mix[397] * x986; - Fp x988 = x947 - x121; - FpExt x989 = x987 + poly_mix[398] * x988; - Fp x990 = x983 - x122; - FpExt x991 = x989 + poly_mix[399] * x990; - FpExt x992 = x123 * x0; - FpExt x993 = x124 + x992; - FpExt x994 = x993 * x0; - FpExt x995 = x125 + x994; - FpExt x996 = x995 * x0; - FpExt x997 = x126 + x996; - arg2[17] = x997; - FpExt x998 = x127 * x0; - FpExt x999 = x128 + x998; - FpExt x1000 = x999 * x0; - FpExt x1001 = x129 + x1000; - FpExt x1002 = x1001 * x0; - FpExt x1003 = x130 + x1002; - arg2[12] = x1003; - FpExt x1004 = x131 * x0; - FpExt x1005 = x132 + x1004; - FpExt x1006 = x1005 * x0; - FpExt x1007 = x133 + x1006; - FpExt x1008 = x1007 * x0; - FpExt x1009 = x134 + x1008; - arg2[13] = x1009; - FpExt x1010 = x135 * x0; - FpExt x1011 = x136 + x1010; - FpExt x1012 = x1011 * x0; - FpExt x1013 = x137 + x1012; - FpExt x1014 = x1013 * x0; - FpExt x1015 = x138 + x1014; - arg2[14] = x1015; - FpExt x1016 = x139 * x0; - FpExt x1017 = x140 + x1016; - FpExt x1018 = x1017 * x0; - FpExt x1019 = x141 + x1018; - FpExt x1020 = x1019 * x0; - FpExt x1021 = x142 + x1020; - arg2[15] = x1021; - FpExt x1022 = x143 * x0; - FpExt x1023 = x144 + x1022; - FpExt x1024 = x1023 * x0; - FpExt x1025 = x145 + x1024; - FpExt x1026 = x1025 * x0; - FpExt x1027 = x146 + x1026; - arg2[10] = x1027; - FpExt x1028 = x147 * x0; - FpExt x1029 = x148 + x1028; - FpExt x1030 = x1029 * x0; - FpExt x1031 = x149 + x1030; - FpExt x1032 = x1031 * x0; - FpExt x1033 = x150 + x1032; - arg2[11] = x1033; - FpExt x1034 = x151 * x0; - FpExt x1035 = x152 + x1034; - FpExt x1036 = x1035 * x0; - FpExt x1037 = x153 + x1036; - FpExt x1038 = x1037 * x0; - FpExt x1039 = x154 + x1038; - FpExt x1040 = x997 * x53; - FpExt x1041 = x1040 + x1033; - arg2[24] = x1041; - FpExt x1042 = x997 * x56; - FpExt x1043 = x1042 + x1033; - FpExt x1044 = x1041 * x1043; - FpExt x1045 = x1041 * x55; - FpExt x1046 = x155 * x1043; - FpExt x1047 = x997 * x59; - FpExt x1048 = x1047 + x1033; - arg2[25] = x1048; - FpExt x1049 = x1044 * x1048; - FpExt x1050 = x1044 * x58; - FpExt x1051 = x1046 * x1048; - FpExt x1052 = x1045 * x1048; - FpExt x1053 = x156 * x0; - FpExt x1054 = x157 + x1053; - FpExt x1055 = x1054 * x0; - FpExt x1056 = x158 + x1055; - FpExt x1057 = x1056 * x0; - FpExt x1058 = x159 + x1057; - arg2[88] = x1058; - FpExt x1059 = x1058 - x1039; - arg2[19] = x1059; - FpExt x1060 = x1059 * x1049; - FpExt x1061 = x1060 - x1051; - FpExt x1062 = x1061 - x1052; - FpExt x1063 = x1062 - x1050; - FpExt x1064 = arg6 + poly_mix[0] * x1063; - FpExt x1065 = x997 * x62; - FpExt x1066 = x1065 + x1033; - FpExt x1067 = x1003 * x67; - arg2[43] = x1067; - FpExt x1068 = x1009 * x69; - FpExt x1069 = x1067 + x1068; - FpExt x1070 = x1015 * x70; - FpExt x1071 = x1069 + x1070; - FpExt x1072 = x1021 * x71; - FpExt x1073 = x1071 + x1072; - FpExt x1074 = x1073 + x1033; - FpExt x1075 = x1066 * x1074; - FpExt x1076 = x1066 * x68; - FpExt x1077 = x61 * x1074; - FpExt x1078 = x1009 * x160; - arg2[16] = x1078; - FpExt x1079 = x1067 + x1078; - arg2[44] = x1079; - FpExt x1080 = x1015 * x73; - FpExt x1081 = x1079 + x1080; - FpExt x1082 = x1021 * x74; - FpExt x1083 = x1081 + x1082; - FpExt x1084 = x1083 + x1033; - FpExt x1085 = x1075 * x1084; - FpExt x1086 = x1075 * x72; - FpExt x1087 = x1077 * x1084; - FpExt x1088 = x1076 * x1084; - FpExt x1089 = x161 * x0; - FpExt x1090 = x162 + x1089; - FpExt x1091 = x1090 * x0; - FpExt x1092 = x163 + x1091; - FpExt x1093 = x1092 * x0; - FpExt x1094 = x164 + x1093; - FpExt x1095 = x1094 - x1058; - arg2[22] = x1095; - FpExt x1096 = x1095 * x1085; - FpExt x1097 = x1096 - x1087; - FpExt x1098 = x1097 - x1088; - FpExt x1099 = x1098 - x1086; - FpExt x1100 = x1064 + poly_mix[1] * x1099; - FpExt x1101 = x1027 * x76; - FpExt x1102 = x1101 + x1033; - FpExt x1103 = x1027 * x160; - FpExt x1104 = x1103 + x1033; - arg2[18] = x1104; - FpExt x1105 = x1102 * x1104; - FpExt x1106 = x1102 * x165; - FpExt x1107 = x75 * x1104; - FpExt x1108 = x997 * x166; - FpExt x1109 = x1108 + x1033; - arg2[68] = x1109; - FpExt x1110 = x1105 * x1109; - FpExt x1111 = x1105 * x167; - FpExt x1112 = x1107 * x1109; - FpExt x1113 = x1106 * x1109; - FpExt x1114 = x168 * x0; - FpExt x1115 = x169 + x1114; - FpExt x1116 = x1115 * x0; - FpExt x1117 = x170 + x1116; - FpExt x1118 = x1117 * x0; - FpExt x1119 = x171 + x1118; - arg2[8] = x1119; - FpExt x1120 = x1119 - x1094; - arg2[23] = x1120; - FpExt x1121 = x1120 * x1110; - FpExt x1122 = x1121 - x1112; - FpExt x1123 = x1122 - x1113; - FpExt x1124 = x1123 - x1111; - FpExt x1125 = x1100 + poly_mix[2] * x1124; - FpExt x1126 = x997 * x172; - FpExt x1127 = x1126 + x1033; - FpExt x1128 = x1003 * x173; - FpExt x1129 = x1009 * x174; - FpExt x1130 = x1128 + x1129; - FpExt x1131 = x1015 * x175; - arg2[59] = x1131; - FpExt x1132 = x1130 + x1131; - FpExt x1133 = x1021 * x176; - arg2[60] = x1133; - FpExt x1134 = x1132 + x1133; - FpExt x1135 = x1134 + x1033; - FpExt x1136 = x1127 * x1135; - arg2[4] = x1136; - FpExt x1137 = x1127 * x177; - arg2[7] = x1137; - FpExt x1138 = x178 * x1135; - arg2[5] = x1138; - FpExt x1139 = x1128 + x1078; - FpExt x1140 = x1015 * x179; - arg2[20] = x1140; - FpExt x1141 = x1139 + x1140; - FpExt x1142 = x1021 * x180; - arg2[21] = x1142; - FpExt x1143 = x1141 + x1142; - FpExt x1144 = x1143 + x1033; - arg2[6] = x1144; - FpExt x1145 = x1136 * x1144; - arg2[9] = x1145; - auto x1146 = rv32im_v2_1(idx, size, arg2, x1125, x991, arg6, arg7, arg8, arg9); - - return x1146; -} - -} // namespace risc0::circuit::rv32im_v2::cuda diff --git a/risc0/circuit/rv32im-v2-sys/kernels/cuda/eval_check_3.cu b/risc0/circuit/rv32im-v2-sys/kernels/cuda/eval_check_3.cu deleted file mode 100644 index cfacdab8..00000000 --- a/risc0/circuit/rv32im-v2-sys/kernels/cuda/eval_check_3.cu +++ /dev/null @@ -1,3838 +0,0 @@ -// This code is automatically generated - -#include "supra/fp.h" - -#include "eval_check.cuh" - -#include - -namespace risc0::circuit::rv32im_v2::cuda { - -__device__ FpExt rv32im_v2_9(uint32_t idx, - uint32_t size, - FpExt arg0, - Fp* arg1, - FpExt arg2, - FpExt arg3, - FpExt arg4, - FpExt arg5, - FpExt arg6, - FpExt arg7, - FpExt arg8, - FpExt* arg9, - FpExt arg10, - const Fp* arg11, - const Fp* arg12, - const Fp* arg13, - const Fp* arg14) { - uint32_t mask = size - 1; - Fp x0(1073725597); - Fp x1(1073725596); - Fp x2(1073725595); - Fp x3(1073725594); - Fp x4(1073725593); - Fp x5(1073725592); - Fp x6(1073725573); - Fp x7(1073725572); - Fp x8(1140850687); - Fp x9(1140850686); - Fp x10(1140850685); - Fp x11(1140850684); - Fp x12(1140850683); - Fp x13(1140850682); - Fp x14(1140850681); - Fp x15(1140850680); - Fp x16(7); - Fp x17(6); - Fp x18(35); - Fp x19(65280); - Fp x20(5); - Fp x21(256); - Fp x22(65536); - Fp x23(0); - Fp x24(2013265920); - Fp x25(65535); - Fp x26(61440); - Fp x27(64); - Fp x28(8); - Fp x29(1024); - Fp x30(4096); - Fp x31(16384); - Fp x32(4); - Fp x33(16); - Fp x34(32); - Fp x35(128); - Fp x36(512); - Fp x37(2048); - Fp x38(8192); - Fp x39(32768); - Fp x40(3); - Fp x41(2); - Fp x42(1); - Fp x43 = arg11[43 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x44 = arg11[44 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x45 = arg11[45 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x46 = arg11[46 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x47 = arg11[47 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x48 = arg11[33 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x49 = arg11[34 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x50 = arg11[35 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x51 = arg11[36 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x52 = arg11[37 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x53 = arg11[38 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x54 = arg11[39 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x55 = arg11[40 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x56 = arg11[41 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x57 = arg11[64 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x58 = arg11[42 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x59 = arg11[48 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x60 = arg11[63 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x61 = arg11[77 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x62 = arg11[68 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x63 = arg11[72 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x64 = arg11[67 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x65 = arg11[70 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x66 = arg11[73 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x67 = arg11[71 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x68 = arg11[74 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x69 = arg11[0 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x70 = arg11[69 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x71 = arg11[75 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x72 = arg11[76 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x73 = arg11[78 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x74 = arg11[80 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x75 = arg11[79 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x76 = arg11[81 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x77 = arg11[83 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x78 = arg11[82 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x79 = arg11[85 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x80 = arg11[84 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x81 = arg11[86 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x82 = arg11[87 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x83 = arg11[89 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x84 = arg11[88 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x85 = arg11[90 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x86 = arg11[91 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x87 = arg11[93 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x88 = arg11[92 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x89 = arg11[95 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x90 = arg11[98 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x91 = arg11[96 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x92 = arg11[99 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x93 = arg11[94 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x94 = arg11[101 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x95 = arg11[30 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x96 = arg11[28 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x97 = arg11[102 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x98 = arg11[19 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x99 = arg11[29 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x100 = arg11[31 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x101 = arg11[20 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x102 = arg11[27 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x103 = arg11[21 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x104 = arg11[22 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x105 = arg11[23 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x106 = arg11[24 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x107 = arg11[25 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x108 = arg11[26 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x109 = arg11[30 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x110 = arg11[28 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x111 = arg11[102 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x112 = arg11[103 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x113 = arg11[104 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x114 = arg11[105 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x115 = arg11[107 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x116 = arg11[111 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x117 = arg11[106 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x118 = arg11[108 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x119 = arg11[114 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x120 = arg11[115 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x121 = arg11[112 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x122 = arg11[113 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x123 = arg11[116 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x124 = arg11[117 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x125 = arg11[118 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x126 = arg11[119 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x127 = arg11[121 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x128 = arg11[120 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x129 = arg11[6 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x130 = arg11[52 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x131 = arg11[54 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x132 = arg11[55 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x133 = arg11[56 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x134 = arg11[58 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x135 = arg11[60 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x136 = arg11[59 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x137 = arg11[62 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x138 = arg11[65 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x139 = arg11[66 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x140 = arg11[61 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x141 = arg11[49 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x142 = arg11[50 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x143 = arg11[97 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x144 = arg11[100 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x145 = arg11[32 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x146 = arg11[32 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x147 = arg11[123 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x148 = arg11[124 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x149 = arg11[122 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x150 = arg11[125 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x151 = arg11[127 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x152 = arg11[126 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x153 = arg11[128 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x154 = arg11[130 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x155 = arg11[129 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x156 = arg11[7 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x157 = arg14[37]; - Fp x158 = arg14[38]; - Fp x159 = arg14[39]; - Fp x160 = arg14[40]; - Fp x161 = arg14[41]; - Fp x162 = arg14[42]; - Fp x163 = arg11[51 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x164 = arg11[57 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x165 = arg14[43]; - Fp x166 = arg14[44]; - Fp x167 = arg14[45]; - Fp x168 = arg14[46]; - Fp x169 = arg14[47]; - Fp x170 = arg14[48]; - Fp x171 = arg14[49]; - Fp x172 = arg14[50]; - Fp x173 = arg14[51]; - Fp x174 = arg14[52]; - Fp x175 = arg11[109 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x176 = arg11[131 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x177 = arg11[133 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x178 = arg11[135 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x179 = arg11[137 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x180 = arg11[139 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x181 = arg11[141 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x182 = arg11[143 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x183 = arg11[145 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x184 = arg11[147 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x185 = arg11[149 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x186 = arg11[151 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x187 = arg11[153 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x188 = arg11[155 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x189 = arg11[157 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x190 = arg11[159 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x191 = arg11[161 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x192 = arg11[163 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x193 = arg11[165 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x194 = arg11[167 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x195 = arg11[169 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x196 = arg11[172 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x197 = arg11[171 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x198 = arg14[0]; - Fp x199 = arg14[1]; - Fp x200 = arg14[2]; - Fp x201 = arg14[3]; - Fp x202 = arg14[4]; - Fp x203 = arg14[5]; - Fp x204 = arg11[53 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x205 = arg14[6]; - Fp x206 = arg14[7]; - Fp x207 = arg14[8]; - Fp x208 = arg14[9]; - Fp x209 = x42 - x43; - Fp x210 = x43 * x209; - FpExt x211 = arg0 + poly_mix[32] * x210; - Fp x212 = x42 - x44; - Fp x213 = x44 * x212; - Fp x214 = x41 - x44; - Fp x215 = x213 * x214; - Fp x216 = x40 - x44; - Fp x217 = x215 * x216; - FpExt x218 = x211 + poly_mix[33] * x217; - Fp x219 = x41 - x45; - Fp x220 = arg1[205]; - Fp x221 = x220 * x219; - Fp x222 = x40 - x45; - Fp x223 = x221 * x222; - FpExt x224 = x218 + poly_mix[34] * x223; - Fp x225 = x42 - x46; - Fp x226 = x46 * x225; - Fp x227 = x41 - x46; - Fp x228 = x226 * x227; - Fp x229 = x40 - x46; - Fp x230 = x228 * x229; - FpExt x231 = x224 + poly_mix[35] * x230; - Fp x232 = x42 - x47; - Fp x233 = x47 * x232; - Fp x234 = x41 - x47; - Fp x235 = x233 * x234; - Fp x236 = x40 - x47; - Fp x237 = x235 * x236; - FpExt x238 = x231 + poly_mix[36] * x237; - Fp x239 = x48 * x39; - Fp x240 = x49 * x38; - Fp x241 = x239 + x240; - Fp x242 = x50 * x37; - Fp x243 = x241 + x242; - Fp x244 = x51 * x36; - Fp x245 = x243 + x244; - Fp x246 = x52 * x35; - Fp x247 = x245 + x246; - Fp x248 = x53 * x34; - Fp x249 = x247 + x248; - Fp x250 = x54 * x33; - Fp x251 = x249 + x250; - Fp x252 = x55 * x32; - Fp x253 = x251 + x252; - Fp x254 = x253 + x56; - Fp x255 = x57 - x254; - FpExt x256 = x238 + poly_mix[37] * x255; - Fp x257 = x58 * x39; - Fp x258 = x43 * x31; - Fp x259 = x257 + x258; - Fp x260 = x44 * x30; - Fp x261 = x259 + x260; - Fp x262 = x45 * x29; - Fp x263 = x261 + x262; - Fp x264 = arg1[206]; - Fp x265 = x263 + x264; - Fp x266 = x47 * x35; - Fp x267 = x265 + x266; - Fp x268 = x267 + x59; - Fp x269 = x60 - x268; - FpExt x270 = x256 + poly_mix[38] * x269; - Fp x271 = x55 * x28; - Fp x272 = x56 * x41; - Fp x273 = x271 + x272; - Fp x274 = x273 + x58; - Fp x275 = x52 * x28; - Fp x276 = x53 * x41; - Fp x277 = x275 + x276; - Fp x278 = x277 + x54; - Fp x279 = x45 * x28; - Fp x280 = x46 * x41; - Fp x281 = x279 + x280; - Fp x282 = x281 + x47; - Fp x283 = x49 * x33; - Fp x284 = x50 * x32; - Fp x285 = x283 + x284; - Fp x286 = x285 + x51; - Fp x287 = x48 * x27; - Fp x288 = x287 + x286; - Fp x289 = x43 * x32; - Fp x290 = x289 + x44; - Fp x291 = x48 * x26; - Fp x292 = x288 * x34; - Fp x293 = x291 + x292; - Fp x294 = x293 + x278; - Fp x295 = x48 * x25; - Fp x296 = arg1[23]; - Fp x297 = x296 + x274; - Fp x298 = x297 - x61; - FpExt x299 = x270 + poly_mix[39] * x298; - Fp x300 = x62 - x24; - FpExt x301 = x299 + poly_mix[40] * x300; - Fp x302 = x63 - x42; - arg1[284] = x302; - FpExt x303 = x301 + poly_mix[41] * x302; - FpExt x304 = x303 + poly_mix[42] * x23; - FpExt x305 = x304 + poly_mix[43] * x23; - Fp x306 = x64 - x61; - FpExt x307 = x305 + poly_mix[44] * x306; - Fp x308 = x65 - x66; - arg1[285] = x308; - FpExt x309 = x307 + poly_mix[45] * x308; - Fp x310 = x67 - x68; - arg1[286] = x310; - FpExt x311 = x309 + poly_mix[46] * x310; - Fp x312 = x69 - x70; - Fp x313 = x71 - x42; - FpExt x314 = x311 + poly_mix[47] * x313; - Fp x315 = x72 - x312; - FpExt x316 = x314 + poly_mix[48] * x315; - Fp x317 = x66 + x294; - Fp x318 = x68 + x295; - Fp x319 = x73 - x42; - FpExt x320 = x316 + poly_mix[49] * x319; - Fp x321 = arg1[207]; - FpExt x322 = x320 + poly_mix[50] * x321; - Fp x323 = x74 * x22; - Fp x324 = x323 + x75; - Fp x325 = x317 - x324; - FpExt x326 = x322 + poly_mix[51] * x325; - Fp x327 = x318 + x74; - Fp x328 = x76 - x42; - FpExt x329 = x326 + poly_mix[52] * x328; - Fp x330 = arg1[208]; - FpExt x331 = x329 + poly_mix[53] * x330; - Fp x332 = x77 * x22; - Fp x333 = x332 + x78; - Fp x334 = x327 - x333; - FpExt x335 = x331 + poly_mix[54] * x334; - Fp x336 = arg1[209]; - FpExt x337 = x335 + poly_mix[55] * x336; - Fp x338 = arg1[159]; - FpExt x339 = x337 + poly_mix[56] * x338; - Fp x340 = x79 * x41; - Fp x341 = x340 + x80; - Fp x342 = arg1[210]; - Fp x343 = x342 - x78; - Fp x344 = x81 - x42; - FpExt x345 = x339 + poly_mix[57] * x344; - Fp x346 = x82 - x343; - FpExt x347 = x345 + poly_mix[58] * x346; - Fp x348 = arg1[211]; - FpExt x349 = x347 + poly_mix[59] * x348; - Fp x350 = x78 * x83; - Fp x351 = arg1[212]; - Fp x352 = x350 - x351; - arg1[318] = x352; - FpExt x353 = x349 + poly_mix[60] * x352; - Fp x354 = x84 * x78; - arg1[319] = x354; - FpExt x355 = x353 + poly_mix[61] * x354; - Fp x356 = x84 * x83; - arg1[320] = x356; - FpExt x357 = x355 + poly_mix[62] * x356; - FpExt x358 = x357 + poly_mix[63] * x84; - Fp x359 = x85 - x42; - FpExt x360 = x358 + poly_mix[64] * x359; - Fp x361 = x86 * x32; - Fp x362 = x361 + x341; - Fp x363 = x362 - x75; - FpExt x364 = x360 + poly_mix[65] * x363; - Fp x365 = x78 * x31; - Fp x366 = x365 + x86; - Fp x367 = x87 - x24; - FpExt x368 = x364 + poly_mix[66] * x367; - Fp x369 = arg1[213]; - FpExt x370 = x368 + poly_mix[67] * x369; - FpExt x371 = x370 + poly_mix[68] * x23; - FpExt x372 = x371 + poly_mix[69] * x23; - Fp x373 = x88 - x366; - FpExt x374 = x372 + poly_mix[70] * x373; - Fp x375 = x89 - x90; - FpExt x376 = x374 + poly_mix[71] * x375; - Fp x377 = x91 - x92; - FpExt x378 = x376 + poly_mix[72] * x377; - Fp x379 = x69 - x93; - Fp x380 = arg1[214]; - FpExt x381 = x378 + poly_mix[73] * x380; - Fp x382 = x94 - x379; - FpExt x383 = x381 + poly_mix[74] * x382; - Fp x384 = x59 - x40; - Fp x385 = x79 * x92; - Fp x386 = arg1[215]; - Fp x387 = x386 * x90; - Fp x388 = x385 + x387; - FpExt x389 = arg2 + poly_mix[0] * x384; - FpExt x390 = x389 + poly_mix[1] * x290; - Fp x391 = arg1[10]; - FpExt x392 = x390 + poly_mix[2] * x391; - Fp x393 = arg1[13]; - FpExt x394 = x392 + poly_mix[3] * x393; - Fp x395 = x95 * x21; - Fp x396 = x395 + x96; - Fp x397 = x388 - x396; - FpExt x398 = x394 + poly_mix[4] * x397; - Fp x399 = x80 * x95; - Fp x400 = arg1[216]; - Fp x401 = x400 * x96; - Fp x402 = x399 + x401; - Fp x403 = x42 - x97; - Fp x404 = x97 * x403; - FpExt x405 = x398 + poly_mix[5] * x404; - Fp x406 = arg1[146]; - FpExt x407 = x405 + poly_mix[6] * x406; - Fp x408 = x97 * x35; - Fp x409 = arg1[192]; - Fp x410 = x408 + x409; - Fp x411 = x402 - x410; - FpExt x412 = x407 + poly_mix[7] * x411; - FpExt x413 = x383 + x98 * x412 * poly_mix[75]; - Fp x414 = x290 - x42; - FpExt x415 = x389 + poly_mix[1] * x414; - FpExt x416 = x415 + poly_mix[2] * x80; - FpExt x417 = x416 + poly_mix[3] * x404; - FpExt x418 = x417 + poly_mix[4] * x391; - Fp x419 = x97 * x39; - Fp x420 = arg1[217]; - Fp x421 = x419 + x420; - Fp x422 = x388 - x421; - FpExt x423 = x418 + poly_mix[5] * x422; - FpExt x424 = x423 + poly_mix[6] * x99; - FpExt x425 = x424 + poly_mix[7] * x100; - FpExt x426 = x413 + x101 * x425 * poly_mix[83]; - Fp x427 = x290 - x41; - FpExt x428 = x389 + poly_mix[1] * x427; - FpExt x429 = x428 + poly_mix[2] * x80; - FpExt x430 = x429 + poly_mix[3] * x79; - FpExt x431 = x430 + poly_mix[4] * x102; - FpExt x432 = x431 + poly_mix[5] * x99; - FpExt x433 = x432 + poly_mix[6] * x100; - FpExt x434 = x426 + x103 * x433 * poly_mix[91]; - Fp x435 = x290 - x32; - FpExt x436 = x389 + poly_mix[1] * x435; - FpExt x437 = x436 + poly_mix[2] * x391; - FpExt x438 = x437 + poly_mix[3] * x393; - FpExt x439 = x438 + poly_mix[4] * x397; - FpExt x440 = x439 + poly_mix[5] * x100; - FpExt x441 = x434 + x104 * x440 * poly_mix[98]; - Fp x442 = x290 - x20; - FpExt x443 = x389 + poly_mix[1] * x442; - FpExt x444 = x443 + poly_mix[2] * x80; - FpExt x445 = x444 + poly_mix[3] * x102; - FpExt x446 = x445 + poly_mix[4] * x99; - FpExt x447 = x446 + poly_mix[5] * x100; - FpExt x448 = x441 + x105 * x447 * poly_mix[104]; - FpExt x449 = x448 + x106 * arg3 * poly_mix[110]; - FpExt x450 = x449 + x107 * arg3 * poly_mix[114]; - FpExt x451 = x450 + x108 * arg3 * poly_mix[118]; - Fp x452 = x80 * x109; - Fp x453 = x400 * x110; - Fp x454 = x452 + x453; - Fp x455 = x111 * x19; - Fp x456 = x454 + x455; - Fp x457 = x456 * x98; - Fp x458 = x388 * x101; - Fp x459 = x90 * x103; - Fp x460 = x454 * x104; - Fp x461 = x388 * x105; - Fp x462 = x457 + x458; - Fp x463 = x462 + x459; - Fp x464 = x463 + x460; - Fp x465 = x464 + x461; - Fp x466 = x111 * x25; - Fp x467 = x466 * x98; - Fp x468 = x466 * x101; - Fp x469 = x92 * x103; - Fp x470 = x467 + x468; - Fp x471 = x470 + x469; - Fp x472 = x42 - x112; - Fp x473 = x112 * x472; - FpExt x474 = x451 + poly_mix[122] * x473; - Fp x475 = x282 * x113; - Fp x476 = x475 - x472; - FpExt x477 = x474 + poly_mix[123] * x476; - Fp x478 = x112 * x282; - FpExt x479 = x477 + poly_mix[124] * x478; - Fp x480 = x112 * x113; - FpExt x481 = x479 + poly_mix[125] * x480; - Fp x482 = x472 * x282; - Fp x483 = x42 - x472; - Fp x484 = x483 * x27; - Fp x485 = x296 + x484; - Fp x486 = x485 + x482; - Fp x487 = x486 - x114; - FpExt x488 = x481 + poly_mix[126] * x487; - Fp x489 = x115 - x24; - FpExt x490 = x488 + poly_mix[127] * x489; - Fp x491 = x116 - x42; - arg1[260] = x491; - FpExt x492 = x490 + poly_mix[128] * x491; - FpExt x493 = x492 + poly_mix[129] * x23; - FpExt x494 = x493 + poly_mix[130] * x23; - Fp x495 = x117 - x114; - FpExt x496 = x494 + poly_mix[131] * x495; - Fp x497 = x69 - x118; - arg1[337] = x497; - Fp x498 = x119 - x42; - FpExt x499 = x496 + poly_mix[132] * x498; - Fp x500 = x120 - x497; - FpExt x501 = x499 + poly_mix[133] * x500; - Fp x502 = x121 - x465; - FpExt x503 = x501 + poly_mix[134] * x502; - Fp x504 = x122 - x471; - FpExt x505 = x503 + poly_mix[135] * x504; - Fp x506 = x123 - x42; - FpExt x507 = x505 + poly_mix[136] * x506; - Fp x508 = arg1[11]; - FpExt x509 = x507 + poly_mix[137] * x508; - Fp x510 = arg1[218]; - Fp x511 = x510 + x124; - Fp x512 = arg1[100]; - Fp x513 = x512 - x511; - FpExt x514 = x509 + poly_mix[138] * x513; - Fp x515 = arg1[102]; - Fp x516 = x515 + x125; - Fp x517 = x126 - x42; - arg1[338] = x517; - FpExt x518 = x514 + poly_mix[139] * x517; - Fp x519 = arg1[3]; - FpExt x520 = x518 + poly_mix[140] * x519; - Fp x521 = x127 * x22; - Fp x522 = x521 + x128; - arg1[339] = x522; - Fp x523 = x516 - x522; - FpExt x524 = x520 + poly_mix[141] * x523; - FpExt x525 = arg4 + x129 * x524 * poly_mix[390]; - Fp x526 = x42 - x130; - Fp x527 = x130 * x526; - Fp x528 = x41 - x130; - Fp x529 = x527 * x528; - Fp x530 = x40 - x130; - Fp x531 = x529 * x530; - FpExt x532 = arg5 + poly_mix[2] * x531; - Fp x533 = arg1[171]; - FpExt x534 = x532 + poly_mix[3] * x533; - Fp x535 = arg1[120]; - Fp x536 = x131 - x535; - FpExt x537 = x534 + poly_mix[4] * x536; - Fp x538 = x42 - x132; - Fp x539 = x132 * x538; - FpExt x540 = x537 + poly_mix[5] * x539; - Fp x541 = x515 * x133; - Fp x542 = x541 - x538; - FpExt x543 = x540 + poly_mix[6] * x542; - Fp x544 = x132 * x515; - FpExt x545 = x543 + poly_mix[7] * x544; - Fp x546 = x132 * x133; - FpExt x547 = x545 + poly_mix[8] * x546; - FpExt x548 = x547 + poly_mix[9] * x132; - Fp x549 = arg1[145]; - FpExt x550 = x548 + poly_mix[10] * x549; - Fp x551 = x134 * x32; - Fp x552 = x551 + x130; - Fp x553 = arg1[99]; - Fp x554 = x552 - x553; - FpExt x555 = x550 + poly_mix[11] * x554; - Fp x556 = arg1[121]; - Fp x557 = x556 + x134; - FpExt x558 = x555 + poly_mix[12] * x130; - Fp x559 = x135 - x24; - FpExt x560 = x558 + poly_mix[13] * x559; - Fp x561 = x57 - x42; - arg1[278] = x561; - FpExt x562 = x560 + poly_mix[14] * x561; - FpExt x563 = x562 + poly_mix[15] * x23; - FpExt x564 = x563 + poly_mix[16] * x23; - Fp x565 = x136 - x557; - FpExt x566 = x564 + poly_mix[17] * x565; - Fp x567 = x137 - x138; - arg1[279] = x567; - FpExt x568 = x566 + poly_mix[18] * x567; - Fp x569 = x60 - x139; - arg1[280] = x569; - FpExt x570 = x568 + poly_mix[19] * x569; - Fp x571 = x69 - x140; - Fp x572 = arg1[219]; - FpExt x573 = x570 + poly_mix[20] * x572; - Fp x574 = x62 - x571; - FpExt x575 = x573 + poly_mix[21] * x574; - Fp x576 = arg1[220]; - FpExt x577 = x575 + poly_mix[22] * x576; - Fp x578 = arg1[221]; - FpExt x579 = x577 + poly_mix[23] * x578; - Fp x580 = arg1[222]; - FpExt x581 = x579 + poly_mix[24] * x580; - Fp x582 = arg1[223]; - FpExt x583 = x581 + poly_mix[25] * x582; - Fp x584 = x41 - x54; - Fp x585 = arg1[203]; - Fp x586 = x585 * x584; - Fp x587 = x40 - x54; - Fp x588 = x586 * x587; - FpExt x589 = x583 + poly_mix[26] * x588; - Fp x590 = arg1[224]; - FpExt x591 = x589 + poly_mix[27] * x590; - Fp x592 = arg1[225]; - FpExt x593 = x591 + poly_mix[28] * x592; - Fp x594 = x41 - x58; - Fp x595 = arg1[204]; - Fp x596 = x595 * x594; - Fp x597 = x40 - x58; - Fp x598 = x596 * x597; - FpExt x599 = x593 + poly_mix[29] * x598; - Fp x600 = x41 - x43; - Fp x601 = x210 * x600; - Fp x602 = x40 - x43; - Fp x603 = x601 * x602; - FpExt x604 = x599 + poly_mix[30] * x603; - FpExt x605 = x604 + poly_mix[31] * x213; - FpExt x606 = x605 + poly_mix[32] * x220; - FpExt x607 = x606 + poly_mix[33] * x230; - FpExt x608 = x607 + poly_mix[34] * x237; - Fp x609 = x41 - x59; - Fp x610 = arg1[226]; - Fp x611 = x610 * x609; - Fp x612 = x40 - x59; - Fp x613 = x611 * x612; - FpExt x614 = x608 + poly_mix[35] * x613; - Fp x615 = x41 - x141; - Fp x616 = arg1[227]; - Fp x617 = x616 * x615; - Fp x618 = x40 - x141; - Fp x619 = x617 * x618; - FpExt x620 = x614 + poly_mix[36] * x619; - Fp x621 = x50 * x39; - Fp x622 = x51 * x38; - Fp x623 = x621 + x622; - Fp x624 = x52 * x37; - Fp x625 = x623 + x624; - Fp x626 = x53 * x36; - Fp x627 = x625 + x626; - Fp x628 = x54 * x35; - Fp x629 = x627 + x628; - Fp x630 = x55 * x34; - Fp x631 = x629 + x630; - Fp x632 = x56 * x33; - Fp x633 = x631 + x632; - Fp x634 = x58 * x32; - Fp x635 = x633 + x634; - Fp x636 = x635 + x43; - Fp x637 = x139 - x636; - FpExt x638 = x620 + poly_mix[37] * x637; - Fp x639 = x44 * x39; - Fp x640 = x45 * x31; - Fp x641 = x639 + x640; - Fp x642 = x46 * x30; - Fp x643 = x641 + x642; - Fp x644 = x47 * x29; - Fp x645 = x643 + x644; - Fp x646 = arg1[228]; - Fp x647 = x645 + x646; - Fp x648 = x141 * x35; - Fp x649 = x647 + x648; - Fp x650 = x649 + x142; - Fp x651 = x138 - x650; - FpExt x652 = x638 + poly_mix[38] * x651; - Fp x653 = x58 * x28; - Fp x654 = x43 * x41; - Fp x655 = x653 + x654; - Fp x656 = x655 + x44; - Fp x657 = x54 * x28; - Fp x658 = x55 * x41; - Fp x659 = x657 + x658; - Fp x660 = x659 + x56; - Fp x661 = x47 * x28; - Fp x662 = x59 * x41; - Fp x663 = x661 + x662; - Fp x664 = x663 + x141; - Fp x665 = x51 * x33; - Fp x666 = x52 * x32; - Fp x667 = x665 + x666; - Fp x668 = x667 + x53; - Fp x669 = x50 * x27; - Fp x670 = x669 + x668; - Fp x671 = x45 * x32; - Fp x672 = x671 + x46; - Fp x673 = x50 * x26; - Fp x674 = x670 * x34; - Fp x675 = x673 + x674; - Fp x676 = x675 + x664; - Fp x677 = x50 * x25; - Fp x678 = x296 + x656; - Fp x679 = x678 - x75; - FpExt x680 = x652 + poly_mix[39] * x679; - Fp x681 = x65 - x24; - FpExt x682 = x680 + poly_mix[40] * x681; - Fp x683 = x68 - x42; - FpExt x684 = x682 + poly_mix[41] * x683; - FpExt x685 = x684 + poly_mix[42] * x23; - FpExt x686 = x685 + poly_mix[43] * x23; - Fp x687 = x70 - x75; - FpExt x688 = x686 + poly_mix[44] * x687; - Fp x689 = x63 - x71; - FpExt x690 = x688 + poly_mix[45] * x689; - Fp x691 = x66 - x72; - FpExt x692 = x690 + poly_mix[46] * x691; - Fp x693 = x69 - x67; - Fp x694 = x61 - x42; - FpExt x695 = x692 + poly_mix[47] * x694; - Fp x696 = x73 - x693; - FpExt x697 = x695 + poly_mix[48] * x696; - Fp x698 = x296 + x660; - Fp x699 = x698 - x85; - FpExt x700 = x697 + poly_mix[49] * x699; - Fp x701 = x76 - x24; - FpExt x702 = x700 + poly_mix[50] * x701; - Fp x703 = x79 - x42; - FpExt x704 = x702 + poly_mix[51] * x703; - FpExt x705 = x704 + poly_mix[52] * x23; - FpExt x706 = x705 + poly_mix[53] * x23; - Fp x707 = x74 - x85; - FpExt x708 = x706 + poly_mix[54] * x707; - Fp x709 = x77 - x81; - FpExt x710 = x708 + poly_mix[55] * x709; - Fp x711 = x80 - x82; - FpExt x712 = x710 + poly_mix[56] * x711; - Fp x713 = x69 - x78; - Fp x714 = x84 - x42; - arg1[247] = x714; - FpExt x715 = x712 + poly_mix[57] * x714; - Fp x716 = x83 - x713; - FpExt x717 = x715 + poly_mix[58] * x716; - Fp x718 = x71 + x676; - Fp x719 = x72 + x677; - Fp x720 = arg1[229]; - FpExt x721 = x717 + poly_mix[59] * x720; - Fp x722 = x42 - x87; - Fp x723 = x87 * x722; - arg1[321] = x723; - FpExt x724 = x721 + poly_mix[60] * x723; - Fp x725 = x87 * x22; - Fp x726 = x725 + x88; - Fp x727 = x718 - x726; - FpExt x728 = x724 + poly_mix[61] * x727; - Fp x729 = x719 + x87; - Fp x730 = arg1[122]; - FpExt x731 = x728 + poly_mix[62] * x730; - Fp x732 = x42 - x91; - Fp x733 = x91 * x732; - arg1[322] = x733; - FpExt x734 = x731 + poly_mix[63] * x733; - Fp x735 = x91 * x22; - Fp x736 = x735 + x89; - Fp x737 = x729 - x736; - FpExt x738 = x734 + poly_mix[64] * x737; - Fp x739 = x42 - x143; - arg1[324] = x739; - Fp x740 = x143 * x739; - arg1[323] = x740; - FpExt x741 = x738 + poly_mix[65] * x740; - Fp x742 = x42 - x90; - Fp x743 = x90 * x742; - FpExt x744 = x741 + poly_mix[66] * x743; - Fp x745 = x90 * x41; - arg1[534] = x745; - Fp x746 = x745 + x143; - Fp x747 = x342 - x89; - Fp x748 = x92 - x42; - arg1[281] = x748; - FpExt x749 = x744 + poly_mix[67] * x748; - Fp x750 = x144 - x747; - FpExt x751 = x749 + poly_mix[68] * x750; - Fp x752 = x42 - x94; - Fp x753 = x94 * x752; - FpExt x754 = x751 + poly_mix[69] * x753; - Fp x755 = x89 * x97; - Fp x756 = x755 - x752; - FpExt x757 = x754 + poly_mix[70] * x756; - Fp x758 = x94 * x89; - FpExt x759 = x757 + poly_mix[71] * x758; - Fp x760 = x94 * x97; - FpExt x761 = x759 + poly_mix[72] * x760; - FpExt x762 = x761 + poly_mix[73] * x94; - Fp x763 = arg1[230]; - FpExt x764 = x762 + poly_mix[74] * x763; - Fp x765 = x113 * x32; - Fp x766 = x765 + x746; - Fp x767 = x766 - x88; - FpExt x768 = x764 + poly_mix[75] * x767; - Fp x769 = x89 * x31; - Fp x770 = x769 + x113; - Fp x771 = arg1[231]; - FpExt x772 = x768 + poly_mix[76] * x771; - Fp x773 = arg1[232]; - FpExt x774 = x772 + poly_mix[77] * x773; - FpExt x775 = x774 + poly_mix[78] * x23; - FpExt x776 = x775 + poly_mix[79] * x23; - Fp x777 = x114 - x770; - FpExt x778 = x776 + poly_mix[80] * x777; - Fp x779 = arg1[233]; - FpExt x780 = x778 + poly_mix[81] * x779; - Fp x781 = arg1[234]; - FpExt x782 = x780 + poly_mix[82] * x781; - Fp x783 = arg1[235]; - FpExt x784 = x782 + poly_mix[83] * x783; - Fp x785 = arg1[236]; - FpExt x786 = x784 + poly_mix[84] * x785; - Fp x787 = x142 - x18; - Fp x788 = x90 * x121; - Fp x789 = x742 * x116; - Fp x790 = x788 + x789; - FpExt x791 = arg2 + poly_mix[0] * x787; - FpExt x792 = x791 + poly_mix[1] * x672; - FpExt x793 = x792 + poly_mix[2] * x391; - FpExt x794 = x793 + poly_mix[3] * x393; - Fp x795 = x790 - x396; - FpExt x796 = x794 + poly_mix[4] * x795; - FpExt x797 = x796 + poly_mix[5] * x406; - Fp x798 = arg1[147]; - FpExt x799 = x797 + poly_mix[6] * x798; - Fp x800 = x49 * x21; - Fp x801 = x800 + x145; - Fp x802 = x81 - x801; - FpExt x803 = x799 + poly_mix[7] * x802; - FpExt x804 = x786 + x98 * x803 * poly_mix[85]; - Fp x805 = x672 - x42; - FpExt x806 = x791 + poly_mix[1] * x805; - FpExt x807 = x806 + poly_mix[2] * x143; - FpExt x808 = x807 + poly_mix[3] * x102; - FpExt x809 = x808 + poly_mix[4] * x99; - FpExt x810 = x809 + poly_mix[5] * x100; - FpExt x811 = x810 + poly_mix[6] * x48; - FpExt x812 = x804 + x101 * x811 * poly_mix[93]; - Fp x813 = x672 - x41; - FpExt x814 = x791 + poly_mix[1] * x813; - FpExt x815 = x814 + poly_mix[2] * x143; - FpExt x816 = x815 + poly_mix[3] * x90; - FpExt x817 = x816 + poly_mix[4] * x102; - FpExt x818 = x817 + poly_mix[5] * x99; - FpExt x819 = x818 + poly_mix[6] * x100; - FpExt x820 = x819 + poly_mix[7] * x48; - FpExt x821 = x812 + x103 * x820 * poly_mix[100]; - FpExt x822 = x821 + x104 * arg6 * poly_mix[108]; - FpExt x823 = x822 + x105 * arg6 * poly_mix[113]; - FpExt x824 = x823 + x106 * arg6 * poly_mix[118]; - FpExt x825 = x824 + x107 * arg6 * poly_mix[123]; - FpExt x826 = x825 + x108 * arg6 * poly_mix[128]; - Fp x827 = x143 * x110; - Fp x828 = x739 * x146; - Fp x829 = x827 + x828; - Fp x830 = x739 * x109; - Fp x831 = x143 * x146; - Fp x832 = x830 + x831; - Fp x833 = x832 * x21; - Fp x834 = x829 + x833; - Fp x835 = x90 * x116; - Fp x836 = x742 * x834; - Fp x837 = x835 + x836; - Fp x838 = x837 * x98; - Fp x839 = x742 * x81; - Fp x840 = x835 + x839; - Fp x841 = x840 * x101; - Fp x842 = x81 * x103; - Fp x843 = x838 + x841; - Fp x844 = x843 + x842; - Fp x845 = x742 * x121; - Fp x846 = x90 * x834; - Fp x847 = x845 + x846; - Fp x848 = x847 * x98; - Fp x849 = x90 * x81; - Fp x850 = x845 + x849; - Fp x851 = x850 * x101; - Fp x852 = x82 * x103; - Fp x853 = x848 + x851; - Fp x854 = x853 + x852; - Fp x855 = x123 - x24; - FpExt x856 = x826 + poly_mix[133] * x855; - Fp x857 = x128 - x42; - FpExt x858 = x856 + poly_mix[134] * x857; - FpExt x859 = x858 + poly_mix[135] * x23; - FpExt x860 = x859 + poly_mix[136] * x23; - Fp x861 = x120 - x770; - FpExt x862 = x860 + poly_mix[137] * x861; - Fp x863 = x69 - x124; - Fp x864 = x147 - x42; - FpExt x865 = x862 + poly_mix[138] * x864; - Fp x866 = x148 - x863; - FpExt x867 = x865 + poly_mix[139] * x866; - Fp x868 = x127 - x844; - FpExt x869 = x867 + poly_mix[140] * x868; - Fp x870 = x149 - x854; - FpExt x871 = x869 + poly_mix[141] * x870; - Fp x872 = x150 - x42; - FpExt x873 = x871 + poly_mix[142] * x872; - Fp x874 = arg1[33]; - FpExt x875 = x873 + poly_mix[143] * x874; - Fp x876 = x151 * x22; - Fp x877 = x876 + x152; - Fp x878 = x512 - x877; - FpExt x879 = x875 + poly_mix[144] * x878; - Fp x880 = x515 + x151; - Fp x881 = x153 - x42; - FpExt x882 = x879 + poly_mix[145] * x881; - Fp x883 = arg1[36]; - FpExt x884 = x882 + poly_mix[146] * x883; - Fp x885 = x154 * x22; - Fp x886 = x885 + x155; - Fp x887 = x880 - x886; - FpExt x888 = x884 + poly_mix[147] * x887; - FpExt x889 = x525 + x156 * x888 * poly_mix[391]; - Fp x890 = arg1[237]; - Fp x891 = x890 - x42; - Fp x892 = x553 + x515; - arg1[272] = x892; - Fp x893 = arg1[238]; - Fp x894 = x893 - x42; - arg1[270] = x894; - Fp x895 = x890 - x32; - arg1[271] = x895; - Fp x896 = x890 - x20; - arg1[293] = x896; - Fp x897 = x890 - x17; - arg1[302] = x897; - Fp x898 = x890 - x16; - arg1[304] = x898; - FpExt x899 = arg2 + poly_mix[0] * x890; - Fp x900 = x102 - x24; - arg1[250] = x900; - FpExt x901 = x899 + poly_mix[1] * x900; - Fp x902 = x145 - x42; - arg1[251] = x902; - FpExt x903 = x901 + poly_mix[2] * x902; - FpExt x904 = x903 + poly_mix[3] * x23; - FpExt x905 = x904 + poly_mix[4] * x23; - Fp x906 = x96 - x15; - arg1[294] = x906; - FpExt x907 = x905 + poly_mix[5] * x906; - Fp x908 = x95 - x48; - arg1[252] = x908; - FpExt x909 = x907 + poly_mix[6] * x908; - Fp x910 = x100 - x49; - arg1[253] = x910; - FpExt x911 = x909 + poly_mix[7] * x910; - Fp x912 = x157 - x48; - FpExt x913 = x911 + poly_mix[8] * x912; - Fp x914 = x158 - x49; - FpExt x915 = x913 + poly_mix[9] * x914; - Fp x916 = x50 - x24; - arg1[256] = x916; - FpExt x917 = x915 + poly_mix[10] * x916; - Fp x918 = arg1[239]; - FpExt x919 = x917 + poly_mix[11] * x918; - FpExt x920 = x919 + poly_mix[12] * x23; - FpExt x921 = x920 + poly_mix[13] * x23; - Fp x922 = x51 - x14; - arg1[295] = x922; - FpExt x923 = x921 + poly_mix[14] * x922; - Fp x924 = x53 - x56; - arg1[257] = x924; - FpExt x925 = x923 + poly_mix[15] * x924; - Fp x926 = x54 - x58; - arg1[258] = x926; - FpExt x927 = x925 + poly_mix[16] * x926; - Fp x928 = x159 - x56; - FpExt x929 = x927 + poly_mix[17] * x928; - Fp x930 = x160 - x58; - FpExt x931 = x929 + poly_mix[18] * x930; - Fp x932 = x43 - x24; - arg1[261] = x932; - FpExt x933 = x931 + poly_mix[19] * x932; - Fp x934 = x59 - x42; - arg1[262] = x934; - FpExt x935 = x933 + poly_mix[20] * x934; - FpExt x936 = x935 + poly_mix[21] * x23; - FpExt x937 = x936 + poly_mix[22] * x23; - Fp x938 = x44 - x13; - arg1[296] = x938; - FpExt x939 = x937 + poly_mix[23] * x938; - Fp x940 = x46 - x141; - arg1[263] = x940; - FpExt x941 = x939 + poly_mix[24] * x940; - Fp x942 = x47 - x142; - arg1[264] = x942; - FpExt x943 = x941 + poly_mix[25] * x942; - Fp x944 = x161 - x141; - FpExt x945 = x943 + poly_mix[26] * x944; - Fp x946 = x162 - x142; - FpExt x947 = x945 + poly_mix[27] * x946; - Fp x948 = x163 - x24; - arg1[267] = x948; - FpExt x949 = x947 + poly_mix[28] * x948; - Fp x950 = x133 - x42; - arg1[268] = x950; - FpExt x951 = x949 + poly_mix[29] * x950; - FpExt x952 = x951 + poly_mix[30] * x23; - FpExt x953 = x952 + poly_mix[31] * x23; - Fp x954 = x130 - x12; - arg1[297] = x954; - FpExt x955 = x953 + poly_mix[32] * x954; - Fp x956 = x131 - x164; - arg1[275] = x956; - FpExt x957 = x955 + poly_mix[33] * x956; - Fp x958 = x132 - x134; - arg1[276] = x958; - FpExt x959 = x957 + poly_mix[34] * x958; - Fp x960 = x165 - x164; - FpExt x961 = x959 + poly_mix[35] * x960; - Fp x962 = x166 - x134; - FpExt x963 = x961 + poly_mix[36] * x962; - Fp x964 = x136 - x24; - arg1[277] = x964; - FpExt x965 = x963 + poly_mix[37] * x964; - FpExt x966 = x965 + poly_mix[38] * x561; - FpExt x967 = x966 + poly_mix[39] * x23; - FpExt x968 = x967 + poly_mix[40] * x23; - Fp x969 = x135 - x11; - arg1[298] = x969; - FpExt x970 = x968 + poly_mix[41] * x969; - FpExt x971 = x970 + poly_mix[42] * x567; - FpExt x972 = x971 + poly_mix[43] * x569; - Fp x973 = x167 - x138; - FpExt x974 = x972 + poly_mix[44] * x973; - Fp x975 = x168 - x139; - FpExt x976 = x974 + poly_mix[45] * x975; - Fp x977 = x64 - x24; - arg1[283] = x977; - FpExt x978 = x976 + poly_mix[46] * x977; - FpExt x979 = x978 + poly_mix[47] * x302; - FpExt x980 = x979 + poly_mix[48] * x23; - FpExt x981 = x980 + poly_mix[49] * x23; - Fp x982 = x62 - x10; - arg1[299] = x982; - FpExt x983 = x981 + poly_mix[50] * x982; - FpExt x984 = x983 + poly_mix[51] * x308; - FpExt x985 = x984 + poly_mix[52] * x310; - Fp x986 = x169 - x66; - FpExt x987 = x985 + poly_mix[53] * x986; - Fp x988 = x170 - x68; - FpExt x989 = x987 + poly_mix[54] * x988; - Fp x990 = x71 - x24; - arg1[245] = x990; - FpExt x991 = x989 + poly_mix[55] * x990; - Fp x992 = arg1[240]; - FpExt x993 = x991 + poly_mix[56] * x992; - FpExt x994 = x993 + poly_mix[57] * x23; - FpExt x995 = x994 + poly_mix[58] * x23; - Fp x996 = x72 - x9; - arg1[300] = x996; - FpExt x997 = x995 + poly_mix[59] * x996; - Fp x998 = x73 - x76; - arg1[287] = x998; - FpExt x999 = x997 + poly_mix[60] * x998; - Fp x1000 = x75 - x78; - arg1[288] = x1000; - FpExt x1001 = x999 + poly_mix[61] * x1000; - Fp x1002 = x171 - x76; - FpExt x1003 = x1001 + poly_mix[62] * x1002; - Fp x1004 = x172 - x78; - FpExt x1005 = x1003 + poly_mix[63] * x1004; - Fp x1006 = x77 - x24; - arg1[246] = x1006; - FpExt x1007 = x1005 + poly_mix[64] * x1006; - FpExt x1008 = x1007 + poly_mix[65] * x714; - FpExt x1009 = x1008 + poly_mix[66] * x23; - FpExt x1010 = x1009 + poly_mix[67] * x23; - Fp x1011 = x80 - x8; - arg1[301] = x1011; - FpExt x1012 = x1010 + poly_mix[68] * x1011; - Fp x1013 = x81 - x83; - arg1[289] = x1013; - FpExt x1014 = x1012 + poly_mix[69] * x1013; - Fp x1015 = x82 - x85; - arg1[290] = x1015; - FpExt x1016 = x1014 + poly_mix[70] * x1015; - Fp x1017 = x173 - x83; - FpExt x1018 = x1016 + poly_mix[71] * x1017; - Fp x1019 = x174 - x85; - FpExt x1020 = x1018 + poly_mix[72] * x1019; - FpExt x1021 = x1020 + poly_mix[73] * x86; - FpExt x1022 = x1021 + poly_mix[74] * x87; - FpExt x1023 = x1022 + poly_mix[75] * x89; - FpExt x1024 = x1023 + poly_mix[76] * x143; - FpExt x1025 = x1024 + poly_mix[77] * x92; - FpExt x1026 = x1025 + poly_mix[78] * x94; - FpExt x1027 = x1026 + poly_mix[79] * x112; - FpExt x1028 = x1027 + poly_mix[80] * x114; - FpExt x1029 = x1028 + poly_mix[81] * x115; - FpExt x1030 = x1029 + poly_mix[82] * x175; - FpExt x1031 = x1030 + poly_mix[83] * x116; - FpExt x1032 = x1031 + poly_mix[84] * x122; - FpExt x1033 = x1032 + poly_mix[85] * x120; - FpExt x1034 = x1033 + poly_mix[86] * x124; - FpExt x1035 = x1034 + poly_mix[87] * x126; - FpExt x1036 = x1035 + poly_mix[88] * x127; - FpExt x1037 = x1036 + poly_mix[89] * x147; - FpExt x1038 = x1037 + poly_mix[90] * x150; - FpExt x1039 = x1038 + poly_mix[91] * x151; - FpExt x1040 = x1039 + poly_mix[92] * x155; - FpExt x1041 = x1040 + poly_mix[93] * x176; - FpExt x1042 = x1041 + poly_mix[94] * x177; - FpExt x1043 = x1042 + poly_mix[95] * x178; - FpExt x1044 = x1043 + poly_mix[96] * x179; - FpExt x1045 = x1044 + poly_mix[97] * x180; - FpExt x1046 = x1045 + poly_mix[98] * x181; - FpExt x1047 = x1046 + poly_mix[99] * x182; - FpExt x1048 = x1047 + poly_mix[100] * x183; - FpExt x1049 = x1048 + poly_mix[101] * x184; - FpExt x1050 = x1049 + poly_mix[102] * x185; - FpExt x1051 = x1050 + poly_mix[103] * x186; - FpExt x1052 = x1051 + poly_mix[104] * x187; - FpExt x1053 = x1052 + poly_mix[105] * x188; - FpExt x1054 = x1053 + poly_mix[106] * x189; - FpExt x1055 = x1054 + poly_mix[107] * x190; - FpExt x1056 = x1055 + poly_mix[108] * x191; - FpExt x1057 = x1056 + poly_mix[109] * x192; - FpExt x1058 = x1057 + poly_mix[110] * x193; - FpExt x1059 = x1058 + poly_mix[111] * x194; - FpExt x1060 = x1059 + poly_mix[112] * x195; - FpExt x1061 = arg7 + x98 * x1060 * poly_mix[1]; - FpExt x1062 = arg2 + poly_mix[0] * x891; - Fp x1063 = arg1[80]; - FpExt x1064 = x1062 + poly_mix[1] * x1063; - Fp x1065 = x892 * x196; - arg1[274] = x1065; - Fp x1066 = arg1[241]; - Fp x1067 = x1065 - x1066; - FpExt x1068 = x1064 + poly_mix[2] * x1067; - Fp x1069 = x197 * x892; - FpExt x1070 = x1068 + poly_mix[3] * x1069; - Fp x1071 = x197 * x196; - arg1[303] = x1071; - FpExt x1072 = x1070 + poly_mix[4] * x1071; - FpExt x1073 = arg2 + poly_mix[0] * x900; - FpExt x1074 = x1073 + poly_mix[1] * x902; - FpExt x1075 = x1074 + poly_mix[2] * x23; - FpExt x1076 = x1075 + poly_mix[3] * x23; - Fp x1077 = x96 - x7; - arg1[291] = x1077; - FpExt x1078 = x1076 + poly_mix[4] * x1077; - FpExt x1079 = x1078 + poly_mix[5] * x908; - FpExt x1080 = x1079 + poly_mix[6] * x910; - Fp x1081 = x69 - x99; - arg1[308] = x1081; - FpExt x1082 = x1080 + poly_mix[7] * x720; - Fp x1083 = x88 - x1081; - arg1[254] = x1083; - FpExt x1084 = x1082 + poly_mix[8] * x1083; - FpExt x1085 = x1084 + poly_mix[9] * x916; - FpExt x1086 = x1085 + poly_mix[10] * x918; - FpExt x1087 = x1086 + poly_mix[11] * x23; - FpExt x1088 = x1087 + poly_mix[12] * x23; - Fp x1089 = x51 - x6; - arg1[292] = x1089; - FpExt x1090 = x1088 + poly_mix[13] * x1089; - FpExt x1091 = x1090 + poly_mix[14] * x924; - FpExt x1092 = x1091 + poly_mix[15] * x926; - Fp x1093 = x69 - x52; - arg1[309] = x1093; - Fp x1094 = arg1[242]; - FpExt x1095 = x1092 + poly_mix[16] * x1094; - Fp x1096 = x93 - x1093; - arg1[259] = x1096; - FpExt x1097 = x1095 + poly_mix[17] * x1096; - FpExt x1098 = x1097 + poly_mix[18] * x43; - FpExt x1099 = x1098 + poly_mix[19] * x59; - FpExt x1100 = x1099 + poly_mix[20] * x163; - FpExt x1101 = x1100 + poly_mix[21] * x133; - FpExt x1102 = x1101 + poly_mix[22] * x136; - FpExt x1103 = x1102 + poly_mix[23] * x57; - FpExt x1104 = x1103 + poly_mix[24] * x64; - FpExt x1105 = x1104 + poly_mix[25] * x63; - FpExt x1106 = x1105 + poly_mix[26] * x71; - FpExt x1107 = x1106 + poly_mix[27] * x74; - FpExt x1108 = x1107 + poly_mix[28] * x77; - FpExt x1109 = x1108 + poly_mix[29] * x84; - FpExt x1110 = x1109 + poly_mix[30] * x89; - FpExt x1111 = x1110 + poly_mix[31] * x143; - FpExt x1112 = x1111 + poly_mix[32] * x92; - FpExt x1113 = x1112 + poly_mix[33] * x94; - FpExt x1114 = x1113 + poly_mix[34] * x112; - FpExt x1115 = x1114 + poly_mix[35] * x114; - FpExt x1116 = x1072 + x197 * x1115 * poly_mix[5]; - Fp x1117 = x96 - x5; - FpExt x1118 = x1076 + poly_mix[4] * x1117; - FpExt x1119 = x1118 + poly_mix[5] * x720; - FpExt x1120 = x1119 + poly_mix[6] * x1083; - Fp x1121 = x48 - x198; - FpExt x1122 = x1120 + poly_mix[7] * x1121; - Fp x1123 = x49 - x199; - FpExt x1124 = x1122 + poly_mix[8] * x1123; - FpExt x1125 = x1124 + poly_mix[9] * x916; - FpExt x1126 = x1125 + poly_mix[10] * x918; - FpExt x1127 = x1126 + poly_mix[11] * x23; - FpExt x1128 = x1127 + poly_mix[12] * x23; - Fp x1129 = x51 - x4; - FpExt x1130 = x1128 + poly_mix[13] * x1129; - FpExt x1131 = x1130 + poly_mix[14] * x1094; - FpExt x1132 = x1131 + poly_mix[15] * x1096; - Fp x1133 = x56 - x200; - FpExt x1134 = x1132 + poly_mix[16] * x1133; - Fp x1135 = x58 - x201; - FpExt x1136 = x1134 + poly_mix[17] * x1135; - FpExt x1137 = x1136 + poly_mix[18] * x932; - FpExt x1138 = x1137 + poly_mix[19] * x934; - FpExt x1139 = x1138 + poly_mix[20] * x23; - FpExt x1140 = x1139 + poly_mix[21] * x23; - Fp x1141 = x44 - x3; - FpExt x1142 = x1140 + poly_mix[22] * x1141; - Fp x1143 = x69 - x45; - arg1[314] = x1143; - Fp x1144 = x89 - x42; - arg1[265] = x1144; - FpExt x1145 = x1142 + poly_mix[23] * x1144; - Fp x1146 = x91 - x1143; - arg1[266] = x1146; - FpExt x1147 = x1145 + poly_mix[24] * x1146; - Fp x1148 = x141 - x202; - FpExt x1149 = x1147 + poly_mix[25] * x1148; - Fp x1150 = x142 - x203; - FpExt x1151 = x1149 + poly_mix[26] * x1150; - FpExt x1152 = x1151 + poly_mix[27] * x948; - FpExt x1153 = x1152 + poly_mix[28] * x950; - FpExt x1154 = x1153 + poly_mix[29] * x23; - FpExt x1155 = x1154 + poly_mix[30] * x23; - Fp x1156 = x130 - x2; - FpExt x1157 = x1155 + poly_mix[31] * x1156; - Fp x1158 = x69 - x204; - arg1[317] = x1158; - FpExt x1159 = x1157 + poly_mix[32] * x369; - Fp x1160 = x90 - x1158; - arg1[269] = x1160; - FpExt x1161 = x1159 + poly_mix[33] * x1160; - Fp x1162 = x164 - x205; - FpExt x1163 = x1161 + poly_mix[34] * x1162; - Fp x1164 = x134 - x206; - FpExt x1165 = x1163 + poly_mix[35] * x1164; - FpExt x1166 = x1165 + poly_mix[36] * x964; - FpExt x1167 = x1166 + poly_mix[37] * x561; - FpExt x1168 = x1167 + poly_mix[38] * x23; - FpExt x1169 = x1168 + poly_mix[39] * x23; - Fp x1170 = x135 - x1; - FpExt x1171 = x1169 + poly_mix[40] * x1170; - FpExt x1172 = x1171 + poly_mix[41] * x748; - Fp x1173 = x144 - x571; - arg1[282] = x1173; - FpExt x1174 = x1172 + poly_mix[42] * x1173; - Fp x1175 = x138 - x207; - FpExt x1176 = x1174 + poly_mix[43] * x1175; - Fp x1177 = x139 - x208; - FpExt x1178 = x1176 + poly_mix[44] * x1177; - FpExt x1179 = x1178 + poly_mix[45] * x977; - FpExt x1180 = x1179 + poly_mix[46] * x302; - FpExt x1181 = x1180 + poly_mix[47] * x23; - FpExt x1182 = x1181 + poly_mix[48] * x23; - Fp x1183 = x62 - x0; - FpExt x1184 = x1182 + poly_mix[49] * x1183; - Fp x1185 = arg1[243]; - FpExt x1186 = x1184 + poly_mix[50] * x1185; - Fp x1187 = x97 - x312; - arg1[244] = x1187; - auto x1188 = rv32im_v2_8(idx, - size, - arg1, - x1186, - x1116, - x1061, - arg2, - x1076, - x889, - arg8, - arg9, - arg10, - arg11, - arg12, - arg13, - arg14); - - return x1188; -} -__device__ FpExt rv32im_v2_5(uint32_t idx, - uint32_t size, - Fp* arg0, - FpExt arg1, - FpExt* arg2, - FpExt arg3, - FpExt arg4, - FpExt arg5, - FpExt arg6, - FpExt arg7, - const Fp* arg8, - const Fp* arg9, - const Fp* arg10) { - uint32_t mask = size - 1; - Fp x0(1687379185); - Fp x1(1150912935); - Fp x2(1917549072); - Fp x3(1201063290); - Fp x4(395622276); - Fp x5(1997503974); - Fp x6(716894289); - Fp x7(897025192); - Fp x8(1282239129); - Fp x9(1737016378); - Fp x10(686842369); - Fp x11(622609176); - Fp x12(1339793538); - Fp x13(1518763784); - Fp x14(1989924532); - Fp x15(1170029417); - Fp x16(1917861751); - Fp x17(1333667262); - Fp x18(540703332); - Fp x19(1845603984); - Fp x20(695835963); - Fp x21(831813382); - Fp x22(1421525369); - Fp x23(1751797115); - Fp x24(1964135730); - Fp x25(525458520); - Fp x26(638242172); - Fp x27(1307439985); - Fp x28(343354132); - Fp x29(1389166148); - Fp x30(1660766320); - Fp x31(1464793095); - Fp x32(1180307149); - Fp x33(1930780904); - Fp x34(1066694495); - Fp x35(1773108264); - Fp x36(1004040026); - Fp x37(815798990); - Fp x38(454905424); - Fp x39(118043943); - Fp x40(157582794); - Fp x41(246143118); - Fp x42(314968988); - Fp x43(127253399); - Fp x44(262278199); - Fp x45(6); - Fp x46(21); - Fp x47(18); - Fp x48(24); - Fp x49(25); - Fp x50(7); - Fp x51(1073741824); - Fp x52(256); - Fp x53(4194304); - Fp x54(8); - Fp x55(5); - Fp x56(4); - Fp x57(3); - Fp x58(2); - Fp x59(1761607681); - Fp x60(1140850688); - Fp x61(2013235201); - Fp x62(1); - FpExt x63{1, 0, 0, 0}; - FpExt x64{0, 1, 0, 0}; - Fp x65(22); - Fp x66(32); - Fp x67(0); - Fp x68 = arg8[42 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x69 = arg8[107 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x70 = arg8[43 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x71 = arg8[115 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x72 = arg8[44 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x73 = arg8[123 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x74 = arg8[45 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x75 = arg8[32 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x76 = arg8[183 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x77 = arg8[182 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x78 = arg8[187 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x79 = arg8[186 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x80 = arg8[185 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x81 = arg8[184 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x82 = arg8[33 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x83 = arg8[38 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x84 = arg8[38 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x85 = arg8[39 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x86 = arg8[39 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x87 = arg8[40 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x88 = arg8[40 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x89 = arg8[41 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x90 = arg8[41 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x91 = arg8[42 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x92 = arg8[43 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x93 = arg8[44 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x94 = arg8[45 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x95 = arg8[146 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x96 = arg8[148 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x97 = arg8[150 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x98 = arg8[152 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x99 = arg8[154 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x100 = arg8[156 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x101 = arg8[158 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x102 = arg8[160 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x103 = arg8[162 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x104 = arg8[164 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x105 = arg8[166 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x106 = arg8[168 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x107 = arg8[170 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x108 = arg8[172 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x109 = arg8[174 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x110 = arg8[176 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x111 = arg8[31 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x112 = arg8[147 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x113 = arg8[149 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x114 = arg8[72 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x115 = arg8[73 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x116 = arg8[151 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x117 = arg8[153 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x118 = arg8[80 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x119 = arg8[81 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x120 = arg8[155 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x121 = arg8[157 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x122 = arg8[88 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x123 = arg8[89 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x124 = arg8[159 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x125 = arg8[161 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x126 = arg8[96 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x127 = arg8[97 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x128 = arg8[163 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x129 = arg8[165 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x130 = arg8[104 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x131 = arg8[105 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x132 = arg8[167 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x133 = arg8[169 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x134 = arg8[112 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x135 = arg8[113 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x136 = arg8[171 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x137 = arg8[173 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x138 = arg8[120 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x139 = arg8[121 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x140 = arg8[175 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x141 = arg8[177 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x142 = arg8[128 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x143 = arg8[129 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x144 = arg8[178 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x145 = arg8[180 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x146 = arg8[24 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x147 = arg8[29 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x148 = arg8[189 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x149 = arg8[188 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x150 = arg8[179 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x151 = arg8[181 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x152 = arg8[190 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x153 = arg8[29 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x154 = arg8[35 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x155 = arg8[36 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x156 = arg8[32 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x157 = arg8[37 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x158 = arg8[66 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x159 = arg8[71 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x160 = arg8[74 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x161 = arg8[79 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x162 = arg8[82 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x163 = arg8[87 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x164 = arg8[90 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x165 = arg8[95 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x166 = arg8[98 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x167 = arg8[103 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x168 = arg8[106 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x169 = arg8[111 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x170 = arg8[114 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x171 = arg8[119 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x172 = arg8[122 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x173 = arg8[127 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x174 = arg8[130 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x175 = arg8[132 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x176 = arg8[134 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x177 = arg8[136 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x178 = arg8[138 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x179 = arg8[140 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x180 = arg8[142 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x181 = arg8[144 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x182 = arg8[25 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x183 = arg8[54 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x184 = arg8[55 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x185 = arg8[56 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x186 = arg8[57 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x187 = arg8[58 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x188 = arg8[59 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x189 = arg8[60 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x190 = arg8[61 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x191 = arg8[26 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x192 = arg8[10 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x193 = arg8[34 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x194 = arg8[67 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x195 = arg8[69 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x196 = arg8[68 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x197 = arg8[36 * size + ((idx - INV_RATE * 1) & mask)]; - Fp x198 = arg8[70 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x199 = arg8[124 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x200 = arg8[125 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x201 = arg8[126 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x202 = arg0[335]; - FpExt x203 = arg1 + poly_mix[46] * x202; - Fp x204 = arg0[361]; - FpExt x205 = x203 + poly_mix[47] * x204; - Fp x206 = arg0[362]; - FpExt x207 = x205 + poly_mix[48] * x206; - Fp x208 = arg0[420]; - Fp x209 = x208 - x68; - FpExt x210 = x207 + poly_mix[49] * x209; - Fp x211 = arg0[231]; - FpExt x212 = x210 + poly_mix[50] * x211; - Fp x213 = arg0[260]; - FpExt x214 = x212 + poly_mix[51] * x213; - FpExt x215 = x214 + poly_mix[52] * x67; - FpExt x216 = x215 + poly_mix[53] * x67; - Fp x217 = arg0[421]; - Fp x218 = x69 - x217; - FpExt x219 = x216 + poly_mix[54] * x218; - Fp x220 = arg0[234]; - FpExt x221 = x219 + poly_mix[55] * x220; - Fp x222 = arg0[336]; - FpExt x223 = x221 + poly_mix[56] * x222; - Fp x224 = arg0[363]; - FpExt x225 = x223 + poly_mix[57] * x224; - Fp x226 = arg0[364]; - FpExt x227 = x225 + poly_mix[58] * x226; - Fp x228 = arg0[422]; - Fp x229 = x228 - x70; - FpExt x230 = x227 + poly_mix[59] * x229; - Fp x231 = arg0[365]; - FpExt x232 = x230 + poly_mix[60] * x231; - Fp x233 = arg0[338]; - FpExt x234 = x232 + poly_mix[61] * x233; - FpExt x235 = x234 + poly_mix[62] * x67; - FpExt x236 = x235 + poly_mix[63] * x67; - Fp x237 = arg0[423]; - Fp x238 = x71 - x237; - FpExt x239 = x236 + poly_mix[64] * x238; - Fp x240 = arg0[366]; - FpExt x241 = x239 + poly_mix[65] * x240; - Fp x242 = arg0[367]; - FpExt x243 = x241 + poly_mix[66] * x242; - Fp x244 = arg0[368]; - FpExt x245 = x243 + poly_mix[67] * x244; - Fp x246 = arg0[369]; - FpExt x247 = x245 + poly_mix[68] * x246; - Fp x248 = arg0[339]; - Fp x249 = x248 - x72; - FpExt x250 = x247 + poly_mix[69] * x249; - Fp x251 = arg0[370]; - FpExt x252 = x250 + poly_mix[70] * x251; - Fp x253 = arg0[371]; - FpExt x254 = x252 + poly_mix[71] * x253; - FpExt x255 = x254 + poly_mix[72] * x67; - FpExt x256 = x255 + poly_mix[73] * x67; - Fp x257 = arg0[424]; - Fp x258 = x73 - x257; - FpExt x259 = x256 + poly_mix[74] * x258; - Fp x260 = arg0[372]; - FpExt x261 = x259 + poly_mix[75] * x260; - Fp x262 = arg0[373]; - FpExt x263 = x261 + poly_mix[76] * x262; - Fp x264 = arg0[374]; - FpExt x265 = x263 + poly_mix[77] * x264; - Fp x266 = arg0[375]; - FpExt x267 = x265 + poly_mix[78] * x266; - Fp x268 = arg0[425]; - Fp x269 = x268 - x74; - FpExt x270 = x267 + poly_mix[79] * x269; - Fp x271 = arg0[340]; - FpExt x272 = x270 + poly_mix[80] * x271; - Fp x273 = x75 * x76; - Fp x274 = arg0[426]; - Fp x275 = x273 - x274; - FpExt x276 = x272 + poly_mix[81] * x275; - Fp x277 = x77 * x75; - FpExt x278 = x276 + poly_mix[82] * x277; - Fp x279 = arg0[427]; - FpExt x280 = x278 + poly_mix[83] * x279; - Fp x281 = x77 * x66; - Fp x282 = x274 * x65; - Fp x283 = x281 + x282; - Fp x284 = arg0[428]; - Fp x285 = x284 * x283; - Fp x286 = arg0[429]; - Fp x287 = x286 + x285; - FpExt x288 = x78 * x64; - FpExt x289 = x79 + x288; - FpExt x290 = x289 * x64; - FpExt x291 = x80 + x290; - FpExt x292 = x291 * x64; - FpExt x293 = x81 + x292; - FpExt x294 = arg2[0]; - FpExt x295 = x293 * x294; - FpExt x296 = x295 - x63; - FpExt x297 = x280 + poly_mix[84] * x296; - Fp x298 = arg0[376]; - FpExt x299 = x297 + poly_mix[85] * x298; - Fp x300 = arg0[377]; - FpExt x301 = x299 + poly_mix[86] * x300; - Fp x302 = arg0[378]; - FpExt x303 = x301 + poly_mix[87] * x302; - Fp x304 = arg0[379]; - FpExt x305 = x303 + poly_mix[88] * x304; - Fp x306 = arg0[380]; - FpExt x307 = x305 + poly_mix[89] * x306; - Fp x308 = arg0[381]; - FpExt x309 = x307 + poly_mix[90] * x308; - Fp x310 = x287 - x82; - FpExt x311 = x309 + poly_mix[91] * x310; - Fp x312 = arg0[382]; - FpExt x313 = x311 + poly_mix[92] * x312; - Fp x314 = arg0[390]; - FpExt x315 = x313 + poly_mix[93] * x314; - Fp x316 = arg0[391]; - FpExt x317 = x315 + poly_mix[94] * x316; - Fp x318 = arg0[384]; - FpExt x319 = x317 + poly_mix[95] * x318; - Fp x320 = x83 - x84; - FpExt x321 = x319 + poly_mix[96] * x320; - Fp x322 = x85 - x86; - FpExt x323 = x321 + poly_mix[97] * x322; - Fp x324 = x87 - x88; - FpExt x325 = x323 + poly_mix[98] * x324; - Fp x326 = x89 - x90; - FpExt x327 = x325 + poly_mix[99] * x326; - Fp x328 = x68 - x91; - FpExt x329 = x327 + poly_mix[100] * x328; - Fp x330 = x70 - x92; - FpExt x331 = x329 + poly_mix[101] * x330; - Fp x332 = x72 - x93; - FpExt x333 = x331 + poly_mix[102] * x332; - Fp x334 = x74 - x94; - FpExt x335 = x333 + poly_mix[103] * x334; - Fp x336 = arg0[430]; - FpExt x337 = x335 + poly_mix[104] * x336; - Fp x338 = arg0[431]; - FpExt x339 = x337 + poly_mix[105] * x338; - Fp x340 = arg0[432]; - FpExt x341 = x339 + poly_mix[106] * x340; - Fp x342 = arg0[433]; - FpExt x343 = x341 + poly_mix[107] * x342; - Fp x344 = arg0[434]; - FpExt x345 = x343 + poly_mix[108] * x344; - Fp x346 = arg0[435]; - FpExt x347 = x345 + poly_mix[109] * x346; - Fp x348 = arg0[436]; - FpExt x349 = x347 + poly_mix[110] * x348; - Fp x350 = arg0[437]; - FpExt x351 = x349 + poly_mix[111] * x350; - Fp x352 = arg0[438]; - FpExt x353 = x351 + poly_mix[112] * x352; - Fp x354 = arg0[439]; - FpExt x355 = x353 + poly_mix[113] * x354; - Fp x356 = arg0[440]; - FpExt x357 = x355 + poly_mix[114] * x356; - Fp x358 = arg0[441]; - FpExt x359 = x357 + poly_mix[115] * x358; - Fp x360 = arg0[442]; - FpExt x361 = x359 + poly_mix[116] * x360; - Fp x362 = arg0[443]; - FpExt x363 = x361 + poly_mix[117] * x362; - Fp x364 = arg0[444]; - FpExt x365 = x363 + poly_mix[118] * x364; - Fp x366 = arg0[445]; - FpExt x367 = x365 + poly_mix[119] * x366; - FpExt x368 = arg2[2]; - FpExt x369 = x367 + poly_mix[120] * x368; - FpExt x370 = x369 + poly_mix[121] * x95; - FpExt x371 = x370 + poly_mix[122] * x96; - FpExt x372 = x371 + poly_mix[123] * x97; - FpExt x373 = x372 + poly_mix[124] * x98; - FpExt x374 = x373 + poly_mix[125] * x99; - FpExt x375 = x374 + poly_mix[126] * x100; - FpExt x376 = x375 + poly_mix[127] * x101; - FpExt x377 = x376 + poly_mix[128] * x102; - FpExt x378 = x377 + poly_mix[129] * x103; - FpExt x379 = x378 + poly_mix[130] * x104; - FpExt x380 = x379 + poly_mix[131] * x105; - FpExt x381 = x380 + poly_mix[132] * x106; - FpExt x382 = x381 + poly_mix[133] * x107; - FpExt x383 = x382 + poly_mix[134] * x108; - FpExt x384 = x383 + poly_mix[135] * x109; - FpExt x385 = x384 + poly_mix[136] * x110; - FpExt x386 = arg3 + x111 * x385 * poly_mix[0]; - Fp x387 = x95 - x62; - FpExt x388 = arg3 + poly_mix[0] * x387; - Fp x389 = x83 - x112; - Fp x390 = x389 * x61; - Fp x391 = arg0[446]; - FpExt x392 = x388 + poly_mix[1] * x391; - Fp x393 = x113 - x390; - FpExt x394 = x392 + poly_mix[2] * x393; - Fp x395 = arg0[447]; - FpExt x396 = x394 + poly_mix[3] * x395; - Fp x397 = arg0[448]; - FpExt x398 = x396 + poly_mix[4] * x397; - FpExt x399 = x398 + poly_mix[5] * x67; - FpExt x400 = x399 + poly_mix[6] * x67; - Fp x401 = arg0[449]; - FpExt x402 = x400 + poly_mix[7] * x401; - Fp x403 = arg0[343]; - FpExt x404 = x402 + poly_mix[8] * x403; - Fp x405 = arg0[344]; - FpExt x406 = x404 + poly_mix[9] * x405; - Fp x407 = x114 - x112; - FpExt x408 = x406 + poly_mix[10] * x407; - Fp x409 = x115 - x390; - FpExt x410 = x408 + poly_mix[11] * x409; - Fp x411 = x97 - x62; - FpExt x412 = x410 + poly_mix[12] * x411; - Fp x413 = x85 - x116; - Fp x414 = x413 * x61; - Fp x415 = x98 - x62; - FpExt x416 = x412 + poly_mix[13] * x415; - Fp x417 = x117 - x414; - FpExt x418 = x416 + poly_mix[14] * x417; - Fp x419 = arg0[345]; - FpExt x420 = x418 + poly_mix[15] * x419; - Fp x421 = arg0[346]; - FpExt x422 = x420 + poly_mix[16] * x421; - FpExt x423 = x422 + poly_mix[17] * x67; - FpExt x424 = x423 + poly_mix[18] * x67; - Fp x425 = arg0[450]; - FpExt x426 = x424 + poly_mix[19] * x425; - Fp x427 = arg0[349]; - FpExt x428 = x426 + poly_mix[20] * x427; - Fp x429 = arg0[350]; - FpExt x430 = x428 + poly_mix[21] * x429; - Fp x431 = x118 - x116; - FpExt x432 = x430 + poly_mix[22] * x431; - Fp x433 = x119 - x414; - FpExt x434 = x432 + poly_mix[23] * x433; - Fp x435 = x99 - x62; - FpExt x436 = x434 + poly_mix[24] * x435; - Fp x437 = x87 - x120; - Fp x438 = x437 * x61; - Fp x439 = arg0[451]; - FpExt x440 = x436 + poly_mix[25] * x439; - Fp x441 = x121 - x438; - FpExt x442 = x440 + poly_mix[26] * x441; - Fp x443 = arg0[351]; - FpExt x444 = x442 + poly_mix[27] * x443; - Fp x445 = arg0[332]; - FpExt x446 = x444 + poly_mix[28] * x445; - FpExt x447 = x446 + poly_mix[29] * x67; - FpExt x448 = x447 + poly_mix[30] * x67; - Fp x449 = arg0[452]; - FpExt x450 = x448 + poly_mix[31] * x449; - Fp x451 = arg0[354]; - FpExt x452 = x450 + poly_mix[32] * x451; - Fp x453 = arg0[355]; - FpExt x454 = x452 + poly_mix[33] * x453; - Fp x455 = x122 - x120; - FpExt x456 = x454 + poly_mix[34] * x455; - Fp x457 = x123 - x438; - FpExt x458 = x456 + poly_mix[35] * x457; - Fp x459 = arg0[453]; - FpExt x460 = x458 + poly_mix[36] * x459; - Fp x461 = x89 - x124; - Fp x462 = x461 * x61; - Fp x463 = x102 - x62; - FpExt x464 = x460 + poly_mix[37] * x463; - Fp x465 = x125 - x462; - FpExt x466 = x464 + poly_mix[38] * x465; - Fp x467 = arg0[333]; - FpExt x468 = x466 + poly_mix[39] * x467; - Fp x469 = arg0[265]; - FpExt x470 = x468 + poly_mix[40] * x469; - FpExt x471 = x470 + poly_mix[41] * x67; - FpExt x472 = x471 + poly_mix[42] * x67; - Fp x473 = arg0[454]; - FpExt x474 = x472 + poly_mix[43] * x473; - Fp x475 = arg0[357]; - FpExt x476 = x474 + poly_mix[44] * x475; - Fp x477 = arg0[358]; - FpExt x478 = x476 + poly_mix[45] * x477; - Fp x479 = x126 - x124; - FpExt x480 = x478 + poly_mix[46] * x479; - Fp x481 = x127 - x462; - FpExt x482 = x480 + poly_mix[47] * x481; - Fp x483 = x103 - x62; - FpExt x484 = x482 + poly_mix[48] * x483; - Fp x485 = x68 - x128; - Fp x486 = x485 * x61; - Fp x487 = x104 - x62; - FpExt x488 = x484 + poly_mix[49] * x487; - Fp x489 = x129 - x486; - FpExt x490 = x488 + poly_mix[50] * x489; - Fp x491 = arg0[359]; - FpExt x492 = x490 + poly_mix[51] * x491; - Fp x493 = arg0[230]; - FpExt x494 = x492 + poly_mix[52] * x493; - FpExt x495 = x494 + poly_mix[53] * x67; - FpExt x496 = x495 + poly_mix[54] * x67; - Fp x497 = arg0[455]; - FpExt x498 = x496 + poly_mix[55] * x497; - FpExt x499 = x498 + poly_mix[56] * x204; - FpExt x500 = x499 + poly_mix[57] * x206; - Fp x501 = x130 - x128; - FpExt x502 = x500 + poly_mix[58] * x501; - Fp x503 = x131 - x486; - FpExt x504 = x502 + poly_mix[59] * x503; - Fp x505 = arg0[456]; - FpExt x506 = x504 + poly_mix[60] * x505; - Fp x507 = x70 - x132; - Fp x508 = x507 * x61; - Fp x509 = x106 - x62; - FpExt x510 = x506 + poly_mix[61] * x509; - Fp x511 = x133 - x508; - FpExt x512 = x510 + poly_mix[62] * x511; - FpExt x513 = x512 + poly_mix[63] * x211; - FpExt x514 = x513 + poly_mix[64] * x213; - FpExt x515 = x514 + poly_mix[65] * x67; - FpExt x516 = x515 + poly_mix[66] * x67; - FpExt x517 = x516 + poly_mix[67] * x218; - FpExt x518 = x517 + poly_mix[68] * x224; - FpExt x519 = x518 + poly_mix[69] * x226; - Fp x520 = x134 - x132; - FpExt x521 = x519 + poly_mix[70] * x520; - Fp x522 = x135 - x508; - FpExt x523 = x521 + poly_mix[71] * x522; - Fp x524 = x107 - x62; - FpExt x525 = x523 + poly_mix[72] * x524; - Fp x526 = x72 - x136; - Fp x527 = x526 * x61; - Fp x528 = x108 - x62; - FpExt x529 = x525 + poly_mix[73] * x528; - Fp x530 = x137 - x527; - FpExt x531 = x529 + poly_mix[74] * x530; - FpExt x532 = x531 + poly_mix[75] * x231; - FpExt x533 = x532 + poly_mix[76] * x233; - FpExt x534 = x533 + poly_mix[77] * x67; - FpExt x535 = x534 + poly_mix[78] * x67; - FpExt x536 = x535 + poly_mix[79] * x238; - FpExt x537 = x536 + poly_mix[80] * x244; - FpExt x538 = x537 + poly_mix[81] * x246; - Fp x539 = x138 - x136; - FpExt x540 = x538 + poly_mix[82] * x539; - Fp x541 = x139 - x527; - FpExt x542 = x540 + poly_mix[83] * x541; - Fp x543 = x109 - x62; - FpExt x544 = x542 + poly_mix[84] * x543; - Fp x545 = x74 - x140; - Fp x546 = x545 * x61; - Fp x547 = x110 - x62; - FpExt x548 = x544 + poly_mix[85] * x547; - Fp x549 = x141 - x546; - FpExt x550 = x548 + poly_mix[86] * x549; - FpExt x551 = x550 + poly_mix[87] * x251; - FpExt x552 = x551 + poly_mix[88] * x253; - FpExt x553 = x552 + poly_mix[89] * x67; - FpExt x554 = x553 + poly_mix[90] * x67; - FpExt x555 = x554 + poly_mix[91] * x258; - FpExt x556 = x555 + poly_mix[92] * x264; - FpExt x557 = x556 + poly_mix[93] * x266; - Fp x558 = x142 - x140; - FpExt x559 = x557 + poly_mix[94] * x558; - Fp x560 = x143 - x546; - FpExt x561 = x559 + poly_mix[95] * x560; - FpExt x562 = x561 + poly_mix[96] * x271; - FpExt x563 = x562 + poly_mix[97] * x275; - FpExt x564 = x563 + poly_mix[98] * x277; - FpExt x565 = x564 + poly_mix[99] * x279; - FpExt x566 = x565 + poly_mix[100] * x298; - FpExt x567 = x566 + poly_mix[101] * x300; - FpExt x568 = x567 + poly_mix[102] * x302; - FpExt x569 = x568 + poly_mix[103] * x304; - FpExt x570 = x569 + poly_mix[104] * x306; - FpExt x571 = x570 + poly_mix[105] * x308; - FpExt x572 = x571 + poly_mix[106] * x310; - FpExt x573 = x572 + poly_mix[107] * x312; - FpExt x574 = x573 + poly_mix[108] * x314; - FpExt x575 = x574 + poly_mix[109] * x316; - FpExt x576 = x575 + poly_mix[110] * x318; - FpExt x577 = x576 + poly_mix[111] * x320; - FpExt x578 = x577 + poly_mix[112] * x322; - FpExt x579 = x578 + poly_mix[113] * x324; - FpExt x580 = x579 + poly_mix[114] * x326; - FpExt x581 = x580 + poly_mix[115] * x328; - FpExt x582 = x581 + poly_mix[116] * x330; - FpExt x583 = x582 + poly_mix[117] * x332; - FpExt x584 = x583 + poly_mix[118] * x334; - FpExt x585 = x584 + poly_mix[119] * x336; - FpExt x586 = x585 + poly_mix[120] * x338; - FpExt x587 = x586 + poly_mix[121] * x340; - FpExt x588 = x587 + poly_mix[122] * x342; - FpExt x589 = x588 + poly_mix[123] * x344; - FpExt x590 = x589 + poly_mix[124] * x346; - FpExt x591 = x590 + poly_mix[125] * x348; - FpExt x592 = x591 + poly_mix[126] * x350; - FpExt x593 = x592 + poly_mix[127] * x352; - FpExt x594 = x593 + poly_mix[128] * x354; - FpExt x595 = x594 + poly_mix[129] * x356; - FpExt x596 = x595 + poly_mix[130] * x358; - FpExt x597 = x596 + poly_mix[131] * x360; - FpExt x598 = x597 + poly_mix[132] * x362; - FpExt x599 = x598 + poly_mix[133] * x364; - FpExt x600 = x599 + poly_mix[134] * x366; - FpExt x601 = x600 + poly_mix[135] * x368; - Fp x602 = arg0[457]; - FpExt x603 = x386 + x602 * x601 * poly_mix[137]; - FpExt x604 = x603 + poly_mix[248] * x144; - FpExt x605 = x604 + poly_mix[249] * x145; - FpExt x606 = arg4 + x146 * x605 * poly_mix[385]; - Fp x607 = x60 - x147; - Fp x608 = x607 * x59; - Fp x609 = arg0[341]; - FpExt x610 = arg3 + poly_mix[0] * x609; - Fp x611 = arg0[458]; - FpExt x612 = x610 + poly_mix[1] * x611; - Fp x613 = arg0[459]; - FpExt x614 = x612 + poly_mix[2] * x613; - Fp x615 = arg0[460]; - FpExt x616 = x614 + poly_mix[3] * x615; - Fp x617 = arg0[461]; - FpExt x618 = x616 + poly_mix[4] * x617; - Fp x619 = x62 - x148; - Fp x620 = x148 * x619; - FpExt x621 = x618 + poly_mix[5] * x620; - Fp x622 = x81 + x80; - Fp x623 = x622 + x79; - Fp x624 = x623 + x78; - Fp x625 = x624 + x149; - Fp x626 = x625 + x148; - Fp x627 = x626 - x62; - FpExt x628 = x621 + poly_mix[6] * x627; - Fp x629 = x79 * x58; - Fp x630 = x78 * x57; - Fp x631 = x149 * x56; - Fp x632 = x148 * x55; - Fp x633 = x80 + x629; - Fp x634 = x633 + x630; - Fp x635 = x634 + x631; - Fp x636 = x635 + x632; - Fp x637 = x636 - x76; - FpExt x638 = x628 + poly_mix[7] * x637; - FpExt x639 = x638 + poly_mix[8] * x387; - Fp x640 = x77 - x112; - Fp x641 = x640 * x61; - Fp x642 = x144 - x62; - FpExt x643 = x639 + poly_mix[9] * x642; - Fp x644 = x150 - x641; - FpExt x645 = x643 + poly_mix[10] * x644; - Fp x646 = x62 - x623; - Fp x647 = x608 + x62; - Fp x648 = x77 - x647; - FpExt x649 = arg3 + poly_mix[0] * x391; - Fp x650 = x648 - x113; - Fp x651 = x650 * x61; - Fp x652 = x145 - x62; - FpExt x653 = x649 + poly_mix[1] * x652; - Fp x654 = x151 - x651; - FpExt x655 = x653 + poly_mix[2] * x654; - FpExt x656 = x645 + x623 * x655 * poly_mix[11]; - Fp x657 = x608 - x62; - Fp x658 = x657 - x77; - Fp x659 = x658 - x113; - Fp x660 = x659 * x61; - Fp x661 = x151 - x660; - FpExt x662 = x653 + poly_mix[2] * x661; - FpExt x663 = x656 + x646 * x662 * poly_mix[14]; - Fp x664 = arg0[238]; - Fp x665 = x76 - x664; - Fp x666 = x62 - x152; - Fp x667 = x152 * x666; - FpExt x668 = x663 + poly_mix[17] * x667; - Fp x669 = x665 - x152; - FpExt x670 = x668 + poly_mix[18] * x669; - Fp x671 = x77 * x54; - Fp x672 = x60 - x671; - Fp x673 = x77 * x58; - Fp x674 = x673 + x62; - Fp x675 = x674 * x54; - Fp x676 = x60 - x675; - Fp x677 = x672 - x153; - FpExt x678 = arg5 + poly_mix[2] * x677; - Fp x679 = arg0[462]; - FpExt x680 = x678 + poly_mix[3] * x679; - Fp x681 = arg0[463]; - FpExt x682 = x680 + poly_mix[4] * x681; - Fp x683 = arg0[464]; - FpExt x684 = x682 + poly_mix[5] * x683; - Fp x685 = arg0[385]; - FpExt x686 = x684 + poly_mix[6] * x685; - FpExt x687 = x686 + poly_mix[7] * x312; - Fp x688 = x676 - x154; - FpExt x689 = x687 + poly_mix[8] * x688; - Fp x690 = arg0[465]; - FpExt x691 = x689 + poly_mix[9] * x690; - Fp x692 = arg0[466]; - FpExt x693 = x691 + poly_mix[10] * x692; - Fp x694 = arg0[392]; - FpExt x695 = x693 + poly_mix[11] * x694; - Fp x696 = arg0[393]; - FpExt x697 = x695 + poly_mix[12] * x696; - Fp x698 = arg0[394]; - FpExt x699 = x697 + poly_mix[13] * x698; - Fp x700 = arg0[395]; - FpExt x701 = x699 + poly_mix[14] * x700; - Fp x702 = arg0[396]; - FpExt x703 = x701 + poly_mix[15] * x702; - Fp x704 = arg0[397]; - FpExt x705 = x703 + poly_mix[16] * x704; - Fp x706 = arg0[398]; - FpExt x707 = x705 + poly_mix[17] * x706; - Fp x708 = arg0[399]; - FpExt x709 = x707 + poly_mix[18] * x708; - Fp x710 = arg0[400]; - FpExt x711 = x709 + poly_mix[19] * x710; - Fp x712 = arg0[401]; - FpExt x713 = x711 + poly_mix[20] * x712; - Fp x714 = arg0[402]; - FpExt x715 = x713 + poly_mix[21] * x714; - Fp x716 = arg0[403]; - FpExt x717 = x715 + poly_mix[22] * x716; - Fp x718 = arg0[404]; - FpExt x719 = x717 + poly_mix[23] * x718; - Fp x720 = arg0[405]; - FpExt x721 = x719 + poly_mix[24] * x720; - Fp x722 = arg0[406]; - FpExt x723 = x721 + poly_mix[25] * x722; - Fp x724 = arg0[407]; - FpExt x725 = x723 + poly_mix[26] * x724; - Fp x726 = arg0[408]; - FpExt x727 = x725 + poly_mix[27] * x726; - Fp x728 = arg0[409]; - FpExt x729 = x727 + poly_mix[28] * x728; - Fp x730 = arg0[410]; - FpExt x731 = x729 + poly_mix[29] * x730; - Fp x732 = arg0[411]; - FpExt x733 = x731 + poly_mix[30] * x732; - Fp x734 = arg0[412]; - FpExt x735 = x733 + poly_mix[31] * x734; - Fp x736 = arg0[413]; - FpExt x737 = x735 + poly_mix[32] * x736; - Fp x738 = arg0[414]; - FpExt x739 = x737 + poly_mix[33] * x738; - Fp x740 = arg0[415]; - FpExt x741 = x739 + poly_mix[34] * x740; - FpExt x742 = x741 + poly_mix[35] * x368; - FpExt x743 = x670 + x81 * x742 * poly_mix[19]; - Fp x744 = x77 - x53; - Fp x745 = x744 * x52; - Fp x746 = arg0[467]; - FpExt x747 = x678 + poly_mix[3] * x746; - FpExt x748 = x747 + poly_mix[4] * x681; - FpExt x749 = x748 + poly_mix[5] * x683; - FpExt x750 = x749 + poly_mix[6] * x685; - FpExt x751 = x750 + poly_mix[7] * x312; - Fp x752 = x745 - x154; - FpExt x753 = x751 + poly_mix[8] * x752; - Fp x754 = x66 - x155; - FpExt x755 = x753 + poly_mix[9] * x754; - Fp x756 = arg0[468]; - FpExt x757 = x755 + poly_mix[10] * x756; - FpExt x758 = x757 + poly_mix[11] * x694; - FpExt x759 = x758 + poly_mix[12] * x696; - FpExt x760 = x759 + poly_mix[13] * x698; - FpExt x761 = x760 + poly_mix[14] * x700; - FpExt x762 = x761 + poly_mix[15] * x702; - FpExt x763 = x762 + poly_mix[16] * x704; - FpExt x764 = x763 + poly_mix[17] * x706; - FpExt x765 = x764 + poly_mix[18] * x708; - FpExt x766 = x765 + poly_mix[19] * x710; - FpExt x767 = x766 + poly_mix[20] * x712; - FpExt x768 = x767 + poly_mix[21] * x714; - FpExt x769 = x768 + poly_mix[22] * x716; - FpExt x770 = x769 + poly_mix[23] * x718; - FpExt x771 = x770 + poly_mix[24] * x720; - FpExt x772 = x771 + poly_mix[25] * x722; - FpExt x773 = x772 + poly_mix[26] * x724; - FpExt x774 = x773 + poly_mix[27] * x726; - FpExt x775 = x774 + poly_mix[28] * x728; - FpExt x776 = x775 + poly_mix[29] * x730; - FpExt x777 = x776 + poly_mix[30] * x732; - FpExt x778 = x777 + poly_mix[31] * x734; - FpExt x779 = x778 + poly_mix[32] * x736; - FpExt x780 = x779 + poly_mix[33] * x738; - FpExt x781 = x780 + poly_mix[34] * x740; - FpExt x782 = x781 + poly_mix[35] * x368; - FpExt x783 = x743 + x80 * x782 * poly_mix[55]; - Fp x784 = x51 - x153; - FpExt x785 = arg5 + poly_mix[2] * x784; - FpExt x786 = x785 + poly_mix[3] * x746; - Fp x787 = arg0[469]; - FpExt x788 = x786 + poly_mix[4] * x787; - Fp x789 = arg0[389]; - FpExt x790 = x788 + poly_mix[5] * x789; - Fp x791 = arg0[470]; - FpExt x792 = x790 + poly_mix[6] * x791; - FpExt x793 = x792 + poly_mix[7] * x312; - FpExt x794 = x793 + poly_mix[8] * x314; - FpExt x795 = x794 + poly_mix[9] * x316; - Fp x796 = arg0[471]; - FpExt x797 = x795 + poly_mix[10] * x796; - FpExt x798 = x797 + poly_mix[11] * x694; - FpExt x799 = x798 + poly_mix[12] * x696; - FpExt x800 = x799 + poly_mix[13] * x698; - FpExt x801 = x800 + poly_mix[14] * x700; - FpExt x802 = x801 + poly_mix[15] * x702; - FpExt x803 = x802 + poly_mix[16] * x704; - FpExt x804 = x803 + poly_mix[17] * x706; - FpExt x805 = x804 + poly_mix[18] * x708; - FpExt x806 = x805 + poly_mix[19] * x710; - FpExt x807 = x806 + poly_mix[20] * x712; - FpExt x808 = x807 + poly_mix[21] * x714; - FpExt x809 = x808 + poly_mix[22] * x716; - FpExt x810 = x809 + poly_mix[23] * x718; - FpExt x811 = x810 + poly_mix[24] * x720; - FpExt x812 = x811 + poly_mix[25] * x722; - FpExt x813 = x812 + poly_mix[26] * x724; - FpExt x814 = x813 + poly_mix[27] * x726; - FpExt x815 = x814 + poly_mix[28] * x728; - FpExt x816 = x815 + poly_mix[29] * x730; - FpExt x817 = x816 + poly_mix[30] * x732; - FpExt x818 = x817 + poly_mix[31] * x734; - FpExt x819 = x818 + poly_mix[32] * x736; - FpExt x820 = x819 + poly_mix[33] * x738; - FpExt x821 = x820 + poly_mix[34] * x740; - FpExt x822 = x821 + poly_mix[35] * x368; - FpExt x823 = x783 + x79 * x822 * poly_mix[91]; - FpExt x824 = x747 + poly_mix[4] * x787; - Fp x825 = x58 - x156; - FpExt x826 = x824 + poly_mix[5] * x825; - FpExt x827 = x826 + poly_mix[6] * x685; - FpExt x828 = x827 + poly_mix[7] * x312; - FpExt x829 = x828 + poly_mix[8] * x752; - FpExt x830 = x829 + poly_mix[9] * x754; - Fp x831 = arg0[472]; - FpExt x832 = x830 + poly_mix[10] * x831; - FpExt x833 = x832 + poly_mix[11] * x694; - FpExt x834 = x833 + poly_mix[12] * x696; - FpExt x835 = x834 + poly_mix[13] * x698; - FpExt x836 = x835 + poly_mix[14] * x700; - FpExt x837 = x836 + poly_mix[15] * x702; - FpExt x838 = x837 + poly_mix[16] * x704; - FpExt x839 = x838 + poly_mix[17] * x706; - FpExt x840 = x839 + poly_mix[18] * x708; - FpExt x841 = x840 + poly_mix[19] * x710; - FpExt x842 = x841 + poly_mix[20] * x712; - FpExt x843 = x842 + poly_mix[21] * x714; - FpExt x844 = x843 + poly_mix[22] * x716; - FpExt x845 = x844 + poly_mix[23] * x718; - FpExt x846 = x845 + poly_mix[24] * x720; - FpExt x847 = x846 + poly_mix[25] * x722; - FpExt x848 = x847 + poly_mix[26] * x724; - FpExt x849 = x848 + poly_mix[27] * x726; - FpExt x850 = x849 + poly_mix[28] * x728; - FpExt x851 = x850 + poly_mix[29] * x730; - FpExt x852 = x851 + poly_mix[30] * x732; - FpExt x853 = x852 + poly_mix[31] * x734; - FpExt x854 = x853 + poly_mix[32] * x736; - FpExt x855 = x854 + poly_mix[33] * x738; - FpExt x856 = x855 + poly_mix[34] * x740; - FpExt x857 = x856 + poly_mix[35] * x368; - FpExt x858 = x823 + x78 * x857 * poly_mix[127]; - FpExt x859 = x680 + poly_mix[4] * x787; - FpExt x860 = x859 + poly_mix[5] * x825; - FpExt x861 = x860 + poly_mix[6] * x685; - FpExt x862 = x861 + poly_mix[7] * x312; - FpExt x863 = x862 + poly_mix[8] * x688; - FpExt x864 = x863 + poly_mix[9] * x690; - Fp x865 = x56 - x157; - FpExt x866 = x864 + poly_mix[10] * x865; - FpExt x867 = x866 + poly_mix[11] * x694; - FpExt x868 = x867 + poly_mix[12] * x696; - FpExt x869 = x868 + poly_mix[13] * x698; - FpExt x870 = x869 + poly_mix[14] * x700; - FpExt x871 = x870 + poly_mix[15] * x702; - FpExt x872 = x871 + poly_mix[16] * x704; - FpExt x873 = x872 + poly_mix[17] * x706; - FpExt x874 = x873 + poly_mix[18] * x708; - FpExt x875 = x874 + poly_mix[19] * x710; - FpExt x876 = x875 + poly_mix[20] * x712; - FpExt x877 = x876 + poly_mix[21] * x714; - FpExt x878 = x877 + poly_mix[22] * x716; - FpExt x879 = x878 + poly_mix[23] * x718; - FpExt x880 = x879 + poly_mix[24] * x720; - FpExt x881 = x880 + poly_mix[25] * x722; - FpExt x882 = x881 + poly_mix[26] * x724; - FpExt x883 = x882 + poly_mix[27] * x726; - FpExt x884 = x883 + poly_mix[28] * x728; - FpExt x885 = x884 + poly_mix[29] * x730; - FpExt x886 = x885 + poly_mix[30] * x732; - FpExt x887 = x886 + poly_mix[31] * x734; - FpExt x888 = x887 + poly_mix[32] * x736; - FpExt x889 = x888 + poly_mix[33] * x738; - FpExt x890 = x889 + poly_mix[34] * x740; - FpExt x891 = x890 + poly_mix[35] * x368; - FpExt x892 = x858 + x149 * x891 * poly_mix[163]; - Fp x893 = x60 - x153; - FpExt x894 = arg5 + poly_mix[2] * x893; - FpExt x895 = x894 + poly_mix[3] * x746; - FpExt x896 = x895 + poly_mix[4] * x787; - FpExt x897 = x896 + poly_mix[5] * x789; - Fp x898 = x55 - x82; - FpExt x899 = x897 + poly_mix[6] * x898; - FpExt x900 = x899 + poly_mix[7] * x312; - FpExt x901 = x900 + poly_mix[8] * x314; - FpExt x902 = x901 + poly_mix[9] * x316; - Fp x903 = x55 - x157; - FpExt x904 = x902 + poly_mix[10] * x903; - FpExt x905 = x904 + poly_mix[11] * x694; - FpExt x906 = x905 + poly_mix[12] * x696; - FpExt x907 = x906 + poly_mix[13] * x698; - FpExt x908 = x907 + poly_mix[14] * x700; - FpExt x909 = x908 + poly_mix[15] * x702; - FpExt x910 = x909 + poly_mix[16] * x704; - FpExt x911 = x910 + poly_mix[17] * x706; - FpExt x912 = x911 + poly_mix[18] * x708; - FpExt x913 = x912 + poly_mix[19] * x710; - FpExt x914 = x913 + poly_mix[20] * x712; - FpExt x915 = x914 + poly_mix[21] * x714; - FpExt x916 = x915 + poly_mix[22] * x716; - FpExt x917 = x916 + poly_mix[23] * x718; - FpExt x918 = x917 + poly_mix[24] * x720; - FpExt x919 = x918 + poly_mix[25] * x722; - FpExt x920 = x919 + poly_mix[26] * x724; - FpExt x921 = x920 + poly_mix[27] * x726; - FpExt x922 = x921 + poly_mix[28] * x728; - FpExt x923 = x922 + poly_mix[29] * x730; - FpExt x924 = x923 + poly_mix[30] * x732; - FpExt x925 = x924 + poly_mix[31] * x734; - FpExt x926 = x925 + poly_mix[32] * x736; - FpExt x927 = x926 + poly_mix[33] * x738; - FpExt x928 = x927 + poly_mix[34] * x740; - FpExt x929 = x928 + poly_mix[35] * x368; - FpExt x930 = x892 + x148 * x929 * poly_mix[176]; - FpExt x931 = x930 + poly_mix[210] * x158; - FpExt x932 = x931 + poly_mix[211] * x159; - FpExt x933 = x932 + poly_mix[212] * x160; - FpExt x934 = x933 + poly_mix[213] * x161; - FpExt x935 = x934 + poly_mix[214] * x162; - FpExt x936 = x935 + poly_mix[215] * x163; - FpExt x937 = x936 + poly_mix[216] * x164; - FpExt x938 = x937 + poly_mix[217] * x165; - FpExt x939 = x938 + poly_mix[218] * x166; - FpExt x940 = x939 + poly_mix[219] * x167; - FpExt x941 = x940 + poly_mix[220] * x168; - FpExt x942 = x941 + poly_mix[221] * x169; - FpExt x943 = x942 + poly_mix[222] * x170; - FpExt x944 = x943 + poly_mix[223] * x171; - FpExt x945 = x944 + poly_mix[224] * x172; - FpExt x946 = x945 + poly_mix[225] * x173; - FpExt x947 = x946 + poly_mix[226] * x174; - FpExt x948 = x947 + poly_mix[227] * x175; - FpExt x949 = x948 + poly_mix[228] * x176; - FpExt x950 = x949 + poly_mix[229] * x177; - FpExt x951 = x950 + poly_mix[230] * x178; - FpExt x952 = x951 + poly_mix[231] * x179; - FpExt x953 = x952 + poly_mix[232] * x180; - FpExt x954 = x953 + poly_mix[233] * x181; - FpExt x955 = x954 + poly_mix[234] * x97; - FpExt x956 = x955 + poly_mix[235] * x98; - FpExt x957 = x956 + poly_mix[236] * x99; - FpExt x958 = x957 + poly_mix[237] * x100; - FpExt x959 = x958 + poly_mix[238] * x101; - FpExt x960 = x959 + poly_mix[239] * x102; - FpExt x961 = x960 + poly_mix[240] * x103; - FpExt x962 = x961 + poly_mix[241] * x104; - FpExt x963 = x962 + poly_mix[242] * x105; - FpExt x964 = x963 + poly_mix[243] * x106; - FpExt x965 = x964 + poly_mix[244] * x107; - FpExt x966 = x965 + poly_mix[245] * x108; - FpExt x967 = x966 + poly_mix[246] * x109; - FpExt x968 = x967 + poly_mix[247] * x110; - FpExt x969 = x606 + x182 * x968 * poly_mix[387]; - Fp x970 = x183 - x112; - Fp x971 = x970 * x61; - Fp x972 = x113 - x971; - FpExt x973 = x392 + poly_mix[2] * x972; - FpExt x974 = x973 + poly_mix[3] * x395; - FpExt x975 = x974 + poly_mix[4] * x397; - FpExt x976 = x975 + poly_mix[5] * x67; - FpExt x977 = x976 + poly_mix[6] * x67; - Fp x978 = arg0[473]; - FpExt x979 = x977 + poly_mix[7] * x978; - FpExt x980 = x979 + poly_mix[8] * x403; - FpExt x981 = x980 + poly_mix[9] * x405; - FpExt x982 = x981 + poly_mix[10] * x407; - Fp x983 = x115 - x971; - FpExt x984 = x982 + poly_mix[11] * x983; - FpExt x985 = x984 + poly_mix[12] * x411; - Fp x986 = x184 - x116; - Fp x987 = x986 * x61; - FpExt x988 = x985 + poly_mix[13] * x415; - Fp x989 = x117 - x987; - FpExt x990 = x988 + poly_mix[14] * x989; - FpExt x991 = x990 + poly_mix[15] * x419; - FpExt x992 = x991 + poly_mix[16] * x421; - FpExt x993 = x992 + poly_mix[17] * x67; - FpExt x994 = x993 + poly_mix[18] * x67; - Fp x995 = arg0[474]; - FpExt x996 = x994 + poly_mix[19] * x995; - FpExt x997 = x996 + poly_mix[20] * x427; - FpExt x998 = x997 + poly_mix[21] * x429; - FpExt x999 = x998 + poly_mix[22] * x431; - Fp x1000 = x119 - x987; - FpExt x1001 = x999 + poly_mix[23] * x1000; - FpExt x1002 = x1001 + poly_mix[24] * x435; - Fp x1003 = x185 - x120; - Fp x1004 = x1003 * x61; - FpExt x1005 = x1002 + poly_mix[25] * x439; - Fp x1006 = x121 - x1004; - FpExt x1007 = x1005 + poly_mix[26] * x1006; - FpExt x1008 = x1007 + poly_mix[27] * x443; - FpExt x1009 = x1008 + poly_mix[28] * x445; - FpExt x1010 = x1009 + poly_mix[29] * x67; - FpExt x1011 = x1010 + poly_mix[30] * x67; - Fp x1012 = arg0[475]; - FpExt x1013 = x1011 + poly_mix[31] * x1012; - FpExt x1014 = x1013 + poly_mix[32] * x451; - FpExt x1015 = x1014 + poly_mix[33] * x453; - FpExt x1016 = x1015 + poly_mix[34] * x455; - Fp x1017 = x123 - x1004; - FpExt x1018 = x1016 + poly_mix[35] * x1017; - FpExt x1019 = x1018 + poly_mix[36] * x459; - Fp x1020 = x186 - x124; - Fp x1021 = x1020 * x61; - FpExt x1022 = x1019 + poly_mix[37] * x463; - Fp x1023 = x125 - x1021; - FpExt x1024 = x1022 + poly_mix[38] * x1023; - FpExt x1025 = x1024 + poly_mix[39] * x467; - FpExt x1026 = x1025 + poly_mix[40] * x469; - FpExt x1027 = x1026 + poly_mix[41] * x67; - FpExt x1028 = x1027 + poly_mix[42] * x67; - Fp x1029 = arg0[476]; - FpExt x1030 = x1028 + poly_mix[43] * x1029; - FpExt x1031 = x1030 + poly_mix[44] * x475; - FpExt x1032 = x1031 + poly_mix[45] * x477; - FpExt x1033 = x1032 + poly_mix[46] * x479; - Fp x1034 = x127 - x1021; - FpExt x1035 = x1033 + poly_mix[47] * x1034; - FpExt x1036 = x1035 + poly_mix[48] * x483; - Fp x1037 = x187 - x128; - Fp x1038 = x1037 * x61; - FpExt x1039 = x1036 + poly_mix[49] * x487; - Fp x1040 = x129 - x1038; - FpExt x1041 = x1039 + poly_mix[50] * x1040; - FpExt x1042 = x1041 + poly_mix[51] * x491; - FpExt x1043 = x1042 + poly_mix[52] * x493; - FpExt x1044 = x1043 + poly_mix[53] * x67; - FpExt x1045 = x1044 + poly_mix[54] * x67; - Fp x1046 = arg0[477]; - FpExt x1047 = x1045 + poly_mix[55] * x1046; - FpExt x1048 = x1047 + poly_mix[56] * x204; - FpExt x1049 = x1048 + poly_mix[57] * x206; - FpExt x1050 = x1049 + poly_mix[58] * x501; - Fp x1051 = x131 - x1038; - FpExt x1052 = x1050 + poly_mix[59] * x1051; - FpExt x1053 = x1052 + poly_mix[60] * x505; - Fp x1054 = x188 - x132; - Fp x1055 = x1054 * x61; - FpExt x1056 = x1053 + poly_mix[61] * x509; - Fp x1057 = x133 - x1055; - FpExt x1058 = x1056 + poly_mix[62] * x1057; - FpExt x1059 = x1058 + poly_mix[63] * x211; - FpExt x1060 = x1059 + poly_mix[64] * x213; - FpExt x1061 = x1060 + poly_mix[65] * x67; - FpExt x1062 = x1061 + poly_mix[66] * x67; - Fp x1063 = arg0[478]; - FpExt x1064 = x1062 + poly_mix[67] * x1063; - FpExt x1065 = x1064 + poly_mix[68] * x224; - FpExt x1066 = x1065 + poly_mix[69] * x226; - FpExt x1067 = x1066 + poly_mix[70] * x520; - Fp x1068 = x135 - x1055; - FpExt x1069 = x1067 + poly_mix[71] * x1068; - FpExt x1070 = x1069 + poly_mix[72] * x524; - Fp x1071 = x189 - x136; - Fp x1072 = x1071 * x61; - FpExt x1073 = x1070 + poly_mix[73] * x528; - Fp x1074 = x137 - x1072; - FpExt x1075 = x1073 + poly_mix[74] * x1074; - FpExt x1076 = x1075 + poly_mix[75] * x231; - FpExt x1077 = x1076 + poly_mix[76] * x233; - FpExt x1078 = x1077 + poly_mix[77] * x67; - FpExt x1079 = x1078 + poly_mix[78] * x67; - Fp x1080 = arg0[479]; - FpExt x1081 = x1079 + poly_mix[79] * x1080; - FpExt x1082 = x1081 + poly_mix[80] * x244; - FpExt x1083 = x1082 + poly_mix[81] * x246; - FpExt x1084 = x1083 + poly_mix[82] * x539; - Fp x1085 = x139 - x1072; - FpExt x1086 = x1084 + poly_mix[83] * x1085; - FpExt x1087 = x1086 + poly_mix[84] * x543; - Fp x1088 = x190 - x140; - Fp x1089 = x1088 * x61; - FpExt x1090 = x1087 + poly_mix[85] * x547; - Fp x1091 = x141 - x1089; - FpExt x1092 = x1090 + poly_mix[86] * x1091; - FpExt x1093 = x1092 + poly_mix[87] * x251; - FpExt x1094 = x1093 + poly_mix[88] * x253; - FpExt x1095 = x1094 + poly_mix[89] * x67; - FpExt x1096 = x1095 + poly_mix[90] * x67; - Fp x1097 = arg0[480]; - FpExt x1098 = x1096 + poly_mix[91] * x1097; - FpExt x1099 = x1098 + poly_mix[92] * x264; - FpExt x1100 = x1099 + poly_mix[93] * x266; - FpExt x1101 = x1100 + poly_mix[94] * x558; - Fp x1102 = x143 - x1089; - FpExt x1103 = x1101 + poly_mix[95] * x1102; - FpExt x1104 = x1103 + poly_mix[96] * x298; - FpExt x1105 = x1104 + poly_mix[97] * x300; - FpExt x1106 = x1105 + poly_mix[98] * x302; - FpExt x1107 = x1106 + poly_mix[99] * x304; - FpExt x1108 = x1107 + poly_mix[100] * x306; - FpExt x1109 = x1108 + poly_mix[101] * x308; - Fp x1110 = x66 - x82; - FpExt x1111 = x1109 + poly_mix[102] * x1110; - FpExt x1112 = x1111 + poly_mix[103] * x312; - FpExt x1113 = x1112 + poly_mix[104] * x314; - FpExt x1114 = x1113 + poly_mix[105] * x316; - FpExt x1115 = x1114 + poly_mix[106] * x318; - FpExt x1116 = x1115 + poly_mix[107] * x320; - FpExt x1117 = x1116 + poly_mix[108] * x322; - FpExt x1118 = x1117 + poly_mix[109] * x324; - FpExt x1119 = x1118 + poly_mix[110] * x326; - FpExt x1120 = x1119 + poly_mix[111] * x328; - FpExt x1121 = x1120 + poly_mix[112] * x330; - FpExt x1122 = x1121 + poly_mix[113] * x332; - FpExt x1123 = x1122 + poly_mix[114] * x334; - FpExt x1124 = x1123 + poly_mix[115] * x336; - FpExt x1125 = x1124 + poly_mix[116] * x338; - FpExt x1126 = x1125 + poly_mix[117] * x340; - FpExt x1127 = x1126 + poly_mix[118] * x342; - FpExt x1128 = x1127 + poly_mix[119] * x344; - FpExt x1129 = x1128 + poly_mix[120] * x346; - FpExt x1130 = x1129 + poly_mix[121] * x348; - FpExt x1131 = x1130 + poly_mix[122] * x350; - FpExt x1132 = x1131 + poly_mix[123] * x352; - FpExt x1133 = x1132 + poly_mix[124] * x354; - FpExt x1134 = x1133 + poly_mix[125] * x356; - FpExt x1135 = x1134 + poly_mix[126] * x358; - FpExt x1136 = x1135 + poly_mix[127] * x360; - FpExt x1137 = x1136 + poly_mix[128] * x362; - FpExt x1138 = x1137 + poly_mix[129] * x364; - FpExt x1139 = x1138 + poly_mix[130] * x366; - FpExt x1140 = x1139 + poly_mix[131] * x368; - FpExt x1141 = x1140 + poly_mix[132] * x144; - FpExt x1142 = x1141 + poly_mix[133] * x145; - FpExt x1143 = x969 + x191 * x1142 * poly_mix[388]; - FpExt x1144 = x1143 + poly_mix[389] * x67; - FpExt x1145 = arg6 + x192 * x1144 * poly_mix[394]; - Fp x1146 = x193 - x57; - Fp x1147 = arg0[481]; - FpExt x1148 = arg3 + poly_mix[0] * x1147; - Fp x1149 = x1146 * x194; - Fp x1150 = arg0[482]; - Fp x1151 = x1149 - x1150; - FpExt x1152 = x1148 + poly_mix[1] * x1151; - Fp x1153 = x158 * x1146; - FpExt x1154 = x1152 + poly_mix[2] * x1153; - Fp x1155 = x158 * x194; - FpExt x1156 = x1154 + poly_mix[3] * x1155; - Fp x1157 = x193 - x50; - Fp x1158 = arg0[127]; - FpExt x1159 = x1156 + poly_mix[4] * x1158; - Fp x1160 = x1157 * x195; - Fp x1161 = arg0[483]; - Fp x1162 = x1160 - x1161; - FpExt x1163 = x1159 + poly_mix[5] * x1162; - Fp x1164 = x196 * x1157; - FpExt x1165 = x1163 + poly_mix[6] * x1164; - Fp x1166 = x196 * x195; - FpExt x1167 = x1165 + poly_mix[7] * x1166; - Fp x1168 = x197 - x62; - Fp x1169 = arg0[484]; - FpExt x1170 = x1167 + poly_mix[8] * x1169; - Fp x1171 = x1168 * x159; - Fp x1172 = arg0[485]; - Fp x1173 = x1171 - x1172; - FpExt x1174 = x1170 + poly_mix[9] * x1173; - Fp x1175 = x198 * x1168; - FpExt x1176 = x1174 + poly_mix[10] * x1175; - Fp x1177 = x198 * x159; - FpExt x1178 = x1176 + poly_mix[11] * x1177; - Fp x1179 = x197 - x196; - arg0[538] = x1179; - Fp x1180 = x158 * x49; - Fp x1181 = x1150 - x196; - Fp x1182 = x1181 * x48; - Fp x1183 = x1180 + x1182; - Fp x1184 = x196 * x1172; - Fp x1185 = x1184 * x47; - Fp x1186 = x1183 + x1185; - Fp x1187 = x196 * x198; - Fp x1188 = x1187 * x46; - Fp x1189 = x1186 + x1188; - arg0[535] = x1189; - Fp x1190 = x193 + x62; - Fp x1191 = x1181 * x1190; - arg0[536] = x1191; - Fp x1192 = arg0[2]; - FpExt x1193 = x1178 + poly_mix[12] * x1192; - Fp x1194 = arg0[3]; - FpExt x1195 = x1193 + poly_mix[13] * x1194; - Fp x1196 = arg0[4]; - FpExt x1197 = x1195 + poly_mix[14] * x1196; - Fp x1198 = arg0[29]; - FpExt x1199 = x1197 + poly_mix[15] * x1198; - Fp x1200 = arg0[30]; - FpExt x1201 = x1199 + poly_mix[16] * x1200; - Fp x1202 = arg0[31]; - FpExt x1203 = x1201 + poly_mix[17] * x1202; - Fp x1204 = arg0[32]; - FpExt x1205 = x1203 + poly_mix[18] * x1204; - Fp x1206 = arg0[33]; - FpExt x1207 = x1205 + poly_mix[19] * x1206; - Fp x1208 = x138 + x139; - Fp x1209 = x1208 + x172; - Fp x1210 = x1209 + x73; - Fp x1211 = x1210 + x199; - Fp x1212 = x1211 + x200; - Fp x1213 = x1212 + x201; - Fp x1214 = x1213 + x173; - Fp x1215 = x1214 - x62; - FpExt x1216 = x1207 + poly_mix[20] * x1215; - Fp x1217 = x73 * x57; - Fp x1218 = x199 * x56; - Fp x1219 = x200 * x55; - Fp x1220 = x201 * x45; - Fp x1221 = x173 * x50; - Fp x1222 = arg0[486]; - Fp x1223 = x1222 + x1217; - Fp x1224 = x1223 + x1218; - Fp x1225 = x1224 + x1219; - Fp x1226 = x1225 + x1220; - Fp x1227 = x1226 + x1221; - Fp x1228 = x1227 - x193; - FpExt x1229 = x1216 + poly_mix[21] * x1228; - Fp x1230 = x138 * x44; - arg0[487] = x1230; - Fp x1231 = x138 * x43; - arg0[489] = x1231; - Fp x1232 = x138 * x42; - arg0[491] = x1232; - Fp x1233 = x138 * x41; - arg0[493] = x1233; - Fp x1234 = x138 * x40; - arg0[495] = x1234; - Fp x1235 = x138 * x39; - arg0[497] = x1235; - Fp x1236 = x138 * x38; - arg0[499] = x1236; - Fp x1237 = x138 * x37; - arg0[501] = x1237; - Fp x1238 = x138 * x36; - arg0[503] = x1238; - Fp x1239 = x138 * x35; - arg0[505] = x1239; - Fp x1240 = x138 * x34; - arg0[507] = x1240; - Fp x1241 = x138 * x33; - arg0[509] = x1241; - Fp x1242 = x138 * x32; - arg0[511] = x1242; - Fp x1243 = x138 * x31; - arg0[513] = x1243; - Fp x1244 = x138 * x30; - arg0[515] = x1244; - Fp x1245 = x138 * x29; - arg0[517] = x1245; - Fp x1246 = x138 * x28; - arg0[519] = x1246; - Fp x1247 = x138 * x27; - arg0[521] = x1247; - Fp x1248 = x138 * x26; - arg0[523] = x1248; - Fp x1249 = x138 * x25; - arg0[525] = x1249; - Fp x1250 = x138 * x24; - arg0[527] = x1250; - Fp x1251 = x138 * x23; - arg0[529] = x1251; - Fp x1252 = x138 * x22; - arg0[530] = x1252; - Fp x1253 = x138 * x21; - arg0[531] = x1253; - Fp x1254 = x139 * x20; - arg0[488] = x1254; - Fp x1255 = x139 * x19; - arg0[490] = x1255; - Fp x1256 = x139 * x18; - arg0[492] = x1256; - Fp x1257 = x139 * x17; - arg0[494] = x1257; - Fp x1258 = x139 * x16; - arg0[496] = x1258; - Fp x1259 = x139 * x15; - arg0[498] = x1259; - Fp x1260 = x139 * x14; - arg0[500] = x1260; - Fp x1261 = x139 * x13; - arg0[502] = x1261; - Fp x1262 = x139 * x12; - arg0[504] = x1262; - Fp x1263 = x139 * x11; - arg0[506] = x1263; - Fp x1264 = x139 * x10; - arg0[508] = x1264; - Fp x1265 = x139 * x9; - arg0[510] = x1265; - Fp x1266 = x139 * x8; - arg0[512] = x1266; - Fp x1267 = x139 * x7; - arg0[514] = x1267; - Fp x1268 = x139 * x6; - arg0[516] = x1268; - Fp x1269 = x139 * x5; - arg0[518] = x1269; - Fp x1270 = x139 * x4; - arg0[520] = x1270; - Fp x1271 = x139 * x3; - arg0[522] = x1271; - Fp x1272 = x139 * x2; - arg0[524] = x1272; - Fp x1273 = x139 * x1; - arg0[526] = x1273; - Fp x1274 = x139 * x0; - arg0[528] = x1274; - auto x1275 = rv32im_v2_4(idx, size, arg0, x1229, arg2, arg3, arg7, x1145, arg8, arg9, arg10); - - return x1275; -} -__device__ FpExt rv32im_v2_1(uint32_t idx, - uint32_t size, - FpExt* arg0, - FpExt arg1, - FpExt arg2, - FpExt arg3, - const Fp* arg4, - const Fp* arg5, - const Fp* arg6) { - uint32_t mask = size - 1; - FpExt x0{0, 1, 0, 0}; - Fp x1 = arg4[91 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x2 = arg5[15 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x3 = arg5[14 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x4 = arg5[13 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x5 = arg5[12 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x6 = arg4[95 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x7 = arg4[96 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x8 = arg4[98 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x9 = arg4[99 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x10 = arg4[100 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x11 = arg4[97 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x12 = arg4[94 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x13 = arg4[102 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x14 = arg4[103 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x15 = arg4[101 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x16 = arg5[19 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x17 = arg5[18 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x18 = arg5[17 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x19 = arg5[16 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x20 = arg4[105 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x21 = arg4[107 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x22 = arg4[109 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x23 = arg4[110 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x24 = arg4[111 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x25 = arg4[108 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x26 = arg4[104 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x27 = arg4[113 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x28 = arg4[114 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x29 = arg4[112 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x30 = arg5[23 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x31 = arg5[22 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x32 = arg5[21 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x33 = arg5[20 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x34 = arg4[116 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x35 = arg4[28 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x36 = arg4[27 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x37 = arg4[115 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x38 = arg4[30 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x39 = arg4[29 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x40 = arg5[27 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x41 = arg5[26 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x42 = arg5[25 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x43 = arg5[24 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x44 = arg4[32 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x45 = arg4[34 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x46 = arg4[33 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x47 = arg4[31 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x48 = arg4[36 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x49 = arg4[35 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x50 = arg5[31 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x51 = arg5[30 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x52 = arg5[29 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x53 = arg5[28 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x54 = arg5[75 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x55 = arg5[74 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x56 = arg5[73 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x57 = arg5[72 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x58 = arg4[1 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x59 = arg4[2 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x60 = arg4[3 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x61 = arg6[3]; - Fp x62 = arg6[2]; - Fp x63 = arg6[1]; - Fp x64 = arg6[0]; - Fp x65 = arg4[84 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x66 = arg4[83 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x67 = arg4[81 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x68 = arg4[88 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x69 = arg4[87 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x70 = arg4[89 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x71 = arg4[90 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x72 = arg4[106 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x73 = arg4[117 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x74 = arg4[119 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x75 = arg4[118 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x76 = arg4[37 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x77 = arg4[40 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x78 = arg4[42 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x79 = arg4[41 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x80 = arg4[39 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x81 = arg4[44 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x82 = arg4[43 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x83 = arg4[46 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x84 = arg4[48 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x85 = arg4[47 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x86 = arg4[45 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x87 = arg4[50 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x88 = arg4[49 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x89 = arg4[52 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x90 = arg4[54 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x91 = arg4[53 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x92 = arg4[51 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x93 = arg4[56 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x94 = arg4[55 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x95 = arg5[35 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x96 = arg5[34 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x97 = arg5[33 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x98 = arg5[32 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x99 = arg4[58 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x100 = arg4[60 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x101 = arg4[59 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x102 = arg4[57 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x103 = arg4[62 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x104 = arg4[61 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x105 = arg5[39 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x106 = arg5[38 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x107 = arg5[37 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x108 = arg5[36 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x109 = arg4[64 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x110 = arg4[143 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x111 = arg4[145 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x112 = arg4[146 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x113 = arg4[147 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x114 = arg4[144 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x115 = arg4[63 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x116 = arg4[149 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x117 = arg4[150 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x118 = arg4[148 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x119 = arg5[43 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x120 = arg5[42 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x121 = arg5[41 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x122 = arg5[40 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x123 = arg4[152 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x124 = arg4[154 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x125 = arg4[153 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x126 = arg4[151 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x127 = arg4[157 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x128 = arg4[156 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x129 = arg5[47 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x130 = arg5[46 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x131 = arg5[45 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x132 = arg5[44 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x133 = arg4[4 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x134 = arg4[93 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x135 = arg4[120 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x136 = arg4[122 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x137 = arg4[123 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x138 = arg4[121 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x139 = arg4[125 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x140 = arg4[124 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x141 = arg4[66 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x142 = arg4[65 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x143 = arg4[68 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x144 = arg4[67 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x145 = arg4[70 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x146 = arg4[155 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x147 = arg4[69 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x148 = arg4[159 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x149 = arg4[160 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x150 = arg4[158 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x151 = arg4[162 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x152 = arg4[164 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x153 = arg4[163 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x154 = arg4[161 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x155 = arg4[167 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x156 = arg4[166 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x157 = arg5[51 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x158 = arg5[50 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x159 = arg5[49 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x160 = arg5[48 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x161 = arg4[5 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x162 = arg4[71 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x163 = arg4[73 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x164 = arg4[74 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x165 = arg4[72 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x166 = arg4[76 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x167 = arg4[75 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x168 = arg4[79 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x169 = arg4[82 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x170 = arg4[78 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x171 = arg4[86 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x172 = arg4[92 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x173 = arg4[6 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x174 = arg4[77 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x175 = arg4[80 * size + ((idx - INV_RATE * 0) & mask)]; - Fp x176 = arg4[85 * size + ((idx - INV_RATE * 0) & mask)]; - FpExt x177 = arg0[4]; - FpExt x178 = x177 * x1; - FpExt x179 = arg0[5]; - FpExt x180 = arg0[6]; - FpExt x181 = x179 * x180; - FpExt x182 = arg0[7]; - FpExt x183 = x182 * x180; - FpExt x184 = x2 * x0; - FpExt x185 = x3 + x184; - FpExt x186 = x185 * x0; - FpExt x187 = x4 + x186; - FpExt x188 = x187 * x0; - FpExt x189 = x5 + x188; - FpExt x190 = arg0[8]; - FpExt x191 = x189 - x190; - arg0[53] = x191; - FpExt x192 = arg0[9]; - FpExt x193 = x191 * x192; - FpExt x194 = x193 - x181; - FpExt x195 = x194 - x183; - FpExt x196 = x195 - x178; - FpExt x197 = arg1 + poly_mix[3] * x196; - FpExt x198 = arg0[10]; - FpExt x199 = x198 * x6; - FpExt x200 = arg0[11]; - FpExt x201 = x199 + x200; - FpExt x202 = arg0[12]; - FpExt x203 = x202 * x7; - FpExt x204 = arg0[13]; - FpExt x205 = x204 * x8; - FpExt x206 = x203 + x205; - FpExt x207 = arg0[14]; - FpExt x208 = x207 * x9; - FpExt x209 = x206 + x208; - FpExt x210 = arg0[15]; - FpExt x211 = x210 * x10; - FpExt x212 = x209 + x211; - FpExt x213 = x212 + x200; - FpExt x214 = x201 * x213; - FpExt x215 = x201 * x11; - FpExt x216 = x12 * x213; - FpExt x217 = arg0[16]; - FpExt x218 = x203 + x217; - FpExt x219 = x207 * x13; - FpExt x220 = x218 + x219; - FpExt x221 = x210 * x14; - FpExt x222 = x220 + x221; - FpExt x223 = x222 + x200; - FpExt x224 = x214 * x223; - FpExt x225 = x214 * x15; - FpExt x226 = x216 * x223; - FpExt x227 = x215 * x223; - FpExt x228 = x16 * x0; - FpExt x229 = x17 + x228; - FpExt x230 = x229 * x0; - FpExt x231 = x18 + x230; - FpExt x232 = x231 * x0; - FpExt x233 = x19 + x232; - FpExt x234 = x233 - x189; - arg0[56] = x234; - FpExt x235 = x234 * x224; - FpExt x236 = x235 - x226; - FpExt x237 = x236 - x227; - FpExt x238 = x237 - x225; - FpExt x239 = x197 + poly_mix[4] * x238; - FpExt x240 = x198 * x20; - FpExt x241 = x240 + x200; - FpExt x242 = x202 * x21; - arg0[79] = x242; - FpExt x243 = x204 * x22; - FpExt x244 = x242 + x243; - FpExt x245 = x207 * x23; - FpExt x246 = x244 + x245; - FpExt x247 = x210 * x24; - FpExt x248 = x246 + x247; - FpExt x249 = x248 + x200; - FpExt x250 = x241 * x249; - FpExt x251 = x241 * x25; - FpExt x252 = x26 * x249; - FpExt x253 = x242 + x217; - arg0[83] = x253; - FpExt x254 = x207 * x27; - FpExt x255 = x253 + x254; - FpExt x256 = x210 * x28; - FpExt x257 = x255 + x256; - FpExt x258 = x257 + x200; - FpExt x259 = x250 * x258; - FpExt x260 = x250 * x29; - FpExt x261 = x252 * x258; - FpExt x262 = x251 * x258; - FpExt x263 = x30 * x0; - FpExt x264 = x31 + x263; - FpExt x265 = x264 * x0; - FpExt x266 = x32 + x265; - FpExt x267 = x266 * x0; - FpExt x268 = x33 + x267; - FpExt x269 = x268 - x233; - arg0[28] = x269; - FpExt x270 = x269 * x259; - FpExt x271 = x270 - x261; - FpExt x272 = x271 - x262; - FpExt x273 = x272 - x260; - FpExt x274 = x239 + poly_mix[5] * x273; - FpExt x275 = x198 * x34; - FpExt x276 = x275 + x200; - FpExt x277 = arg0[17]; - FpExt x278 = x277 * x35; - FpExt x279 = x278 + x200; - FpExt x280 = x276 * x279; - FpExt x281 = x276 * x36; - FpExt x282 = x37 * x279; - FpExt x283 = x277 * x38; - FpExt x284 = x283 + x200; - FpExt x285 = x280 * x284; - FpExt x286 = x280 * x39; - FpExt x287 = x282 * x284; - FpExt x288 = x281 * x284; - FpExt x289 = x40 * x0; - FpExt x290 = x41 + x289; - FpExt x291 = x290 * x0; - FpExt x292 = x42 + x291; - FpExt x293 = x292 * x0; - FpExt x294 = x43 + x293; - arg0[70] = x294; - FpExt x295 = x294 - x268; - arg0[35] = x295; - FpExt x296 = x295 * x285; - FpExt x297 = x296 - x287; - FpExt x298 = x297 - x288; - FpExt x299 = x298 - x286; - FpExt x300 = x274 + poly_mix[6] * x299; - FpExt x301 = x277 * x44; - FpExt x302 = x301 + x200; - FpExt x303 = x277 * x45; - FpExt x304 = x303 + x200; - FpExt x305 = x302 * x304; - FpExt x306 = x302 * x46; - FpExt x307 = x47 * x304; - FpExt x308 = x277 * x48; - FpExt x309 = x308 + x200; - FpExt x310 = x305 * x309; - FpExt x311 = x305 * x49; - FpExt x312 = x307 * x309; - FpExt x313 = x306 * x309; - FpExt x314 = x50 * x0; - FpExt x315 = x51 + x314; - FpExt x316 = x315 * x0; - FpExt x317 = x52 + x316; - FpExt x318 = x317 * x0; - FpExt x319 = x53 + x318; - FpExt x320 = x319 - x294; - arg0[38] = x320; - FpExt x321 = x320 * x310; - FpExt x322 = x321 - x312; - FpExt x323 = x322 - x313; - FpExt x324 = x323 - x311; - FpExt x325 = x300 + poly_mix[7] * x324; - FpExt x326 = x54 * x0; - FpExt x327 = x55 + x326; - FpExt x328 = x327 * x0; - FpExt x329 = x56 + x328; - FpExt x330 = x329 * x0; - FpExt x331 = x57 + x330; - arg0[41] = x331; - FpExt x332 = x331 - x319; - FpExt x333 = x325 + poly_mix[8] * x332; - FpExt x334 = arg2 + x58 * x333 * poly_mix[400]; - FpExt x335 = x334 + x59 * x333 * poly_mix[401]; - FpExt x336 = x335 + x60 * x333 * poly_mix[402]; - FpExt x337 = x61 * x0; - FpExt x338 = x62 + x337; - FpExt x339 = x338 * x0; - FpExt x340 = x63 + x339; - FpExt x341 = x340 * x0; - FpExt x342 = x64 + x341; - arg0[36] = x342; - FpExt x343 = x277 * x65; - FpExt x344 = x343 + x200; - FpExt x345 = arg0[18]; - FpExt x346 = x345 * x344; - FpExt x347 = x345 * x66; - FpExt x348 = x67 * x344; - FpExt x349 = x277 * x68; - FpExt x350 = x349 + x200; - FpExt x351 = x346 * x350; - FpExt x352 = x346 * x69; - FpExt x353 = x348 * x350; - FpExt x354 = x347 * x350; - FpExt x355 = arg0[19]; - FpExt x356 = x355 * x351; - FpExt x357 = x356 - x353; - FpExt x358 = x357 - x354; - FpExt x359 = x358 - x352; - FpExt x360 = arg3 + poly_mix[0] * x359; - FpExt x361 = x202 * x70; - FpExt x362 = x204 * x1; - FpExt x363 = x361 + x362; - FpExt x364 = arg0[20]; - FpExt x365 = x363 + x364; - FpExt x366 = arg0[21]; - FpExt x367 = x365 + x366; - FpExt x368 = x367 + x200; - FpExt x369 = x361 + x217; - FpExt x370 = x207 * x6; - FpExt x371 = x369 + x370; - FpExt x372 = x210 * x7; - FpExt x373 = x371 + x372; - FpExt x374 = x373 + x200; - FpExt x375 = x368 * x374; - FpExt x376 = x368 * x12; - FpExt x377 = x71 * x374; - FpExt x378 = x198 * x8; - FpExt x379 = x378 + x200; - arg0[61] = x379; - FpExt x380 = x375 * x379; - FpExt x381 = x375 * x11; - FpExt x382 = x377 * x379; - FpExt x383 = x376 * x379; - FpExt x384 = arg0[22]; - FpExt x385 = x384 * x380; - FpExt x386 = x385 - x382; - FpExt x387 = x386 - x383; - FpExt x388 = x387 - x381; - FpExt x389 = x360 + poly_mix[1] * x388; - FpExt x390 = x202 * x9; - arg0[75] = x390; - FpExt x391 = x204 * x15; - FpExt x392 = x390 + x391; - FpExt x393 = x392 + x219; - FpExt x394 = x393 + x221; - FpExt x395 = x394 + x200; - FpExt x396 = x390 + x217; - arg0[78] = x396; - FpExt x397 = x207 * x20; - FpExt x398 = x396 + x397; - FpExt x399 = x210 * x72; - FpExt x400 = x398 + x399; - FpExt x401 = x400 + x200; - FpExt x402 = x395 * x401; - FpExt x403 = x395 * x26; - FpExt x404 = x10 * x401; - FpExt x405 = x198 * x25; - FpExt x406 = x405 + x200; - FpExt x407 = x402 * x406; - FpExt x408 = x402 * x21; - FpExt x409 = x404 * x406; - FpExt x410 = x403 * x406; - FpExt x411 = arg0[23]; - FpExt x412 = x411 * x407; - FpExt x413 = x412 - x409; - FpExt x414 = x413 - x410; - FpExt x415 = x414 - x408; - FpExt x416 = x389 + poly_mix[2] * x415; - FpExt x417 = x202 * x23; - FpExt x418 = x204 * x29; - FpExt x419 = x417 + x418; - FpExt x420 = x419 + x254; - FpExt x421 = x420 + x256; - FpExt x422 = x421 + x200; - FpExt x423 = x417 + x217; - FpExt x424 = x207 * x34; - FpExt x425 = x423 + x424; - FpExt x426 = x210 * x73; - FpExt x427 = x425 + x426; - FpExt x428 = x427 + x200; - FpExt x429 = x422 * x428; - FpExt x430 = x422 * x37; - FpExt x431 = x24 * x428; - FpExt x432 = x198 * x74; - FpExt x433 = x432 + x200; - FpExt x434 = x429 * x433; - FpExt x435 = x429 * x75; - FpExt x436 = x431 * x433; - FpExt x437 = x430 * x433; - FpExt x438 = x191 * x434; - FpExt x439 = x438 - x436; - FpExt x440 = x439 - x437; - FpExt x441 = x440 - x435; - FpExt x442 = x416 + poly_mix[3] * x441; - FpExt x443 = x279 * x284; - FpExt x444 = x279 * x39; - FpExt x445 = x36 * x284; - FpExt x446 = x443 * x302; - FpExt x447 = x443 * x47; - FpExt x448 = x445 * x302; - FpExt x449 = x444 * x302; - FpExt x450 = x234 * x446; - FpExt x451 = x450 - x448; - FpExt x452 = x451 - x449; - FpExt x453 = x452 - x447; - FpExt x454 = x442 + poly_mix[4] * x453; - FpExt x455 = x304 * x309; - FpExt x456 = x304 * x49; - FpExt x457 = x46 * x309; - FpExt x458 = arg0[24]; - FpExt x459 = x455 * x458; - FpExt x460 = x455 * x76; - FpExt x461 = x457 * x458; - FpExt x462 = x456 * x458; - FpExt x463 = x269 * x459; - FpExt x464 = x463 - x461; - FpExt x465 = x464 - x462; - FpExt x466 = x465 - x460; - FpExt x467 = x454 + poly_mix[5] * x466; - FpExt x468 = x342 * x77; - FpExt x469 = x468 + x200; - FpExt x470 = x342 * x78; - FpExt x471 = x470 + x200; - FpExt x472 = x469 * x471; - FpExt x473 = x469 * x79; - FpExt x474 = x80 * x471; - FpExt x475 = x342 * x81; - FpExt x476 = x475 + x200; - FpExt x477 = x472 * x476; - FpExt x478 = x472 * x82; - FpExt x479 = x474 * x476; - FpExt x480 = x473 * x476; - FpExt x481 = x295 * x477; - FpExt x482 = x481 - x479; - FpExt x483 = x482 - x480; - FpExt x484 = x483 - x478; - FpExt x485 = x467 + poly_mix[6] * x484; - FpExt x486 = x342 * x83; - FpExt x487 = x486 + x200; - FpExt x488 = x342 * x84; - FpExt x489 = x488 + x200; - FpExt x490 = x487 * x489; - FpExt x491 = x487 * x85; - FpExt x492 = x86 * x489; - FpExt x493 = x342 * x87; - FpExt x494 = x493 + x200; - FpExt x495 = x490 * x494; - FpExt x496 = x490 * x88; - FpExt x497 = x492 * x494; - FpExt x498 = x491 * x494; - FpExt x499 = x320 * x495; - FpExt x500 = x499 - x497; - FpExt x501 = x500 - x498; - FpExt x502 = x501 - x496; - FpExt x503 = x485 + poly_mix[7] * x502; - FpExt x504 = x342 * x89; - FpExt x505 = x504 + x200; - FpExt x506 = x342 * x90; - FpExt x507 = x506 + x200; - FpExt x508 = x505 * x507; - FpExt x509 = x505 * x91; - FpExt x510 = x92 * x507; - FpExt x511 = x342 * x93; - FpExt x512 = x511 + x200; - FpExt x513 = x508 * x512; - FpExt x514 = x508 * x94; - FpExt x515 = x510 * x512; - FpExt x516 = x509 * x512; - FpExt x517 = x95 * x0; - FpExt x518 = x96 + x517; - FpExt x519 = x518 * x0; - FpExt x520 = x97 + x519; - FpExt x521 = x520 * x0; - FpExt x522 = x98 + x521; - FpExt x523 = x522 - x319; - arg0[39] = x523; - FpExt x524 = x523 * x513; - FpExt x525 = x524 - x515; - FpExt x526 = x525 - x516; - FpExt x527 = x526 - x514; - FpExt x528 = x503 + poly_mix[8] * x527; - FpExt x529 = x342 * x99; - FpExt x530 = x529 + x200; - FpExt x531 = x342 * x100; - FpExt x532 = x531 + x200; - FpExt x533 = x530 * x532; - FpExt x534 = x530 * x101; - FpExt x535 = x102 * x532; - FpExt x536 = x342 * x103; - FpExt x537 = x536 + x200; - FpExt x538 = x533 * x537; - FpExt x539 = x533 * x104; - FpExt x540 = x535 * x537; - FpExt x541 = x534 * x537; - FpExt x542 = x105 * x0; - FpExt x543 = x106 + x542; - FpExt x544 = x543 * x0; - FpExt x545 = x107 + x544; - FpExt x546 = x545 * x0; - FpExt x547 = x108 + x546; - arg0[42] = x547; - FpExt x548 = x547 - x522; - arg0[40] = x548; - FpExt x549 = x548 * x538; - FpExt x550 = x549 - x540; - FpExt x551 = x550 - x541; - FpExt x552 = x551 - x539; - FpExt x553 = x528 + poly_mix[9] * x552; - FpExt x554 = x342 * x109; - FpExt x555 = x554 + x200; - FpExt x556 = x202 * x110; - FpExt x557 = x204 * x111; - FpExt x558 = x556 + x557; - FpExt x559 = x207 * x112; - FpExt x560 = x558 + x559; - FpExt x561 = x210 * x113; - FpExt x562 = x560 + x561; - FpExt x563 = x562 + x200; - FpExt x564 = x555 * x563; - FpExt x565 = x555 * x114; - FpExt x566 = x115 * x563; - FpExt x567 = x556 + x217; - FpExt x568 = x207 * x116; - FpExt x569 = x567 + x568; - FpExt x570 = x210 * x117; - FpExt x571 = x569 + x570; - FpExt x572 = x571 + x200; - FpExt x573 = x564 * x572; - FpExt x574 = x564 * x118; - FpExt x575 = x566 * x572; - FpExt x576 = x565 * x572; - FpExt x577 = x119 * x0; - FpExt x578 = x120 + x577; - FpExt x579 = x578 * x0; - FpExt x580 = x121 + x579; - FpExt x581 = x580 * x0; - FpExt x582 = x122 + x581; - FpExt x583 = x582 - x547; - arg0[64] = x583; - FpExt x584 = x583 * x573; - FpExt x585 = x584 - x575; - FpExt x586 = x585 - x576; - FpExt x587 = x586 - x574; - FpExt x588 = x553 + poly_mix[10] * x587; - FpExt x589 = x198 * x123; - FpExt x590 = x589 + x200; - FpExt x591 = x277 * x124; - FpExt x592 = x591 + x200; - FpExt x593 = x590 * x592; - FpExt x594 = x590 * x125; - FpExt x595 = x126 * x592; - FpExt x596 = x277 * x127; - FpExt x597 = x596 + x200; - arg0[86] = x597; - FpExt x598 = x593 * x597; - FpExt x599 = x593 * x128; - FpExt x600 = x595 * x597; - FpExt x601 = x594 * x597; - FpExt x602 = x129 * x0; - FpExt x603 = x130 + x602; - FpExt x604 = x603 * x0; - FpExt x605 = x131 + x604; - FpExt x606 = x605 * x0; - FpExt x607 = x132 + x606; - FpExt x608 = x607 - x582; - arg0[65] = x608; - FpExt x609 = x608 * x598; - FpExt x610 = x609 - x600; - FpExt x611 = x610 - x601; - FpExt x612 = x611 - x599; - FpExt x613 = x588 + poly_mix[11] * x612; - FpExt x614 = x331 - x607; - FpExt x615 = x613 + poly_mix[12] * x614; - FpExt x616 = x336 + x133 * x615 * poly_mix[403]; - FpExt x617 = x277 * x71; - FpExt x618 = x617 + x200; - FpExt x619 = x345 * x618; - FpExt x620 = x345 * x70; - FpExt x621 = x69 * x618; - FpExt x622 = x277 * x12; - FpExt x623 = x622 + x200; - FpExt x624 = x619 * x623; - FpExt x625 = x619 * x134; - FpExt x626 = x621 * x623; - FpExt x627 = x620 * x623; - FpExt x628 = x355 * x624; - FpExt x629 = x628 - x626; - FpExt x630 = x629 - x627; - FpExt x631 = x630 - x625; - FpExt x632 = arg3 + poly_mix[0] * x631; - FpExt x633 = x202 * x6; - FpExt x634 = x204 * x11; - FpExt x635 = x633 + x634; - FpExt x636 = x207 * x8; - FpExt x637 = x635 + x636; - FpExt x638 = x210 * x9; - FpExt x639 = x637 + x638; - FpExt x640 = x639 + x200; - FpExt x641 = x633 + x217; - FpExt x642 = x207 * x15; - arg0[76] = x642; - FpExt x643 = x641 + x642; - FpExt x644 = x210 * x13; - arg0[77] = x644; - FpExt x645 = x643 + x644; - FpExt x646 = x645 + x200; - FpExt x647 = x640 * x646; - FpExt x648 = x640 * x10; - FpExt x649 = x7 * x646; - FpExt x650 = x198 * x26; - FpExt x651 = x650 + x200; - arg0[62] = x651; - FpExt x652 = x647 * x651; - FpExt x653 = x647 * x14; - FpExt x654 = x649 * x651; - FpExt x655 = x648 * x651; - FpExt x656 = x384 * x652; - FpExt x657 = x656 - x654; - FpExt x658 = x657 - x655; - FpExt x659 = x658 - x653; - FpExt x660 = x632 + poly_mix[1] * x659; - FpExt x661 = x202 * x20; - FpExt x662 = x204 * x21; - FpExt x663 = x661 + x662; - FpExt x664 = x207 * x25; - FpExt x665 = x663 + x664; - FpExt x666 = x210 * x22; - FpExt x667 = x665 + x666; - FpExt x668 = x667 + x200; - FpExt x669 = x661 + x217; - FpExt x670 = x207 * x24; - FpExt x671 = x669 + x670; - FpExt x672 = x210 * x29; - FpExt x673 = x671 + x672; - FpExt x674 = x673 + x200; - arg0[27] = x674; - FpExt x675 = x668 * x674; - FpExt x676 = x668 * x23; - FpExt x677 = x72 * x674; - FpExt x678 = x198 * x28; - FpExt x679 = x678 + x200; - arg0[32] = x679; - FpExt x680 = x675 * x679; - FpExt x681 = x675 * x27; - FpExt x682 = x677 * x679; - FpExt x683 = x676 * x679; - FpExt x684 = x411 * x680; - FpExt x685 = x684 - x682; - FpExt x686 = x685 - x683; - FpExt x687 = x686 - x681; - FpExt x688 = x660 + poly_mix[2] * x687; - FpExt x689 = x202 * x34; - FpExt x690 = x204 * x75; - FpExt x691 = x689 + x690; - FpExt x692 = x207 * x74; - FpExt x693 = x691 + x692; - FpExt x694 = x210 * x135; - FpExt x695 = x693 + x694; - FpExt x696 = x695 + x200; - FpExt x697 = x689 + x217; - FpExt x698 = x207 * x136; - FpExt x699 = x697 + x698; - FpExt x700 = x210 * x137; - FpExt x701 = x699 + x700; - FpExt x702 = x701 + x200; - FpExt x703 = x696 * x702; - FpExt x704 = x696 * x138; - FpExt x705 = x73 * x702; - FpExt x706 = x198 * x139; - FpExt x707 = x706 + x200; - FpExt x708 = x703 * x707; - FpExt x709 = x703 * x140; - FpExt x710 = x705 * x707; - FpExt x711 = x704 * x707; - FpExt x712 = x191 * x708; - FpExt x713 = x712 - x710; - FpExt x714 = x713 - x711; - FpExt x715 = x714 - x709; - FpExt x716 = x688 + poly_mix[3] * x715; - FpExt x717 = x716 + poly_mix[4] * x453; - FpExt x718 = x717 + poly_mix[5] * x466; - FpExt x719 = x277 * x77; - FpExt x720 = x719 + x200; - FpExt x721 = x277 * x78; - FpExt x722 = x721 + x200; - FpExt x723 = x720 * x722; - FpExt x724 = x720 * x79; - FpExt x725 = x80 * x722; - FpExt x726 = arg0[25]; - FpExt x727 = x723 * x726; - FpExt x728 = x723 * x82; - FpExt x729 = x725 * x726; - FpExt x730 = x724 * x726; - FpExt x731 = x295 * x727; - FpExt x732 = x731 - x729; - FpExt x733 = x732 - x730; - FpExt x734 = x733 - x728; - FpExt x735 = x718 + poly_mix[6] * x734; - FpExt x736 = x735 + poly_mix[7] * x502; - FpExt x737 = x736 + poly_mix[8] * x527; - FpExt x738 = x737 + poly_mix[9] * x552; - FpExt x739 = x342 * x141; - FpExt x740 = x739 + x200; - FpExt x741 = x555 * x740; - FpExt x742 = x555 * x142; - FpExt x743 = x115 * x740; - FpExt x744 = x342 * x143; - FpExt x745 = x744 + x200; - FpExt x746 = x741 * x745; - FpExt x747 = x741 * x144; - FpExt x748 = x743 * x745; - FpExt x749 = x742 * x745; - FpExt x750 = x583 * x746; - FpExt x751 = x750 - x748; - FpExt x752 = x751 - x749; - FpExt x753 = x752 - x747; - FpExt x754 = x738 + poly_mix[10] * x753; - FpExt x755 = x342 * x145; - FpExt x756 = x755 + x200; - FpExt x757 = x202 * x125; - FpExt x758 = x204 * x146; - FpExt x759 = x757 + x758; - FpExt x760 = x207 * x128; - FpExt x761 = x759 + x760; - FpExt x762 = x210 * x127; - FpExt x763 = x761 + x762; - FpExt x764 = x763 + x200; - FpExt x765 = x756 * x764; - FpExt x766 = x756 * x124; - FpExt x767 = x147 * x764; - FpExt x768 = x757 + x217; - FpExt x769 = x207 * x148; - FpExt x770 = x768 + x769; - FpExt x771 = x210 * x149; - FpExt x772 = x770 + x771; - FpExt x773 = x772 + x200; - FpExt x774 = x765 * x773; - FpExt x775 = x765 * x150; - FpExt x776 = x767 * x773; - FpExt x777 = x766 * x773; - FpExt x778 = x608 * x774; - FpExt x779 = x778 - x776; - FpExt x780 = x779 - x777; - FpExt x781 = x780 - x775; - FpExt x782 = x754 + poly_mix[11] * x781; - FpExt x783 = x198 * x151; - FpExt x784 = x783 + x200; - FpExt x785 = x277 * x152; - FpExt x786 = x785 + x200; - FpExt x787 = x784 * x786; - FpExt x788 = x784 * x153; - FpExt x789 = x154 * x786; - FpExt x790 = x277 * x155; - FpExt x791 = x790 + x200; - arg0[87] = x791; - FpExt x792 = x787 * x791; - FpExt x793 = x787 * x156; - FpExt x794 = x789 * x791; - FpExt x795 = x788 * x791; - FpExt x796 = x157 * x0; - FpExt x797 = x158 + x796; - FpExt x798 = x797 * x0; - FpExt x799 = x159 + x798; - FpExt x800 = x799 * x0; - FpExt x801 = x160 + x800; - arg0[67] = x801; - FpExt x802 = x801 - x607; - arg0[66] = x802; - FpExt x803 = x802 * x792; - FpExt x804 = x803 - x794; - FpExt x805 = x804 - x795; - FpExt x806 = x805 - x793; - FpExt x807 = x782 + poly_mix[12] * x806; - FpExt x808 = x331 - x801; - FpExt x809 = x807 + poly_mix[13] * x808; - FpExt x810 = x616 + x161 * x809 * poly_mix[404]; - FpExt x811 = x277 * x89; - FpExt x812 = x811 + x200; - FpExt x813 = x345 * x812; - FpExt x814 = x345 * x92; - FpExt x815 = x88 * x812; - FpExt x816 = x277 * x93; - FpExt x817 = x816 + x200; - FpExt x818 = x813 * x817; - FpExt x819 = x813 * x94; - FpExt x820 = x815 * x817; - FpExt x821 = x814 * x817; - FpExt x822 = x355 * x818; - FpExt x823 = x822 - x820; - FpExt x824 = x823 - x821; - FpExt x825 = x824 - x819; - FpExt x826 = arg3 + poly_mix[0] * x825; - FpExt x827 = x202 * x102; - FpExt x828 = x204 * x101; - FpExt x829 = x827 + x828; - FpExt x830 = x207 * x100; - FpExt x831 = x829 + x830; - FpExt x832 = x210 * x104; - FpExt x833 = x831 + x832; - FpExt x834 = x833 + x200; - FpExt x835 = x827 + x217; - FpExt x836 = x207 * x115; - FpExt x837 = x835 + x836; - FpExt x838 = x210 * x109; - FpExt x839 = x837 + x838; - FpExt x840 = x839 + x200; - FpExt x841 = x834 * x840; - FpExt x842 = x834 * x103; - FpExt x843 = x99 * x840; - FpExt x844 = x198 * x141; - FpExt x845 = x844 + x200; - arg0[69] = x845; - FpExt x846 = x841 * x845; - FpExt x847 = x841 * x142; - FpExt x848 = x843 * x845; - FpExt x849 = x842 * x845; - FpExt x850 = x384 * x846; - FpExt x851 = x850 - x848; - FpExt x852 = x851 - x849; - FpExt x853 = x852 - x847; - FpExt x854 = x826 + poly_mix[1] * x853; - FpExt x855 = x202 * x144; - arg0[71] = x855; - FpExt x856 = x204 * x147; - arg0[50] = x856; - FpExt x857 = x855 + x856; - FpExt x858 = x207 * x145; - arg0[51] = x858; - FpExt x859 = x857 + x858; - FpExt x860 = x210 * x162; - arg0[52] = x860; - FpExt x861 = x859 + x860; - FpExt x862 = x861 + x200; - FpExt x863 = x855 + x217; - arg0[72] = x863; - FpExt x864 = x207 * x163; - arg0[54] = x864; - FpExt x865 = x863 + x864; - FpExt x866 = x210 * x164; - arg0[55] = x866; - FpExt x867 = x865 + x866; - FpExt x868 = x867 + x200; - FpExt x869 = x862 * x868; - FpExt x870 = x862 * x165; - FpExt x871 = x143 * x868; - FpExt x872 = x198 * x166; - FpExt x873 = x872 + x200; - FpExt x874 = x869 * x873; - FpExt x875 = x869 * x167; - FpExt x876 = x871 * x873; - FpExt x877 = x870 * x873; - FpExt x878 = x411 * x874; - FpExt x879 = x878 - x876; - FpExt x880 = x879 - x877; - FpExt x881 = x880 - x875; - FpExt x882 = x854 + poly_mix[2] * x881; - FpExt x883 = x277 * x168; - FpExt x884 = x883 + x200; - FpExt x885 = x277 * x169; - FpExt x886 = x885 + x200; - FpExt x887 = x884 * x886; - FpExt x888 = x884 * x67; - FpExt x889 = x170 * x886; - FpExt x890 = x277 * x69; - FpExt x891 = x890 + x200; - FpExt x892 = x887 * x891; - FpExt x893 = x887 * x171; - FpExt x894 = x889 * x891; - FpExt x895 = x888 * x891; - FpExt x896 = x191 * x892; - FpExt x897 = x896 - x894; - FpExt x898 = x897 - x895; - FpExt x899 = x898 - x893; - FpExt x900 = x882 + poly_mix[3] * x899; - FpExt x901 = x277 * x1; - FpExt x902 = x901 + x200; - FpExt x903 = x202 * x172; - FpExt x904 = x204 * x12; - FpExt x905 = x903 + x904; - FpExt x906 = x905 + x370; - FpExt x907 = x906 + x372; - FpExt x908 = x907 + x200; - FpExt x909 = x902 * x908; - FpExt x910 = x902 * x134; - FpExt x911 = x71 * x908; - FpExt x912 = x903 + x217; - FpExt x913 = x912 + x636; - FpExt x914 = x913 + x638; - FpExt x915 = x914 + x200; - FpExt x916 = x909 * x915; - FpExt x917 = x909 * x11; - FpExt x918 = x911 * x915; - FpExt x919 = x910 * x915; - FpExt x920 = x234 * x916; - FpExt x921 = x920 - x918; - FpExt x922 = x921 - x919; - FpExt x923 = x922 - x917; - FpExt x924 = x900 + poly_mix[4] * x923; - FpExt x925 = x198 * x15; - FpExt x926 = x925 + x200; - FpExt x927 = x342 * x35; - FpExt x928 = x927 + x200; - arg0[33] = x928; - FpExt x929 = x926 * x928; - FpExt x930 = x926 * x36; - FpExt x931 = x10 * x928; - FpExt x932 = x342 * x38; - FpExt x933 = x932 + x200; - arg0[34] = x933; - FpExt x934 = x929 * x933; - FpExt x935 = x929 * x39; - FpExt x936 = x931 * x933; - FpExt x937 = x930 * x933; - FpExt x938 = x269 * x934; - FpExt x939 = x938 - x936; - FpExt x940 = x939 - x937; - FpExt x941 = x940 - x935; - FpExt x942 = x924 + poly_mix[5] * x941; - FpExt x943 = x342 * x44; - FpExt x944 = x943 + x200; - arg0[37] = x944; - FpExt x945 = x202 * x72; - FpExt x946 = x204 * x25; - arg0[80] = x946; - FpExt x947 = x945 + x946; - FpExt x948 = x207 * x22; - arg0[81] = x948; - FpExt x949 = x947 + x948; - FpExt x950 = x210 * x23; - arg0[82] = x950; - FpExt x951 = x949 + x950; - FpExt x952 = x951 + x200; - FpExt x953 = x944 * x952; - FpExt x954 = x944 * x21; - FpExt x955 = x47 * x952; - FpExt x956 = x945 + x217; - FpExt x957 = x207 * x29; - arg0[84] = x957; - FpExt x958 = x956 + x957; - FpExt x959 = x210 * x27; - arg0[85] = x959; - FpExt x960 = x958 + x959; - FpExt x961 = x960 + x200; - FpExt x962 = x953 * x961; - FpExt x963 = x953 * x24; - FpExt x964 = x955 * x961; - FpExt x965 = x954 * x961; - FpExt x966 = x295 * x962; - FpExt x967 = x966 - x964; - FpExt x968 = x967 - x965; - FpExt x969 = x968 - x963; - FpExt x970 = x942 + poly_mix[6] * x969; - FpExt x971 = x198 * x37; - FpExt x972 = x971 + x200; - FpExt x973 = x277 * x73; - FpExt x974 = x973 + x200; - FpExt x975 = x972 * x974; - FpExt x976 = x972 * x34; - FpExt x977 = x28 * x974; - FpExt x978 = x277 * x135; - FpExt x979 = x978 + x200; - arg0[63] = x979; - FpExt x980 = x975 * x979; - FpExt x981 = x975 * x74; - FpExt x982 = x977 * x979; - FpExt x983 = x976 * x979; - FpExt x984 = x320 * x980; - FpExt x985 = x984 - x982; - FpExt x986 = x985 - x983; - FpExt x987 = x986 - x981; - FpExt x988 = x970 + poly_mix[7] * x987; - FpExt x989 = x988 + poly_mix[8] * x332; - FpExt x990 = x810 + x173 * x989 * poly_mix[405]; - FpExt x991 = x277 * x90; - FpExt x992 = x991 + x200; - FpExt x993 = x345 * x992; - FpExt x994 = x345 * x91; - FpExt x995 = x92 * x992; - FpExt x996 = x277 * x99; - FpExt x997 = x996 + x200; - FpExt x998 = x993 * x997; - FpExt x999 = x993 * x102; - FpExt x1000 = x995 * x997; - FpExt x1001 = x994 * x997; - FpExt x1002 = x355 * x998; - FpExt x1003 = x1002 - x1000; - FpExt x1004 = x1003 - x1001; - FpExt x1005 = x1004 - x999; - FpExt x1006 = arg3 + poly_mix[0] * x1005; - FpExt x1007 = x202 * x101; - FpExt x1008 = x204 * x104; - arg0[45] = x1008; - FpExt x1009 = x1007 + x1008; - FpExt x1010 = x207 * x103; - arg0[46] = x1010; - FpExt x1011 = x1009 + x1010; - FpExt x1012 = x210 * x115; - arg0[47] = x1012; - FpExt x1013 = x1011 + x1012; - FpExt x1014 = x1013 + x200; - FpExt x1015 = x1007 + x217; - FpExt x1016 = x207 * x142; - arg0[48] = x1016; - FpExt x1017 = x1015 + x1016; - FpExt x1018 = x210 * x141; - arg0[49] = x1018; - FpExt x1019 = x1017 + x1018; - FpExt x1020 = x1019 + x200; - FpExt x1021 = x1014 * x1020; - FpExt x1022 = x1014 * x109; - FpExt x1023 = x100 * x1020; - FpExt x1024 = x198 * x143; - FpExt x1025 = x1024 + x200; - FpExt x1026 = x1021 * x1025; - FpExt x1027 = x1021 * x144; - FpExt x1028 = x1023 * x1025; - FpExt x1029 = x1022 * x1025; - FpExt x1030 = x384 * x1026; - FpExt x1031 = x1030 - x1028; - FpExt x1032 = x1031 - x1029; - FpExt x1033 = x1032 - x1027; - FpExt x1034 = x1006 + poly_mix[1] * x1033; - FpExt x1035 = x202 * x147; - FpExt x1036 = x204 * x162; - FpExt x1037 = x1035 + x1036; - FpExt x1038 = x207 * x165; - arg0[73] = x1038; - FpExt x1039 = x1037 + x1038; - FpExt x1040 = x210 * x163; - arg0[74] = x1040; - FpExt x1041 = x1039 + x1040; - FpExt x1042 = x1041 + x200; - FpExt x1043 = x1035 + x217; - FpExt x1044 = x207 * x167; - FpExt x1045 = x1043 + x1044; - FpExt x1046 = x210 * x166; - FpExt x1047 = x1045 + x1046; - FpExt x1048 = x1047 + x200; - FpExt x1049 = x1042 * x1048; - FpExt x1050 = x1042 * x164; - FpExt x1051 = x145 * x1048; - FpExt x1052 = x198 * x170; - FpExt x1053 = x1052 + x200; - FpExt x1054 = x1049 * x1053; - FpExt x1055 = x1049 * x174; - FpExt x1056 = x1051 * x1053; - FpExt x1057 = x1050 * x1053; - FpExt x1058 = x411 * x1054; - FpExt x1059 = x1058 - x1056; - FpExt x1060 = x1059 - x1057; - FpExt x1061 = x1060 - x1055; - FpExt x1062 = x1034 + poly_mix[2] * x1061; - FpExt x1063 = x202 * x175; - FpExt x1064 = x204 * x169; - FpExt x1065 = x1063 + x1064; - FpExt x1066 = x207 * x66; - FpExt x1067 = x1065 + x1066; - FpExt x1068 = x210 * x65; - FpExt x1069 = x1067 + x1068; - FpExt x1070 = x1069 + x200; - FpExt x1071 = x1063 + x217; - FpExt x1072 = x207 * x171; - arg0[57] = x1072; - FpExt x1073 = x1071 + x1072; - FpExt x1074 = x210 * x69; - arg0[58] = x1074; - FpExt x1075 = x1073 + x1074; - FpExt x1076 = x1075 + x200; - FpExt x1077 = x1070 * x1076; - FpExt x1078 = x1070 * x176; - FpExt x1079 = x67 * x1076; - FpExt x1080 = x198 * x70; - FpExt x1081 = x1080 + x200; - FpExt x1082 = x1077 * x1081; - FpExt x1083 = x1077 * x68; - FpExt x1084 = x1079 * x1081; - FpExt x1085 = x1078 * x1081; - FpExt x1086 = x191 * x1082; - FpExt x1087 = x1086 - x1084; - FpExt x1088 = x1087 - x1085; - FpExt x1089 = x1088 - x1083; - FpExt x1090 = x1062 + poly_mix[3] * x1089; - FpExt x1091 = x277 * x172; - FpExt x1092 = x1091 + x200; - FpExt x1093 = x277 * x6; - FpExt x1094 = x1093 + x200; - FpExt x1095 = x1092 * x1094; - FpExt x1096 = x1092 * x12; - FpExt x1097 = x1 * x1094; - FpExt x1098 = x277 * x10; - FpExt x1099 = x1098 + x200; - FpExt x1100 = x1095 * x1099; - FpExt x1101 = x1095 * x9; - FpExt x1102 = x1097 * x1099; - FpExt x1103 = x1096 * x1099; - FpExt x1104 = x234 * x1100; - FpExt x1105 = x1104 - x1102; - FpExt x1106 = x1105 - x1103; - FpExt x1107 = x1106 - x1101; - FpExt x1108 = x1090 + poly_mix[4] * x1107; - FpExt x1109 = x277 * x26; - FpExt x1110 = x1109 + x200; - FpExt x1111 = x1110 * x668; - FpExt x1112 = x1110 * x72; - arg0[26] = x1112; - FpExt x1113 = x14 * x668; - FpExt x1114 = x1111 * x674; - arg0[29] = x1114; - FpExt x1115 = x1111 * x23; - arg0[31] = x1115; - FpExt x1116 = x1113 * x674; - arg0[30] = x1116; - auto x1117 = rv32im_v2_0(idx, size, arg0, x1108, x990, arg3, arg4, arg5); - - return x1117; -} - -} // namespace risc0::circuit::rv32im_v2::cuda diff --git a/risc0/circuit/rv32im-v2-sys/kernels/cuda/ffi.cu b/risc0/circuit/rv32im-v2-sys/kernels/cuda/ffi.cu deleted file mode 100644 index 09c1fffc..00000000 --- a/risc0/circuit/rv32im-v2-sys/kernels/cuda/ffi.cu +++ /dev/null @@ -1,360 +0,0 @@ -// Copyright 2024 RISC Zero, Inc. -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#include "cuda.h" -#include "steps.cuh" -#include "witgen.h" - -#include "vendor/nvtx3/nvtx3.hpp" - -#include -#include -#include -#include - -namespace risc0::circuit::rv32im_v2::cuda { - -struct ExecBuffers { - Buffer global; - Buffer data; -}; - -struct AccumBuffers { - Buffer data; - Buffer accum; - Buffer mix; -}; - -struct DeviceContext { - Buffer* data; - Buffer* global; - PreflightTrace* preflight; - LookupTables* tables; -}; - -struct HostContext { - DeviceContext* ctx; - PreflightTrace d_preflight; - LookupTables d_tables; - - HostContext(ExecBuffers* buffers, PreflightTrace* preflight, size_t cycles) { - CUDA_OK(cudaMallocManaged(&ctx, sizeof(DeviceContext))); - - CUDA_OK(cudaMalloc(&ctx->data, sizeof(Buffer))); - CUDA_OK(cudaMemcpy(ctx->data, &buffers->data, sizeof(Buffer), cudaMemcpyHostToDevice)); - - CUDA_OK(cudaMalloc(&ctx->global, sizeof(Buffer))); - CUDA_OK(cudaMemcpy(ctx->global, &buffers->global, sizeof(Buffer), cudaMemcpyHostToDevice)); - - CUDA_OK(cudaMalloc(&d_preflight.cycles, cycles * sizeof(PreflightCycle))); - CUDA_OK(cudaMemcpy(d_preflight.cycles, - preflight->cycles, - cycles * sizeof(PreflightCycle), - cudaMemcpyHostToDevice)); - - CUDA_OK(cudaMalloc(&d_preflight.txns, preflight->txnsLen * sizeof(MemoryTransaction))); - CUDA_OK(cudaMemcpy(d_preflight.txns, - preflight->txns, - preflight->txnsLen * sizeof(MemoryTransaction), - cudaMemcpyHostToDevice)); - - d_preflight.txnsLen = preflight->txnsLen; - d_preflight.tableSplitCycle = preflight->tableSplitCycle; - - CUDA_OK(cudaMalloc(&ctx->preflight, sizeof(PreflightTrace))); - CUDA_OK( - cudaMemcpy(ctx->preflight, &d_preflight, sizeof(PreflightTrace), cudaMemcpyHostToDevice)); - - CUDA_OK(cudaMalloc(&d_tables.tableU8, (1 << 8) * sizeof(uint32_t))); - CUDA_OK(cudaMemset(d_tables.tableU8, 0, (1 << 8) * sizeof(uint32_t))); - - CUDA_OK(cudaMalloc(&d_tables.tableU16, (1 << 16) * sizeof(uint32_t))); - CUDA_OK(cudaMemset(d_tables.tableU16, 0, (1 << 16) * sizeof(uint32_t))); - - CUDA_OK(cudaMalloc(&ctx->tables, sizeof(LookupTables))); - CUDA_OK(cudaMemcpy(ctx->tables, &d_tables, sizeof(LookupTables), cudaMemcpyHostToDevice)); - } - - ~HostContext() { - cudaFree(d_tables.tableU16); - cudaFree(d_tables.tableU8); - cudaFree(ctx->tables); - cudaFree(d_preflight.txns); - cudaFree(d_preflight.cycles); - cudaFree(ctx->preflight); - cudaFree(ctx->global); - cudaFree(ctx->data); - cudaFree(ctx); - } -}; - -__device__ ::cuda::std::array -divide_rv32im(uint32_t numer, uint32_t denom, uint32_t signType) { - uint32_t onesComp = (signType == 2); - bool negNumer = signType && int32_t(numer) < 0; - bool negDenom = signType == 1 && int32_t(denom) < 0; - if (negNumer) { - numer = -numer - onesComp; - } - if (negDenom) { - denom = -denom - onesComp; - } - uint32_t quot; - uint32_t rem; - if (denom == 0) { - quot = 0xffffffff; - rem = numer; - } else { - quot = numer / denom; - rem = numer % denom; - } - uint32_t quotNegOut = (negNumer ^ negDenom) - ((denom == 0) * negNumer); - uint32_t remNegOut = negNumer; - if (quotNegOut) { - quot = -quot - onesComp; - } - if (remNegOut) { - rem = -rem - onesComp; - } - return {quot, rem}; -} - -__device__ ::cuda::std::array extern_getMemoryTxn(ExecContext& ctx, Val addrElem) { - uint32_t addr = addrElem.asUInt32(); - size_t txnIdx = ctx.preflight.cycles[ctx.cycle].txnIdx++; - const MemoryTransaction& txn = ctx.preflight.txns[txnIdx]; - // printf("getMemoryTxn(%lu, 0x%08x): txn(%u, 0x%08x, 0x%08x)\n", - // ctx.cycle, - // addr, - // txn.cycle, - // txn.addr, - // txn.word); - - if (txn.cycle != ctx.cycle) { - printf("txn.cycle: %u, ctx.cycle: %zu\n", txn.cycle, ctx.cycle); - assert(false && "txn cycle mismatch"); - } - - if (txn.addr != addr) { - printf("txn.addr: 0x%08x, addr: 0x%08x\n", txn.addr, addr); - assert(false && "memory peek not in preflight"); - } - return { - txn.prevCycle, - txn.prevWord & 0xffff, - txn.prevWord >> 16, - txn.word & 0xffff, - txn.word >> 16, - }; -} - -__device__ void extern_lookupDelta(ExecContext& ctx, Val table, Val index, Val count) { - // printf("lookupDelta(table: %u, index: %u, count: %u, P: %u)\n", - // table.asUInt32(), - // index.asUInt32(), - // count.asUInt32(), - // Fp::P); - ctx.tables.lookupDelta(table, index, count); -} - -__device__ Val extern_lookupCurrent(ExecContext& ctx, Val table, Val index) { - Val ret = ctx.tables.lookupCurrent(table, index); - // printf("lookupCurrent(table: %u, index: %u): %u\n", - // table.asUInt32(), - // index.asUInt32(), - // ret.asUInt32()); - return ret; -} - -__device__ void -extern_memoryDelta(ExecContext& ctx, Val addr, Val cycle, Val dataLow, Val dataHigh, Val count) { - // printf("memoryDelta\n"); - // ctx.tables.memoryDelta( - // addr.asUInt32(), cycle.asUInt32(), dataLow.asUInt32() | (dataHigh.asUInt32() << 16), - // count); -} - -__device__ uint32_t extern_getDiffCount(ExecContext& ctx, Val cycle) { - // printf("getDiffCount\n"); - return ctx.preflight.cycles[cycle.asUInt32()].diffCount; -} - -__device__ Val extern_isFirstCycle_0(ExecContext& ctx) { - // printf("isFirstCycle\n"); - return ctx.cycle == 0; -} - -__device__ Val extern_getCycle(ExecContext& ctx) { - // printf("getCycle\n"); - return ctx.cycle; -} - -__device__ ::cuda::std::array extern_divide( - ExecContext& ctx, Val numerLow, Val numerHigh, Val denomLow, Val denomHigh, Val signType) { - // printf("divide\n"); - uint32_t numer = numerLow.asUInt32() | (numerHigh.asUInt32() << 16); - uint32_t denom = denomLow.asUInt32() | (denomHigh.asUInt32() << 16); - auto [quot, rem] = divide_rv32im(numer, denom, signType.asUInt32()); - ::cuda::std::array ret; - ret[0] = quot & 0xffff; - ret[1] = quot >> 16; - ret[2] = rem & 0xffff; - ret[3] = rem >> 16; - return ret; -} - -__device__ void extern_print(ExecContext& ctx, Val v) { - // printf("LOG: %u\n", v.asUInt32()); -} - -__device__ ::cuda::std::array extern_getMajorMinor(ExecContext& ctx) { - uint8_t major = ctx.preflight.cycles[ctx.cycle].major; - uint8_t minor = ctx.preflight.cycles[ctx.cycle].minor; - // printf("getMajorMinor: %u, %u\n", major, minor); - return {major, minor}; -} - -__device__ Val extern_hostReadPrepare(ExecContext& ctx, Val fp, Val len) { - // printf("hostReadPrepare\n"); - assert(false && "extern_hostReadPrepare"); - // return ctx.stepHandler.readPrepare(fp.asUInt32(), len.asUInt32()); - return 0; -} - -__device__ Val -extern_hostWrite(ExecContext& ctx, Val fdVal, Val addrLow, Val addrHigh, Val lenVal) { - // printf("hostWrite\n"); - assert(false && "extern_hostWrite"); - // uint32_t fd = fdVal.asUInt32(); - // uint32_t addr = addrLow.asUInt32() | (addrHigh.asUInt32() << 16); - // uint32_t len = lenVal.asUInt32(); - // return ctx.stepHandler.write(fd, addr, len); - return 0; -} - -__device__ ::cuda::std::array extern_nextPagingIdx(ExecContext& ctx) { - uint32_t pagingIdx = ctx.preflight.cycles[ctx.cycle].pagingIdx; - uint32_t machineMode = ctx.preflight.cycles[ctx.cycle].machineMode; - // printf("nextPagingIdx: (0x%05x, %u)\n", pagingIdx, machineMode); - return {pagingIdx, machineMode}; -} - -// __device__ void -// stepAccum(AccumBuffers& buffers, PreflightTrace& preflight, LookupTables& tables, size_t cycle) { -// ExecContext ctx(preflight, tables, cycle); -// MutableBufObj data(ctx, buffers.data); -// MutableBufObj accum(ctx, buffers.accum); -// GlobalBufObj mix(ctx, buffers.mix); -// step_TopAccum(ctx, &accum, &data, &mix); -// } - -__device__ void nextStep(DeviceContext* ctx, uint32_t cycle) { - // printf("nextStep: %u\n", cycle); - ExecContext execCtx(*ctx->preflight, *ctx->tables, cycle); - MutableBufObj data(*ctx->data); - GlobalBufObj global(*ctx->global); - step_Top(execCtx, &data, &global); -} - -__global__ void par_stepExec(DeviceContext* ctx, uint32_t start, uint32_t count) { - uint32_t cycle = blockDim.x * blockIdx.x + threadIdx.x; - if (cycle >= count) { - return; - } - nextStep(ctx, start + cycle); -} - -__global__ void rev_stepExec(DeviceContext* ctx, uint32_t split, uint32_t lastCycle) { - for (uint32_t cycle = split; cycle-- > 0;) { - nextStep(ctx, cycle); - } - for (uint32_t cycle = lastCycle; cycle-- > split;) { - nextStep(ctx, cycle); - } -} - -__global__ void fwd_stepExec(DeviceContext* ctx, uint32_t count) { - for (uint32_t cycle = 0; cycle < count; cycle++) { - nextStep(ctx, cycle); - } -} - -} // namespace risc0::circuit::rv32im_v2::cuda - -constexpr size_t kStepModeParallel = 0; -constexpr size_t kStepModeSeqForward = 1; -constexpr size_t kStepModeSeqReverse = 2; - -extern "C" { - -using namespace risc0::circuit::rv32im_v2::cuda; - -const char* risc0_circuit_rv32im_v2_cuda_witgen(uint32_t mode, - ExecBuffers* buffers, - PreflightTrace* preflight, - uint32_t lastCycle) { - try { - HostContext ctx(buffers, preflight, lastCycle); - CudaStream stream; - size_t split = preflight->tableSplitCycle; - - switch (mode) { - case kStepModeParallel: { - auto cfg1 = getSimpleConfig(split); - size_t phase2Count = lastCycle - split; - // printf("phase1: %zu, phase2: %zu\n", split, phase2Count); - auto cfg2 = getSimpleConfig(phase2Count); - { - nvtx3::scoped_range range("phase1"); - par_stepExec<<>>(ctx.ctx, 0, split); - CUDA_OK(cudaStreamSynchronize(stream)); - } - { - nvtx3::scoped_range range("phase2"); - par_stepExec<<>>(ctx.ctx, split, phase2Count); - CUDA_OK(cudaStreamSynchronize(stream)); - } - } break; - case kStepModeSeqForward: - fwd_stepExec<<<1, 1, 0, stream>>>(ctx.ctx, lastCycle); - CUDA_OK(cudaStreamSynchronize(stream)); - break; - case kStepModeSeqReverse: - rev_stepExec<<<1, 1, 0, stream>>>(ctx.ctx, split, lastCycle); - CUDA_OK(cudaStreamSynchronize(stream)); - break; - } - } catch (const std::exception& err) { - return strdup(err.what()); - } catch (...) { - return strdup("Generic exception"); - } - return nullptr; -} - -const char* risc0_circuit_rv32im_v2_cuda_accum(AccumBuffers* buffers, - PreflightTrace* preflight, - uint32_t lastCycle) { - try { - // LookupTables tables; - // for (size_t cycle = 0; cycle < lastCycle; cycle++) { - // stepAccum(*buffers, *preflight, tables, cycle); - // } - } catch (const std::exception& err) { - return strdup(err.what()); - } - return nullptr; -} - -} // extern "C" diff --git a/risc0/circuit/rv32im-v2-sys/kernels/cuda/ffi_supra.cu b/risc0/circuit/rv32im-v2-sys/kernels/cuda/ffi_supra.cu deleted file mode 100644 index d904b3cf..00000000 --- a/risc0/circuit/rv32im-v2-sys/kernels/cuda/ffi_supra.cu +++ /dev/null @@ -1,81 +0,0 @@ -// Copyright 2024 RISC Zero, Inc. -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#include "eval_check.cuh" - -#include "cuda.h" -#include "supra/fp.h" - -#include - -namespace risc0::circuit::rv32im_v2::cuda { - -__constant__ FpExt poly_mix[kNumPolyMixPows]; - -__global__ void eval_check(Fp* check, - const Fp* ctrl, - const Fp* data, - const Fp* accum, - const Fp* mix, - const Fp* out, - const Fp rou, - uint32_t po2, - uint32_t domain) { - uint32_t cycle = blockDim.x * blockIdx.x + threadIdx.x; - if (cycle < domain) { - FpExt tot = poly_fp(cycle, domain, ctrl, out, data, mix, accum); - Fp x = pow(rou, cycle); - Fp y = pow(Fp(3) * x, 1 << po2); - FpExt ret = tot * inv(y - Fp(1)); - check[domain * 0 + cycle] = ret[0]; - check[domain * 1 + cycle] = ret[1]; - check[domain * 2 + cycle] = ret[2]; - check[domain * 3 + cycle] = ret[3]; - } -} - -} // namespace risc0::circuit::rv32im_v2::cuda - -using namespace risc0::circuit::rv32im_v2::cuda; - -extern "C" { - -const char* risc0_circuit_rv32im_v2_cuda_eval_check(Fp* check, - const Fp* ctrl, - const Fp* data, - const Fp* accum, - const Fp* mix, - const Fp* out, - const Fp& rou, - uint32_t po2, - uint32_t domain, - const FpExt* poly_mix_pows) { - try { - CUDA_OK(cudaDeviceSynchronize()); - - CudaStream stream; - auto cfg = getSimpleConfig(domain); - cudaMemcpyToSymbol(poly_mix, poly_mix_pows, sizeof(poly_mix)); - eval_check<<>>( - check, ctrl, data, accum, mix, out, rou, po2, domain); - CUDA_OK(cudaStreamSynchronize(stream)); - } catch (const std::exception& err) { - return strdup(err.what()); - } catch (...) { - return strdup("Generic exception"); - } - return nullptr; -} - -} // extern "C" diff --git a/risc0/circuit/rv32im-v2-sys/kernels/cuda/layout.cu.inc b/risc0/circuit/rv32im-v2-sys/kernels/cuda/layout.cu.inc deleted file mode 100644 index d92633a5..00000000 --- a/risc0/circuit/rv32im-v2-sys/kernels/cuda/layout.cu.inc +++ /dev/null @@ -1,4989 +0,0 @@ -__device__ constexpr NondetRegLayout8LayoutArray kLayout__3 = - NondetRegLayout8LayoutArray{NondetRegLayout{._super = /*offset=*/19}, - NondetRegLayout{._super = /*offset=*/20}, - NondetRegLayout{._super = /*offset=*/21}, - NondetRegLayout{._super = /*offset=*/22}, - NondetRegLayout{._super = /*offset=*/23}, - NondetRegLayout{._super = /*offset=*/24}, - NondetRegLayout{._super = /*offset=*/25}, - NondetRegLayout{._super = /*offset=*/26}}; -__device__ constexpr OneHot_8_Layout kLayout__2 = OneHot_8_Layout{._super = kLayout__3}; -__device__ constexpr InstInputLayout kLayout__1 = InstInputLayout{.minorOnehot = kLayout__2}; -__device__ constexpr NondetRegLayout11LayoutArray kLayout__5 = - NondetRegLayout11LayoutArray{NondetRegLayout{._super = /*offset=*/1}, - NondetRegLayout{._super = /*offset=*/2}, - NondetRegLayout{._super = /*offset=*/3}, - NondetRegLayout{._super = /*offset=*/4}, - NondetRegLayout{._super = /*offset=*/5}, - NondetRegLayout{._super = /*offset=*/6}, - NondetRegLayout{._super = /*offset=*/7}, - NondetRegLayout{._super = /*offset=*/8}, - NondetRegLayout{._super = /*offset=*/9}, - NondetRegLayout{._super = /*offset=*/10}, - NondetRegLayout{._super = /*offset=*/11}}; -__device__ constexpr OneHot_11_Layout kLayout__4 = OneHot_11_Layout{._super = kLayout__5}; -__device__ constexpr NondetU16RegLayout kLayout__10 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/37}, - .val = NondetRegLayout{._super = /*offset=*/38}}}; -__device__ constexpr NondetU16RegLayout kLayout__11 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/40}, - .val = NondetRegLayout{._super = /*offset=*/41}}}; -__device__ constexpr NormalizeU32Layout kLayout__9 = - NormalizeU32Layout{.low16 = kLayout__10, - .lowCarry = NondetRegLayout{._super = /*offset=*/39}, - .high16 = kLayout__11, - .highCarry = NondetRegLayout{._super = /*offset=*/42}}; -__device__ constexpr NondetU16RegLayout kLayout__13 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/43}, - .val = NondetRegLayout{._super = /*offset=*/44}}}; -__device__ constexpr NondetU16RegLayout kLayout__14 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/46}, - .val = NondetRegLayout{._super = /*offset=*/47}}}; -__device__ constexpr NormalizeU32Layout kLayout__12 = - NormalizeU32Layout{.low16 = kLayout__13, - .lowCarry = NondetRegLayout{._super = /*offset=*/45}, - .high16 = kLayout__14, - .highCarry = NondetRegLayout{._super = /*offset=*/48}}; -__device__ constexpr MemoryArgLayout kLayout__18 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/53}, - .addr = NondetRegLayout{._super = /*offset=*/52}, - .cycle = NondetRegLayout{._super = /*offset=*/54}, - .dataLow = NondetRegLayout{._super = /*offset=*/55}, - .dataHigh = NondetRegLayout{._super = /*offset=*/56}}; -__device__ constexpr MemoryArgLayout kLayout__19 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/57}, - .addr = NondetRegLayout{._super = /*offset=*/52}, - .cycle = NondetRegLayout{._super = /*offset=*/0}, - .dataLow = NondetRegLayout{._super = /*offset=*/58}, - .dataHigh = NondetRegLayout{._super = /*offset=*/59}}; -__device__ constexpr MemoryIOLayout kLayout__17 = - MemoryIOLayout{.oldTxn = kLayout__18, .newTxn = kLayout__19}; -__device__ constexpr IsCycleLayout kLayout__21 = - IsCycleLayout{.arg = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/60}, - .cycle = NondetRegLayout{._super = /*offset=*/61}}}; -__device__ constexpr IsForwardLayout kLayout__20 = IsForwardLayout{._0 = kLayout__21}; -__device__ constexpr MemoryWriteLayout kLayout__16 = - MemoryWriteLayout{.io = kLayout__17, ._0 = kLayout__20}; -__device__ constexpr WriteRdLayout kLayout__15 = - WriteRdLayout{.isRd0 = IsZeroLayout{._super = NondetRegLayout{._super = /*offset=*/49}, - .inv = NondetRegLayout{._super = /*offset=*/50}}, - .writeAddr = NondetRegLayout{._super = /*offset=*/51}, - ._0 = kLayout__16}; -__device__ constexpr FinalizeMiscLayout kLayout__8 = - FinalizeMiscLayout{.writeData = kLayout__9, .pcNorm = kLayout__12, ._0 = kLayout__15}; -__device__ constexpr DecoderLayout kLayout__24 = - DecoderLayout{._f7_6 = NondetRegLayout{._super = /*offset=*/62}, - ._f7_45 = NondetRegLayout{._super = /*offset=*/63}, - ._f7_23 = NondetRegLayout{._super = /*offset=*/64}, - ._f7_01 = NondetRegLayout{._super = /*offset=*/65}, - ._rs2_34 = NondetRegLayout{._super = /*offset=*/66}, - ._rs2_12 = NondetRegLayout{._super = /*offset=*/67}, - ._rs2_0 = NondetRegLayout{._super = /*offset=*/68}, - ._rs1_34 = NondetRegLayout{._super = /*offset=*/69}, - ._rs1_12 = NondetRegLayout{._super = /*offset=*/70}, - ._rs1_0 = NondetRegLayout{._super = /*offset=*/71}, - ._f3_2 = NondetRegLayout{._super = /*offset=*/72}, - ._f3_01 = NondetRegLayout{._super = /*offset=*/73}, - ._rd_34 = NondetRegLayout{._super = /*offset=*/74}, - ._rd_12 = NondetRegLayout{._super = /*offset=*/75}, - ._rd_0 = NondetRegLayout{._super = /*offset=*/76}, - .opcode = NondetRegLayout{._super = /*offset=*/77}}; -__device__ constexpr NondetU16RegLayout kLayout__27 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/80}, - .val = NondetRegLayout{._super = /*offset=*/81}}}; -__device__ constexpr U16RegLayout kLayout__26 = U16RegLayout{.ret = kLayout__27}; -__device__ constexpr NondetU16RegLayout kLayout__28 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/84}, - .val = NondetRegLayout{._super = /*offset=*/85}}}; -__device__ constexpr AddrDecomposeLayout kLayout__25 = - AddrDecomposeLayout{.low2 = NondetRegLayout{._super = /*offset=*/79}, - .upperDiff = kLayout__26, - ._0 = IsZeroLayout{._super = NondetRegLayout{._super = /*offset=*/82}, - .inv = NondetRegLayout{._super = /*offset=*/83}}, - .med14 = kLayout__28}; -__device__ constexpr MemoryArgLayout kLayout__31 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/87}, - .addr = NondetRegLayout{._super = /*offset=*/86}, - .cycle = NondetRegLayout{._super = /*offset=*/88}, - .dataLow = NondetRegLayout{._super = /*offset=*/89}, - .dataHigh = NondetRegLayout{._super = /*offset=*/90}}; -__device__ constexpr MemoryArgLayout kLayout__32 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/91}, - .addr = NondetRegLayout{._super = /*offset=*/86}, - .cycle = NondetRegLayout{._super = /*offset=*/0}, - .dataLow = NondetRegLayout{._super = /*offset=*/92}, - .dataHigh = NondetRegLayout{._super = /*offset=*/93}}; -__device__ constexpr MemoryIOLayout kLayout__30 = - MemoryIOLayout{.oldTxn = kLayout__31, .newTxn = kLayout__32}; -__device__ constexpr IsCycleLayout kLayout__34 = - IsCycleLayout{.arg = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/94}, - .cycle = NondetRegLayout{._super = /*offset=*/95}}}; -__device__ constexpr IsForwardLayout kLayout__33 = IsForwardLayout{._0 = kLayout__34}; -__device__ constexpr MemoryReadLayout kLayout__29 = - MemoryReadLayout{.io = kLayout__30, ._0 = kLayout__33}; -__device__ constexpr DecodeInstLayout kLayout__23 = - DecodeInstLayout{._super = kLayout__24, - .arg = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/78}, - .cycle = NondetRegLayout{._super = /*offset=*/0}}, - .pcAddr = kLayout__25, - .loadInst = kLayout__29}; -__device__ constexpr MemoryArgLayout kLayout__38 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/97}, - .addr = NondetRegLayout{._super = /*offset=*/96}, - .cycle = NondetRegLayout{._super = /*offset=*/98}, - .dataLow = NondetRegLayout{._super = /*offset=*/99}, - .dataHigh = NondetRegLayout{._super = /*offset=*/100}}; -__device__ constexpr MemoryArgLayout kLayout__39 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/101}, - .addr = NondetRegLayout{._super = /*offset=*/96}, - .cycle = NondetRegLayout{._super = /*offset=*/0}, - .dataLow = NondetRegLayout{._super = /*offset=*/102}, - .dataHigh = NondetRegLayout{._super = /*offset=*/103}}; -__device__ constexpr MemoryIOLayout kLayout__37 = - MemoryIOLayout{.oldTxn = kLayout__38, .newTxn = kLayout__39}; -__device__ constexpr IsCycleLayout kLayout__41 = - IsCycleLayout{.arg = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/104}, - .cycle = NondetRegLayout{._super = /*offset=*/105}}}; -__device__ constexpr IsForwardLayout kLayout__40 = IsForwardLayout{._0 = kLayout__41}; -__device__ constexpr MemoryReadLayout kLayout__36 = - MemoryReadLayout{.io = kLayout__37, ._0 = kLayout__40}; -__device__ constexpr ReadRegLayout kLayout__35 = - ReadRegLayout{._super = kLayout__36, .addr = NondetRegLayout{._super = /*offset=*/106}}; -__device__ constexpr MemoryArgLayout kLayout__45 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/108}, - .addr = NondetRegLayout{._super = /*offset=*/107}, - .cycle = NondetRegLayout{._super = /*offset=*/109}, - .dataLow = NondetRegLayout{._super = /*offset=*/110}, - .dataHigh = NondetRegLayout{._super = /*offset=*/111}}; -__device__ constexpr MemoryArgLayout kLayout__46 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/112}, - .addr = NondetRegLayout{._super = /*offset=*/107}, - .cycle = NondetRegLayout{._super = /*offset=*/0}, - .dataLow = NondetRegLayout{._super = /*offset=*/113}, - .dataHigh = NondetRegLayout{._super = /*offset=*/114}}; -__device__ constexpr MemoryIOLayout kLayout__44 = - MemoryIOLayout{.oldTxn = kLayout__45, .newTxn = kLayout__46}; -__device__ constexpr IsCycleLayout kLayout__48 = - IsCycleLayout{.arg = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/115}, - .cycle = NondetRegLayout{._super = /*offset=*/116}}}; -__device__ constexpr IsForwardLayout kLayout__47 = IsForwardLayout{._0 = kLayout__48}; -__device__ constexpr MemoryReadLayout kLayout__43 = - MemoryReadLayout{.io = kLayout__44, ._0 = kLayout__47}; -__device__ constexpr ReadRegLayout kLayout__42 = - ReadRegLayout{._super = kLayout__43, .addr = NondetRegLayout{._super = /*offset=*/117}}; -__device__ constexpr MiscInputLayout kLayout__22 = - MiscInputLayout{.decoded = kLayout__23, .rs1 = kLayout__35, .rs2 = kLayout__42}; -__device__ constexpr ArgU16Layout5LayoutArray kLayout__50 = - ArgU16Layout5LayoutArray{ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/27}, - .val = NondetRegLayout{._super = /*offset=*/28}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/29}, - .val = NondetRegLayout{._super = /*offset=*/30}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/31}, - .val = NondetRegLayout{._super = /*offset=*/32}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/33}, - .val = NondetRegLayout{._super = /*offset=*/34}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/35}, - .val = NondetRegLayout{._super = /*offset=*/36}}}; -__device__ constexpr _Arguments_Misc0MiscOutputLayout kLayout__49 = - _Arguments_Misc0MiscOutputLayout{.argU16 = kLayout__50}; -__device__ constexpr Misc0MiscOutputArm0Layout kLayout__52 = Misc0MiscOutputArm0Layout{ - ._extra0 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/27}, - .val = NondetRegLayout{._super = /*offset=*/28}}, - ._extra1 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/29}, - .val = NondetRegLayout{._super = /*offset=*/30}}, - ._extra2 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/31}, - .val = NondetRegLayout{._super = /*offset=*/32}}, - ._extra3 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/33}, - .val = NondetRegLayout{._super = /*offset=*/34}}, - ._extra4 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/35}, - .val = NondetRegLayout{._super = /*offset=*/36}}}; -__device__ constexpr Misc0MiscOutputArm1Layout kLayout__53 = Misc0MiscOutputArm1Layout{ - ._extra0 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/27}, - .val = NondetRegLayout{._super = /*offset=*/28}}, - ._extra1 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/29}, - .val = NondetRegLayout{._super = /*offset=*/30}}, - ._extra2 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/31}, - .val = NondetRegLayout{._super = /*offset=*/32}}, - ._extra3 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/33}, - .val = NondetRegLayout{._super = /*offset=*/34}}, - ._extra4 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/35}, - .val = NondetRegLayout{._super = /*offset=*/36}}}; -__device__ constexpr NondetRegLayout16LayoutArray kLayout__60 = - NondetRegLayout16LayoutArray{NondetRegLayout{._super = /*offset=*/118}, - NondetRegLayout{._super = /*offset=*/119}, - NondetRegLayout{._super = /*offset=*/120}, - NondetRegLayout{._super = /*offset=*/121}, - NondetRegLayout{._super = /*offset=*/122}, - NondetRegLayout{._super = /*offset=*/123}, - NondetRegLayout{._super = /*offset=*/124}, - NondetRegLayout{._super = /*offset=*/125}, - NondetRegLayout{._super = /*offset=*/126}, - NondetRegLayout{._super = /*offset=*/127}, - NondetRegLayout{._super = /*offset=*/128}, - NondetRegLayout{._super = /*offset=*/129}, - NondetRegLayout{._super = /*offset=*/130}, - NondetRegLayout{._super = /*offset=*/131}, - NondetRegLayout{._super = /*offset=*/132}, - NondetRegLayout{._super = /*offset=*/133}}; -__device__ constexpr ToBits_16_Layout kLayout__59 = ToBits_16_Layout{._super = kLayout__60}; -__device__ constexpr NondetRegLayout16LayoutArray kLayout__62 = - NondetRegLayout16LayoutArray{NondetRegLayout{._super = /*offset=*/134}, - NondetRegLayout{._super = /*offset=*/135}, - NondetRegLayout{._super = /*offset=*/136}, - NondetRegLayout{._super = /*offset=*/137}, - NondetRegLayout{._super = /*offset=*/138}, - NondetRegLayout{._super = /*offset=*/139}, - NondetRegLayout{._super = /*offset=*/140}, - NondetRegLayout{._super = /*offset=*/141}, - NondetRegLayout{._super = /*offset=*/142}, - NondetRegLayout{._super = /*offset=*/143}, - NondetRegLayout{._super = /*offset=*/144}, - NondetRegLayout{._super = /*offset=*/145}, - NondetRegLayout{._super = /*offset=*/146}, - NondetRegLayout{._super = /*offset=*/147}, - NondetRegLayout{._super = /*offset=*/148}, - NondetRegLayout{._super = /*offset=*/149}}; -__device__ constexpr ToBits_16_Layout kLayout__61 = ToBits_16_Layout{._super = kLayout__62}; -__device__ constexpr BitwiseAndU16Layout kLayout__58 = - BitwiseAndU16Layout{.bitsX = kLayout__59, .bitsY = kLayout__61}; -__device__ constexpr NondetRegLayout16LayoutArray kLayout__65 = - NondetRegLayout16LayoutArray{NondetRegLayout{._super = /*offset=*/150}, - NondetRegLayout{._super = /*offset=*/151}, - NondetRegLayout{._super = /*offset=*/152}, - NondetRegLayout{._super = /*offset=*/153}, - NondetRegLayout{._super = /*offset=*/154}, - NondetRegLayout{._super = /*offset=*/155}, - NondetRegLayout{._super = /*offset=*/156}, - NondetRegLayout{._super = /*offset=*/157}, - NondetRegLayout{._super = /*offset=*/158}, - NondetRegLayout{._super = /*offset=*/159}, - NondetRegLayout{._super = /*offset=*/160}, - NondetRegLayout{._super = /*offset=*/161}, - NondetRegLayout{._super = /*offset=*/162}, - NondetRegLayout{._super = /*offset=*/163}, - NondetRegLayout{._super = /*offset=*/164}, - NondetRegLayout{._super = /*offset=*/165}}; -__device__ constexpr ToBits_16_Layout kLayout__64 = ToBits_16_Layout{._super = kLayout__65}; -__device__ constexpr NondetRegLayout16LayoutArray kLayout__67 = - NondetRegLayout16LayoutArray{NondetRegLayout{._super = /*offset=*/166}, - NondetRegLayout{._super = /*offset=*/167}, - NondetRegLayout{._super = /*offset=*/168}, - NondetRegLayout{._super = /*offset=*/169}, - NondetRegLayout{._super = /*offset=*/170}, - NondetRegLayout{._super = /*offset=*/171}, - NondetRegLayout{._super = /*offset=*/172}, - NondetRegLayout{._super = /*offset=*/173}, - NondetRegLayout{._super = /*offset=*/174}, - NondetRegLayout{._super = /*offset=*/175}, - NondetRegLayout{._super = /*offset=*/176}, - NondetRegLayout{._super = /*offset=*/177}, - NondetRegLayout{._super = /*offset=*/178}, - NondetRegLayout{._super = /*offset=*/179}, - NondetRegLayout{._super = /*offset=*/180}, - NondetRegLayout{._super = /*offset=*/181}}; -__device__ constexpr ToBits_16_Layout kLayout__66 = ToBits_16_Layout{._super = kLayout__67}; -__device__ constexpr BitwiseAndU16Layout kLayout__63 = - BitwiseAndU16Layout{.bitsX = kLayout__64, .bitsY = kLayout__66}; -__device__ constexpr BitwiseAndLayout kLayout__57 = - BitwiseAndLayout{._0 = kLayout__58, ._1 = kLayout__63}; -__device__ constexpr BitwiseXorLayout kLayout__56 = BitwiseXorLayout{.andXy = kLayout__57}; -__device__ constexpr OpXORLayout kLayout__55 = OpXORLayout{._0 = kLayout__56}; -__device__ constexpr Misc0MiscOutputArm2Layout kLayout__54 = Misc0MiscOutputArm2Layout{ - ._super = kLayout__55, - ._extra0 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/27}, - .val = NondetRegLayout{._super = /*offset=*/28}}, - ._extra1 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/29}, - .val = NondetRegLayout{._super = /*offset=*/30}}, - ._extra2 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/31}, - .val = NondetRegLayout{._super = /*offset=*/32}}, - ._extra3 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/33}, - .val = NondetRegLayout{._super = /*offset=*/34}}, - ._extra4 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/35}, - .val = NondetRegLayout{._super = /*offset=*/36}}}; -__device__ constexpr BitwiseOrLayout kLayout__70 = BitwiseOrLayout{.andXy = kLayout__57}; -__device__ constexpr OpORLayout kLayout__69 = OpORLayout{._0 = kLayout__70}; -__device__ constexpr Misc0MiscOutputArm3Layout kLayout__68 = Misc0MiscOutputArm3Layout{ - ._super = kLayout__69, - ._extra0 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/27}, - .val = NondetRegLayout{._super = /*offset=*/28}}, - ._extra1 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/29}, - .val = NondetRegLayout{._super = /*offset=*/30}}, - ._extra2 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/31}, - .val = NondetRegLayout{._super = /*offset=*/32}}, - ._extra3 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/33}, - .val = NondetRegLayout{._super = /*offset=*/34}}, - ._extra4 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/35}, - .val = NondetRegLayout{._super = /*offset=*/36}}}; -__device__ constexpr OpANDLayout kLayout__72 = OpANDLayout{._0 = kLayout__57}; -__device__ constexpr Misc0MiscOutputArm4Layout kLayout__71 = Misc0MiscOutputArm4Layout{ - ._super = kLayout__72, - ._extra0 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/27}, - .val = NondetRegLayout{._super = /*offset=*/28}}, - ._extra1 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/29}, - .val = NondetRegLayout{._super = /*offset=*/30}}, - ._extra2 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/31}, - .val = NondetRegLayout{._super = /*offset=*/32}}, - ._extra3 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/33}, - .val = NondetRegLayout{._super = /*offset=*/34}}, - ._extra4 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/35}, - .val = NondetRegLayout{._super = /*offset=*/36}}}; -__device__ constexpr NondetU16RegLayout kLayout__76 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/27}, - .val = NondetRegLayout{._super = /*offset=*/28}}}; -__device__ constexpr NondetU16RegLayout kLayout__77 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/29}, - .val = NondetRegLayout{._super = /*offset=*/30}}}; -__device__ constexpr NormalizeU32Layout kLayout__75 = - NormalizeU32Layout{.low16 = kLayout__76, - .lowCarry = NondetRegLayout{._super = /*offset=*/118}, - .high16 = kLayout__77, - .highCarry = NondetRegLayout{._super = /*offset=*/119}}; -__device__ constexpr NondetU16RegLayout kLayout__79 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/31}, - .val = NondetRegLayout{._super = /*offset=*/32}}}; -__device__ constexpr GetSignU32Layout kLayout__78 = GetSignU32Layout{ - ._super = NondetRegLayout{._super = /*offset=*/120}, .restTimesTwo = kLayout__79}; -__device__ constexpr NondetU16RegLayout kLayout__81 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/33}, - .val = NondetRegLayout{._super = /*offset=*/34}}}; -__device__ constexpr GetSignU32Layout kLayout__80 = GetSignU32Layout{ - ._super = NondetRegLayout{._super = /*offset=*/121}, .restTimesTwo = kLayout__81}; -__device__ constexpr NondetU16RegLayout kLayout__83 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/35}, - .val = NondetRegLayout{._super = /*offset=*/36}}}; -__device__ constexpr GetSignU32Layout kLayout__82 = GetSignU32Layout{ - ._super = NondetRegLayout{._super = /*offset=*/122}, .restTimesTwo = kLayout__83}; -__device__ constexpr CmpLessThanLayout kLayout__74 = - CmpLessThanLayout{.diff = kLayout__75, - .s1 = kLayout__78, - .s2 = kLayout__80, - .s3 = kLayout__82, - .overflow = NondetRegLayout{._super = /*offset=*/123}, - .isLessThan = NondetRegLayout{._super = /*offset=*/124}}; -__device__ constexpr OpSLTLayout kLayout__73 = OpSLTLayout{.cmp = kLayout__74}; -__device__ constexpr CmpLessThanUnsignedLayout kLayout__86 = - CmpLessThanUnsignedLayout{.diff = kLayout__75}; -__device__ constexpr OpSLTULayout kLayout__85 = OpSLTULayout{.cmp = kLayout__86}; -__device__ constexpr Misc0MiscOutputArm6Layout kLayout__84 = Misc0MiscOutputArm6Layout{ - ._super = kLayout__85, - ._extra0 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/31}, - .val = NondetRegLayout{._super = /*offset=*/32}}, - ._extra1 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/33}, - .val = NondetRegLayout{._super = /*offset=*/34}}, - ._extra2 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/35}, - .val = NondetRegLayout{._super = /*offset=*/36}}}; -__device__ constexpr Misc0MiscOutputArm7Layout kLayout__87 = Misc0MiscOutputArm7Layout{ - ._extra0 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/27}, - .val = NondetRegLayout{._super = /*offset=*/28}}, - ._extra1 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/29}, - .val = NondetRegLayout{._super = /*offset=*/30}}, - ._extra2 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/31}, - .val = NondetRegLayout{._super = /*offset=*/32}}, - ._extra3 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/33}, - .val = NondetRegLayout{._super = /*offset=*/34}}, - ._extra4 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/35}, - .val = NondetRegLayout{._super = /*offset=*/36}}}; -__device__ constexpr Misc0MiscOutputLayout kLayout__51 = Misc0MiscOutputLayout{.arm0 = kLayout__52, - .arm1 = kLayout__53, - .arm2 = kLayout__54, - .arm3 = kLayout__68, - .arm4 = kLayout__71, - .arm5 = kLayout__73, - .arm6 = kLayout__84, - .arm7 = kLayout__87}; -__device__ constexpr Misc0Layout kLayout__7 = Misc0Layout{._super = kLayout__8, - .input = kLayout__22, - ._arguments_Misc0MiscOutput = kLayout__49, - .miscOutput = kLayout__51}; -__device__ constexpr _Arguments_Misc1MiscOutputLayout kLayout__89 = - _Arguments_Misc1MiscOutputLayout{.argU16 = kLayout__50}; -__device__ constexpr OpXORILayout kLayout__92 = OpXORILayout{._0 = kLayout__56}; -__device__ constexpr Misc1MiscOutputArm0Layout kLayout__91 = Misc1MiscOutputArm0Layout{ - ._super = kLayout__92, - ._extra0 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/27}, - .val = NondetRegLayout{._super = /*offset=*/28}}, - ._extra1 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/29}, - .val = NondetRegLayout{._super = /*offset=*/30}}, - ._extra2 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/31}, - .val = NondetRegLayout{._super = /*offset=*/32}}, - ._extra3 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/33}, - .val = NondetRegLayout{._super = /*offset=*/34}}, - ._extra4 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/35}, - .val = NondetRegLayout{._super = /*offset=*/36}}}; -__device__ constexpr OpORILayout kLayout__94 = OpORILayout{._0 = kLayout__70}; -__device__ constexpr Misc1MiscOutputArm1Layout kLayout__93 = Misc1MiscOutputArm1Layout{ - ._super = kLayout__94, - ._extra0 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/27}, - .val = NondetRegLayout{._super = /*offset=*/28}}, - ._extra1 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/29}, - .val = NondetRegLayout{._super = /*offset=*/30}}, - ._extra2 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/31}, - .val = NondetRegLayout{._super = /*offset=*/32}}, - ._extra3 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/33}, - .val = NondetRegLayout{._super = /*offset=*/34}}, - ._extra4 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/35}, - .val = NondetRegLayout{._super = /*offset=*/36}}}; -__device__ constexpr OpANDILayout kLayout__96 = OpANDILayout{._0 = kLayout__57}; -__device__ constexpr Misc1MiscOutputArm2Layout kLayout__95 = Misc1MiscOutputArm2Layout{ - ._super = kLayout__96, - ._extra0 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/27}, - .val = NondetRegLayout{._super = /*offset=*/28}}, - ._extra1 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/29}, - .val = NondetRegLayout{._super = /*offset=*/30}}, - ._extra2 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/31}, - .val = NondetRegLayout{._super = /*offset=*/32}}, - ._extra3 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/33}, - .val = NondetRegLayout{._super = /*offset=*/34}}, - ._extra4 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/35}, - .val = NondetRegLayout{._super = /*offset=*/36}}}; -__device__ constexpr OpSLTILayout kLayout__97 = OpSLTILayout{.cmp = kLayout__74}; -__device__ constexpr OpSLTIULayout kLayout__99 = OpSLTIULayout{.cmp = kLayout__86}; -__device__ constexpr Misc1MiscOutputArm4Layout kLayout__98 = Misc1MiscOutputArm4Layout{ - ._super = kLayout__99, - ._extra0 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/31}, - .val = NondetRegLayout{._super = /*offset=*/32}}, - ._extra1 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/33}, - .val = NondetRegLayout{._super = /*offset=*/34}}, - ._extra2 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/35}, - .val = NondetRegLayout{._super = /*offset=*/36}}}; -__device__ constexpr CmpEqualLayout kLayout__102 = - CmpEqualLayout{.lowSame = IsZeroLayout{._super = NondetRegLayout{._super = /*offset=*/118}, - .inv = NondetRegLayout{._super = /*offset=*/119}}, - .highSame = IsZeroLayout{._super = NondetRegLayout{._super = /*offset=*/120}, - .inv = NondetRegLayout{._super = /*offset=*/121}}, - .isEqual = NondetRegLayout{._super = /*offset=*/122}}; -__device__ constexpr OpBEQLayout kLayout__101 = OpBEQLayout{.cmp = kLayout__102}; -__device__ constexpr Misc1MiscOutputArm5Layout kLayout__100 = Misc1MiscOutputArm5Layout{ - ._super = kLayout__101, - ._extra0 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/27}, - .val = NondetRegLayout{._super = /*offset=*/28}}, - ._extra1 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/29}, - .val = NondetRegLayout{._super = /*offset=*/30}}, - ._extra2 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/31}, - .val = NondetRegLayout{._super = /*offset=*/32}}, - ._extra3 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/33}, - .val = NondetRegLayout{._super = /*offset=*/34}}, - ._extra4 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/35}, - .val = NondetRegLayout{._super = /*offset=*/36}}}; -__device__ constexpr OpBNELayout kLayout__104 = OpBNELayout{.cmp = kLayout__102}; -__device__ constexpr Misc1MiscOutputArm6Layout kLayout__103 = Misc1MiscOutputArm6Layout{ - ._super = kLayout__104, - ._extra0 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/27}, - .val = NondetRegLayout{._super = /*offset=*/28}}, - ._extra1 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/29}, - .val = NondetRegLayout{._super = /*offset=*/30}}, - ._extra2 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/31}, - .val = NondetRegLayout{._super = /*offset=*/32}}, - ._extra3 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/33}, - .val = NondetRegLayout{._super = /*offset=*/34}}, - ._extra4 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/35}, - .val = NondetRegLayout{._super = /*offset=*/36}}}; -__device__ constexpr OpBLTLayout kLayout__105 = OpBLTLayout{.cmp = kLayout__74}; -__device__ constexpr Misc1MiscOutputLayout kLayout__90 = - Misc1MiscOutputLayout{.arm0 = kLayout__91, - .arm1 = kLayout__93, - .arm2 = kLayout__95, - .arm3 = kLayout__97, - .arm4 = kLayout__98, - .arm5 = kLayout__100, - .arm6 = kLayout__103, - .arm7 = kLayout__105}; -__device__ constexpr Misc1Layout kLayout__88 = - Misc1Layout{._super = kLayout__8, - .input = kLayout__22, - ._arguments_Misc1MiscOutput = kLayout__89, - .miscOutput = kLayout__90}; -__device__ constexpr _Arguments_Misc2MiscOutputLayout kLayout__107 = - _Arguments_Misc2MiscOutputLayout{.argU16 = kLayout__50}; -__device__ constexpr OpBGELayout kLayout__109 = OpBGELayout{.cmp = kLayout__74}; -__device__ constexpr OpBLTULayout kLayout__111 = OpBLTULayout{.cmp = kLayout__86}; -__device__ constexpr Misc2MiscOutputArm1Layout kLayout__110 = Misc2MiscOutputArm1Layout{ - ._super = kLayout__111, - ._extra0 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/31}, - .val = NondetRegLayout{._super = /*offset=*/32}}, - ._extra1 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/33}, - .val = NondetRegLayout{._super = /*offset=*/34}}, - ._extra2 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/35}, - .val = NondetRegLayout{._super = /*offset=*/36}}}; -__device__ constexpr OpBGEULayout kLayout__113 = OpBGEULayout{.cmp = kLayout__86}; -__device__ constexpr Misc2MiscOutputArm2Layout kLayout__112 = Misc2MiscOutputArm2Layout{ - ._super = kLayout__113, - ._extra0 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/31}, - .val = NondetRegLayout{._super = /*offset=*/32}}, - ._extra1 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/33}, - .val = NondetRegLayout{._super = /*offset=*/34}}, - ._extra2 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/35}, - .val = NondetRegLayout{._super = /*offset=*/36}}}; -__device__ constexpr Misc2MiscOutputArm3Layout kLayout__114 = Misc2MiscOutputArm3Layout{ - ._extra0 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/27}, - .val = NondetRegLayout{._super = /*offset=*/28}}, - ._extra1 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/29}, - .val = NondetRegLayout{._super = /*offset=*/30}}, - ._extra2 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/31}, - .val = NondetRegLayout{._super = /*offset=*/32}}, - ._extra3 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/33}, - .val = NondetRegLayout{._super = /*offset=*/34}}, - ._extra4 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/35}, - .val = NondetRegLayout{._super = /*offset=*/36}}}; -__device__ constexpr Misc2MiscOutputArm4Layout kLayout__115 = Misc2MiscOutputArm4Layout{ - ._extra0 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/27}, - .val = NondetRegLayout{._super = /*offset=*/28}}, - ._extra1 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/29}, - .val = NondetRegLayout{._super = /*offset=*/30}}, - ._extra2 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/31}, - .val = NondetRegLayout{._super = /*offset=*/32}}, - ._extra3 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/33}, - .val = NondetRegLayout{._super = /*offset=*/34}}, - ._extra4 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/35}, - .val = NondetRegLayout{._super = /*offset=*/36}}}; -__device__ constexpr Misc2MiscOutputArm5Layout kLayout__116 = Misc2MiscOutputArm5Layout{ - ._extra0 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/27}, - .val = NondetRegLayout{._super = /*offset=*/28}}, - ._extra1 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/29}, - .val = NondetRegLayout{._super = /*offset=*/30}}, - ._extra2 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/31}, - .val = NondetRegLayout{._super = /*offset=*/32}}, - ._extra3 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/33}, - .val = NondetRegLayout{._super = /*offset=*/34}}, - ._extra4 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/35}, - .val = NondetRegLayout{._super = /*offset=*/36}}}; -__device__ constexpr Misc2MiscOutputArm6Layout kLayout__117 = Misc2MiscOutputArm6Layout{ - ._extra0 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/27}, - .val = NondetRegLayout{._super = /*offset=*/28}}, - ._extra1 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/29}, - .val = NondetRegLayout{._super = /*offset=*/30}}, - ._extra2 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/31}, - .val = NondetRegLayout{._super = /*offset=*/32}}, - ._extra3 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/33}, - .val = NondetRegLayout{._super = /*offset=*/34}}, - ._extra4 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/35}, - .val = NondetRegLayout{._super = /*offset=*/36}}}; -__device__ constexpr Misc2MiscOutputArm7Layout kLayout__118 = Misc2MiscOutputArm7Layout{ - ._extra0 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/27}, - .val = NondetRegLayout{._super = /*offset=*/28}}, - ._extra1 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/29}, - .val = NondetRegLayout{._super = /*offset=*/30}}, - ._extra2 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/31}, - .val = NondetRegLayout{._super = /*offset=*/32}}, - ._extra3 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/33}, - .val = NondetRegLayout{._super = /*offset=*/34}}, - ._extra4 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/35}, - .val = NondetRegLayout{._super = /*offset=*/36}}}; -__device__ constexpr Misc2MiscOutputLayout kLayout__108 = - Misc2MiscOutputLayout{.arm0 = kLayout__109, - .arm1 = kLayout__110, - .arm2 = kLayout__112, - .arm3 = kLayout__114, - .arm4 = kLayout__115, - .arm5 = kLayout__116, - .arm6 = kLayout__117, - .arm7 = kLayout__118}; -__device__ constexpr Misc2Layout kLayout__106 = - Misc2Layout{._super = kLayout__8, - .input = kLayout__22, - ._arguments_Misc2MiscOutput = kLayout__107, - .miscOutput = kLayout__108}; -__device__ constexpr DecoderLayout kLayout__122 = - DecoderLayout{._f7_6 = NondetRegLayout{._super = /*offset=*/65}, - ._f7_45 = NondetRegLayout{._super = /*offset=*/66}, - ._f7_23 = NondetRegLayout{._super = /*offset=*/67}, - ._f7_01 = NondetRegLayout{._super = /*offset=*/68}, - ._rs2_34 = NondetRegLayout{._super = /*offset=*/69}, - ._rs2_12 = NondetRegLayout{._super = /*offset=*/70}, - ._rs2_0 = NondetRegLayout{._super = /*offset=*/71}, - ._rs1_34 = NondetRegLayout{._super = /*offset=*/72}, - ._rs1_12 = NondetRegLayout{._super = /*offset=*/73}, - ._rs1_0 = NondetRegLayout{._super = /*offset=*/74}, - ._f3_2 = NondetRegLayout{._super = /*offset=*/75}, - ._f3_01 = NondetRegLayout{._super = /*offset=*/76}, - ._rd_34 = NondetRegLayout{._super = /*offset=*/77}, - ._rd_12 = NondetRegLayout{._super = /*offset=*/78}, - ._rd_0 = NondetRegLayout{._super = /*offset=*/79}, - .opcode = NondetRegLayout{._super = /*offset=*/80}}; -__device__ constexpr NondetU16RegLayout kLayout__125 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/83}, - .val = NondetRegLayout{._super = /*offset=*/84}}}; -__device__ constexpr U16RegLayout kLayout__124 = U16RegLayout{.ret = kLayout__125}; -__device__ constexpr NondetU16RegLayout kLayout__126 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/87}, - .val = NondetRegLayout{._super = /*offset=*/88}}}; -__device__ constexpr AddrDecomposeLayout kLayout__123 = - AddrDecomposeLayout{.low2 = NondetRegLayout{._super = /*offset=*/82}, - .upperDiff = kLayout__124, - ._0 = IsZeroLayout{._super = NondetRegLayout{._super = /*offset=*/85}, - .inv = NondetRegLayout{._super = /*offset=*/86}}, - .med14 = kLayout__126}; -__device__ constexpr MemoryArgLayout kLayout__129 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/90}, - .addr = NondetRegLayout{._super = /*offset=*/89}, - .cycle = NondetRegLayout{._super = /*offset=*/91}, - .dataLow = NondetRegLayout{._super = /*offset=*/92}, - .dataHigh = NondetRegLayout{._super = /*offset=*/93}}; -__device__ constexpr MemoryArgLayout kLayout__130 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/94}, - .addr = NondetRegLayout{._super = /*offset=*/89}, - .cycle = NondetRegLayout{._super = /*offset=*/0}, - .dataLow = NondetRegLayout{._super = /*offset=*/95}, - .dataHigh = NondetRegLayout{._super = /*offset=*/96}}; -__device__ constexpr MemoryIOLayout kLayout__128 = - MemoryIOLayout{.oldTxn = kLayout__129, .newTxn = kLayout__130}; -__device__ constexpr IsCycleLayout kLayout__132 = - IsCycleLayout{.arg = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/97}, - .cycle = NondetRegLayout{._super = /*offset=*/98}}}; -__device__ constexpr IsForwardLayout kLayout__131 = IsForwardLayout{._0 = kLayout__132}; -__device__ constexpr MemoryReadLayout kLayout__127 = - MemoryReadLayout{.io = kLayout__128, ._0 = kLayout__131}; -__device__ constexpr DecodeInstLayout kLayout__121 = - DecodeInstLayout{._super = kLayout__122, - .arg = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/81}, - .cycle = NondetRegLayout{._super = /*offset=*/0}}, - .pcAddr = kLayout__123, - .loadInst = kLayout__127}; -__device__ constexpr MemoryArgLayout kLayout__136 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/100}, - .addr = NondetRegLayout{._super = /*offset=*/99}, - .cycle = NondetRegLayout{._super = /*offset=*/101}, - .dataLow = NondetRegLayout{._super = /*offset=*/102}, - .dataHigh = NondetRegLayout{._super = /*offset=*/103}}; -__device__ constexpr MemoryArgLayout kLayout__137 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/104}, - .addr = NondetRegLayout{._super = /*offset=*/99}, - .cycle = NondetRegLayout{._super = /*offset=*/0}, - .dataLow = NondetRegLayout{._super = /*offset=*/105}, - .dataHigh = NondetRegLayout{._super = /*offset=*/106}}; -__device__ constexpr MemoryIOLayout kLayout__135 = - MemoryIOLayout{.oldTxn = kLayout__136, .newTxn = kLayout__137}; -__device__ constexpr IsCycleLayout kLayout__139 = - IsCycleLayout{.arg = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/107}, - .cycle = NondetRegLayout{._super = /*offset=*/108}}}; -__device__ constexpr IsForwardLayout kLayout__138 = IsForwardLayout{._0 = kLayout__139}; -__device__ constexpr MemoryReadLayout kLayout__134 = - MemoryReadLayout{.io = kLayout__135, ._0 = kLayout__138}; -__device__ constexpr ReadRegLayout kLayout__133 = - ReadRegLayout{._super = kLayout__134, .addr = NondetRegLayout{._super = /*offset=*/109}}; -__device__ constexpr MemoryArgLayout kLayout__143 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/111}, - .addr = NondetRegLayout{._super = /*offset=*/110}, - .cycle = NondetRegLayout{._super = /*offset=*/112}, - .dataLow = NondetRegLayout{._super = /*offset=*/113}, - .dataHigh = NondetRegLayout{._super = /*offset=*/114}}; -__device__ constexpr MemoryArgLayout kLayout__144 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/115}, - .addr = NondetRegLayout{._super = /*offset=*/110}, - .cycle = NondetRegLayout{._super = /*offset=*/0}, - .dataLow = NondetRegLayout{._super = /*offset=*/116}, - .dataHigh = NondetRegLayout{._super = /*offset=*/117}}; -__device__ constexpr MemoryIOLayout kLayout__142 = - MemoryIOLayout{.oldTxn = kLayout__143, .newTxn = kLayout__144}; -__device__ constexpr IsCycleLayout kLayout__146 = - IsCycleLayout{.arg = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/118}, - .cycle = NondetRegLayout{._super = /*offset=*/119}}}; -__device__ constexpr IsForwardLayout kLayout__145 = IsForwardLayout{._0 = kLayout__146}; -__device__ constexpr MemoryReadLayout kLayout__141 = - MemoryReadLayout{.io = kLayout__142, ._0 = kLayout__145}; -__device__ constexpr ReadRegLayout kLayout__140 = - ReadRegLayout{._super = kLayout__141, .addr = NondetRegLayout{._super = /*offset=*/120}}; -__device__ constexpr MulInputLayout kLayout__120 = - MulInputLayout{.decoded = kLayout__121, .rs1 = kLayout__133, .rs2 = kLayout__140}; -__device__ constexpr ArgU16Layout6LayoutArray kLayout__148 = - ArgU16Layout6LayoutArray{ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/27}, - .val = NondetRegLayout{._super = /*offset=*/28}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/29}, - .val = NondetRegLayout{._super = /*offset=*/30}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/31}, - .val = NondetRegLayout{._super = /*offset=*/32}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/33}, - .val = NondetRegLayout{._super = /*offset=*/34}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/35}, - .val = NondetRegLayout{._super = /*offset=*/36}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/37}, - .val = NondetRegLayout{._super = /*offset=*/38}}}; -__device__ constexpr ArgU8Layout13LayoutArray kLayout__149 = - ArgU8Layout13LayoutArray{ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/39}, - .val = NondetRegLayout{._super = /*offset=*/40}}, - ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/41}, - .val = NondetRegLayout{._super = /*offset=*/42}}, - ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/43}, - .val = NondetRegLayout{._super = /*offset=*/44}}, - ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/45}, - .val = NondetRegLayout{._super = /*offset=*/46}}, - ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/47}, - .val = NondetRegLayout{._super = /*offset=*/48}}, - ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/49}, - .val = NondetRegLayout{._super = /*offset=*/50}}, - ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/51}, - .val = NondetRegLayout{._super = /*offset=*/52}}, - ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/53}, - .val = NondetRegLayout{._super = /*offset=*/54}}, - ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/55}, - .val = NondetRegLayout{._super = /*offset=*/56}}, - ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/57}, - .val = NondetRegLayout{._super = /*offset=*/58}}, - ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/59}, - .val = NondetRegLayout{._super = /*offset=*/60}}, - ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/61}, - .val = NondetRegLayout{._super = /*offset=*/62}}, - ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/63}, - .val = NondetRegLayout{._super = /*offset=*/64}}}; -__device__ constexpr _Arguments_Mul0MulOutputLayout kLayout__147 = - _Arguments_Mul0MulOutputLayout{.argU16 = kLayout__148, .argU8 = kLayout__149}; -__device__ constexpr NondetRegLayout5LayoutArray kLayout__154 = - NondetRegLayout5LayoutArray{NondetRegLayout{._super = /*offset=*/121}, - NondetRegLayout{._super = /*offset=*/122}, - NondetRegLayout{._super = /*offset=*/123}, - NondetRegLayout{._super = /*offset=*/124}, - NondetRegLayout{._super = /*offset=*/125}}; -__device__ constexpr ToBits_5_Layout kLayout__153 = ToBits_5_Layout{._super = kLayout__154}; -__device__ constexpr DynPo2Layout kLayout__152 = - DynPo2Layout{.low5 = kLayout__153, - .checkU16 = kLayout__76, - .b3 = NondetRegLayout{._super = /*offset=*/126}, - .low = NondetRegLayout{._super = /*offset=*/127}, - .high = NondetRegLayout{._super = /*offset=*/128}}; -__device__ constexpr NondetU8RegLayout kLayout__158 = - NondetU8RegLayout{.arg = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/39}, - .val = NondetRegLayout{._super = /*offset=*/40}}}; -__device__ constexpr NondetU8RegLayout kLayout__159 = - NondetU8RegLayout{.arg = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/41}, - .val = NondetRegLayout{._super = /*offset=*/42}}}; -__device__ constexpr NondetU8RegLayout kLayout__160 = - NondetU8RegLayout{.arg = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/43}, - .val = NondetRegLayout{._super = /*offset=*/44}}}; -__device__ constexpr NondetU8RegLayout kLayout__161 = - NondetU8RegLayout{.arg = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/45}, - .val = NondetRegLayout{._super = /*offset=*/46}}}; -__device__ constexpr NondetU8RegLayout kLayout__162 = - NondetU8RegLayout{.arg = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/47}, - .val = NondetRegLayout{._super = /*offset=*/48}}}; -__device__ constexpr ExpandU32Layout kLayout__157 = - ExpandU32Layout{.b0 = kLayout__158, - .b1 = kLayout__159, - .b2 = kLayout__160, - .b3 = kLayout__161, - .b3Top7times2 = kLayout__162, - .topBit = NondetRegLayout{._super = /*offset=*/129}}; -__device__ constexpr NondetU8RegLayout kLayout__164 = - NondetU8RegLayout{.arg = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/49}, - .val = NondetRegLayout{._super = /*offset=*/50}}}; -__device__ constexpr NondetU8RegLayout kLayout__165 = - NondetU8RegLayout{.arg = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/51}, - .val = NondetRegLayout{._super = /*offset=*/52}}}; -__device__ constexpr NondetU8RegLayout kLayout__166 = - NondetU8RegLayout{.arg = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/53}, - .val = NondetRegLayout{._super = /*offset=*/54}}}; -__device__ constexpr NondetU8RegLayout kLayout__167 = - NondetU8RegLayout{.arg = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/55}, - .val = NondetRegLayout{._super = /*offset=*/56}}}; -__device__ constexpr NondetU8RegLayout kLayout__168 = - NondetU8RegLayout{.arg = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/57}, - .val = NondetRegLayout{._super = /*offset=*/58}}}; -__device__ constexpr ExpandU32Layout kLayout__163 = - ExpandU32Layout{.b0 = kLayout__164, - .b1 = kLayout__165, - .b2 = kLayout__166, - .b3 = kLayout__167, - .b3Top7times2 = kLayout__168, - .topBit = NondetRegLayout{._super = /*offset=*/130}}; -__device__ constexpr NondetU8RegLayout kLayout__170 = - NondetU8RegLayout{.arg = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/59}, - .val = NondetRegLayout{._super = /*offset=*/60}}}; -__device__ constexpr SplitTotalLayout kLayout__169 = SplitTotalLayout{ - .out = kLayout__79, - .carryByte = kLayout__170, - .carryExtra = NondetFakeTwitRegLayout{.reg0 = NondetRegLayout{._super = /*offset=*/132}, - .reg1 = NondetRegLayout{._super = /*offset=*/133}}}; -__device__ constexpr NondetU8RegLayout kLayout__172 = - NondetU8RegLayout{.arg = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/61}, - .val = NondetRegLayout{._super = /*offset=*/62}}}; -__device__ constexpr SplitTotalLayout kLayout__171 = SplitTotalLayout{ - .out = kLayout__81, - .carryByte = kLayout__172, - .carryExtra = NondetFakeTwitRegLayout{.reg0 = NondetRegLayout{._super = /*offset=*/134}, - .reg1 = NondetRegLayout{._super = /*offset=*/135}}}; -__device__ constexpr NondetU8RegLayout kLayout__174 = - NondetU8RegLayout{.arg = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/63}, - .val = NondetRegLayout{._super = /*offset=*/64}}}; -__device__ constexpr SplitTotalLayout kLayout__173 = SplitTotalLayout{ - .out = kLayout__83, - .carryByte = kLayout__174, - .carryExtra = NondetFakeTwitRegLayout{.reg0 = NondetRegLayout{._super = /*offset=*/136}, - .reg1 = NondetRegLayout{._super = /*offset=*/137}}}; -__device__ constexpr MultiplyAccumulateLayout kLayout__156 = MultiplyAccumulateLayout{ - .ax = kLayout__157, - .bx = kLayout__163, - .cSign = NondetRegLayout{._super = /*offset=*/131}, - .cRestTimes2 = kLayout__77, - .s0 = kLayout__169, - .s1 = kLayout__171, - .s2 = kLayout__173, - .s3Out = kLayout__10, - .s3Carry = NondetFakeTwitRegLayout{.reg0 = NondetRegLayout{._super = /*offset=*/138}, - .reg1 = NondetRegLayout{._super = /*offset=*/139}}}; -__device__ constexpr DoMulLayout kLayout__155 = DoMulLayout{.mul = kLayout__156}; -__device__ constexpr OpSLLLayout kLayout__151 = - OpSLLLayout{.shiftMul = kLayout__152, ._0 = kLayout__155}; -__device__ constexpr OpSLLILayout kLayout__175 = - OpSLLILayout{.shiftMul = kLayout__152, ._0 = kLayout__155}; -__device__ constexpr ExpandU32Layout kLayout__180 = - ExpandU32Layout{.b0 = kLayout__158, - .b1 = kLayout__159, - .b2 = kLayout__160, - .b3 = kLayout__161, - .b3Top7times2 = kLayout__162, - .topBit = NondetRegLayout{._super = /*offset=*/121}}; -__device__ constexpr ExpandU32Layout kLayout__181 = - ExpandU32Layout{.b0 = kLayout__164, - .b1 = kLayout__165, - .b2 = kLayout__166, - .b3 = kLayout__167, - .b3Top7times2 = kLayout__168, - .topBit = NondetRegLayout{._super = /*offset=*/122}}; -__device__ constexpr SplitTotalLayout kLayout__182 = SplitTotalLayout{ - .out = kLayout__77, - .carryByte = kLayout__170, - .carryExtra = NondetFakeTwitRegLayout{.reg0 = NondetRegLayout{._super = /*offset=*/124}, - .reg1 = NondetRegLayout{._super = /*offset=*/125}}}; -__device__ constexpr SplitTotalLayout kLayout__183 = SplitTotalLayout{ - .out = kLayout__79, - .carryByte = kLayout__172, - .carryExtra = NondetFakeTwitRegLayout{.reg0 = NondetRegLayout{._super = /*offset=*/126}, - .reg1 = NondetRegLayout{._super = /*offset=*/127}}}; -__device__ constexpr SplitTotalLayout kLayout__184 = SplitTotalLayout{ - .out = kLayout__81, - .carryByte = kLayout__174, - .carryExtra = NondetFakeTwitRegLayout{.reg0 = NondetRegLayout{._super = /*offset=*/128}, - .reg1 = NondetRegLayout{._super = /*offset=*/129}}}; -__device__ constexpr MultiplyAccumulateLayout kLayout__179 = MultiplyAccumulateLayout{ - .ax = kLayout__180, - .bx = kLayout__181, - .cSign = NondetRegLayout{._super = /*offset=*/123}, - .cRestTimes2 = kLayout__76, - .s0 = kLayout__182, - .s1 = kLayout__183, - .s2 = kLayout__184, - .s3Out = kLayout__83, - .s3Carry = NondetFakeTwitRegLayout{.reg0 = NondetRegLayout{._super = /*offset=*/130}, - .reg1 = NondetRegLayout{._super = /*offset=*/131}}}; -__device__ constexpr DoMulLayout kLayout__178 = DoMulLayout{.mul = kLayout__179}; -__device__ constexpr OpMULLayout kLayout__177 = OpMULLayout{._0 = kLayout__178}; -__device__ constexpr Mul0MulOutputArm2Layout kLayout__176 = Mul0MulOutputArm2Layout{ - ._super = kLayout__177, - ._extra0 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/37}, - .val = NondetRegLayout{._super = /*offset=*/38}}}; -__device__ constexpr OpMULHLayout kLayout__186 = OpMULHLayout{._0 = kLayout__178}; -__device__ constexpr Mul0MulOutputArm3Layout kLayout__185 = Mul0MulOutputArm3Layout{ - ._super = kLayout__186, - ._extra0 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/37}, - .val = NondetRegLayout{._super = /*offset=*/38}}}; -__device__ constexpr OpMULHSULayout kLayout__188 = OpMULHSULayout{._0 = kLayout__178}; -__device__ constexpr Mul0MulOutputArm4Layout kLayout__187 = Mul0MulOutputArm4Layout{ - ._super = kLayout__188, - ._extra0 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/37}, - .val = NondetRegLayout{._super = /*offset=*/38}}}; -__device__ constexpr OpMULHULayout kLayout__190 = OpMULHULayout{._0 = kLayout__178}; -__device__ constexpr Mul0MulOutputArm5Layout kLayout__189 = Mul0MulOutputArm5Layout{ - ._super = kLayout__190, - ._extra0 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/37}, - .val = NondetRegLayout{._super = /*offset=*/38}}}; -__device__ constexpr Mul0MulOutputArm6Layout kLayout__191 = Mul0MulOutputArm6Layout{ - ._extra0 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/27}, - .val = NondetRegLayout{._super = /*offset=*/28}}, - ._extra1 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/29}, - .val = NondetRegLayout{._super = /*offset=*/30}}, - ._extra2 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/31}, - .val = NondetRegLayout{._super = /*offset=*/32}}, - ._extra3 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/33}, - .val = NondetRegLayout{._super = /*offset=*/34}}, - ._extra4 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/35}, - .val = NondetRegLayout{._super = /*offset=*/36}}, - ._extra5 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/37}, - .val = NondetRegLayout{._super = /*offset=*/38}}, - ._extra6 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/39}, - .val = NondetRegLayout{._super = /*offset=*/40}}, - ._extra7 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/41}, - .val = NondetRegLayout{._super = /*offset=*/42}}, - ._extra8 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/43}, - .val = NondetRegLayout{._super = /*offset=*/44}}, - ._extra9 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/45}, - .val = NondetRegLayout{._super = /*offset=*/46}}, - ._extra10 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/47}, - .val = NondetRegLayout{._super = /*offset=*/48}}, - ._extra11 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/49}, - .val = NondetRegLayout{._super = /*offset=*/50}}, - ._extra12 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/51}, - .val = NondetRegLayout{._super = /*offset=*/52}}, - ._extra13 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/53}, - .val = NondetRegLayout{._super = /*offset=*/54}}, - ._extra14 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/55}, - .val = NondetRegLayout{._super = /*offset=*/56}}, - ._extra15 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/57}, - .val = NondetRegLayout{._super = /*offset=*/58}}, - ._extra16 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/59}, - .val = NondetRegLayout{._super = /*offset=*/60}}, - ._extra17 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/61}, - .val = NondetRegLayout{._super = /*offset=*/62}}, - ._extra18 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/63}, - .val = NondetRegLayout{._super = /*offset=*/64}}}; -__device__ constexpr Mul0MulOutputArm7Layout kLayout__192 = Mul0MulOutputArm7Layout{ - ._extra0 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/27}, - .val = NondetRegLayout{._super = /*offset=*/28}}, - ._extra1 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/29}, - .val = NondetRegLayout{._super = /*offset=*/30}}, - ._extra2 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/31}, - .val = NondetRegLayout{._super = /*offset=*/32}}, - ._extra3 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/33}, - .val = NondetRegLayout{._super = /*offset=*/34}}, - ._extra4 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/35}, - .val = NondetRegLayout{._super = /*offset=*/36}}, - ._extra5 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/37}, - .val = NondetRegLayout{._super = /*offset=*/38}}, - ._extra6 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/39}, - .val = NondetRegLayout{._super = /*offset=*/40}}, - ._extra7 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/41}, - .val = NondetRegLayout{._super = /*offset=*/42}}, - ._extra8 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/43}, - .val = NondetRegLayout{._super = /*offset=*/44}}, - ._extra9 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/45}, - .val = NondetRegLayout{._super = /*offset=*/46}}, - ._extra10 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/47}, - .val = NondetRegLayout{._super = /*offset=*/48}}, - ._extra11 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/49}, - .val = NondetRegLayout{._super = /*offset=*/50}}, - ._extra12 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/51}, - .val = NondetRegLayout{._super = /*offset=*/52}}, - ._extra13 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/53}, - .val = NondetRegLayout{._super = /*offset=*/54}}, - ._extra14 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/55}, - .val = NondetRegLayout{._super = /*offset=*/56}}, - ._extra15 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/57}, - .val = NondetRegLayout{._super = /*offset=*/58}}, - ._extra16 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/59}, - .val = NondetRegLayout{._super = /*offset=*/60}}, - ._extra17 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/61}, - .val = NondetRegLayout{._super = /*offset=*/62}}, - ._extra18 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/63}, - .val = NondetRegLayout{._super = /*offset=*/64}}}; -__device__ constexpr Mul0MulOutputLayout kLayout__150 = Mul0MulOutputLayout{.arm0 = kLayout__151, - .arm1 = kLayout__175, - .arm2 = kLayout__176, - .arm3 = kLayout__185, - .arm4 = kLayout__187, - .arm5 = kLayout__189, - .arm6 = kLayout__191, - .arm7 = kLayout__192}; -__device__ constexpr MemoryArgLayout kLayout__196 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/144}, - .addr = NondetRegLayout{._super = /*offset=*/143}, - .cycle = NondetRegLayout{._super = /*offset=*/145}, - .dataLow = NondetRegLayout{._super = /*offset=*/146}, - .dataHigh = NondetRegLayout{._super = /*offset=*/147}}; -__device__ constexpr MemoryArgLayout kLayout__197 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/148}, - .addr = NondetRegLayout{._super = /*offset=*/143}, - .cycle = NondetRegLayout{._super = /*offset=*/0}, - .dataLow = NondetRegLayout{._super = /*offset=*/149}, - .dataHigh = NondetRegLayout{._super = /*offset=*/150}}; -__device__ constexpr MemoryIOLayout kLayout__195 = - MemoryIOLayout{.oldTxn = kLayout__196, .newTxn = kLayout__197}; -__device__ constexpr IsCycleLayout kLayout__199 = - IsCycleLayout{.arg = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/151}, - .cycle = NondetRegLayout{._super = /*offset=*/152}}}; -__device__ constexpr IsForwardLayout kLayout__198 = IsForwardLayout{._0 = kLayout__199}; -__device__ constexpr MemoryWriteLayout kLayout__194 = - MemoryWriteLayout{.io = kLayout__195, ._0 = kLayout__198}; -__device__ constexpr WriteRdLayout kLayout__193 = - WriteRdLayout{.isRd0 = IsZeroLayout{._super = NondetRegLayout{._super = /*offset=*/140}, - .inv = NondetRegLayout{._super = /*offset=*/141}}, - .writeAddr = NondetRegLayout{._super = /*offset=*/142}, - ._0 = kLayout__194}; -__device__ constexpr NondetU16RegLayout kLayout__201 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/153}, - .val = NondetRegLayout{._super = /*offset=*/154}}}; -__device__ constexpr NondetU16RegLayout kLayout__202 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/156}, - .val = NondetRegLayout{._super = /*offset=*/157}}}; -__device__ constexpr NormalizeU32Layout kLayout__200 = - NormalizeU32Layout{.low16 = kLayout__201, - .lowCarry = NondetRegLayout{._super = /*offset=*/155}, - .high16 = kLayout__202, - .highCarry = NondetRegLayout{._super = /*offset=*/158}}; -__device__ constexpr Mul0Layout kLayout__119 = Mul0Layout{.input = kLayout__120, - ._arguments_Mul0MulOutput = kLayout__147, - .mulOutput = kLayout__150, - ._0 = kLayout__193, - .pcAdd = kLayout__200}; -__device__ constexpr DecoderLayout kLayout__206 = - DecoderLayout{._f7_6 = NondetRegLayout{._super = /*offset=*/71}, - ._f7_45 = NondetRegLayout{._super = /*offset=*/72}, - ._f7_23 = NondetRegLayout{._super = /*offset=*/73}, - ._f7_01 = NondetRegLayout{._super = /*offset=*/74}, - ._rs2_34 = NondetRegLayout{._super = /*offset=*/75}, - ._rs2_12 = NondetRegLayout{._super = /*offset=*/76}, - ._rs2_0 = NondetRegLayout{._super = /*offset=*/77}, - ._rs1_34 = NondetRegLayout{._super = /*offset=*/78}, - ._rs1_12 = NondetRegLayout{._super = /*offset=*/79}, - ._rs1_0 = NondetRegLayout{._super = /*offset=*/80}, - ._f3_2 = NondetRegLayout{._super = /*offset=*/81}, - ._f3_01 = NondetRegLayout{._super = /*offset=*/82}, - ._rd_34 = NondetRegLayout{._super = /*offset=*/83}, - ._rd_12 = NondetRegLayout{._super = /*offset=*/84}, - ._rd_0 = NondetRegLayout{._super = /*offset=*/85}, - .opcode = NondetRegLayout{._super = /*offset=*/86}}; -__device__ constexpr NondetU16RegLayout kLayout__209 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/89}, - .val = NondetRegLayout{._super = /*offset=*/90}}}; -__device__ constexpr U16RegLayout kLayout__208 = U16RegLayout{.ret = kLayout__209}; -__device__ constexpr NondetU16RegLayout kLayout__210 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/93}, - .val = NondetRegLayout{._super = /*offset=*/94}}}; -__device__ constexpr AddrDecomposeLayout kLayout__207 = - AddrDecomposeLayout{.low2 = NondetRegLayout{._super = /*offset=*/88}, - .upperDiff = kLayout__208, - ._0 = IsZeroLayout{._super = NondetRegLayout{._super = /*offset=*/91}, - .inv = NondetRegLayout{._super = /*offset=*/92}}, - .med14 = kLayout__210}; -__device__ constexpr MemoryArgLayout kLayout__213 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/96}, - .addr = NondetRegLayout{._super = /*offset=*/95}, - .cycle = NondetRegLayout{._super = /*offset=*/97}, - .dataLow = NondetRegLayout{._super = /*offset=*/98}, - .dataHigh = NondetRegLayout{._super = /*offset=*/99}}; -__device__ constexpr MemoryArgLayout kLayout__214 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/100}, - .addr = NondetRegLayout{._super = /*offset=*/95}, - .cycle = NondetRegLayout{._super = /*offset=*/0}, - .dataLow = NondetRegLayout{._super = /*offset=*/101}, - .dataHigh = NondetRegLayout{._super = /*offset=*/102}}; -__device__ constexpr MemoryIOLayout kLayout__212 = - MemoryIOLayout{.oldTxn = kLayout__213, .newTxn = kLayout__214}; -__device__ constexpr IsCycleLayout kLayout__216 = - IsCycleLayout{.arg = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/103}, - .cycle = NondetRegLayout{._super = /*offset=*/104}}}; -__device__ constexpr IsForwardLayout kLayout__215 = IsForwardLayout{._0 = kLayout__216}; -__device__ constexpr MemoryReadLayout kLayout__211 = - MemoryReadLayout{.io = kLayout__212, ._0 = kLayout__215}; -__device__ constexpr DecodeInstLayout kLayout__205 = - DecodeInstLayout{._super = kLayout__206, - .arg = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/87}, - .cycle = NondetRegLayout{._super = /*offset=*/0}}, - .pcAddr = kLayout__207, - .loadInst = kLayout__211}; -__device__ constexpr MemoryArgLayout kLayout__220 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/106}, - .addr = NondetRegLayout{._super = /*offset=*/105}, - .cycle = NondetRegLayout{._super = /*offset=*/107}, - .dataLow = NondetRegLayout{._super = /*offset=*/108}, - .dataHigh = NondetRegLayout{._super = /*offset=*/109}}; -__device__ constexpr MemoryArgLayout kLayout__221 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/110}, - .addr = NondetRegLayout{._super = /*offset=*/105}, - .cycle = NondetRegLayout{._super = /*offset=*/0}, - .dataLow = NondetRegLayout{._super = /*offset=*/111}, - .dataHigh = NondetRegLayout{._super = /*offset=*/112}}; -__device__ constexpr MemoryIOLayout kLayout__219 = - MemoryIOLayout{.oldTxn = kLayout__220, .newTxn = kLayout__221}; -__device__ constexpr IsCycleLayout kLayout__223 = - IsCycleLayout{.arg = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/113}, - .cycle = NondetRegLayout{._super = /*offset=*/114}}}; -__device__ constexpr IsForwardLayout kLayout__222 = IsForwardLayout{._0 = kLayout__223}; -__device__ constexpr MemoryReadLayout kLayout__218 = - MemoryReadLayout{.io = kLayout__219, ._0 = kLayout__222}; -__device__ constexpr ReadRegLayout kLayout__217 = - ReadRegLayout{._super = kLayout__218, .addr = NondetRegLayout{._super = /*offset=*/115}}; -__device__ constexpr MemoryArgLayout kLayout__227 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/117}, - .addr = NondetRegLayout{._super = /*offset=*/116}, - .cycle = NondetRegLayout{._super = /*offset=*/118}, - .dataLow = NondetRegLayout{._super = /*offset=*/119}, - .dataHigh = NondetRegLayout{._super = /*offset=*/120}}; -__device__ constexpr MemoryArgLayout kLayout__228 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/121}, - .addr = NondetRegLayout{._super = /*offset=*/116}, - .cycle = NondetRegLayout{._super = /*offset=*/0}, - .dataLow = NondetRegLayout{._super = /*offset=*/122}, - .dataHigh = NondetRegLayout{._super = /*offset=*/123}}; -__device__ constexpr MemoryIOLayout kLayout__226 = - MemoryIOLayout{.oldTxn = kLayout__227, .newTxn = kLayout__228}; -__device__ constexpr IsCycleLayout kLayout__230 = - IsCycleLayout{.arg = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/124}, - .cycle = NondetRegLayout{._super = /*offset=*/125}}}; -__device__ constexpr IsForwardLayout kLayout__229 = IsForwardLayout{._0 = kLayout__230}; -__device__ constexpr MemoryReadLayout kLayout__225 = - MemoryReadLayout{.io = kLayout__226, ._0 = kLayout__229}; -__device__ constexpr ReadRegLayout kLayout__224 = - ReadRegLayout{._super = kLayout__225, .addr = NondetRegLayout{._super = /*offset=*/126}}; -__device__ constexpr DivInputLayout kLayout__204 = - DivInputLayout{.decoded = kLayout__205, .rs1 = kLayout__217, .rs2 = kLayout__224}; -__device__ constexpr ArgU16Layout9LayoutArray kLayout__232 = - ArgU16Layout9LayoutArray{ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/27}, - .val = NondetRegLayout{._super = /*offset=*/28}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/29}, - .val = NondetRegLayout{._super = /*offset=*/30}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/31}, - .val = NondetRegLayout{._super = /*offset=*/32}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/33}, - .val = NondetRegLayout{._super = /*offset=*/34}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/35}, - .val = NondetRegLayout{._super = /*offset=*/36}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/37}, - .val = NondetRegLayout{._super = /*offset=*/38}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/39}, - .val = NondetRegLayout{._super = /*offset=*/40}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/41}, - .val = NondetRegLayout{._super = /*offset=*/42}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/43}, - .val = NondetRegLayout{._super = /*offset=*/44}}}; -__device__ constexpr ArgU8Layout13LayoutArray kLayout__233 = - ArgU8Layout13LayoutArray{ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/45}, - .val = NondetRegLayout{._super = /*offset=*/46}}, - ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/47}, - .val = NondetRegLayout{._super = /*offset=*/48}}, - ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/49}, - .val = NondetRegLayout{._super = /*offset=*/50}}, - ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/51}, - .val = NondetRegLayout{._super = /*offset=*/52}}, - ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/53}, - .val = NondetRegLayout{._super = /*offset=*/54}}, - ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/55}, - .val = NondetRegLayout{._super = /*offset=*/56}}, - ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/57}, - .val = NondetRegLayout{._super = /*offset=*/58}}, - ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/59}, - .val = NondetRegLayout{._super = /*offset=*/60}}, - ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/61}, - .val = NondetRegLayout{._super = /*offset=*/62}}, - ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/63}, - .val = NondetRegLayout{._super = /*offset=*/64}}, - ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/65}, - .val = NondetRegLayout{._super = /*offset=*/66}}, - ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/67}, - .val = NondetRegLayout{._super = /*offset=*/68}}, - ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/69}, - .val = NondetRegLayout{._super = /*offset=*/70}}}; -__device__ constexpr _Arguments_Div0MulOutputLayout kLayout__231 = - _Arguments_Div0MulOutputLayout{.argU16 = kLayout__232, .argU8 = kLayout__233}; -__device__ constexpr NondetRegLayout5LayoutArray kLayout__239 = - NondetRegLayout5LayoutArray{NondetRegLayout{._super = /*offset=*/127}, - NondetRegLayout{._super = /*offset=*/128}, - NondetRegLayout{._super = /*offset=*/129}, - NondetRegLayout{._super = /*offset=*/130}, - NondetRegLayout{._super = /*offset=*/131}}; -__device__ constexpr ToBits_5_Layout kLayout__238 = ToBits_5_Layout{._super = kLayout__239}; -__device__ constexpr DynPo2Layout kLayout__237 = - DynPo2Layout{.low5 = kLayout__238, - .checkU16 = kLayout__76, - .b3 = NondetRegLayout{._super = /*offset=*/132}, - .low = NondetRegLayout{._super = /*offset=*/133}, - .high = NondetRegLayout{._super = /*offset=*/134}}; -__device__ constexpr ExpandU32Layout kLayout__242 = - ExpandU32Layout{.b0 = kLayout__161, - .b1 = kLayout__162, - .b2 = kLayout__164, - .b3 = kLayout__165, - .b3Top7times2 = kLayout__166, - .topBit = NondetRegLayout{._super = /*offset=*/137}}; -__device__ constexpr ExpandU32Layout kLayout__243 = - ExpandU32Layout{.b0 = kLayout__167, - .b1 = kLayout__168, - .b2 = kLayout__170, - .b3 = kLayout__172, - .b3Top7times2 = kLayout__174, - .topBit = NondetRegLayout{._super = /*offset=*/138}}; -__device__ constexpr NondetU8RegLayout kLayout__245 = - NondetU8RegLayout{.arg = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/65}, - .val = NondetRegLayout{._super = /*offset=*/66}}}; -__device__ constexpr SplitTotalLayout kLayout__244 = SplitTotalLayout{ - .out = kLayout__83, - .carryByte = kLayout__245, - .carryExtra = NondetFakeTwitRegLayout{.reg0 = NondetRegLayout{._super = /*offset=*/140}, - .reg1 = NondetRegLayout{._super = /*offset=*/141}}}; -__device__ constexpr NondetU8RegLayout kLayout__247 = - NondetU8RegLayout{.arg = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/67}, - .val = NondetRegLayout{._super = /*offset=*/68}}}; -__device__ constexpr SplitTotalLayout kLayout__246 = SplitTotalLayout{ - .out = kLayout__10, - .carryByte = kLayout__247, - .carryExtra = NondetFakeTwitRegLayout{.reg0 = NondetRegLayout{._super = /*offset=*/142}, - .reg1 = NondetRegLayout{._super = /*offset=*/143}}}; -__device__ constexpr NondetU16RegLayout kLayout__249 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/39}, - .val = NondetRegLayout{._super = /*offset=*/40}}}; -__device__ constexpr NondetU8RegLayout kLayout__250 = - NondetU8RegLayout{.arg = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/69}, - .val = NondetRegLayout{._super = /*offset=*/70}}}; -__device__ constexpr SplitTotalLayout kLayout__248 = SplitTotalLayout{ - .out = kLayout__249, - .carryByte = kLayout__250, - .carryExtra = NondetFakeTwitRegLayout{.reg0 = NondetRegLayout{._super = /*offset=*/144}, - .reg1 = NondetRegLayout{._super = /*offset=*/145}}}; -__device__ constexpr NondetU16RegLayout kLayout__251 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/41}, - .val = NondetRegLayout{._super = /*offset=*/42}}}; -__device__ constexpr MultiplyAccumulateLayout kLayout__241 = MultiplyAccumulateLayout{ - .ax = kLayout__242, - .bx = kLayout__243, - .cSign = NondetRegLayout{._super = /*offset=*/139}, - .cRestTimes2 = kLayout__81, - .s0 = kLayout__244, - .s1 = kLayout__246, - .s2 = kLayout__248, - .s3Out = kLayout__251, - .s3Carry = NondetFakeTwitRegLayout{.reg0 = NondetRegLayout{._super = /*offset=*/146}, - .reg1 = NondetRegLayout{._super = /*offset=*/147}}}; -__device__ constexpr DoDivLayout kLayout__240 = - DoDivLayout{.quotLow = NondetRegLayout{._super = /*offset=*/135}, - .quotHigh = NondetRegLayout{._super = /*offset=*/136}, - .remLow = kLayout__77, - .remHigh = kLayout__79, - .mul = kLayout__241, - .topBitType = NondetRegLayout{._super = /*offset=*/148}}; -__device__ constexpr OpSRLLayout kLayout__236 = - OpSRLLayout{.shiftMul = kLayout__237, ._0 = kLayout__240}; -__device__ constexpr Div0MulOutputArm0Layout kLayout__235 = Div0MulOutputArm0Layout{ - ._super = kLayout__236, - ._extra0 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/43}, - .val = NondetRegLayout{._super = /*offset=*/44}}}; -__device__ constexpr TopBitLayout kLayout__253 = - TopBitLayout{._super = NondetRegLayout{._super = /*offset=*/135}, .rest = kLayout__77}; -__device__ constexpr ExpandU32Layout kLayout__256 = - ExpandU32Layout{.b0 = kLayout__161, - .b1 = kLayout__162, - .b2 = kLayout__164, - .b3 = kLayout__165, - .b3Top7times2 = kLayout__166, - .topBit = NondetRegLayout{._super = /*offset=*/138}}; -__device__ constexpr ExpandU32Layout kLayout__257 = - ExpandU32Layout{.b0 = kLayout__167, - .b1 = kLayout__168, - .b2 = kLayout__170, - .b3 = kLayout__172, - .b3Top7times2 = kLayout__174, - .topBit = NondetRegLayout{._super = /*offset=*/139}}; -__device__ constexpr SplitTotalLayout kLayout__258 = SplitTotalLayout{ - .out = kLayout__10, - .carryByte = kLayout__245, - .carryExtra = NondetFakeTwitRegLayout{.reg0 = NondetRegLayout{._super = /*offset=*/141}, - .reg1 = NondetRegLayout{._super = /*offset=*/142}}}; -__device__ constexpr SplitTotalLayout kLayout__259 = SplitTotalLayout{ - .out = kLayout__249, - .carryByte = kLayout__247, - .carryExtra = NondetFakeTwitRegLayout{.reg0 = NondetRegLayout{._super = /*offset=*/143}, - .reg1 = NondetRegLayout{._super = /*offset=*/144}}}; -__device__ constexpr SplitTotalLayout kLayout__260 = SplitTotalLayout{ - .out = kLayout__251, - .carryByte = kLayout__250, - .carryExtra = NondetFakeTwitRegLayout{.reg0 = NondetRegLayout{._super = /*offset=*/145}, - .reg1 = NondetRegLayout{._super = /*offset=*/146}}}; -__device__ constexpr MultiplyAccumulateLayout kLayout__255 = MultiplyAccumulateLayout{ - .ax = kLayout__256, - .bx = kLayout__257, - .cSign = NondetRegLayout{._super = /*offset=*/140}, - .cRestTimes2 = kLayout__83, - .s0 = kLayout__258, - .s1 = kLayout__259, - .s2 = kLayout__260, - .s3Out = kLayout__13, - .s3Carry = NondetFakeTwitRegLayout{.reg0 = NondetRegLayout{._super = /*offset=*/147}, - .reg1 = NondetRegLayout{._super = /*offset=*/148}}}; -__device__ constexpr DoDivLayout kLayout__254 = - DoDivLayout{.quotLow = NondetRegLayout{._super = /*offset=*/136}, - .quotHigh = NondetRegLayout{._super = /*offset=*/137}, - .remLow = kLayout__79, - .remHigh = kLayout__81, - .mul = kLayout__255, - .topBitType = NondetRegLayout{._super = /*offset=*/149}}; -__device__ constexpr OpSRALayout kLayout__252 = - OpSRALayout{.shiftMul = kLayout__237, .flip = kLayout__253, ._0 = kLayout__254}; -__device__ constexpr OpSRLILayout kLayout__262 = - OpSRLILayout{.shiftMul = kLayout__237, ._0 = kLayout__240}; -__device__ constexpr Div0MulOutputArm2Layout kLayout__261 = Div0MulOutputArm2Layout{ - ._super = kLayout__262, - ._extra0 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/43}, - .val = NondetRegLayout{._super = /*offset=*/44}}}; -__device__ constexpr OpSRAILayout kLayout__263 = - OpSRAILayout{.shiftMul = kLayout__237, .flip = kLayout__253, ._0 = kLayout__254}; -__device__ constexpr ExpandU32Layout kLayout__268 = - ExpandU32Layout{.b0 = kLayout__161, - .b1 = kLayout__162, - .b2 = kLayout__164, - .b3 = kLayout__165, - .b3Top7times2 = kLayout__166, - .topBit = NondetRegLayout{._super = /*offset=*/129}}; -__device__ constexpr ExpandU32Layout kLayout__269 = - ExpandU32Layout{.b0 = kLayout__167, - .b1 = kLayout__168, - .b2 = kLayout__170, - .b3 = kLayout__172, - .b3Top7times2 = kLayout__174, - .topBit = NondetRegLayout{._super = /*offset=*/130}}; -__device__ constexpr SplitTotalLayout kLayout__270 = SplitTotalLayout{ - .out = kLayout__81, - .carryByte = kLayout__245, - .carryExtra = NondetFakeTwitRegLayout{.reg0 = NondetRegLayout{._super = /*offset=*/132}, - .reg1 = NondetRegLayout{._super = /*offset=*/133}}}; -__device__ constexpr SplitTotalLayout kLayout__271 = SplitTotalLayout{ - .out = kLayout__83, - .carryByte = kLayout__247, - .carryExtra = NondetFakeTwitRegLayout{.reg0 = NondetRegLayout{._super = /*offset=*/134}, - .reg1 = NondetRegLayout{._super = /*offset=*/135}}}; -__device__ constexpr SplitTotalLayout kLayout__272 = SplitTotalLayout{ - .out = kLayout__10, - .carryByte = kLayout__250, - .carryExtra = NondetFakeTwitRegLayout{.reg0 = NondetRegLayout{._super = /*offset=*/136}, - .reg1 = NondetRegLayout{._super = /*offset=*/137}}}; -__device__ constexpr MultiplyAccumulateLayout kLayout__267 = MultiplyAccumulateLayout{ - .ax = kLayout__268, - .bx = kLayout__269, - .cSign = NondetRegLayout{._super = /*offset=*/131}, - .cRestTimes2 = kLayout__79, - .s0 = kLayout__270, - .s1 = kLayout__271, - .s2 = kLayout__272, - .s3Out = kLayout__249, - .s3Carry = NondetFakeTwitRegLayout{.reg0 = NondetRegLayout{._super = /*offset=*/138}, - .reg1 = NondetRegLayout{._super = /*offset=*/139}}}; -__device__ constexpr DoDivLayout kLayout__266 = - DoDivLayout{.quotLow = NondetRegLayout{._super = /*offset=*/127}, - .quotHigh = NondetRegLayout{._super = /*offset=*/128}, - .remLow = kLayout__76, - .remHigh = kLayout__77, - .mul = kLayout__267, - .topBitType = NondetRegLayout{._super = /*offset=*/140}}; -__device__ constexpr OpDIVLayout kLayout__265 = OpDIVLayout{._0 = kLayout__266}; -__device__ constexpr Div0MulOutputArm4Layout kLayout__264 = Div0MulOutputArm4Layout{ - ._super = kLayout__265, - ._extra0 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/41}, - .val = NondetRegLayout{._super = /*offset=*/42}}, - ._extra1 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/43}, - .val = NondetRegLayout{._super = /*offset=*/44}}}; -__device__ constexpr OpDIVULayout kLayout__274 = OpDIVULayout{._0 = kLayout__266}; -__device__ constexpr Div0MulOutputArm5Layout kLayout__273 = Div0MulOutputArm5Layout{ - ._super = kLayout__274, - ._extra0 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/41}, - .val = NondetRegLayout{._super = /*offset=*/42}}, - ._extra1 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/43}, - .val = NondetRegLayout{._super = /*offset=*/44}}}; -__device__ constexpr OpREMLayout kLayout__276 = OpREMLayout{._0 = kLayout__266}; -__device__ constexpr Div0MulOutputArm6Layout kLayout__275 = Div0MulOutputArm6Layout{ - ._super = kLayout__276, - ._extra0 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/41}, - .val = NondetRegLayout{._super = /*offset=*/42}}, - ._extra1 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/43}, - .val = NondetRegLayout{._super = /*offset=*/44}}}; -__device__ constexpr OpREMULayout kLayout__278 = OpREMULayout{._0 = kLayout__266}; -__device__ constexpr Div0MulOutputArm7Layout kLayout__277 = Div0MulOutputArm7Layout{ - ._super = kLayout__278, - ._extra0 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/41}, - .val = NondetRegLayout{._super = /*offset=*/42}}, - ._extra1 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/43}, - .val = NondetRegLayout{._super = /*offset=*/44}}}; -__device__ constexpr Div0MulOutputLayout kLayout__234 = Div0MulOutputLayout{.arm0 = kLayout__235, - .arm1 = kLayout__252, - .arm2 = kLayout__261, - .arm3 = kLayout__263, - .arm4 = kLayout__264, - .arm5 = kLayout__273, - .arm6 = kLayout__275, - .arm7 = kLayout__277}; -__device__ constexpr MemoryArgLayout kLayout__282 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/154}, - .addr = NondetRegLayout{._super = /*offset=*/153}, - .cycle = NondetRegLayout{._super = /*offset=*/155}, - .dataLow = NondetRegLayout{._super = /*offset=*/156}, - .dataHigh = NondetRegLayout{._super = /*offset=*/157}}; -__device__ constexpr MemoryArgLayout kLayout__283 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/158}, - .addr = NondetRegLayout{._super = /*offset=*/153}, - .cycle = NondetRegLayout{._super = /*offset=*/0}, - .dataLow = NondetRegLayout{._super = /*offset=*/159}, - .dataHigh = NondetRegLayout{._super = /*offset=*/160}}; -__device__ constexpr MemoryIOLayout kLayout__281 = - MemoryIOLayout{.oldTxn = kLayout__282, .newTxn = kLayout__283}; -__device__ constexpr IsCycleLayout kLayout__285 = - IsCycleLayout{.arg = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/161}, - .cycle = NondetRegLayout{._super = /*offset=*/162}}}; -__device__ constexpr IsForwardLayout kLayout__284 = IsForwardLayout{._0 = kLayout__285}; -__device__ constexpr MemoryWriteLayout kLayout__280 = - MemoryWriteLayout{.io = kLayout__281, ._0 = kLayout__284}; -__device__ constexpr WriteRdLayout kLayout__279 = - WriteRdLayout{.isRd0 = IsZeroLayout{._super = NondetRegLayout{._super = /*offset=*/150}, - .inv = NondetRegLayout{._super = /*offset=*/151}}, - .writeAddr = NondetRegLayout{._super = /*offset=*/152}, - ._0 = kLayout__280}; -__device__ constexpr NondetU16RegLayout kLayout__287 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/163}, - .val = NondetRegLayout{._super = /*offset=*/164}}}; -__device__ constexpr NondetU16RegLayout kLayout__288 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/166}, - .val = NondetRegLayout{._super = /*offset=*/167}}}; -__device__ constexpr NormalizeU32Layout kLayout__286 = - NormalizeU32Layout{.low16 = kLayout__287, - .lowCarry = NondetRegLayout{._super = /*offset=*/165}, - .high16 = kLayout__288, - .highCarry = NondetRegLayout{._super = /*offset=*/168}}; -__device__ constexpr Div0Layout kLayout__203 = Div0Layout{.input = kLayout__204, - ._arguments_Div0MulOutput = kLayout__231, - .mulOutput = kLayout__234, - ._0 = kLayout__279, - .pcAdd = kLayout__286}; -__device__ constexpr DecoderLayout kLayout__292 = - DecoderLayout{._f7_6 = NondetRegLayout{._super = /*offset=*/33}, - ._f7_45 = NondetRegLayout{._super = /*offset=*/34}, - ._f7_23 = NondetRegLayout{._super = /*offset=*/35}, - ._f7_01 = NondetRegLayout{._super = /*offset=*/36}, - ._rs2_34 = NondetRegLayout{._super = /*offset=*/37}, - ._rs2_12 = NondetRegLayout{._super = /*offset=*/38}, - ._rs2_0 = NondetRegLayout{._super = /*offset=*/39}, - ._rs1_34 = NondetRegLayout{._super = /*offset=*/40}, - ._rs1_12 = NondetRegLayout{._super = /*offset=*/41}, - ._rs1_0 = NondetRegLayout{._super = /*offset=*/42}, - ._f3_2 = NondetRegLayout{._super = /*offset=*/43}, - ._f3_01 = NondetRegLayout{._super = /*offset=*/44}, - ._rd_34 = NondetRegLayout{._super = /*offset=*/45}, - ._rd_12 = NondetRegLayout{._super = /*offset=*/46}, - ._rd_0 = NondetRegLayout{._super = /*offset=*/47}, - .opcode = NondetRegLayout{._super = /*offset=*/48}}; -__device__ constexpr NondetU16RegLayout kLayout__295 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/51}, - .val = NondetRegLayout{._super = /*offset=*/52}}}; -__device__ constexpr U16RegLayout kLayout__294 = U16RegLayout{.ret = kLayout__295}; -__device__ constexpr NondetU16RegLayout kLayout__296 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/55}, - .val = NondetRegLayout{._super = /*offset=*/56}}}; -__device__ constexpr AddrDecomposeLayout kLayout__293 = - AddrDecomposeLayout{.low2 = NondetRegLayout{._super = /*offset=*/50}, - .upperDiff = kLayout__294, - ._0 = IsZeroLayout{._super = NondetRegLayout{._super = /*offset=*/53}, - .inv = NondetRegLayout{._super = /*offset=*/54}}, - .med14 = kLayout__296}; -__device__ constexpr MemoryArgLayout kLayout__299 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/58}, - .addr = NondetRegLayout{._super = /*offset=*/57}, - .cycle = NondetRegLayout{._super = /*offset=*/59}, - .dataLow = NondetRegLayout{._super = /*offset=*/60}, - .dataHigh = NondetRegLayout{._super = /*offset=*/61}}; -__device__ constexpr MemoryArgLayout kLayout__300 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/62}, - .addr = NondetRegLayout{._super = /*offset=*/57}, - .cycle = NondetRegLayout{._super = /*offset=*/0}, - .dataLow = NondetRegLayout{._super = /*offset=*/63}, - .dataHigh = NondetRegLayout{._super = /*offset=*/64}}; -__device__ constexpr MemoryIOLayout kLayout__298 = - MemoryIOLayout{.oldTxn = kLayout__299, .newTxn = kLayout__300}; -__device__ constexpr IsCycleLayout kLayout__302 = - IsCycleLayout{.arg = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/65}, - .cycle = NondetRegLayout{._super = /*offset=*/66}}}; -__device__ constexpr IsForwardLayout kLayout__301 = IsForwardLayout{._0 = kLayout__302}; -__device__ constexpr MemoryReadLayout kLayout__297 = - MemoryReadLayout{.io = kLayout__298, ._0 = kLayout__301}; -__device__ constexpr DecodeInstLayout kLayout__291 = - DecodeInstLayout{._super = kLayout__292, - .arg = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/49}, - .cycle = NondetRegLayout{._super = /*offset=*/0}}, - .pcAddr = kLayout__293, - .loadInst = kLayout__297}; -__device__ constexpr MemoryArgLayout kLayout__306 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/68}, - .addr = NondetRegLayout{._super = /*offset=*/67}, - .cycle = NondetRegLayout{._super = /*offset=*/69}, - .dataLow = NondetRegLayout{._super = /*offset=*/70}, - .dataHigh = NondetRegLayout{._super = /*offset=*/71}}; -__device__ constexpr MemoryArgLayout kLayout__307 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/72}, - .addr = NondetRegLayout{._super = /*offset=*/67}, - .cycle = NondetRegLayout{._super = /*offset=*/0}, - .dataLow = NondetRegLayout{._super = /*offset=*/73}, - .dataHigh = NondetRegLayout{._super = /*offset=*/74}}; -__device__ constexpr MemoryIOLayout kLayout__305 = - MemoryIOLayout{.oldTxn = kLayout__306, .newTxn = kLayout__307}; -__device__ constexpr IsCycleLayout kLayout__309 = - IsCycleLayout{.arg = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/75}, - .cycle = NondetRegLayout{._super = /*offset=*/76}}}; -__device__ constexpr IsForwardLayout kLayout__308 = IsForwardLayout{._0 = kLayout__309}; -__device__ constexpr MemoryReadLayout kLayout__304 = - MemoryReadLayout{.io = kLayout__305, ._0 = kLayout__308}; -__device__ constexpr ReadRegLayout kLayout__303 = - ReadRegLayout{._super = kLayout__304, .addr = NondetRegLayout{._super = /*offset=*/77}}; -__device__ constexpr NondetU16RegLayout kLayout__311 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/78}, - .val = NondetRegLayout{._super = /*offset=*/79}}}; -__device__ constexpr NondetU16RegLayout kLayout__312 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/81}, - .val = NondetRegLayout{._super = /*offset=*/82}}}; -__device__ constexpr NormalizeU32Layout kLayout__310 = - NormalizeU32Layout{.low16 = kLayout__311, - .lowCarry = NondetRegLayout{._super = /*offset=*/80}, - .high16 = kLayout__312, - .highCarry = NondetRegLayout{._super = /*offset=*/83}}; -__device__ constexpr NondetU16RegLayout kLayout__315 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/86}, - .val = NondetRegLayout{._super = /*offset=*/87}}}; -__device__ constexpr U16RegLayout kLayout__314 = U16RegLayout{.ret = kLayout__315}; -__device__ constexpr NondetU16RegLayout kLayout__316 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/90}, - .val = NondetRegLayout{._super = /*offset=*/91}}}; -__device__ constexpr AddrDecomposeBitsLayout kLayout__313 = - AddrDecomposeBitsLayout{.low0 = NondetRegLayout{._super = /*offset=*/84}, - .low1 = NondetRegLayout{._super = /*offset=*/85}, - .upperDiff = kLayout__314, - ._0 = IsZeroLayout{._super = NondetRegLayout{._super = /*offset=*/88}, - .inv = NondetRegLayout{._super = /*offset=*/89}}, - .med14 = kLayout__316}; -__device__ constexpr MemoryArgLayout kLayout__319 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/93}, - .addr = NondetRegLayout{._super = /*offset=*/92}, - .cycle = NondetRegLayout{._super = /*offset=*/94}, - .dataLow = NondetRegLayout{._super = /*offset=*/95}, - .dataHigh = NondetRegLayout{._super = /*offset=*/96}}; -__device__ constexpr MemoryArgLayout kLayout__320 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/97}, - .addr = NondetRegLayout{._super = /*offset=*/92}, - .cycle = NondetRegLayout{._super = /*offset=*/0}, - .dataLow = NondetRegLayout{._super = /*offset=*/98}, - .dataHigh = NondetRegLayout{._super = /*offset=*/99}}; -__device__ constexpr MemoryIOLayout kLayout__318 = - MemoryIOLayout{.oldTxn = kLayout__319, .newTxn = kLayout__320}; -__device__ constexpr IsCycleLayout kLayout__322 = - IsCycleLayout{.arg = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/100}, - .cycle = NondetRegLayout{._super = /*offset=*/101}}}; -__device__ constexpr IsForwardLayout kLayout__321 = IsForwardLayout{._0 = kLayout__322}; -__device__ constexpr MemoryReadLayout kLayout__317 = - MemoryReadLayout{.io = kLayout__318, ._0 = kLayout__321}; -__device__ constexpr MemLoadInputLayout kLayout__290 = MemLoadInputLayout{.decoded = kLayout__291, - .rs1 = kLayout__303, - .addrU32 = kLayout__310, - .addr = kLayout__313, - .data = kLayout__317}; -__device__ constexpr ArgU8Layout3LayoutArray kLayout__324 = - ArgU8Layout3LayoutArray{ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/27}, - .val = NondetRegLayout{._super = /*offset=*/28}}, - ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/29}, - .val = NondetRegLayout{._super = /*offset=*/30}}, - ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/31}, - .val = NondetRegLayout{._super = /*offset=*/32}}}; -__device__ constexpr _Arguments_Mem0OutputLayout kLayout__323 = - _Arguments_Mem0OutputLayout{.argU8 = kLayout__324}; -__device__ constexpr NondetU8RegLayout kLayout__328 = - NondetU8RegLayout{.arg = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/27}, - .val = NondetRegLayout{._super = /*offset=*/28}}}; -__device__ constexpr NondetU8RegLayout kLayout__329 = - NondetU8RegLayout{.arg = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/29}, - .val = NondetRegLayout{._super = /*offset=*/30}}}; -__device__ constexpr SplitWordLayout kLayout__327 = - SplitWordLayout{.byte0 = kLayout__328, .byte1 = kLayout__329}; -__device__ constexpr NondetU8RegLayout kLayout__330 = - NondetU8RegLayout{.arg = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/31}, - .val = NondetRegLayout{._super = /*offset=*/32}}}; -__device__ constexpr OpLBLayout kLayout__326 = - OpLBLayout{.bytes = kLayout__327, - .highBit = NondetRegLayout{._super = /*offset=*/102}, - .low7x2 = kLayout__330}; -__device__ constexpr OpLHLayout kLayout__332 = - OpLHLayout{.highBit = NondetRegLayout{._super = /*offset=*/102}, .low15x2 = kLayout__328}; -__device__ constexpr Mem0OutputArm1Layout kLayout__331 = - Mem0OutputArm1Layout{._super = kLayout__332, - ._extra0 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/29}, - .val = NondetRegLayout{._super = /*offset=*/30}}, - ._extra1 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/31}, - .val = NondetRegLayout{._super = /*offset=*/32}}}; -__device__ constexpr Mem0OutputArm2Layout kLayout__333 = - Mem0OutputArm2Layout{._extra0 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/27}, - .val = NondetRegLayout{._super = /*offset=*/28}}, - ._extra1 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/29}, - .val = NondetRegLayout{._super = /*offset=*/30}}, - ._extra2 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/31}, - .val = NondetRegLayout{._super = /*offset=*/32}}}; -__device__ constexpr OpLBULayout kLayout__335 = OpLBULayout{.bytes = kLayout__327}; -__device__ constexpr Mem0OutputArm3Layout kLayout__334 = - Mem0OutputArm3Layout{._super = kLayout__335, - ._extra0 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/31}, - .val = NondetRegLayout{._super = /*offset=*/32}}}; -__device__ constexpr Mem0OutputArm4Layout kLayout__336 = - Mem0OutputArm4Layout{._extra0 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/27}, - .val = NondetRegLayout{._super = /*offset=*/28}}, - ._extra1 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/29}, - .val = NondetRegLayout{._super = /*offset=*/30}}, - ._extra2 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/31}, - .val = NondetRegLayout{._super = /*offset=*/32}}}; -__device__ constexpr Mem0OutputArm5Layout kLayout__337 = - Mem0OutputArm5Layout{._extra0 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/27}, - .val = NondetRegLayout{._super = /*offset=*/28}}, - ._extra1 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/29}, - .val = NondetRegLayout{._super = /*offset=*/30}}, - ._extra2 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/31}, - .val = NondetRegLayout{._super = /*offset=*/32}}}; -__device__ constexpr Mem0OutputArm6Layout kLayout__338 = - Mem0OutputArm6Layout{._extra0 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/27}, - .val = NondetRegLayout{._super = /*offset=*/28}}, - ._extra1 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/29}, - .val = NondetRegLayout{._super = /*offset=*/30}}, - ._extra2 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/31}, - .val = NondetRegLayout{._super = /*offset=*/32}}}; -__device__ constexpr Mem0OutputArm7Layout kLayout__339 = - Mem0OutputArm7Layout{._extra0 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/27}, - .val = NondetRegLayout{._super = /*offset=*/28}}, - ._extra1 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/29}, - .val = NondetRegLayout{._super = /*offset=*/30}}, - ._extra2 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/31}, - .val = NondetRegLayout{._super = /*offset=*/32}}}; -__device__ constexpr Mem0OutputLayout kLayout__325 = Mem0OutputLayout{.arm0 = kLayout__326, - .arm1 = kLayout__331, - .arm2 = kLayout__333, - .arm3 = kLayout__334, - .arm4 = kLayout__336, - .arm5 = kLayout__337, - .arm6 = kLayout__338, - .arm7 = kLayout__339}; -__device__ constexpr MemoryArgLayout kLayout__343 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/107}, - .addr = NondetRegLayout{._super = /*offset=*/106}, - .cycle = NondetRegLayout{._super = /*offset=*/108}, - .dataLow = NondetRegLayout{._super = /*offset=*/109}, - .dataHigh = NondetRegLayout{._super = /*offset=*/110}}; -__device__ constexpr MemoryArgLayout kLayout__344 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/111}, - .addr = NondetRegLayout{._super = /*offset=*/106}, - .cycle = NondetRegLayout{._super = /*offset=*/0}, - .dataLow = NondetRegLayout{._super = /*offset=*/112}, - .dataHigh = NondetRegLayout{._super = /*offset=*/113}}; -__device__ constexpr MemoryIOLayout kLayout__342 = - MemoryIOLayout{.oldTxn = kLayout__343, .newTxn = kLayout__344}; -__device__ constexpr IsCycleLayout kLayout__346 = - IsCycleLayout{.arg = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/114}, - .cycle = NondetRegLayout{._super = /*offset=*/115}}}; -__device__ constexpr IsForwardLayout kLayout__345 = IsForwardLayout{._0 = kLayout__346}; -__device__ constexpr MemoryWriteLayout kLayout__341 = - MemoryWriteLayout{.io = kLayout__342, ._0 = kLayout__345}; -__device__ constexpr WriteRdLayout kLayout__340 = - WriteRdLayout{.isRd0 = IsZeroLayout{._super = NondetRegLayout{._super = /*offset=*/103}, - .inv = NondetRegLayout{._super = /*offset=*/104}}, - .writeAddr = NondetRegLayout{._super = /*offset=*/105}, - ._0 = kLayout__341}; -__device__ constexpr NondetU16RegLayout kLayout__348 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/116}, - .val = NondetRegLayout{._super = /*offset=*/117}}}; -__device__ constexpr NondetU16RegLayout kLayout__349 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/119}, - .val = NondetRegLayout{._super = /*offset=*/120}}}; -__device__ constexpr NormalizeU32Layout kLayout__347 = - NormalizeU32Layout{.low16 = kLayout__348, - .lowCarry = NondetRegLayout{._super = /*offset=*/118}, - .high16 = kLayout__349, - .highCarry = NondetRegLayout{._super = /*offset=*/121}}; -__device__ constexpr Mem0Layout kLayout__289 = Mem0Layout{.input = kLayout__290, - ._arguments_Mem0Output = kLayout__323, - .output = kLayout__325, - ._0 = kLayout__340, - .pcAdd = kLayout__347}; -__device__ constexpr DecoderLayout kLayout__353 = - DecoderLayout{._f7_6 = NondetRegLayout{._super = /*offset=*/35}, - ._f7_45 = NondetRegLayout{._super = /*offset=*/36}, - ._f7_23 = NondetRegLayout{._super = /*offset=*/37}, - ._f7_01 = NondetRegLayout{._super = /*offset=*/38}, - ._rs2_34 = NondetRegLayout{._super = /*offset=*/39}, - ._rs2_12 = NondetRegLayout{._super = /*offset=*/40}, - ._rs2_0 = NondetRegLayout{._super = /*offset=*/41}, - ._rs1_34 = NondetRegLayout{._super = /*offset=*/42}, - ._rs1_12 = NondetRegLayout{._super = /*offset=*/43}, - ._rs1_0 = NondetRegLayout{._super = /*offset=*/44}, - ._f3_2 = NondetRegLayout{._super = /*offset=*/45}, - ._f3_01 = NondetRegLayout{._super = /*offset=*/46}, - ._rd_34 = NondetRegLayout{._super = /*offset=*/47}, - ._rd_12 = NondetRegLayout{._super = /*offset=*/48}, - ._rd_0 = NondetRegLayout{._super = /*offset=*/49}, - .opcode = NondetRegLayout{._super = /*offset=*/50}}; -__device__ constexpr NondetU16RegLayout kLayout__356 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/53}, - .val = NondetRegLayout{._super = /*offset=*/54}}}; -__device__ constexpr U16RegLayout kLayout__355 = U16RegLayout{.ret = kLayout__356}; -__device__ constexpr NondetU16RegLayout kLayout__357 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/57}, - .val = NondetRegLayout{._super = /*offset=*/58}}}; -__device__ constexpr AddrDecomposeLayout kLayout__354 = - AddrDecomposeLayout{.low2 = NondetRegLayout{._super = /*offset=*/52}, - .upperDiff = kLayout__355, - ._0 = IsZeroLayout{._super = NondetRegLayout{._super = /*offset=*/55}, - .inv = NondetRegLayout{._super = /*offset=*/56}}, - .med14 = kLayout__357}; -__device__ constexpr MemoryArgLayout kLayout__360 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/60}, - .addr = NondetRegLayout{._super = /*offset=*/59}, - .cycle = NondetRegLayout{._super = /*offset=*/61}, - .dataLow = NondetRegLayout{._super = /*offset=*/62}, - .dataHigh = NondetRegLayout{._super = /*offset=*/63}}; -__device__ constexpr MemoryArgLayout kLayout__361 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/64}, - .addr = NondetRegLayout{._super = /*offset=*/59}, - .cycle = NondetRegLayout{._super = /*offset=*/0}, - .dataLow = NondetRegLayout{._super = /*offset=*/65}, - .dataHigh = NondetRegLayout{._super = /*offset=*/66}}; -__device__ constexpr MemoryIOLayout kLayout__359 = - MemoryIOLayout{.oldTxn = kLayout__360, .newTxn = kLayout__361}; -__device__ constexpr IsCycleLayout kLayout__363 = - IsCycleLayout{.arg = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/67}, - .cycle = NondetRegLayout{._super = /*offset=*/68}}}; -__device__ constexpr IsForwardLayout kLayout__362 = IsForwardLayout{._0 = kLayout__363}; -__device__ constexpr MemoryReadLayout kLayout__358 = - MemoryReadLayout{.io = kLayout__359, ._0 = kLayout__362}; -__device__ constexpr DecodeInstLayout kLayout__352 = - DecodeInstLayout{._super = kLayout__353, - .arg = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/51}, - .cycle = NondetRegLayout{._super = /*offset=*/0}}, - .pcAddr = kLayout__354, - .loadInst = kLayout__358}; -__device__ constexpr MemoryArgLayout kLayout__367 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/70}, - .addr = NondetRegLayout{._super = /*offset=*/69}, - .cycle = NondetRegLayout{._super = /*offset=*/71}, - .dataLow = NondetRegLayout{._super = /*offset=*/72}, - .dataHigh = NondetRegLayout{._super = /*offset=*/73}}; -__device__ constexpr MemoryArgLayout kLayout__368 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/74}, - .addr = NondetRegLayout{._super = /*offset=*/69}, - .cycle = NondetRegLayout{._super = /*offset=*/0}, - .dataLow = NondetRegLayout{._super = /*offset=*/75}, - .dataHigh = NondetRegLayout{._super = /*offset=*/76}}; -__device__ constexpr MemoryIOLayout kLayout__366 = - MemoryIOLayout{.oldTxn = kLayout__367, .newTxn = kLayout__368}; -__device__ constexpr IsCycleLayout kLayout__370 = - IsCycleLayout{.arg = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/77}, - .cycle = NondetRegLayout{._super = /*offset=*/78}}}; -__device__ constexpr IsForwardLayout kLayout__369 = IsForwardLayout{._0 = kLayout__370}; -__device__ constexpr MemoryReadLayout kLayout__365 = - MemoryReadLayout{.io = kLayout__366, ._0 = kLayout__369}; -__device__ constexpr ReadRegLayout kLayout__364 = - ReadRegLayout{._super = kLayout__365, .addr = NondetRegLayout{._super = /*offset=*/79}}; -__device__ constexpr MemoryArgLayout kLayout__374 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/81}, - .addr = NondetRegLayout{._super = /*offset=*/80}, - .cycle = NondetRegLayout{._super = /*offset=*/82}, - .dataLow = NondetRegLayout{._super = /*offset=*/83}, - .dataHigh = NondetRegLayout{._super = /*offset=*/84}}; -__device__ constexpr MemoryArgLayout kLayout__375 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/85}, - .addr = NondetRegLayout{._super = /*offset=*/80}, - .cycle = NondetRegLayout{._super = /*offset=*/0}, - .dataLow = NondetRegLayout{._super = /*offset=*/86}, - .dataHigh = NondetRegLayout{._super = /*offset=*/87}}; -__device__ constexpr MemoryIOLayout kLayout__373 = - MemoryIOLayout{.oldTxn = kLayout__374, .newTxn = kLayout__375}; -__device__ constexpr IsCycleLayout kLayout__377 = - IsCycleLayout{.arg = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/88}, - .cycle = NondetRegLayout{._super = /*offset=*/89}}}; -__device__ constexpr IsForwardLayout kLayout__376 = IsForwardLayout{._0 = kLayout__377}; -__device__ constexpr MemoryReadLayout kLayout__372 = - MemoryReadLayout{.io = kLayout__373, ._0 = kLayout__376}; -__device__ constexpr ReadRegLayout kLayout__371 = - ReadRegLayout{._super = kLayout__372, .addr = NondetRegLayout{._super = /*offset=*/90}}; -__device__ constexpr NondetU16RegLayout kLayout__379 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/91}, - .val = NondetRegLayout{._super = /*offset=*/92}}}; -__device__ constexpr NondetU16RegLayout kLayout__380 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/94}, - .val = NondetRegLayout{._super = /*offset=*/95}}}; -__device__ constexpr NormalizeU32Layout kLayout__378 = - NormalizeU32Layout{.low16 = kLayout__379, - .lowCarry = NondetRegLayout{._super = /*offset=*/93}, - .high16 = kLayout__380, - .highCarry = NondetRegLayout{._super = /*offset=*/96}}; -__device__ constexpr NondetU16RegLayout kLayout__383 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/99}, - .val = NondetRegLayout{._super = /*offset=*/100}}}; -__device__ constexpr U16RegLayout kLayout__382 = U16RegLayout{.ret = kLayout__383}; -__device__ constexpr NondetU16RegLayout kLayout__384 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/103}, - .val = NondetRegLayout{._super = /*offset=*/104}}}; -__device__ constexpr AddrDecomposeBitsLayout kLayout__381 = - AddrDecomposeBitsLayout{.low0 = NondetRegLayout{._super = /*offset=*/97}, - .low1 = NondetRegLayout{._super = /*offset=*/98}, - .upperDiff = kLayout__382, - ._0 = IsZeroLayout{._super = NondetRegLayout{._super = /*offset=*/101}, - .inv = NondetRegLayout{._super = /*offset=*/102}}, - .med14 = kLayout__384}; -__device__ constexpr MemStoreInputLayout kLayout__351 = MemStoreInputLayout{.decoded = kLayout__352, - .rs1 = kLayout__364, - .rs2 = kLayout__371, - .addrU32 = kLayout__378, - .addr = kLayout__381, - .data = kLayout__218}; -__device__ constexpr ArgU8Layout4LayoutArray kLayout__386 = - ArgU8Layout4LayoutArray{ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/27}, - .val = NondetRegLayout{._super = /*offset=*/28}}, - ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/29}, - .val = NondetRegLayout{._super = /*offset=*/30}}, - ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/31}, - .val = NondetRegLayout{._super = /*offset=*/32}}, - ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/33}, - .val = NondetRegLayout{._super = /*offset=*/34}}}; -__device__ constexpr _Arguments_Mem1OutputLayout kLayout__385 = - _Arguments_Mem1OutputLayout{.argU8 = kLayout__386}; -__device__ constexpr NondetU8RegLayout kLayout__390 = - NondetU8RegLayout{.arg = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/33}, - .val = NondetRegLayout{._super = /*offset=*/34}}}; -__device__ constexpr SplitWordLayout kLayout__389 = - SplitWordLayout{.byte0 = kLayout__330, .byte1 = kLayout__390}; -__device__ constexpr OpSBLayout kLayout__388 = - OpSBLayout{.origBytes = kLayout__327, .newBytes = kLayout__389}; -__device__ constexpr Mem1OutputArm1Layout kLayout__391 = - Mem1OutputArm1Layout{._extra0 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/27}, - .val = NondetRegLayout{._super = /*offset=*/28}}, - ._extra1 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/29}, - .val = NondetRegLayout{._super = /*offset=*/30}}, - ._extra2 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/31}, - .val = NondetRegLayout{._super = /*offset=*/32}}, - ._extra3 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/33}, - .val = NondetRegLayout{._super = /*offset=*/34}}}; -__device__ constexpr Mem1OutputArm2Layout kLayout__392 = - Mem1OutputArm2Layout{._extra0 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/27}, - .val = NondetRegLayout{._super = /*offset=*/28}}, - ._extra1 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/29}, - .val = NondetRegLayout{._super = /*offset=*/30}}, - ._extra2 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/31}, - .val = NondetRegLayout{._super = /*offset=*/32}}, - ._extra3 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/33}, - .val = NondetRegLayout{._super = /*offset=*/34}}}; -__device__ constexpr Mem1OutputArm3Layout kLayout__393 = - Mem1OutputArm3Layout{._extra0 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/27}, - .val = NondetRegLayout{._super = /*offset=*/28}}, - ._extra1 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/29}, - .val = NondetRegLayout{._super = /*offset=*/30}}, - ._extra2 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/31}, - .val = NondetRegLayout{._super = /*offset=*/32}}, - ._extra3 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/33}, - .val = NondetRegLayout{._super = /*offset=*/34}}}; -__device__ constexpr Mem1OutputArm4Layout kLayout__394 = - Mem1OutputArm4Layout{._extra0 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/27}, - .val = NondetRegLayout{._super = /*offset=*/28}}, - ._extra1 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/29}, - .val = NondetRegLayout{._super = /*offset=*/30}}, - ._extra2 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/31}, - .val = NondetRegLayout{._super = /*offset=*/32}}, - ._extra3 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/33}, - .val = NondetRegLayout{._super = /*offset=*/34}}}; -__device__ constexpr Mem1OutputArm5Layout kLayout__395 = - Mem1OutputArm5Layout{._extra0 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/27}, - .val = NondetRegLayout{._super = /*offset=*/28}}, - ._extra1 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/29}, - .val = NondetRegLayout{._super = /*offset=*/30}}, - ._extra2 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/31}, - .val = NondetRegLayout{._super = /*offset=*/32}}, - ._extra3 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/33}, - .val = NondetRegLayout{._super = /*offset=*/34}}}; -__device__ constexpr Mem1OutputArm6Layout kLayout__396 = - Mem1OutputArm6Layout{._extra0 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/27}, - .val = NondetRegLayout{._super = /*offset=*/28}}, - ._extra1 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/29}, - .val = NondetRegLayout{._super = /*offset=*/30}}, - ._extra2 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/31}, - .val = NondetRegLayout{._super = /*offset=*/32}}, - ._extra3 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/33}, - .val = NondetRegLayout{._super = /*offset=*/34}}}; -__device__ constexpr Mem1OutputArm7Layout kLayout__397 = - Mem1OutputArm7Layout{._extra0 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/27}, - .val = NondetRegLayout{._super = /*offset=*/28}}, - ._extra1 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/29}, - .val = NondetRegLayout{._super = /*offset=*/30}}, - ._extra2 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/31}, - .val = NondetRegLayout{._super = /*offset=*/32}}, - ._extra3 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/33}, - .val = NondetRegLayout{._super = /*offset=*/34}}}; -__device__ constexpr Mem1OutputLayout kLayout__387 = Mem1OutputLayout{.arm0 = kLayout__388, - .arm1 = kLayout__391, - .arm2 = kLayout__392, - .arm3 = kLayout__393, - .arm4 = kLayout__394, - .arm5 = kLayout__395, - .arm6 = kLayout__396, - .arm7 = kLayout__397}; -__device__ constexpr MemoryArgLayout kLayout__401 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/116}, - .addr = NondetRegLayout{._super = /*offset=*/115}, - .cycle = NondetRegLayout{._super = /*offset=*/117}, - .dataLow = NondetRegLayout{._super = /*offset=*/118}, - .dataHigh = NondetRegLayout{._super = /*offset=*/119}}; -__device__ constexpr MemoryArgLayout kLayout__402 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/120}, - .addr = NondetRegLayout{._super = /*offset=*/115}, - .cycle = NondetRegLayout{._super = /*offset=*/0}, - .dataLow = NondetRegLayout{._super = /*offset=*/121}, - .dataHigh = NondetRegLayout{._super = /*offset=*/122}}; -__device__ constexpr MemoryIOLayout kLayout__400 = - MemoryIOLayout{.oldTxn = kLayout__401, .newTxn = kLayout__402}; -__device__ constexpr IsCycleLayout kLayout__404 = - IsCycleLayout{.arg = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/123}, - .cycle = NondetRegLayout{._super = /*offset=*/124}}}; -__device__ constexpr IsForwardLayout kLayout__403 = IsForwardLayout{._0 = kLayout__404}; -__device__ constexpr MemoryWriteLayout kLayout__399 = - MemoryWriteLayout{.io = kLayout__400, ._0 = kLayout__403}; -__device__ constexpr MemStoreFinalizeLayout kLayout__398 = - MemStoreFinalizeLayout{._0 = kLayout__399}; -__device__ constexpr NondetU16RegLayout kLayout__406 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/125}, - .val = NondetRegLayout{._super = /*offset=*/126}}}; -__device__ constexpr NondetU16RegLayout kLayout__407 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/128}, - .val = NondetRegLayout{._super = /*offset=*/129}}}; -__device__ constexpr NormalizeU32Layout kLayout__405 = - NormalizeU32Layout{.low16 = kLayout__406, - .lowCarry = NondetRegLayout{._super = /*offset=*/127}, - .high16 = kLayout__407, - .highCarry = NondetRegLayout{._super = /*offset=*/130}}; -__device__ constexpr Mem1Layout kLayout__350 = Mem1Layout{.input = kLayout__351, - ._arguments_Mem1Output = kLayout__385, - .output = kLayout__387, - ._0 = kLayout__398, - .pcAdd = kLayout__405}; -__device__ constexpr MemoryArgLayout kLayout__416 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/27}, - .addr = NondetRegLayout{._super = /*offset=*/28}, - .cycle = NondetRegLayout{._super = /*offset=*/29}, - .dataLow = NondetRegLayout{._super = /*offset=*/30}, - .dataHigh = NondetRegLayout{._super = /*offset=*/31}}; -__device__ constexpr MemoryArgLayout kLayout__417 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/32}, - .addr = NondetRegLayout{._super = /*offset=*/28}, - .cycle = NondetRegLayout{._super = /*offset=*/0}, - .dataLow = NondetRegLayout{._super = /*offset=*/33}, - .dataHigh = NondetRegLayout{._super = /*offset=*/34}}; -__device__ constexpr MemoryIOLayout kLayout__415 = - MemoryIOLayout{.oldTxn = kLayout__416, .newTxn = kLayout__417}; -__device__ constexpr MemoryPageInLayout kLayout__414 = MemoryPageInLayout{.io = kLayout__415}; -__device__ constexpr ControlLoadRoot__0_SuperLayout kLayout__413 = - ControlLoadRoot__0_SuperLayout{.mem = kLayout__414}; -__device__ constexpr MemoryArgLayout kLayout__421 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/35}, - .addr = NondetRegLayout{._super = /*offset=*/36}, - .cycle = NondetRegLayout{._super = /*offset=*/37}, - .dataLow = NondetRegLayout{._super = /*offset=*/38}, - .dataHigh = NondetRegLayout{._super = /*offset=*/39}}; -__device__ constexpr MemoryArgLayout kLayout__422 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/40}, - .addr = NondetRegLayout{._super = /*offset=*/36}, - .cycle = NondetRegLayout{._super = /*offset=*/0}, - .dataLow = NondetRegLayout{._super = /*offset=*/41}, - .dataHigh = NondetRegLayout{._super = /*offset=*/42}}; -__device__ constexpr MemoryIOLayout kLayout__420 = - MemoryIOLayout{.oldTxn = kLayout__421, .newTxn = kLayout__422}; -__device__ constexpr MemoryPageInLayout kLayout__419 = MemoryPageInLayout{.io = kLayout__420}; -__device__ constexpr ControlLoadRoot__0_SuperLayout kLayout__418 = - ControlLoadRoot__0_SuperLayout{.mem = kLayout__419}; -__device__ constexpr MemoryArgLayout kLayout__426 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/43}, - .addr = NondetRegLayout{._super = /*offset=*/44}, - .cycle = NondetRegLayout{._super = /*offset=*/45}, - .dataLow = NondetRegLayout{._super = /*offset=*/46}, - .dataHigh = NondetRegLayout{._super = /*offset=*/47}}; -__device__ constexpr MemoryArgLayout kLayout__427 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/48}, - .addr = NondetRegLayout{._super = /*offset=*/44}, - .cycle = NondetRegLayout{._super = /*offset=*/0}, - .dataLow = NondetRegLayout{._super = /*offset=*/49}, - .dataHigh = NondetRegLayout{._super = /*offset=*/50}}; -__device__ constexpr MemoryIOLayout kLayout__425 = - MemoryIOLayout{.oldTxn = kLayout__426, .newTxn = kLayout__427}; -__device__ constexpr MemoryPageInLayout kLayout__424 = MemoryPageInLayout{.io = kLayout__425}; -__device__ constexpr ControlLoadRoot__0_SuperLayout kLayout__423 = - ControlLoadRoot__0_SuperLayout{.mem = kLayout__424}; -__device__ constexpr MemoryArgLayout kLayout__431 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/51}, - .addr = NondetRegLayout{._super = /*offset=*/52}, - .cycle = NondetRegLayout{._super = /*offset=*/53}, - .dataLow = NondetRegLayout{._super = /*offset=*/54}, - .dataHigh = NondetRegLayout{._super = /*offset=*/55}}; -__device__ constexpr MemoryArgLayout kLayout__432 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/56}, - .addr = NondetRegLayout{._super = /*offset=*/52}, - .cycle = NondetRegLayout{._super = /*offset=*/0}, - .dataLow = NondetRegLayout{._super = /*offset=*/57}, - .dataHigh = NondetRegLayout{._super = /*offset=*/58}}; -__device__ constexpr MemoryIOLayout kLayout__430 = - MemoryIOLayout{.oldTxn = kLayout__431, .newTxn = kLayout__432}; -__device__ constexpr MemoryPageInLayout kLayout__429 = MemoryPageInLayout{.io = kLayout__430}; -__device__ constexpr ControlLoadRoot__0_SuperLayout kLayout__428 = - ControlLoadRoot__0_SuperLayout{.mem = kLayout__429}; -__device__ constexpr MemoryArgLayout kLayout__436 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/59}, - .addr = NondetRegLayout{._super = /*offset=*/60}, - .cycle = NondetRegLayout{._super = /*offset=*/61}, - .dataLow = NondetRegLayout{._super = /*offset=*/62}, - .dataHigh = NondetRegLayout{._super = /*offset=*/63}}; -__device__ constexpr MemoryArgLayout kLayout__437 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/64}, - .addr = NondetRegLayout{._super = /*offset=*/60}, - .cycle = NondetRegLayout{._super = /*offset=*/0}, - .dataLow = NondetRegLayout{._super = /*offset=*/65}, - .dataHigh = NondetRegLayout{._super = /*offset=*/66}}; -__device__ constexpr MemoryIOLayout kLayout__435 = - MemoryIOLayout{.oldTxn = kLayout__436, .newTxn = kLayout__437}; -__device__ constexpr MemoryPageInLayout kLayout__434 = MemoryPageInLayout{.io = kLayout__435}; -__device__ constexpr ControlLoadRoot__0_SuperLayout kLayout__433 = - ControlLoadRoot__0_SuperLayout{.mem = kLayout__434}; -__device__ constexpr MemoryArgLayout kLayout__441 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/67}, - .addr = NondetRegLayout{._super = /*offset=*/68}, - .cycle = NondetRegLayout{._super = /*offset=*/69}, - .dataLow = NondetRegLayout{._super = /*offset=*/70}, - .dataHigh = NondetRegLayout{._super = /*offset=*/71}}; -__device__ constexpr MemoryArgLayout kLayout__442 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/72}, - .addr = NondetRegLayout{._super = /*offset=*/68}, - .cycle = NondetRegLayout{._super = /*offset=*/0}, - .dataLow = NondetRegLayout{._super = /*offset=*/73}, - .dataHigh = NondetRegLayout{._super = /*offset=*/74}}; -__device__ constexpr MemoryIOLayout kLayout__440 = - MemoryIOLayout{.oldTxn = kLayout__441, .newTxn = kLayout__442}; -__device__ constexpr MemoryPageInLayout kLayout__439 = MemoryPageInLayout{.io = kLayout__440}; -__device__ constexpr ControlLoadRoot__0_SuperLayout kLayout__438 = - ControlLoadRoot__0_SuperLayout{.mem = kLayout__439}; -__device__ constexpr MemoryArgLayout kLayout__446 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/75}, - .addr = NondetRegLayout{._super = /*offset=*/76}, - .cycle = NondetRegLayout{._super = /*offset=*/77}, - .dataLow = NondetRegLayout{._super = /*offset=*/78}, - .dataHigh = NondetRegLayout{._super = /*offset=*/79}}; -__device__ constexpr MemoryArgLayout kLayout__447 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/80}, - .addr = NondetRegLayout{._super = /*offset=*/76}, - .cycle = NondetRegLayout{._super = /*offset=*/0}, - .dataLow = NondetRegLayout{._super = /*offset=*/81}, - .dataHigh = NondetRegLayout{._super = /*offset=*/82}}; -__device__ constexpr MemoryIOLayout kLayout__445 = - MemoryIOLayout{.oldTxn = kLayout__446, .newTxn = kLayout__447}; -__device__ constexpr MemoryPageInLayout kLayout__444 = MemoryPageInLayout{.io = kLayout__445}; -__device__ constexpr ControlLoadRoot__0_SuperLayout kLayout__443 = - ControlLoadRoot__0_SuperLayout{.mem = kLayout__444}; -__device__ constexpr MemoryArgLayout kLayout__451 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/83}, - .addr = NondetRegLayout{._super = /*offset=*/84}, - .cycle = NondetRegLayout{._super = /*offset=*/85}, - .dataLow = NondetRegLayout{._super = /*offset=*/86}, - .dataHigh = NondetRegLayout{._super = /*offset=*/87}}; -__device__ constexpr MemoryArgLayout kLayout__452 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/88}, - .addr = NondetRegLayout{._super = /*offset=*/84}, - .cycle = NondetRegLayout{._super = /*offset=*/0}, - .dataLow = NondetRegLayout{._super = /*offset=*/89}, - .dataHigh = NondetRegLayout{._super = /*offset=*/90}}; -__device__ constexpr MemoryIOLayout kLayout__450 = - MemoryIOLayout{.oldTxn = kLayout__451, .newTxn = kLayout__452}; -__device__ constexpr MemoryPageInLayout kLayout__449 = MemoryPageInLayout{.io = kLayout__450}; -__device__ constexpr ControlLoadRoot__0_SuperLayout kLayout__448 = - ControlLoadRoot__0_SuperLayout{.mem = kLayout__449}; -__device__ constexpr ControlLoadRoot__0_SuperLayout8LayoutArray kLayout__412 = - ControlLoadRoot__0_SuperLayout8LayoutArray{kLayout__413, - kLayout__418, - kLayout__423, - kLayout__428, - kLayout__433, - kLayout__438, - kLayout__443, - kLayout__448}; -__device__ constexpr ControlLoadRootLayout kLayout__411 = ControlLoadRootLayout{._1 = kLayout__412}; -__device__ constexpr Control0_SuperArm0Layout kLayout__410 = Control0_SuperArm0Layout{ - ._super = kLayout__411, - ._extra0 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/91}, - .cycle = NondetRegLayout{._super = /*offset=*/92}}, - ._extra1 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/93}, - .cycle = NondetRegLayout{._super = /*offset=*/94}}, - ._extra2 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/95}, - .cycle = NondetRegLayout{._super = /*offset=*/96}}, - ._extra3 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/97}, - .cycle = NondetRegLayout{._super = /*offset=*/98}}, - ._extra4 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/99}, - .cycle = NondetRegLayout{._super = /*offset=*/100}}, - ._extra5 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/101}, - .cycle = NondetRegLayout{._super = /*offset=*/102}}, - ._extra6 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/103}, - .cycle = NondetRegLayout{._super = /*offset=*/104}}, - ._extra7 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/105}, - .cycle = NondetRegLayout{._super = /*offset=*/106}}, - ._extra8 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/107}, - .val = NondetRegLayout{._super = /*offset=*/108}}, - ._extra9 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/109}, - .val = NondetRegLayout{._super = /*offset=*/110}}, - ._extra10 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/111}, - .val = NondetRegLayout{._super = /*offset=*/112}}, - ._extra11 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/113}, - .val = NondetRegLayout{._super = /*offset=*/114}}, - ._extra12 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/115}, - .val = NondetRegLayout{._super = /*offset=*/116}}, - ._extra13 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/117}, - .val = NondetRegLayout{._super = /*offset=*/118}}, - ._extra14 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/119}, - .val = NondetRegLayout{._super = /*offset=*/120}}, - ._extra15 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/121}, - .val = NondetRegLayout{._super = /*offset=*/122}}, - ._extra16 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/123}, - .val = NondetRegLayout{._super = /*offset=*/124}}, - ._extra17 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/125}, - .val = NondetRegLayout{._super = /*offset=*/126}}, - ._extra18 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/127}, - .val = NondetRegLayout{._super = /*offset=*/128}}, - ._extra19 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/129}, - .val = NondetRegLayout{._super = /*offset=*/130}}, - ._extra20 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/131}, - .val = NondetRegLayout{._super = /*offset=*/132}}, - ._extra21 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/133}, - .val = NondetRegLayout{._super = /*offset=*/134}}, - ._extra22 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/135}, - .val = NondetRegLayout{._super = /*offset=*/136}}, - ._extra23 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/137}, - .val = NondetRegLayout{._super = /*offset=*/138}}, - ._extra24 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/139}, - .val = NondetRegLayout{._super = /*offset=*/140}}, - ._extra25 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/141}, - .val = NondetRegLayout{._super = /*offset=*/142}}, - ._extra26 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/143}, - .val = NondetRegLayout{._super = /*offset=*/144}}, - ._extra27 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/145}, - .val = NondetRegLayout{._super = /*offset=*/146}}, - ._extra28 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/147}, - .val = NondetRegLayout{._super = /*offset=*/148}}, - ._extra29 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/149}, - .val = NondetRegLayout{._super = /*offset=*/150}}, - ._extra30 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/151}, - .val = NondetRegLayout{._super = /*offset=*/152}}, - ._extra31 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/153}, - .val = NondetRegLayout{._super = /*offset=*/154}}, - ._extra32 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/155}, - .val = NondetRegLayout{._super = /*offset=*/156}}, - ._extra33 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/157}, - .val = NondetRegLayout{._super = /*offset=*/158}}, - ._extra34 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/159}, - .val = NondetRegLayout{._super = /*offset=*/160}}, - ._extra35 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/161}, - .val = NondetRegLayout{._super = /*offset=*/162}}, - ._extra36 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/163}, - .val = NondetRegLayout{._super = /*offset=*/164}}, - ._extra37 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/165}, - .val = NondetRegLayout{._super = /*offset=*/166}}, - ._extra38 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/167}, - .val = NondetRegLayout{._super = /*offset=*/168}}, - ._extra39 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/169}, - .val = NondetRegLayout{._super = /*offset=*/170}}}; -__device__ constexpr IsCycleLayout kLayout__460 = - IsCycleLayout{.arg = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/91}, - .cycle = NondetRegLayout{._super = /*offset=*/92}}}; -__device__ constexpr IsForwardLayout kLayout__459 = IsForwardLayout{._0 = kLayout__460}; -__device__ constexpr MemoryReadLayout kLayout__458 = - MemoryReadLayout{.io = kLayout__415, ._0 = kLayout__459}; -__device__ constexpr IsCycleLayout kLayout__463 = - IsCycleLayout{.arg = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/93}, - .cycle = NondetRegLayout{._super = /*offset=*/94}}}; -__device__ constexpr IsForwardLayout kLayout__462 = IsForwardLayout{._0 = kLayout__463}; -__device__ constexpr MemoryReadLayout kLayout__461 = - MemoryReadLayout{.io = kLayout__420, ._0 = kLayout__462}; -__device__ constexpr ControlResume_SuperArm0_SuperLayout kLayout__457 = - ControlResume_SuperArm0_SuperLayout{.pc = kLayout__458, .mode = kLayout__461}; -__device__ constexpr ControlResume_SuperArm0Layout kLayout__456 = ControlResume_SuperArm0Layout{ - ._super = kLayout__457, - ._extra0 = kLayout__426, - ._extra1 = kLayout__427, - ._extra2 = kLayout__431, - ._extra3 = kLayout__432, - ._extra4 = kLayout__436, - ._extra5 = kLayout__437, - ._extra6 = kLayout__441, - ._extra7 = kLayout__442, - ._extra8 = kLayout__446, - ._extra9 = kLayout__447, - ._extra10 = kLayout__451, - ._extra11 = kLayout__452, - ._extra12 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/95}, - .cycle = NondetRegLayout{._super = /*offset=*/96}}, - ._extra13 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/97}, - .cycle = NondetRegLayout{._super = /*offset=*/98}}, - ._extra14 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/99}, - .cycle = NondetRegLayout{._super = /*offset=*/100}}, - ._extra15 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/101}, - .cycle = NondetRegLayout{._super = /*offset=*/102}}, - ._extra16 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/103}, - .cycle = NondetRegLayout{._super = /*offset=*/104}}, - ._extra17 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/105}, - .cycle = NondetRegLayout{._super = /*offset=*/106}}}; -__device__ constexpr MemoryWriteLayout kLayout__467 = - MemoryWriteLayout{.io = kLayout__415, ._0 = kLayout__459}; -__device__ constexpr ControlResume_SuperArm1_Super__0_SuperLayout kLayout__466 = - ControlResume_SuperArm1_Super__0_SuperLayout{._0 = kLayout__467}; -__device__ constexpr MemoryWriteLayout kLayout__469 = - MemoryWriteLayout{.io = kLayout__420, ._0 = kLayout__462}; -__device__ constexpr ControlResume_SuperArm1_Super__0_SuperLayout kLayout__468 = - ControlResume_SuperArm1_Super__0_SuperLayout{._0 = kLayout__469}; -__device__ constexpr IsCycleLayout kLayout__473 = - IsCycleLayout{.arg = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/95}, - .cycle = NondetRegLayout{._super = /*offset=*/96}}}; -__device__ constexpr IsForwardLayout kLayout__472 = IsForwardLayout{._0 = kLayout__473}; -__device__ constexpr MemoryWriteLayout kLayout__471 = - MemoryWriteLayout{.io = kLayout__425, ._0 = kLayout__472}; -__device__ constexpr ControlResume_SuperArm1_Super__0_SuperLayout kLayout__470 = - ControlResume_SuperArm1_Super__0_SuperLayout{._0 = kLayout__471}; -__device__ constexpr MemoryWriteLayout kLayout__475 = - MemoryWriteLayout{.io = kLayout__430, ._0 = kLayout__131}; -__device__ constexpr ControlResume_SuperArm1_Super__0_SuperLayout kLayout__474 = - ControlResume_SuperArm1_Super__0_SuperLayout{._0 = kLayout__475}; -__device__ constexpr IsCycleLayout kLayout__479 = - IsCycleLayout{.arg = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/99}, - .cycle = NondetRegLayout{._super = /*offset=*/100}}}; -__device__ constexpr IsForwardLayout kLayout__478 = IsForwardLayout{._0 = kLayout__479}; -__device__ constexpr MemoryWriteLayout kLayout__477 = - MemoryWriteLayout{.io = kLayout__435, ._0 = kLayout__478}; -__device__ constexpr ControlResume_SuperArm1_Super__0_SuperLayout kLayout__476 = - ControlResume_SuperArm1_Super__0_SuperLayout{._0 = kLayout__477}; -__device__ constexpr IsCycleLayout kLayout__483 = - IsCycleLayout{.arg = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/101}, - .cycle = NondetRegLayout{._super = /*offset=*/102}}}; -__device__ constexpr IsForwardLayout kLayout__482 = IsForwardLayout{._0 = kLayout__483}; -__device__ constexpr MemoryWriteLayout kLayout__481 = - MemoryWriteLayout{.io = kLayout__440, ._0 = kLayout__482}; -__device__ constexpr ControlResume_SuperArm1_Super__0_SuperLayout kLayout__480 = - ControlResume_SuperArm1_Super__0_SuperLayout{._0 = kLayout__481}; -__device__ constexpr MemoryWriteLayout kLayout__485 = - MemoryWriteLayout{.io = kLayout__445, ._0 = kLayout__215}; -__device__ constexpr ControlResume_SuperArm1_Super__0_SuperLayout kLayout__484 = - ControlResume_SuperArm1_Super__0_SuperLayout{._0 = kLayout__485}; -__device__ constexpr IsCycleLayout kLayout__489 = - IsCycleLayout{.arg = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/105}, - .cycle = NondetRegLayout{._super = /*offset=*/106}}}; -__device__ constexpr IsForwardLayout kLayout__488 = IsForwardLayout{._0 = kLayout__489}; -__device__ constexpr MemoryWriteLayout kLayout__487 = - MemoryWriteLayout{.io = kLayout__450, ._0 = kLayout__488}; -__device__ constexpr ControlResume_SuperArm1_Super__0_SuperLayout kLayout__486 = - ControlResume_SuperArm1_Super__0_SuperLayout{._0 = kLayout__487}; -__device__ constexpr ControlResume_SuperArm1_Super__0_SuperLayout8LayoutArray kLayout__465 = - ControlResume_SuperArm1_Super__0_SuperLayout8LayoutArray{kLayout__466, - kLayout__468, - kLayout__470, - kLayout__474, - kLayout__476, - kLayout__480, - kLayout__484, - kLayout__486}; -__device__ constexpr ControlResume_SuperArm1_SuperLayout kLayout__464 = - ControlResume_SuperArm1_SuperLayout{._1 = kLayout__465}; -__device__ constexpr ControlResume_SuperLayout kLayout__455 = - ControlResume_SuperLayout{.arm0 = kLayout__456, .arm1 = kLayout__464}; -__device__ constexpr MemoryArgLayout16LayoutArray kLayout__491 = - MemoryArgLayout16LayoutArray{kLayout__416, - kLayout__417, - kLayout__421, - kLayout__422, - kLayout__426, - kLayout__427, - kLayout__431, - kLayout__432, - kLayout__436, - kLayout__437, - kLayout__441, - kLayout__442, - kLayout__446, - kLayout__447, - kLayout__451, - kLayout__452}; -__device__ constexpr CycleArgLayout8LayoutArray kLayout__492 = - CycleArgLayout8LayoutArray{CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/91}, - .cycle = NondetRegLayout{._super = /*offset=*/92}}, - CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/93}, - .cycle = NondetRegLayout{._super = /*offset=*/94}}, - CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/95}, - .cycle = NondetRegLayout{._super = /*offset=*/96}}, - CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/97}, - .cycle = NondetRegLayout{._super = /*offset=*/98}}, - CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/99}, - .cycle = NondetRegLayout{._super = /*offset=*/100}}, - CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/101}, - .cycle = NondetRegLayout{._super = /*offset=*/102}}, - CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/103}, - .cycle = NondetRegLayout{._super = /*offset=*/104}}, - CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/105}, - .cycle = NondetRegLayout{._super = /*offset=*/106}}}; -__device__ constexpr _Arguments_ControlResume_SuperLayout kLayout__490 = - _Arguments_ControlResume_SuperLayout{.memoryArg = kLayout__491, .cycleArg = kLayout__492}; -__device__ constexpr ControlResumeLayout kLayout__454 = - ControlResumeLayout{._super = kLayout__455, - .pcZero = IsZeroLayout{._super = NondetRegLayout{._super = /*offset=*/171}, - .inv = NondetRegLayout{._super = /*offset=*/172}}, - ._arguments_ControlResume_Super = kLayout__490}; -__device__ constexpr Control0_SuperArm1Layout kLayout__453 = Control0_SuperArm1Layout{ - ._super = kLayout__454, - ._extra0 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/107}, - .val = NondetRegLayout{._super = /*offset=*/108}}, - ._extra1 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/109}, - .val = NondetRegLayout{._super = /*offset=*/110}}, - ._extra2 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/111}, - .val = NondetRegLayout{._super = /*offset=*/112}}, - ._extra3 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/113}, - .val = NondetRegLayout{._super = /*offset=*/114}}, - ._extra4 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/115}, - .val = NondetRegLayout{._super = /*offset=*/116}}, - ._extra5 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/117}, - .val = NondetRegLayout{._super = /*offset=*/118}}, - ._extra6 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/119}, - .val = NondetRegLayout{._super = /*offset=*/120}}, - ._extra7 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/121}, - .val = NondetRegLayout{._super = /*offset=*/122}}, - ._extra8 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/123}, - .val = NondetRegLayout{._super = /*offset=*/124}}, - ._extra9 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/125}, - .val = NondetRegLayout{._super = /*offset=*/126}}, - ._extra10 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/127}, - .val = NondetRegLayout{._super = /*offset=*/128}}, - ._extra11 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/129}, - .val = NondetRegLayout{._super = /*offset=*/130}}, - ._extra12 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/131}, - .val = NondetRegLayout{._super = /*offset=*/132}}, - ._extra13 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/133}, - .val = NondetRegLayout{._super = /*offset=*/134}}, - ._extra14 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/135}, - .val = NondetRegLayout{._super = /*offset=*/136}}, - ._extra15 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/137}, - .val = NondetRegLayout{._super = /*offset=*/138}}, - ._extra16 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/139}, - .val = NondetRegLayout{._super = /*offset=*/140}}, - ._extra17 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/141}, - .val = NondetRegLayout{._super = /*offset=*/142}}, - ._extra18 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/143}, - .val = NondetRegLayout{._super = /*offset=*/144}}, - ._extra19 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/145}, - .val = NondetRegLayout{._super = /*offset=*/146}}, - ._extra20 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/147}, - .val = NondetRegLayout{._super = /*offset=*/148}}, - ._extra21 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/149}, - .val = NondetRegLayout{._super = /*offset=*/150}}, - ._extra22 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/151}, - .val = NondetRegLayout{._super = /*offset=*/152}}, - ._extra23 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/153}, - .val = NondetRegLayout{._super = /*offset=*/154}}, - ._extra24 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/155}, - .val = NondetRegLayout{._super = /*offset=*/156}}, - ._extra25 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/157}, - .val = NondetRegLayout{._super = /*offset=*/158}}, - ._extra26 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/159}, - .val = NondetRegLayout{._super = /*offset=*/160}}, - ._extra27 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/161}, - .val = NondetRegLayout{._super = /*offset=*/162}}, - ._extra28 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/163}, - .val = NondetRegLayout{._super = /*offset=*/164}}, - ._extra29 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/165}, - .val = NondetRegLayout{._super = /*offset=*/166}}, - ._extra30 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/167}, - .val = NondetRegLayout{._super = /*offset=*/168}}, - ._extra31 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/169}, - .val = NondetRegLayout{._super = /*offset=*/170}}}; -__device__ constexpr NondetU16RegLayout kLayout__497 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/107}, - .val = NondetRegLayout{._super = /*offset=*/108}}}; -__device__ constexpr U16RegLayout kLayout__496 = U16RegLayout{.ret = kLayout__497}; -__device__ constexpr NondetU16RegLayout kLayout__498 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/109}, - .val = NondetRegLayout{._super = /*offset=*/110}}}; -__device__ constexpr AddrDecomposeBitsLayout kLayout__495 = - AddrDecomposeBitsLayout{.low0 = NondetRegLayout{._super = /*offset=*/172}, - .low1 = NondetRegLayout{._super = /*offset=*/173}, - .upperDiff = kLayout__496, - ._0 = IsZeroLayout{._super = NondetRegLayout{._super = /*offset=*/174}, - .inv = NondetRegLayout{._super = /*offset=*/175}}, - .med14 = kLayout__498}; -__device__ constexpr NondetU16RegLayout kLayout__500 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/111}, - .val = NondetRegLayout{._super = /*offset=*/112}}}; -__device__ constexpr U16RegLayout kLayout__499 = U16RegLayout{.ret = kLayout__500}; -__device__ constexpr MemoryReadLayout kLayout__501 = - MemoryReadLayout{.io = kLayout__425, ._0 = kLayout__472}; -__device__ constexpr ControlUserECALLLayout kLayout__494 = - ControlUserECALLLayout{.safeMode = NondetRegLayout{._super = /*offset=*/171}, - .pcAddr = kLayout__495, - .loadInst = kLayout__458, - .dispatchIdx = kLayout__461, - ._0 = kLayout__499, - .newPcAddr = kLayout__501, - ._1 = kLayout__475}; -__device__ constexpr Control0_SuperArm2Layout kLayout__493 = Control0_SuperArm2Layout{ - ._super = kLayout__494, - ._extra0 = kLayout__436, - ._extra1 = kLayout__437, - ._extra2 = kLayout__441, - ._extra3 = kLayout__442, - ._extra4 = kLayout__446, - ._extra5 = kLayout__447, - ._extra6 = kLayout__451, - ._extra7 = kLayout__452, - ._extra8 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/99}, - .cycle = NondetRegLayout{._super = /*offset=*/100}}, - ._extra9 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/101}, - .cycle = NondetRegLayout{._super = /*offset=*/102}}, - ._extra10 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/103}, - .cycle = NondetRegLayout{._super = /*offset=*/104}}, - ._extra11 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/105}, - .cycle = NondetRegLayout{._super = /*offset=*/106}}, - ._extra12 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/113}, - .val = NondetRegLayout{._super = /*offset=*/114}}, - ._extra13 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/115}, - .val = NondetRegLayout{._super = /*offset=*/116}}, - ._extra14 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/117}, - .val = NondetRegLayout{._super = /*offset=*/118}}, - ._extra15 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/119}, - .val = NondetRegLayout{._super = /*offset=*/120}}, - ._extra16 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/121}, - .val = NondetRegLayout{._super = /*offset=*/122}}, - ._extra17 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/123}, - .val = NondetRegLayout{._super = /*offset=*/124}}, - ._extra18 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/125}, - .val = NondetRegLayout{._super = /*offset=*/126}}, - ._extra19 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/127}, - .val = NondetRegLayout{._super = /*offset=*/128}}, - ._extra20 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/129}, - .val = NondetRegLayout{._super = /*offset=*/130}}, - ._extra21 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/131}, - .val = NondetRegLayout{._super = /*offset=*/132}}, - ._extra22 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/133}, - .val = NondetRegLayout{._super = /*offset=*/134}}, - ._extra23 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/135}, - .val = NondetRegLayout{._super = /*offset=*/136}}, - ._extra24 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/137}, - .val = NondetRegLayout{._super = /*offset=*/138}}, - ._extra25 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/139}, - .val = NondetRegLayout{._super = /*offset=*/140}}, - ._extra26 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/141}, - .val = NondetRegLayout{._super = /*offset=*/142}}, - ._extra27 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/143}, - .val = NondetRegLayout{._super = /*offset=*/144}}, - ._extra28 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/145}, - .val = NondetRegLayout{._super = /*offset=*/146}}, - ._extra29 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/147}, - .val = NondetRegLayout{._super = /*offset=*/148}}, - ._extra30 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/149}, - .val = NondetRegLayout{._super = /*offset=*/150}}, - ._extra31 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/151}, - .val = NondetRegLayout{._super = /*offset=*/152}}, - ._extra32 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/153}, - .val = NondetRegLayout{._super = /*offset=*/154}}, - ._extra33 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/155}, - .val = NondetRegLayout{._super = /*offset=*/156}}, - ._extra34 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/157}, - .val = NondetRegLayout{._super = /*offset=*/158}}, - ._extra35 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/159}, - .val = NondetRegLayout{._super = /*offset=*/160}}, - ._extra36 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/161}, - .val = NondetRegLayout{._super = /*offset=*/162}}, - ._extra37 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/163}, - .val = NondetRegLayout{._super = /*offset=*/164}}, - ._extra38 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/165}, - .val = NondetRegLayout{._super = /*offset=*/166}}, - ._extra39 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/167}, - .val = NondetRegLayout{._super = /*offset=*/168}}, - ._extra40 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/169}, - .val = NondetRegLayout{._super = /*offset=*/170}}}; -__device__ constexpr NondetU16RegLayout kLayout__505 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/113}, - .val = NondetRegLayout{._super = /*offset=*/114}}}; -__device__ constexpr NormalizeU32Layout kLayout__504 = - NormalizeU32Layout{.low16 = kLayout__500, - .lowCarry = NondetRegLayout{._super = /*offset=*/176}, - .high16 = kLayout__505, - .highCarry = NondetRegLayout{._super = /*offset=*/177}}; -__device__ constexpr ControlMRETLayout kLayout__503 = - ControlMRETLayout{.safeMode = NondetRegLayout{._super = /*offset=*/171}, - .pcAddr = kLayout__495, - .loadInst = kLayout__458, - .pc = kLayout__461, - .pcAdd = kLayout__504}; -__device__ constexpr Control0_SuperArm3Layout kLayout__502 = Control0_SuperArm3Layout{ - ._super = kLayout__503, - ._extra0 = kLayout__426, - ._extra1 = kLayout__427, - ._extra2 = kLayout__431, - ._extra3 = kLayout__432, - ._extra4 = kLayout__436, - ._extra5 = kLayout__437, - ._extra6 = kLayout__441, - ._extra7 = kLayout__442, - ._extra8 = kLayout__446, - ._extra9 = kLayout__447, - ._extra10 = kLayout__451, - ._extra11 = kLayout__452, - ._extra12 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/95}, - .cycle = NondetRegLayout{._super = /*offset=*/96}}, - ._extra13 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/97}, - .cycle = NondetRegLayout{._super = /*offset=*/98}}, - ._extra14 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/99}, - .cycle = NondetRegLayout{._super = /*offset=*/100}}, - ._extra15 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/101}, - .cycle = NondetRegLayout{._super = /*offset=*/102}}, - ._extra16 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/103}, - .cycle = NondetRegLayout{._super = /*offset=*/104}}, - ._extra17 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/105}, - .cycle = NondetRegLayout{._super = /*offset=*/106}}, - ._extra18 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/115}, - .val = NondetRegLayout{._super = /*offset=*/116}}, - ._extra19 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/117}, - .val = NondetRegLayout{._super = /*offset=*/118}}, - ._extra20 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/119}, - .val = NondetRegLayout{._super = /*offset=*/120}}, - ._extra21 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/121}, - .val = NondetRegLayout{._super = /*offset=*/122}}, - ._extra22 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/123}, - .val = NondetRegLayout{._super = /*offset=*/124}}, - ._extra23 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/125}, - .val = NondetRegLayout{._super = /*offset=*/126}}, - ._extra24 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/127}, - .val = NondetRegLayout{._super = /*offset=*/128}}, - ._extra25 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/129}, - .val = NondetRegLayout{._super = /*offset=*/130}}, - ._extra26 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/131}, - .val = NondetRegLayout{._super = /*offset=*/132}}, - ._extra27 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/133}, - .val = NondetRegLayout{._super = /*offset=*/134}}, - ._extra28 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/135}, - .val = NondetRegLayout{._super = /*offset=*/136}}, - ._extra29 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/137}, - .val = NondetRegLayout{._super = /*offset=*/138}}, - ._extra30 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/139}, - .val = NondetRegLayout{._super = /*offset=*/140}}, - ._extra31 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/141}, - .val = NondetRegLayout{._super = /*offset=*/142}}, - ._extra32 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/143}, - .val = NondetRegLayout{._super = /*offset=*/144}}, - ._extra33 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/145}, - .val = NondetRegLayout{._super = /*offset=*/146}}, - ._extra34 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/147}, - .val = NondetRegLayout{._super = /*offset=*/148}}, - ._extra35 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/149}, - .val = NondetRegLayout{._super = /*offset=*/150}}, - ._extra36 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/151}, - .val = NondetRegLayout{._super = /*offset=*/152}}, - ._extra37 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/153}, - .val = NondetRegLayout{._super = /*offset=*/154}}, - ._extra38 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/155}, - .val = NondetRegLayout{._super = /*offset=*/156}}, - ._extra39 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/157}, - .val = NondetRegLayout{._super = /*offset=*/158}}, - ._extra40 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/159}, - .val = NondetRegLayout{._super = /*offset=*/160}}, - ._extra41 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/161}, - .val = NondetRegLayout{._super = /*offset=*/162}}, - ._extra42 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/163}, - .val = NondetRegLayout{._super = /*offset=*/164}}, - ._extra43 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/165}, - .val = NondetRegLayout{._super = /*offset=*/166}}, - ._extra44 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/167}, - .val = NondetRegLayout{._super = /*offset=*/168}}, - ._extra45 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/169}, - .val = NondetRegLayout{._super = /*offset=*/170}}}; -__device__ constexpr MemoryReadLayout kLayout__511 = - MemoryReadLayout{.io = kLayout__430, ._0 = kLayout__131}; -__device__ constexpr MemoryReadLayout kLayout__512 = - MemoryReadLayout{.io = kLayout__435, ._0 = kLayout__478}; -__device__ constexpr MemoryReadLayout kLayout__513 = - MemoryReadLayout{.io = kLayout__440, ._0 = kLayout__482}; -__device__ constexpr MemoryReadLayout kLayout__514 = - MemoryReadLayout{.io = kLayout__445, ._0 = kLayout__215}; -__device__ constexpr MemoryReadLayout kLayout__515 = - MemoryReadLayout{.io = kLayout__450, ._0 = kLayout__488}; -__device__ constexpr MemoryReadLayout8LayoutArray kLayout__510 = - MemoryReadLayout8LayoutArray{kLayout__458, - kLayout__461, - kLayout__501, - kLayout__511, - kLayout__512, - kLayout__513, - kLayout__514, - kLayout__515}; -__device__ constexpr ControlSuspend_SuperArm0_SuperLayout kLayout__509 = - ControlSuspend_SuperArm0_SuperLayout{._1 = kLayout__510}; -__device__ constexpr ControlSuspend_SuperArm1_SuperLayout kLayout__517 = - ControlSuspend_SuperArm1_SuperLayout{ - .state = NondetRegLayout{._super = /*offset=*/171}, ._0 = kLayout__467, ._1 = kLayout__469}; -__device__ constexpr ControlSuspend_SuperArm1Layout kLayout__516 = ControlSuspend_SuperArm1Layout{ - ._super = kLayout__517, - ._extra0 = kLayout__426, - ._extra1 = kLayout__427, - ._extra2 = kLayout__431, - ._extra3 = kLayout__432, - ._extra4 = kLayout__436, - ._extra5 = kLayout__437, - ._extra6 = kLayout__441, - ._extra7 = kLayout__442, - ._extra8 = kLayout__446, - ._extra9 = kLayout__447, - ._extra10 = kLayout__451, - ._extra11 = kLayout__452, - ._extra12 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/95}, - .cycle = NondetRegLayout{._super = /*offset=*/96}}, - ._extra13 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/97}, - .cycle = NondetRegLayout{._super = /*offset=*/98}}, - ._extra14 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/99}, - .cycle = NondetRegLayout{._super = /*offset=*/100}}, - ._extra15 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/101}, - .cycle = NondetRegLayout{._super = /*offset=*/102}}, - ._extra16 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/103}, - .cycle = NondetRegLayout{._super = /*offset=*/104}}, - ._extra17 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/105}, - .cycle = NondetRegLayout{._super = /*offset=*/106}}}; -__device__ constexpr ControlSuspend_SuperLayout kLayout__508 = - ControlSuspend_SuperLayout{.arm0 = kLayout__509, .arm1 = kLayout__516}; -__device__ constexpr _Arguments_ControlSuspend_SuperLayout kLayout__518 = - _Arguments_ControlSuspend_SuperLayout{.memoryArg = kLayout__491, .cycleArg = kLayout__492}; -__device__ constexpr ControlSuspendLayout kLayout__507 = - ControlSuspendLayout{._super = kLayout__508, - .pcZero = IsZeroLayout{._super = NondetRegLayout{._super = /*offset=*/172}, - .inv = NondetRegLayout{._super = /*offset=*/173}}, - ._arguments_ControlSuspend_Super = kLayout__518}; -__device__ constexpr Control0_SuperArm4Layout kLayout__506 = Control0_SuperArm4Layout{ - ._super = kLayout__507, - ._extra0 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/107}, - .val = NondetRegLayout{._super = /*offset=*/108}}, - ._extra1 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/109}, - .val = NondetRegLayout{._super = /*offset=*/110}}, - ._extra2 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/111}, - .val = NondetRegLayout{._super = /*offset=*/112}}, - ._extra3 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/113}, - .val = NondetRegLayout{._super = /*offset=*/114}}, - ._extra4 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/115}, - .val = NondetRegLayout{._super = /*offset=*/116}}, - ._extra5 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/117}, - .val = NondetRegLayout{._super = /*offset=*/118}}, - ._extra6 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/119}, - .val = NondetRegLayout{._super = /*offset=*/120}}, - ._extra7 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/121}, - .val = NondetRegLayout{._super = /*offset=*/122}}, - ._extra8 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/123}, - .val = NondetRegLayout{._super = /*offset=*/124}}, - ._extra9 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/125}, - .val = NondetRegLayout{._super = /*offset=*/126}}, - ._extra10 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/127}, - .val = NondetRegLayout{._super = /*offset=*/128}}, - ._extra11 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/129}, - .val = NondetRegLayout{._super = /*offset=*/130}}, - ._extra12 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/131}, - .val = NondetRegLayout{._super = /*offset=*/132}}, - ._extra13 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/133}, - .val = NondetRegLayout{._super = /*offset=*/134}}, - ._extra14 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/135}, - .val = NondetRegLayout{._super = /*offset=*/136}}, - ._extra15 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/137}, - .val = NondetRegLayout{._super = /*offset=*/138}}, - ._extra16 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/139}, - .val = NondetRegLayout{._super = /*offset=*/140}}, - ._extra17 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/141}, - .val = NondetRegLayout{._super = /*offset=*/142}}, - ._extra18 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/143}, - .val = NondetRegLayout{._super = /*offset=*/144}}, - ._extra19 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/145}, - .val = NondetRegLayout{._super = /*offset=*/146}}, - ._extra20 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/147}, - .val = NondetRegLayout{._super = /*offset=*/148}}, - ._extra21 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/149}, - .val = NondetRegLayout{._super = /*offset=*/150}}, - ._extra22 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/151}, - .val = NondetRegLayout{._super = /*offset=*/152}}, - ._extra23 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/153}, - .val = NondetRegLayout{._super = /*offset=*/154}}, - ._extra24 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/155}, - .val = NondetRegLayout{._super = /*offset=*/156}}, - ._extra25 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/157}, - .val = NondetRegLayout{._super = /*offset=*/158}}, - ._extra26 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/159}, - .val = NondetRegLayout{._super = /*offset=*/160}}, - ._extra27 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/161}, - .val = NondetRegLayout{._super = /*offset=*/162}}, - ._extra28 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/163}, - .val = NondetRegLayout{._super = /*offset=*/164}}, - ._extra29 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/165}, - .val = NondetRegLayout{._super = /*offset=*/166}}, - ._extra30 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/167}, - .val = NondetRegLayout{._super = /*offset=*/168}}, - ._extra31 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/169}, - .val = NondetRegLayout{._super = /*offset=*/170}}}; -__device__ constexpr MemoryPageOutLayout kLayout__522 = - MemoryPageOutLayout{.io = kLayout__415, ._0 = kLayout__459}; -__device__ constexpr MemoryPageOutLayout kLayout__523 = - MemoryPageOutLayout{.io = kLayout__420, ._0 = kLayout__462}; -__device__ constexpr MemoryPageOutLayout kLayout__524 = - MemoryPageOutLayout{.io = kLayout__425, ._0 = kLayout__472}; -__device__ constexpr MemoryPageOutLayout kLayout__525 = - MemoryPageOutLayout{.io = kLayout__430, ._0 = kLayout__131}; -__device__ constexpr MemoryPageOutLayout kLayout__526 = - MemoryPageOutLayout{.io = kLayout__435, ._0 = kLayout__478}; -__device__ constexpr MemoryPageOutLayout kLayout__527 = - MemoryPageOutLayout{.io = kLayout__440, ._0 = kLayout__482}; -__device__ constexpr MemoryPageOutLayout kLayout__528 = - MemoryPageOutLayout{.io = kLayout__445, ._0 = kLayout__215}; -__device__ constexpr MemoryPageOutLayout kLayout__529 = - MemoryPageOutLayout{.io = kLayout__450, ._0 = kLayout__488}; -__device__ constexpr MemoryPageOutLayout8LayoutArray kLayout__521 = - MemoryPageOutLayout8LayoutArray{kLayout__522, - kLayout__523, - kLayout__524, - kLayout__525, - kLayout__526, - kLayout__527, - kLayout__528, - kLayout__529}; -__device__ constexpr ControlStoreRootLayout kLayout__520 = - ControlStoreRootLayout{._1 = kLayout__521}; -__device__ constexpr Control0_SuperArm5Layout kLayout__519 = Control0_SuperArm5Layout{ - ._super = kLayout__520, - ._extra0 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/107}, - .val = NondetRegLayout{._super = /*offset=*/108}}, - ._extra1 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/109}, - .val = NondetRegLayout{._super = /*offset=*/110}}, - ._extra2 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/111}, - .val = NondetRegLayout{._super = /*offset=*/112}}, - ._extra3 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/113}, - .val = NondetRegLayout{._super = /*offset=*/114}}, - ._extra4 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/115}, - .val = NondetRegLayout{._super = /*offset=*/116}}, - ._extra5 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/117}, - .val = NondetRegLayout{._super = /*offset=*/118}}, - ._extra6 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/119}, - .val = NondetRegLayout{._super = /*offset=*/120}}, - ._extra7 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/121}, - .val = NondetRegLayout{._super = /*offset=*/122}}, - ._extra8 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/123}, - .val = NondetRegLayout{._super = /*offset=*/124}}, - ._extra9 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/125}, - .val = NondetRegLayout{._super = /*offset=*/126}}, - ._extra10 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/127}, - .val = NondetRegLayout{._super = /*offset=*/128}}, - ._extra11 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/129}, - .val = NondetRegLayout{._super = /*offset=*/130}}, - ._extra12 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/131}, - .val = NondetRegLayout{._super = /*offset=*/132}}, - ._extra13 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/133}, - .val = NondetRegLayout{._super = /*offset=*/134}}, - ._extra14 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/135}, - .val = NondetRegLayout{._super = /*offset=*/136}}, - ._extra15 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/137}, - .val = NondetRegLayout{._super = /*offset=*/138}}, - ._extra16 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/139}, - .val = NondetRegLayout{._super = /*offset=*/140}}, - ._extra17 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/141}, - .val = NondetRegLayout{._super = /*offset=*/142}}, - ._extra18 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/143}, - .val = NondetRegLayout{._super = /*offset=*/144}}, - ._extra19 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/145}, - .val = NondetRegLayout{._super = /*offset=*/146}}, - ._extra20 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/147}, - .val = NondetRegLayout{._super = /*offset=*/148}}, - ._extra21 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/149}, - .val = NondetRegLayout{._super = /*offset=*/150}}, - ._extra22 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/151}, - .val = NondetRegLayout{._super = /*offset=*/152}}, - ._extra23 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/153}, - .val = NondetRegLayout{._super = /*offset=*/154}}, - ._extra24 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/155}, - .val = NondetRegLayout{._super = /*offset=*/156}}, - ._extra25 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/157}, - .val = NondetRegLayout{._super = /*offset=*/158}}, - ._extra26 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/159}, - .val = NondetRegLayout{._super = /*offset=*/160}}, - ._extra27 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/161}, - .val = NondetRegLayout{._super = /*offset=*/162}}, - ._extra28 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/163}, - .val = NondetRegLayout{._super = /*offset=*/164}}, - ._extra29 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/165}, - .val = NondetRegLayout{._super = /*offset=*/166}}, - ._extra30 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/167}, - .val = NondetRegLayout{._super = /*offset=*/168}}, - ._extra31 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/169}, - .val = NondetRegLayout{._super = /*offset=*/170}}}; -__device__ constexpr ControlTable_SuperArm0_Super__0_SuperLayout kLayout__536 = - ControlTable_SuperArm0_Super__0_SuperLayout{ - .arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/107}, - .val = NondetRegLayout{._super = /*offset=*/108}}}; -__device__ constexpr ControlTable_SuperArm0_Super__0_SuperLayout kLayout__537 = - ControlTable_SuperArm0_Super__0_SuperLayout{ - .arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/109}, - .val = NondetRegLayout{._super = /*offset=*/110}}}; -__device__ constexpr ControlTable_SuperArm0_Super__0_SuperLayout kLayout__538 = - ControlTable_SuperArm0_Super__0_SuperLayout{ - .arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/111}, - .val = NondetRegLayout{._super = /*offset=*/112}}}; -__device__ constexpr ControlTable_SuperArm0_Super__0_SuperLayout kLayout__539 = - ControlTable_SuperArm0_Super__0_SuperLayout{ - .arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/113}, - .val = NondetRegLayout{._super = /*offset=*/114}}}; -__device__ constexpr ControlTable_SuperArm0_Super__0_SuperLayout kLayout__540 = - ControlTable_SuperArm0_Super__0_SuperLayout{ - .arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/115}, - .val = NondetRegLayout{._super = /*offset=*/116}}}; -__device__ constexpr ControlTable_SuperArm0_Super__0_SuperLayout kLayout__541 = - ControlTable_SuperArm0_Super__0_SuperLayout{ - .arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/117}, - .val = NondetRegLayout{._super = /*offset=*/118}}}; -__device__ constexpr ControlTable_SuperArm0_Super__0_SuperLayout kLayout__542 = - ControlTable_SuperArm0_Super__0_SuperLayout{ - .arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/119}, - .val = NondetRegLayout{._super = /*offset=*/120}}}; -__device__ constexpr ControlTable_SuperArm0_Super__0_SuperLayout kLayout__543 = - ControlTable_SuperArm0_Super__0_SuperLayout{ - .arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/121}, - .val = NondetRegLayout{._super = /*offset=*/122}}}; -__device__ constexpr ControlTable_SuperArm0_Super__0_SuperLayout kLayout__544 = - ControlTable_SuperArm0_Super__0_SuperLayout{ - .arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/123}, - .val = NondetRegLayout{._super = /*offset=*/124}}}; -__device__ constexpr ControlTable_SuperArm0_Super__0_SuperLayout kLayout__545 = - ControlTable_SuperArm0_Super__0_SuperLayout{ - .arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/125}, - .val = NondetRegLayout{._super = /*offset=*/126}}}; -__device__ constexpr ControlTable_SuperArm0_Super__0_SuperLayout kLayout__546 = - ControlTable_SuperArm0_Super__0_SuperLayout{ - .arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/127}, - .val = NondetRegLayout{._super = /*offset=*/128}}}; -__device__ constexpr ControlTable_SuperArm0_Super__0_SuperLayout kLayout__547 = - ControlTable_SuperArm0_Super__0_SuperLayout{ - .arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/129}, - .val = NondetRegLayout{._super = /*offset=*/130}}}; -__device__ constexpr ControlTable_SuperArm0_Super__0_SuperLayout kLayout__548 = - ControlTable_SuperArm0_Super__0_SuperLayout{ - .arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/131}, - .val = NondetRegLayout{._super = /*offset=*/132}}}; -__device__ constexpr ControlTable_SuperArm0_Super__0_SuperLayout kLayout__549 = - ControlTable_SuperArm0_Super__0_SuperLayout{ - .arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/133}, - .val = NondetRegLayout{._super = /*offset=*/134}}}; -__device__ constexpr ControlTable_SuperArm0_Super__0_SuperLayout kLayout__550 = - ControlTable_SuperArm0_Super__0_SuperLayout{ - .arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/135}, - .val = NondetRegLayout{._super = /*offset=*/136}}}; -__device__ constexpr ControlTable_SuperArm0_Super__0_SuperLayout kLayout__551 = - ControlTable_SuperArm0_Super__0_SuperLayout{ - .arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/137}, - .val = NondetRegLayout{._super = /*offset=*/138}}}; -__device__ constexpr ControlTable_SuperArm0_Super__0_SuperLayout16LayoutArray kLayout__535 = - ControlTable_SuperArm0_Super__0_SuperLayout16LayoutArray{kLayout__536, - kLayout__537, - kLayout__538, - kLayout__539, - kLayout__540, - kLayout__541, - kLayout__542, - kLayout__543, - kLayout__544, - kLayout__545, - kLayout__546, - kLayout__547, - kLayout__548, - kLayout__549, - kLayout__550, - kLayout__551}; -__device__ constexpr ControlTable_SuperArm0_SuperLayout kLayout__534 = - ControlTable_SuperArm0_SuperLayout{ - ._1 = kLayout__535, - .done = IsZeroLayout{._super = NondetRegLayout{._super = /*offset=*/171}, - .inv = NondetRegLayout{._super = /*offset=*/172}}}; -__device__ constexpr ControlTable_SuperArm0Layout kLayout__533 = ControlTable_SuperArm0Layout{ - ._super = kLayout__534, - ._extra0 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/139}, - .val = NondetRegLayout{._super = /*offset=*/140}}, - ._extra1 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/141}, - .val = NondetRegLayout{._super = /*offset=*/142}}, - ._extra2 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/143}, - .val = NondetRegLayout{._super = /*offset=*/144}}, - ._extra3 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/145}, - .val = NondetRegLayout{._super = /*offset=*/146}}, - ._extra4 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/147}, - .val = NondetRegLayout{._super = /*offset=*/148}}, - ._extra5 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/149}, - .val = NondetRegLayout{._super = /*offset=*/150}}, - ._extra6 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/151}, - .val = NondetRegLayout{._super = /*offset=*/152}}, - ._extra7 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/153}, - .val = NondetRegLayout{._super = /*offset=*/154}}, - ._extra8 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/155}, - .val = NondetRegLayout{._super = /*offset=*/156}}, - ._extra9 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/157}, - .val = NondetRegLayout{._super = /*offset=*/158}}, - ._extra10 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/159}, - .val = NondetRegLayout{._super = /*offset=*/160}}, - ._extra11 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/161}, - .val = NondetRegLayout{._super = /*offset=*/162}}, - ._extra12 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/163}, - .val = NondetRegLayout{._super = /*offset=*/164}}, - ._extra13 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/165}, - .val = NondetRegLayout{._super = /*offset=*/166}}, - ._extra14 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/167}, - .val = NondetRegLayout{._super = /*offset=*/168}}, - ._extra15 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/169}, - .val = NondetRegLayout{._super = /*offset=*/170}}}; -__device__ constexpr ControlTable_SuperArm1_Super__0_SuperLayout kLayout__555 = - ControlTable_SuperArm1_Super__0_SuperLayout{ - .arg = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/139}, - .val = NondetRegLayout{._super = /*offset=*/140}}}; -__device__ constexpr ControlTable_SuperArm1_Super__0_SuperLayout kLayout__556 = - ControlTable_SuperArm1_Super__0_SuperLayout{ - .arg = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/141}, - .val = NondetRegLayout{._super = /*offset=*/142}}}; -__device__ constexpr ControlTable_SuperArm1_Super__0_SuperLayout kLayout__557 = - ControlTable_SuperArm1_Super__0_SuperLayout{ - .arg = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/143}, - .val = NondetRegLayout{._super = /*offset=*/144}}}; -__device__ constexpr ControlTable_SuperArm1_Super__0_SuperLayout kLayout__558 = - ControlTable_SuperArm1_Super__0_SuperLayout{ - .arg = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/145}, - .val = NondetRegLayout{._super = /*offset=*/146}}}; -__device__ constexpr ControlTable_SuperArm1_Super__0_SuperLayout kLayout__559 = - ControlTable_SuperArm1_Super__0_SuperLayout{ - .arg = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/147}, - .val = NondetRegLayout{._super = /*offset=*/148}}}; -__device__ constexpr ControlTable_SuperArm1_Super__0_SuperLayout kLayout__560 = - ControlTable_SuperArm1_Super__0_SuperLayout{ - .arg = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/149}, - .val = NondetRegLayout{._super = /*offset=*/150}}}; -__device__ constexpr ControlTable_SuperArm1_Super__0_SuperLayout kLayout__561 = - ControlTable_SuperArm1_Super__0_SuperLayout{ - .arg = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/151}, - .val = NondetRegLayout{._super = /*offset=*/152}}}; -__device__ constexpr ControlTable_SuperArm1_Super__0_SuperLayout kLayout__562 = - ControlTable_SuperArm1_Super__0_SuperLayout{ - .arg = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/153}, - .val = NondetRegLayout{._super = /*offset=*/154}}}; -__device__ constexpr ControlTable_SuperArm1_Super__0_SuperLayout kLayout__563 = - ControlTable_SuperArm1_Super__0_SuperLayout{ - .arg = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/155}, - .val = NondetRegLayout{._super = /*offset=*/156}}}; -__device__ constexpr ControlTable_SuperArm1_Super__0_SuperLayout kLayout__564 = - ControlTable_SuperArm1_Super__0_SuperLayout{ - .arg = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/157}, - .val = NondetRegLayout{._super = /*offset=*/158}}}; -__device__ constexpr ControlTable_SuperArm1_Super__0_SuperLayout kLayout__565 = - ControlTable_SuperArm1_Super__0_SuperLayout{ - .arg = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/159}, - .val = NondetRegLayout{._super = /*offset=*/160}}}; -__device__ constexpr ControlTable_SuperArm1_Super__0_SuperLayout kLayout__566 = - ControlTable_SuperArm1_Super__0_SuperLayout{ - .arg = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/161}, - .val = NondetRegLayout{._super = /*offset=*/162}}}; -__device__ constexpr ControlTable_SuperArm1_Super__0_SuperLayout kLayout__567 = - ControlTable_SuperArm1_Super__0_SuperLayout{ - .arg = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/163}, - .val = NondetRegLayout{._super = /*offset=*/164}}}; -__device__ constexpr ControlTable_SuperArm1_Super__0_SuperLayout kLayout__568 = - ControlTable_SuperArm1_Super__0_SuperLayout{ - .arg = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/165}, - .val = NondetRegLayout{._super = /*offset=*/166}}}; -__device__ constexpr ControlTable_SuperArm1_Super__0_SuperLayout kLayout__569 = - ControlTable_SuperArm1_Super__0_SuperLayout{ - .arg = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/167}, - .val = NondetRegLayout{._super = /*offset=*/168}}}; -__device__ constexpr ControlTable_SuperArm1_Super__0_SuperLayout kLayout__570 = - ControlTable_SuperArm1_Super__0_SuperLayout{ - .arg = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/169}, - .val = NondetRegLayout{._super = /*offset=*/170}}}; -__device__ constexpr ControlTable_SuperArm1_Super__0_SuperLayout16LayoutArray kLayout__554 = - ControlTable_SuperArm1_Super__0_SuperLayout16LayoutArray{kLayout__555, - kLayout__556, - kLayout__557, - kLayout__558, - kLayout__559, - kLayout__560, - kLayout__561, - kLayout__562, - kLayout__563, - kLayout__564, - kLayout__565, - kLayout__566, - kLayout__567, - kLayout__568, - kLayout__569, - kLayout__570}; -__device__ constexpr ControlTable_SuperArm1_SuperLayout kLayout__553 = - ControlTable_SuperArm1_SuperLayout{ - ._1 = kLayout__554, - .done = IsZeroLayout{._super = NondetRegLayout{._super = /*offset=*/171}, - .inv = NondetRegLayout{._super = /*offset=*/172}}}; -__device__ constexpr ControlTable_SuperArm1Layout kLayout__552 = ControlTable_SuperArm1Layout{ - ._super = kLayout__553, - ._extra0 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/107}, - .val = NondetRegLayout{._super = /*offset=*/108}}, - ._extra1 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/109}, - .val = NondetRegLayout{._super = /*offset=*/110}}, - ._extra2 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/111}, - .val = NondetRegLayout{._super = /*offset=*/112}}, - ._extra3 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/113}, - .val = NondetRegLayout{._super = /*offset=*/114}}, - ._extra4 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/115}, - .val = NondetRegLayout{._super = /*offset=*/116}}, - ._extra5 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/117}, - .val = NondetRegLayout{._super = /*offset=*/118}}, - ._extra6 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/119}, - .val = NondetRegLayout{._super = /*offset=*/120}}, - ._extra7 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/121}, - .val = NondetRegLayout{._super = /*offset=*/122}}, - ._extra8 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/123}, - .val = NondetRegLayout{._super = /*offset=*/124}}, - ._extra9 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/125}, - .val = NondetRegLayout{._super = /*offset=*/126}}, - ._extra10 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/127}, - .val = NondetRegLayout{._super = /*offset=*/128}}, - ._extra11 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/129}, - .val = NondetRegLayout{._super = /*offset=*/130}}, - ._extra12 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/131}, - .val = NondetRegLayout{._super = /*offset=*/132}}, - ._extra13 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/133}, - .val = NondetRegLayout{._super = /*offset=*/134}}, - ._extra14 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/135}, - .val = NondetRegLayout{._super = /*offset=*/136}}, - ._extra15 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/137}, - .val = NondetRegLayout{._super = /*offset=*/138}}}; -__device__ constexpr ControlTable_SuperLayout kLayout__532 = - ControlTable_SuperLayout{.arm0 = kLayout__533, .arm1 = kLayout__552}; -__device__ constexpr ArgU16Layout16LayoutArray kLayout__572 = - ArgU16Layout16LayoutArray{ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/107}, - .val = NondetRegLayout{._super = /*offset=*/108}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/109}, - .val = NondetRegLayout{._super = /*offset=*/110}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/111}, - .val = NondetRegLayout{._super = /*offset=*/112}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/113}, - .val = NondetRegLayout{._super = /*offset=*/114}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/115}, - .val = NondetRegLayout{._super = /*offset=*/116}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/117}, - .val = NondetRegLayout{._super = /*offset=*/118}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/119}, - .val = NondetRegLayout{._super = /*offset=*/120}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/121}, - .val = NondetRegLayout{._super = /*offset=*/122}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/123}, - .val = NondetRegLayout{._super = /*offset=*/124}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/125}, - .val = NondetRegLayout{._super = /*offset=*/126}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/127}, - .val = NondetRegLayout{._super = /*offset=*/128}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/129}, - .val = NondetRegLayout{._super = /*offset=*/130}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/131}, - .val = NondetRegLayout{._super = /*offset=*/132}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/133}, - .val = NondetRegLayout{._super = /*offset=*/134}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/135}, - .val = NondetRegLayout{._super = /*offset=*/136}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/137}, - .val = NondetRegLayout{._super = /*offset=*/138}}}; -__device__ constexpr ArgU8Layout16LayoutArray kLayout__573 = - ArgU8Layout16LayoutArray{ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/139}, - .val = NondetRegLayout{._super = /*offset=*/140}}, - ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/141}, - .val = NondetRegLayout{._super = /*offset=*/142}}, - ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/143}, - .val = NondetRegLayout{._super = /*offset=*/144}}, - ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/145}, - .val = NondetRegLayout{._super = /*offset=*/146}}, - ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/147}, - .val = NondetRegLayout{._super = /*offset=*/148}}, - ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/149}, - .val = NondetRegLayout{._super = /*offset=*/150}}, - ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/151}, - .val = NondetRegLayout{._super = /*offset=*/152}}, - ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/153}, - .val = NondetRegLayout{._super = /*offset=*/154}}, - ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/155}, - .val = NondetRegLayout{._super = /*offset=*/156}}, - ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/157}, - .val = NondetRegLayout{._super = /*offset=*/158}}, - ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/159}, - .val = NondetRegLayout{._super = /*offset=*/160}}, - ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/161}, - .val = NondetRegLayout{._super = /*offset=*/162}}, - ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/163}, - .val = NondetRegLayout{._super = /*offset=*/164}}, - ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/165}, - .val = NondetRegLayout{._super = /*offset=*/166}}, - ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/167}, - .val = NondetRegLayout{._super = /*offset=*/168}}, - ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/169}, - .val = NondetRegLayout{._super = /*offset=*/170}}}; -__device__ constexpr _Arguments_ControlTable_SuperLayout kLayout__571 = - _Arguments_ControlTable_SuperLayout{.argU16 = kLayout__572, .argU8 = kLayout__573}; -__device__ constexpr ControlTableLayout kLayout__531 = - ControlTableLayout{._super = kLayout__532, - .entry = NondetRegLayout{._super = /*offset=*/173}, - .mode = NondetRegLayout{._super = /*offset=*/174}, - ._arguments_ControlTable_Super = kLayout__571}; -__device__ constexpr Control0_SuperArm6Layout kLayout__530 = Control0_SuperArm6Layout{ - ._super = kLayout__531, - ._extra0 = kLayout__416, - ._extra1 = kLayout__417, - ._extra2 = kLayout__421, - ._extra3 = kLayout__422, - ._extra4 = kLayout__426, - ._extra5 = kLayout__427, - ._extra6 = kLayout__431, - ._extra7 = kLayout__432, - ._extra8 = kLayout__436, - ._extra9 = kLayout__437, - ._extra10 = kLayout__441, - ._extra11 = kLayout__442, - ._extra12 = kLayout__446, - ._extra13 = kLayout__447, - ._extra14 = kLayout__451, - ._extra15 = kLayout__452, - ._extra16 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/91}, - .cycle = NondetRegLayout{._super = /*offset=*/92}}, - ._extra17 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/93}, - .cycle = NondetRegLayout{._super = /*offset=*/94}}, - ._extra18 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/95}, - .cycle = NondetRegLayout{._super = /*offset=*/96}}, - ._extra19 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/97}, - .cycle = NondetRegLayout{._super = /*offset=*/98}}, - ._extra20 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/99}, - .cycle = NondetRegLayout{._super = /*offset=*/100}}, - ._extra21 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/101}, - .cycle = NondetRegLayout{._super = /*offset=*/102}}, - ._extra22 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/103}, - .cycle = NondetRegLayout{._super = /*offset=*/104}}, - ._extra23 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/105}, - .cycle = NondetRegLayout{._super = /*offset=*/106}}}; -__device__ constexpr Control0_SuperArm7Layout kLayout__574 = Control0_SuperArm7Layout{ - ._extra0 = kLayout__416, - ._extra1 = kLayout__417, - ._extra2 = kLayout__421, - ._extra3 = kLayout__422, - ._extra4 = kLayout__426, - ._extra5 = kLayout__427, - ._extra6 = kLayout__431, - ._extra7 = kLayout__432, - ._extra8 = kLayout__436, - ._extra9 = kLayout__437, - ._extra10 = kLayout__441, - ._extra11 = kLayout__442, - ._extra12 = kLayout__446, - ._extra13 = kLayout__447, - ._extra14 = kLayout__451, - ._extra15 = kLayout__452, - ._extra16 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/91}, - .cycle = NondetRegLayout{._super = /*offset=*/92}}, - ._extra17 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/93}, - .cycle = NondetRegLayout{._super = /*offset=*/94}}, - ._extra18 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/95}, - .cycle = NondetRegLayout{._super = /*offset=*/96}}, - ._extra19 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/97}, - .cycle = NondetRegLayout{._super = /*offset=*/98}}, - ._extra20 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/99}, - .cycle = NondetRegLayout{._super = /*offset=*/100}}, - ._extra21 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/101}, - .cycle = NondetRegLayout{._super = /*offset=*/102}}, - ._extra22 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/103}, - .cycle = NondetRegLayout{._super = /*offset=*/104}}, - ._extra23 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/105}, - .cycle = NondetRegLayout{._super = /*offset=*/106}}, - ._extra24 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/107}, - .val = NondetRegLayout{._super = /*offset=*/108}}, - ._extra25 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/109}, - .val = NondetRegLayout{._super = /*offset=*/110}}, - ._extra26 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/111}, - .val = NondetRegLayout{._super = /*offset=*/112}}, - ._extra27 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/113}, - .val = NondetRegLayout{._super = /*offset=*/114}}, - ._extra28 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/115}, - .val = NondetRegLayout{._super = /*offset=*/116}}, - ._extra29 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/117}, - .val = NondetRegLayout{._super = /*offset=*/118}}, - ._extra30 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/119}, - .val = NondetRegLayout{._super = /*offset=*/120}}, - ._extra31 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/121}, - .val = NondetRegLayout{._super = /*offset=*/122}}, - ._extra32 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/123}, - .val = NondetRegLayout{._super = /*offset=*/124}}, - ._extra33 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/125}, - .val = NondetRegLayout{._super = /*offset=*/126}}, - ._extra34 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/127}, - .val = NondetRegLayout{._super = /*offset=*/128}}, - ._extra35 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/129}, - .val = NondetRegLayout{._super = /*offset=*/130}}, - ._extra36 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/131}, - .val = NondetRegLayout{._super = /*offset=*/132}}, - ._extra37 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/133}, - .val = NondetRegLayout{._super = /*offset=*/134}}, - ._extra38 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/135}, - .val = NondetRegLayout{._super = /*offset=*/136}}, - ._extra39 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/137}, - .val = NondetRegLayout{._super = /*offset=*/138}}, - ._extra40 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/139}, - .val = NondetRegLayout{._super = /*offset=*/140}}, - ._extra41 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/141}, - .val = NondetRegLayout{._super = /*offset=*/142}}, - ._extra42 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/143}, - .val = NondetRegLayout{._super = /*offset=*/144}}, - ._extra43 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/145}, - .val = NondetRegLayout{._super = /*offset=*/146}}, - ._extra44 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/147}, - .val = NondetRegLayout{._super = /*offset=*/148}}, - ._extra45 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/149}, - .val = NondetRegLayout{._super = /*offset=*/150}}, - ._extra46 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/151}, - .val = NondetRegLayout{._super = /*offset=*/152}}, - ._extra47 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/153}, - .val = NondetRegLayout{._super = /*offset=*/154}}, - ._extra48 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/155}, - .val = NondetRegLayout{._super = /*offset=*/156}}, - ._extra49 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/157}, - .val = NondetRegLayout{._super = /*offset=*/158}}, - ._extra50 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/159}, - .val = NondetRegLayout{._super = /*offset=*/160}}, - ._extra51 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/161}, - .val = NondetRegLayout{._super = /*offset=*/162}}, - ._extra52 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/163}, - .val = NondetRegLayout{._super = /*offset=*/164}}, - ._extra53 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/165}, - .val = NondetRegLayout{._super = /*offset=*/166}}, - ._extra54 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/167}, - .val = NondetRegLayout{._super = /*offset=*/168}}, - ._extra55 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/169}, - .val = NondetRegLayout{._super = /*offset=*/170}}}; -__device__ constexpr Control0_SuperLayout kLayout__409 = Control0_SuperLayout{.arm0 = kLayout__410, - .arm1 = kLayout__453, - .arm2 = kLayout__493, - .arm3 = kLayout__502, - .arm4 = kLayout__506, - .arm5 = kLayout__519, - .arm6 = kLayout__530, - .arm7 = kLayout__574}; -__device__ constexpr _Arguments_Control0_SuperLayout kLayout__575 = - _Arguments_Control0_SuperLayout{.memoryArg = kLayout__491, - .cycleArg = kLayout__492, - .argU16 = kLayout__572, - .argU8 = kLayout__573}; -__device__ constexpr Control0Layout kLayout__408 = - Control0Layout{._super = kLayout__409, - .arg = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/178}, - .cycle = NondetRegLayout{._super = /*offset=*/0}}, - ._arguments_Control0_Super = kLayout__575}; -__device__ constexpr NondetU16RegLayout kLayout__579 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/76}, - .val = NondetRegLayout{._super = /*offset=*/77}}}; -__device__ constexpr U16RegLayout kLayout__578 = U16RegLayout{.ret = kLayout__579}; -__device__ constexpr AddrDecomposeBitsLayout kLayout__577 = - AddrDecomposeBitsLayout{.low0 = NondetRegLayout{._super = /*offset=*/74}, - .low1 = NondetRegLayout{._super = /*offset=*/75}, - .upperDiff = kLayout__578, - ._0 = IsZeroLayout{._super = NondetRegLayout{._super = /*offset=*/78}, - .inv = NondetRegLayout{._super = /*offset=*/79}}, - .med14 = kLayout__27}; -__device__ constexpr MemoryArgLayout8LayoutArray kLayout__581 = - MemoryArgLayout8LayoutArray{kLayout__416, - kLayout__417, - kLayout__421, - kLayout__422, - kLayout__426, - kLayout__427, - kLayout__431, - kLayout__432}; -__device__ constexpr CycleArgLayout4LayoutArray kLayout__582 = - CycleArgLayout4LayoutArray{CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/59}, - .cycle = NondetRegLayout{._super = /*offset=*/60}}, - CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/61}, - .cycle = NondetRegLayout{._super = /*offset=*/62}}, - CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/63}, - .cycle = NondetRegLayout{._super = /*offset=*/64}}, - CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/65}, - .cycle = NondetRegLayout{._super = /*offset=*/66}}}; -__device__ constexpr ArgU16Layout2LayoutArray kLayout__583 = - ArgU16Layout2LayoutArray{ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/67}, - .val = NondetRegLayout{._super = /*offset=*/68}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/69}, - .val = NondetRegLayout{._super = /*offset=*/70}}}; -__device__ constexpr _Arguments_ECall0OutputLayout kLayout__580 = _Arguments_ECall0OutputLayout{ - .memoryArg = kLayout__581, .cycleArg = kLayout__582, .argU16 = kLayout__583}; -__device__ constexpr IsCycleLayout kLayout__589 = - IsCycleLayout{.arg = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/59}, - .cycle = NondetRegLayout{._super = /*offset=*/60}}}; -__device__ constexpr IsForwardLayout kLayout__588 = IsForwardLayout{._0 = kLayout__589}; -__device__ constexpr MemoryReadLayout kLayout__587 = - MemoryReadLayout{.io = kLayout__415, ._0 = kLayout__588}; -__device__ constexpr IsCycleLayout kLayout__592 = - IsCycleLayout{.arg = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/61}, - .cycle = NondetRegLayout{._super = /*offset=*/62}}}; -__device__ constexpr IsForwardLayout kLayout__591 = IsForwardLayout{._0 = kLayout__592}; -__device__ constexpr MemoryReadLayout kLayout__590 = - MemoryReadLayout{.io = kLayout__420, ._0 = kLayout__591}; -__device__ constexpr NondetRegLayout4LayoutArray kLayout__594 = - NondetRegLayout4LayoutArray{NondetRegLayout{._super = /*offset=*/82}, - NondetRegLayout{._super = /*offset=*/83}, - NondetRegLayout{._super = /*offset=*/84}, - NondetRegLayout{._super = /*offset=*/85}}; -__device__ constexpr OneHot_4_Layout kLayout__593 = OneHot_4_Layout{._super = kLayout__594}; -__device__ constexpr MachineECallLayout kLayout__586 = MachineECallLayout{ - .loadInst = kLayout__587, .dispatchIdx = kLayout__590, .dispatch = kLayout__593}; -__device__ constexpr ECall0OutputArm0Layout kLayout__585 = ECall0OutputArm0Layout{ - ._super = kLayout__586, - ._extra0 = kLayout__426, - ._extra1 = kLayout__427, - ._extra2 = kLayout__431, - ._extra3 = kLayout__432, - ._extra4 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/63}, - .cycle = NondetRegLayout{._super = /*offset=*/64}}, - ._extra5 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/65}, - .cycle = NondetRegLayout{._super = /*offset=*/66}}, - ._extra6 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/67}, - .val = NondetRegLayout{._super = /*offset=*/68}}, - ._extra7 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/69}, - .val = NondetRegLayout{._super = /*offset=*/70}}}; -__device__ constexpr ECallTerminateLayout kLayout__596 = - ECallTerminateLayout{.a0 = kLayout__587, .a1 = kLayout__590}; -__device__ constexpr ECall0OutputArm1Layout kLayout__595 = ECall0OutputArm1Layout{ - ._super = kLayout__596, - ._extra0 = kLayout__426, - ._extra1 = kLayout__427, - ._extra2 = kLayout__431, - ._extra3 = kLayout__432, - ._extra4 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/63}, - .cycle = NondetRegLayout{._super = /*offset=*/64}}, - ._extra5 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/65}, - .cycle = NondetRegLayout{._super = /*offset=*/66}}, - ._extra6 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/67}, - .val = NondetRegLayout{._super = /*offset=*/68}}, - ._extra7 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/69}, - .val = NondetRegLayout{._super = /*offset=*/70}}}; -__device__ constexpr IsCycleLayout kLayout__600 = - IsCycleLayout{.arg = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/63}, - .cycle = NondetRegLayout{._super = /*offset=*/64}}}; -__device__ constexpr IsForwardLayout kLayout__599 = IsForwardLayout{._0 = kLayout__600}; -__device__ constexpr MemoryReadLayout kLayout__598 = - MemoryReadLayout{.io = kLayout__425, ._0 = kLayout__599}; -__device__ constexpr NondetU16RegLayout kLayout__601 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/67}, - .val = NondetRegLayout{._super = /*offset=*/68}}}; -__device__ constexpr NondetU16RegLayout kLayout__603 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/69}, - .val = NondetRegLayout{._super = /*offset=*/70}}}; -__device__ constexpr U16RegLayout kLayout__602 = U16RegLayout{.ret = kLayout__603}; -__device__ constexpr MemoryWriteLayout kLayout__604 = - MemoryWriteLayout{.io = kLayout__430, ._0 = kLayout__301}; -__device__ constexpr NondetRegLayout4LayoutArray kLayout__607 = - NondetRegLayout4LayoutArray{NondetRegLayout{._super = /*offset=*/84}, - NondetRegLayout{._super = /*offset=*/85}, - NondetRegLayout{._super = /*offset=*/86}, - NondetRegLayout{._super = /*offset=*/87}}; -__device__ constexpr OneHot_4_Layout kLayout__606 = OneHot_4_Layout{._super = kLayout__607}; -__device__ constexpr DecomposeLow2Layout kLayout__605 = - DecomposeLow2Layout{.high = NondetRegLayout{._super = /*offset=*/82}, - .low2 = NondetRegLayout{._super = /*offset=*/83}, - .low2Hot = kLayout__606, - .highZero = IsZeroLayout{._super = NondetRegLayout{._super = /*offset=*/88}, - .inv = NondetRegLayout{._super = /*offset=*/89}}, - .isZero = NondetRegLayout{._super = /*offset=*/90}}; -__device__ constexpr NondetRegLayout4LayoutArray kLayout__610 = - NondetRegLayout4LayoutArray{NondetRegLayout{._super = /*offset=*/93}, - NondetRegLayout{._super = /*offset=*/94}, - NondetRegLayout{._super = /*offset=*/95}, - NondetRegLayout{._super = /*offset=*/96}}; -__device__ constexpr OneHot_4_Layout kLayout__609 = OneHot_4_Layout{._super = kLayout__610}; -__device__ constexpr DecomposeLow2Layout kLayout__608 = - DecomposeLow2Layout{.high = NondetRegLayout{._super = /*offset=*/91}, - .low2 = NondetRegLayout{._super = /*offset=*/92}, - .low2Hot = kLayout__609, - .highZero = IsZeroLayout{._super = NondetRegLayout{._super = /*offset=*/97}, - .inv = NondetRegLayout{._super = /*offset=*/98}}, - .isZero = NondetRegLayout{._super = /*offset=*/99}}; -__device__ constexpr ECallHostReadSetupLayout kLayout__597 = - ECallHostReadSetupLayout{.fd = kLayout__587, - .ptr = kLayout__590, - .len = kLayout__598, - .newLen = kLayout__601, - .diff = kLayout__602, - ._0 = kLayout__604, - .ptrDecomp = kLayout__605, - .lenDecomp = kLayout__608, - .len123 = NondetRegLayout{._super = /*offset=*/100}, - .uneven = NondetRegLayout{._super = /*offset=*/101}}; -__device__ constexpr ECallHostWriteLayout kLayout__611 = - ECallHostWriteLayout{.fd = kLayout__587, - .ptr = kLayout__590, - .len = kLayout__598, - .newLen = kLayout__601, - .diff = kLayout__602, - ._0 = kLayout__604}; -__device__ constexpr ECall0OutputArm4Layout kLayout__612 = ECall0OutputArm4Layout{ - ._extra0 = kLayout__416, - ._extra1 = kLayout__417, - ._extra2 = kLayout__421, - ._extra3 = kLayout__422, - ._extra4 = kLayout__426, - ._extra5 = kLayout__427, - ._extra6 = kLayout__431, - ._extra7 = kLayout__432, - ._extra8 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/59}, - .cycle = NondetRegLayout{._super = /*offset=*/60}}, - ._extra9 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/61}, - .cycle = NondetRegLayout{._super = /*offset=*/62}}, - ._extra10 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/63}, - .cycle = NondetRegLayout{._super = /*offset=*/64}}, - ._extra11 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/65}, - .cycle = NondetRegLayout{._super = /*offset=*/66}}, - ._extra12 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/67}, - .val = NondetRegLayout{._super = /*offset=*/68}}, - ._extra13 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/69}, - .val = NondetRegLayout{._super = /*offset=*/70}}}; -__device__ constexpr MemoryWriteUnconstrainedLayout kLayout__617 = - MemoryWriteUnconstrainedLayout{.io = kLayout__415, ._0 = kLayout__588}; -__device__ constexpr ECallHostReadWords__0_SuperLayout kLayout__616 = - ECallHostReadWords__0_SuperLayout{.addr = NondetRegLayout{._super = /*offset=*/100}, - ._0 = kLayout__617}; -__device__ constexpr MemoryWriteUnconstrainedLayout kLayout__619 = - MemoryWriteUnconstrainedLayout{.io = kLayout__420, ._0 = kLayout__591}; -__device__ constexpr ECallHostReadWords__0_SuperLayout kLayout__618 = - ECallHostReadWords__0_SuperLayout{.addr = NondetRegLayout{._super = /*offset=*/101}, - ._0 = kLayout__619}; -__device__ constexpr MemoryWriteUnconstrainedLayout kLayout__621 = - MemoryWriteUnconstrainedLayout{.io = kLayout__425, ._0 = kLayout__599}; -__device__ constexpr ECallHostReadWords__0_SuperLayout kLayout__620 = - ECallHostReadWords__0_SuperLayout{.addr = NondetRegLayout{._super = /*offset=*/102}, - ._0 = kLayout__621}; -__device__ constexpr MemoryWriteUnconstrainedLayout kLayout__623 = - MemoryWriteUnconstrainedLayout{.io = kLayout__430, ._0 = kLayout__301}; -__device__ constexpr ECallHostReadWords__0_SuperLayout kLayout__622 = - ECallHostReadWords__0_SuperLayout{.addr = NondetRegLayout{._super = /*offset=*/103}, - ._0 = kLayout__623}; -__device__ constexpr ECallHostReadWords__0_SuperLayout4LayoutArray kLayout__615 = - ECallHostReadWords__0_SuperLayout4LayoutArray{ - kLayout__616, kLayout__618, kLayout__620, kLayout__622}; -__device__ constexpr ECallHostReadWordsLayout kLayout__614 = ECallHostReadWordsLayout{ - .lenDecomp = kLayout__605, - .wordsDecomp = kLayout__608, - ._1 = kLayout__615, - .lenZero = IsZeroLayout{._super = NondetRegLayout{._super = /*offset=*/104}, - .inv = NondetRegLayout{._super = /*offset=*/105}}}; -__device__ constexpr ECall0OutputArm5Layout kLayout__613 = ECall0OutputArm5Layout{ - ._super = kLayout__614, - ._extra0 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/67}, - .val = NondetRegLayout{._super = /*offset=*/68}}, - ._extra1 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/69}, - .val = NondetRegLayout{._super = /*offset=*/70}}}; -__device__ constexpr ECall0OutputArm6Layout kLayout__624 = ECall0OutputArm6Layout{ - ._extra0 = kLayout__416, - ._extra1 = kLayout__417, - ._extra2 = kLayout__421, - ._extra3 = kLayout__422, - ._extra4 = kLayout__426, - ._extra5 = kLayout__427, - ._extra6 = kLayout__431, - ._extra7 = kLayout__432, - ._extra8 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/59}, - .cycle = NondetRegLayout{._super = /*offset=*/60}}, - ._extra9 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/61}, - .cycle = NondetRegLayout{._super = /*offset=*/62}}, - ._extra10 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/63}, - .cycle = NondetRegLayout{._super = /*offset=*/64}}, - ._extra11 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/65}, - .cycle = NondetRegLayout{._super = /*offset=*/66}}, - ._extra12 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/67}, - .val = NondetRegLayout{._super = /*offset=*/68}}, - ._extra13 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/69}, - .val = NondetRegLayout{._super = /*offset=*/70}}}; -__device__ constexpr ECall0OutputArm7Layout kLayout__625 = ECall0OutputArm7Layout{ - ._extra0 = kLayout__416, - ._extra1 = kLayout__417, - ._extra2 = kLayout__421, - ._extra3 = kLayout__422, - ._extra4 = kLayout__426, - ._extra5 = kLayout__427, - ._extra6 = kLayout__431, - ._extra7 = kLayout__432, - ._extra8 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/59}, - .cycle = NondetRegLayout{._super = /*offset=*/60}}, - ._extra9 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/61}, - .cycle = NondetRegLayout{._super = /*offset=*/62}}, - ._extra10 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/63}, - .cycle = NondetRegLayout{._super = /*offset=*/64}}, - ._extra11 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/65}, - .cycle = NondetRegLayout{._super = /*offset=*/66}}, - ._extra12 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/67}, - .val = NondetRegLayout{._super = /*offset=*/68}}, - ._extra13 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/69}, - .val = NondetRegLayout{._super = /*offset=*/70}}}; -__device__ constexpr ECall0OutputLayout kLayout__584 = ECall0OutputLayout{.arm0 = kLayout__585, - .arm1 = kLayout__595, - .arm2 = kLayout__597, - .arm3 = kLayout__611, - .arm4 = kLayout__612, - .arm5 = kLayout__613, - .arm6 = kLayout__624, - .arm7 = kLayout__625}; -__device__ constexpr NondetU16RegLayout kLayout__627 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/110}, - .val = NondetRegLayout{._super = /*offset=*/111}}}; -__device__ constexpr NormalizeU32Layout kLayout__626 = - NormalizeU32Layout{.low16 = kLayout__627, - .lowCarry = NondetRegLayout{._super = /*offset=*/112}, - .high16 = kLayout__505, - .highCarry = NondetRegLayout{._super = /*offset=*/115}}; -__device__ constexpr ECall0Layout kLayout__576 = - ECall0Layout{.s0 = NondetRegLayout{._super = /*offset=*/71}, - .s1 = NondetRegLayout{._super = /*offset=*/72}, - .s2 = NondetRegLayout{._super = /*offset=*/73}, - .pcAddr = kLayout__577, - ._arguments_ECall0Output = kLayout__580, - .output = kLayout__584, - .isDecode = IsZeroLayout{._super = NondetRegLayout{._super = /*offset=*/106}, - .inv = NondetRegLayout{._super = /*offset=*/107}}, - .isP2Entry = IsZeroLayout{._super = NondetRegLayout{._super = /*offset=*/108}, - .inv = NondetRegLayout{._super = /*offset=*/109}}, - .addPC = kLayout__626, - .arg = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/116}, - .cycle = NondetRegLayout{._super = /*offset=*/0}}}; -__device__ constexpr NondetRegLayout24LayoutArray kLayout__630 = NondetRegLayout24LayoutArray{ - NondetRegLayout{._super = /*offset=*/38}, NondetRegLayout{._super = /*offset=*/39}, - NondetRegLayout{._super = /*offset=*/40}, NondetRegLayout{._super = /*offset=*/41}, - NondetRegLayout{._super = /*offset=*/42}, NondetRegLayout{._super = /*offset=*/43}, - NondetRegLayout{._super = /*offset=*/44}, NondetRegLayout{._super = /*offset=*/45}, - NondetRegLayout{._super = /*offset=*/46}, NondetRegLayout{._super = /*offset=*/47}, - NondetRegLayout{._super = /*offset=*/48}, NondetRegLayout{._super = /*offset=*/49}, - NondetRegLayout{._super = /*offset=*/50}, NondetRegLayout{._super = /*offset=*/51}, - NondetRegLayout{._super = /*offset=*/52}, NondetRegLayout{._super = /*offset=*/53}, - NondetRegLayout{._super = /*offset=*/54}, NondetRegLayout{._super = /*offset=*/55}, - NondetRegLayout{._super = /*offset=*/56}, NondetRegLayout{._super = /*offset=*/57}, - NondetRegLayout{._super = /*offset=*/58}, NondetRegLayout{._super = /*offset=*/59}, - NondetRegLayout{._super = /*offset=*/60}, NondetRegLayout{._super = /*offset=*/61}}; -__device__ constexpr PoseidonStateLayout kLayout__629 = - PoseidonStateLayout{.hasState = NondetRegLayout{._super = /*offset=*/27}, - .stateAddr = NondetRegLayout{._super = /*offset=*/28}, - .bufOutAddr = NondetRegLayout{._super = /*offset=*/29}, - .isElem = NondetRegLayout{._super = /*offset=*/30}, - .checkOut = NondetRegLayout{._super = /*offset=*/31}, - .loadTxType = NondetRegLayout{._super = /*offset=*/32}, - .nextState = NondetRegLayout{._super = /*offset=*/33}, - .subState = NondetRegLayout{._super = /*offset=*/34}, - .bufInAddr = NondetRegLayout{._super = /*offset=*/35}, - .count = NondetRegLayout{._super = /*offset=*/36}, - .mode = NondetRegLayout{._super = /*offset=*/37}, - .inner = kLayout__630, - .zcheck = NondetExtRegLayout{._super = /*offset=*/62}}; -__device__ constexpr MemoryArgLayout kLayout__633 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/66}, - .addr = NondetRegLayout{._super = /*offset=*/67}, - .cycle = NondetRegLayout{._super = /*offset=*/68}, - .dataLow = NondetRegLayout{._super = /*offset=*/69}, - .dataHigh = NondetRegLayout{._super = /*offset=*/70}}; -__device__ constexpr MemoryArgLayout kLayout__634 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/71}, - .addr = NondetRegLayout{._super = /*offset=*/67}, - .cycle = NondetRegLayout{._super = /*offset=*/0}, - .dataLow = NondetRegLayout{._super = /*offset=*/72}, - .dataHigh = NondetRegLayout{._super = /*offset=*/73}}; -__device__ constexpr MemoryArgLayout kLayout__635 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/74}, - .addr = NondetRegLayout{._super = /*offset=*/75}, - .cycle = NondetRegLayout{._super = /*offset=*/76}, - .dataLow = NondetRegLayout{._super = /*offset=*/77}, - .dataHigh = NondetRegLayout{._super = /*offset=*/78}}; -__device__ constexpr MemoryArgLayout kLayout__636 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/79}, - .addr = NondetRegLayout{._super = /*offset=*/75}, - .cycle = NondetRegLayout{._super = /*offset=*/0}, - .dataLow = NondetRegLayout{._super = /*offset=*/80}, - .dataHigh = NondetRegLayout{._super = /*offset=*/81}}; -__device__ constexpr MemoryArgLayout kLayout__637 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/82}, - .addr = NondetRegLayout{._super = /*offset=*/83}, - .cycle = NondetRegLayout{._super = /*offset=*/84}, - .dataLow = NondetRegLayout{._super = /*offset=*/85}, - .dataHigh = NondetRegLayout{._super = /*offset=*/86}}; -__device__ constexpr MemoryArgLayout kLayout__638 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/87}, - .addr = NondetRegLayout{._super = /*offset=*/83}, - .cycle = NondetRegLayout{._super = /*offset=*/0}, - .dataLow = NondetRegLayout{._super = /*offset=*/88}, - .dataHigh = NondetRegLayout{._super = /*offset=*/89}}; -__device__ constexpr MemoryArgLayout kLayout__639 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/90}, - .addr = NondetRegLayout{._super = /*offset=*/91}, - .cycle = NondetRegLayout{._super = /*offset=*/92}, - .dataLow = NondetRegLayout{._super = /*offset=*/93}, - .dataHigh = NondetRegLayout{._super = /*offset=*/94}}; -__device__ constexpr MemoryArgLayout kLayout__640 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/95}, - .addr = NondetRegLayout{._super = /*offset=*/91}, - .cycle = NondetRegLayout{._super = /*offset=*/0}, - .dataLow = NondetRegLayout{._super = /*offset=*/96}, - .dataHigh = NondetRegLayout{._super = /*offset=*/97}}; -__device__ constexpr MemoryArgLayout kLayout__641 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/98}, - .addr = NondetRegLayout{._super = /*offset=*/99}, - .cycle = NondetRegLayout{._super = /*offset=*/100}, - .dataLow = NondetRegLayout{._super = /*offset=*/101}, - .dataHigh = NondetRegLayout{._super = /*offset=*/102}}; -__device__ constexpr MemoryArgLayout kLayout__642 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/103}, - .addr = NondetRegLayout{._super = /*offset=*/99}, - .cycle = NondetRegLayout{._super = /*offset=*/0}, - .dataLow = NondetRegLayout{._super = /*offset=*/104}, - .dataHigh = NondetRegLayout{._super = /*offset=*/105}}; -__device__ constexpr MemoryArgLayout kLayout__643 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/106}, - .addr = NondetRegLayout{._super = /*offset=*/107}, - .cycle = NondetRegLayout{._super = /*offset=*/108}, - .dataLow = NondetRegLayout{._super = /*offset=*/109}, - .dataHigh = NondetRegLayout{._super = /*offset=*/110}}; -__device__ constexpr MemoryArgLayout kLayout__644 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/111}, - .addr = NondetRegLayout{._super = /*offset=*/107}, - .cycle = NondetRegLayout{._super = /*offset=*/0}, - .dataLow = NondetRegLayout{._super = /*offset=*/112}, - .dataHigh = NondetRegLayout{._super = /*offset=*/113}}; -__device__ constexpr MemoryArgLayout kLayout__645 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/114}, - .addr = NondetRegLayout{._super = /*offset=*/115}, - .cycle = NondetRegLayout{._super = /*offset=*/116}, - .dataLow = NondetRegLayout{._super = /*offset=*/117}, - .dataHigh = NondetRegLayout{._super = /*offset=*/118}}; -__device__ constexpr MemoryArgLayout kLayout__646 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/119}, - .addr = NondetRegLayout{._super = /*offset=*/115}, - .cycle = NondetRegLayout{._super = /*offset=*/0}, - .dataLow = NondetRegLayout{._super = /*offset=*/120}, - .dataHigh = NondetRegLayout{._super = /*offset=*/121}}; -__device__ constexpr MemoryArgLayout kLayout__647 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/122}, - .addr = NondetRegLayout{._super = /*offset=*/123}, - .cycle = NondetRegLayout{._super = /*offset=*/124}, - .dataLow = NondetRegLayout{._super = /*offset=*/125}, - .dataHigh = NondetRegLayout{._super = /*offset=*/126}}; -__device__ constexpr MemoryArgLayout kLayout__648 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/127}, - .addr = NondetRegLayout{._super = /*offset=*/123}, - .cycle = NondetRegLayout{._super = /*offset=*/0}, - .dataLow = NondetRegLayout{._super = /*offset=*/128}, - .dataHigh = NondetRegLayout{._super = /*offset=*/129}}; -__device__ constexpr MemoryArgLayout16LayoutArray kLayout__632 = - MemoryArgLayout16LayoutArray{kLayout__633, - kLayout__634, - kLayout__635, - kLayout__636, - kLayout__637, - kLayout__638, - kLayout__639, - kLayout__640, - kLayout__641, - kLayout__642, - kLayout__643, - kLayout__644, - kLayout__645, - kLayout__646, - kLayout__647, - kLayout__648}; -__device__ constexpr CycleArgLayout8LayoutArray kLayout__649 = - CycleArgLayout8LayoutArray{CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/130}, - .cycle = NondetRegLayout{._super = /*offset=*/131}}, - CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/132}, - .cycle = NondetRegLayout{._super = /*offset=*/133}}, - CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/134}, - .cycle = NondetRegLayout{._super = /*offset=*/135}}, - CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/136}, - .cycle = NondetRegLayout{._super = /*offset=*/137}}, - CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/138}, - .cycle = NondetRegLayout{._super = /*offset=*/139}}, - CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/140}, - .cycle = NondetRegLayout{._super = /*offset=*/141}}, - CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/142}, - .cycle = NondetRegLayout{._super = /*offset=*/143}}, - CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/144}, - .cycle = NondetRegLayout{._super = /*offset=*/145}}}; -__device__ constexpr ArgU16Layout16LayoutArray kLayout__650 = - ArgU16Layout16LayoutArray{ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/146}, - .val = NondetRegLayout{._super = /*offset=*/147}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/148}, - .val = NondetRegLayout{._super = /*offset=*/149}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/150}, - .val = NondetRegLayout{._super = /*offset=*/151}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/152}, - .val = NondetRegLayout{._super = /*offset=*/153}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/154}, - .val = NondetRegLayout{._super = /*offset=*/155}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/156}, - .val = NondetRegLayout{._super = /*offset=*/157}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/158}, - .val = NondetRegLayout{._super = /*offset=*/159}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/160}, - .val = NondetRegLayout{._super = /*offset=*/161}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/162}, - .val = NondetRegLayout{._super = /*offset=*/163}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/164}, - .val = NondetRegLayout{._super = /*offset=*/165}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/166}, - .val = NondetRegLayout{._super = /*offset=*/167}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/168}, - .val = NondetRegLayout{._super = /*offset=*/169}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/170}, - .val = NondetRegLayout{._super = /*offset=*/171}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/172}, - .val = NondetRegLayout{._super = /*offset=*/173}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/174}, - .val = NondetRegLayout{._super = /*offset=*/175}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/176}, - .val = NondetRegLayout{._super = /*offset=*/177}}}; -__device__ constexpr ArgU8Layout2LayoutArray kLayout__651 = - ArgU8Layout2LayoutArray{ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/178}, - .val = NondetRegLayout{._super = /*offset=*/179}}, - ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/180}, - .val = NondetRegLayout{._super = /*offset=*/181}}}; -__device__ constexpr _Arguments_Poseidon0StateLayout kLayout__631 = - _Arguments_Poseidon0StateLayout{.memoryArg = kLayout__632, - .cycleArg = kLayout__649, - .argU16 = kLayout__650, - .argU8 = kLayout__651}; -__device__ constexpr PoseidonEntry_SuperArm0Layout kLayout__656 = PoseidonEntry_SuperArm0Layout{ - ._super = kLayout__629, - ._extra0 = kLayout__633, - ._extra1 = kLayout__634, - ._extra2 = kLayout__635, - ._extra3 = kLayout__636, - ._extra4 = kLayout__637, - ._extra5 = kLayout__638, - ._extra6 = kLayout__639, - ._extra7 = kLayout__640, - ._extra8 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/130}, - .cycle = NondetRegLayout{._super = /*offset=*/131}}, - ._extra9 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/132}, - .cycle = NondetRegLayout{._super = /*offset=*/133}}, - ._extra10 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/134}, - .cycle = NondetRegLayout{._super = /*offset=*/135}}, - ._extra11 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/136}, - .cycle = NondetRegLayout{._super = /*offset=*/137}}}; -__device__ constexpr MemoryIOLayout kLayout__660 = - MemoryIOLayout{.oldTxn = kLayout__633, .newTxn = kLayout__634}; -__device__ constexpr IsCycleLayout kLayout__662 = - IsCycleLayout{.arg = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/130}, - .cycle = NondetRegLayout{._super = /*offset=*/131}}}; -__device__ constexpr IsForwardLayout kLayout__661 = IsForwardLayout{._0 = kLayout__662}; -__device__ constexpr MemoryReadLayout kLayout__659 = - MemoryReadLayout{.io = kLayout__660, ._0 = kLayout__661}; -__device__ constexpr ReadAddrLayout kLayout__658 = ReadAddrLayout{.addr32 = kLayout__659}; -__device__ constexpr MemoryIOLayout kLayout__665 = - MemoryIOLayout{.oldTxn = kLayout__635, .newTxn = kLayout__636}; -__device__ constexpr IsCycleLayout kLayout__667 = - IsCycleLayout{.arg = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/132}, - .cycle = NondetRegLayout{._super = /*offset=*/133}}}; -__device__ constexpr IsForwardLayout kLayout__666 = IsForwardLayout{._0 = kLayout__667}; -__device__ constexpr MemoryReadLayout kLayout__664 = - MemoryReadLayout{.io = kLayout__665, ._0 = kLayout__666}; -__device__ constexpr ReadAddrLayout kLayout__663 = ReadAddrLayout{.addr32 = kLayout__664}; -__device__ constexpr MemoryIOLayout kLayout__670 = - MemoryIOLayout{.oldTxn = kLayout__637, .newTxn = kLayout__638}; -__device__ constexpr IsCycleLayout kLayout__672 = - IsCycleLayout{.arg = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/134}, - .cycle = NondetRegLayout{._super = /*offset=*/135}}}; -__device__ constexpr IsForwardLayout kLayout__671 = IsForwardLayout{._0 = kLayout__672}; -__device__ constexpr MemoryReadLayout kLayout__669 = - MemoryReadLayout{.io = kLayout__670, ._0 = kLayout__671}; -__device__ constexpr ReadAddrLayout kLayout__668 = ReadAddrLayout{.addr32 = kLayout__669}; -__device__ constexpr MemoryIOLayout kLayout__674 = - MemoryIOLayout{.oldTxn = kLayout__639, .newTxn = kLayout__640}; -__device__ constexpr IsCycleLayout kLayout__676 = - IsCycleLayout{.arg = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/136}, - .cycle = NondetRegLayout{._super = /*offset=*/137}}}; -__device__ constexpr IsForwardLayout kLayout__675 = IsForwardLayout{._0 = kLayout__676}; -__device__ constexpr MemoryReadLayout kLayout__673 = - MemoryReadLayout{.io = kLayout__674, ._0 = kLayout__675}; -__device__ constexpr PoseidonEcallLayout kLayout__657 = PoseidonEcallLayout{ - ._super = kLayout__629, - .stateAddr = kLayout__658, - .bufInAddr = kLayout__663, - .bufOutAddr = kLayout__668, - .bitsAndCount = kLayout__673, - ._0 = IsZeroLayout{._super = NondetRegLayout{._super = /*offset=*/182}, - .inv = NondetRegLayout{._super = /*offset=*/183}}, - .isElem = NondetRegLayout{._super = /*offset=*/184}, - .checkOut = NondetRegLayout{._super = /*offset=*/185}, - .countZero = IsZeroLayout{._super = NondetRegLayout{._super = /*offset=*/186}, - .inv = NondetRegLayout{._super = /*offset=*/187}}}; -__device__ constexpr PoseidonEntry_SuperLayout kLayout__655 = - PoseidonEntry_SuperLayout{._super = kLayout__629, .arm0 = kLayout__656, .arm1 = kLayout__657}; -__device__ constexpr MemoryArgLayout8LayoutArray kLayout__678 = - MemoryArgLayout8LayoutArray{kLayout__633, - kLayout__634, - kLayout__635, - kLayout__636, - kLayout__637, - kLayout__638, - kLayout__639, - kLayout__640}; -__device__ constexpr CycleArgLayout4LayoutArray kLayout__679 = - CycleArgLayout4LayoutArray{CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/130}, - .cycle = NondetRegLayout{._super = /*offset=*/131}}, - CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/132}, - .cycle = NondetRegLayout{._super = /*offset=*/133}}, - CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/134}, - .cycle = NondetRegLayout{._super = /*offset=*/135}}, - CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/136}, - .cycle = NondetRegLayout{._super = /*offset=*/137}}}; -__device__ constexpr _Arguments_PoseidonEntry_SuperLayout kLayout__677 = - _Arguments_PoseidonEntry_SuperLayout{.memoryArg = kLayout__678, .cycleArg = kLayout__679}; -__device__ constexpr PoseidonEntryLayout kLayout__654 = - PoseidonEntryLayout{._super = kLayout__655, - .pcZero = IsZeroLayout{._super = NondetRegLayout{._super = /*offset=*/188}, - .inv = NondetRegLayout{._super = /*offset=*/189}}, - ._arguments_PoseidonEntry_Super = kLayout__677}; -__device__ constexpr Poseidon0StateArm0Layout kLayout__653 = Poseidon0StateArm0Layout{ - ._super = kLayout__654, - ._extra0 = kLayout__641, - ._extra1 = kLayout__642, - ._extra2 = kLayout__643, - ._extra3 = kLayout__644, - ._extra4 = kLayout__645, - ._extra5 = kLayout__646, - ._extra6 = kLayout__647, - ._extra7 = kLayout__648, - ._extra8 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/138}, - .cycle = NondetRegLayout{._super = /*offset=*/139}}, - ._extra9 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/140}, - .cycle = NondetRegLayout{._super = /*offset=*/141}}, - ._extra10 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/142}, - .cycle = NondetRegLayout{._super = /*offset=*/143}}, - ._extra11 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/144}, - .cycle = NondetRegLayout{._super = /*offset=*/145}}, - ._extra12 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/146}, - .val = NondetRegLayout{._super = /*offset=*/147}}, - ._extra13 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/148}, - .val = NondetRegLayout{._super = /*offset=*/149}}, - ._extra14 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/150}, - .val = NondetRegLayout{._super = /*offset=*/151}}, - ._extra15 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/152}, - .val = NondetRegLayout{._super = /*offset=*/153}}, - ._extra16 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/154}, - .val = NondetRegLayout{._super = /*offset=*/155}}, - ._extra17 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/156}, - .val = NondetRegLayout{._super = /*offset=*/157}}, - ._extra18 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/158}, - .val = NondetRegLayout{._super = /*offset=*/159}}, - ._extra19 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/160}, - .val = NondetRegLayout{._super = /*offset=*/161}}, - ._extra20 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/162}, - .val = NondetRegLayout{._super = /*offset=*/163}}, - ._extra21 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/164}, - .val = NondetRegLayout{._super = /*offset=*/165}}, - ._extra22 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/166}, - .val = NondetRegLayout{._super = /*offset=*/167}}, - ._extra23 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/168}, - .val = NondetRegLayout{._super = /*offset=*/169}}, - ._extra24 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/170}, - .val = NondetRegLayout{._super = /*offset=*/171}}, - ._extra25 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/172}, - .val = NondetRegLayout{._super = /*offset=*/173}}, - ._extra26 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/174}, - .val = NondetRegLayout{._super = /*offset=*/175}}, - ._extra27 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/176}, - .val = NondetRegLayout{._super = /*offset=*/177}}, - ._extra28 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/178}, - .val = NondetRegLayout{._super = /*offset=*/179}}, - ._extra29 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/180}, - .val = NondetRegLayout{._super = /*offset=*/181}}}; -__device__ constexpr ReadElemLayout kLayout__683 = ReadElemLayout{.elem32 = kLayout__659}; -__device__ constexpr ReadElemLayout kLayout__684 = ReadElemLayout{.elem32 = kLayout__664}; -__device__ constexpr ReadElemLayout kLayout__685 = ReadElemLayout{.elem32 = kLayout__669}; -__device__ constexpr ReadElemLayout kLayout__686 = ReadElemLayout{.elem32 = kLayout__673}; -__device__ constexpr MemoryIOLayout kLayout__689 = - MemoryIOLayout{.oldTxn = kLayout__641, .newTxn = kLayout__642}; -__device__ constexpr IsCycleLayout kLayout__691 = - IsCycleLayout{.arg = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/138}, - .cycle = NondetRegLayout{._super = /*offset=*/139}}}; -__device__ constexpr IsForwardLayout kLayout__690 = IsForwardLayout{._0 = kLayout__691}; -__device__ constexpr MemoryReadLayout kLayout__688 = - MemoryReadLayout{.io = kLayout__689, ._0 = kLayout__690}; -__device__ constexpr ReadElemLayout kLayout__687 = ReadElemLayout{.elem32 = kLayout__688}; -__device__ constexpr MemoryIOLayout kLayout__694 = - MemoryIOLayout{.oldTxn = kLayout__643, .newTxn = kLayout__644}; -__device__ constexpr IsCycleLayout kLayout__696 = - IsCycleLayout{.arg = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/140}, - .cycle = NondetRegLayout{._super = /*offset=*/141}}}; -__device__ constexpr IsForwardLayout kLayout__695 = IsForwardLayout{._0 = kLayout__696}; -__device__ constexpr MemoryReadLayout kLayout__693 = - MemoryReadLayout{.io = kLayout__694, ._0 = kLayout__695}; -__device__ constexpr ReadElemLayout kLayout__692 = ReadElemLayout{.elem32 = kLayout__693}; -__device__ constexpr MemoryIOLayout kLayout__699 = - MemoryIOLayout{.oldTxn = kLayout__645, .newTxn = kLayout__646}; -__device__ constexpr IsCycleLayout kLayout__701 = - IsCycleLayout{.arg = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/142}, - .cycle = NondetRegLayout{._super = /*offset=*/143}}}; -__device__ constexpr IsForwardLayout kLayout__700 = IsForwardLayout{._0 = kLayout__701}; -__device__ constexpr MemoryReadLayout kLayout__698 = - MemoryReadLayout{.io = kLayout__699, ._0 = kLayout__700}; -__device__ constexpr ReadElemLayout kLayout__697 = ReadElemLayout{.elem32 = kLayout__698}; -__device__ constexpr MemoryIOLayout kLayout__704 = - MemoryIOLayout{.oldTxn = kLayout__647, .newTxn = kLayout__648}; -__device__ constexpr IsCycleLayout kLayout__706 = - IsCycleLayout{.arg = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/144}, - .cycle = NondetRegLayout{._super = /*offset=*/145}}}; -__device__ constexpr IsForwardLayout kLayout__705 = IsForwardLayout{._0 = kLayout__706}; -__device__ constexpr MemoryReadLayout kLayout__703 = - MemoryReadLayout{.io = kLayout__704, ._0 = kLayout__705}; -__device__ constexpr ReadElemLayout kLayout__702 = ReadElemLayout{.elem32 = kLayout__703}; -__device__ constexpr ReadElemLayout8LayoutArray kLayout__682 = - ReadElemLayout8LayoutArray{kLayout__683, - kLayout__684, - kLayout__685, - kLayout__686, - kLayout__687, - kLayout__692, - kLayout__697, - kLayout__702}; -__device__ constexpr PoseidonLoadStateLayout kLayout__681 = - PoseidonLoadStateLayout{._super = kLayout__629, .loadList = kLayout__682}; -__device__ constexpr Poseidon0StateArm1Layout kLayout__680 = Poseidon0StateArm1Layout{ - ._super = kLayout__681, - ._extra0 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/146}, - .val = NondetRegLayout{._super = /*offset=*/147}}, - ._extra1 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/148}, - .val = NondetRegLayout{._super = /*offset=*/149}}, - ._extra2 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/150}, - .val = NondetRegLayout{._super = /*offset=*/151}}, - ._extra3 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/152}, - .val = NondetRegLayout{._super = /*offset=*/153}}, - ._extra4 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/154}, - .val = NondetRegLayout{._super = /*offset=*/155}}, - ._extra5 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/156}, - .val = NondetRegLayout{._super = /*offset=*/157}}, - ._extra6 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/158}, - .val = NondetRegLayout{._super = /*offset=*/159}}, - ._extra7 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/160}, - .val = NondetRegLayout{._super = /*offset=*/161}}, - ._extra8 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/162}, - .val = NondetRegLayout{._super = /*offset=*/163}}, - ._extra9 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/164}, - .val = NondetRegLayout{._super = /*offset=*/165}}, - ._extra10 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/166}, - .val = NondetRegLayout{._super = /*offset=*/167}}, - ._extra11 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/168}, - .val = NondetRegLayout{._super = /*offset=*/169}}, - ._extra12 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/170}, - .val = NondetRegLayout{._super = /*offset=*/171}}, - ._extra13 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/172}, - .val = NondetRegLayout{._super = /*offset=*/173}}, - ._extra14 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/174}, - .val = NondetRegLayout{._super = /*offset=*/175}}, - ._extra15 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/176}, - .val = NondetRegLayout{._super = /*offset=*/177}}, - ._extra16 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/178}, - .val = NondetRegLayout{._super = /*offset=*/179}}, - ._extra17 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/180}, - .val = NondetRegLayout{._super = /*offset=*/181}}}; -__device__ constexpr OneHot_3_Layout kLayout__711 = OneHot_3_Layout{ - ._super = NondetRegLayout3LayoutArray{NondetRegLayout{._super = /*offset=*/182}, - NondetRegLayout{._super = /*offset=*/183}, - NondetRegLayout{._super = /*offset=*/184}}}; -__device__ constexpr MemoryPageInLayout kLayout__716 = MemoryPageInLayout{.io = kLayout__660}; -__device__ constexpr MemoryGet_SuperArm1Layout kLayout__715 = MemoryGet_SuperArm1Layout{ - ._super = kLayout__716, - ._extra0 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/130}, - .cycle = NondetRegLayout{._super = /*offset=*/131}}}; -__device__ constexpr MemoryPageOutLayout kLayout__717 = - MemoryPageOutLayout{.io = kLayout__660, ._0 = kLayout__661}; -__device__ constexpr MemoryGet_SuperLayout kLayout__714 = - MemoryGet_SuperLayout{.arm0 = kLayout__659, .arm1 = kLayout__715, .arm2 = kLayout__717}; -__device__ constexpr MemoryArgLayout2LayoutArray kLayout__719 = - MemoryArgLayout2LayoutArray{kLayout__633, kLayout__634}; -__device__ constexpr _Arguments_MemoryGet_SuperLayout kLayout__718 = - _Arguments_MemoryGet_SuperLayout{.memoryArg = kLayout__719, - .cycleArg = CycleArgLayout1LayoutArray{CycleArgLayout{ - .count = NondetRegLayout{._super = /*offset=*/130}, - .cycle = NondetRegLayout{._super = /*offset=*/131}}}}; -__device__ constexpr MemoryGetLayout kLayout__713 = - MemoryGetLayout{._super = kLayout__714, ._arguments_MemoryGet_Super = kLayout__718}; -__device__ constexpr MemoryPageInLayout kLayout__723 = MemoryPageInLayout{.io = kLayout__665}; -__device__ constexpr MemoryGet_SuperArm1Layout kLayout__722 = MemoryGet_SuperArm1Layout{ - ._super = kLayout__723, - ._extra0 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/132}, - .cycle = NondetRegLayout{._super = /*offset=*/133}}}; -__device__ constexpr MemoryPageOutLayout kLayout__724 = - MemoryPageOutLayout{.io = kLayout__665, ._0 = kLayout__666}; -__device__ constexpr MemoryGet_SuperLayout kLayout__721 = - MemoryGet_SuperLayout{.arm0 = kLayout__664, .arm1 = kLayout__722, .arm2 = kLayout__724}; -__device__ constexpr MemoryArgLayout2LayoutArray kLayout__726 = - MemoryArgLayout2LayoutArray{kLayout__635, kLayout__636}; -__device__ constexpr _Arguments_MemoryGet_SuperLayout kLayout__725 = - _Arguments_MemoryGet_SuperLayout{.memoryArg = kLayout__726, - .cycleArg = CycleArgLayout1LayoutArray{CycleArgLayout{ - .count = NondetRegLayout{._super = /*offset=*/132}, - .cycle = NondetRegLayout{._super = /*offset=*/133}}}}; -__device__ constexpr MemoryGetLayout kLayout__720 = - MemoryGetLayout{._super = kLayout__721, ._arguments_MemoryGet_Super = kLayout__725}; -__device__ constexpr MemoryPageInLayout kLayout__730 = MemoryPageInLayout{.io = kLayout__670}; -__device__ constexpr MemoryGet_SuperArm1Layout kLayout__729 = MemoryGet_SuperArm1Layout{ - ._super = kLayout__730, - ._extra0 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/134}, - .cycle = NondetRegLayout{._super = /*offset=*/135}}}; -__device__ constexpr MemoryPageOutLayout kLayout__731 = - MemoryPageOutLayout{.io = kLayout__670, ._0 = kLayout__671}; -__device__ constexpr MemoryGet_SuperLayout kLayout__728 = - MemoryGet_SuperLayout{.arm0 = kLayout__669, .arm1 = kLayout__729, .arm2 = kLayout__731}; -__device__ constexpr MemoryArgLayout2LayoutArray kLayout__733 = - MemoryArgLayout2LayoutArray{kLayout__637, kLayout__638}; -__device__ constexpr _Arguments_MemoryGet_SuperLayout kLayout__732 = - _Arguments_MemoryGet_SuperLayout{.memoryArg = kLayout__733, - .cycleArg = CycleArgLayout1LayoutArray{CycleArgLayout{ - .count = NondetRegLayout{._super = /*offset=*/134}, - .cycle = NondetRegLayout{._super = /*offset=*/135}}}}; -__device__ constexpr MemoryGetLayout kLayout__727 = - MemoryGetLayout{._super = kLayout__728, ._arguments_MemoryGet_Super = kLayout__732}; -__device__ constexpr MemoryPageInLayout kLayout__737 = MemoryPageInLayout{.io = kLayout__674}; -__device__ constexpr MemoryGet_SuperArm1Layout kLayout__736 = MemoryGet_SuperArm1Layout{ - ._super = kLayout__737, - ._extra0 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/136}, - .cycle = NondetRegLayout{._super = /*offset=*/137}}}; -__device__ constexpr MemoryPageOutLayout kLayout__738 = - MemoryPageOutLayout{.io = kLayout__674, ._0 = kLayout__675}; -__device__ constexpr MemoryGet_SuperLayout kLayout__735 = - MemoryGet_SuperLayout{.arm0 = kLayout__673, .arm1 = kLayout__736, .arm2 = kLayout__738}; -__device__ constexpr MemoryArgLayout2LayoutArray kLayout__740 = - MemoryArgLayout2LayoutArray{kLayout__639, kLayout__640}; -__device__ constexpr _Arguments_MemoryGet_SuperLayout kLayout__739 = - _Arguments_MemoryGet_SuperLayout{.memoryArg = kLayout__740, - .cycleArg = CycleArgLayout1LayoutArray{CycleArgLayout{ - .count = NondetRegLayout{._super = /*offset=*/136}, - .cycle = NondetRegLayout{._super = /*offset=*/137}}}}; -__device__ constexpr MemoryGetLayout kLayout__734 = - MemoryGetLayout{._super = kLayout__735, ._arguments_MemoryGet_Super = kLayout__739}; -__device__ constexpr MemoryPageInLayout kLayout__744 = MemoryPageInLayout{.io = kLayout__689}; -__device__ constexpr MemoryGet_SuperArm1Layout kLayout__743 = MemoryGet_SuperArm1Layout{ - ._super = kLayout__744, - ._extra0 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/138}, - .cycle = NondetRegLayout{._super = /*offset=*/139}}}; -__device__ constexpr MemoryPageOutLayout kLayout__745 = - MemoryPageOutLayout{.io = kLayout__689, ._0 = kLayout__690}; -__device__ constexpr MemoryGet_SuperLayout kLayout__742 = - MemoryGet_SuperLayout{.arm0 = kLayout__688, .arm1 = kLayout__743, .arm2 = kLayout__745}; -__device__ constexpr MemoryArgLayout2LayoutArray kLayout__747 = - MemoryArgLayout2LayoutArray{kLayout__641, kLayout__642}; -__device__ constexpr _Arguments_MemoryGet_SuperLayout kLayout__746 = - _Arguments_MemoryGet_SuperLayout{.memoryArg = kLayout__747, - .cycleArg = CycleArgLayout1LayoutArray{CycleArgLayout{ - .count = NondetRegLayout{._super = /*offset=*/138}, - .cycle = NondetRegLayout{._super = /*offset=*/139}}}}; -__device__ constexpr MemoryGetLayout kLayout__741 = - MemoryGetLayout{._super = kLayout__742, ._arguments_MemoryGet_Super = kLayout__746}; -__device__ constexpr MemoryPageInLayout kLayout__751 = MemoryPageInLayout{.io = kLayout__694}; -__device__ constexpr MemoryGet_SuperArm1Layout kLayout__750 = MemoryGet_SuperArm1Layout{ - ._super = kLayout__751, - ._extra0 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/140}, - .cycle = NondetRegLayout{._super = /*offset=*/141}}}; -__device__ constexpr MemoryPageOutLayout kLayout__752 = - MemoryPageOutLayout{.io = kLayout__694, ._0 = kLayout__695}; -__device__ constexpr MemoryGet_SuperLayout kLayout__749 = - MemoryGet_SuperLayout{.arm0 = kLayout__693, .arm1 = kLayout__750, .arm2 = kLayout__752}; -__device__ constexpr MemoryArgLayout2LayoutArray kLayout__754 = - MemoryArgLayout2LayoutArray{kLayout__643, kLayout__644}; -__device__ constexpr _Arguments_MemoryGet_SuperLayout kLayout__753 = - _Arguments_MemoryGet_SuperLayout{.memoryArg = kLayout__754, - .cycleArg = CycleArgLayout1LayoutArray{CycleArgLayout{ - .count = NondetRegLayout{._super = /*offset=*/140}, - .cycle = NondetRegLayout{._super = /*offset=*/141}}}}; -__device__ constexpr MemoryGetLayout kLayout__748 = - MemoryGetLayout{._super = kLayout__749, ._arguments_MemoryGet_Super = kLayout__753}; -__device__ constexpr MemoryPageInLayout kLayout__758 = MemoryPageInLayout{.io = kLayout__699}; -__device__ constexpr MemoryGet_SuperArm1Layout kLayout__757 = MemoryGet_SuperArm1Layout{ - ._super = kLayout__758, - ._extra0 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/142}, - .cycle = NondetRegLayout{._super = /*offset=*/143}}}; -__device__ constexpr MemoryPageOutLayout kLayout__759 = - MemoryPageOutLayout{.io = kLayout__699, ._0 = kLayout__700}; -__device__ constexpr MemoryGet_SuperLayout kLayout__756 = - MemoryGet_SuperLayout{.arm0 = kLayout__698, .arm1 = kLayout__757, .arm2 = kLayout__759}; -__device__ constexpr MemoryArgLayout2LayoutArray kLayout__761 = - MemoryArgLayout2LayoutArray{kLayout__645, kLayout__646}; -__device__ constexpr _Arguments_MemoryGet_SuperLayout kLayout__760 = - _Arguments_MemoryGet_SuperLayout{.memoryArg = kLayout__761, - .cycleArg = CycleArgLayout1LayoutArray{CycleArgLayout{ - .count = NondetRegLayout{._super = /*offset=*/142}, - .cycle = NondetRegLayout{._super = /*offset=*/143}}}}; -__device__ constexpr MemoryGetLayout kLayout__755 = - MemoryGetLayout{._super = kLayout__756, ._arguments_MemoryGet_Super = kLayout__760}; -__device__ constexpr MemoryPageInLayout kLayout__765 = MemoryPageInLayout{.io = kLayout__704}; -__device__ constexpr MemoryGet_SuperArm1Layout kLayout__764 = MemoryGet_SuperArm1Layout{ - ._super = kLayout__765, - ._extra0 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/144}, - .cycle = NondetRegLayout{._super = /*offset=*/145}}}; -__device__ constexpr MemoryPageOutLayout kLayout__766 = - MemoryPageOutLayout{.io = kLayout__704, ._0 = kLayout__705}; -__device__ constexpr MemoryGet_SuperLayout kLayout__763 = - MemoryGet_SuperLayout{.arm0 = kLayout__703, .arm1 = kLayout__764, .arm2 = kLayout__766}; -__device__ constexpr MemoryArgLayout2LayoutArray kLayout__768 = - MemoryArgLayout2LayoutArray{kLayout__647, kLayout__648}; -__device__ constexpr _Arguments_MemoryGet_SuperLayout kLayout__767 = - _Arguments_MemoryGet_SuperLayout{.memoryArg = kLayout__768, - .cycleArg = CycleArgLayout1LayoutArray{CycleArgLayout{ - .count = NondetRegLayout{._super = /*offset=*/144}, - .cycle = NondetRegLayout{._super = /*offset=*/145}}}}; -__device__ constexpr MemoryGetLayout kLayout__762 = - MemoryGetLayout{._super = kLayout__763, ._arguments_MemoryGet_Super = kLayout__767}; -__device__ constexpr MemoryGetLayout8LayoutArray kLayout__712 = - MemoryGetLayout8LayoutArray{kLayout__713, - kLayout__720, - kLayout__727, - kLayout__734, - kLayout__741, - kLayout__748, - kLayout__755, - kLayout__762}; -__device__ constexpr PoseidonLoadInShortLayout kLayout__710 = PoseidonLoadInShortLayout{ - ._super = kLayout__629, .txType = kLayout__711, .loadList = kLayout__712}; -__device__ constexpr PoseidonLoadInLowLayout kLayout__769 = PoseidonLoadInLowLayout{ - ._super = kLayout__629, .txType = kLayout__711, .loadList = kLayout__712}; -__device__ constexpr PoseidonLoadInHighLayout kLayout__770 = PoseidonLoadInHighLayout{ - ._super = kLayout__629, .txType = kLayout__711, .loadList = kLayout__712}; -__device__ constexpr PoseidonLoadIn_SuperLayout kLayout__709 = PoseidonLoadIn_SuperLayout{ - ._super = kLayout__629, .arm0 = kLayout__710, .arm1 = kLayout__769, .arm2 = kLayout__770}; -__device__ constexpr OneHot_3_Layout kLayout__771 = OneHot_3_Layout{ - ._super = NondetRegLayout3LayoutArray{NondetRegLayout{._super = /*offset=*/185}, - NondetRegLayout{._super = /*offset=*/186}, - NondetRegLayout{._super = /*offset=*/187}}}; -__device__ constexpr _Arguments_PoseidonLoadIn_SuperLayout kLayout__772 = - _Arguments_PoseidonLoadIn_SuperLayout{.memoryArg = kLayout__632, .cycleArg = kLayout__649}; -__device__ constexpr PoseidonLoadInLayout kLayout__708 = PoseidonLoadInLayout{ - ._super = kLayout__709, ._0 = kLayout__771, ._arguments_PoseidonLoadIn_Super = kLayout__772}; -__device__ constexpr Poseidon0StateArm2Layout kLayout__707 = Poseidon0StateArm2Layout{ - ._super = kLayout__708, - ._extra0 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/146}, - .val = NondetRegLayout{._super = /*offset=*/147}}, - ._extra1 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/148}, - .val = NondetRegLayout{._super = /*offset=*/149}}, - ._extra2 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/150}, - .val = NondetRegLayout{._super = /*offset=*/151}}, - ._extra3 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/152}, - .val = NondetRegLayout{._super = /*offset=*/153}}, - ._extra4 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/154}, - .val = NondetRegLayout{._super = /*offset=*/155}}, - ._extra5 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/156}, - .val = NondetRegLayout{._super = /*offset=*/157}}, - ._extra6 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/158}, - .val = NondetRegLayout{._super = /*offset=*/159}}, - ._extra7 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/160}, - .val = NondetRegLayout{._super = /*offset=*/161}}, - ._extra8 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/162}, - .val = NondetRegLayout{._super = /*offset=*/163}}, - ._extra9 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/164}, - .val = NondetRegLayout{._super = /*offset=*/165}}, - ._extra10 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/166}, - .val = NondetRegLayout{._super = /*offset=*/167}}, - ._extra11 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/168}, - .val = NondetRegLayout{._super = /*offset=*/169}}, - ._extra12 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/170}, - .val = NondetRegLayout{._super = /*offset=*/171}}, - ._extra13 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/172}, - .val = NondetRegLayout{._super = /*offset=*/173}}, - ._extra14 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/174}, - .val = NondetRegLayout{._super = /*offset=*/175}}, - ._extra15 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/176}, - .val = NondetRegLayout{._super = /*offset=*/177}}, - ._extra16 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/178}, - .val = NondetRegLayout{._super = /*offset=*/179}}, - ._extra17 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/180}, - .val = NondetRegLayout{._super = /*offset=*/181}}}; -__device__ constexpr Poseidon0StateArm3Layout kLayout__773 = Poseidon0StateArm3Layout{ - ._super = kLayout__629, - ._extra0 = kLayout__633, - ._extra1 = kLayout__634, - ._extra2 = kLayout__635, - ._extra3 = kLayout__636, - ._extra4 = kLayout__637, - ._extra5 = kLayout__638, - ._extra6 = kLayout__639, - ._extra7 = kLayout__640, - ._extra8 = kLayout__641, - ._extra9 = kLayout__642, - ._extra10 = kLayout__643, - ._extra11 = kLayout__644, - ._extra12 = kLayout__645, - ._extra13 = kLayout__646, - ._extra14 = kLayout__647, - ._extra15 = kLayout__648, - ._extra16 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/130}, - .cycle = NondetRegLayout{._super = /*offset=*/131}}, - ._extra17 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/132}, - .cycle = NondetRegLayout{._super = /*offset=*/133}}, - ._extra18 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/134}, - .cycle = NondetRegLayout{._super = /*offset=*/135}}, - ._extra19 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/136}, - .cycle = NondetRegLayout{._super = /*offset=*/137}}, - ._extra20 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/138}, - .cycle = NondetRegLayout{._super = /*offset=*/139}}, - ._extra21 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/140}, - .cycle = NondetRegLayout{._super = /*offset=*/141}}, - ._extra22 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/142}, - .cycle = NondetRegLayout{._super = /*offset=*/143}}, - ._extra23 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/144}, - .cycle = NondetRegLayout{._super = /*offset=*/145}}, - ._extra24 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/146}, - .val = NondetRegLayout{._super = /*offset=*/147}}, - ._extra25 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/148}, - .val = NondetRegLayout{._super = /*offset=*/149}}, - ._extra26 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/150}, - .val = NondetRegLayout{._super = /*offset=*/151}}, - ._extra27 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/152}, - .val = NondetRegLayout{._super = /*offset=*/153}}, - ._extra28 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/154}, - .val = NondetRegLayout{._super = /*offset=*/155}}, - ._extra29 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/156}, - .val = NondetRegLayout{._super = /*offset=*/157}}, - ._extra30 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/158}, - .val = NondetRegLayout{._super = /*offset=*/159}}, - ._extra31 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/160}, - .val = NondetRegLayout{._super = /*offset=*/161}}, - ._extra32 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/162}, - .val = NondetRegLayout{._super = /*offset=*/163}}, - ._extra33 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/164}, - .val = NondetRegLayout{._super = /*offset=*/165}}, - ._extra34 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/166}, - .val = NondetRegLayout{._super = /*offset=*/167}}, - ._extra35 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/168}, - .val = NondetRegLayout{._super = /*offset=*/169}}, - ._extra36 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/170}, - .val = NondetRegLayout{._super = /*offset=*/171}}, - ._extra37 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/172}, - .val = NondetRegLayout{._super = /*offset=*/173}}, - ._extra38 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/174}, - .val = NondetRegLayout{._super = /*offset=*/175}}, - ._extra39 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/176}, - .val = NondetRegLayout{._super = /*offset=*/177}}, - ._extra40 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/178}, - .val = NondetRegLayout{._super = /*offset=*/179}}, - ._extra41 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/180}, - .val = NondetRegLayout{._super = /*offset=*/181}}}; -__device__ constexpr Poseidon0StateArm4Layout kLayout__774 = Poseidon0StateArm4Layout{ - ._super = kLayout__629, - ._extra0 = kLayout__633, - ._extra1 = kLayout__634, - ._extra2 = kLayout__635, - ._extra3 = kLayout__636, - ._extra4 = kLayout__637, - ._extra5 = kLayout__638, - ._extra6 = kLayout__639, - ._extra7 = kLayout__640, - ._extra8 = kLayout__641, - ._extra9 = kLayout__642, - ._extra10 = kLayout__643, - ._extra11 = kLayout__644, - ._extra12 = kLayout__645, - ._extra13 = kLayout__646, - ._extra14 = kLayout__647, - ._extra15 = kLayout__648, - ._extra16 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/130}, - .cycle = NondetRegLayout{._super = /*offset=*/131}}, - ._extra17 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/132}, - .cycle = NondetRegLayout{._super = /*offset=*/133}}, - ._extra18 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/134}, - .cycle = NondetRegLayout{._super = /*offset=*/135}}, - ._extra19 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/136}, - .cycle = NondetRegLayout{._super = /*offset=*/137}}, - ._extra20 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/138}, - .cycle = NondetRegLayout{._super = /*offset=*/139}}, - ._extra21 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/140}, - .cycle = NondetRegLayout{._super = /*offset=*/141}}, - ._extra22 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/142}, - .cycle = NondetRegLayout{._super = /*offset=*/143}}, - ._extra23 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/144}, - .cycle = NondetRegLayout{._super = /*offset=*/145}}, - ._extra24 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/146}, - .val = NondetRegLayout{._super = /*offset=*/147}}, - ._extra25 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/148}, - .val = NondetRegLayout{._super = /*offset=*/149}}, - ._extra26 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/150}, - .val = NondetRegLayout{._super = /*offset=*/151}}, - ._extra27 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/152}, - .val = NondetRegLayout{._super = /*offset=*/153}}, - ._extra28 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/154}, - .val = NondetRegLayout{._super = /*offset=*/155}}, - ._extra29 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/156}, - .val = NondetRegLayout{._super = /*offset=*/157}}, - ._extra30 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/158}, - .val = NondetRegLayout{._super = /*offset=*/159}}, - ._extra31 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/160}, - .val = NondetRegLayout{._super = /*offset=*/161}}, - ._extra32 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/162}, - .val = NondetRegLayout{._super = /*offset=*/163}}, - ._extra33 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/164}, - .val = NondetRegLayout{._super = /*offset=*/165}}, - ._extra34 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/166}, - .val = NondetRegLayout{._super = /*offset=*/167}}, - ._extra35 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/168}, - .val = NondetRegLayout{._super = /*offset=*/169}}, - ._extra36 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/170}, - .val = NondetRegLayout{._super = /*offset=*/171}}, - ._extra37 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/172}, - .val = NondetRegLayout{._super = /*offset=*/173}}, - ._extra38 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/174}, - .val = NondetRegLayout{._super = /*offset=*/175}}, - ._extra39 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/176}, - .val = NondetRegLayout{._super = /*offset=*/177}}, - ._extra40 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/178}, - .val = NondetRegLayout{._super = /*offset=*/179}}, - ._extra41 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/180}, - .val = NondetRegLayout{._super = /*offset=*/181}}}; -__device__ constexpr PoseidonCheckOut__0_SuperLayout kLayout__781 = - PoseidonCheckOut__0_SuperLayout{.goal = kLayout__683}; -__device__ constexpr PoseidonCheckOut__0_SuperLayout kLayout__782 = - PoseidonCheckOut__0_SuperLayout{.goal = kLayout__684}; -__device__ constexpr PoseidonCheckOut__0_SuperLayout kLayout__783 = - PoseidonCheckOut__0_SuperLayout{.goal = kLayout__685}; -__device__ constexpr PoseidonCheckOut__0_SuperLayout kLayout__784 = - PoseidonCheckOut__0_SuperLayout{.goal = kLayout__686}; -__device__ constexpr PoseidonCheckOut__0_SuperLayout kLayout__785 = - PoseidonCheckOut__0_SuperLayout{.goal = kLayout__687}; -__device__ constexpr PoseidonCheckOut__0_SuperLayout kLayout__786 = - PoseidonCheckOut__0_SuperLayout{.goal = kLayout__692}; -__device__ constexpr PoseidonCheckOut__0_SuperLayout kLayout__787 = - PoseidonCheckOut__0_SuperLayout{.goal = kLayout__697}; -__device__ constexpr PoseidonCheckOut__0_SuperLayout kLayout__788 = - PoseidonCheckOut__0_SuperLayout{.goal = kLayout__702}; -__device__ constexpr PoseidonCheckOut__0_SuperLayout8LayoutArray kLayout__780 = - PoseidonCheckOut__0_SuperLayout8LayoutArray{kLayout__781, - kLayout__782, - kLayout__783, - kLayout__784, - kLayout__785, - kLayout__786, - kLayout__787, - kLayout__788}; -__device__ constexpr PoseidonCheckOutLayout kLayout__779 = PoseidonCheckOutLayout{ - ._super = kLayout__629, - ._1 = kLayout__780, - .isNormal = IsZeroLayout{._super = NondetRegLayout{._super = /*offset=*/182}, - .inv = NondetRegLayout{._super = /*offset=*/183}}, - .extInv = NondetExtRegLayout{._super = /*offset=*/184}}; -__device__ constexpr PoseidonDoOut_SuperArm0Layout kLayout__778 = PoseidonDoOut_SuperArm0Layout{ - ._super = kLayout__779, - ._extra0 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/146}, - .val = NondetRegLayout{._super = /*offset=*/147}}, - ._extra1 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/148}, - .val = NondetRegLayout{._super = /*offset=*/149}}, - ._extra2 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/150}, - .val = NondetRegLayout{._super = /*offset=*/151}}, - ._extra3 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/152}, - .val = NondetRegLayout{._super = /*offset=*/153}}, - ._extra4 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/154}, - .val = NondetRegLayout{._super = /*offset=*/155}}, - ._extra5 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/156}, - .val = NondetRegLayout{._super = /*offset=*/157}}, - ._extra6 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/158}, - .val = NondetRegLayout{._super = /*offset=*/159}}, - ._extra7 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/160}, - .val = NondetRegLayout{._super = /*offset=*/161}}, - ._extra8 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/162}, - .val = NondetRegLayout{._super = /*offset=*/163}}, - ._extra9 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/164}, - .val = NondetRegLayout{._super = /*offset=*/165}}, - ._extra10 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/166}, - .val = NondetRegLayout{._super = /*offset=*/167}}, - ._extra11 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/168}, - .val = NondetRegLayout{._super = /*offset=*/169}}, - ._extra12 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/170}, - .val = NondetRegLayout{._super = /*offset=*/171}}, - ._extra13 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/172}, - .val = NondetRegLayout{._super = /*offset=*/173}}, - ._extra14 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/174}, - .val = NondetRegLayout{._super = /*offset=*/175}}, - ._extra15 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/176}, - .val = NondetRegLayout{._super = /*offset=*/177}}}; -__device__ constexpr NondetU16RegLayout kLayout__792 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/146}, - .val = NondetRegLayout{._super = /*offset=*/147}}}; -__device__ constexpr NondetU16RegLayout kLayout__794 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/148}, - .val = NondetRegLayout{._super = /*offset=*/149}}}; -__device__ constexpr U16RegLayout kLayout__793 = U16RegLayout{.ret = kLayout__794}; -__device__ constexpr MemoryWriteLayout kLayout__795 = - MemoryWriteLayout{.io = kLayout__660, ._0 = kLayout__661}; -__device__ constexpr PoseidonStoreOut__0_SuperLayout kLayout__791 = - PoseidonStoreOut__0_SuperLayout{.low = kLayout__792, .high = kLayout__793, ._0 = kLayout__795}; -__device__ constexpr NondetU16RegLayout kLayout__797 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/150}, - .val = NondetRegLayout{._super = /*offset=*/151}}}; -__device__ constexpr NondetU16RegLayout kLayout__799 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/152}, - .val = NondetRegLayout{._super = /*offset=*/153}}}; -__device__ constexpr U16RegLayout kLayout__798 = U16RegLayout{.ret = kLayout__799}; -__device__ constexpr MemoryWriteLayout kLayout__800 = - MemoryWriteLayout{.io = kLayout__665, ._0 = kLayout__666}; -__device__ constexpr PoseidonStoreOut__0_SuperLayout kLayout__796 = - PoseidonStoreOut__0_SuperLayout{.low = kLayout__797, .high = kLayout__798, ._0 = kLayout__800}; -__device__ constexpr NondetU16RegLayout kLayout__802 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/154}, - .val = NondetRegLayout{._super = /*offset=*/155}}}; -__device__ constexpr U16RegLayout kLayout__803 = U16RegLayout{.ret = kLayout__202}; -__device__ constexpr MemoryWriteLayout kLayout__804 = - MemoryWriteLayout{.io = kLayout__670, ._0 = kLayout__671}; -__device__ constexpr PoseidonStoreOut__0_SuperLayout kLayout__801 = - PoseidonStoreOut__0_SuperLayout{.low = kLayout__802, .high = kLayout__803, ._0 = kLayout__804}; -__device__ constexpr NondetU16RegLayout kLayout__806 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/158}, - .val = NondetRegLayout{._super = /*offset=*/159}}}; -__device__ constexpr NondetU16RegLayout kLayout__808 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/160}, - .val = NondetRegLayout{._super = /*offset=*/161}}}; -__device__ constexpr U16RegLayout kLayout__807 = U16RegLayout{.ret = kLayout__808}; -__device__ constexpr MemoryWriteLayout kLayout__809 = - MemoryWriteLayout{.io = kLayout__674, ._0 = kLayout__675}; -__device__ constexpr PoseidonStoreOut__0_SuperLayout kLayout__805 = - PoseidonStoreOut__0_SuperLayout{.low = kLayout__806, .high = kLayout__807, ._0 = kLayout__809}; -__device__ constexpr NondetU16RegLayout kLayout__811 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/162}, - .val = NondetRegLayout{._super = /*offset=*/163}}}; -__device__ constexpr NondetU16RegLayout kLayout__813 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/164}, - .val = NondetRegLayout{._super = /*offset=*/165}}}; -__device__ constexpr U16RegLayout kLayout__812 = U16RegLayout{.ret = kLayout__813}; -__device__ constexpr MemoryWriteLayout kLayout__814 = - MemoryWriteLayout{.io = kLayout__689, ._0 = kLayout__690}; -__device__ constexpr PoseidonStoreOut__0_SuperLayout kLayout__810 = - PoseidonStoreOut__0_SuperLayout{.low = kLayout__811, .high = kLayout__812, ._0 = kLayout__814}; -__device__ constexpr NondetU16RegLayout kLayout__817 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/168}, - .val = NondetRegLayout{._super = /*offset=*/169}}}; -__device__ constexpr U16RegLayout kLayout__816 = U16RegLayout{.ret = kLayout__817}; -__device__ constexpr MemoryWriteLayout kLayout__818 = - MemoryWriteLayout{.io = kLayout__694, ._0 = kLayout__695}; -__device__ constexpr PoseidonStoreOut__0_SuperLayout kLayout__815 = - PoseidonStoreOut__0_SuperLayout{.low = kLayout__288, .high = kLayout__816, ._0 = kLayout__818}; -__device__ constexpr NondetU16RegLayout kLayout__820 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/170}, - .val = NondetRegLayout{._super = /*offset=*/171}}}; -__device__ constexpr NondetU16RegLayout kLayout__822 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/172}, - .val = NondetRegLayout{._super = /*offset=*/173}}}; -__device__ constexpr U16RegLayout kLayout__821 = U16RegLayout{.ret = kLayout__822}; -__device__ constexpr MemoryWriteLayout kLayout__823 = - MemoryWriteLayout{.io = kLayout__699, ._0 = kLayout__700}; -__device__ constexpr PoseidonStoreOut__0_SuperLayout kLayout__819 = - PoseidonStoreOut__0_SuperLayout{.low = kLayout__820, .high = kLayout__821, ._0 = kLayout__823}; -__device__ constexpr NondetU16RegLayout kLayout__825 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/174}, - .val = NondetRegLayout{._super = /*offset=*/175}}}; -__device__ constexpr NondetU16RegLayout kLayout__827 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/176}, - .val = NondetRegLayout{._super = /*offset=*/177}}}; -__device__ constexpr U16RegLayout kLayout__826 = U16RegLayout{.ret = kLayout__827}; -__device__ constexpr MemoryWriteLayout kLayout__828 = - MemoryWriteLayout{.io = kLayout__704, ._0 = kLayout__705}; -__device__ constexpr PoseidonStoreOut__0_SuperLayout kLayout__824 = - PoseidonStoreOut__0_SuperLayout{.low = kLayout__825, .high = kLayout__826, ._0 = kLayout__828}; -__device__ constexpr PoseidonStoreOut__0_SuperLayout8LayoutArray kLayout__790 = - PoseidonStoreOut__0_SuperLayout8LayoutArray{kLayout__791, - kLayout__796, - kLayout__801, - kLayout__805, - kLayout__810, - kLayout__815, - kLayout__819, - kLayout__824}; -__device__ constexpr PoseidonStoreOutLayout kLayout__789 = PoseidonStoreOutLayout{ - ._super = kLayout__629, - ._1 = kLayout__790, - .isNormal = IsZeroLayout{._super = NondetRegLayout{._super = /*offset=*/182}, - .inv = NondetRegLayout{._super = /*offset=*/183}}, - .extInv = NondetExtRegLayout{._super = /*offset=*/184}}; -__device__ constexpr PoseidonDoOut_SuperLayout kLayout__777 = - PoseidonDoOut_SuperLayout{._super = kLayout__629, .arm0 = kLayout__778, .arm1 = kLayout__789}; -__device__ constexpr _Arguments_PoseidonDoOut_SuperLayout kLayout__829 = - _Arguments_PoseidonDoOut_SuperLayout{ - .memoryArg = kLayout__632, .cycleArg = kLayout__649, .argU16 = kLayout__650}; -__device__ constexpr PoseidonDoOutLayout kLayout__776 = - PoseidonDoOutLayout{._super = kLayout__777, ._arguments_PoseidonDoOut_Super = kLayout__829}; -__device__ constexpr Poseidon0StateArm5Layout kLayout__775 = Poseidon0StateArm5Layout{ - ._super = kLayout__776, - ._extra0 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/178}, - .val = NondetRegLayout{._super = /*offset=*/179}}, - ._extra1 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/180}, - .val = NondetRegLayout{._super = /*offset=*/181}}}; -__device__ constexpr PoseidonPaging_SuperLayout kLayout__832 = - PoseidonPaging_SuperLayout{._super = kLayout__629, - .arm0 = kLayout__629, - .arm1 = kLayout__629, - .arm2 = kLayout__629, - .arm3 = kLayout__629, - .arm4 = kLayout__629, - .arm5 = kLayout__629}; -__device__ constexpr NondetRegLayout6LayoutArray kLayout__834 = - NondetRegLayout6LayoutArray{NondetRegLayout{._super = /*offset=*/184}, - NondetRegLayout{._super = /*offset=*/185}, - NondetRegLayout{._super = /*offset=*/186}, - NondetRegLayout{._super = /*offset=*/187}, - NondetRegLayout{._super = /*offset=*/188}, - NondetRegLayout{._super = /*offset=*/189}}; -__device__ constexpr OneHot_6_Layout kLayout__833 = OneHot_6_Layout{._super = kLayout__834}; -__device__ constexpr NondetU8RegLayout kLayout__837 = - NondetU8RegLayout{.arg = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/178}, - .val = NondetRegLayout{._super = /*offset=*/179}}}; -__device__ constexpr U8RegLayout kLayout__836 = U8RegLayout{.ret = kLayout__837}; -__device__ constexpr IsU24Layout kLayout__835 = - IsU24Layout{.low16 = kLayout__792, ._0 = kLayout__836}; -__device__ constexpr _Arguments_PoseidonPaging__1Layout kLayout__838 = - _Arguments_PoseidonPaging__1Layout{.argU16 = ArgU16Layout1LayoutArray{ArgU16Layout{ - .count = NondetRegLayout{._super = /*offset=*/148}, - .val = NondetRegLayout{._super = /*offset=*/149}}}, - .argU8 = ArgU8Layout1LayoutArray{ArgU8Layout{ - .count = NondetRegLayout{._super = /*offset=*/180}, - .val = NondetRegLayout{._super = /*offset=*/181}}}}; -__device__ constexpr NondetU8RegLayout kLayout__843 = - NondetU8RegLayout{.arg = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/180}, - .val = NondetRegLayout{._super = /*offset=*/181}}}; -__device__ constexpr U8RegLayout kLayout__842 = U8RegLayout{.ret = kLayout__843}; -__device__ constexpr IsU24Layout kLayout__841 = - IsU24Layout{.low16 = kLayout__794, ._0 = kLayout__842}; -__device__ constexpr PoseidonPaging__1Arm0_SuperLayout kLayout__840 = - PoseidonPaging__1Arm0_SuperLayout{._0 = kLayout__841}; -__device__ constexpr PoseidonPaging__1Arm1_SuperLayout kLayout__844 = - PoseidonPaging__1Arm1_SuperLayout{._0 = kLayout__841}; -__device__ constexpr PoseidonPaging__1Layout kLayout__839 = - PoseidonPaging__1Layout{.arm0 = kLayout__840, .arm1 = kLayout__844}; -__device__ constexpr PoseidonPagingLayout kLayout__831 = - PoseidonPagingLayout{._super = kLayout__832, - .curIdx = NondetRegLayout{._super = /*offset=*/182}, - .curMode = NondetRegLayout{._super = /*offset=*/183}, - .modeSplit = kLayout__833, - ._0 = kLayout__835, - ._arguments_PoseidonPaging__1 = kLayout__838, - ._3 = kLayout__839, - ._4 = NondetRegLayout{._super = /*offset=*/190}}; -__device__ constexpr Poseidon0StateArm6Layout kLayout__830 = Poseidon0StateArm6Layout{ - ._super = kLayout__831, - ._extra0 = kLayout__633, - ._extra1 = kLayout__634, - ._extra2 = kLayout__635, - ._extra3 = kLayout__636, - ._extra4 = kLayout__637, - ._extra5 = kLayout__638, - ._extra6 = kLayout__639, - ._extra7 = kLayout__640, - ._extra8 = kLayout__641, - ._extra9 = kLayout__642, - ._extra10 = kLayout__643, - ._extra11 = kLayout__644, - ._extra12 = kLayout__645, - ._extra13 = kLayout__646, - ._extra14 = kLayout__647, - ._extra15 = kLayout__648, - ._extra16 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/130}, - .cycle = NondetRegLayout{._super = /*offset=*/131}}, - ._extra17 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/132}, - .cycle = NondetRegLayout{._super = /*offset=*/133}}, - ._extra18 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/134}, - .cycle = NondetRegLayout{._super = /*offset=*/135}}, - ._extra19 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/136}, - .cycle = NondetRegLayout{._super = /*offset=*/137}}, - ._extra20 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/138}, - .cycle = NondetRegLayout{._super = /*offset=*/139}}, - ._extra21 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/140}, - .cycle = NondetRegLayout{._super = /*offset=*/141}}, - ._extra22 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/142}, - .cycle = NondetRegLayout{._super = /*offset=*/143}}, - ._extra23 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/144}, - .cycle = NondetRegLayout{._super = /*offset=*/145}}, - ._extra24 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/150}, - .val = NondetRegLayout{._super = /*offset=*/151}}, - ._extra25 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/152}, - .val = NondetRegLayout{._super = /*offset=*/153}}, - ._extra26 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/154}, - .val = NondetRegLayout{._super = /*offset=*/155}}, - ._extra27 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/156}, - .val = NondetRegLayout{._super = /*offset=*/157}}, - ._extra28 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/158}, - .val = NondetRegLayout{._super = /*offset=*/159}}, - ._extra29 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/160}, - .val = NondetRegLayout{._super = /*offset=*/161}}, - ._extra30 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/162}, - .val = NondetRegLayout{._super = /*offset=*/163}}, - ._extra31 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/164}, - .val = NondetRegLayout{._super = /*offset=*/165}}, - ._extra32 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/166}, - .val = NondetRegLayout{._super = /*offset=*/167}}, - ._extra33 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/168}, - .val = NondetRegLayout{._super = /*offset=*/169}}, - ._extra34 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/170}, - .val = NondetRegLayout{._super = /*offset=*/171}}, - ._extra35 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/172}, - .val = NondetRegLayout{._super = /*offset=*/173}}, - ._extra36 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/174}, - .val = NondetRegLayout{._super = /*offset=*/175}}, - ._extra37 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/176}, - .val = NondetRegLayout{._super = /*offset=*/177}}}; -__device__ constexpr PoseidonStoreState__0_SuperLayout kLayout__848 = - PoseidonStoreState__0_SuperLayout{ - .low = kLayout__792, .high = kLayout__793, ._0 = kLayout__795}; -__device__ constexpr PoseidonStoreState__0_SuperLayout kLayout__849 = - PoseidonStoreState__0_SuperLayout{ - .low = kLayout__797, .high = kLayout__798, ._0 = kLayout__800}; -__device__ constexpr PoseidonStoreState__0_SuperLayout kLayout__850 = - PoseidonStoreState__0_SuperLayout{ - .low = kLayout__802, .high = kLayout__803, ._0 = kLayout__804}; -__device__ constexpr PoseidonStoreState__0_SuperLayout kLayout__851 = - PoseidonStoreState__0_SuperLayout{ - .low = kLayout__806, .high = kLayout__807, ._0 = kLayout__809}; -__device__ constexpr PoseidonStoreState__0_SuperLayout kLayout__852 = - PoseidonStoreState__0_SuperLayout{ - .low = kLayout__811, .high = kLayout__812, ._0 = kLayout__814}; -__device__ constexpr PoseidonStoreState__0_SuperLayout kLayout__853 = - PoseidonStoreState__0_SuperLayout{ - .low = kLayout__288, .high = kLayout__816, ._0 = kLayout__818}; -__device__ constexpr PoseidonStoreState__0_SuperLayout kLayout__854 = - PoseidonStoreState__0_SuperLayout{ - .low = kLayout__820, .high = kLayout__821, ._0 = kLayout__823}; -__device__ constexpr PoseidonStoreState__0_SuperLayout kLayout__855 = - PoseidonStoreState__0_SuperLayout{ - .low = kLayout__825, .high = kLayout__826, ._0 = kLayout__828}; -__device__ constexpr PoseidonStoreState__0_SuperLayout8LayoutArray kLayout__847 = - PoseidonStoreState__0_SuperLayout8LayoutArray{kLayout__848, - kLayout__849, - kLayout__850, - kLayout__851, - kLayout__852, - kLayout__853, - kLayout__854, - kLayout__855}; -__device__ constexpr PoseidonStoreStateLayout kLayout__846 = - PoseidonStoreStateLayout{._super = kLayout__629, ._1 = kLayout__847}; -__device__ constexpr Poseidon0StateArm7Layout kLayout__845 = Poseidon0StateArm7Layout{ - ._super = kLayout__846, - ._extra0 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/178}, - .val = NondetRegLayout{._super = /*offset=*/179}}, - ._extra1 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/180}, - .val = NondetRegLayout{._super = /*offset=*/181}}}; -__device__ constexpr Poseidon0StateLayout kLayout__652 = - Poseidon0StateLayout{._super = kLayout__629, - .arm0 = kLayout__653, - .arm1 = kLayout__680, - .arm2 = kLayout__707, - .arm3 = kLayout__773, - .arm4 = kLayout__774, - .arm5 = kLayout__775, - .arm6 = kLayout__830, - .arm7 = kLayout__845}; -__device__ constexpr Poseidon0Layout kLayout__628 = - Poseidon0Layout{.state = kLayout__629, - ._arguments_Poseidon0State = kLayout__631, - .stateRedef = kLayout__652, - .arg = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/191}, - .cycle = NondetRegLayout{._super = /*offset=*/0}}}; -__device__ constexpr SBoxLayout24LayoutArray kLayout__861 = - SBoxLayout24LayoutArray{SBoxLayout{._super = NondetRegLayout{._super = /*offset=*/72}, - .cubed = NondetRegLayout{._super = /*offset=*/73}}, - SBoxLayout{._super = NondetRegLayout{._super = /*offset=*/74}, - .cubed = NondetRegLayout{._super = /*offset=*/75}}, - SBoxLayout{._super = NondetRegLayout{._super = /*offset=*/76}, - .cubed = NondetRegLayout{._super = /*offset=*/77}}, - SBoxLayout{._super = NondetRegLayout{._super = /*offset=*/78}, - .cubed = NondetRegLayout{._super = /*offset=*/79}}, - SBoxLayout{._super = NondetRegLayout{._super = /*offset=*/80}, - .cubed = NondetRegLayout{._super = /*offset=*/81}}, - SBoxLayout{._super = NondetRegLayout{._super = /*offset=*/82}, - .cubed = NondetRegLayout{._super = /*offset=*/83}}, - SBoxLayout{._super = NondetRegLayout{._super = /*offset=*/84}, - .cubed = NondetRegLayout{._super = /*offset=*/85}}, - SBoxLayout{._super = NondetRegLayout{._super = /*offset=*/86}, - .cubed = NondetRegLayout{._super = /*offset=*/87}}, - SBoxLayout{._super = NondetRegLayout{._super = /*offset=*/88}, - .cubed = NondetRegLayout{._super = /*offset=*/89}}, - SBoxLayout{._super = NondetRegLayout{._super = /*offset=*/90}, - .cubed = NondetRegLayout{._super = /*offset=*/91}}, - SBoxLayout{._super = NondetRegLayout{._super = /*offset=*/92}, - .cubed = NondetRegLayout{._super = /*offset=*/93}}, - SBoxLayout{._super = NondetRegLayout{._super = /*offset=*/94}, - .cubed = NondetRegLayout{._super = /*offset=*/95}}, - SBoxLayout{._super = NondetRegLayout{._super = /*offset=*/96}, - .cubed = NondetRegLayout{._super = /*offset=*/97}}, - SBoxLayout{._super = NondetRegLayout{._super = /*offset=*/98}, - .cubed = NondetRegLayout{._super = /*offset=*/99}}, - SBoxLayout{._super = NondetRegLayout{._super = /*offset=*/100}, - .cubed = NondetRegLayout{._super = /*offset=*/101}}, - SBoxLayout{._super = NondetRegLayout{._super = /*offset=*/102}, - .cubed = NondetRegLayout{._super = /*offset=*/103}}, - SBoxLayout{._super = NondetRegLayout{._super = /*offset=*/104}, - .cubed = NondetRegLayout{._super = /*offset=*/105}}, - SBoxLayout{._super = NondetRegLayout{._super = /*offset=*/106}, - .cubed = NondetRegLayout{._super = /*offset=*/107}}, - SBoxLayout{._super = NondetRegLayout{._super = /*offset=*/108}, - .cubed = NondetRegLayout{._super = /*offset=*/109}}, - SBoxLayout{._super = NondetRegLayout{._super = /*offset=*/110}, - .cubed = NondetRegLayout{._super = /*offset=*/111}}, - SBoxLayout{._super = NondetRegLayout{._super = /*offset=*/112}, - .cubed = NondetRegLayout{._super = /*offset=*/113}}, - SBoxLayout{._super = NondetRegLayout{._super = /*offset=*/114}, - .cubed = NondetRegLayout{._super = /*offset=*/115}}, - SBoxLayout{._super = NondetRegLayout{._super = /*offset=*/116}, - .cubed = NondetRegLayout{._super = /*offset=*/117}}, - SBoxLayout{._super = NondetRegLayout{._super = /*offset=*/118}, - .cubed = NondetRegLayout{._super = /*offset=*/119}}}; -__device__ constexpr DoExtRoundLayout kLayout__860 = DoExtRoundLayout{._1 = kLayout__861}; -__device__ constexpr NondetRegLayout8LayoutArray kLayout__863 = - NondetRegLayout8LayoutArray{NondetRegLayout{._super = /*offset=*/120}, - NondetRegLayout{._super = /*offset=*/121}, - NondetRegLayout{._super = /*offset=*/122}, - NondetRegLayout{._super = /*offset=*/123}, - NondetRegLayout{._super = /*offset=*/124}, - NondetRegLayout{._super = /*offset=*/125}, - NondetRegLayout{._super = /*offset=*/126}, - NondetRegLayout{._super = /*offset=*/127}}; -__device__ constexpr OneHot_8_Layout kLayout__862 = OneHot_8_Layout{._super = kLayout__863}; -__device__ constexpr DoExtRoundByIdxLayout kLayout__859 = - DoExtRoundByIdxLayout{._super = kLayout__860, .idxHot = kLayout__862}; -__device__ constexpr PoseidonExtRoundLayout kLayout__858 = PoseidonExtRoundLayout{ - ._super = kLayout__629, - .isRound3 = IsZeroLayout{._super = NondetRegLayout{._super = /*offset=*/66}, - .inv = NondetRegLayout{._super = /*offset=*/67}}, - .isRound7 = IsZeroLayout{._super = NondetRegLayout{._super = /*offset=*/68}, - .inv = NondetRegLayout{._super = /*offset=*/69}}, - .lastBlock = IsZeroLayout{._super = NondetRegLayout{._super = /*offset=*/70}, - .inv = NondetRegLayout{._super = /*offset=*/71}}, - .nextInner = kLayout__859}; -__device__ constexpr DoIntRoundLayout kLayout__867 = - DoIntRoundLayout{.sbox = SBoxLayout{._super = NondetRegLayout{._super = /*offset=*/66}, - .cubed = NondetRegLayout{._super = /*offset=*/67}}}; -__device__ constexpr DoIntRoundLayout kLayout__868 = - DoIntRoundLayout{.sbox = SBoxLayout{._super = NondetRegLayout{._super = /*offset=*/68}, - .cubed = NondetRegLayout{._super = /*offset=*/69}}}; -__device__ constexpr DoIntRoundLayout kLayout__869 = - DoIntRoundLayout{.sbox = SBoxLayout{._super = NondetRegLayout{._super = /*offset=*/70}, - .cubed = NondetRegLayout{._super = /*offset=*/71}}}; -__device__ constexpr DoIntRoundLayout kLayout__870 = - DoIntRoundLayout{.sbox = SBoxLayout{._super = NondetRegLayout{._super = /*offset=*/72}, - .cubed = NondetRegLayout{._super = /*offset=*/73}}}; -__device__ constexpr DoIntRoundLayout kLayout__871 = - DoIntRoundLayout{.sbox = SBoxLayout{._super = NondetRegLayout{._super = /*offset=*/74}, - .cubed = NondetRegLayout{._super = /*offset=*/75}}}; -__device__ constexpr DoIntRoundLayout kLayout__872 = - DoIntRoundLayout{.sbox = SBoxLayout{._super = NondetRegLayout{._super = /*offset=*/76}, - .cubed = NondetRegLayout{._super = /*offset=*/77}}}; -__device__ constexpr DoIntRoundLayout kLayout__873 = - DoIntRoundLayout{.sbox = SBoxLayout{._super = NondetRegLayout{._super = /*offset=*/78}, - .cubed = NondetRegLayout{._super = /*offset=*/79}}}; -__device__ constexpr DoIntRoundLayout kLayout__874 = - DoIntRoundLayout{.sbox = SBoxLayout{._super = NondetRegLayout{._super = /*offset=*/80}, - .cubed = NondetRegLayout{._super = /*offset=*/81}}}; -__device__ constexpr DoIntRoundLayout kLayout__875 = - DoIntRoundLayout{.sbox = SBoxLayout{._super = NondetRegLayout{._super = /*offset=*/82}, - .cubed = NondetRegLayout{._super = /*offset=*/83}}}; -__device__ constexpr DoIntRoundLayout kLayout__876 = - DoIntRoundLayout{.sbox = SBoxLayout{._super = NondetRegLayout{._super = /*offset=*/84}, - .cubed = NondetRegLayout{._super = /*offset=*/85}}}; -__device__ constexpr DoIntRoundLayout kLayout__877 = - DoIntRoundLayout{.sbox = SBoxLayout{._super = NondetRegLayout{._super = /*offset=*/86}, - .cubed = NondetRegLayout{._super = /*offset=*/87}}}; -__device__ constexpr DoIntRoundLayout kLayout__878 = - DoIntRoundLayout{.sbox = SBoxLayout{._super = NondetRegLayout{._super = /*offset=*/88}, - .cubed = NondetRegLayout{._super = /*offset=*/89}}}; -__device__ constexpr DoIntRoundLayout kLayout__879 = - DoIntRoundLayout{.sbox = SBoxLayout{._super = NondetRegLayout{._super = /*offset=*/90}, - .cubed = NondetRegLayout{._super = /*offset=*/91}}}; -__device__ constexpr DoIntRoundLayout kLayout__880 = - DoIntRoundLayout{.sbox = SBoxLayout{._super = NondetRegLayout{._super = /*offset=*/92}, - .cubed = NondetRegLayout{._super = /*offset=*/93}}}; -__device__ constexpr DoIntRoundLayout kLayout__881 = - DoIntRoundLayout{.sbox = SBoxLayout{._super = NondetRegLayout{._super = /*offset=*/94}, - .cubed = NondetRegLayout{._super = /*offset=*/95}}}; -__device__ constexpr DoIntRoundLayout kLayout__882 = - DoIntRoundLayout{.sbox = SBoxLayout{._super = NondetRegLayout{._super = /*offset=*/96}, - .cubed = NondetRegLayout{._super = /*offset=*/97}}}; -__device__ constexpr DoIntRoundLayout kLayout__883 = - DoIntRoundLayout{.sbox = SBoxLayout{._super = NondetRegLayout{._super = /*offset=*/98}, - .cubed = NondetRegLayout{._super = /*offset=*/99}}}; -__device__ constexpr DoIntRoundLayout kLayout__884 = - DoIntRoundLayout{.sbox = SBoxLayout{._super = NondetRegLayout{._super = /*offset=*/100}, - .cubed = NondetRegLayout{._super = /*offset=*/101}}}; -__device__ constexpr DoIntRoundLayout kLayout__885 = - DoIntRoundLayout{.sbox = SBoxLayout{._super = NondetRegLayout{._super = /*offset=*/102}, - .cubed = NondetRegLayout{._super = /*offset=*/103}}}; -__device__ constexpr DoIntRoundLayout kLayout__886 = - DoIntRoundLayout{.sbox = SBoxLayout{._super = NondetRegLayout{._super = /*offset=*/104}, - .cubed = NondetRegLayout{._super = /*offset=*/105}}}; -__device__ constexpr DoIntRoundLayout kLayout__887 = - DoIntRoundLayout{.sbox = SBoxLayout{._super = NondetRegLayout{._super = /*offset=*/106}, - .cubed = NondetRegLayout{._super = /*offset=*/107}}}; -__device__ constexpr DoIntRoundLayout21LayoutArray kLayout__866 = DoIntRoundLayout21LayoutArray{ - kLayout__867, kLayout__868, kLayout__869, kLayout__870, kLayout__871, kLayout__872, - kLayout__873, kLayout__874, kLayout__875, kLayout__876, kLayout__877, kLayout__878, - kLayout__879, kLayout__880, kLayout__881, kLayout__882, kLayout__883, kLayout__884, - kLayout__885, kLayout__886, kLayout__887}; -__device__ constexpr DoIntRoundsLayout kLayout__865 = DoIntRoundsLayout{._super = kLayout__866}; -__device__ constexpr PoseidonIntRoundsLayout kLayout__864 = - PoseidonIntRoundsLayout{._super = kLayout__629, .nextInner = kLayout__865}; -__device__ constexpr Poseidon1StateLayout kLayout__857 = - Poseidon1StateLayout{._super = kLayout__629, - .arm0 = kLayout__858, - .arm1 = kLayout__864, - .arm2 = kLayout__629, - .arm3 = kLayout__629, - .arm4 = kLayout__629, - .arm5 = kLayout__629, - .arm6 = kLayout__629, - .arm7 = kLayout__629}; -__device__ constexpr Poseidon1Layout kLayout__856 = - Poseidon1Layout{.state = kLayout__629, - .stateRedef = kLayout__857, - .arg = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/128}, - .cycle = NondetRegLayout{._super = /*offset=*/0}}}; -__device__ constexpr TopInstResultLayout kLayout__6 = TopInstResultLayout{._selector = kLayout__5, - .arm0 = kLayout__7, - .arm1 = kLayout__88, - .arm2 = kLayout__106, - .arm3 = kLayout__119, - .arm4 = kLayout__203, - .arm5 = kLayout__289, - .arm6 = kLayout__350, - .arm7 = kLayout__408, - .arm8 = kLayout__576, - .arm9 = kLayout__628, - .arm10 = kLayout__856}; -__device__ constexpr TopLayout kLayout__0 = - TopLayout{.nextPcLow = NondetRegLayout{._super = /*offset=*/12}, - .nextPcHigh = NondetRegLayout{._super = /*offset=*/13}, - .nextState_0 = NondetRegLayout{._super = /*offset=*/14}, - .nextMachineMode = NondetRegLayout{._super = /*offset=*/15}, - .isFirstCycle = NondetRegLayout{._super = /*offset=*/16}, - .cycleND = NondetRegLayout{._super = /*offset=*/0}, - .cycle = NondetRegLayout{._super = /*offset=*/0}, - .major = NondetRegLayout{._super = /*offset=*/17}, - .minor = NondetRegLayout{._super = /*offset=*/18}, - .instInput = kLayout__1, - .majorOnehot = kLayout__4, - .instResult = kLayout__6}; -__device__ constexpr DigestRegValues_SuperLayout8LayoutArray kLayout__889 = - DigestRegValues_SuperLayout8LayoutArray{ - DigestRegValues_SuperLayout{.low = NondetRegLayout{._super = /*offset=*/0}, - .high = NondetRegLayout{._super = /*offset=*/1}}, - DigestRegValues_SuperLayout{.low = NondetRegLayout{._super = /*offset=*/2}, - .high = NondetRegLayout{._super = /*offset=*/3}}, - DigestRegValues_SuperLayout{.low = NondetRegLayout{._super = /*offset=*/4}, - .high = NondetRegLayout{._super = /*offset=*/5}}, - DigestRegValues_SuperLayout{.low = NondetRegLayout{._super = /*offset=*/6}, - .high = NondetRegLayout{._super = /*offset=*/7}}, - DigestRegValues_SuperLayout{.low = NondetRegLayout{._super = /*offset=*/8}, - .high = NondetRegLayout{._super = /*offset=*/9}}, - DigestRegValues_SuperLayout{.low = NondetRegLayout{._super = /*offset=*/10}, - .high = NondetRegLayout{._super = /*offset=*/11}}, - DigestRegValues_SuperLayout{.low = NondetRegLayout{._super = /*offset=*/12}, - .high = NondetRegLayout{._super = /*offset=*/13}}, - DigestRegValues_SuperLayout{.low = NondetRegLayout{._super = /*offset=*/14}, - .high = NondetRegLayout{._super = /*offset=*/15}}}; -__device__ constexpr DigestRegLayout kLayout__888 = DigestRegLayout{.values = kLayout__889}; -__device__ constexpr DigestRegValues_SuperLayout8LayoutArray kLayout__891 = - DigestRegValues_SuperLayout8LayoutArray{ - DigestRegValues_SuperLayout{.low = NondetRegLayout{._super = /*offset=*/17}, - .high = NondetRegLayout{._super = /*offset=*/18}}, - DigestRegValues_SuperLayout{.low = NondetRegLayout{._super = /*offset=*/19}, - .high = NondetRegLayout{._super = /*offset=*/20}}, - DigestRegValues_SuperLayout{.low = NondetRegLayout{._super = /*offset=*/21}, - .high = NondetRegLayout{._super = /*offset=*/22}}, - DigestRegValues_SuperLayout{.low = NondetRegLayout{._super = /*offset=*/23}, - .high = NondetRegLayout{._super = /*offset=*/24}}, - DigestRegValues_SuperLayout{.low = NondetRegLayout{._super = /*offset=*/25}, - .high = NondetRegLayout{._super = /*offset=*/26}}, - DigestRegValues_SuperLayout{.low = NondetRegLayout{._super = /*offset=*/27}, - .high = NondetRegLayout{._super = /*offset=*/28}}, - DigestRegValues_SuperLayout{.low = NondetRegLayout{._super = /*offset=*/29}, - .high = NondetRegLayout{._super = /*offset=*/30}}, - DigestRegValues_SuperLayout{.low = NondetRegLayout{._super = /*offset=*/31}, - .high = NondetRegLayout{._super = /*offset=*/32}}}; -__device__ constexpr DigestRegLayout kLayout__890 = DigestRegLayout{.values = kLayout__891}; -__device__ constexpr DigestRegValues_SuperLayout8LayoutArray kLayout__893 = - DigestRegValues_SuperLayout8LayoutArray{ - DigestRegValues_SuperLayout{.low = NondetRegLayout{._super = /*offset=*/37}, - .high = NondetRegLayout{._super = /*offset=*/38}}, - DigestRegValues_SuperLayout{.low = NondetRegLayout{._super = /*offset=*/39}, - .high = NondetRegLayout{._super = /*offset=*/40}}, - DigestRegValues_SuperLayout{.low = NondetRegLayout{._super = /*offset=*/41}, - .high = NondetRegLayout{._super = /*offset=*/42}}, - DigestRegValues_SuperLayout{.low = NondetRegLayout{._super = /*offset=*/43}, - .high = NondetRegLayout{._super = /*offset=*/44}}, - DigestRegValues_SuperLayout{.low = NondetRegLayout{._super = /*offset=*/45}, - .high = NondetRegLayout{._super = /*offset=*/46}}, - DigestRegValues_SuperLayout{.low = NondetRegLayout{._super = /*offset=*/47}, - .high = NondetRegLayout{._super = /*offset=*/48}}, - DigestRegValues_SuperLayout{.low = NondetRegLayout{._super = /*offset=*/49}, - .high = NondetRegLayout{._super = /*offset=*/50}}, - DigestRegValues_SuperLayout{.low = NondetRegLayout{._super = /*offset=*/51}, - .high = NondetRegLayout{._super = /*offset=*/52}}}; -__device__ constexpr DigestRegLayout kLayout__892 = DigestRegLayout{.values = kLayout__893}; -__device__ constexpr DigestRegValues_SuperLayout8LayoutArray kLayout__895 = - DigestRegValues_SuperLayout8LayoutArray{ - DigestRegValues_SuperLayout{.low = NondetRegLayout{._super = /*offset=*/53}, - .high = NondetRegLayout{._super = /*offset=*/54}}, - DigestRegValues_SuperLayout{.low = NondetRegLayout{._super = /*offset=*/55}, - .high = NondetRegLayout{._super = /*offset=*/56}}, - DigestRegValues_SuperLayout{.low = NondetRegLayout{._super = /*offset=*/57}, - .high = NondetRegLayout{._super = /*offset=*/58}}, - DigestRegValues_SuperLayout{.low = NondetRegLayout{._super = /*offset=*/59}, - .high = NondetRegLayout{._super = /*offset=*/60}}, - DigestRegValues_SuperLayout{.low = NondetRegLayout{._super = /*offset=*/61}, - .high = NondetRegLayout{._super = /*offset=*/62}}, - DigestRegValues_SuperLayout{.low = NondetRegLayout{._super = /*offset=*/63}, - .high = NondetRegLayout{._super = /*offset=*/64}}, - DigestRegValues_SuperLayout{.low = NondetRegLayout{._super = /*offset=*/65}, - .high = NondetRegLayout{._super = /*offset=*/66}}, - DigestRegValues_SuperLayout{.low = NondetRegLayout{._super = /*offset=*/67}, - .high = NondetRegLayout{._super = /*offset=*/68}}}; -__device__ constexpr DigestRegLayout kLayout__894 = DigestRegLayout{.values = kLayout__895}; -__device__ constexpr _accumLayout kLayout__896 = - _accumLayout{.argU8 = Arg_ArgU8Layout{.val = /*offset=*/0}, - .argU16 = Arg_ArgU16Layout{.val = /*offset=*/4}, - .memoryArg = Arg_MemoryArgLayout{.addr = /*offset=*/8, - .cycle = /*offset=*/12, - .dataLow = /*offset=*/16, - .dataHigh = /*offset=*/20}, - .cycleArg = Arg_CycleArgLayout{.cycle = /*offset=*/24}, - ._offset = /*offset=*/28}; -__device__ constexpr LayoutAccumLayout kLayoutTestSuccRunAccum = - LayoutAccumLayout{.columns = Reg19LayoutArray{/*offset=*/0, - /*offset=*/4, - /*offset=*/8, - /*offset=*/12, - /*offset=*/16, - /*offset=*/20, - /*offset=*/24, - /*offset=*/28, - /*offset=*/32, - /*offset=*/36, - /*offset=*/40, - /*offset=*/44, - /*offset=*/48, - /*offset=*/52, - /*offset=*/56, - /*offset=*/60, - /*offset=*/64, - /*offset=*/68, - /*offset=*/72}}; -__device__ constexpr LayoutAccumLayout kLayout_TopAccum = - LayoutAccumLayout{.columns = Reg19LayoutArray{/*offset=*/0, - /*offset=*/4, - /*offset=*/8, - /*offset=*/12, - /*offset=*/16, - /*offset=*/20, - /*offset=*/24, - /*offset=*/28, - /*offset=*/32, - /*offset=*/36, - /*offset=*/40, - /*offset=*/44, - /*offset=*/48, - /*offset=*/52, - /*offset=*/56, - /*offset=*/60, - /*offset=*/64, - /*offset=*/68, - /*offset=*/72}}; -__device__ constexpr TestSuccRunLayout kLayoutTestSuccRun = TestSuccRunLayout{._0 = kLayout__0}; -__device__ constexpr TopLayout kLayout_Top = - TopLayout{.nextPcLow = NondetRegLayout{._super = /*offset=*/12}, - .nextPcHigh = NondetRegLayout{._super = /*offset=*/13}, - .nextState_0 = NondetRegLayout{._super = /*offset=*/14}, - .nextMachineMode = NondetRegLayout{._super = /*offset=*/15}, - .isFirstCycle = NondetRegLayout{._super = /*offset=*/16}, - .cycleND = NondetRegLayout{._super = /*offset=*/0}, - .cycle = NondetRegLayout{._super = /*offset=*/0}, - .major = NondetRegLayout{._super = /*offset=*/17}, - .minor = NondetRegLayout{._super = /*offset=*/18}, - .instInput = kLayout__1, - .majorOnehot = kLayout__4, - .instResult = kLayout__6}; -__device__ constexpr _globalLayout kLayoutGlobal = - _globalLayout{.input = kLayout__888, - .isTerminate = NondetRegLayout{._super = /*offset=*/16}, - .output = kLayout__890, - .rng = NondetExtRegLayout{._super = /*offset=*/33}, - .stateIn = kLayout__892, - .stateOut = kLayout__894, - .termA0high = NondetRegLayout{._super = /*offset=*/69}, - .termA0low = NondetRegLayout{._super = /*offset=*/70}, - .termA1high = NondetRegLayout{._super = /*offset=*/71}, - .termA1low = NondetRegLayout{._super = /*offset=*/72}}; -__device__ constexpr _mixLayout kLayoutMix = _mixLayout{.randomness = kLayout__896}; diff --git a/risc0/circuit/rv32im-v2-sys/kernels/cuda/layout.cuh.inc b/risc0/circuit/rv32im-v2-sys/kernels/cuda/layout.cuh.inc deleted file mode 100644 index deea9932..00000000 --- a/risc0/circuit/rv32im-v2-sys/kernels/cuda/layout.cuh.inc +++ /dev/null @@ -1,903 +0,0 @@ -extern __device__ const NondetRegLayout8LayoutArray kLayout__3; -extern __device__ const OneHot_8_Layout kLayout__2; -extern __device__ const InstInputLayout kLayout__1; -extern __device__ const NondetRegLayout11LayoutArray kLayout__5; -extern __device__ const OneHot_11_Layout kLayout__4; -extern __device__ const NondetU16RegLayout kLayout__10; -extern __device__ const NondetU16RegLayout kLayout__11; -extern __device__ const NormalizeU32Layout kLayout__9; -extern __device__ const NondetU16RegLayout kLayout__13; -extern __device__ const NondetU16RegLayout kLayout__14; -extern __device__ const NormalizeU32Layout kLayout__12; -extern __device__ const MemoryArgLayout kLayout__18; -extern __device__ const MemoryArgLayout kLayout__19; -extern __device__ const MemoryIOLayout kLayout__17; -extern __device__ const IsCycleLayout kLayout__21; -extern __device__ const IsForwardLayout kLayout__20; -extern __device__ const MemoryWriteLayout kLayout__16; -extern __device__ const WriteRdLayout kLayout__15; -extern __device__ const FinalizeMiscLayout kLayout__8; -extern __device__ const DecoderLayout kLayout__24; -extern __device__ const NondetU16RegLayout kLayout__27; -extern __device__ const U16RegLayout kLayout__26; -extern __device__ const NondetU16RegLayout kLayout__28; -extern __device__ const AddrDecomposeLayout kLayout__25; -extern __device__ const MemoryArgLayout kLayout__31; -extern __device__ const MemoryArgLayout kLayout__32; -extern __device__ const MemoryIOLayout kLayout__30; -extern __device__ const IsCycleLayout kLayout__34; -extern __device__ const IsForwardLayout kLayout__33; -extern __device__ const MemoryReadLayout kLayout__29; -extern __device__ const DecodeInstLayout kLayout__23; -extern __device__ const MemoryArgLayout kLayout__38; -extern __device__ const MemoryArgLayout kLayout__39; -extern __device__ const MemoryIOLayout kLayout__37; -extern __device__ const IsCycleLayout kLayout__41; -extern __device__ const IsForwardLayout kLayout__40; -extern __device__ const MemoryReadLayout kLayout__36; -extern __device__ const ReadRegLayout kLayout__35; -extern __device__ const MemoryArgLayout kLayout__45; -extern __device__ const MemoryArgLayout kLayout__46; -extern __device__ const MemoryIOLayout kLayout__44; -extern __device__ const IsCycleLayout kLayout__48; -extern __device__ const IsForwardLayout kLayout__47; -extern __device__ const MemoryReadLayout kLayout__43; -extern __device__ const ReadRegLayout kLayout__42; -extern __device__ const MiscInputLayout kLayout__22; -extern __device__ const ArgU16Layout5LayoutArray kLayout__50; -extern __device__ const _Arguments_Misc0MiscOutputLayout kLayout__49; -extern __device__ const Misc0MiscOutputArm0Layout kLayout__52; -extern __device__ const Misc0MiscOutputArm1Layout kLayout__53; -extern __device__ const NondetRegLayout16LayoutArray kLayout__60; -extern __device__ const ToBits_16_Layout kLayout__59; -extern __device__ const NondetRegLayout16LayoutArray kLayout__62; -extern __device__ const ToBits_16_Layout kLayout__61; -extern __device__ const BitwiseAndU16Layout kLayout__58; -extern __device__ const NondetRegLayout16LayoutArray kLayout__65; -extern __device__ const ToBits_16_Layout kLayout__64; -extern __device__ const NondetRegLayout16LayoutArray kLayout__67; -extern __device__ const ToBits_16_Layout kLayout__66; -extern __device__ const BitwiseAndU16Layout kLayout__63; -extern __device__ const BitwiseAndLayout kLayout__57; -extern __device__ const BitwiseXorLayout kLayout__56; -extern __device__ const OpXORLayout kLayout__55; -extern __device__ const Misc0MiscOutputArm2Layout kLayout__54; -extern __device__ const BitwiseOrLayout kLayout__70; -extern __device__ const OpORLayout kLayout__69; -extern __device__ const Misc0MiscOutputArm3Layout kLayout__68; -extern __device__ const OpANDLayout kLayout__72; -extern __device__ const Misc0MiscOutputArm4Layout kLayout__71; -extern __device__ const NondetU16RegLayout kLayout__76; -extern __device__ const NondetU16RegLayout kLayout__77; -extern __device__ const NormalizeU32Layout kLayout__75; -extern __device__ const NondetU16RegLayout kLayout__79; -extern __device__ const GetSignU32Layout kLayout__78; -extern __device__ const NondetU16RegLayout kLayout__81; -extern __device__ const GetSignU32Layout kLayout__80; -extern __device__ const NondetU16RegLayout kLayout__83; -extern __device__ const GetSignU32Layout kLayout__82; -extern __device__ const CmpLessThanLayout kLayout__74; -extern __device__ const OpSLTLayout kLayout__73; -extern __device__ const CmpLessThanUnsignedLayout kLayout__86; -extern __device__ const OpSLTULayout kLayout__85; -extern __device__ const Misc0MiscOutputArm6Layout kLayout__84; -extern __device__ const Misc0MiscOutputArm7Layout kLayout__87; -extern __device__ const Misc0MiscOutputLayout kLayout__51; -extern __device__ const Misc0Layout kLayout__7; -extern __device__ const _Arguments_Misc1MiscOutputLayout kLayout__89; -extern __device__ const OpXORILayout kLayout__92; -extern __device__ const Misc1MiscOutputArm0Layout kLayout__91; -extern __device__ const OpORILayout kLayout__94; -extern __device__ const Misc1MiscOutputArm1Layout kLayout__93; -extern __device__ const OpANDILayout kLayout__96; -extern __device__ const Misc1MiscOutputArm2Layout kLayout__95; -extern __device__ const OpSLTILayout kLayout__97; -extern __device__ const OpSLTIULayout kLayout__99; -extern __device__ const Misc1MiscOutputArm4Layout kLayout__98; -extern __device__ const CmpEqualLayout kLayout__102; -extern __device__ const OpBEQLayout kLayout__101; -extern __device__ const Misc1MiscOutputArm5Layout kLayout__100; -extern __device__ const OpBNELayout kLayout__104; -extern __device__ const Misc1MiscOutputArm6Layout kLayout__103; -extern __device__ const OpBLTLayout kLayout__105; -extern __device__ const Misc1MiscOutputLayout kLayout__90; -extern __device__ const Misc1Layout kLayout__88; -extern __device__ const _Arguments_Misc2MiscOutputLayout kLayout__107; -extern __device__ const OpBGELayout kLayout__109; -extern __device__ const OpBLTULayout kLayout__111; -extern __device__ const Misc2MiscOutputArm1Layout kLayout__110; -extern __device__ const OpBGEULayout kLayout__113; -extern __device__ const Misc2MiscOutputArm2Layout kLayout__112; -extern __device__ const Misc2MiscOutputArm3Layout kLayout__114; -extern __device__ const Misc2MiscOutputArm4Layout kLayout__115; -extern __device__ const Misc2MiscOutputArm5Layout kLayout__116; -extern __device__ const Misc2MiscOutputArm6Layout kLayout__117; -extern __device__ const Misc2MiscOutputArm7Layout kLayout__118; -extern __device__ const Misc2MiscOutputLayout kLayout__108; -extern __device__ const Misc2Layout kLayout__106; -extern __device__ const DecoderLayout kLayout__122; -extern __device__ const NondetU16RegLayout kLayout__125; -extern __device__ const U16RegLayout kLayout__124; -extern __device__ const NondetU16RegLayout kLayout__126; -extern __device__ const AddrDecomposeLayout kLayout__123; -extern __device__ const MemoryArgLayout kLayout__129; -extern __device__ const MemoryArgLayout kLayout__130; -extern __device__ const MemoryIOLayout kLayout__128; -extern __device__ const IsCycleLayout kLayout__132; -extern __device__ const IsForwardLayout kLayout__131; -extern __device__ const MemoryReadLayout kLayout__127; -extern __device__ const DecodeInstLayout kLayout__121; -extern __device__ const MemoryArgLayout kLayout__136; -extern __device__ const MemoryArgLayout kLayout__137; -extern __device__ const MemoryIOLayout kLayout__135; -extern __device__ const IsCycleLayout kLayout__139; -extern __device__ const IsForwardLayout kLayout__138; -extern __device__ const MemoryReadLayout kLayout__134; -extern __device__ const ReadRegLayout kLayout__133; -extern __device__ const MemoryArgLayout kLayout__143; -extern __device__ const MemoryArgLayout kLayout__144; -extern __device__ const MemoryIOLayout kLayout__142; -extern __device__ const IsCycleLayout kLayout__146; -extern __device__ const IsForwardLayout kLayout__145; -extern __device__ const MemoryReadLayout kLayout__141; -extern __device__ const ReadRegLayout kLayout__140; -extern __device__ const MulInputLayout kLayout__120; -extern __device__ const ArgU16Layout6LayoutArray kLayout__148; -extern __device__ const ArgU8Layout13LayoutArray kLayout__149; -extern __device__ const _Arguments_Mul0MulOutputLayout kLayout__147; -extern __device__ const NondetRegLayout5LayoutArray kLayout__154; -extern __device__ const ToBits_5_Layout kLayout__153; -extern __device__ const DynPo2Layout kLayout__152; -extern __device__ const NondetU8RegLayout kLayout__158; -extern __device__ const NondetU8RegLayout kLayout__159; -extern __device__ const NondetU8RegLayout kLayout__160; -extern __device__ const NondetU8RegLayout kLayout__161; -extern __device__ const NondetU8RegLayout kLayout__162; -extern __device__ const ExpandU32Layout kLayout__157; -extern __device__ const NondetU8RegLayout kLayout__164; -extern __device__ const NondetU8RegLayout kLayout__165; -extern __device__ const NondetU8RegLayout kLayout__166; -extern __device__ const NondetU8RegLayout kLayout__167; -extern __device__ const NondetU8RegLayout kLayout__168; -extern __device__ const ExpandU32Layout kLayout__163; -extern __device__ const NondetU8RegLayout kLayout__170; -extern __device__ const SplitTotalLayout kLayout__169; -extern __device__ const NondetU8RegLayout kLayout__172; -extern __device__ const SplitTotalLayout kLayout__171; -extern __device__ const NondetU8RegLayout kLayout__174; -extern __device__ const SplitTotalLayout kLayout__173; -extern __device__ const MultiplyAccumulateLayout kLayout__156; -extern __device__ const DoMulLayout kLayout__155; -extern __device__ const OpSLLLayout kLayout__151; -extern __device__ const OpSLLILayout kLayout__175; -extern __device__ const ExpandU32Layout kLayout__180; -extern __device__ const ExpandU32Layout kLayout__181; -extern __device__ const SplitTotalLayout kLayout__182; -extern __device__ const SplitTotalLayout kLayout__183; -extern __device__ const SplitTotalLayout kLayout__184; -extern __device__ const MultiplyAccumulateLayout kLayout__179; -extern __device__ const DoMulLayout kLayout__178; -extern __device__ const OpMULLayout kLayout__177; -extern __device__ const Mul0MulOutputArm2Layout kLayout__176; -extern __device__ const OpMULHLayout kLayout__186; -extern __device__ const Mul0MulOutputArm3Layout kLayout__185; -extern __device__ const OpMULHSULayout kLayout__188; -extern __device__ const Mul0MulOutputArm4Layout kLayout__187; -extern __device__ const OpMULHULayout kLayout__190; -extern __device__ const Mul0MulOutputArm5Layout kLayout__189; -extern __device__ const Mul0MulOutputArm6Layout kLayout__191; -extern __device__ const Mul0MulOutputArm7Layout kLayout__192; -extern __device__ const Mul0MulOutputLayout kLayout__150; -extern __device__ const MemoryArgLayout kLayout__196; -extern __device__ const MemoryArgLayout kLayout__197; -extern __device__ const MemoryIOLayout kLayout__195; -extern __device__ const IsCycleLayout kLayout__199; -extern __device__ const IsForwardLayout kLayout__198; -extern __device__ const MemoryWriteLayout kLayout__194; -extern __device__ const WriteRdLayout kLayout__193; -extern __device__ const NondetU16RegLayout kLayout__201; -extern __device__ const NondetU16RegLayout kLayout__202; -extern __device__ const NormalizeU32Layout kLayout__200; -extern __device__ const Mul0Layout kLayout__119; -extern __device__ const DecoderLayout kLayout__206; -extern __device__ const NondetU16RegLayout kLayout__209; -extern __device__ const U16RegLayout kLayout__208; -extern __device__ const NondetU16RegLayout kLayout__210; -extern __device__ const AddrDecomposeLayout kLayout__207; -extern __device__ const MemoryArgLayout kLayout__213; -extern __device__ const MemoryArgLayout kLayout__214; -extern __device__ const MemoryIOLayout kLayout__212; -extern __device__ const IsCycleLayout kLayout__216; -extern __device__ const IsForwardLayout kLayout__215; -extern __device__ const MemoryReadLayout kLayout__211; -extern __device__ const DecodeInstLayout kLayout__205; -extern __device__ const MemoryArgLayout kLayout__220; -extern __device__ const MemoryArgLayout kLayout__221; -extern __device__ const MemoryIOLayout kLayout__219; -extern __device__ const IsCycleLayout kLayout__223; -extern __device__ const IsForwardLayout kLayout__222; -extern __device__ const MemoryReadLayout kLayout__218; -extern __device__ const ReadRegLayout kLayout__217; -extern __device__ const MemoryArgLayout kLayout__227; -extern __device__ const MemoryArgLayout kLayout__228; -extern __device__ const MemoryIOLayout kLayout__226; -extern __device__ const IsCycleLayout kLayout__230; -extern __device__ const IsForwardLayout kLayout__229; -extern __device__ const MemoryReadLayout kLayout__225; -extern __device__ const ReadRegLayout kLayout__224; -extern __device__ const DivInputLayout kLayout__204; -extern __device__ const ArgU16Layout9LayoutArray kLayout__232; -extern __device__ const ArgU8Layout13LayoutArray kLayout__233; -extern __device__ const _Arguments_Div0MulOutputLayout kLayout__231; -extern __device__ const NondetRegLayout5LayoutArray kLayout__239; -extern __device__ const ToBits_5_Layout kLayout__238; -extern __device__ const DynPo2Layout kLayout__237; -extern __device__ const ExpandU32Layout kLayout__242; -extern __device__ const ExpandU32Layout kLayout__243; -extern __device__ const NondetU8RegLayout kLayout__245; -extern __device__ const SplitTotalLayout kLayout__244; -extern __device__ const NondetU8RegLayout kLayout__247; -extern __device__ const SplitTotalLayout kLayout__246; -extern __device__ const NondetU16RegLayout kLayout__249; -extern __device__ const NondetU8RegLayout kLayout__250; -extern __device__ const SplitTotalLayout kLayout__248; -extern __device__ const NondetU16RegLayout kLayout__251; -extern __device__ const MultiplyAccumulateLayout kLayout__241; -extern __device__ const DoDivLayout kLayout__240; -extern __device__ const OpSRLLayout kLayout__236; -extern __device__ const Div0MulOutputArm0Layout kLayout__235; -extern __device__ const TopBitLayout kLayout__253; -extern __device__ const ExpandU32Layout kLayout__256; -extern __device__ const ExpandU32Layout kLayout__257; -extern __device__ const SplitTotalLayout kLayout__258; -extern __device__ const SplitTotalLayout kLayout__259; -extern __device__ const SplitTotalLayout kLayout__260; -extern __device__ const MultiplyAccumulateLayout kLayout__255; -extern __device__ const DoDivLayout kLayout__254; -extern __device__ const OpSRALayout kLayout__252; -extern __device__ const OpSRLILayout kLayout__262; -extern __device__ const Div0MulOutputArm2Layout kLayout__261; -extern __device__ const OpSRAILayout kLayout__263; -extern __device__ const ExpandU32Layout kLayout__268; -extern __device__ const ExpandU32Layout kLayout__269; -extern __device__ const SplitTotalLayout kLayout__270; -extern __device__ const SplitTotalLayout kLayout__271; -extern __device__ const SplitTotalLayout kLayout__272; -extern __device__ const MultiplyAccumulateLayout kLayout__267; -extern __device__ const DoDivLayout kLayout__266; -extern __device__ const OpDIVLayout kLayout__265; -extern __device__ const Div0MulOutputArm4Layout kLayout__264; -extern __device__ const OpDIVULayout kLayout__274; -extern __device__ const Div0MulOutputArm5Layout kLayout__273; -extern __device__ const OpREMLayout kLayout__276; -extern __device__ const Div0MulOutputArm6Layout kLayout__275; -extern __device__ const OpREMULayout kLayout__278; -extern __device__ const Div0MulOutputArm7Layout kLayout__277; -extern __device__ const Div0MulOutputLayout kLayout__234; -extern __device__ const MemoryArgLayout kLayout__282; -extern __device__ const MemoryArgLayout kLayout__283; -extern __device__ const MemoryIOLayout kLayout__281; -extern __device__ const IsCycleLayout kLayout__285; -extern __device__ const IsForwardLayout kLayout__284; -extern __device__ const MemoryWriteLayout kLayout__280; -extern __device__ const WriteRdLayout kLayout__279; -extern __device__ const NondetU16RegLayout kLayout__287; -extern __device__ const NondetU16RegLayout kLayout__288; -extern __device__ const NormalizeU32Layout kLayout__286; -extern __device__ const Div0Layout kLayout__203; -extern __device__ const DecoderLayout kLayout__292; -extern __device__ const NondetU16RegLayout kLayout__295; -extern __device__ const U16RegLayout kLayout__294; -extern __device__ const NondetU16RegLayout kLayout__296; -extern __device__ const AddrDecomposeLayout kLayout__293; -extern __device__ const MemoryArgLayout kLayout__299; -extern __device__ const MemoryArgLayout kLayout__300; -extern __device__ const MemoryIOLayout kLayout__298; -extern __device__ const IsCycleLayout kLayout__302; -extern __device__ const IsForwardLayout kLayout__301; -extern __device__ const MemoryReadLayout kLayout__297; -extern __device__ const DecodeInstLayout kLayout__291; -extern __device__ const MemoryArgLayout kLayout__306; -extern __device__ const MemoryArgLayout kLayout__307; -extern __device__ const MemoryIOLayout kLayout__305; -extern __device__ const IsCycleLayout kLayout__309; -extern __device__ const IsForwardLayout kLayout__308; -extern __device__ const MemoryReadLayout kLayout__304; -extern __device__ const ReadRegLayout kLayout__303; -extern __device__ const NondetU16RegLayout kLayout__311; -extern __device__ const NondetU16RegLayout kLayout__312; -extern __device__ const NormalizeU32Layout kLayout__310; -extern __device__ const NondetU16RegLayout kLayout__315; -extern __device__ const U16RegLayout kLayout__314; -extern __device__ const NondetU16RegLayout kLayout__316; -extern __device__ const AddrDecomposeBitsLayout kLayout__313; -extern __device__ const MemoryArgLayout kLayout__319; -extern __device__ const MemoryArgLayout kLayout__320; -extern __device__ const MemoryIOLayout kLayout__318; -extern __device__ const IsCycleLayout kLayout__322; -extern __device__ const IsForwardLayout kLayout__321; -extern __device__ const MemoryReadLayout kLayout__317; -extern __device__ const MemLoadInputLayout kLayout__290; -extern __device__ const ArgU8Layout3LayoutArray kLayout__324; -extern __device__ const _Arguments_Mem0OutputLayout kLayout__323; -extern __device__ const NondetU8RegLayout kLayout__328; -extern __device__ const NondetU8RegLayout kLayout__329; -extern __device__ const SplitWordLayout kLayout__327; -extern __device__ const NondetU8RegLayout kLayout__330; -extern __device__ const OpLBLayout kLayout__326; -extern __device__ const OpLHLayout kLayout__332; -extern __device__ const Mem0OutputArm1Layout kLayout__331; -extern __device__ const Mem0OutputArm2Layout kLayout__333; -extern __device__ const OpLBULayout kLayout__335; -extern __device__ const Mem0OutputArm3Layout kLayout__334; -extern __device__ const Mem0OutputArm4Layout kLayout__336; -extern __device__ const Mem0OutputArm5Layout kLayout__337; -extern __device__ const Mem0OutputArm6Layout kLayout__338; -extern __device__ const Mem0OutputArm7Layout kLayout__339; -extern __device__ const Mem0OutputLayout kLayout__325; -extern __device__ const MemoryArgLayout kLayout__343; -extern __device__ const MemoryArgLayout kLayout__344; -extern __device__ const MemoryIOLayout kLayout__342; -extern __device__ const IsCycleLayout kLayout__346; -extern __device__ const IsForwardLayout kLayout__345; -extern __device__ const MemoryWriteLayout kLayout__341; -extern __device__ const WriteRdLayout kLayout__340; -extern __device__ const NondetU16RegLayout kLayout__348; -extern __device__ const NondetU16RegLayout kLayout__349; -extern __device__ const NormalizeU32Layout kLayout__347; -extern __device__ const Mem0Layout kLayout__289; -extern __device__ const DecoderLayout kLayout__353; -extern __device__ const NondetU16RegLayout kLayout__356; -extern __device__ const U16RegLayout kLayout__355; -extern __device__ const NondetU16RegLayout kLayout__357; -extern __device__ const AddrDecomposeLayout kLayout__354; -extern __device__ const MemoryArgLayout kLayout__360; -extern __device__ const MemoryArgLayout kLayout__361; -extern __device__ const MemoryIOLayout kLayout__359; -extern __device__ const IsCycleLayout kLayout__363; -extern __device__ const IsForwardLayout kLayout__362; -extern __device__ const MemoryReadLayout kLayout__358; -extern __device__ const DecodeInstLayout kLayout__352; -extern __device__ const MemoryArgLayout kLayout__367; -extern __device__ const MemoryArgLayout kLayout__368; -extern __device__ const MemoryIOLayout kLayout__366; -extern __device__ const IsCycleLayout kLayout__370; -extern __device__ const IsForwardLayout kLayout__369; -extern __device__ const MemoryReadLayout kLayout__365; -extern __device__ const ReadRegLayout kLayout__364; -extern __device__ const MemoryArgLayout kLayout__374; -extern __device__ const MemoryArgLayout kLayout__375; -extern __device__ const MemoryIOLayout kLayout__373; -extern __device__ const IsCycleLayout kLayout__377; -extern __device__ const IsForwardLayout kLayout__376; -extern __device__ const MemoryReadLayout kLayout__372; -extern __device__ const ReadRegLayout kLayout__371; -extern __device__ const NondetU16RegLayout kLayout__379; -extern __device__ const NondetU16RegLayout kLayout__380; -extern __device__ const NormalizeU32Layout kLayout__378; -extern __device__ const NondetU16RegLayout kLayout__383; -extern __device__ const U16RegLayout kLayout__382; -extern __device__ const NondetU16RegLayout kLayout__384; -extern __device__ const AddrDecomposeBitsLayout kLayout__381; -extern __device__ const MemStoreInputLayout kLayout__351; -extern __device__ const ArgU8Layout4LayoutArray kLayout__386; -extern __device__ const _Arguments_Mem1OutputLayout kLayout__385; -extern __device__ const NondetU8RegLayout kLayout__390; -extern __device__ const SplitWordLayout kLayout__389; -extern __device__ const OpSBLayout kLayout__388; -extern __device__ const Mem1OutputArm1Layout kLayout__391; -extern __device__ const Mem1OutputArm2Layout kLayout__392; -extern __device__ const Mem1OutputArm3Layout kLayout__393; -extern __device__ const Mem1OutputArm4Layout kLayout__394; -extern __device__ const Mem1OutputArm5Layout kLayout__395; -extern __device__ const Mem1OutputArm6Layout kLayout__396; -extern __device__ const Mem1OutputArm7Layout kLayout__397; -extern __device__ const Mem1OutputLayout kLayout__387; -extern __device__ const MemoryArgLayout kLayout__401; -extern __device__ const MemoryArgLayout kLayout__402; -extern __device__ const MemoryIOLayout kLayout__400; -extern __device__ const IsCycleLayout kLayout__404; -extern __device__ const IsForwardLayout kLayout__403; -extern __device__ const MemoryWriteLayout kLayout__399; -extern __device__ const MemStoreFinalizeLayout kLayout__398; -extern __device__ const NondetU16RegLayout kLayout__406; -extern __device__ const NondetU16RegLayout kLayout__407; -extern __device__ const NormalizeU32Layout kLayout__405; -extern __device__ const Mem1Layout kLayout__350; -extern __device__ const MemoryArgLayout kLayout__416; -extern __device__ const MemoryArgLayout kLayout__417; -extern __device__ const MemoryIOLayout kLayout__415; -extern __device__ const MemoryPageInLayout kLayout__414; -extern __device__ const ControlLoadRoot__0_SuperLayout kLayout__413; -extern __device__ const MemoryArgLayout kLayout__421; -extern __device__ const MemoryArgLayout kLayout__422; -extern __device__ const MemoryIOLayout kLayout__420; -extern __device__ const MemoryPageInLayout kLayout__419; -extern __device__ const ControlLoadRoot__0_SuperLayout kLayout__418; -extern __device__ const MemoryArgLayout kLayout__426; -extern __device__ const MemoryArgLayout kLayout__427; -extern __device__ const MemoryIOLayout kLayout__425; -extern __device__ const MemoryPageInLayout kLayout__424; -extern __device__ const ControlLoadRoot__0_SuperLayout kLayout__423; -extern __device__ const MemoryArgLayout kLayout__431; -extern __device__ const MemoryArgLayout kLayout__432; -extern __device__ const MemoryIOLayout kLayout__430; -extern __device__ const MemoryPageInLayout kLayout__429; -extern __device__ const ControlLoadRoot__0_SuperLayout kLayout__428; -extern __device__ const MemoryArgLayout kLayout__436; -extern __device__ const MemoryArgLayout kLayout__437; -extern __device__ const MemoryIOLayout kLayout__435; -extern __device__ const MemoryPageInLayout kLayout__434; -extern __device__ const ControlLoadRoot__0_SuperLayout kLayout__433; -extern __device__ const MemoryArgLayout kLayout__441; -extern __device__ const MemoryArgLayout kLayout__442; -extern __device__ const MemoryIOLayout kLayout__440; -extern __device__ const MemoryPageInLayout kLayout__439; -extern __device__ const ControlLoadRoot__0_SuperLayout kLayout__438; -extern __device__ const MemoryArgLayout kLayout__446; -extern __device__ const MemoryArgLayout kLayout__447; -extern __device__ const MemoryIOLayout kLayout__445; -extern __device__ const MemoryPageInLayout kLayout__444; -extern __device__ const ControlLoadRoot__0_SuperLayout kLayout__443; -extern __device__ const MemoryArgLayout kLayout__451; -extern __device__ const MemoryArgLayout kLayout__452; -extern __device__ const MemoryIOLayout kLayout__450; -extern __device__ const MemoryPageInLayout kLayout__449; -extern __device__ const ControlLoadRoot__0_SuperLayout kLayout__448; -extern __device__ const ControlLoadRoot__0_SuperLayout8LayoutArray kLayout__412; -extern __device__ const ControlLoadRootLayout kLayout__411; -extern __device__ const Control0_SuperArm0Layout kLayout__410; -extern __device__ const IsCycleLayout kLayout__460; -extern __device__ const IsForwardLayout kLayout__459; -extern __device__ const MemoryReadLayout kLayout__458; -extern __device__ const IsCycleLayout kLayout__463; -extern __device__ const IsForwardLayout kLayout__462; -extern __device__ const MemoryReadLayout kLayout__461; -extern __device__ const ControlResume_SuperArm0_SuperLayout kLayout__457; -extern __device__ const ControlResume_SuperArm0Layout kLayout__456; -extern __device__ const MemoryWriteLayout kLayout__467; -extern __device__ const ControlResume_SuperArm1_Super__0_SuperLayout kLayout__466; -extern __device__ const MemoryWriteLayout kLayout__469; -extern __device__ const ControlResume_SuperArm1_Super__0_SuperLayout kLayout__468; -extern __device__ const IsCycleLayout kLayout__473; -extern __device__ const IsForwardLayout kLayout__472; -extern __device__ const MemoryWriteLayout kLayout__471; -extern __device__ const ControlResume_SuperArm1_Super__0_SuperLayout kLayout__470; -extern __device__ const MemoryWriteLayout kLayout__475; -extern __device__ const ControlResume_SuperArm1_Super__0_SuperLayout kLayout__474; -extern __device__ const IsCycleLayout kLayout__479; -extern __device__ const IsForwardLayout kLayout__478; -extern __device__ const MemoryWriteLayout kLayout__477; -extern __device__ const ControlResume_SuperArm1_Super__0_SuperLayout kLayout__476; -extern __device__ const IsCycleLayout kLayout__483; -extern __device__ const IsForwardLayout kLayout__482; -extern __device__ const MemoryWriteLayout kLayout__481; -extern __device__ const ControlResume_SuperArm1_Super__0_SuperLayout kLayout__480; -extern __device__ const MemoryWriteLayout kLayout__485; -extern __device__ const ControlResume_SuperArm1_Super__0_SuperLayout kLayout__484; -extern __device__ const IsCycleLayout kLayout__489; -extern __device__ const IsForwardLayout kLayout__488; -extern __device__ const MemoryWriteLayout kLayout__487; -extern __device__ const ControlResume_SuperArm1_Super__0_SuperLayout kLayout__486; -extern __device__ const ControlResume_SuperArm1_Super__0_SuperLayout8LayoutArray kLayout__465; -extern __device__ const ControlResume_SuperArm1_SuperLayout kLayout__464; -extern __device__ const ControlResume_SuperLayout kLayout__455; -extern __device__ const MemoryArgLayout16LayoutArray kLayout__491; -extern __device__ const CycleArgLayout8LayoutArray kLayout__492; -extern __device__ const _Arguments_ControlResume_SuperLayout kLayout__490; -extern __device__ const ControlResumeLayout kLayout__454; -extern __device__ const Control0_SuperArm1Layout kLayout__453; -extern __device__ const NondetU16RegLayout kLayout__497; -extern __device__ const U16RegLayout kLayout__496; -extern __device__ const NondetU16RegLayout kLayout__498; -extern __device__ const AddrDecomposeBitsLayout kLayout__495; -extern __device__ const NondetU16RegLayout kLayout__500; -extern __device__ const U16RegLayout kLayout__499; -extern __device__ const MemoryReadLayout kLayout__501; -extern __device__ const ControlUserECALLLayout kLayout__494; -extern __device__ const Control0_SuperArm2Layout kLayout__493; -extern __device__ const NondetU16RegLayout kLayout__505; -extern __device__ const NormalizeU32Layout kLayout__504; -extern __device__ const ControlMRETLayout kLayout__503; -extern __device__ const Control0_SuperArm3Layout kLayout__502; -extern __device__ const MemoryReadLayout kLayout__511; -extern __device__ const MemoryReadLayout kLayout__512; -extern __device__ const MemoryReadLayout kLayout__513; -extern __device__ const MemoryReadLayout kLayout__514; -extern __device__ const MemoryReadLayout kLayout__515; -extern __device__ const MemoryReadLayout8LayoutArray kLayout__510; -extern __device__ const ControlSuspend_SuperArm0_SuperLayout kLayout__509; -extern __device__ const ControlSuspend_SuperArm1_SuperLayout kLayout__517; -extern __device__ const ControlSuspend_SuperArm1Layout kLayout__516; -extern __device__ const ControlSuspend_SuperLayout kLayout__508; -extern __device__ const _Arguments_ControlSuspend_SuperLayout kLayout__518; -extern __device__ const ControlSuspendLayout kLayout__507; -extern __device__ const Control0_SuperArm4Layout kLayout__506; -extern __device__ const MemoryPageOutLayout kLayout__522; -extern __device__ const MemoryPageOutLayout kLayout__523; -extern __device__ const MemoryPageOutLayout kLayout__524; -extern __device__ const MemoryPageOutLayout kLayout__525; -extern __device__ const MemoryPageOutLayout kLayout__526; -extern __device__ const MemoryPageOutLayout kLayout__527; -extern __device__ const MemoryPageOutLayout kLayout__528; -extern __device__ const MemoryPageOutLayout kLayout__529; -extern __device__ const MemoryPageOutLayout8LayoutArray kLayout__521; -extern __device__ const ControlStoreRootLayout kLayout__520; -extern __device__ const Control0_SuperArm5Layout kLayout__519; -extern __device__ const ControlTable_SuperArm0_Super__0_SuperLayout kLayout__536; -extern __device__ const ControlTable_SuperArm0_Super__0_SuperLayout kLayout__537; -extern __device__ const ControlTable_SuperArm0_Super__0_SuperLayout kLayout__538; -extern __device__ const ControlTable_SuperArm0_Super__0_SuperLayout kLayout__539; -extern __device__ const ControlTable_SuperArm0_Super__0_SuperLayout kLayout__540; -extern __device__ const ControlTable_SuperArm0_Super__0_SuperLayout kLayout__541; -extern __device__ const ControlTable_SuperArm0_Super__0_SuperLayout kLayout__542; -extern __device__ const ControlTable_SuperArm0_Super__0_SuperLayout kLayout__543; -extern __device__ const ControlTable_SuperArm0_Super__0_SuperLayout kLayout__544; -extern __device__ const ControlTable_SuperArm0_Super__0_SuperLayout kLayout__545; -extern __device__ const ControlTable_SuperArm0_Super__0_SuperLayout kLayout__546; -extern __device__ const ControlTable_SuperArm0_Super__0_SuperLayout kLayout__547; -extern __device__ const ControlTable_SuperArm0_Super__0_SuperLayout kLayout__548; -extern __device__ const ControlTable_SuperArm0_Super__0_SuperLayout kLayout__549; -extern __device__ const ControlTable_SuperArm0_Super__0_SuperLayout kLayout__550; -extern __device__ const ControlTable_SuperArm0_Super__0_SuperLayout kLayout__551; -extern __device__ const ControlTable_SuperArm0_Super__0_SuperLayout16LayoutArray kLayout__535; -extern __device__ const ControlTable_SuperArm0_SuperLayout kLayout__534; -extern __device__ const ControlTable_SuperArm0Layout kLayout__533; -extern __device__ const ControlTable_SuperArm1_Super__0_SuperLayout kLayout__555; -extern __device__ const ControlTable_SuperArm1_Super__0_SuperLayout kLayout__556; -extern __device__ const ControlTable_SuperArm1_Super__0_SuperLayout kLayout__557; -extern __device__ const ControlTable_SuperArm1_Super__0_SuperLayout kLayout__558; -extern __device__ const ControlTable_SuperArm1_Super__0_SuperLayout kLayout__559; -extern __device__ const ControlTable_SuperArm1_Super__0_SuperLayout kLayout__560; -extern __device__ const ControlTable_SuperArm1_Super__0_SuperLayout kLayout__561; -extern __device__ const ControlTable_SuperArm1_Super__0_SuperLayout kLayout__562; -extern __device__ const ControlTable_SuperArm1_Super__0_SuperLayout kLayout__563; -extern __device__ const ControlTable_SuperArm1_Super__0_SuperLayout kLayout__564; -extern __device__ const ControlTable_SuperArm1_Super__0_SuperLayout kLayout__565; -extern __device__ const ControlTable_SuperArm1_Super__0_SuperLayout kLayout__566; -extern __device__ const ControlTable_SuperArm1_Super__0_SuperLayout kLayout__567; -extern __device__ const ControlTable_SuperArm1_Super__0_SuperLayout kLayout__568; -extern __device__ const ControlTable_SuperArm1_Super__0_SuperLayout kLayout__569; -extern __device__ const ControlTable_SuperArm1_Super__0_SuperLayout kLayout__570; -extern __device__ const ControlTable_SuperArm1_Super__0_SuperLayout16LayoutArray kLayout__554; -extern __device__ const ControlTable_SuperArm1_SuperLayout kLayout__553; -extern __device__ const ControlTable_SuperArm1Layout kLayout__552; -extern __device__ const ControlTable_SuperLayout kLayout__532; -extern __device__ const ArgU16Layout16LayoutArray kLayout__572; -extern __device__ const ArgU8Layout16LayoutArray kLayout__573; -extern __device__ const _Arguments_ControlTable_SuperLayout kLayout__571; -extern __device__ const ControlTableLayout kLayout__531; -extern __device__ const Control0_SuperArm6Layout kLayout__530; -extern __device__ const Control0_SuperArm7Layout kLayout__574; -extern __device__ const Control0_SuperLayout kLayout__409; -extern __device__ const _Arguments_Control0_SuperLayout kLayout__575; -extern __device__ const Control0Layout kLayout__408; -extern __device__ const NondetU16RegLayout kLayout__579; -extern __device__ const U16RegLayout kLayout__578; -extern __device__ const AddrDecomposeBitsLayout kLayout__577; -extern __device__ const MemoryArgLayout8LayoutArray kLayout__581; -extern __device__ const CycleArgLayout4LayoutArray kLayout__582; -extern __device__ const ArgU16Layout2LayoutArray kLayout__583; -extern __device__ const _Arguments_ECall0OutputLayout kLayout__580; -extern __device__ const IsCycleLayout kLayout__589; -extern __device__ const IsForwardLayout kLayout__588; -extern __device__ const MemoryReadLayout kLayout__587; -extern __device__ const IsCycleLayout kLayout__592; -extern __device__ const IsForwardLayout kLayout__591; -extern __device__ const MemoryReadLayout kLayout__590; -extern __device__ const NondetRegLayout4LayoutArray kLayout__594; -extern __device__ const OneHot_4_Layout kLayout__593; -extern __device__ const MachineECallLayout kLayout__586; -extern __device__ const ECall0OutputArm0Layout kLayout__585; -extern __device__ const ECallTerminateLayout kLayout__596; -extern __device__ const ECall0OutputArm1Layout kLayout__595; -extern __device__ const IsCycleLayout kLayout__600; -extern __device__ const IsForwardLayout kLayout__599; -extern __device__ const MemoryReadLayout kLayout__598; -extern __device__ const NondetU16RegLayout kLayout__601; -extern __device__ const NondetU16RegLayout kLayout__603; -extern __device__ const U16RegLayout kLayout__602; -extern __device__ const MemoryWriteLayout kLayout__604; -extern __device__ const NondetRegLayout4LayoutArray kLayout__607; -extern __device__ const OneHot_4_Layout kLayout__606; -extern __device__ const DecomposeLow2Layout kLayout__605; -extern __device__ const NondetRegLayout4LayoutArray kLayout__610; -extern __device__ const OneHot_4_Layout kLayout__609; -extern __device__ const DecomposeLow2Layout kLayout__608; -extern __device__ const ECallHostReadSetupLayout kLayout__597; -extern __device__ const ECallHostWriteLayout kLayout__611; -extern __device__ const ECall0OutputArm4Layout kLayout__612; -extern __device__ const MemoryWriteUnconstrainedLayout kLayout__617; -extern __device__ const ECallHostReadWords__0_SuperLayout kLayout__616; -extern __device__ const MemoryWriteUnconstrainedLayout kLayout__619; -extern __device__ const ECallHostReadWords__0_SuperLayout kLayout__618; -extern __device__ const MemoryWriteUnconstrainedLayout kLayout__621; -extern __device__ const ECallHostReadWords__0_SuperLayout kLayout__620; -extern __device__ const MemoryWriteUnconstrainedLayout kLayout__623; -extern __device__ const ECallHostReadWords__0_SuperLayout kLayout__622; -extern __device__ const ECallHostReadWords__0_SuperLayout4LayoutArray kLayout__615; -extern __device__ const ECallHostReadWordsLayout kLayout__614; -extern __device__ const ECall0OutputArm5Layout kLayout__613; -extern __device__ const ECall0OutputArm6Layout kLayout__624; -extern __device__ const ECall0OutputArm7Layout kLayout__625; -extern __device__ const ECall0OutputLayout kLayout__584; -extern __device__ const NondetU16RegLayout kLayout__627; -extern __device__ const NormalizeU32Layout kLayout__626; -extern __device__ const ECall0Layout kLayout__576; -extern __device__ const NondetRegLayout24LayoutArray kLayout__630; -extern __device__ const PoseidonStateLayout kLayout__629; -extern __device__ const MemoryArgLayout kLayout__633; -extern __device__ const MemoryArgLayout kLayout__634; -extern __device__ const MemoryArgLayout kLayout__635; -extern __device__ const MemoryArgLayout kLayout__636; -extern __device__ const MemoryArgLayout kLayout__637; -extern __device__ const MemoryArgLayout kLayout__638; -extern __device__ const MemoryArgLayout kLayout__639; -extern __device__ const MemoryArgLayout kLayout__640; -extern __device__ const MemoryArgLayout kLayout__641; -extern __device__ const MemoryArgLayout kLayout__642; -extern __device__ const MemoryArgLayout kLayout__643; -extern __device__ const MemoryArgLayout kLayout__644; -extern __device__ const MemoryArgLayout kLayout__645; -extern __device__ const MemoryArgLayout kLayout__646; -extern __device__ const MemoryArgLayout kLayout__647; -extern __device__ const MemoryArgLayout kLayout__648; -extern __device__ const MemoryArgLayout16LayoutArray kLayout__632; -extern __device__ const CycleArgLayout8LayoutArray kLayout__649; -extern __device__ const ArgU16Layout16LayoutArray kLayout__650; -extern __device__ const ArgU8Layout2LayoutArray kLayout__651; -extern __device__ const _Arguments_Poseidon0StateLayout kLayout__631; -extern __device__ const PoseidonEntry_SuperArm0Layout kLayout__656; -extern __device__ const MemoryIOLayout kLayout__660; -extern __device__ const IsCycleLayout kLayout__662; -extern __device__ const IsForwardLayout kLayout__661; -extern __device__ const MemoryReadLayout kLayout__659; -extern __device__ const ReadAddrLayout kLayout__658; -extern __device__ const MemoryIOLayout kLayout__665; -extern __device__ const IsCycleLayout kLayout__667; -extern __device__ const IsForwardLayout kLayout__666; -extern __device__ const MemoryReadLayout kLayout__664; -extern __device__ const ReadAddrLayout kLayout__663; -extern __device__ const MemoryIOLayout kLayout__670; -extern __device__ const IsCycleLayout kLayout__672; -extern __device__ const IsForwardLayout kLayout__671; -extern __device__ const MemoryReadLayout kLayout__669; -extern __device__ const ReadAddrLayout kLayout__668; -extern __device__ const MemoryIOLayout kLayout__674; -extern __device__ const IsCycleLayout kLayout__676; -extern __device__ const IsForwardLayout kLayout__675; -extern __device__ const MemoryReadLayout kLayout__673; -extern __device__ const PoseidonEcallLayout kLayout__657; -extern __device__ const PoseidonEntry_SuperLayout kLayout__655; -extern __device__ const MemoryArgLayout8LayoutArray kLayout__678; -extern __device__ const CycleArgLayout4LayoutArray kLayout__679; -extern __device__ const _Arguments_PoseidonEntry_SuperLayout kLayout__677; -extern __device__ const PoseidonEntryLayout kLayout__654; -extern __device__ const Poseidon0StateArm0Layout kLayout__653; -extern __device__ const ReadElemLayout kLayout__683; -extern __device__ const ReadElemLayout kLayout__684; -extern __device__ const ReadElemLayout kLayout__685; -extern __device__ const ReadElemLayout kLayout__686; -extern __device__ const MemoryIOLayout kLayout__689; -extern __device__ const IsCycleLayout kLayout__691; -extern __device__ const IsForwardLayout kLayout__690; -extern __device__ const MemoryReadLayout kLayout__688; -extern __device__ const ReadElemLayout kLayout__687; -extern __device__ const MemoryIOLayout kLayout__694; -extern __device__ const IsCycleLayout kLayout__696; -extern __device__ const IsForwardLayout kLayout__695; -extern __device__ const MemoryReadLayout kLayout__693; -extern __device__ const ReadElemLayout kLayout__692; -extern __device__ const MemoryIOLayout kLayout__699; -extern __device__ const IsCycleLayout kLayout__701; -extern __device__ const IsForwardLayout kLayout__700; -extern __device__ const MemoryReadLayout kLayout__698; -extern __device__ const ReadElemLayout kLayout__697; -extern __device__ const MemoryIOLayout kLayout__704; -extern __device__ const IsCycleLayout kLayout__706; -extern __device__ const IsForwardLayout kLayout__705; -extern __device__ const MemoryReadLayout kLayout__703; -extern __device__ const ReadElemLayout kLayout__702; -extern __device__ const ReadElemLayout8LayoutArray kLayout__682; -extern __device__ const PoseidonLoadStateLayout kLayout__681; -extern __device__ const Poseidon0StateArm1Layout kLayout__680; -extern __device__ const OneHot_3_Layout kLayout__711; -extern __device__ const MemoryPageInLayout kLayout__716; -extern __device__ const MemoryGet_SuperArm1Layout kLayout__715; -extern __device__ const MemoryPageOutLayout kLayout__717; -extern __device__ const MemoryGet_SuperLayout kLayout__714; -extern __device__ const MemoryArgLayout2LayoutArray kLayout__719; -extern __device__ const _Arguments_MemoryGet_SuperLayout kLayout__718; -extern __device__ const MemoryGetLayout kLayout__713; -extern __device__ const MemoryPageInLayout kLayout__723; -extern __device__ const MemoryGet_SuperArm1Layout kLayout__722; -extern __device__ const MemoryPageOutLayout kLayout__724; -extern __device__ const MemoryGet_SuperLayout kLayout__721; -extern __device__ const MemoryArgLayout2LayoutArray kLayout__726; -extern __device__ const _Arguments_MemoryGet_SuperLayout kLayout__725; -extern __device__ const MemoryGetLayout kLayout__720; -extern __device__ const MemoryPageInLayout kLayout__730; -extern __device__ const MemoryGet_SuperArm1Layout kLayout__729; -extern __device__ const MemoryPageOutLayout kLayout__731; -extern __device__ const MemoryGet_SuperLayout kLayout__728; -extern __device__ const MemoryArgLayout2LayoutArray kLayout__733; -extern __device__ const _Arguments_MemoryGet_SuperLayout kLayout__732; -extern __device__ const MemoryGetLayout kLayout__727; -extern __device__ const MemoryPageInLayout kLayout__737; -extern __device__ const MemoryGet_SuperArm1Layout kLayout__736; -extern __device__ const MemoryPageOutLayout kLayout__738; -extern __device__ const MemoryGet_SuperLayout kLayout__735; -extern __device__ const MemoryArgLayout2LayoutArray kLayout__740; -extern __device__ const _Arguments_MemoryGet_SuperLayout kLayout__739; -extern __device__ const MemoryGetLayout kLayout__734; -extern __device__ const MemoryPageInLayout kLayout__744; -extern __device__ const MemoryGet_SuperArm1Layout kLayout__743; -extern __device__ const MemoryPageOutLayout kLayout__745; -extern __device__ const MemoryGet_SuperLayout kLayout__742; -extern __device__ const MemoryArgLayout2LayoutArray kLayout__747; -extern __device__ const _Arguments_MemoryGet_SuperLayout kLayout__746; -extern __device__ const MemoryGetLayout kLayout__741; -extern __device__ const MemoryPageInLayout kLayout__751; -extern __device__ const MemoryGet_SuperArm1Layout kLayout__750; -extern __device__ const MemoryPageOutLayout kLayout__752; -extern __device__ const MemoryGet_SuperLayout kLayout__749; -extern __device__ const MemoryArgLayout2LayoutArray kLayout__754; -extern __device__ const _Arguments_MemoryGet_SuperLayout kLayout__753; -extern __device__ const MemoryGetLayout kLayout__748; -extern __device__ const MemoryPageInLayout kLayout__758; -extern __device__ const MemoryGet_SuperArm1Layout kLayout__757; -extern __device__ const MemoryPageOutLayout kLayout__759; -extern __device__ const MemoryGet_SuperLayout kLayout__756; -extern __device__ const MemoryArgLayout2LayoutArray kLayout__761; -extern __device__ const _Arguments_MemoryGet_SuperLayout kLayout__760; -extern __device__ const MemoryGetLayout kLayout__755; -extern __device__ const MemoryPageInLayout kLayout__765; -extern __device__ const MemoryGet_SuperArm1Layout kLayout__764; -extern __device__ const MemoryPageOutLayout kLayout__766; -extern __device__ const MemoryGet_SuperLayout kLayout__763; -extern __device__ const MemoryArgLayout2LayoutArray kLayout__768; -extern __device__ const _Arguments_MemoryGet_SuperLayout kLayout__767; -extern __device__ const MemoryGetLayout kLayout__762; -extern __device__ const MemoryGetLayout8LayoutArray kLayout__712; -extern __device__ const PoseidonLoadInShortLayout kLayout__710; -extern __device__ const PoseidonLoadInLowLayout kLayout__769; -extern __device__ const PoseidonLoadInHighLayout kLayout__770; -extern __device__ const PoseidonLoadIn_SuperLayout kLayout__709; -extern __device__ const OneHot_3_Layout kLayout__771; -extern __device__ const _Arguments_PoseidonLoadIn_SuperLayout kLayout__772; -extern __device__ const PoseidonLoadInLayout kLayout__708; -extern __device__ const Poseidon0StateArm2Layout kLayout__707; -extern __device__ const Poseidon0StateArm3Layout kLayout__773; -extern __device__ const Poseidon0StateArm4Layout kLayout__774; -extern __device__ const PoseidonCheckOut__0_SuperLayout kLayout__781; -extern __device__ const PoseidonCheckOut__0_SuperLayout kLayout__782; -extern __device__ const PoseidonCheckOut__0_SuperLayout kLayout__783; -extern __device__ const PoseidonCheckOut__0_SuperLayout kLayout__784; -extern __device__ const PoseidonCheckOut__0_SuperLayout kLayout__785; -extern __device__ const PoseidonCheckOut__0_SuperLayout kLayout__786; -extern __device__ const PoseidonCheckOut__0_SuperLayout kLayout__787; -extern __device__ const PoseidonCheckOut__0_SuperLayout kLayout__788; -extern __device__ const PoseidonCheckOut__0_SuperLayout8LayoutArray kLayout__780; -extern __device__ const PoseidonCheckOutLayout kLayout__779; -extern __device__ const PoseidonDoOut_SuperArm0Layout kLayout__778; -extern __device__ const NondetU16RegLayout kLayout__792; -extern __device__ const NondetU16RegLayout kLayout__794; -extern __device__ const U16RegLayout kLayout__793; -extern __device__ const MemoryWriteLayout kLayout__795; -extern __device__ const PoseidonStoreOut__0_SuperLayout kLayout__791; -extern __device__ const NondetU16RegLayout kLayout__797; -extern __device__ const NondetU16RegLayout kLayout__799; -extern __device__ const U16RegLayout kLayout__798; -extern __device__ const MemoryWriteLayout kLayout__800; -extern __device__ const PoseidonStoreOut__0_SuperLayout kLayout__796; -extern __device__ const NondetU16RegLayout kLayout__802; -extern __device__ const U16RegLayout kLayout__803; -extern __device__ const MemoryWriteLayout kLayout__804; -extern __device__ const PoseidonStoreOut__0_SuperLayout kLayout__801; -extern __device__ const NondetU16RegLayout kLayout__806; -extern __device__ const NondetU16RegLayout kLayout__808; -extern __device__ const U16RegLayout kLayout__807; -extern __device__ const MemoryWriteLayout kLayout__809; -extern __device__ const PoseidonStoreOut__0_SuperLayout kLayout__805; -extern __device__ const NondetU16RegLayout kLayout__811; -extern __device__ const NondetU16RegLayout kLayout__813; -extern __device__ const U16RegLayout kLayout__812; -extern __device__ const MemoryWriteLayout kLayout__814; -extern __device__ const PoseidonStoreOut__0_SuperLayout kLayout__810; -extern __device__ const NondetU16RegLayout kLayout__817; -extern __device__ const U16RegLayout kLayout__816; -extern __device__ const MemoryWriteLayout kLayout__818; -extern __device__ const PoseidonStoreOut__0_SuperLayout kLayout__815; -extern __device__ const NondetU16RegLayout kLayout__820; -extern __device__ const NondetU16RegLayout kLayout__822; -extern __device__ const U16RegLayout kLayout__821; -extern __device__ const MemoryWriteLayout kLayout__823; -extern __device__ const PoseidonStoreOut__0_SuperLayout kLayout__819; -extern __device__ const NondetU16RegLayout kLayout__825; -extern __device__ const NondetU16RegLayout kLayout__827; -extern __device__ const U16RegLayout kLayout__826; -extern __device__ const MemoryWriteLayout kLayout__828; -extern __device__ const PoseidonStoreOut__0_SuperLayout kLayout__824; -extern __device__ const PoseidonStoreOut__0_SuperLayout8LayoutArray kLayout__790; -extern __device__ const PoseidonStoreOutLayout kLayout__789; -extern __device__ const PoseidonDoOut_SuperLayout kLayout__777; -extern __device__ const _Arguments_PoseidonDoOut_SuperLayout kLayout__829; -extern __device__ const PoseidonDoOutLayout kLayout__776; -extern __device__ const Poseidon0StateArm5Layout kLayout__775; -extern __device__ const PoseidonPaging_SuperLayout kLayout__832; -extern __device__ const NondetRegLayout6LayoutArray kLayout__834; -extern __device__ const OneHot_6_Layout kLayout__833; -extern __device__ const NondetU8RegLayout kLayout__837; -extern __device__ const U8RegLayout kLayout__836; -extern __device__ const IsU24Layout kLayout__835; -extern __device__ const _Arguments_PoseidonPaging__1Layout kLayout__838; -extern __device__ const NondetU8RegLayout kLayout__843; -extern __device__ const U8RegLayout kLayout__842; -extern __device__ const IsU24Layout kLayout__841; -extern __device__ const PoseidonPaging__1Arm0_SuperLayout kLayout__840; -extern __device__ const PoseidonPaging__1Arm1_SuperLayout kLayout__844; -extern __device__ const PoseidonPaging__1Layout kLayout__839; -extern __device__ const PoseidonPagingLayout kLayout__831; -extern __device__ const Poseidon0StateArm6Layout kLayout__830; -extern __device__ const PoseidonStoreState__0_SuperLayout kLayout__848; -extern __device__ const PoseidonStoreState__0_SuperLayout kLayout__849; -extern __device__ const PoseidonStoreState__0_SuperLayout kLayout__850; -extern __device__ const PoseidonStoreState__0_SuperLayout kLayout__851; -extern __device__ const PoseidonStoreState__0_SuperLayout kLayout__852; -extern __device__ const PoseidonStoreState__0_SuperLayout kLayout__853; -extern __device__ const PoseidonStoreState__0_SuperLayout kLayout__854; -extern __device__ const PoseidonStoreState__0_SuperLayout kLayout__855; -extern __device__ const PoseidonStoreState__0_SuperLayout8LayoutArray kLayout__847; -extern __device__ const PoseidonStoreStateLayout kLayout__846; -extern __device__ const Poseidon0StateArm7Layout kLayout__845; -extern __device__ const Poseidon0StateLayout kLayout__652; -extern __device__ const Poseidon0Layout kLayout__628; -extern __device__ const SBoxLayout24LayoutArray kLayout__861; -extern __device__ const DoExtRoundLayout kLayout__860; -extern __device__ const NondetRegLayout8LayoutArray kLayout__863; -extern __device__ const OneHot_8_Layout kLayout__862; -extern __device__ const DoExtRoundByIdxLayout kLayout__859; -extern __device__ const PoseidonExtRoundLayout kLayout__858; -extern __device__ const DoIntRoundLayout kLayout__867; -extern __device__ const DoIntRoundLayout kLayout__868; -extern __device__ const DoIntRoundLayout kLayout__869; -extern __device__ const DoIntRoundLayout kLayout__870; -extern __device__ const DoIntRoundLayout kLayout__871; -extern __device__ const DoIntRoundLayout kLayout__872; -extern __device__ const DoIntRoundLayout kLayout__873; -extern __device__ const DoIntRoundLayout kLayout__874; -extern __device__ const DoIntRoundLayout kLayout__875; -extern __device__ const DoIntRoundLayout kLayout__876; -extern __device__ const DoIntRoundLayout kLayout__877; -extern __device__ const DoIntRoundLayout kLayout__878; -extern __device__ const DoIntRoundLayout kLayout__879; -extern __device__ const DoIntRoundLayout kLayout__880; -extern __device__ const DoIntRoundLayout kLayout__881; -extern __device__ const DoIntRoundLayout kLayout__882; -extern __device__ const DoIntRoundLayout kLayout__883; -extern __device__ const DoIntRoundLayout kLayout__884; -extern __device__ const DoIntRoundLayout kLayout__885; -extern __device__ const DoIntRoundLayout kLayout__886; -extern __device__ const DoIntRoundLayout kLayout__887; -extern __device__ const DoIntRoundLayout21LayoutArray kLayout__866; -extern __device__ const DoIntRoundsLayout kLayout__865; -extern __device__ const PoseidonIntRoundsLayout kLayout__864; -extern __device__ const Poseidon1StateLayout kLayout__857; -extern __device__ const Poseidon1Layout kLayout__856; -extern __device__ const TopInstResultLayout kLayout__6; -extern __device__ const TopLayout kLayout__0; -extern __device__ const DigestRegValues_SuperLayout8LayoutArray kLayout__889; -extern __device__ const DigestRegLayout kLayout__888; -extern __device__ const DigestRegValues_SuperLayout8LayoutArray kLayout__891; -extern __device__ const DigestRegLayout kLayout__890; -extern __device__ const DigestRegValues_SuperLayout8LayoutArray kLayout__893; -extern __device__ const DigestRegLayout kLayout__892; -extern __device__ const DigestRegValues_SuperLayout8LayoutArray kLayout__895; -extern __device__ const DigestRegLayout kLayout__894; -extern __device__ const _accumLayout kLayout__896; -extern __device__ const LayoutAccumLayout kLayoutTestSuccRunAccum; -extern __device__ const LayoutAccumLayout kLayout_TopAccum; -extern __device__ const TestSuccRunLayout kLayoutTestSuccRun; -extern __device__ const TopLayout kLayout_Top; -extern __device__ const _globalLayout kLayoutGlobal; -extern __device__ const _mixLayout kLayoutMix; diff --git a/risc0/circuit/rv32im-v2-sys/kernels/cuda/preflight.h b/risc0/circuit/rv32im-v2-sys/kernels/cuda/preflight.h deleted file mode 100644 index 146253f7..00000000 --- a/risc0/circuit/rv32im-v2-sys/kernels/cuda/preflight.h +++ /dev/null @@ -1,49 +0,0 @@ -// Copyright 2024 RISC Zero, Inc. -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include - -namespace risc0::circuit::rv32im_v2::cuda { - -struct MemoryTransaction { - uint32_t addr; - uint32_t cycle; - uint32_t word; - uint32_t prevCycle; - uint32_t prevWord; -}; - -struct PreflightCycle { - uint32_t state; - uint32_t pc; - uint8_t major; - uint8_t minor; - uint8_t machineMode; - uint8_t padding; - uint32_t userCycle; - uint32_t txnIdx; - uint32_t pagingIdx; - uint32_t diffCount; -}; - -struct PreflightTrace { - PreflightCycle* cycles; - MemoryTransaction* txns; - uint32_t txnsLen; - uint32_t tableSplitCycle; -}; - -} // namespace risc0::circuit::rv32im_v2::cuda diff --git a/risc0/circuit/rv32im-v2-sys/kernels/cuda/steps.cu b/risc0/circuit/rv32im-v2-sys/kernels/cuda/steps.cu deleted file mode 100644 index 4885fcd7..00000000 --- a/risc0/circuit/rv32im-v2-sys/kernels/cuda/steps.cu +++ /dev/null @@ -1,18541 +0,0 @@ -// Copyright 2024 RISC Zero, Inc. -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#include "steps.cuh" -#include "witgen.h" - -namespace risc0::circuit::rv32im_v2::cuda { - -__device__ NondetRegStruct back_NondetReg(ExecContext& ctx, - Index distance0, - BoundLayout layout1) { - NondetRegStruct x2 = NondetRegStruct{._super = LOAD(LAYOUT_LOOKUP(layout1, _super), distance0)}; - return x2; -} -__device__ NondetRegStruct exec_NondetReg(ExecContext& ctx, - Val arg0, - BoundLayout layout1) { - STORE(LAYOUT_LOOKUP(layout1, _super), arg0); - NondetRegStruct x2 = NondetRegStruct{._super = LOAD(LAYOUT_LOOKUP(layout1, _super), 0)}; - return x2; -} -__device__ NondetExtRegStruct back_NondetExtReg(ExecContext& ctx, - Index distance0, - BoundLayout layout1) { - NondetExtRegStruct x2 = - NondetExtRegStruct{._super = LOAD_EXT(LAYOUT_LOOKUP(layout1, _super), distance0)}; - return x2; -} -__device__ NondetExtRegStruct exec_NondetExtReg(ExecContext& ctx, - ExtVal arg0, - BoundLayout layout1) { - STORE_EXT(LAYOUT_LOOKUP(layout1, _super), arg0); - NondetExtRegStruct x2 = NondetExtRegStruct{._super = LOAD_EXT(LAYOUT_LOOKUP(layout1, _super), 0)}; - return x2; -} -__device__ RegStruct back_Reg(ExecContext& ctx, - Index distance0, - BoundLayout layout1) { - // Reg(:4) - NondetRegStruct x2 = back_NondetReg(ctx, distance0, layout1); - return RegStruct{._super = x2}; -} -__device__ RegStruct exec_Reg(ExecContext& ctx, Val arg0, BoundLayout layout1) { - NondetRegStruct x2 = exec_NondetReg(ctx, arg0, layout1); - // Reg(:5) - EQZ((arg0 - x2._super), "Reg(:5)"); - return RegStruct{._super = x2}; -} -__device__ NondetExtRegStruct back_ExtReg(ExecContext& ctx, - Index distance0, - BoundLayout layout1) { - // ExtReg(:10) - NondetExtRegStruct x2 = back_NondetExtReg(ctx, distance0, layout1); - return x2; -} -__device__ NondetExtRegStruct exec_ExtReg(ExecContext& ctx, - ExtVal arg0, - BoundLayout layout1) { - NondetExtRegStruct x2 = exec_NondetExtReg(ctx, arg0, layout1); - // ExtReg(:11) - EQZ((x2._super - arg0), "loc(callsite(unknown at ExtReg ( :11:11)))"); - return x2; -} -__device__ NondetRegStruct exec_NondetBitReg(ExecContext& ctx, - Val arg0, - BoundLayout layout1) { - // NondetBitReg(zirgen/circuit/rv32im/v2/dsl/bits.zir:11) - NondetRegStruct x2 = exec_NondetReg(ctx, arg0, layout1); - // AssertBit(zirgen/circuit/rv32im/v2/dsl/bits.zir:6) - // NondetBitReg(zirgen/circuit/rv32im/v2/dsl/bits.zir:12) - Val x3 = (x2._super * (Val(1) - x2._super)); - EQZ(x3, - "loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at NondetBitReg ( " - "zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13)))"); - return x2; -} -__device__ BitRegStruct exec_BitReg(ExecContext& ctx, - Val arg0, - BoundLayout layout1) { - // BitReg(zirgen/circuit/rv32im/v2/dsl/bits.zir:17) - NondetRegStruct x2 = exec_NondetBitReg(ctx, arg0, layout1); - // BitReg(zirgen/circuit/rv32im/v2/dsl/bits.zir:18) - EQZ((arg0 - x2._super), "BitReg(zirgen/circuit/rv32im/v2/dsl/bits.zir:18)"); - return BitRegStruct{}; -} -__device__ NondetRegStruct exec_NondetTwitReg(ExecContext& ctx, - Val arg0, - BoundLayout layout1) { - // NondetTwitReg(zirgen/circuit/rv32im/v2/dsl/bits.zir:48) - NondetRegStruct x2 = exec_NondetReg(ctx, arg0, layout1); - // AssertTwit(zirgen/circuit/rv32im/v2/dsl/bits.zir:35) - // NondetTwitReg(zirgen/circuit/rv32im/v2/dsl/bits.zir:49) - Val x3 = (x2._super * (Val(1) - x2._super)); - Val x4 = ((x3 * (Val(2) - x2._super)) * (Val(3) - x2._super)); - EQZ(x4, - "loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at NondetTwitReg " - "( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14)))"); - return x2; -} -__device__ NondetFakeTwitRegStruct -exec_NondetFakeTwitReg(ExecContext& ctx, Val arg0, BoundLayout layout1) { - // NondetFakeTwitReg(zirgen/circuit/rv32im/v2/dsl/bits.zir:55) - NondetRegStruct x2 = exec_NondetBitReg(ctx, bitAnd(arg0, Val(1)), LAYOUT_LOOKUP(layout1, reg0)); - // NondetFakeTwitReg(zirgen/circuit/rv32im/v2/dsl/bits.zir:56) - NondetRegStruct x3 = exec_NondetBitReg( - ctx, (bitAnd(arg0, Val(2)) * Val(1006632961)), LAYOUT_LOOKUP(layout1, reg1)); - // NondetFakeTwitReg(zirgen/circuit/rv32im/v2/dsl/bits.zir:57) - Val x4 = ((x3._super * Val(2)) + x2._super); - return NondetFakeTwitRegStruct{._super = x4}; -} -__device__ FakeTwitRegStruct exec_FakeTwitReg(ExecContext& ctx, - Val arg0, - BoundLayout layout1) { - // FakeTwitReg(zirgen/circuit/rv32im/v2/dsl/bits.zir:67) - NondetFakeTwitRegStruct x2 = exec_NondetFakeTwitReg(ctx, arg0, layout1); - // FakeTwitReg(zirgen/circuit/rv32im/v2/dsl/bits.zir:68) - EQZ((arg0 - x2._super), "FakeTwitReg(zirgen/circuit/rv32im/v2/dsl/bits.zir:68)"); - return FakeTwitRegStruct{}; -} -__device__ NondetRegStruct exec_IsZero(ExecContext& ctx, - Val arg0, - BoundLayout layout1) { - // IsZero(zirgen/circuit/rv32im/v2/dsl/is_zero.zir:8) - NondetRegStruct x2 = exec_NondetReg(ctx, isz(arg0), LAYOUT_LOOKUP(layout1, _super)); - // IsZero(zirgen/circuit/rv32im/v2/dsl/is_zero.zir:11) - NondetRegStruct x3 = exec_NondetReg(ctx, inv_0(arg0), LAYOUT_LOOKUP(layout1, inv)); - // AssertBit(zirgen/circuit/rv32im/v2/dsl/bits.zir:6) - // IsZero(zirgen/circuit/rv32im/v2/dsl/is_zero.zir:14) - Val x4 = (Val(1) - x2._super); - EQZ((x2._super * x4), - "loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at IsZero ( " - "zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13)))"); - // IsZero(zirgen/circuit/rv32im/v2/dsl/is_zero.zir:16) - EQZ(((arg0 * x3._super) - x4), "IsZero(zirgen/circuit/rv32im/v2/dsl/is_zero.zir:16)"); - // IsZero(zirgen/circuit/rv32im/v2/dsl/is_zero.zir:18) - EQZ((x2._super * arg0), "IsZero(zirgen/circuit/rv32im/v2/dsl/is_zero.zir:18)"); - // IsZero(zirgen/circuit/rv32im/v2/dsl/is_zero.zir:20) - EQZ((x2._super * x3._super), "IsZero(zirgen/circuit/rv32im/v2/dsl/is_zero.zir:20)"); - return x2; -} -__device__ ArgU8Struct exec_ArgU8(ExecContext& ctx, - Val arg0, - Val arg1, - BoundLayout layout2) { - // ArgU8(zirgen/circuit/rv32im/v2/dsl/lookups.zir:8) - NondetRegStruct x3 = exec_NondetReg(ctx, arg0, LAYOUT_LOOKUP(layout2, count)); - // ArgU8(zirgen/circuit/rv32im/v2/dsl/lookups.zir:9) - NondetRegStruct x4 = exec_NondetReg(ctx, arg1, LAYOUT_LOOKUP(layout2, val)); - // LookupDelta(zirgen/circuit/rv32im/v2/dsl/lookups.zir:4) - // ArgU8(zirgen/circuit/rv32im/v2/dsl/lookups.zir:10) - INVOKE_EXTERN(ctx, lookupDelta, Val(8), x4._super, x3._super); - return ArgU8Struct{.count = x3, .val = x4}; -} -__device__ NondetRegStruct exec_NondetU8Reg(ExecContext& ctx, - Val arg0, - BoundLayout layout1) { - // NondetU8Reg(zirgen/circuit/rv32im/v2/dsl/lookups.zir:15) - ArgU8Struct x2 = exec_ArgU8(ctx, Val(1), arg0, LAYOUT_LOOKUP(layout1, arg)); - // NondetU8Reg(zirgen/circuit/rv32im/v2/dsl/lookups.zir:16) - Val x3 = (x2.count._super - Val(1)); - EQZ(x3, "NondetU8Reg(zirgen/circuit/rv32im/v2/dsl/lookups.zir:16)"); - return x2.val; -} -__device__ U8RegStruct exec_U8Reg(ExecContext& ctx, Val arg0, BoundLayout layout1) { - // U8Reg(zirgen/circuit/rv32im/v2/dsl/lookups.zir:22) - NondetRegStruct x2 = exec_NondetU8Reg(ctx, arg0, LAYOUT_LOOKUP(layout1, ret)); - // U8Reg(zirgen/circuit/rv32im/v2/dsl/lookups.zir:23) - EQZ((x2._super - arg0), "U8Reg(zirgen/circuit/rv32im/v2/dsl/lookups.zir:23)"); - return U8RegStruct{}; -} -__device__ ArgU16Struct exec_ArgU16(ExecContext& ctx, - Val arg0, - Val arg1, - BoundLayout layout2) { - // ArgU16(zirgen/circuit/rv32im/v2/dsl/lookups.zir:28) - NondetRegStruct x3 = exec_NondetReg(ctx, arg0, LAYOUT_LOOKUP(layout2, count)); - // ArgU16(zirgen/circuit/rv32im/v2/dsl/lookups.zir:29) - NondetRegStruct x4 = exec_NondetReg(ctx, arg1, LAYOUT_LOOKUP(layout2, val)); - // LookupDelta(zirgen/circuit/rv32im/v2/dsl/lookups.zir:4) - // ArgU16(zirgen/circuit/rv32im/v2/dsl/lookups.zir:30) - INVOKE_EXTERN(ctx, lookupDelta, Val(16), x4._super, x3._super); - return ArgU16Struct{.count = x3, .val = x4}; -} -__device__ NondetRegStruct exec_NondetU16Reg(ExecContext& ctx, - Val arg0, - BoundLayout layout1) { - // NondetU16Reg(zirgen/circuit/rv32im/v2/dsl/lookups.zir:35) - ArgU16Struct x2 = exec_ArgU16(ctx, Val(1), arg0, LAYOUT_LOOKUP(layout1, arg)); - // NondetU16Reg(zirgen/circuit/rv32im/v2/dsl/lookups.zir:36) - Val x3 = (x2.count._super - Val(1)); - EQZ(x3, "NondetU16Reg(zirgen/circuit/rv32im/v2/dsl/lookups.zir:36)"); - return x2.val; -} -__device__ U16RegStruct exec_U16Reg(ExecContext& ctx, Val arg0, BoundLayout layout1) { - // U16Reg(zirgen/circuit/rv32im/v2/dsl/lookups.zir:42) - NondetRegStruct x2 = exec_NondetU16Reg(ctx, arg0, LAYOUT_LOOKUP(layout1, ret)); - // U16Reg(zirgen/circuit/rv32im/v2/dsl/lookups.zir:43) - EQZ((x2._super - arg0), "U16Reg(zirgen/circuit/rv32im/v2/dsl/lookups.zir:43)"); - return U16RegStruct{._super = arg0}; -} -__device__ ToBits_5_Struct exec_ToBits_5_(ExecContext& ctx, - Val arg0, - BoundLayout layout1) { - // ToBits(zirgen/circuit/rv32im/v2/dsl/po2.zir:31) - NondetRegStruct5Array x2 = - map(Val5Array{Val(0), Val(1), Val(2), Val(3), Val(4)}, - LAYOUT_LOOKUP(layout1, _super), - ([&](Val5Array::value_type x3, BoundLayout x4) { - // Div(:16) - Val x5 = inv_0(Val16Array{Val(1), - Val(2), - Val(4), - Val(8), - Val(16), - Val(32), - Val(64), - Val(128), - Val(256), - Val(512), - Val(1024), - Val(2048), - Val(4096), - Val(8192), - Val(16384), - Val(32768)}[to_size_t(x3)]); - // Div(:17) - EQZ(((x5 * Val16Array{Val(1), - Val(2), - Val(4), - Val(8), - Val(16), - Val(32), - Val(64), - Val(128), - Val(256), - Val(512), - Val(1024), - Val(2048), - Val(4096), - Val(8192), - Val(16384), - Val(32768)}[to_size_t(x3)]) - - Val(1)), - "loc(callsite( Div ( :17:22) at ToBits ( " - "zirgen/circuit/rv32im/v2/dsl/po2.zir :31:43)))"); - NondetRegStruct x6 = - exec_NondetBitReg(ctx, - (x5 * bitAnd(arg0, - Val16Array{Val(1), - Val(2), - Val(4), - Val(8), - Val(16), - Val(32), - Val(64), - Val(128), - Val(256), - Val(512), - Val(1024), - Val(2048), - Val(4096), - Val(8192), - Val(16384), - Val(32768)}[to_size_t(x3)])), - x4); - return x6; - })); - return ToBits_5_Struct{._super = x2}; -} -__device__ ValU32Struct exec_DynPo2(ExecContext& ctx, Val arg0, BoundLayout layout1) { - // DynPo2(zirgen/circuit/rv32im/v2/dsl/po2.zir:44) - ToBits_5_Struct x2 = exec_ToBits_5_(ctx, arg0, LAYOUT_LOOKUP(layout1, low5)); - // FromBits(zirgen/circuit/rv32im/v2/dsl/po2.zir:35) - // DynPo2(zirgen/circuit/rv32im/v2/dsl/po2.zir:45) - Val x3 = (x2._super[1]._super * Val(2)); - Val x4 = (x2._super[2]._super * Val(4)); - Val x5 = (x2._super[3]._super * Val(8)); - Val x6 = (x2._super[4]._super * Val(16)); - Val x7 = (x2._super[0]._super + x3); - Val x8 = (((x7 + x4) + x5) + x6); - // DynPo2(zirgen/circuit/rv32im/v2/dsl/po2.zir:46) - NondetRegStruct x9 = - exec_NondetU16Reg(ctx, ((arg0 - x8) * Val(1950351361)), LAYOUT_LOOKUP(layout1, checkU16)); - // DynPo2(zirgen/circuit/rv32im/v2/dsl/po2.zir:47) - Val x10 = ((x9._super * Val(32)) + x8); - EQZ((x10 - arg0), "DynPo2(zirgen/circuit/rv32im/v2/dsl/po2.zir:47)"); - // CondMul(zirgen/circuit/rv32im/v2/dsl/po2.zir:39) - // DynPo2(zirgen/circuit/rv32im/v2/dsl/po2.zir:48) - Val x11 = (x2._super[0]._super * Val(2)); - Val x12 = (Val(1) - x2._super[0]._super); - Val x13 = (x11 + x12); - // DynPo2(zirgen/circuit/rv32im/v2/dsl/po2.zir:49) - Val x14 = (x2._super[1]._super * x13); - Val x15 = (Val(1) - x2._super[1]._super); - Val x16 = ((x14 * Val(4)) + (x15 * x13)); - // DynPo2(zirgen/circuit/rv32im/v2/dsl/po2.zir:50) - Val x17 = (x2._super[2]._super * x16); - Val x18 = (Val(1) - x2._super[2]._super); - RegStruct x19 = exec_Reg(ctx, ((x17 * Val(16)) + (x18 * x16)), LAYOUT_LOOKUP(layout1, b3)); - // CondMul(zirgen/circuit/rv32im/v2/dsl/po2.zir:39) - // DynPo2(zirgen/circuit/rv32im/v2/dsl/po2.zir:51) - Val x20 = (x2._super[3]._super * x19._super._super); - Val x21 = (Val(1) - x2._super[3]._super); - Val x22 = ((x20 * Val(256)) + (x21 * x19._super._super)); - // DynPo2(zirgen/circuit/rv32im/v2/dsl/po2.zir:52) - Val x23 = (Val(1) - x2._super[4]._super); - RegStruct x24 = exec_Reg(ctx, (x23 * x22), LAYOUT_LOOKUP(layout1, low)); - // DynPo2(zirgen/circuit/rv32im/v2/dsl/po2.zir:53) - Val x25 = (x2._super[4]._super * x22); - RegStruct x26 = exec_Reg(ctx, x25, LAYOUT_LOOKUP(layout1, high)); - // ValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:10) - // DynPo2(zirgen/circuit/rv32im/v2/dsl/po2.zir:54) - ValU32Struct x27 = ValU32Struct{.low = x24._super._super, .high = x26._super._super}; - return x27; -} -__device__ NormalizeU32Struct exec_NormalizeU32(ExecContext& ctx, - DenormedValU32Struct arg0, - BoundLayout layout1) { - // NormalizeU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:44) - NondetRegStruct x2 = - exec_NondetU16Reg(ctx, bitAnd(arg0.low, Val(65535)), LAYOUT_LOOKUP(layout1, low16)); - // Div(:19) - // NormalizeU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:45) - Val x3 = (bitAnd(arg0.low, Val(65536)) * Val(2013235201)); - NondetRegStruct x4 = exec_NondetBitReg(ctx, x3, LAYOUT_LOOKUP(layout1, lowCarry)); - // NormalizeU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:46) - Val x5 = ((x4._super * Val(65536)) + x2._super); - EQZ((arg0.low - x5), "NormalizeU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:46)"); - // NormalizeU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:48) - Val x6 = (arg0.high + x4._super); - // NormalizeU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:50) - NondetRegStruct x7 = - exec_NondetU16Reg(ctx, bitAnd(x6, Val(65535)), LAYOUT_LOOKUP(layout1, high16)); - // NormalizeU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:51) - NondetRegStruct x8 = exec_NondetBitReg( - ctx, (bitAnd(x6, Val(65536)) * Val(2013235201)), LAYOUT_LOOKUP(layout1, highCarry)); - // NormalizeU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:52) - Val x9 = ((x8._super * Val(65536)) + x7._super); - EQZ((x6 - x9), "NormalizeU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:52)"); - // NormalizeU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:42) - NormalizeU32Struct x10 = - NormalizeU32Struct{._super = ValU32Struct{.low = x2._super, .high = x7._super}, .carry = x8}; - return x10; -} -__device__ AddrDecomposeStruct exec_AddrDecompose(ExecContext& ctx, - ValU32Struct arg0, - Val arg1, - BoundLayout layout2) { - // AddrDecompose(zirgen/circuit/rv32im/v2/dsl/u32.zir:63) - NondetRegStruct x3 = - exec_NondetTwitReg(ctx, bitAnd(arg0.low, Val(3)), LAYOUT_LOOKUP(layout2, low2)); - // AddrDecompose(zirgen/circuit/rv32im/v2/dsl/u32.zir:65) - Val x4 = ((Val(1) - arg1) * Val(49151)); - Val x5 = (((arg1 * Val(65535)) + x4) - arg0.high); - U16RegStruct x6 = exec_U16Reg(ctx, x5, LAYOUT_LOOKUP(layout2, upperDiff)); - // AddrDecompose(zirgen/circuit/rv32im/v2/dsl/u32.zir:67) - NondetRegStruct x7 = exec_IsZero(ctx, arg0.high, LAYOUT_LOOKUP(layout2, _0)); - EQZ(x7._super, "AddrDecompose(zirgen/circuit/rv32im/v2/dsl/u32.zir:67)"); - // Div(:19) - // AddrDecompose(zirgen/circuit/rv32im/v2/dsl/u32.zir:69) - Val x8 = ((arg0.low - x3._super) * Val(1509949441)); - NondetRegStruct x9 = exec_NondetU16Reg(ctx, x8, LAYOUT_LOOKUP(layout2, med14)); - // AddrDecompose(zirgen/circuit/rv32im/v2/dsl/u32.zir:71) - Val x10 = ((x9._super * Val(4)) + x3._super); - EQZ((x10 - arg0.low), "AddrDecompose(zirgen/circuit/rv32im/v2/dsl/u32.zir:71)"); - // AddrDecompose(zirgen/circuit/rv32im/v2/dsl/u32.zir:73) - Val x11 = ((arg0.high * Val(16384)) + x9._super); - return AddrDecomposeStruct{._super = x11, .low2 = x3}; -} -__device__ AddrDecomposeBitsStruct exec_AddrDecomposeBits( - ExecContext& ctx, ValU32Struct arg0, Val arg1, BoundLayout layout2) { - // AddrDecomposeBits(zirgen/circuit/rv32im/v2/dsl/u32.zir:81) - NondetRegStruct x3 = - exec_NondetBitReg(ctx, bitAnd(arg0.low, Val(1)), LAYOUT_LOOKUP(layout2, low0)); - // Div(:19) - // AddrDecomposeBits(zirgen/circuit/rv32im/v2/dsl/u32.zir:82) - Val x4 = (bitAnd(arg0.low, Val(2)) * Val(1006632961)); - NondetRegStruct x5 = exec_NondetBitReg(ctx, x4, LAYOUT_LOOKUP(layout2, low1)); - // AddrDecomposeBits(zirgen/circuit/rv32im/v2/dsl/u32.zir:83) - Val x6 = ((x5._super * Val(2)) + x3._super); - // AddrDecomposeBits(zirgen/circuit/rv32im/v2/dsl/u32.zir:85) - Val x7 = ((Val(1) - arg1) * Val(49151)); - Val x8 = (((arg1 * Val(65535)) + x7) - arg0.high); - U16RegStruct x9 = exec_U16Reg(ctx, x8, LAYOUT_LOOKUP(layout2, upperDiff)); - // AddrDecomposeBits(zirgen/circuit/rv32im/v2/dsl/u32.zir:87) - NondetRegStruct x10 = exec_IsZero(ctx, arg0.high, LAYOUT_LOOKUP(layout2, _0)); - EQZ(x10._super, "AddrDecomposeBits(zirgen/circuit/rv32im/v2/dsl/u32.zir:87)"); - // Div(:19) - // AddrDecomposeBits(zirgen/circuit/rv32im/v2/dsl/u32.zir:89) - Val x11 = ((arg0.low - x6) * Val(1509949441)); - NondetRegStruct x12 = exec_NondetU16Reg(ctx, x11, LAYOUT_LOOKUP(layout2, med14)); - // AddrDecomposeBits(zirgen/circuit/rv32im/v2/dsl/u32.zir:91) - Val x13 = ((x12._super * Val(4)) + x6); - EQZ((x13 - arg0.low), "AddrDecomposeBits(zirgen/circuit/rv32im/v2/dsl/u32.zir:91)"); - // AddrDecomposeBits(zirgen/circuit/rv32im/v2/dsl/u32.zir:93) - Val x14 = ((arg0.high * Val(16384)) + x12._super); - return AddrDecomposeBitsStruct{._super = x14, .low0 = x3, .low1 = x5, .low2 = x6, .addr = x14}; -} -__device__ CmpEqualStruct exec_CmpEqual(ExecContext& ctx, - ValU32Struct arg0, - ValU32Struct arg1, - BoundLayout layout2) { - // CmpEqual(zirgen/circuit/rv32im/v2/dsl/u32.zir:112) - NondetRegStruct x3 = exec_IsZero(ctx, (arg0.low - arg1.low), LAYOUT_LOOKUP(layout2, lowSame)); - // CmpEqual(zirgen/circuit/rv32im/v2/dsl/u32.zir:113) - NondetRegStruct x4 = exec_IsZero(ctx, (arg0.high - arg1.high), LAYOUT_LOOKUP(layout2, highSame)); - // CmpEqual(zirgen/circuit/rv32im/v2/dsl/u32.zir:114) - RegStruct x5 = exec_Reg(ctx, (x3._super * x4._super), LAYOUT_LOOKUP(layout2, isEqual)); - return CmpEqualStruct{.isEqual = x5}; -} -__device__ CmpLessThanUnsignedStruct -exec_CmpLessThanUnsigned(ExecContext& ctx, - ValU32Struct arg0, - ValU32Struct arg1, - BoundLayout layout2) { - // SubU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:33) - // CmpLessThanUnsigned(zirgen/circuit/rv32im/v2/dsl/u32.zir:119) - Val x3 = ((arg0.low + Val(65536)) - arg1.low); - Val x4 = ((arg0.high + Val(65535)) - arg1.high); - NormalizeU32Struct x5 = exec_NormalizeU32( - ctx, DenormedValU32Struct{.low = x3, .high = x4}, LAYOUT_LOOKUP(layout2, diff)); - // CmpLessThanUnsigned(zirgen/circuit/rv32im/v2/dsl/u32.zir:120) - Val x6 = (Val(1) - x5.carry._super); - return CmpLessThanUnsignedStruct{.isLessThan = x6}; -} -__device__ NondetRegStruct exec_GetSignU32(ExecContext& ctx, - ValU32Struct arg0, - BoundLayout layout1) { - // Div(:19) - // GetSignU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:125) - Val x2 = (bitAnd(arg0.high, Val(32768)) * Val(2013204481)); - NondetRegStruct x3 = exec_NondetBitReg(ctx, x2, LAYOUT_LOOKUP(layout1, _super)); - // GetSignU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:126) - Val x4 = (bitAnd(arg0.high, Val(32767)) * Val(2)); - NondetRegStruct x5 = exec_NondetU16Reg(ctx, x4, LAYOUT_LOOKUP(layout1, restTimesTwo)); - // GetSignU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:127) - Val x6 = ((x3._super * Val(32768)) + (x5._super * Val(1006632961))); - EQZ((arg0.high - x6), "GetSignU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:127)"); - return x3; -} -__device__ CmpLessThanStruct exec_CmpLessThan(ExecContext& ctx, - ValU32Struct arg0, - ValU32Struct arg1, - BoundLayout layout2) { - // SubU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:33) - // CmpLessThan(zirgen/circuit/rv32im/v2/dsl/u32.zir:133) - Val x3 = ((arg0.low + Val(65536)) - arg1.low); - Val x4 = ((arg0.high + Val(65535)) - arg1.high); - NormalizeU32Struct x5 = exec_NormalizeU32( - ctx, DenormedValU32Struct{.low = x3, .high = x4}, LAYOUT_LOOKUP(layout2, diff)); - // CmpLessThan(zirgen/circuit/rv32im/v2/dsl/u32.zir:134) - NondetRegStruct x6 = exec_GetSignU32(ctx, arg0, LAYOUT_LOOKUP(layout2, s1)); - // CmpLessThan(zirgen/circuit/rv32im/v2/dsl/u32.zir:135) - NondetRegStruct x7 = exec_GetSignU32(ctx, arg1, LAYOUT_LOOKUP(layout2, s2)); - // CmpLessThan(zirgen/circuit/rv32im/v2/dsl/u32.zir:136) - NondetRegStruct x8 = exec_GetSignU32(ctx, x5._super, LAYOUT_LOOKUP(layout2, s3)); - // CmpLessThan(zirgen/circuit/rv32im/v2/dsl/u32.zir:138) - Val x9 = (x6._super * (Val(1) - x7._super)); - Val x10 = ((Val(1) - x6._super) * x7._super); - RegStruct x11 = exec_Reg( - ctx, ((x9 * (Val(1) - x8._super)) + (x10 * x8._super)), LAYOUT_LOOKUP(layout2, overflow)); - // CmpLessThan(zirgen/circuit/rv32im/v2/dsl/u32.zir:140) - Val x12 = (x11._super._super + x8._super); - Val x13 = (x11._super._super * Val(2)); - RegStruct x14 = exec_Reg(ctx, (x12 - (x13 * x8._super)), LAYOUT_LOOKUP(layout2, isLessThan)); - return CmpLessThanStruct{.isLessThan = x14}; -} -__device__ ToBits_16_Struct exec_ToBits_16_(ExecContext& ctx, - Val arg0, - BoundLayout layout1) { - // ToBits(zirgen/circuit/rv32im/v2/dsl/po2.zir:31) - NondetRegStruct16Array x2 = map( - Val16Array{Val(0), - Val(1), - Val(2), - Val(3), - Val(4), - Val(5), - Val(6), - Val(7), - Val(8), - Val(9), - Val(10), - Val(11), - Val(12), - Val(13), - Val(14), - Val(15)}, - LAYOUT_LOOKUP(layout1, _super), - ([&](Val16Array::value_type x3, BoundLayout x4) { - // Div(:16) - Val x5 = inv_0(Val16Array{Val(1), - Val(2), - Val(4), - Val(8), - Val(16), - Val(32), - Val(64), - Val(128), - Val(256), - Val(512), - Val(1024), - Val(2048), - Val(4096), - Val(8192), - Val(16384), - Val(32768)}[to_size_t(x3)]); - // Div(:17) - EQZ(((x5 * Val16Array{Val(1), - Val(2), - Val(4), - Val(8), - Val(16), - Val(32), - Val(64), - Val(128), - Val(256), - Val(512), - Val(1024), - Val(2048), - Val(4096), - Val(8192), - Val(16384), - Val(32768)}[to_size_t(x3)]) - - Val(1)), - "loc(callsite( Div ( :17:22) at ToBits ( " - "zirgen/circuit/rv32im/v2/dsl/po2.zir :31:43)))"); - NondetRegStruct x6 = exec_NondetBitReg(ctx, - (x5 * bitAnd(arg0, - Val16Array{Val(1), - Val(2), - Val(4), - Val(8), - Val(16), - Val(32), - Val(64), - Val(128), - Val(256), - Val(512), - Val(1024), - Val(2048), - Val(4096), - Val(8192), - Val(16384), - Val(32768)}[to_size_t(x3)])), - x4); - return x6; - })); - return ToBits_16_Struct{._super = x2}; -} -__device__ FromBits_16_Struct exec_BitwiseAndU16(ExecContext& ctx, - Val arg0, - Val arg1, - BoundLayout layout2) { - // BitwiseAndU16(zirgen/circuit/rv32im/v2/dsl/u32.zir:144) - ToBits_16_Struct x3 = exec_ToBits_16_(ctx, arg0, LAYOUT_LOOKUP(layout2, bitsX)); - // FromBits(zirgen/circuit/rv32im/v2/dsl/po2.zir:35) - // BitwiseAndU16(zirgen/circuit/rv32im/v2/dsl/u32.zir:145) - Val x4 = (x3._super[1]._super * Val(2)); - Val x5 = (x3._super[2]._super * Val(4)); - Val x6 = (x3._super[3]._super * Val(8)); - Val x7 = (x3._super[4]._super * Val(16)); - Val x8 = (x3._super[5]._super * Val(32)); - Val x9 = (x3._super[6]._super * Val(64)); - Val x10 = (x3._super[7]._super * Val(128)); - Val x11 = (x3._super[8]._super * Val(256)); - Val x12 = (x3._super[9]._super * Val(512)); - Val x13 = (x3._super[10]._super * Val(1024)); - Val x14 = (x3._super[11]._super * Val(2048)); - Val x15 = (x3._super[12]._super * Val(4096)); - Val x16 = (x3._super[13]._super * Val(8192)); - Val x17 = (x3._super[14]._super * Val(16384)); - Val x18 = (x3._super[15]._super * Val(32768)); - Val x19 = (x3._super[0]._super + x4); - Val x20 = (((x19 + x5) + x6) + x7); - Val x21 = (((x20 + x8) + x9) + x10); - Val x22 = (((x21 + x11) + x12) + x13); - Val x23 = (((x22 + x14) + x15) + x16); - EQZ((arg0 - ((x23 + x17) + x18)), "BitwiseAndU16(zirgen/circuit/rv32im/v2/dsl/u32.zir:145)"); - // BitwiseAndU16(zirgen/circuit/rv32im/v2/dsl/u32.zir:146) - ToBits_16_Struct x24 = exec_ToBits_16_(ctx, arg1, LAYOUT_LOOKUP(layout2, bitsY)); - // FromBits(zirgen/circuit/rv32im/v2/dsl/po2.zir:35) - // BitwiseAndU16(zirgen/circuit/rv32im/v2/dsl/u32.zir:147) - Val x25 = (x24._super[1]._super * Val(2)); - Val x26 = (x24._super[2]._super * Val(4)); - Val x27 = (x24._super[3]._super * Val(8)); - Val x28 = (x24._super[4]._super * Val(16)); - Val x29 = (x24._super[5]._super * Val(32)); - Val x30 = (x24._super[6]._super * Val(64)); - Val x31 = (x24._super[7]._super * Val(128)); - Val x32 = (x24._super[8]._super * Val(256)); - Val x33 = (x24._super[9]._super * Val(512)); - Val x34 = (x24._super[10]._super * Val(1024)); - Val x35 = (x24._super[11]._super * Val(2048)); - Val x36 = (x24._super[12]._super * Val(4096)); - Val x37 = (x24._super[13]._super * Val(8192)); - Val x38 = (x24._super[14]._super * Val(16384)); - Val x39 = (x24._super[15]._super * Val(32768)); - Val x40 = (x24._super[0]._super + x25); - Val x41 = (((x40 + x26) + x27) + x28); - Val x42 = (((x41 + x29) + x30) + x31); - Val x43 = (((x42 + x32) + x33) + x34); - Val x44 = (((x43 + x35) + x36) + x37); - EQZ((arg1 - ((x44 + x38) + x39)), "BitwiseAndU16(zirgen/circuit/rv32im/v2/dsl/u32.zir:147)"); - // BitwiseAndU16(zirgen/circuit/rv32im/v2/dsl/u32.zir:148) - Val x45 = (x3._super[0]._super * x24._super[0]._super); - Val x46 = (x3._super[1]._super * x24._super[1]._super); - Val x47 = (x3._super[2]._super * x24._super[2]._super); - Val x48 = (x3._super[3]._super * x24._super[3]._super); - Val x49 = (x3._super[4]._super * x24._super[4]._super); - Val x50 = (x3._super[5]._super * x24._super[5]._super); - Val x51 = (x3._super[6]._super * x24._super[6]._super); - Val x52 = (x3._super[7]._super * x24._super[7]._super); - Val x53 = (x3._super[8]._super * x24._super[8]._super); - Val x54 = (x3._super[9]._super * x24._super[9]._super); - Val x55 = (x3._super[10]._super * x24._super[10]._super); - Val x56 = (x3._super[11]._super * x24._super[11]._super); - Val x57 = (x3._super[12]._super * x24._super[12]._super); - Val x58 = (x3._super[13]._super * x24._super[13]._super); - Val x59 = (x3._super[14]._super * x24._super[14]._super); - Val x60 = (x3._super[15]._super * x24._super[15]._super); - // FromBits(zirgen/circuit/rv32im/v2/dsl/po2.zir:35) - // BitwiseAndU16(zirgen/circuit/rv32im/v2/dsl/u32.zir:149) - Val x61 = (((x45 + (x46 * Val(2))) + (x47 * Val(4))) + (x48 * Val(8))); - Val x62 = (((x61 + (x49 * Val(16))) + (x50 * Val(32))) + (x51 * Val(64))); - Val x63 = (((x62 + (x52 * Val(128))) + (x53 * Val(256))) + (x54 * Val(512))); - Val x64 = (((x63 + (x55 * Val(1024))) + (x56 * Val(2048))) + (x57 * Val(4096))); - Val x65 = (((x64 + (x58 * Val(8192))) + (x59 * Val(16384))) + (x60 * Val(32768))); - return FromBits_16_Struct{._super = x65}; -} -__device__ ValU32Struct exec_BitwiseAnd(ExecContext& ctx, - ValU32Struct arg0, - ValU32Struct arg1, - BoundLayout layout2) { - // BitwiseAnd(zirgen/circuit/rv32im/v2/dsl/u32.zir:155) - FromBits_16_Struct x3 = exec_BitwiseAndU16(ctx, arg0.low, arg1.low, LAYOUT_LOOKUP(layout2, _0)); - FromBits_16_Struct x4 = exec_BitwiseAndU16(ctx, arg0.high, arg1.high, LAYOUT_LOOKUP(layout2, _1)); - return ValU32Struct{.low = x3._super, .high = x4._super}; -} -__device__ ValU32Struct exec_BitwiseOr(ExecContext& ctx, - ValU32Struct arg0, - ValU32Struct arg1, - BoundLayout layout2) { - // BitwiseOr(zirgen/circuit/rv32im/v2/dsl/u32.zir:159) - ValU32Struct x3 = exec_BitwiseAnd(ctx, arg0, arg1, LAYOUT_LOOKUP(layout2, andXy)); - // BitwiseOr(zirgen/circuit/rv32im/v2/dsl/u32.zir:160) - Val x4 = ((arg0.low + arg1.low) - x3.low); - Val x5 = ((arg0.high + arg1.high) - x3.high); - return ValU32Struct{.low = x4, .high = x5}; -} -__device__ ValU32Struct exec_BitwiseXor(ExecContext& ctx, - ValU32Struct arg0, - ValU32Struct arg1, - BoundLayout layout2) { - // BitwiseXor(zirgen/circuit/rv32im/v2/dsl/u32.zir:164) - ValU32Struct x3 = exec_BitwiseAnd(ctx, arg0, arg1, LAYOUT_LOOKUP(layout2, andXy)); - // BitwiseXor(zirgen/circuit/rv32im/v2/dsl/u32.zir:165) - Val x4 = ((arg0.low + arg1.low) - (x3.low * Val(2))); - Val x5 = ((arg0.high + arg1.high) - (x3.high * Val(2))); - return ValU32Struct{.low = x4, .high = x5}; -} -__device__ DecoderStruct exec_Decoder(ExecContext& ctx, - ValU32Struct arg0, - BoundLayout layout1) { - // Div(:19) - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:15) - Val x2 = (bitAnd(arg0.high, Val(32768)) * Val(2013204481)); - NondetRegStruct x3 = exec_NondetBitReg(ctx, x2, LAYOUT_LOOKUP(layout1, _f7_6)); - // Div(:19) - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:16) - Val x4 = (bitAnd(arg0.high, Val(24576)) * Val(2013020161)); - NondetRegStruct x5 = exec_NondetTwitReg(ctx, x4, LAYOUT_LOOKUP(layout1, _f7_45)); - // Div(:19) - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:17) - Val x6 = (bitAnd(arg0.high, Val(6144)) * Val(2012282881)); - NondetRegStruct x7 = exec_NondetTwitReg(ctx, x6, LAYOUT_LOOKUP(layout1, _f7_23)); - // Div(:19) - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:18) - Val x8 = (bitAnd(arg0.high, Val(1536)) * Val(2009333761)); - NondetRegStruct x9 = exec_NondetTwitReg(ctx, x8, LAYOUT_LOOKUP(layout1, _f7_01)); - // Div(:19) - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:19) - Val x10 = (bitAnd(arg0.high, Val(384)) * Val(1997537281)); - NondetRegStruct x11 = exec_NondetTwitReg(ctx, x10, LAYOUT_LOOKUP(layout1, _rs2_34)); - // Div(:19) - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:20) - Val x12 = (bitAnd(arg0.high, Val(96)) * Val(1950351361)); - NondetRegStruct x13 = exec_NondetTwitReg(ctx, x12, LAYOUT_LOOKUP(layout1, _rs2_12)); - // Div(:19) - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:21) - Val x14 = (bitAnd(arg0.high, Val(16)) * Val(1887436801)); - NondetRegStruct x15 = exec_NondetBitReg(ctx, x14, LAYOUT_LOOKUP(layout1, _rs2_0)); - // Div(:19) - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:22) - Val x16 = (bitAnd(arg0.high, Val(12)) * Val(1509949441)); - NondetRegStruct x17 = exec_NondetTwitReg(ctx, x16, LAYOUT_LOOKUP(layout1, _rs1_34)); - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:23) - NondetRegStruct x18 = - exec_NondetTwitReg(ctx, bitAnd(arg0.high, Val(3)), LAYOUT_LOOKUP(layout1, _rs1_12)); - // Div(:19) - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:24) - Val x19 = (bitAnd(arg0.low, Val(32768)) * Val(2013204481)); - NondetRegStruct x20 = exec_NondetBitReg(ctx, x19, LAYOUT_LOOKUP(layout1, _rs1_0)); - // Div(:19) - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:25) - Val x21 = (bitAnd(arg0.low, Val(16384)) * Val(2013143041)); - NondetRegStruct x22 = exec_NondetBitReg(ctx, x21, LAYOUT_LOOKUP(layout1, _f3_2)); - // Div(:19) - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:26) - Val x23 = (bitAnd(arg0.low, Val(12288)) * Val(2012774401)); - NondetRegStruct x24 = exec_NondetTwitReg(ctx, x23, LAYOUT_LOOKUP(layout1, _f3_01)); - // Div(:19) - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:27) - Val x25 = (bitAnd(arg0.low, Val(3072)) * Val(2011299841)); - NondetRegStruct x26 = exec_NondetTwitReg(ctx, x25, LAYOUT_LOOKUP(layout1, _rd_34)); - // Div(:19) - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:28) - Val x27 = (bitAnd(arg0.low, Val(768)) * Val(2005401601)); - NondetRegStruct x28 = exec_NondetTwitReg(ctx, x27, LAYOUT_LOOKUP(layout1, _rd_12)); - // Div(:19) - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:29) - Val x29 = (bitAnd(arg0.low, Val(128)) * Val(1997537281)); - NondetRegStruct x30 = exec_NondetTwitReg(ctx, x29, LAYOUT_LOOKUP(layout1, _rd_0)); - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:34) - NondetRegStruct x31 = - exec_NondetReg(ctx, bitAnd(arg0.low, Val(127)), LAYOUT_LOOKUP(layout1, opcode)); - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:37) - Val x32 = ((x3._super * Val(32768)) + (x5._super * Val(8192))); - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:39) - Val x33 = ((x32 + (x7._super * Val(2048))) + (x9._super * Val(512))); - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:41) - Val x34 = ((x33 + (x11._super * Val(128))) + (x13._super * Val(32))); - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:44) - Val x35 = (x17._super * Val(4)); - Val x36 = (((x34 + (x15._super * Val(16))) + x35) + x18._super); - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:37) - EQZ((arg0.high - x36), "Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:37)"); - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:46) - Val x37 = (x20._super * Val(32768)); - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:47) - Val x38 = ((x37 + (x22._super * Val(16384))) + (x24._super * Val(4096))); - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:49) - Val x39 = ((x38 + (x26._super * Val(1024))) + (x28._super * Val(256))); - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:46) - Val x40 = (arg0.low - ((x39 + (x30._super * Val(128))) + x31._super)); - EQZ(x40, "Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:46)"); - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:55) - Val x41 = ((x17._super * Val(8)) + (x18._super * Val(2))); - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:56) - Val x42 = (x11._super * Val(8)); - Val x43 = (x13._super * Val(2)); - Val x44 = ((x42 + x43) + x15._super); - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:57) - Val x45 = (x26._super * Val(8)); - Val x46 = (x28._super * Val(2)); - Val x47 = ((x45 + x46) + x30._super); - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:58) - Val x48 = ((x5._super * Val(16)) + (x7._super * Val(4))); - Val x49 = (x48 + x9._super); - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:59) - Val x50 = ((x3._super * Val(64)) + x49); - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:60) - Val x51 = ((x22._super * Val(4)) + x24._super); - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:66) - Val x52 = (x3._super * Val(61440)); - Val x53 = (x52 + (x50 * Val(32))); - Val x54 = (x3._super * Val(65535)); - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:68) - Val x55 = (x49 * Val(32)); - Val x56 = (((x52 + (x30._super * Val(2048))) + x55) + x45); - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:71) - Val x57 = ((x37 + (x51 * Val(4096))) + (x15._super * Val(2048))); - Val x58 = (((x57 + x55) + x42) + x43); - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:72) - Val x59 = ((x3._super * Val(65520)) + x35); - return DecoderStruct{.opcode = x31, - .rs1 = (x41 + x20._super), - .rs2 = x44, - .rd = x47, - .func7 = x50, - .func3 = x51, - .immI = ValU32Struct{.low = (x53 + x44), .high = x54}, - .immS = ValU32Struct{.low = (x53 + x47), .high = x54}, - .immB = ValU32Struct{.low = (x56 + x46), .high = x54}, - .immU = ValU32Struct{.low = x38, .high = arg0.high}, - .immJ = ValU32Struct{.low = x58, .high = (x59 + x18._super)}}; -} -__device__ MemoryArgStruct exec_MemoryArg(ExecContext& ctx, - Val arg0, - Val arg1, - Val arg2, - ValU32Struct arg3, - BoundLayout layout4) { - // MemoryArg(zirgen/circuit/rv32im/v2/dsl/mem.zir:25) - NondetRegStruct x5 = exec_NondetReg(ctx, arg0, LAYOUT_LOOKUP(layout4, count)); - // MemoryArg(zirgen/circuit/rv32im/v2/dsl/mem.zir:26) - NondetRegStruct x6 = exec_NondetReg(ctx, arg1, LAYOUT_LOOKUP(layout4, addr)); - // MemoryArg(zirgen/circuit/rv32im/v2/dsl/mem.zir:27) - NondetRegStruct x7 = exec_NondetReg(ctx, arg2, LAYOUT_LOOKUP(layout4, cycle)); - // MemoryArg(zirgen/circuit/rv32im/v2/dsl/mem.zir:28) - NondetRegStruct x8 = exec_NondetReg(ctx, arg3.low, LAYOUT_LOOKUP(layout4, dataLow)); - // MemoryArg(zirgen/circuit/rv32im/v2/dsl/mem.zir:29) - NondetRegStruct x9 = exec_NondetReg(ctx, arg3.high, LAYOUT_LOOKUP(layout4, dataHigh)); - // MemoryDelta(zirgen/circuit/rv32im/v2/dsl/mem.zir:21) - // MemoryArg(zirgen/circuit/rv32im/v2/dsl/mem.zir:30) - INVOKE_EXTERN(ctx, memoryDelta, x6._super, x7._super, x8._super, x9._super, x5._super); - return MemoryArgStruct{.count = x5, .addr = x6, .cycle = x7, .dataLow = x8, .dataHigh = x9}; -} -__device__ CycleArgStruct exec_CycleArg(ExecContext& ctx, - Val arg0, - Val arg1, - BoundLayout layout2) { - // CycleArg(zirgen/circuit/rv32im/v2/dsl/mem.zir:54) - NondetRegStruct x3 = exec_NondetReg(ctx, arg0, LAYOUT_LOOKUP(layout2, count)); - // CycleArg(zirgen/circuit/rv32im/v2/dsl/mem.zir:55) - NondetRegStruct x4 = exec_NondetReg(ctx, arg1, LAYOUT_LOOKUP(layout2, cycle)); - // LookupDelta(zirgen/circuit/rv32im/v2/dsl/lookups.zir:4) - // CycleArg(zirgen/circuit/rv32im/v2/dsl/mem.zir:56) - INVOKE_EXTERN(ctx, lookupDelta, Val(0), x4._super, x3._super); - return CycleArgStruct{.count = x3, .cycle = x4}; -} -__device__ IsCycleStruct exec_IsCycle(ExecContext& ctx, - Val arg0, - BoundLayout layout1) { - // IsCycle(zirgen/circuit/rv32im/v2/dsl/mem.zir:60) - CycleArgStruct x2 = exec_CycleArg(ctx, Val(1), arg0, LAYOUT_LOOKUP(layout1, arg)); - // IsCycle(zirgen/circuit/rv32im/v2/dsl/mem.zir:61) - Val x3 = (x2.count._super - Val(1)); - EQZ(x3, "IsCycle(zirgen/circuit/rv32im/v2/dsl/mem.zir:61)"); - // IsCycle(zirgen/circuit/rv32im/v2/dsl/mem.zir:62) - Val x4 = (x2.cycle._super - arg0); - EQZ(x4, "IsCycle(zirgen/circuit/rv32im/v2/dsl/mem.zir:62)"); - return IsCycleStruct{}; -} -__device__ MemoryIOStruct exec_MemoryIO(ExecContext& ctx, - RegStruct arg0, - Val arg1, - BoundLayout layout2) { - // GetMemoryTxn(zirgen/circuit/rv32im/v2/dsl/mem.zir:51) - // MemoryIO(zirgen/circuit/rv32im/v2/dsl/mem.zir:66) - auto [x3, x4, x5, x6, x7] = INVOKE_EXTERN(ctx, getMemoryTxn, arg1); - // MemoryIO(zirgen/circuit/rv32im/v2/dsl/mem.zir:67) - MemoryArgStruct x8 = exec_MemoryArg(ctx, - Val(2013265920), - arg1, - x3, - ValU32Struct{.low = x4, .high = x5}, - LAYOUT_LOOKUP(layout2, oldTxn)); - // MemoryIO(zirgen/circuit/rv32im/v2/dsl/mem.zir:68) - MemoryArgStruct x9 = exec_MemoryArg(ctx, - Val(1), - arg1, - arg0._super._super, - ValU32Struct{.low = x6, .high = x7}, - LAYOUT_LOOKUP(layout2, newTxn)); - // MemoryIO(zirgen/circuit/rv32im/v2/dsl/mem.zir:69) - Val x10 = (x8.count._super - Val(2013265920)); - EQZ(x10, "MemoryIO(zirgen/circuit/rv32im/v2/dsl/mem.zir:69)"); - // MemoryIO(zirgen/circuit/rv32im/v2/dsl/mem.zir:70) - Val x11 = (x9.count._super - Val(1)); - EQZ(x11, "MemoryIO(zirgen/circuit/rv32im/v2/dsl/mem.zir:70)"); - // MemoryIO(zirgen/circuit/rv32im/v2/dsl/mem.zir:72) - Val x12 = (x9.cycle._super - arg0._super._super); - EQZ(x12, "MemoryIO(zirgen/circuit/rv32im/v2/dsl/mem.zir:72)"); - // MemoryIO(zirgen/circuit/rv32im/v2/dsl/mem.zir:74) - Val x13 = (x8.addr._super - x9.addr._super); - EQZ(x13, "MemoryIO(zirgen/circuit/rv32im/v2/dsl/mem.zir:74)"); - // MemoryIO(zirgen/circuit/rv32im/v2/dsl/mem.zir:75) - Val x14 = (x9.addr._super - arg1); - EQZ(x14, "MemoryIO(zirgen/circuit/rv32im/v2/dsl/mem.zir:75)"); - return MemoryIOStruct{.oldTxn = x8, .newTxn = x9}; -} -__device__ IsForwardStruct exec_IsForward(ExecContext& ctx, - MemoryIOStruct arg0, - BoundLayout layout1) { - // IsForward(zirgen/circuit/rv32im/v2/dsl/mem.zir:84) - Val x2 = (arg0.newTxn.cycle._super - arg0.oldTxn.cycle._super); - IsCycleStruct x3 = exec_IsCycle(ctx, x2, LAYOUT_LOOKUP(layout1, _0)); - return IsForwardStruct{}; -} -__device__ GetDataStruct exec_MemoryRead(ExecContext& ctx, - RegStruct arg0, - Val arg1, - BoundLayout layout2) { - // MemoryRead(zirgen/circuit/rv32im/v2/dsl/mem.zir:89) - MemoryIOStruct x3 = exec_MemoryIO(ctx, arg0, arg1, LAYOUT_LOOKUP(layout2, io)); - // IsRead(zirgen/circuit/rv32im/v2/dsl/mem.zir:79) - // MemoryRead(zirgen/circuit/rv32im/v2/dsl/mem.zir:90) - Val x4 = (x3.oldTxn.dataLow._super - x3.newTxn.dataLow._super); - EQZ(x4, - "loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at MemoryRead ( " - "zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10)))"); - // IsRead(zirgen/circuit/rv32im/v2/dsl/mem.zir:80) - Val x5 = (x3.oldTxn.dataHigh._super - x3.newTxn.dataHigh._super); - EQZ(x5, - "loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at MemoryRead ( " - "zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10)))"); - // MemoryRead(zirgen/circuit/rv32im/v2/dsl/mem.zir:91) - IsForwardStruct x6 = exec_IsForward(ctx, x3, LAYOUT_LOOKUP(layout2, _0)); - // ValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:10) - // GetData(zirgen/circuit/rv32im/v2/dsl/mem.zir:36) - // MemoryRead(zirgen/circuit/rv32im/v2/dsl/mem.zir:92) - ValU32Struct x7 = - ValU32Struct{.low = x3.newTxn.dataLow._super, .high = x3.newTxn.dataHigh._super}; - return GetDataStruct{._super = x7, .diffLow = Val(0), .diffHigh = Val(1)}; -} -__device__ MemoryWriteStruct exec_MemoryWrite(ExecContext& ctx, - RegStruct arg0, - Val arg1, - ValU32Struct arg2, - BoundLayout layout3) { - // MemoryWrite(zirgen/circuit/rv32im/v2/dsl/mem.zir:97) - MemoryIOStruct x4 = exec_MemoryIO(ctx, arg0, arg1, LAYOUT_LOOKUP(layout3, io)); - // MemoryWrite(zirgen/circuit/rv32im/v2/dsl/mem.zir:98) - IsForwardStruct x5 = exec_IsForward(ctx, x4, LAYOUT_LOOKUP(layout3, _0)); - // MemoryWrite(zirgen/circuit/rv32im/v2/dsl/mem.zir:99) - Val x6 = (x4.newTxn.dataLow._super - arg2.low); - EQZ(x6, "MemoryWrite(zirgen/circuit/rv32im/v2/dsl/mem.zir:99)"); - // MemoryWrite(zirgen/circuit/rv32im/v2/dsl/mem.zir:100) - Val x7 = (x4.newTxn.dataHigh._super - arg2.high); - EQZ(x7, "MemoryWrite(zirgen/circuit/rv32im/v2/dsl/mem.zir:100)"); - return MemoryWriteStruct{}; -} -__device__ MemoryWriteUnconstrainedStruct -exec_MemoryWriteUnconstrained(ExecContext& ctx, - RegStruct arg0, - Val arg1, - BoundLayout layout2) { - // MemoryWriteUnconstrained(zirgen/circuit/rv32im/v2/dsl/mem.zir:105) - MemoryIOStruct x3 = exec_MemoryIO(ctx, arg0, arg1, LAYOUT_LOOKUP(layout2, io)); - // MemoryWriteUnconstrained(zirgen/circuit/rv32im/v2/dsl/mem.zir:106) - IsForwardStruct x4 = exec_IsForward(ctx, x3, LAYOUT_LOOKUP(layout2, _0)); - return MemoryWriteUnconstrainedStruct{}; -} -__device__ GetDataStruct exec_MemoryPageIn(ExecContext& ctx, - RegStruct arg0, - Val arg1, - BoundLayout layout2) { - // MemoryPageIn(zirgen/circuit/rv32im/v2/dsl/mem.zir:112) - MemoryIOStruct x3 = exec_MemoryIO(ctx, arg0, arg1, LAYOUT_LOOKUP(layout2, io)); - // IsRead(zirgen/circuit/rv32im/v2/dsl/mem.zir:79) - // MemoryPageIn(zirgen/circuit/rv32im/v2/dsl/mem.zir:113) - Val x4 = (x3.oldTxn.dataLow._super - x3.newTxn.dataLow._super); - EQZ(x4, - "loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at MemoryPageIn ( " - "zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10)))"); - // IsRead(zirgen/circuit/rv32im/v2/dsl/mem.zir:80) - Val x5 = (x3.oldTxn.dataHigh._super - x3.newTxn.dataHigh._super); - EQZ(x5, - "loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at MemoryPageIn ( " - "zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10)))"); - // MemoryPageIn(zirgen/circuit/rv32im/v2/dsl/mem.zir:114) - Val x6 = (x3.newTxn.cycle._super - x3.oldTxn.cycle._super); - // ValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:10) - // GetData(zirgen/circuit/rv32im/v2/dsl/mem.zir:36) - ValU32Struct x7 = - ValU32Struct{.low = x3.newTxn.dataLow._super, .high = x3.newTxn.dataHigh._super}; - return GetDataStruct{._super = x7, .diffLow = Val(0), .diffHigh = x6}; -} -__device__ GetDataStruct exec_MemoryPageOut(ExecContext& ctx, - RegStruct arg0, - Val arg1, - BoundLayout layout2) { - // MemoryPageOut(zirgen/circuit/rv32im/v2/dsl/mem.zir:120) - MemoryIOStruct x3 = exec_MemoryIO(ctx, arg0, arg1, LAYOUT_LOOKUP(layout2, io)); - // MemoryPageOut(zirgen/circuit/rv32im/v2/dsl/mem.zir:121) - IsForwardStruct x4 = exec_IsForward(ctx, x3, LAYOUT_LOOKUP(layout2, _0)); - // MemoryPageOut(zirgen/circuit/rv32im/v2/dsl/mem.zir:122) - Val x5 = (x3.newTxn.dataLow._super - x3.oldTxn.dataLow._super); - // MemoryPageOut(zirgen/circuit/rv32im/v2/dsl/mem.zir:123) - Val x6 = (x3.newTxn.dataHigh._super - x3.oldTxn.dataHigh._super); - // ValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:10) - // GetData(zirgen/circuit/rv32im/v2/dsl/mem.zir:36) - // MemoryPageOut(zirgen/circuit/rv32im/v2/dsl/mem.zir:122) - ValU32Struct x7 = - ValU32Struct{.low = x3.oldTxn.dataLow._super, .high = x3.oldTxn.dataHigh._super}; - return GetDataStruct{._super = x7, .diffLow = x5, .diffHigh = x6}; -} -__device__ OneHot_3_Struct exec_OneHot_3_(ExecContext& ctx, - Val arg0, - BoundLayout layout1) { - // OneHot(zirgen/circuit/rv32im/v2/dsl/one_hot.zir:7) - NondetRegStruct3Array x2 = - map(Val3Array{Val(0), Val(1), Val(2)}, - LAYOUT_LOOKUP(layout1, _super), - ([&](Val3Array::value_type x3, BoundLayout x4) { - NondetRegStruct x5 = exec_NondetBitReg(ctx, isz((x3 - arg0)), x4); - return x5; - })); - // OneHot(zirgen/circuit/rv32im/v2/dsl/one_hot.zir:9) - Val x6 = (x2[0]._super + x2[1]._super); - EQZ(((x6 + x2[2]._super) - Val(1)), "OneHot(zirgen/circuit/rv32im/v2/dsl/one_hot.zir:9)"); - // OneHot(zirgen/circuit/rv32im/v2/dsl/one_hot.zir:11) - Val x7 = (x2[2]._super * Val(2)); - Val x8 = (x2[1]._super + x7); - EQZ((x8 - arg0), "OneHot(zirgen/circuit/rv32im/v2/dsl/one_hot.zir:11)"); - return OneHot_3_Struct{._super = x2}; -} -__device__ GetDataStruct exec_MemoryGet(ExecContext& ctx, - RegStruct arg0, - Val arg1, - OneHot_3_Struct arg2, - BoundLayout layout3) { - GetDataStruct x4; - if (to_size_t(arg2._super[0]._super)) { - // MemoryGet(zirgen/circuit/rv32im/v2/dsl/mem.zir:129) - GetDataStruct x5 = exec_MemoryRead(ctx, arg0, arg1, LAYOUT_LOOKUP(layout3, _super.arm0)); - x4 = x5; - } else if (to_size_t(arg2._super[1]._super)) { - // MemoryGet(zirgen/circuit/rv32im/v2/dsl/mem.zir:130) - GetDataStruct x6 = - exec_MemoryPageIn(ctx, arg0, arg1, LAYOUT_LOOKUP(layout3, _super.arm1._super)); - // MemoryGet(zirgen/circuit/rv32im/v2/dsl/mem.zir:128) - STORE(LAYOUT_LOOKUP(layout3, _super.arm1._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout3, _super.arm1._extra0.count._super), 0), - "MemoryGet(zirgen/circuit/rv32im/v2/dsl/mem.zir:128)"); - x4 = x6; - } else if (to_size_t(arg2._super[2]._super)) { - // MemoryGet(zirgen/circuit/rv32im/v2/dsl/mem.zir:131) - GetDataStruct x7 = exec_MemoryPageOut(ctx, arg0, arg1, LAYOUT_LOOKUP(layout3, _super.arm2)); - x4 = x7; - } else { - assert(0 && "Reached unreachable mux arm"); - } - return x4; -} -__device__ OneHot_8_Struct exec_OneHot_8_(ExecContext& ctx, - Val arg0, - BoundLayout layout1) { - // OneHot(zirgen/circuit/rv32im/v2/dsl/one_hot.zir:7) - NondetRegStruct8Array x2 = - map(Val8Array{Val(0), Val(1), Val(2), Val(3), Val(4), Val(5), Val(6), Val(7)}, - LAYOUT_LOOKUP(layout1, _super), - ([&](Val8Array::value_type x3, BoundLayout x4) { - NondetRegStruct x5 = exec_NondetBitReg(ctx, isz((x3 - arg0)), x4); - return x5; - })); - // OneHot(zirgen/circuit/rv32im/v2/dsl/one_hot.zir:9) - Val x6 = (x2[0]._super + x2[1]._super); - Val x7 = ((x6 + x2[2]._super) + x2[3]._super); - Val x8 = ((x7 + x2[4]._super) + x2[5]._super); - Val x9 = ((x8 + x2[6]._super) + x2[7]._super); - EQZ((x9 - Val(1)), "OneHot(zirgen/circuit/rv32im/v2/dsl/one_hot.zir:9)"); - // OneHot(zirgen/circuit/rv32im/v2/dsl/one_hot.zir:11) - Val x10 = (x2[2]._super * Val(2)); - Val x11 = (x2[3]._super * Val(3)); - Val x12 = (x2[4]._super * Val(4)); - Val x13 = (x2[5]._super * Val(5)); - Val x14 = (x2[6]._super * Val(6)); - Val x15 = (x2[7]._super * Val(7)); - Val x16 = (x2[1]._super + x10); - Val x17 = (((x16 + x11) + x12) + x13); - Val x18 = (((x17 + x14) + x15) - arg0); - EQZ(x18, "OneHot(zirgen/circuit/rv32im/v2/dsl/one_hot.zir:11)"); - return OneHot_8_Struct{._super = x2, .bits = x2}; -} -__device__ InstInputStruct exec_InstInput(ExecContext& ctx, - Val arg0, - Val arg1, - Val arg2, - ValU32Struct arg3, - Val arg4, - Val arg5, - BoundLayout layout6) { - // InstInput(zirgen/circuit/rv32im/v2/dsl/inst.zir:15) - OneHot_8_Struct x7 = exec_OneHot_8_(ctx, arg2, LAYOUT_LOOKUP(layout6, minorOnehot)); - return InstInputStruct{.pcU32 = arg3, .state = arg4, .mode = arg5, .minorOnehot = x7}; -} -__device__ DecoderStruct exec_DecodeInst(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2) { - // GetDiffCount(zirgen/circuit/rv32im/v2/dsl/mem.zir:22) - // DecodeInst(zirgen/circuit/rv32im/v2/dsl/inst.zir:20) - Val x3 = INVOKE_EXTERN(ctx, getDiffCount, arg0._super._super); - CycleArgStruct x4 = - exec_CycleArg(ctx, neg_0(x3), arg0._super._super, LAYOUT_LOOKUP(layout2, arg)); - // DecodeInst(zirgen/circuit/rv32im/v2/dsl/inst.zir:22) - Val x5 = (x4.cycle._super - arg0._super._super); - EQZ(x5, "DecodeInst(zirgen/circuit/rv32im/v2/dsl/inst.zir:22)"); - // DecodeInst(zirgen/circuit/rv32im/v2/dsl/inst.zir:24) - AddrDecomposeStruct x6 = - exec_AddrDecompose(ctx, arg1.pcU32, arg1.mode, LAYOUT_LOOKUP(layout2, pcAddr)); - // DecodeInst(zirgen/circuit/rv32im/v2/dsl/inst.zir:26) - EQZ(x6.low2._super, "DecodeInst(zirgen/circuit/rv32im/v2/dsl/inst.zir:26)"); - // DecodeInst(zirgen/circuit/rv32im/v2/dsl/inst.zir:28) - GetDataStruct x7 = exec_MemoryRead(ctx, arg0, x6._super, LAYOUT_LOOKUP(layout2, loadInst)); - // DecodeInst(zirgen/circuit/rv32im/v2/dsl/inst.zir:30) - DecoderStruct x8 = exec_Decoder(ctx, x7._super, LAYOUT_LOOKUP(layout2, _super)); - return x8; -} -__device__ GetDataStruct exec_ReadReg(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - Val arg2, - BoundLayout layout3) { - // ReadReg(zirgen/circuit/rv32im/v2/dsl/inst.zir:34) - Val x4 = ((Val(1) - arg1.mode) * Val(1073725472)); - Val x5 = ((arg1.mode * Val(1073725440)) + x4); - RegStruct x6 = exec_Reg(ctx, (x5 + arg2), LAYOUT_LOOKUP(layout3, addr)); - // ReadReg(zirgen/circuit/rv32im/v2/dsl/inst.zir:35) - GetDataStruct x7 = exec_MemoryRead(ctx, arg0, x6._super._super, LAYOUT_LOOKUP(layout3, _super)); - return x7; -} -__device__ WriteRdStruct exec_WriteRd(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - DecoderStruct arg2, - Val arg3, - ValU32Struct arg4, - BoundLayout layout5) { - // WriteRd(zirgen/circuit/rv32im/v2/dsl/inst.zir:39) - NondetRegStruct x6 = exec_IsZero(ctx, arg2.rd, LAYOUT_LOOKUP(layout5, isRd0)); - // WriteRd(zirgen/circuit/rv32im/v2/dsl/inst.zir:40) - Val x7 = ((Val(1) - x6._super) * arg3); - // WriteRd(zirgen/circuit/rv32im/v2/dsl/inst.zir:42) - Val x8 = ((Val(1) - arg1.mode) * Val(1073725472)); - Val x9 = ((arg1.mode * Val(1073725440)) + x8); - Val x10 = ((Val(1) - x7) * Val(64)); - RegStruct x11 = exec_Reg(ctx, ((x9 + x10) + (x7 * arg2.rd)), LAYOUT_LOOKUP(layout5, writeAddr)); - // WriteRd(zirgen/circuit/rv32im/v2/dsl/inst.zir:43) - MemoryWriteStruct x12 = - exec_MemoryWrite(ctx, arg0, x11._super._super, arg4, LAYOUT_LOOKUP(layout5, _0)); - return WriteRdStruct{}; -} -__device__ ExpandU32Struct exec_ExpandU32(ExecContext& ctx, - ValU32Struct arg0, - Val arg1, - BoundLayout layout2) { - // ExpandU32(zirgen/circuit/rv32im/v2/dsl/mult.zir:50) - NondetRegStruct x3 = - exec_NondetU8Reg(ctx, bitAnd(arg0.low, Val(255)), LAYOUT_LOOKUP(layout2, b0)); - // Div(:19) - // ExpandU32(zirgen/circuit/rv32im/v2/dsl/mult.zir:51) - Val x4 = (bitAnd(arg0.low, Val(65280)) * Val(2005401601)); - NondetRegStruct x5 = exec_NondetU8Reg(ctx, x4, LAYOUT_LOOKUP(layout2, b1)); - // ExpandU32(zirgen/circuit/rv32im/v2/dsl/mult.zir:52) - NondetRegStruct x6 = - exec_NondetU8Reg(ctx, bitAnd(arg0.high, Val(255)), LAYOUT_LOOKUP(layout2, b2)); - // Div(:19) - // ExpandU32(zirgen/circuit/rv32im/v2/dsl/mult.zir:53) - Val x7 = (bitAnd(arg0.high, Val(65280)) * Val(2005401601)); - NondetRegStruct x8 = exec_NondetU8Reg(ctx, x7, LAYOUT_LOOKUP(layout2, b3)); - // Div(:19) - // ExpandU32(zirgen/circuit/rv32im/v2/dsl/mult.zir:59) - Val x9 = (bitAnd(arg0.high, Val(32512)) * Val(1997537281)); - NondetRegStruct x10 = exec_NondetU8Reg(ctx, x9, LAYOUT_LOOKUP(layout2, b3Top7times2)); - // Div(:19) - // ExpandU32(zirgen/circuit/rv32im/v2/dsl/mult.zir:60) - Val x11 = (bitAnd(arg0.high, Val(32768)) * Val(2013204481)); - NondetRegStruct x12 = exec_NondetBitReg(ctx, x11, LAYOUT_LOOKUP(layout2, topBit)); - // ExpandU32(zirgen/circuit/rv32im/v2/dsl/mult.zir:62) - Val x13 = (x3._super + (x5._super * Val(256))); - EQZ((arg0.low - x13), "ExpandU32(zirgen/circuit/rv32im/v2/dsl/mult.zir:62)"); - // ExpandU32(zirgen/circuit/rv32im/v2/dsl/mult.zir:63) - Val x14 = (x6._super + (x10._super * Val(128))); - EQZ((arg0.high - (x14 + (x12._super * Val(32768)))), - "ExpandU32(zirgen/circuit/rv32im/v2/dsl/mult.zir:63)"); - // ExpandU32(zirgen/circuit/rv32im/v2/dsl/mult.zir:67) - Val x15 = ((x10._super * Val(1006632961)) + (x12._super * Val(128))); - EQZ((x8._super - x15), "ExpandU32(zirgen/circuit/rv32im/v2/dsl/mult.zir:67)"); - return ExpandU32Struct{.b0 = x3, .b1 = x5, .b2 = x6, .b3 = x8, .neg = (x12._super * arg1)}; -} -__device__ SplitTotalStruct exec_SplitTotal(ExecContext& ctx, - Val arg0, - BoundLayout layout1) { - // SplitTotal(zirgen/circuit/rv32im/v2/dsl/mult.zir:97) - NondetRegStruct x2 = - exec_NondetU16Reg(ctx, bitAnd(arg0, Val(65535)), LAYOUT_LOOKUP(layout1, out)); - // SplitTotal(zirgen/circuit/rv32im/v2/dsl/mult.zir:98) - NondetRegStruct x3 = exec_NondetU8Reg( - ctx, (bitAnd(arg0, Val(16711680)) * Val(2013235201)), LAYOUT_LOOKUP(layout1, carryByte)); - // SplitTotal(zirgen/circuit/rv32im/v2/dsl/mult.zir:99) - NondetFakeTwitRegStruct x4 = exec_NondetFakeTwitReg( - ctx, (bitAnd(arg0, Val(251658240)) * Val(2013265801)), LAYOUT_LOOKUP(layout1, carryExtra)); - // SplitTotal(zirgen/circuit/rv32im/v2/dsl/mult.zir:100) - Val x5 = ((x4._super * Val(16777216)) + (x3._super * Val(65536))); - EQZ((arg0 - (x5 + x2._super)), "SplitTotal(zirgen/circuit/rv32im/v2/dsl/mult.zir:100)"); - // SplitTotal(zirgen/circuit/rv32im/v2/dsl/mult.zir:101) - Val x6 = ((x4._super * Val(256)) + x3._super); - return SplitTotalStruct{.out = x2, .carry = x6}; -} -__device__ MultiplyAccumulateStruct -exec_MultiplyAccumulate(ExecContext& ctx, - ValU32Struct arg0, - ValU32Struct arg1, - ValU32Struct arg2, - MultiplySettingsStruct arg3, - BoundLayout layout4) { - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:115) - ExpandU32Struct x5 = exec_ExpandU32(ctx, arg0, arg3.aSigned, LAYOUT_LOOKUP(layout4, ax)); - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:116) - ExpandU32Struct x6 = exec_ExpandU32(ctx, arg1, arg3.bSigned, LAYOUT_LOOKUP(layout4, bx)); - // Div(:19) - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:118) - Val x7 = (bitAnd(arg2.high, Val(32768)) * Val(2013204481)); - NondetRegStruct x8 = exec_NondetBitReg(ctx, x7, LAYOUT_LOOKUP(layout4, cSign)); - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:119) - Val x9 = (bitAnd(arg2.high, Val(32767)) * Val(2)); - NondetRegStruct x10 = exec_NondetU16Reg(ctx, x9, LAYOUT_LOOKUP(layout4, cRestTimes2)); - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:120) - Val x11 = ((x8._super * Val(32768)) + (x10._super * Val(1006632961))); - EQZ((arg2.high - x11), "MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:120)"); - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:124) - Val x12 = (x5.b0._super * x6.b0._super); - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:125) - Val x13 = (x5.b0._super * x6.b1._super); - Val x14 = (x5.b1._super * x6.b0._super); - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:124) - Val x15 = ((arg2.low + x12) + ((x13 + x14) * Val(256))); - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:122) - SplitTotalStruct x16 = exec_SplitTotal(ctx, x15, LAYOUT_LOOKUP(layout4, s0)); - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:131) - Val x17 = (x5.b0._super * x6.b2._super); - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:130) - Val x18 = ((arg2.high + x16.carry) + x17); - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:131) - Val x19 = (x5.b1._super * x6.b1._super); - Val x20 = (x5.b2._super * x6.b0._super); - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:132) - Val x21 = (x5.b0._super * x6.b3._super); - Val x22 = (x5.b1._super * x6.b2._super); - Val x23 = (x5.b2._super * x6.b1._super); - Val x24 = (x5.b3._super * x6.b0._super); - Val x25 = (((x21 + x22) + x23) + x24); - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:131) - Val x26 = (((x18 + x19) + x20) + (x25 * Val(256))); - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:128) - SplitTotalStruct x27 = exec_SplitTotal(ctx, x26, LAYOUT_LOOKUP(layout4, s1)); - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:138) - Val x28 = ((x8._super * Val(65535)) * arg3.cSigned); - Val x29 = ((x27.carry + x28) + Val(131072)); - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:139) - Val x30 = (x5.b1._super * Val(256)); - Val x31 = (x5.b0._super + x30); - Val x32 = (x6.b1._super * Val(256)); - Val x33 = (x6.b0._super + x32); - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:140) - Val x34 = (x5.b1._super * x6.b3._super); - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:139) - Val x35 = (((x29 - (x31 * x6.neg)) - (x33 * x5.neg)) + x34); - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:140) - Val x36 = (x5.b2._super * x6.b2._super); - Val x37 = (x5.b3._super * x6.b1._super); - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:141) - Val x38 = (x5.b2._super * x6.b3._super); - Val x39 = (x5.b3._super * x6.b2._super); - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:140) - Val x40 = (((x35 + x36) + x37) + ((x38 + x39) * Val(256))); - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:136) - SplitTotalStruct x41 = exec_SplitTotal(ctx, x40, LAYOUT_LOOKUP(layout4, s2)); - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:147) - Val x42 = ((x41.carry + x28) + Val(131070)); - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:148) - Val x43 = (x5.b3._super * Val(256)); - Val x44 = (x5.b2._super + x43); - Val x45 = (x6.b3._super * Val(256)); - Val x46 = (x6.b2._super + x45); - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:149) - Val x47 = (x5.b3._super * x6.b3._super); - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:148) - Val x48 = (((x42 - (x44 * x6.neg)) - (x46 * x5.neg)) + x47); - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:150) - NondetRegStruct x49 = - exec_NondetU16Reg(ctx, bitAnd(x48, Val(65535)), LAYOUT_LOOKUP(layout4, s3Out)); - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:151) - FakeTwitRegStruct x50 = exec_FakeTwitReg( - ctx, ((x48 - x49._super) * Val(2013235201)), LAYOUT_LOOKUP(layout4, s3Carry)); - // ValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:10) - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:152) - ValU32Struct x51 = ValU32Struct{.low = x16.out._super, .high = x27.out._super}; - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:153) - ValU32Struct x52 = ValU32Struct{.low = x41.out._super, .high = x49._super}; - return MultiplyAccumulateStruct{.outLow = x51, .outHigh = x52}; -} -__device__ DivInputStruct exec_DivInput(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2) { - // DivInput(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:8) - EQZ((arg1.state - Val(32)), "DivInput(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:8)"); - // DivInput(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:10) - DecoderStruct x3 = exec_DecodeInst(ctx, arg0, arg1, LAYOUT_LOOKUP(layout2, decoded)); - // DivInput(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:11) - GetDataStruct x4 = exec_ReadReg(ctx, arg0, arg1, x3.rs1, LAYOUT_LOOKUP(layout2, rs1)); - // DivInput(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:12) - GetDataStruct x5 = exec_ReadReg(ctx, arg0, arg1, x3.rs2, LAYOUT_LOOKUP(layout2, rs2)); - return DivInputStruct{._super = arg1, .ii = arg1, .decoded = x3, .rs1 = x4, .rs2 = x5}; -} -__device__ DivideReturnStruct exec_DoDiv(ExecContext& ctx, - ValU32Struct arg0, - ValU32Struct arg1, - Val arg2, - Val arg3, - BoundLayout layout4) { - // Divide(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:43) - // DoDiv(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:47) - auto [x5, x6, x7, x8] = INVOKE_EXTERN( - ctx, divide, arg0.low, arg0.high, arg1.low, arg1.high, (arg2 + (arg3 * Val(2)))); - // DoDiv(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:50) - NondetRegStruct x9 = exec_NondetReg(ctx, x5, LAYOUT_LOOKUP(layout4, quotLow)); - // DoDiv(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:51) - NondetRegStruct x10 = exec_NondetReg(ctx, x6, LAYOUT_LOOKUP(layout4, quotHigh)); - // ValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:10) - // DoDiv(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:52) - ValU32Struct x11 = ValU32Struct{.low = x9._super, .high = x10._super}; - // DoDiv(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:54) - NondetRegStruct x12 = exec_NondetU16Reg(ctx, x7, LAYOUT_LOOKUP(layout4, remLow)); - // DoDiv(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:55) - NondetRegStruct x13 = exec_NondetU16Reg(ctx, x8, LAYOUT_LOOKUP(layout4, remHigh)); - // ValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:10) - // DoDiv(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:56) - ValU32Struct x14 = ValU32Struct{.low = x12._super, .high = x13._super}; - // DoDiv(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:60) - MultiplyAccumulateStruct x15 = exec_MultiplyAccumulate( - ctx, - x11, - arg1, - x14, - MultiplySettingsStruct{.aSigned = arg2, .bSigned = arg2, .cSigned = arg2}, - LAYOUT_LOOKUP(layout4, mul)); - // AssertEqU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:106) - // DoDiv(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:62) - Val x16 = (x15.outLow.low - arg0.low); - EQZ(x16, - "loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :106:10) at DoDiv ( " - "zirgen/circuit/rv32im/v2/dsl/inst_div.zir :62:15)))"); - // AssertEqU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:107) - Val x17 = (x15.outLow.high - arg0.high); - EQZ(x17, - "loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :107:11) at DoDiv ( " - "zirgen/circuit/rv32im/v2/dsl/inst_div.zir :62:15)))"); - // DoDiv(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:64) - Val x18 = isz(x15.outHigh.low); - NondetRegStruct x19 = exec_NondetBitReg(ctx, (Val(1) - x18), LAYOUT_LOOKUP(layout4, topBitType)); - // DoDiv(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:65) - Val x20 = (x19._super * Val(65535)); - // AssertEqU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:106) - Val x21 = (x15.outHigh.low - x20); - EQZ(x21, - "loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :106:10) at DoDiv ( " - "zirgen/circuit/rv32im/v2/dsl/inst_div.zir :65:15)))"); - // AssertEqU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:107) - Val x22 = (x15.outHigh.high - x20); - EQZ(x22, - "loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :107:11) at DoDiv ( " - "zirgen/circuit/rv32im/v2/dsl/inst_div.zir :65:15)))"); - return DivideReturnStruct{.quot = x11, .rem = x14}; -} -__device__ ValU32Struct exec_OpSRL(ExecContext& ctx, - DivInputStruct arg0, - BoundLayout layout1) { - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:62) - // OpSRL(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:85) - Val x2 = (arg0.decoded.opcode._super - Val(51)); - EQZ(x2, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :62:19) at OpSRL ( " - "zirgen/circuit/rv32im/v2/dsl/inst_div.zir :85:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:63) - Val x3 = (arg0.decoded.func3 - Val(5)); - EQZ(x3, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at OpSRL ( " - "zirgen/circuit/rv32im/v2/dsl/inst_div.zir :85:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:64) - EQZ(arg0.decoded.func7, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at OpSRL ( " - "zirgen/circuit/rv32im/v2/dsl/inst_div.zir :85:20)))"); - // OpSRL(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:86) - ValU32Struct x4 = exec_DynPo2(ctx, arg0.rs2._super.low, LAYOUT_LOOKUP(layout1, shiftMul)); - // OpSRL(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:87) - DivideReturnStruct x5 = - exec_DoDiv(ctx, arg0.rs1._super, x4, Val(0), Val(0), LAYOUT_LOOKUP(layout1, _0)); - return x5.quot; -} -__device__ NondetRegStruct exec_TopBit(ExecContext& ctx, - ValU32Struct arg0, - BoundLayout layout1) { - // Div(:19) - // TopBit(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:70) - Val x2 = (bitAnd(arg0.high, Val(32768)) * Val(2013204481)); - NondetRegStruct x3 = exec_NondetBitReg(ctx, x2, LAYOUT_LOOKUP(layout1, _super)); - // TopBit(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:71) - Val x4 = (x3._super * Val(32768)); - Val x5 = ((arg0.high - x4) * Val(2)); - NondetRegStruct x6 = exec_NondetU16Reg(ctx, x5, LAYOUT_LOOKUP(layout1, rest)); - // TopBit(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:72) - Val x7 = ((x6._super * Val(1006632961)) + x4); - EQZ((arg0.high - x7), "TopBit(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:72)"); - return x3; -} -__device__ ValU32Struct exec_OpSRA(ExecContext& ctx, - DivInputStruct arg0, - BoundLayout layout1) { - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:62) - // OpSRA(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:91) - Val x2 = (arg0.decoded.opcode._super - Val(51)); - EQZ(x2, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :62:19) at OpSRA ( " - "zirgen/circuit/rv32im/v2/dsl/inst_div.zir :91:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:63) - Val x3 = (arg0.decoded.func3 - Val(5)); - EQZ(x3, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at OpSRA ( " - "zirgen/circuit/rv32im/v2/dsl/inst_div.zir :91:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:64) - Val x4 = (arg0.decoded.func7 - Val(32)); - EQZ(x4, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at OpSRA ( " - "zirgen/circuit/rv32im/v2/dsl/inst_div.zir :91:20)))"); - // OpSRA(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:92) - ValU32Struct x5 = exec_DynPo2(ctx, arg0.rs2._super.low, LAYOUT_LOOKUP(layout1, shiftMul)); - // OpSRA(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:93) - NondetRegStruct x6 = exec_TopBit(ctx, arg0.rs1._super, LAYOUT_LOOKUP(layout1, flip)); - // FlipU16(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:77) - // FlipU32(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:81) - // OpSRA(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:94) - Val x7 = (Val(65535) - arg0.rs1._super.low); - Val x8 = (Val(1) - x6._super); - Val x9 = ((x6._super * x7) + (x8 * arg0.rs1._super.low)); - Val x10 = (Val(65535) - arg0.rs1._super.high); - Val x11 = ((x6._super * x10) + (x8 * arg0.rs1._super.high)); - DivideReturnStruct x12 = exec_DoDiv( - ctx, ValU32Struct{.low = x9, .high = x11}, x5, Val(0), Val(1), LAYOUT_LOOKUP(layout1, _0)); - // FlipU16(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:77) - // FlipU32(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:81) - // OpSRA(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:95) - Val x13 = (Val(65535) - x12.quot.low); - Val x14 = ((x6._super * x13) + (x8 * x12.quot.low)); - Val x15 = (Val(65535) - x12.quot.high); - Val x16 = ((x6._super * x15) + (x8 * x12.quot.high)); - return ValU32Struct{.low = x14, .high = x16}; -} -__device__ ValU32Struct exec_OpSRLI(ExecContext& ctx, - DivInputStruct arg0, - BoundLayout layout1) { - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:62) - // OpSRLI(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:99) - Val x2 = (arg0.decoded.opcode._super - Val(19)); - EQZ(x2, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :62:19) at OpSRLI ( " - "zirgen/circuit/rv32im/v2/dsl/inst_div.zir :99:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:63) - Val x3 = (arg0.decoded.func3 - Val(5)); - EQZ(x3, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at OpSRLI ( " - "zirgen/circuit/rv32im/v2/dsl/inst_div.zir :99:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:64) - EQZ(arg0.decoded.func7, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at OpSRLI ( " - "zirgen/circuit/rv32im/v2/dsl/inst_div.zir :99:20)))"); - // OpSRLI(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:100) - ValU32Struct x4 = exec_DynPo2(ctx, arg0.decoded.rs2, LAYOUT_LOOKUP(layout1, shiftMul)); - // OpSRLI(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:101) - DivideReturnStruct x5 = - exec_DoDiv(ctx, arg0.rs1._super, x4, Val(0), Val(0), LAYOUT_LOOKUP(layout1, _0)); - return x5.quot; -} -__device__ ValU32Struct exec_OpSRAI(ExecContext& ctx, - DivInputStruct arg0, - BoundLayout layout1) { - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:62) - // OpSRAI(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:105) - Val x2 = (arg0.decoded.opcode._super - Val(19)); - EQZ(x2, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :62:19) at OpSRAI ( " - "zirgen/circuit/rv32im/v2/dsl/inst_div.zir :105:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:63) - Val x3 = (arg0.decoded.func3 - Val(5)); - EQZ(x3, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at OpSRAI ( " - "zirgen/circuit/rv32im/v2/dsl/inst_div.zir :105:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:64) - Val x4 = (arg0.decoded.func7 - Val(32)); - EQZ(x4, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at OpSRAI ( " - "zirgen/circuit/rv32im/v2/dsl/inst_div.zir :105:20)))"); - // OpSRAI(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:106) - ValU32Struct x5 = exec_DynPo2(ctx, arg0.decoded.rs2, LAYOUT_LOOKUP(layout1, shiftMul)); - // OpSRAI(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:107) - NondetRegStruct x6 = exec_TopBit(ctx, arg0.rs1._super, LAYOUT_LOOKUP(layout1, flip)); - // FlipU16(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:77) - // FlipU32(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:81) - // OpSRAI(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:108) - Val x7 = (Val(65535) - arg0.rs1._super.low); - Val x8 = (Val(1) - x6._super); - Val x9 = ((x6._super * x7) + (x8 * arg0.rs1._super.low)); - Val x10 = (Val(65535) - arg0.rs1._super.high); - Val x11 = ((x6._super * x10) + (x8 * arg0.rs1._super.high)); - DivideReturnStruct x12 = exec_DoDiv( - ctx, ValU32Struct{.low = x9, .high = x11}, x5, Val(0), Val(1), LAYOUT_LOOKUP(layout1, _0)); - // FlipU16(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:77) - // FlipU32(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:81) - // OpSRAI(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:109) - Val x13 = (Val(65535) - x12.quot.low); - Val x14 = ((x6._super * x13) + (x8 * x12.quot.low)); - Val x15 = (Val(65535) - x12.quot.high); - Val x16 = ((x6._super * x15) + (x8 * x12.quot.high)); - return ValU32Struct{.low = x14, .high = x16}; -} -__device__ ValU32Struct exec_OpDIV(ExecContext& ctx, - DivInputStruct arg0, - BoundLayout layout1) { - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:62) - // OpDIV(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:113) - Val x2 = (arg0.decoded.opcode._super - Val(51)); - EQZ(x2, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :62:19) at OpDIV ( " - "zirgen/circuit/rv32im/v2/dsl/inst_div.zir :113:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:63) - Val x3 = (arg0.decoded.func3 - Val(4)); - EQZ(x3, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at OpDIV ( " - "zirgen/circuit/rv32im/v2/dsl/inst_div.zir :113:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:64) - Val x4 = (arg0.decoded.func7 - Val(1)); - EQZ(x4, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at OpDIV ( " - "zirgen/circuit/rv32im/v2/dsl/inst_div.zir :113:20)))"); - // OpDIV(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:114) - DivideReturnStruct x5 = - exec_DoDiv(ctx, arg0.rs1._super, arg0.rs2._super, Val(1), Val(0), LAYOUT_LOOKUP(layout1, _0)); - return x5.quot; -} -__device__ ValU32Struct exec_OpDIVU(ExecContext& ctx, - DivInputStruct arg0, - BoundLayout layout1) { - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:62) - // OpDIVU(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:118) - Val x2 = (arg0.decoded.opcode._super - Val(51)); - EQZ(x2, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :62:19) at OpDIVU ( " - "zirgen/circuit/rv32im/v2/dsl/inst_div.zir :118:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:63) - Val x3 = (arg0.decoded.func3 - Val(5)); - EQZ(x3, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at OpDIVU ( " - "zirgen/circuit/rv32im/v2/dsl/inst_div.zir :118:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:64) - Val x4 = (arg0.decoded.func7 - Val(1)); - EQZ(x4, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at OpDIVU ( " - "zirgen/circuit/rv32im/v2/dsl/inst_div.zir :118:20)))"); - // OpDIVU(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:119) - DivideReturnStruct x5 = - exec_DoDiv(ctx, arg0.rs1._super, arg0.rs2._super, Val(0), Val(0), LAYOUT_LOOKUP(layout1, _0)); - return x5.quot; -} -__device__ ValU32Struct exec_OpREM(ExecContext& ctx, - DivInputStruct arg0, - BoundLayout layout1) { - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:62) - // OpREM(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:123) - Val x2 = (arg0.decoded.opcode._super - Val(51)); - EQZ(x2, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :62:19) at OpREM ( " - "zirgen/circuit/rv32im/v2/dsl/inst_div.zir :123:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:63) - Val x3 = (arg0.decoded.func3 - Val(6)); - EQZ(x3, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at OpREM ( " - "zirgen/circuit/rv32im/v2/dsl/inst_div.zir :123:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:64) - Val x4 = (arg0.decoded.func7 - Val(1)); - EQZ(x4, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at OpREM ( " - "zirgen/circuit/rv32im/v2/dsl/inst_div.zir :123:20)))"); - // OpREM(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:124) - DivideReturnStruct x5 = - exec_DoDiv(ctx, arg0.rs1._super, arg0.rs2._super, Val(1), Val(0), LAYOUT_LOOKUP(layout1, _0)); - return x5.rem; -} -__device__ ValU32Struct exec_OpREMU(ExecContext& ctx, - DivInputStruct arg0, - BoundLayout layout1) { - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:62) - // OpREMU(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:128) - Val x2 = (arg0.decoded.opcode._super - Val(51)); - EQZ(x2, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :62:19) at OpREMU ( " - "zirgen/circuit/rv32im/v2/dsl/inst_div.zir :128:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:63) - Val x3 = (arg0.decoded.func3 - Val(7)); - EQZ(x3, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at OpREMU ( " - "zirgen/circuit/rv32im/v2/dsl/inst_div.zir :128:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:64) - Val x4 = (arg0.decoded.func7 - Val(1)); - EQZ(x4, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at OpREMU ( " - "zirgen/circuit/rv32im/v2/dsl/inst_div.zir :128:20)))"); - // OpREMU(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:129) - DivideReturnStruct x5 = - exec_DoDiv(ctx, arg0.rs1._super, arg0.rs2._super, Val(0), Val(0), LAYOUT_LOOKUP(layout1, _0)); - return x5.rem; -} -__device__ InstOutputStruct exec_Div0(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2) { - // Div0(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:22) - DivInputStruct x3 = exec_DivInput(ctx, arg0, arg1, LAYOUT_LOOKUP(layout2, input)); - ValU32Struct x4; - if (to_size_t(x3._super.minorOnehot._super[0]._super)) { - // Div0(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:24) - ValU32Struct x5 = exec_OpSRL(ctx, x3, LAYOUT_LOOKUP(layout2, mulOutput.arm0._super)); - // Div0(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:23) - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm0._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm0._extra0.count._super), 0), - "Div0(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:23)"); - x4 = x5; - } else if (to_size_t(x3._super.minorOnehot._super[1]._super)) { - // Div0(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:25) - ValU32Struct x6 = exec_OpSRA(ctx, x3, LAYOUT_LOOKUP(layout2, mulOutput.arm1)); - x4 = x6; - } else if (to_size_t(x3._super.minorOnehot._super[2]._super)) { - // Div0(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:26) - ValU32Struct x7 = exec_OpSRLI(ctx, x3, LAYOUT_LOOKUP(layout2, mulOutput.arm2._super)); - // Div0(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:23) - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm2._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm2._extra0.count._super), 0), - "Div0(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:23)"); - x4 = x7; - } else if (to_size_t(x3._super.minorOnehot._super[3]._super)) { - // Div0(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:27) - ValU32Struct x8 = exec_OpSRAI(ctx, x3, LAYOUT_LOOKUP(layout2, mulOutput.arm3)); - x4 = x8; - } else if (to_size_t(x3._super.minorOnehot._super[4]._super)) { - // Div0(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:28) - ValU32Struct x9 = exec_OpDIV(ctx, x3, LAYOUT_LOOKUP(layout2, mulOutput.arm4._super)); - // Div0(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:23) - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm4._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm4._extra0.count._super), 0), - "Div0(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:23)"); - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm4._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm4._extra1.count._super), 0), - "Div0(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:23)"); - x4 = x9; - } else if (to_size_t(x3._super.minorOnehot._super[5]._super)) { - // Div0(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:29) - ValU32Struct x10 = exec_OpDIVU(ctx, x3, LAYOUT_LOOKUP(layout2, mulOutput.arm5._super)); - // Div0(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:23) - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm5._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm5._extra0.count._super), 0), - "Div0(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:23)"); - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm5._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm5._extra1.count._super), 0), - "Div0(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:23)"); - x4 = x10; - } else if (to_size_t(x3._super.minorOnehot._super[6]._super)) { - // Div0(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:30) - ValU32Struct x11 = exec_OpREM(ctx, x3, LAYOUT_LOOKUP(layout2, mulOutput.arm6._super)); - // Div0(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:23) - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm6._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm6._extra0.count._super), 0), - "Div0(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:23)"); - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm6._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm6._extra1.count._super), 0), - "Div0(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:23)"); - x4 = x11; - } else if (to_size_t(x3._super.minorOnehot._super[7]._super)) { - // Div0(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:31) - ValU32Struct x12 = exec_OpREMU(ctx, x3, LAYOUT_LOOKUP(layout2, mulOutput.arm7._super)); - // Div0(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:23) - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm7._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm7._extra0.count._super), 0), - "Div0(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:23)"); - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm7._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm7._extra1.count._super), 0), - "Div0(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:23)"); - x4 = x12; - } else { - assert(0 && "Reached unreachable mux arm"); - } - // Div0(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:33) - WriteRdStruct x13 = - exec_WriteRd(ctx, arg0, x3.ii, x3.decoded, Val(1), x4, LAYOUT_LOOKUP(layout2, _0)); - // AddU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:27) - // Div0(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:34) - Val x14 = (arg1.pcU32.low + Val(4)); - NormalizeU32Struct x15 = - exec_NormalizeU32(ctx, - DenormedValU32Struct{.low = x14, .high = arg1.pcU32.high}, - LAYOUT_LOOKUP(layout2, pcAdd)); - return InstOutputStruct{.newPc = x15._super, .newState = Val(32), .newMode = arg1.mode}; -} -__device__ MiscInputStruct exec_MiscInput(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2) { - // MiscInput(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:7) - EQZ((arg1.state - Val(32)), "MiscInput(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:7)"); - // MiscInput(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:9) - DecoderStruct x3 = exec_DecodeInst(ctx, arg0, arg1, LAYOUT_LOOKUP(layout2, decoded)); - // MiscInput(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:10) - GetDataStruct x4 = exec_ReadReg(ctx, arg0, arg1, x3.rs1, LAYOUT_LOOKUP(layout2, rs1)); - // MiscInput(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:11) - GetDataStruct x5 = exec_ReadReg(ctx, arg0, arg1, x3.rs2, LAYOUT_LOOKUP(layout2, rs2)); - return MiscInputStruct{._super = arg1, .ii = arg1, .decoded = x3, .rs1 = x4, .rs2 = x5}; -} -__device__ InstOutputStruct exec_FinalizeMisc(ExecContext& ctx, - RegStruct arg0, - MiscInputStruct arg1, - MiscOutputStruct arg2, - BoundLayout layout3) { - // FinalizeMisc(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:22) - NormalizeU32Struct x4 = exec_NormalizeU32(ctx, arg2.toWrite, LAYOUT_LOOKUP(layout3, writeData)); - // FinalizeMisc(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:23) - NormalizeU32Struct x5 = exec_NormalizeU32(ctx, arg2.newPc, LAYOUT_LOOKUP(layout3, pcNorm)); - // FinalizeMisc(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:24) - WriteRdStruct x6 = exec_WriteRd( - ctx, arg0, arg1.ii, arg1.decoded, arg2.doWrite, x4._super, LAYOUT_LOOKUP(layout3, _0)); - // InstOutput(zirgen/circuit/rv32im/v2/dsl/inst.zir:46) - // FinalizeMisc(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:25) - InstOutputStruct x7 = - InstOutputStruct{.newPc = x5._super, .newState = Val(32), .newMode = arg1.ii.mode}; - return x7; -} -__device__ MiscOutputStruct exec_OpXOR(ExecContext& ctx, - MiscInputStruct arg0, - BoundLayout layout1) { - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:62) - // OpXOR(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:96) - Val x2 = (arg0.decoded.opcode._super - Val(51)); - EQZ(x2, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :62:19) at OpXOR ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :96:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:63) - Val x3 = (arg0.decoded.func3 - Val(4)); - EQZ(x3, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at OpXOR ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :96:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:64) - EQZ(arg0.decoded.func7, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at OpXOR ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :96:20)))"); - // OpXOR(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:97) - ValU32Struct x4 = - exec_BitwiseXor(ctx, arg0.rs1._super, arg0.rs2._super, LAYOUT_LOOKUP(layout1, _0)); - // AddU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:27) - // SimpleOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:74) - Val x5 = (arg0._super.pcU32.low + Val(4)); - // MiscOutput(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:15) - // SimpleOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:75) - MiscOutputStruct x6 = - MiscOutputStruct{.doWrite = Val(1), - .toWrite = DenormedValU32Struct{.low = x4.low, .high = x4.high}, - .newPc = DenormedValU32Struct{.low = x5, .high = arg0._super.pcU32.high}}; - return x6; -} -__device__ MiscOutputStruct exec_OpOR(ExecContext& ctx, - MiscInputStruct arg0, - BoundLayout layout1) { - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:62) - // OpOR(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:101) - Val x2 = (arg0.decoded.opcode._super - Val(51)); - EQZ(x2, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :62:19) at OpOR ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :101:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:63) - Val x3 = (arg0.decoded.func3 - Val(6)); - EQZ(x3, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at OpOR ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :101:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:64) - EQZ(arg0.decoded.func7, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at OpOR ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :101:20)))"); - // OpOR(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:102) - ValU32Struct x4 = - exec_BitwiseOr(ctx, arg0.rs1._super, arg0.rs2._super, LAYOUT_LOOKUP(layout1, _0)); - // AddU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:27) - // SimpleOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:74) - Val x5 = (arg0._super.pcU32.low + Val(4)); - // MiscOutput(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:15) - // SimpleOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:75) - MiscOutputStruct x6 = - MiscOutputStruct{.doWrite = Val(1), - .toWrite = DenormedValU32Struct{.low = x4.low, .high = x4.high}, - .newPc = DenormedValU32Struct{.low = x5, .high = arg0._super.pcU32.high}}; - return x6; -} -__device__ MiscOutputStruct exec_OpAND(ExecContext& ctx, - MiscInputStruct arg0, - BoundLayout layout1) { - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:62) - // OpAND(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:106) - Val x2 = (arg0.decoded.opcode._super - Val(51)); - EQZ(x2, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :62:19) at OpAND ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :106:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:63) - Val x3 = (arg0.decoded.func3 - Val(7)); - EQZ(x3, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at OpAND ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :106:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:64) - EQZ(arg0.decoded.func7, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at OpAND ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :106:20)))"); - // OpAND(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:107) - ValU32Struct x4 = - exec_BitwiseAnd(ctx, arg0.rs1._super, arg0.rs2._super, LAYOUT_LOOKUP(layout1, _0)); - // AddU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:27) - // SimpleOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:74) - Val x5 = (arg0._super.pcU32.low + Val(4)); - // MiscOutput(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:15) - // SimpleOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:75) - MiscOutputStruct x6 = - MiscOutputStruct{.doWrite = Val(1), - .toWrite = DenormedValU32Struct{.low = x4.low, .high = x4.high}, - .newPc = DenormedValU32Struct{.low = x5, .high = arg0._super.pcU32.high}}; - return x6; -} -__device__ MiscOutputStruct exec_OpSLT(ExecContext& ctx, - MiscInputStruct arg0, - BoundLayout layout1) { - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:62) - // OpSLT(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:111) - Val x2 = (arg0.decoded.opcode._super - Val(51)); - EQZ(x2, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :62:19) at OpSLT ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :111:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:63) - Val x3 = (arg0.decoded.func3 - Val(2)); - EQZ(x3, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at OpSLT ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :111:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:64) - EQZ(arg0.decoded.func7, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at OpSLT ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :111:20)))"); - // OpSLT(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:112) - CmpLessThanStruct x4 = - exec_CmpLessThan(ctx, arg0.rs1._super, arg0.rs2._super, LAYOUT_LOOKUP(layout1, cmp)); - // DenormedValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:20) - // OpSLT(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:113) - DenormedValU32Struct x5 = - DenormedValU32Struct{.low = x4.isLessThan._super._super, .high = Val(0)}; - // AddU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:27) - // SimpleOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:74) - Val x6 = (arg0._super.pcU32.low + Val(4)); - return MiscOutputStruct{.doWrite = Val(1), - .toWrite = x5, - .newPc = DenormedValU32Struct{.low = x6, .high = arg0._super.pcU32.high}}; -} -__device__ MiscOutputStruct exec_OpSLTU(ExecContext& ctx, - MiscInputStruct arg0, - BoundLayout layout1) { - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:62) - // OpSLTU(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:117) - Val x2 = (arg0.decoded.opcode._super - Val(51)); - EQZ(x2, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :62:19) at OpSLTU ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :117:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:63) - Val x3 = (arg0.decoded.func3 - Val(3)); - EQZ(x3, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at OpSLTU ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :117:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:64) - EQZ(arg0.decoded.func7, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at OpSLTU ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :117:20)))"); - // OpSLTU(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:118) - CmpLessThanUnsignedStruct x4 = - exec_CmpLessThanUnsigned(ctx, arg0.rs1._super, arg0.rs2._super, LAYOUT_LOOKUP(layout1, cmp)); - // AddU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:27) - // SimpleOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:74) - // OpSLTU(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:119) - Val x5 = (arg0._super.pcU32.low + Val(4)); - // MiscOutput(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:15) - // SimpleOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:75) - MiscOutputStruct x6 = - MiscOutputStruct{.doWrite = Val(1), - .toWrite = DenormedValU32Struct{.low = x4.isLessThan, .high = Val(0)}, - .newPc = DenormedValU32Struct{.low = x5, .high = arg0._super.pcU32.high}}; - return x6; -} -__device__ InstOutputStruct exec_Misc0(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2) { - // Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:29) - MiscInputStruct x3 = exec_MiscInput(ctx, arg0, arg1, LAYOUT_LOOKUP(layout2, input)); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:62) - // OpADD(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:86) - // Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:31) - Val x4 = (x3.decoded.opcode._super - Val(51)); - // AddU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:27) - // OpADD(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:87) - Val x5 = (x3.rs1._super.low + x3.rs2._super.low); - Val x6 = (x3.rs1._super.high + x3.rs2._super.high); - // SimpleOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:74) - Val x7 = (x3._super.pcU32.low + Val(4)); - // DenormedValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:20) - DenormedValU32Struct x8 = DenormedValU32Struct{.low = x7, .high = x3._super.pcU32.high}; - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:64) - // OpSUB(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:91) - // Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:32) - Val x9 = (x3.decoded.func7 - Val(32)); - // SubU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:33) - // OpSUB(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:92) - Val x10 = (x3.rs1._super.low + Val(65536)); - Val x11 = (x3.rs1._super.high + Val(65535)); - // MiscOutput(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:15) - // SimpleOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:75) - MiscOutputStruct x12 = - MiscOutputStruct{.doWrite = Val(1), - .toWrite = DenormedValU32Struct{.low = (x10 - x3.rs2._super.low), - .high = (x11 - x3.rs2._super.high)}, - .newPc = x8}; - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:57) - // OpADDI(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:123) - // Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:38) - Val x13 = (x3.decoded.opcode._super - Val(19)); - // AddU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:27) - // OpADDI(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:124) - Val x14 = (x3.rs1._super.low + x3.decoded.immI.low); - Val x15 = (x3.rs1._super.high + x3.decoded.immI.high); - MiscOutputStruct x16; - if (to_size_t(x3._super.minorOnehot._super[0]._super)) { - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:62) - // OpADD(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:86) - // Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:31) - EQZ(x4, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :62:19) at " - "callsite( OpADD ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :86:20) at Misc0 ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :31:11))))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:63) - EQZ(x3.decoded.func3, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at " - "callsite( OpADD ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :86:20) at Misc0 ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :31:11))))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:64) - EQZ(x3.decoded.func7, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at " - "callsite( OpADD ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :86:20) at Misc0 ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :31:11))))"); - // Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30) - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm0._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm0._extra0.count._super), 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm0._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm0._extra1.count._super), 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm0._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm0._extra2.count._super), 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm0._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm0._extra3.count._super), 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm0._extra4.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm0._extra4.count._super), 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)"); - x16 = MiscOutputStruct{ - .doWrite = Val(1), .toWrite = DenormedValU32Struct{.low = x5, .high = x6}, .newPc = x8}; - } else if (to_size_t(x3._super.minorOnehot._super[1]._super)) { - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:62) - // OpSUB(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:91) - // Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:32) - EQZ(x4, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :62:19) at " - "callsite( OpSUB ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :91:20) at Misc0 ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :32:11))))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:63) - EQZ(x3.decoded.func3, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at " - "callsite( OpSUB ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :91:20) at Misc0 ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :32:11))))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:64) - EQZ(x9, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at " - "callsite( OpSUB ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :91:20) at Misc0 ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :32:11))))"); - // Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30) - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm1._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm1._extra0.count._super), 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm1._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm1._extra1.count._super), 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm1._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm1._extra2.count._super), 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm1._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm1._extra3.count._super), 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm1._extra4.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm1._extra4.count._super), 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)"); - x16 = x12; - } else if (to_size_t(x3._super.minorOnehot._super[2]._super)) { - // Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:33) - MiscOutputStruct x17 = exec_OpXOR(ctx, x3, LAYOUT_LOOKUP(layout2, miscOutput.arm2._super)); - // Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30) - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm2._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm2._extra0.count._super), 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm2._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm2._extra1.count._super), 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm2._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm2._extra2.count._super), 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm2._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm2._extra3.count._super), 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm2._extra4.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm2._extra4.count._super), 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)"); - x16 = x17; - } else if (to_size_t(x3._super.minorOnehot._super[3]._super)) { - // Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:34) - MiscOutputStruct x18 = exec_OpOR(ctx, x3, LAYOUT_LOOKUP(layout2, miscOutput.arm3._super)); - // Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30) - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm3._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm3._extra0.count._super), 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm3._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm3._extra1.count._super), 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm3._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm3._extra2.count._super), 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm3._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm3._extra3.count._super), 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm3._extra4.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm3._extra4.count._super), 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)"); - x16 = x18; - } else if (to_size_t(x3._super.minorOnehot._super[4]._super)) { - // Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:35) - MiscOutputStruct x19 = exec_OpAND(ctx, x3, LAYOUT_LOOKUP(layout2, miscOutput.arm4._super)); - // Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30) - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm4._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm4._extra0.count._super), 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm4._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm4._extra1.count._super), 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm4._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm4._extra2.count._super), 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm4._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm4._extra3.count._super), 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm4._extra4.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm4._extra4.count._super), 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)"); - x16 = x19; - } else if (to_size_t(x3._super.minorOnehot._super[5]._super)) { - // Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:36) - MiscOutputStruct x20 = exec_OpSLT(ctx, x3, LAYOUT_LOOKUP(layout2, miscOutput.arm5)); - x16 = x20; - } else if (to_size_t(x3._super.minorOnehot._super[6]._super)) { - // Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:37) - MiscOutputStruct x21 = exec_OpSLTU(ctx, x3, LAYOUT_LOOKUP(layout2, miscOutput.arm6._super)); - // Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30) - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm6._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm6._extra0.count._super), 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm6._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm6._extra1.count._super), 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm6._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm6._extra2.count._super), 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)"); - x16 = x21; - } else if (to_size_t(x3._super.minorOnehot._super[7]._super)) { - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:57) - // OpADDI(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:123) - // Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:38) - EQZ(x13, - "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :57:19) at callsite( " - "OpADDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :123:18) at Misc0 ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :38:12))))"); - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:58) - EQZ(x3.decoded.func3, - "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at callsite( " - "OpADDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :123:18) at Misc0 ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :38:12))))"); - // Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30) - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm7._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm7._extra0.count._super), 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm7._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm7._extra1.count._super), 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm7._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm7._extra2.count._super), 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm7._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm7._extra3.count._super), 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm7._extra4.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm7._extra4.count._super), 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)"); - x16 = MiscOutputStruct{ - .doWrite = Val(1), .toWrite = DenormedValU32Struct{.low = x14, .high = x15}, .newPc = x8}; - } else { - assert(0 && "Reached unreachable mux arm"); - } - // Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:40) - InstOutputStruct x22 = exec_FinalizeMisc(ctx, arg0, x3, x16, LAYOUT_LOOKUP(layout2, _super)); - return x22; -} -__device__ MiscOutputStruct exec_OpXORI(ExecContext& ctx, - MiscInputStruct arg0, - BoundLayout layout1) { - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:57) - // OpXORI(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:128) - Val x2 = (arg0.decoded.opcode._super - Val(19)); - EQZ(x2, - "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :57:19) at OpXORI ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :128:18)))"); - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:58) - Val x3 = (arg0.decoded.func3 - Val(4)); - EQZ(x3, - "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at OpXORI ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :128:18)))"); - // OpXORI(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:129) - ValU32Struct x4 = - exec_BitwiseXor(ctx, arg0.rs1._super, arg0.decoded.immI, LAYOUT_LOOKUP(layout1, _0)); - // AddU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:27) - // SimpleOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:74) - Val x5 = (arg0._super.pcU32.low + Val(4)); - // MiscOutput(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:15) - // SimpleOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:75) - MiscOutputStruct x6 = - MiscOutputStruct{.doWrite = Val(1), - .toWrite = DenormedValU32Struct{.low = x4.low, .high = x4.high}, - .newPc = DenormedValU32Struct{.low = x5, .high = arg0._super.pcU32.high}}; - return x6; -} -__device__ MiscOutputStruct exec_OpORI(ExecContext& ctx, - MiscInputStruct arg0, - BoundLayout layout1) { - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:57) - // OpORI(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:133) - Val x2 = (arg0.decoded.opcode._super - Val(19)); - EQZ(x2, - "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :57:19) at OpORI ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :133:18)))"); - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:58) - Val x3 = (arg0.decoded.func3 - Val(6)); - EQZ(x3, - "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at OpORI ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :133:18)))"); - // OpORI(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:134) - ValU32Struct x4 = - exec_BitwiseOr(ctx, arg0.rs1._super, arg0.decoded.immI, LAYOUT_LOOKUP(layout1, _0)); - // AddU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:27) - // SimpleOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:74) - Val x5 = (arg0._super.pcU32.low + Val(4)); - // MiscOutput(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:15) - // SimpleOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:75) - MiscOutputStruct x6 = - MiscOutputStruct{.doWrite = Val(1), - .toWrite = DenormedValU32Struct{.low = x4.low, .high = x4.high}, - .newPc = DenormedValU32Struct{.low = x5, .high = arg0._super.pcU32.high}}; - return x6; -} -__device__ MiscOutputStruct exec_OpANDI(ExecContext& ctx, - MiscInputStruct arg0, - BoundLayout layout1) { - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:57) - // OpANDI(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:138) - Val x2 = (arg0.decoded.opcode._super - Val(19)); - EQZ(x2, - "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :57:19) at OpANDI ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :138:18)))"); - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:58) - Val x3 = (arg0.decoded.func3 - Val(7)); - EQZ(x3, - "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at OpANDI ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :138:18)))"); - // OpANDI(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:139) - ValU32Struct x4 = - exec_BitwiseAnd(ctx, arg0.rs1._super, arg0.decoded.immI, LAYOUT_LOOKUP(layout1, _0)); - // AddU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:27) - // SimpleOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:74) - Val x5 = (arg0._super.pcU32.low + Val(4)); - // MiscOutput(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:15) - // SimpleOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:75) - MiscOutputStruct x6 = - MiscOutputStruct{.doWrite = Val(1), - .toWrite = DenormedValU32Struct{.low = x4.low, .high = x4.high}, - .newPc = DenormedValU32Struct{.low = x5, .high = arg0._super.pcU32.high}}; - return x6; -} -__device__ MiscOutputStruct exec_OpSLTI(ExecContext& ctx, - MiscInputStruct arg0, - BoundLayout layout1) { - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:57) - // OpSLTI(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:143) - Val x2 = (arg0.decoded.opcode._super - Val(19)); - EQZ(x2, - "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :57:19) at OpSLTI ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :143:18)))"); - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:58) - Val x3 = (arg0.decoded.func3 - Val(2)); - EQZ(x3, - "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at OpSLTI ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :143:18)))"); - // OpSLTI(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:144) - CmpLessThanStruct x4 = - exec_CmpLessThan(ctx, arg0.rs1._super, arg0.decoded.immI, LAYOUT_LOOKUP(layout1, cmp)); - // DenormedValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:20) - // OpSLTI(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:145) - DenormedValU32Struct x5 = - DenormedValU32Struct{.low = x4.isLessThan._super._super, .high = Val(0)}; - // AddU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:27) - // SimpleOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:74) - Val x6 = (arg0._super.pcU32.low + Val(4)); - return MiscOutputStruct{.doWrite = Val(1), - .toWrite = x5, - .newPc = DenormedValU32Struct{.low = x6, .high = arg0._super.pcU32.high}}; -} -__device__ MiscOutputStruct exec_OpSLTIU(ExecContext& ctx, - MiscInputStruct arg0, - BoundLayout layout1) { - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:57) - // OpSLTIU(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:149) - Val x2 = (arg0.decoded.opcode._super - Val(19)); - EQZ(x2, - "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :57:19) at OpSLTIU ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :149:18)))"); - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:58) - Val x3 = (arg0.decoded.func3 - Val(3)); - EQZ(x3, - "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at OpSLTIU ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :149:18)))"); - // OpSLTIU(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:150) - CmpLessThanUnsignedStruct x4 = exec_CmpLessThanUnsigned( - ctx, arg0.rs1._super, arg0.decoded.immI, LAYOUT_LOOKUP(layout1, cmp)); - // AddU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:27) - // SimpleOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:74) - // OpSLTIU(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:151) - Val x5 = (arg0._super.pcU32.low + Val(4)); - // MiscOutput(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:15) - // SimpleOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:75) - MiscOutputStruct x6 = - MiscOutputStruct{.doWrite = Val(1), - .toWrite = DenormedValU32Struct{.low = x4.isLessThan, .high = Val(0)}, - .newPc = DenormedValU32Struct{.low = x5, .high = arg0._super.pcU32.high}}; - return x6; -} -__device__ MiscOutputStruct exec_OpBEQ(ExecContext& ctx, - MiscInputStruct arg0, - BoundLayout layout1) { - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:57) - // OpBEQ(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:155) - Val x2 = (arg0.decoded.opcode._super - Val(99)); - EQZ(x2, - "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :57:19) at OpBEQ ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :155:18)))"); - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:58) - EQZ(arg0.decoded.func3, - "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at OpBEQ ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :155:18)))"); - // OpBEQ(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:156) - CmpEqualStruct x3 = - exec_CmpEqual(ctx, arg0.rs1._super, arg0.rs2._super, LAYOUT_LOOKUP(layout1, cmp)); - // AddU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:27) - // CmpOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:80) - // OpBEQ(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:157) - Val x4 = (arg0._super.pcU32.low + arg0.decoded.immB.low); - Val x5 = (arg0._super.pcU32.high + arg0.decoded.immB.high); - // CmpOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:81) - Val x6 = (arg0._super.pcU32.low + Val(4)); - // CondDenormed(zirgen/circuit/rv32im/v2/dsl/u32.zir:101) - // CmpOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:79) - Val x7 = (x3.isEqual._super._super * x4); - Val x8 = (Val(1) - x3.isEqual._super._super); - // CondDenormed(zirgen/circuit/rv32im/v2/dsl/u32.zir:102) - Val x9 = (x3.isEqual._super._super * x5); - // MiscOutput(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:15) - // CmpOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:82) - MiscOutputStruct x10 = - MiscOutputStruct{.doWrite = Val(0), - .toWrite = DenormedValU32Struct{.low = Val(0), .high = Val(0)}, - .newPc = DenormedValU32Struct{.low = (x7 + (x8 * x6)), - .high = (x9 + (x8 * arg0._super.pcU32.high))}}; - return x10; -} -__device__ MiscOutputStruct exec_OpBNE(ExecContext& ctx, - MiscInputStruct arg0, - BoundLayout layout1) { - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:57) - // OpBNE(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:161) - Val x2 = (arg0.decoded.opcode._super - Val(99)); - EQZ(x2, - "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :57:19) at OpBNE ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :161:18)))"); - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:58) - Val x3 = (arg0.decoded.func3 - Val(1)); - EQZ(x3, - "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at OpBNE ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :161:18)))"); - // OpBNE(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:162) - CmpEqualStruct x4 = - exec_CmpEqual(ctx, arg0.rs1._super, arg0.rs2._super, LAYOUT_LOOKUP(layout1, cmp)); - // OpBNE(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:163) - Val x5 = (Val(1) - x4.isEqual._super._super); - // AddU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:27) - // CmpOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:80) - Val x6 = (arg0._super.pcU32.low + arg0.decoded.immB.low); - Val x7 = (arg0._super.pcU32.high + arg0.decoded.immB.high); - // CmpOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:81) - Val x8 = (arg0._super.pcU32.low + Val(4)); - // CondDenormed(zirgen/circuit/rv32im/v2/dsl/u32.zir:101) - // CmpOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:79) - Val x9 = (Val(1) - x5); - // DenormedValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:20) - // CondDenormed(zirgen/circuit/rv32im/v2/dsl/u32.zir:100) - DenormedValU32Struct x10 = DenormedValU32Struct{ - .low = ((x5 * x6) + (x9 * x8)), .high = ((x5 * x7) + (x9 * arg0._super.pcU32.high))}; - // MiscOutput(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:15) - // CmpOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:82) - MiscOutputStruct x11 = - MiscOutputStruct{.doWrite = Val(0), - .toWrite = DenormedValU32Struct{.low = Val(0), .high = Val(0)}, - .newPc = x10}; - return x11; -} -__device__ MiscOutputStruct exec_OpBLT(ExecContext& ctx, - MiscInputStruct arg0, - BoundLayout layout1) { - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:57) - // OpBLT(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:167) - Val x2 = (arg0.decoded.opcode._super - Val(99)); - EQZ(x2, - "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :57:19) at OpBLT ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :167:18)))"); - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:58) - Val x3 = (arg0.decoded.func3 - Val(4)); - EQZ(x3, - "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at OpBLT ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :167:18)))"); - // OpBLT(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:168) - CmpLessThanStruct x4 = - exec_CmpLessThan(ctx, arg0.rs1._super, arg0.rs2._super, LAYOUT_LOOKUP(layout1, cmp)); - // AddU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:27) - // CmpOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:80) - // OpBLT(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:169) - Val x5 = (arg0._super.pcU32.low + arg0.decoded.immB.low); - Val x6 = (arg0._super.pcU32.high + arg0.decoded.immB.high); - // CmpOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:81) - Val x7 = (arg0._super.pcU32.low + Val(4)); - // CondDenormed(zirgen/circuit/rv32im/v2/dsl/u32.zir:101) - // CmpOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:79) - Val x8 = (x4.isLessThan._super._super * x5); - Val x9 = (Val(1) - x4.isLessThan._super._super); - // CondDenormed(zirgen/circuit/rv32im/v2/dsl/u32.zir:102) - Val x10 = (x4.isLessThan._super._super * x6); - // MiscOutput(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:15) - // CmpOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:82) - MiscOutputStruct x11 = - MiscOutputStruct{.doWrite = Val(0), - .toWrite = DenormedValU32Struct{.low = Val(0), .high = Val(0)}, - .newPc = DenormedValU32Struct{ - .low = (x8 + (x9 * x7)), .high = (x10 + (x9 * arg0._super.pcU32.high))}}; - return x11; -} -__device__ InstOutputStruct exec_Misc1(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2) { - // Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:44) - MiscInputStruct x3 = exec_MiscInput(ctx, arg0, arg1, LAYOUT_LOOKUP(layout2, input)); - MiscOutputStruct x4; - if (to_size_t(x3._super.minorOnehot._super[0]._super)) { - // Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:46) - MiscOutputStruct x5 = exec_OpXORI(ctx, x3, LAYOUT_LOOKUP(layout2, miscOutput.arm0._super)); - // Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45) - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm0._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm0._extra0.count._super), 0), - "Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm0._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm0._extra1.count._super), 0), - "Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm0._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm0._extra2.count._super), 0), - "Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm0._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm0._extra3.count._super), 0), - "Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm0._extra4.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm0._extra4.count._super), 0), - "Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45)"); - x4 = x5; - } else if (to_size_t(x3._super.minorOnehot._super[1]._super)) { - // Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:47) - MiscOutputStruct x6 = exec_OpORI(ctx, x3, LAYOUT_LOOKUP(layout2, miscOutput.arm1._super)); - // Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45) - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm1._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm1._extra0.count._super), 0), - "Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm1._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm1._extra1.count._super), 0), - "Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm1._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm1._extra2.count._super), 0), - "Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm1._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm1._extra3.count._super), 0), - "Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm1._extra4.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm1._extra4.count._super), 0), - "Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45)"); - x4 = x6; - } else if (to_size_t(x3._super.minorOnehot._super[2]._super)) { - // Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:48) - MiscOutputStruct x7 = exec_OpANDI(ctx, x3, LAYOUT_LOOKUP(layout2, miscOutput.arm2._super)); - // Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45) - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm2._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm2._extra0.count._super), 0), - "Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm2._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm2._extra1.count._super), 0), - "Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm2._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm2._extra2.count._super), 0), - "Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm2._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm2._extra3.count._super), 0), - "Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm2._extra4.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm2._extra4.count._super), 0), - "Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45)"); - x4 = x7; - } else if (to_size_t(x3._super.minorOnehot._super[3]._super)) { - // Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:49) - MiscOutputStruct x8 = exec_OpSLTI(ctx, x3, LAYOUT_LOOKUP(layout2, miscOutput.arm3)); - x4 = x8; - } else if (to_size_t(x3._super.minorOnehot._super[4]._super)) { - // Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:50) - MiscOutputStruct x9 = exec_OpSLTIU(ctx, x3, LAYOUT_LOOKUP(layout2, miscOutput.arm4._super)); - // Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45) - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm4._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm4._extra0.count._super), 0), - "Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm4._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm4._extra1.count._super), 0), - "Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm4._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm4._extra2.count._super), 0), - "Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45)"); - x4 = x9; - } else if (to_size_t(x3._super.minorOnehot._super[5]._super)) { - // Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:51) - MiscOutputStruct x10 = exec_OpBEQ(ctx, x3, LAYOUT_LOOKUP(layout2, miscOutput.arm5._super)); - // Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45) - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm5._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm5._extra0.count._super), 0), - "Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm5._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm5._extra1.count._super), 0), - "Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm5._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm5._extra2.count._super), 0), - "Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm5._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm5._extra3.count._super), 0), - "Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm5._extra4.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm5._extra4.count._super), 0), - "Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45)"); - x4 = x10; - } else if (to_size_t(x3._super.minorOnehot._super[6]._super)) { - // Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:52) - MiscOutputStruct x11 = exec_OpBNE(ctx, x3, LAYOUT_LOOKUP(layout2, miscOutput.arm6._super)); - // Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45) - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm6._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm6._extra0.count._super), 0), - "Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm6._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm6._extra1.count._super), 0), - "Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm6._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm6._extra2.count._super), 0), - "Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm6._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm6._extra3.count._super), 0), - "Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm6._extra4.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm6._extra4.count._super), 0), - "Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45)"); - x4 = x11; - } else if (to_size_t(x3._super.minorOnehot._super[7]._super)) { - // Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:53) - MiscOutputStruct x12 = exec_OpBLT(ctx, x3, LAYOUT_LOOKUP(layout2, miscOutput.arm7)); - x4 = x12; - } else { - assert(0 && "Reached unreachable mux arm"); - } - // Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:55) - InstOutputStruct x13 = exec_FinalizeMisc(ctx, arg0, x3, x4, LAYOUT_LOOKUP(layout2, _super)); - return x13; -} -__device__ MiscOutputStruct exec_OpBGE(ExecContext& ctx, - MiscInputStruct arg0, - BoundLayout layout1) { - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:57) - // OpBGE(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:173) - Val x2 = (arg0.decoded.opcode._super - Val(99)); - EQZ(x2, - "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :57:19) at OpBGE ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :173:18)))"); - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:58) - Val x3 = (arg0.decoded.func3 - Val(5)); - EQZ(x3, - "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at OpBGE ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :173:18)))"); - // OpBGE(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:174) - CmpLessThanStruct x4 = - exec_CmpLessThan(ctx, arg0.rs1._super, arg0.rs2._super, LAYOUT_LOOKUP(layout1, cmp)); - // OpBGE(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:175) - Val x5 = (Val(1) - x4.isLessThan._super._super); - // AddU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:27) - // CmpOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:80) - Val x6 = (arg0._super.pcU32.low + arg0.decoded.immB.low); - Val x7 = (arg0._super.pcU32.high + arg0.decoded.immB.high); - // CmpOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:81) - Val x8 = (arg0._super.pcU32.low + Val(4)); - // CondDenormed(zirgen/circuit/rv32im/v2/dsl/u32.zir:101) - // CmpOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:79) - Val x9 = (Val(1) - x5); - // DenormedValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:20) - // CondDenormed(zirgen/circuit/rv32im/v2/dsl/u32.zir:100) - DenormedValU32Struct x10 = DenormedValU32Struct{ - .low = ((x5 * x6) + (x9 * x8)), .high = ((x5 * x7) + (x9 * arg0._super.pcU32.high))}; - // MiscOutput(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:15) - // CmpOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:82) - MiscOutputStruct x11 = - MiscOutputStruct{.doWrite = Val(0), - .toWrite = DenormedValU32Struct{.low = Val(0), .high = Val(0)}, - .newPc = x10}; - return x11; -} -__device__ MiscOutputStruct exec_OpBLTU(ExecContext& ctx, - MiscInputStruct arg0, - BoundLayout layout1) { - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:57) - // OpBLTU(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:179) - Val x2 = (arg0.decoded.opcode._super - Val(99)); - EQZ(x2, - "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :57:19) at OpBLTU ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :179:18)))"); - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:58) - Val x3 = (arg0.decoded.func3 - Val(6)); - EQZ(x3, - "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at OpBLTU ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :179:18)))"); - // OpBLTU(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:180) - CmpLessThanUnsignedStruct x4 = - exec_CmpLessThanUnsigned(ctx, arg0.rs1._super, arg0.rs2._super, LAYOUT_LOOKUP(layout1, cmp)); - // AddU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:27) - // CmpOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:80) - // OpBLTU(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:181) - Val x5 = (arg0._super.pcU32.low + arg0.decoded.immB.low); - Val x6 = (arg0._super.pcU32.high + arg0.decoded.immB.high); - // CmpOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:81) - Val x7 = (arg0._super.pcU32.low + Val(4)); - // CondDenormed(zirgen/circuit/rv32im/v2/dsl/u32.zir:101) - // CmpOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:79) - Val x8 = (Val(1) - x4.isLessThan); - Val x9 = ((x4.isLessThan * x5) + (x8 * x7)); - // CondDenormed(zirgen/circuit/rv32im/v2/dsl/u32.zir:102) - Val x10 = ((x4.isLessThan * x6) + (x8 * arg0._super.pcU32.high)); - // MiscOutput(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:15) - // CmpOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:82) - MiscOutputStruct x11 = - MiscOutputStruct{.doWrite = Val(0), - .toWrite = DenormedValU32Struct{.low = Val(0), .high = Val(0)}, - .newPc = DenormedValU32Struct{.low = x9, .high = x10}}; - return x11; -} -__device__ MiscOutputStruct exec_OpBGEU(ExecContext& ctx, - MiscInputStruct arg0, - BoundLayout layout1) { - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:57) - // OpBGEU(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:185) - Val x2 = (arg0.decoded.opcode._super - Val(99)); - EQZ(x2, - "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :57:19) at OpBGEU ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :185:18)))"); - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:58) - Val x3 = (arg0.decoded.func3 - Val(7)); - EQZ(x3, - "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at OpBGEU ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :185:18)))"); - // OpBGEU(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:186) - CmpLessThanUnsignedStruct x4 = - exec_CmpLessThanUnsigned(ctx, arg0.rs1._super, arg0.rs2._super, LAYOUT_LOOKUP(layout1, cmp)); - // OpBGEU(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:187) - Val x5 = (Val(1) - x4.isLessThan); - // AddU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:27) - // CmpOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:80) - Val x6 = (arg0._super.pcU32.low + arg0.decoded.immB.low); - Val x7 = (arg0._super.pcU32.high + arg0.decoded.immB.high); - // CmpOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:81) - Val x8 = (arg0._super.pcU32.low + Val(4)); - // CondDenormed(zirgen/circuit/rv32im/v2/dsl/u32.zir:101) - // CmpOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:79) - Val x9 = (Val(1) - x5); - // DenormedValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:20) - // CondDenormed(zirgen/circuit/rv32im/v2/dsl/u32.zir:100) - DenormedValU32Struct x10 = DenormedValU32Struct{ - .low = ((x5 * x6) + (x9 * x8)), .high = ((x5 * x7) + (x9 * arg0._super.pcU32.high))}; - // MiscOutput(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:15) - // CmpOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:82) - MiscOutputStruct x11 = - MiscOutputStruct{.doWrite = Val(0), - .toWrite = DenormedValU32Struct{.low = Val(0), .high = Val(0)}, - .newPc = x10}; - return x11; -} -__device__ InstOutputStruct exec_Misc2(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2) { - // Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:59) - MiscInputStruct x3 = exec_MiscInput(ctx, arg0, arg1, LAYOUT_LOOKUP(layout2, input)); - // VerifyOpcode(zirgen/circuit/rv32im/v2/dsl/inst.zir:53) - // OpJAL(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:191) - // Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:64) - Val x4 = (x3.decoded.opcode._super - Val(111)); - // AddU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:27) - // OpJAL(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:193) - Val x5 = (x3._super.pcU32.low + Val(4)); - // DenormedValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:20) - DenormedValU32Struct x6 = DenormedValU32Struct{.low = x5, .high = x3._super.pcU32.high}; - // OpJAL(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:194) - Val x7 = (x3._super.pcU32.low + x3.decoded.immJ.low); - Val x8 = (x3._super.pcU32.high + x3.decoded.immJ.high); - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:57) - // OpJALR(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:198) - // Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:65) - Val x9 = (x3.decoded.opcode._super - Val(103)); - // AddU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:27) - // OpJALR(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:201) - Val x10 = (x3.rs1._super.low + x3.decoded.immI.low); - Val x11 = (x3.rs1._super.high + x3.decoded.immI.high); - // VerifyOpcode(zirgen/circuit/rv32im/v2/dsl/inst.zir:53) - // OpLUI(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:205) - // Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:66) - Val x12 = (x3.decoded.opcode._super - Val(55)); - // DenormedValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:20) - // Denorm(zirgen/circuit/rv32im/v2/dsl/u32.zir:38) - // OpLUI(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:206) - DenormedValU32Struct x13 = - DenormedValU32Struct{.low = x3.decoded.immU.low, .high = x3.decoded.immU.high}; - // VerifyOpcode(zirgen/circuit/rv32im/v2/dsl/inst.zir:53) - // OpAUIPC(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:210) - // Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:67) - Val x14 = (x3.decoded.opcode._super - Val(23)); - // AddU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:27) - // OpAUIPC(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:211) - Val x15 = (x3._super.pcU32.low + x3.decoded.immU.low); - Val x16 = (x3._super.pcU32.high + x3.decoded.immU.high); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:62) - // OpECALL(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:216) - // Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:68) - Val x17 = (x3.decoded.opcode._super - Val(115)); - // DenormedValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:20) - // AddU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:27) - // OpECALL(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:217) - DenormedValU32Struct x18 = - DenormedValU32Struct{.low = x3._super.pcU32.low, .high = x3._super.pcU32.high}; - // MiscOutput(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:15) - MiscOutputStruct x19 = - MiscOutputStruct{.doWrite = Val(0), - .toWrite = DenormedValU32Struct{.low = Val(0), .high = Val(0)}, - .newPc = x18}; - MiscOutputStruct x20; - if (to_size_t(x3._super.minorOnehot._super[0]._super)) { - // Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:61) - MiscOutputStruct x21 = exec_OpBGE(ctx, x3, LAYOUT_LOOKUP(layout2, miscOutput.arm0)); - x20 = x21; - } else if (to_size_t(x3._super.minorOnehot._super[1]._super)) { - // Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:62) - MiscOutputStruct x22 = exec_OpBLTU(ctx, x3, LAYOUT_LOOKUP(layout2, miscOutput.arm1._super)); - // Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60) - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm1._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm1._extra0.count._super), 0), - "Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm1._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm1._extra1.count._super), 0), - "Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm1._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm1._extra2.count._super), 0), - "Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60)"); - x20 = x22; - } else if (to_size_t(x3._super.minorOnehot._super[2]._super)) { - // Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:63) - MiscOutputStruct x23 = exec_OpBGEU(ctx, x3, LAYOUT_LOOKUP(layout2, miscOutput.arm2._super)); - // Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60) - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm2._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm2._extra0.count._super), 0), - "Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm2._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm2._extra1.count._super), 0), - "Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm2._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm2._extra2.count._super), 0), - "Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60)"); - x20 = x23; - } else if (to_size_t(x3._super.minorOnehot._super[3]._super)) { - // VerifyOpcode(zirgen/circuit/rv32im/v2/dsl/inst.zir:53) - // OpJAL(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:191) - // Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:64) - EQZ(x4, - "loc(callsite( VerifyOpcode ( zirgen/circuit/rv32im/v2/dsl/inst.zir :53:19) at callsite( " - "OpJAL ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :191:16) at Misc2 ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :64:11))))"); - // Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60) - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm3._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm3._extra0.count._super), 0), - "Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm3._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm3._extra1.count._super), 0), - "Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm3._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm3._extra2.count._super), 0), - "Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm3._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm3._extra3.count._super), 0), - "Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm3._extra4.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm3._extra4.count._super), 0), - "Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60)"); - x20 = MiscOutputStruct{ - .doWrite = Val(1), .toWrite = x6, .newPc = DenormedValU32Struct{.low = x7, .high = x8}}; - } else if (to_size_t(x3._super.minorOnehot._super[4]._super)) { - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:57) - // OpJALR(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:198) - // Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:65) - EQZ(x9, - "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :57:19) at callsite( " - "OpJALR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :198:18) at Misc2 ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :65:12))))"); - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:58) - EQZ(x3.decoded.func3, - "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at callsite( " - "OpJALR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :198:18) at Misc2 ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :65:12))))"); - // Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60) - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm4._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm4._extra0.count._super), 0), - "Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm4._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm4._extra1.count._super), 0), - "Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm4._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm4._extra2.count._super), 0), - "Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm4._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm4._extra3.count._super), 0), - "Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm4._extra4.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm4._extra4.count._super), 0), - "Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60)"); - x20 = MiscOutputStruct{ - .doWrite = Val(1), .toWrite = x6, .newPc = DenormedValU32Struct{.low = x10, .high = x11}}; - } else if (to_size_t(x3._super.minorOnehot._super[5]._super)) { - // VerifyOpcode(zirgen/circuit/rv32im/v2/dsl/inst.zir:53) - // OpLUI(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:205) - // Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:66) - EQZ(x12, - "loc(callsite( VerifyOpcode ( zirgen/circuit/rv32im/v2/dsl/inst.zir :53:19) at callsite( " - "OpLUI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :205:16) at Misc2 ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :66:11))))"); - // Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60) - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm5._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm5._extra0.count._super), 0), - "Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm5._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm5._extra1.count._super), 0), - "Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm5._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm5._extra2.count._super), 0), - "Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm5._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm5._extra3.count._super), 0), - "Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm5._extra4.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm5._extra4.count._super), 0), - "Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60)"); - x20 = MiscOutputStruct{.doWrite = Val(1), .toWrite = x13, .newPc = x6}; - } else if (to_size_t(x3._super.minorOnehot._super[6]._super)) { - // VerifyOpcode(zirgen/circuit/rv32im/v2/dsl/inst.zir:53) - // OpAUIPC(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:210) - // Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:67) - EQZ(x14, - "loc(callsite( VerifyOpcode ( zirgen/circuit/rv32im/v2/dsl/inst.zir :53:19) at callsite( " - "OpAUIPC ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :210:16) at Misc2 ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :67:13))))"); - // Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60) - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm6._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm6._extra0.count._super), 0), - "Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm6._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm6._extra1.count._super), 0), - "Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm6._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm6._extra2.count._super), 0), - "Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm6._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm6._extra3.count._super), 0), - "Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm6._extra4.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm6._extra4.count._super), 0), - "Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60)"); - x20 = MiscOutputStruct{ - .doWrite = Val(1), .toWrite = DenormedValU32Struct{.low = x15, .high = x16}, .newPc = x6}; - } else if (to_size_t(x3._super.minorOnehot._super[7]._super)) { - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:62) - // OpECALL(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:216) - // Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:68) - EQZ(x17, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :62:19) at " - "callsite( OpECALL ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :216:20) at Misc2 ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :68:13))))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:63) - EQZ(x3.decoded.func3, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at " - "callsite( OpECALL ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :216:20) at Misc2 ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :68:13))))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:64) - EQZ(x3.decoded.func7, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at " - "callsite( OpECALL ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :216:20) at Misc2 ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :68:13))))"); - // Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60) - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm7._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm7._extra0.count._super), 0), - "Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm7._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm7._extra1.count._super), 0), - "Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm7._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm7._extra2.count._super), 0), - "Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm7._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm7._extra3.count._super), 0), - "Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm7._extra4.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm7._extra4.count._super), 0), - "Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60)"); - x20 = x19; - } else { - assert(0 && "Reached unreachable mux arm"); - } - // Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:70) - InstOutputStruct x24 = exec_FinalizeMisc(ctx, arg0, x3, x20, LAYOUT_LOOKUP(layout2, _super)); - return x24; -} -__device__ MulInputStruct exec_MulInput(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2) { - // MulInput(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:8) - EQZ((arg1.state - Val(32)), "MulInput(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:8)"); - // MulInput(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:10) - DecoderStruct x3 = exec_DecodeInst(ctx, arg0, arg1, LAYOUT_LOOKUP(layout2, decoded)); - // MulInput(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:11) - GetDataStruct x4 = exec_ReadReg(ctx, arg0, arg1, x3.rs1, LAYOUT_LOOKUP(layout2, rs1)); - // MulInput(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:12) - GetDataStruct x5 = exec_ReadReg(ctx, arg0, arg1, x3.rs2, LAYOUT_LOOKUP(layout2, rs2)); - return MulInputStruct{._super = arg1, .ii = arg1, .decoded = x3, .rs1 = x4, .rs2 = x5}; -} -__device__ DoMulStruct exec_DoMul(ExecContext& ctx, - ValU32Struct arg0, - ValU32Struct arg1, - Val arg2, - Val arg3, - BoundLayout layout4) { - // DoMul(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:40) - MultiplyAccumulateStruct x5 = exec_MultiplyAccumulate( - ctx, - arg0, - arg1, - ValU32Struct{.low = Val(0), .high = Val(0)}, - MultiplySettingsStruct{.aSigned = arg2, .bSigned = arg3, .cSigned = Val(0)}, - LAYOUT_LOOKUP(layout4, mul)); - return DoMulStruct{.low = x5.outLow, .high = x5.outHigh}; -} -__device__ ValU32Struct exec_OpSLL(ExecContext& ctx, - MulInputStruct arg0, - BoundLayout layout1) { - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:62) - // OpSLL(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:46) - Val x2 = (arg0.decoded.opcode._super - Val(51)); - EQZ(x2, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :62:19) at OpSLL ( " - "zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :46:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:63) - Val x3 = (arg0.decoded.func3 - Val(1)); - EQZ(x3, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at OpSLL ( " - "zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :46:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:64) - EQZ(arg0.decoded.func7, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at OpSLL ( " - "zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :46:20)))"); - // OpSLL(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:47) - ValU32Struct x4 = exec_DynPo2(ctx, arg0.rs2._super.low, LAYOUT_LOOKUP(layout1, shiftMul)); - // OpSLL(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:48) - DoMulStruct x5 = exec_DoMul(ctx, arg0.rs1._super, x4, Val(0), Val(0), LAYOUT_LOOKUP(layout1, _0)); - return x5.low; -} -__device__ ValU32Struct exec_OpSLLI(ExecContext& ctx, - MulInputStruct arg0, - BoundLayout layout1) { - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:62) - // OpSLLI(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:52) - Val x2 = (arg0.decoded.opcode._super - Val(19)); - EQZ(x2, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :62:19) at OpSLLI ( " - "zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :52:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:63) - Val x3 = (arg0.decoded.func3 - Val(1)); - EQZ(x3, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at OpSLLI ( " - "zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :52:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:64) - EQZ(arg0.decoded.func7, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at OpSLLI ( " - "zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :52:20)))"); - // OpSLLI(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:53) - ValU32Struct x4 = exec_DynPo2(ctx, arg0.decoded.rs2, LAYOUT_LOOKUP(layout1, shiftMul)); - // OpSLLI(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:54) - DoMulStruct x5 = exec_DoMul(ctx, arg0.rs1._super, x4, Val(0), Val(0), LAYOUT_LOOKUP(layout1, _0)); - return x5.low; -} -__device__ ValU32Struct exec_OpMUL(ExecContext& ctx, - MulInputStruct arg0, - BoundLayout layout1) { - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:62) - // OpMUL(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:58) - Val x2 = (arg0.decoded.opcode._super - Val(51)); - EQZ(x2, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :62:19) at OpMUL ( " - "zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :58:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:63) - EQZ(arg0.decoded.func3, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at OpMUL ( " - "zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :58:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:64) - Val x3 = (arg0.decoded.func7 - Val(1)); - EQZ(x3, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at OpMUL ( " - "zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :58:20)))"); - // OpMUL(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:59) - DoMulStruct x4 = - exec_DoMul(ctx, arg0.rs1._super, arg0.rs2._super, Val(0), Val(0), LAYOUT_LOOKUP(layout1, _0)); - return x4.low; -} -__device__ ValU32Struct exec_OpMULH(ExecContext& ctx, - MulInputStruct arg0, - BoundLayout layout1) { - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:62) - // OpMULH(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:63) - Val x2 = (arg0.decoded.opcode._super - Val(51)); - EQZ(x2, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :62:19) at OpMULH ( " - "zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :63:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:63) - Val x3 = (arg0.decoded.func3 - Val(1)); - EQZ(x3, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at OpMULH ( " - "zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :63:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:64) - Val x4 = (arg0.decoded.func7 - Val(1)); - EQZ(x4, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at OpMULH ( " - "zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :63:20)))"); - // OpMULH(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:64) - DoMulStruct x5 = - exec_DoMul(ctx, arg0.rs1._super, arg0.rs2._super, Val(1), Val(1), LAYOUT_LOOKUP(layout1, _0)); - return x5.high; -} -__device__ ValU32Struct exec_OpMULHSU(ExecContext& ctx, - MulInputStruct arg0, - BoundLayout layout1) { - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:62) - // OpMULHSU(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:68) - Val x2 = (arg0.decoded.opcode._super - Val(51)); - EQZ(x2, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :62:19) at OpMULHSU " - "( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :68:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:63) - Val x3 = (arg0.decoded.func3 - Val(2)); - EQZ(x3, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at OpMULHSU " - "( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :68:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:64) - Val x4 = (arg0.decoded.func7 - Val(1)); - EQZ(x4, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at OpMULHSU " - "( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :68:20)))"); - // OpMULHSU(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:69) - DoMulStruct x5 = - exec_DoMul(ctx, arg0.rs1._super, arg0.rs2._super, Val(1), Val(0), LAYOUT_LOOKUP(layout1, _0)); - return x5.high; -} -__device__ ValU32Struct exec_OpMULHU(ExecContext& ctx, - MulInputStruct arg0, - BoundLayout layout1) { - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:62) - // OpMULHU(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:73) - Val x2 = (arg0.decoded.opcode._super - Val(51)); - EQZ(x2, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :62:19) at OpMULHU " - "( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :73:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:63) - Val x3 = (arg0.decoded.func3 - Val(3)); - EQZ(x3, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at OpMULHU " - "( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :73:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:64) - Val x4 = (arg0.decoded.func7 - Val(1)); - EQZ(x4, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at OpMULHU " - "( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :73:20)))"); - // OpMULHU(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:74) - DoMulStruct x5 = - exec_DoMul(ctx, arg0.rs1._super, arg0.rs2._super, Val(0), Val(0), LAYOUT_LOOKUP(layout1, _0)); - return x5.high; -} -__device__ InstOutputStruct exec_Mul0(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2) { - // Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:22) - MulInputStruct x3 = exec_MulInput(ctx, arg0, arg1, LAYOUT_LOOKUP(layout2, input)); - // ValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:10) - // IllegalMulOp(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:18) - // Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:30) - ValU32Struct x4 = ValU32Struct{.low = Val(0), .high = Val(0)}; - ValU32Struct x5; - if (to_size_t(x3._super.minorOnehot._super[0]._super)) { - // Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:24) - ValU32Struct x6 = exec_OpSLL(ctx, x3, LAYOUT_LOOKUP(layout2, mulOutput.arm0)); - x5 = x6; - } else if (to_size_t(x3._super.minorOnehot._super[1]._super)) { - // Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:25) - ValU32Struct x7 = exec_OpSLLI(ctx, x3, LAYOUT_LOOKUP(layout2, mulOutput.arm1)); - x5 = x7; - } else if (to_size_t(x3._super.minorOnehot._super[2]._super)) { - // Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:26) - ValU32Struct x8 = exec_OpMUL(ctx, x3, LAYOUT_LOOKUP(layout2, mulOutput.arm2._super)); - // Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23) - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm2._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm2._extra0.count._super), 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)"); - x5 = x8; - } else if (to_size_t(x3._super.minorOnehot._super[3]._super)) { - // Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:27) - ValU32Struct x9 = exec_OpMULH(ctx, x3, LAYOUT_LOOKUP(layout2, mulOutput.arm3._super)); - // Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23) - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm3._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm3._extra0.count._super), 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)"); - x5 = x9; - } else if (to_size_t(x3._super.minorOnehot._super[4]._super)) { - // Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:28) - ValU32Struct x10 = exec_OpMULHSU(ctx, x3, LAYOUT_LOOKUP(layout2, mulOutput.arm4._super)); - // Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23) - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm4._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm4._extra0.count._super), 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)"); - x5 = x10; - } else if (to_size_t(x3._super.minorOnehot._super[5]._super)) { - // Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:29) - ValU32Struct x11 = exec_OpMULHU(ctx, x3, LAYOUT_LOOKUP(layout2, mulOutput.arm5._super)); - // Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23) - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm5._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm5._extra0.count._super), 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)"); - x5 = x11; - } else if (to_size_t(x3._super.minorOnehot._super[6]._super)) { - // IllegalMulOp(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:17) - // Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:30) - EQZ(Val(2013265920), - "loc(callsite( IllegalMulOp ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :17:6) at Mul0 ( " - "zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :30:18)))"); - // Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23) - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm6._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm6._extra0.count._super), 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)"); - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm6._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm6._extra1.count._super), 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)"); - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm6._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm6._extra2.count._super), 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)"); - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm6._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm6._extra3.count._super), 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)"); - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm6._extra4.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm6._extra4.count._super), 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)"); - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm6._extra5.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm6._extra5.count._super), 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)"); - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm6._extra6.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm6._extra6.count._super), 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)"); - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm6._extra7.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm6._extra7.count._super), 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)"); - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm6._extra8.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm6._extra8.count._super), 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)"); - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm6._extra9.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm6._extra9.count._super), 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)"); - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm6._extra10.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm6._extra10.count._super), 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)"); - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm6._extra11.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm6._extra11.count._super), 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)"); - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm6._extra12.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm6._extra12.count._super), 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)"); - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm6._extra13.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm6._extra13.count._super), 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)"); - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm6._extra14.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm6._extra14.count._super), 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)"); - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm6._extra15.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm6._extra15.count._super), 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)"); - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm6._extra16.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm6._extra16.count._super), 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)"); - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm6._extra17.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm6._extra17.count._super), 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)"); - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm6._extra18.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm6._extra18.count._super), 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)"); - x5 = x4; - } else if (to_size_t(x3._super.minorOnehot._super[7]._super)) { - // IllegalMulOp(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:17) - // Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:31) - EQZ(Val(2013265920), - "loc(callsite( IllegalMulOp ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :17:6) at Mul0 ( " - "zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :31:18)))"); - // Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23) - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm7._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm7._extra0.count._super), 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)"); - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm7._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm7._extra1.count._super), 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)"); - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm7._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm7._extra2.count._super), 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)"); - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm7._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm7._extra3.count._super), 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)"); - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm7._extra4.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm7._extra4.count._super), 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)"); - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm7._extra5.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm7._extra5.count._super), 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)"); - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm7._extra6.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm7._extra6.count._super), 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)"); - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm7._extra7.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm7._extra7.count._super), 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)"); - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm7._extra8.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm7._extra8.count._super), 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)"); - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm7._extra9.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm7._extra9.count._super), 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)"); - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm7._extra10.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm7._extra10.count._super), 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)"); - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm7._extra11.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm7._extra11.count._super), 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)"); - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm7._extra12.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm7._extra12.count._super), 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)"); - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm7._extra13.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm7._extra13.count._super), 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)"); - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm7._extra14.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm7._extra14.count._super), 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)"); - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm7._extra15.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm7._extra15.count._super), 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)"); - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm7._extra16.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm7._extra16.count._super), 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)"); - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm7._extra17.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm7._extra17.count._super), 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)"); - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm7._extra18.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm7._extra18.count._super), 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)"); - x5 = x4; - } else { - assert(0 && "Reached unreachable mux arm"); - } - // Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:33) - WriteRdStruct x12 = - exec_WriteRd(ctx, arg0, x3.ii, x3.decoded, Val(1), x5, LAYOUT_LOOKUP(layout2, _0)); - // AddU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:27) - // Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:34) - Val x13 = (arg1.pcU32.low + Val(4)); - NormalizeU32Struct x14 = - exec_NormalizeU32(ctx, - DenormedValU32Struct{.low = x13, .high = arg1.pcU32.high}, - LAYOUT_LOOKUP(layout2, pcAdd)); - return InstOutputStruct{.newPc = x14._super, .newState = Val(32), .newMode = arg1.mode}; -} -__device__ MemLoadInputStruct exec_MemLoadInput(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2) { - // MemLoadInput(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:8) - EQZ((arg1.state - Val(32)), "MemLoadInput(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:8)"); - // MemLoadInput(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:10) - DecoderStruct x3 = exec_DecodeInst(ctx, arg0, arg1, LAYOUT_LOOKUP(layout2, decoded)); - // MemLoadInput(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:11) - GetDataStruct x4 = exec_ReadReg(ctx, arg0, arg1, x3.rs1, LAYOUT_LOOKUP(layout2, rs1)); - // AddU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:27) - // MemLoadInput(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:12) - Val x5 = (x4._super.low + x3.immI.low); - Val x6 = (x4._super.high + x3.immI.high); - NormalizeU32Struct x7 = exec_NormalizeU32( - ctx, DenormedValU32Struct{.low = x5, .high = x6}, LAYOUT_LOOKUP(layout2, addrU32)); - // MemLoadInput(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:13) - AddrDecomposeBitsStruct x8 = - exec_AddrDecomposeBits(ctx, x7._super, arg1.mode, LAYOUT_LOOKUP(layout2, addr)); - // MemLoadInput(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:14) - GetDataStruct x9 = exec_MemoryRead(ctx, arg0, x8.addr, LAYOUT_LOOKUP(layout2, data)); - return MemLoadInputStruct{.ii = arg1, .decoded = x3, .addr = x8, .data = x9}; -} -__device__ MemStoreInputStruct exec_MemStoreInput(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2) { - // MemStoreInput(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:18) - EQZ((arg1.state - Val(32)), "MemStoreInput(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:18)"); - // MemStoreInput(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:20) - DecoderStruct x3 = exec_DecodeInst(ctx, arg0, arg1, LAYOUT_LOOKUP(layout2, decoded)); - // MemStoreInput(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:21) - GetDataStruct x4 = exec_ReadReg(ctx, arg0, arg1, x3.rs1, LAYOUT_LOOKUP(layout2, rs1)); - // MemStoreInput(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:22) - GetDataStruct x5 = exec_ReadReg(ctx, arg0, arg1, x3.rs2, LAYOUT_LOOKUP(layout2, rs2)); - // AddU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:27) - // MemStoreInput(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:23) - Val x6 = (x4._super.low + x3.immS.low); - Val x7 = (x4._super.high + x3.immS.high); - NormalizeU32Struct x8 = exec_NormalizeU32( - ctx, DenormedValU32Struct{.low = x6, .high = x7}, LAYOUT_LOOKUP(layout2, addrU32)); - // MemStoreInput(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:24) - AddrDecomposeBitsStruct x9 = - exec_AddrDecomposeBits(ctx, x8._super, arg1.mode, LAYOUT_LOOKUP(layout2, addr)); - // MemStoreInput(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:25) - GetDataStruct x10 = exec_MemoryRead(ctx, arg0, x9.addr, LAYOUT_LOOKUP(layout2, data)); - return MemStoreInputStruct{.decoded = x3, .rs2 = x5, .addr = x9, .data = x10}; -} -__device__ MemStoreFinalizeStruct -exec_MemStoreFinalize(ExecContext& ctx, - RegStruct arg0, - MemStoreInputStruct arg1, - ValU32Struct arg2, - BoundLayout layout3) { - // MemStoreFinalize(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:29) - MemoryWriteStruct x4 = - exec_MemoryWrite(ctx, arg0, arg1.addr.addr, arg2, LAYOUT_LOOKUP(layout3, _0)); - return MemStoreFinalizeStruct{}; -} -__device__ SplitWordStruct exec_SplitWord(ExecContext& ctx, - Val arg0, - BoundLayout layout1) { - // SplitWord(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:33) - NondetRegStruct x2 = exec_NondetU8Reg(ctx, bitAnd(arg0, Val(255)), LAYOUT_LOOKUP(layout1, byte0)); - // SplitWord(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:34) - NondetRegStruct x3 = exec_NondetU8Reg( - ctx, (bitAnd(arg0, Val(65280)) * Val(2005401601)), LAYOUT_LOOKUP(layout1, byte1)); - // SplitWord(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:35) - Val x4 = ((x3._super * Val(256)) + x2._super); - EQZ((arg0 - x4), "SplitWord(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:35)"); - return SplitWordStruct{.byte0 = x2, .byte1 = x3}; -} -__device__ ValU32Struct exec_OpLB(ExecContext& ctx, - MemLoadInputStruct arg0, - BoundLayout layout1) { - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:57) - // OpLB(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:83) - Val x2 = (arg0.decoded.opcode._super - Val(3)); - EQZ(x2, - "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :57:19) at OpLB ( " - "zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :83:18)))"); - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:58) - EQZ(arg0.decoded.func3, - "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at OpLB ( " - "zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :83:18)))"); - // OpLB(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:84) - Val x3 = (arg0.addr.low1._super * arg0.data._super.high); - Val x4 = (Val(1) - arg0.addr.low1._super); - // OpLB(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:85) - SplitWordStruct x5 = - exec_SplitWord(ctx, (x3 + (x4 * arg0.data._super.low)), LAYOUT_LOOKUP(layout1, bytes)); - // OpLB(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:86) - Val x6 = (arg0.addr.low0._super * x5.byte1._super); - Val x7 = (Val(1) - arg0.addr.low0._super); - Val x8 = (x6 + (x7 * x5.byte0._super)); - // OpLB(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:87) - NondetRegStruct x9 = exec_NondetBitReg( - ctx, (bitAnd(x8, Val(128)) * Val(1997537281)), LAYOUT_LOOKUP(layout1, highBit)); - // OpLB(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:88) - NondetRegStruct x10 = - exec_NondetU8Reg(ctx, (bitAnd(x8, Val(127)) * Val(2)), LAYOUT_LOOKUP(layout1, low7x2)); - // OpLB(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:89) - Val x11 = ((x9._super * Val(128)) + (x10._super * Val(1006632961))); - EQZ((x8 - x11), "OpLB(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:89)"); - // ValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:10) - // OpLB(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:90) - ValU32Struct x12 = - ValU32Struct{.low = (x8 + (x9._super * Val(65280))), .high = (x9._super * Val(65535))}; - return x12; -} -__device__ ValU32Struct exec_OpLH(ExecContext& ctx, - MemLoadInputStruct arg0, - BoundLayout layout1) { - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:57) - // OpLH(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:94) - Val x2 = (arg0.decoded.opcode._super - Val(3)); - EQZ(x2, - "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :57:19) at OpLH ( " - "zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :94:18)))"); - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:58) - Val x3 = (arg0.decoded.func3 - Val(1)); - EQZ(x3, - "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at OpLH ( " - "zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :94:18)))"); - // OpLH(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:95) - EQZ(arg0.addr.low0._super, "OpLH(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:95)"); - // OpLH(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:96) - Val x4 = (arg0.addr.low1._super * arg0.data._super.high); - Val x5 = (Val(1) - arg0.addr.low1._super); - Val x6 = (x4 + (x5 * arg0.data._super.low)); - // OpLH(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:97) - NondetRegStruct x7 = exec_NondetBitReg( - ctx, (bitAnd(x6, Val(32768)) * Val(2013204481)), LAYOUT_LOOKUP(layout1, highBit)); - // OpLH(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:98) - NondetRegStruct x8 = - exec_NondetU8Reg(ctx, (bitAnd(x6, Val(32767)) * Val(2)), LAYOUT_LOOKUP(layout1, low15x2)); - // OpLH(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:99) - Val x9 = ((x7._super * Val(32768)) + (x8._super * Val(1006632961))); - EQZ((x6 - x9), "OpLH(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:99)"); - return ValU32Struct{.low = x6, .high = (x7._super * Val(65535))}; -} -__device__ ValU32Struct exec_OpLBU(ExecContext& ctx, - MemLoadInputStruct arg0, - BoundLayout layout1) { - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:57) - // OpLBU(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:111) - Val x2 = (arg0.decoded.opcode._super - Val(3)); - EQZ(x2, - "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :57:19) at OpLBU ( " - "zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :111:18)))"); - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:58) - Val x3 = (arg0.decoded.func3 - Val(4)); - EQZ(x3, - "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at OpLBU ( " - "zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :111:18)))"); - // OpLBU(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:112) - Val x4 = (arg0.addr.low1._super * arg0.data._super.high); - Val x5 = (Val(1) - arg0.addr.low1._super); - // OpLBU(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:113) - SplitWordStruct x6 = - exec_SplitWord(ctx, (x4 + (x5 * arg0.data._super.low)), LAYOUT_LOOKUP(layout1, bytes)); - // OpLBU(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:114) - Val x7 = (arg0.addr.low0._super * x6.byte1._super); - Val x8 = (Val(1) - arg0.addr.low0._super); - return ValU32Struct{.low = (x7 + (x8 * x6.byte0._super)), .high = Val(0)}; -} -__device__ InstOutputStruct exec_Mem0(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2) { - // Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:49) - MemLoadInputStruct x3 = exec_MemLoadInput(ctx, arg0, arg1, LAYOUT_LOOKUP(layout2, input)); - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:57) - // OpLW(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:104) - // Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:53) - Val x4 = (x3.decoded.opcode._super - Val(3)); - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:58) - Val x5 = (x3.decoded.func3 - Val(2)); - // OpLHU(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:119) - // Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:55) - Val x6 = (x3.decoded.func3 - Val(5)); - // OpLHU(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:121) - Val x7 = (x3.addr.low1._super * x3.data._super.high); - Val x8 = (Val(1) - x3.addr.low1._super); - // ValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:10) - // IllegalLoadOp(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:40) - // Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:56) - ValU32Struct x9 = ValU32Struct{.low = Val(0), .high = Val(0)}; - ValU32Struct x10; - if (to_size_t(arg1.minorOnehot._super[0]._super)) { - // Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:51) - ValU32Struct x11 = exec_OpLB(ctx, x3, LAYOUT_LOOKUP(layout2, output.arm0)); - x10 = x11; - } else if (to_size_t(arg1.minorOnehot._super[1]._super)) { - // Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:52) - ValU32Struct x12 = exec_OpLH(ctx, x3, LAYOUT_LOOKUP(layout2, output.arm1._super)); - // Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:50) - STORE(LAYOUT_LOOKUP(layout2, output.arm1._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm1._extra0.count._super), 0), - "Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:50)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm1._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm1._extra1.count._super), 0), - "Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:50)"); - x10 = x12; - } else if (to_size_t(arg1.minorOnehot._super[2]._super)) { - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:57) - // OpLW(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:104) - // Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:53) - EQZ(x4, - "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :57:19) at callsite( " - "OpLW ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :104:18) at Mem0 ( " - "zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :53:10))))"); - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:58) - EQZ(x5, - "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at callsite( " - "OpLW ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :104:18) at Mem0 ( " - "zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :53:10))))"); - // OpLW(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:105) - EQZ(x3.addr.low0._super, - "loc(callsite( OpLW ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :105:20) at Mem0 ( " - "zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :53:10)))"); - // OpLW(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:106) - EQZ(x3.addr.low1._super, - "loc(callsite( OpLW ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :106:20) at Mem0 ( " - "zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :53:10)))"); - // Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:50) - STORE(LAYOUT_LOOKUP(layout2, output.arm2._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm2._extra0.count._super), 0), - "Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:50)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm2._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm2._extra1.count._super), 0), - "Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:50)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm2._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm2._extra2.count._super), 0), - "Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:50)"); - x10 = x3.data._super; - } else if (to_size_t(arg1.minorOnehot._super[3]._super)) { - // Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:54) - ValU32Struct x13 = exec_OpLBU(ctx, x3, LAYOUT_LOOKUP(layout2, output.arm3._super)); - // Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:50) - STORE(LAYOUT_LOOKUP(layout2, output.arm3._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm3._extra0.count._super), 0), - "Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:50)"); - x10 = x13; - } else if (to_size_t(arg1.minorOnehot._super[4]._super)) { - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:57) - // OpLHU(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:119) - // Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:55) - EQZ(x4, - "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :57:19) at callsite( " - "OpLHU ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :119:18) at Mem0 ( " - "zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :55:11))))"); - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:58) - EQZ(x6, - "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at callsite( " - "OpLHU ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :119:18) at Mem0 ( " - "zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :55:11))))"); - // OpLHU(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:120) - EQZ(x3.addr.low0._super, - "loc(callsite( OpLHU ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :120:20) at Mem0 ( " - "zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :55:11)))"); - // Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:50) - STORE(LAYOUT_LOOKUP(layout2, output.arm4._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm4._extra0.count._super), 0), - "Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:50)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm4._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm4._extra1.count._super), 0), - "Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:50)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm4._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm4._extra2.count._super), 0), - "Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:50)"); - x10 = ValU32Struct{.low = (x7 + (x8 * x3.data._super.low)), .high = Val(0)}; - } else if (to_size_t(arg1.minorOnehot._super[5]._super)) { - // IllegalLoadOp(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:39) - // Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:56) - EQZ(Val(2013265920), - "loc(callsite( IllegalLoadOp ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :39:6) at Mem0 ( " - "zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :56:19)))"); - // Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:50) - STORE(LAYOUT_LOOKUP(layout2, output.arm5._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm5._extra0.count._super), 0), - "Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:50)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm5._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm5._extra1.count._super), 0), - "Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:50)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm5._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm5._extra2.count._super), 0), - "Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:50)"); - x10 = x9; - } else if (to_size_t(arg1.minorOnehot._super[6]._super)) { - // IllegalLoadOp(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:39) - // Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:57) - EQZ(Val(2013265920), - "loc(callsite( IllegalLoadOp ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :39:6) at Mem0 ( " - "zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :57:19)))"); - // Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:50) - STORE(LAYOUT_LOOKUP(layout2, output.arm6._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm6._extra0.count._super), 0), - "Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:50)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm6._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm6._extra1.count._super), 0), - "Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:50)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm6._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm6._extra2.count._super), 0), - "Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:50)"); - x10 = x9; - } else if (to_size_t(arg1.minorOnehot._super[7]._super)) { - // IllegalLoadOp(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:39) - // Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:58) - EQZ(Val(2013265920), - "loc(callsite( IllegalLoadOp ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :39:6) at Mem0 ( " - "zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :58:19)))"); - // Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:50) - STORE(LAYOUT_LOOKUP(layout2, output.arm7._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm7._extra0.count._super), 0), - "Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:50)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm7._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm7._extra1.count._super), 0), - "Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:50)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm7._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm7._extra2.count._super), 0), - "Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:50)"); - x10 = x9; - } else { - assert(0 && "Reached unreachable mux arm"); - } - // Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:60) - WriteRdStruct x14 = - exec_WriteRd(ctx, arg0, x3.ii, x3.decoded, Val(1), x10, LAYOUT_LOOKUP(layout2, _0)); - // AddU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:27) - // Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:61) - Val x15 = (arg1.pcU32.low + Val(4)); - NormalizeU32Struct x16 = - exec_NormalizeU32(ctx, - DenormedValU32Struct{.low = x15, .high = arg1.pcU32.high}, - LAYOUT_LOOKUP(layout2, pcAdd)); - return InstOutputStruct{.newPc = x16._super, .newState = Val(32), .newMode = arg1.mode}; -} -__device__ ValU32Struct exec_OpSB(ExecContext& ctx, - MemStoreInputStruct arg0, - BoundLayout layout1) { - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:57) - // OpSB(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:126) - Val x2 = (arg0.decoded.opcode._super - Val(35)); - EQZ(x2, - "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :57:19) at OpSB ( " - "zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :126:18)))"); - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:58) - EQZ(arg0.decoded.func3, - "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at OpSB ( " - "zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :126:18)))"); - // OpSB(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:127) - Val x3 = (arg0.addr.low1._super * arg0.data._super.high); - Val x4 = (Val(1) - arg0.addr.low1._super); - // OpSB(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:128) - SplitWordStruct x5 = - exec_SplitWord(ctx, (x3 + (x4 * arg0.data._super.low)), LAYOUT_LOOKUP(layout1, origBytes)); - // OpSB(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:129) - SplitWordStruct x6 = exec_SplitWord(ctx, arg0.rs2._super.low, LAYOUT_LOOKUP(layout1, newBytes)); - // OpSB(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:134) - Val x7 = (arg0.addr.low0._super * x5.byte0._super); - Val x8 = (Val(1) - arg0.addr.low0._super); - // OpSB(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:135) - Val x9 = (arg0.addr.low0._super * x6.byte0._super); - Val x10 = (((x8 * x5.byte1._super) + x9) * Val(256)); - // OpSB(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:134) - Val x11 = ((x7 + (x8 * x6.byte0._super)) + x10); - // OpSB(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:138) - Val x12 = (arg0.addr.low1._super * arg0.data._super.low); - // OpSB(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:139) - Val x13 = (arg0.addr.low1._super * x11); - // ValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:10) - // OpSB(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:137) - ValU32Struct x14 = - ValU32Struct{.low = (x12 + (x4 * x11)), .high = ((x4 * arg0.data._super.high) + x13)}; - return x14; -} -__device__ InstOutputStruct exec_Mem1(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2) { - // Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:66) - MemStoreInputStruct x3 = exec_MemStoreInput(ctx, arg0, arg1, LAYOUT_LOOKUP(layout2, input)); - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:57) - // OpSH(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:144) - // Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:69) - Val x4 = (x3.decoded.opcode._super - Val(35)); - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:58) - Val x5 = (x3.decoded.func3 - Val(1)); - // OpSH(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:150) - Val x6 = (x3.addr.low1._super * x3.data._super.low); - Val x7 = (Val(1) - x3.addr.low1._super); - // OpSH(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:151) - Val x8 = (x3.addr.low1._super * x3.rs2._super.low); - // ValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:10) - // OpSH(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:149) - ValU32Struct x9 = ValU32Struct{.low = (x6 + (x7 * x3.rs2._super.low)), - .high = ((x7 * x3.data._super.high) + x8)}; - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:58) - // OpSW(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:156) - // Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:70) - Val x10 = (x3.decoded.func3 - Val(2)); - // ValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:10) - // IllegalStoreOp(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:45) - // Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:71) - ValU32Struct x11 = ValU32Struct{.low = Val(0), .high = Val(0)}; - ValU32Struct x12; - if (to_size_t(arg1.minorOnehot._super[0]._super)) { - // Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:68) - ValU32Struct x13 = exec_OpSB(ctx, x3, LAYOUT_LOOKUP(layout2, output.arm0)); - x12 = x13; - } else if (to_size_t(arg1.minorOnehot._super[1]._super)) { - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:57) - // OpSH(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:144) - // Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:69) - EQZ(x4, - "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :57:19) at callsite( " - "OpSH ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :144:18) at Mem1 ( " - "zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :69:10))))"); - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:58) - EQZ(x5, - "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at callsite( " - "OpSH ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :144:18) at Mem1 ( " - "zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :69:10))))"); - // OpSH(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:145) - EQZ(x3.addr.low0._super, - "loc(callsite( OpSH ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :145:20) at Mem1 ( " - "zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :69:10)))"); - // Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67) - STORE(LAYOUT_LOOKUP(layout2, output.arm1._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm1._extra0.count._super), 0), - "Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm1._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm1._extra1.count._super), 0), - "Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm1._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm1._extra2.count._super), 0), - "Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm1._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm1._extra3.count._super), 0), - "Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67)"); - x12 = x9; - } else if (to_size_t(arg1.minorOnehot._super[2]._super)) { - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:57) - // OpSW(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:156) - // Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:70) - EQZ(x4, - "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :57:19) at callsite( " - "OpSW ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :156:18) at Mem1 ( " - "zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :70:10))))"); - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:58) - EQZ(x10, - "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at callsite( " - "OpSW ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :156:18) at Mem1 ( " - "zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :70:10))))"); - // OpSW(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:157) - EQZ(x3.addr.low0._super, - "loc(callsite( OpSW ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :157:20) at Mem1 ( " - "zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :70:10)))"); - // OpSW(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:158) - EQZ(x3.addr.low1._super, - "loc(callsite( OpSW ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :158:20) at Mem1 ( " - "zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :70:10)))"); - // Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67) - STORE(LAYOUT_LOOKUP(layout2, output.arm2._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm2._extra0.count._super), 0), - "Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm2._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm2._extra1.count._super), 0), - "Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm2._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm2._extra2.count._super), 0), - "Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm2._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm2._extra3.count._super), 0), - "Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67)"); - x12 = x3.rs2._super; - } else if (to_size_t(arg1.minorOnehot._super[3]._super)) { - // IllegalStoreOp(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:44) - // Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:71) - EQZ(Val(2013265920), - "loc(callsite( IllegalStoreOp ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :44:6) at Mem1 " - "( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :71:20)))"); - // Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67) - STORE(LAYOUT_LOOKUP(layout2, output.arm3._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm3._extra0.count._super), 0), - "Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm3._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm3._extra1.count._super), 0), - "Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm3._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm3._extra2.count._super), 0), - "Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm3._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm3._extra3.count._super), 0), - "Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67)"); - x12 = x11; - } else if (to_size_t(arg1.minorOnehot._super[4]._super)) { - // IllegalStoreOp(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:44) - // Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:72) - EQZ(Val(2013265920), - "loc(callsite( IllegalStoreOp ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :44:6) at Mem1 " - "( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :72:20)))"); - // Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67) - STORE(LAYOUT_LOOKUP(layout2, output.arm4._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm4._extra0.count._super), 0), - "Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm4._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm4._extra1.count._super), 0), - "Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm4._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm4._extra2.count._super), 0), - "Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm4._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm4._extra3.count._super), 0), - "Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67)"); - x12 = x11; - } else if (to_size_t(arg1.minorOnehot._super[5]._super)) { - // IllegalStoreOp(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:44) - // Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:73) - EQZ(Val(2013265920), - "loc(callsite( IllegalStoreOp ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :44:6) at Mem1 " - "( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :73:20)))"); - // Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67) - STORE(LAYOUT_LOOKUP(layout2, output.arm5._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm5._extra0.count._super), 0), - "Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm5._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm5._extra1.count._super), 0), - "Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm5._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm5._extra2.count._super), 0), - "Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm5._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm5._extra3.count._super), 0), - "Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67)"); - x12 = x11; - } else if (to_size_t(arg1.minorOnehot._super[6]._super)) { - // IllegalStoreOp(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:44) - // Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:74) - EQZ(Val(2013265920), - "loc(callsite( IllegalStoreOp ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :44:6) at Mem1 " - "( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :74:20)))"); - // Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67) - STORE(LAYOUT_LOOKUP(layout2, output.arm6._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm6._extra0.count._super), 0), - "Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm6._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm6._extra1.count._super), 0), - "Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm6._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm6._extra2.count._super), 0), - "Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm6._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm6._extra3.count._super), 0), - "Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67)"); - x12 = x11; - } else if (to_size_t(arg1.minorOnehot._super[7]._super)) { - // IllegalStoreOp(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:44) - // Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:75) - EQZ(Val(2013265920), - "loc(callsite( IllegalStoreOp ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :44:6) at Mem1 " - "( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :75:20)))"); - // Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67) - STORE(LAYOUT_LOOKUP(layout2, output.arm7._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm7._extra0.count._super), 0), - "Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm7._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm7._extra1.count._super), 0), - "Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm7._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm7._extra2.count._super), 0), - "Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm7._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm7._extra3.count._super), 0), - "Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67)"); - x12 = x11; - } else { - assert(0 && "Reached unreachable mux arm"); - } - // Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:77) - MemStoreFinalizeStruct x14 = - exec_MemStoreFinalize(ctx, arg0, x3, x12, LAYOUT_LOOKUP(layout2, _0)); - // AddU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:27) - // Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:78) - Val x15 = (arg1.pcU32.low + Val(4)); - NormalizeU32Struct x16 = - exec_NormalizeU32(ctx, - DenormedValU32Struct{.low = x15, .high = arg1.pcU32.high}, - LAYOUT_LOOKUP(layout2, pcAdd)); - return InstOutputStruct{.newPc = x16._super, .newState = Val(32), .newMode = arg1.mode}; -} -__device__ DigestRegStruct back_DigestReg(ExecContext& ctx, - Index distance0, - BoundLayout layout1) { - // DigestReg(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:7) - DigestRegValues_SuperStruct8Array x2 = - map(Val8Array{Val(0), Val(1), Val(2), Val(3), Val(4), Val(5), Val(6), Val(7)}, - LAYOUT_LOOKUP(layout1, values), - ([&](Val8Array::value_type x3, - BoundLayout x4) { - // DigestReg(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:8) - RegStruct x5 = back_Reg(ctx, distance0, LAYOUT_LOOKUP(x4, low)); - // DigestReg(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:9) - RegStruct x6 = back_Reg(ctx, distance0, LAYOUT_LOOKUP(x4, high)); - return DigestRegValues_SuperStruct{.low = x5, .high = x6}; - })); - return DigestRegStruct{.values = x2}; -} -__device__ DigestRegStruct exec_DigestReg(ExecContext& ctx, - ValU32Struct8Array arg0, - BoundLayout layout1) { - // DigestReg(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:7) - DigestRegValues_SuperStruct8Array x2 = - map(arg0, - LAYOUT_LOOKUP(layout1, values), - ([&](ValU32Struct8Array::value_type x3, - BoundLayout x4) { - // DigestReg(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:8) - RegStruct x5 = exec_Reg(ctx, x3.low, LAYOUT_LOOKUP(x4, low)); - // DigestReg(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:9) - RegStruct x6 = exec_Reg(ctx, x3.high, LAYOUT_LOOKUP(x4, high)); - return DigestRegValues_SuperStruct{.low = x5, .high = x6}; - })); - return DigestRegStruct{.values = x2}; -} -__device__ InstOutputStruct exec_ControlLoadRoot(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2, - GlobalBuf global3) { - // ControlLoadRoot(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:18) - BoundLayout<_globalLayout> x4 = BIND_LAYOUT(kLayoutGlobal, global3); - // ControlLoadRoot(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:20) - EQZ(arg1.state, "ControlLoadRoot(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:20)"); - // ControlLoadRoot(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:22) - ControlLoadRoot__0Struct8Array x5 = - map(Val8Array{Val(0), Val(1), Val(2), Val(3), Val(4), Val(5), Val(6), Val(7)}, - LAYOUT_LOOKUP(layout2, _1), - ([&](Val8Array::value_type x6, - BoundLayout x7) { - // ControlLoadRoot(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:23) - GetDataStruct x8 = - exec_MemoryPageIn(ctx, arg0, (x6 + Val(1140850680)), LAYOUT_LOOKUP(x7, mem)); - // ControlLoadRoot(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:19) - DigestRegStruct x9 = back_DigestReg(ctx, 0, LAYOUT_LOOKUP(x4, stateIn)); - // ControlLoadRoot(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:24) - Val x10 = (x9.values[to_size_t(x6)].low._super._super - x8._super.low); - EQZ(x10, "ControlLoadRoot(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:24)"); - // ControlLoadRoot(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:19) - DigestRegStruct x11 = back_DigestReg(ctx, 0, LAYOUT_LOOKUP(x4, stateIn)); - // ControlLoadRoot(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:25) - Val x12 = (x11.values[to_size_t(x6)].high._super._super - x8._super.high); - EQZ(x12, "ControlLoadRoot(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:25)"); - return ControlLoadRoot__0Struct{}; - })); - // InstOutput(zirgen/circuit/rv32im/v2/dsl/inst.zir:46) - // ControlLoadRoot(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:27) - InstOutputStruct x13 = InstOutputStruct{ - .newPc = ValU32Struct{.low = Val(0), .high = Val(0)}, .newState = Val(16), .newMode = Val(0)}; - return x13; -} -__device__ InstOutputStruct exec_ControlResume(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2, - GlobalBuf global3) { - // ControlResume(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:30) - BoundLayout<_globalLayout> x4 = BIND_LAYOUT(kLayoutGlobal, global3); - // ControlResume(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:31) - EQZ((arg1.state - Val(1)), "ControlResume(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:31)"); - // ControlResume(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:33) - Val x5 = (arg1.pcU32.low + arg1.pcU32.high); - NondetRegStruct x6 = exec_IsZero(ctx, x5, LAYOUT_LOOKUP(layout2, pcZero)); - InstOutputStruct x7; - if (to_size_t(x6._super)) { - // ControlResume(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:36) - GetDataStruct x8 = - exec_MemoryRead(ctx, arg0, Val(1073725572), LAYOUT_LOOKUP(layout2, _super.arm0._super.pc)); - // ControlResume(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:37) - GetDataStruct x9 = exec_MemoryRead( - ctx, arg0, Val(1073725573), LAYOUT_LOOKUP(layout2, _super.arm0._super.mode)); - // InstOutput(zirgen/circuit/rv32im/v2/dsl/inst.zir:46) - // ControlResume(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:38) - InstOutputStruct x10 = - InstOutputStruct{.newPc = x8._super, .newState = Val(1), .newMode = x9._super.low}; - // ControlResume(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:34) - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra0.count._super), 0), - "ControlResume(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:34)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra1.count._super), 0), - "ControlResume(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:34)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra2.count._super), 0), - "ControlResume(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:34)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra3.count._super), 0), - "ControlResume(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:34)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra4.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra4.count._super), 0), - "ControlResume(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:34)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra5.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra5.count._super), 0), - "ControlResume(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:34)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra6.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra6.count._super), 0), - "ControlResume(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:34)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra7.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra7.count._super), 0), - "ControlResume(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:34)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra8.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra8.count._super), 0), - "ControlResume(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:34)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra9.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra9.count._super), 0), - "ControlResume(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:34)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra10.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra10.count._super), 0), - "ControlResume(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:34)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra11.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra11.count._super), 0), - "ControlResume(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:34)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra12.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra12.count._super), 0), - "ControlResume(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:34)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra13.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra13.count._super), 0), - "ControlResume(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:34)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra14.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra14.count._super), 0), - "ControlResume(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:34)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra15.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra15.count._super), 0), - "ControlResume(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:34)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra16.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra16.count._super), 0), - "ControlResume(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:34)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra17.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra17.count._super), 0), - "ControlResume(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:34)"); - x7 = x10; - } else if (to_size_t((Val(1) - x6._super))) { - // ControlResume(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:41) - ControlResume_SuperArm1_Super__0Struct8Array x11 = - map(Val8Array{Val(0), Val(1), Val(2), Val(3), Val(4), Val(5), Val(6), Val(7)}, - LAYOUT_LOOKUP(layout2, _super.arm1._1), - ([&](Val8Array::value_type x12, - BoundLayout - x13) { - // ControlResume(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:40) - DigestRegStruct x14 = back_DigestReg(ctx, 0, LAYOUT_LOOKUP(x4, input)); - // ValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:10) - // ControlResume(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:43) - ValU32Struct x15 = - ValU32Struct{.low = x14.values[to_size_t(x12)].low._super._super, - .high = x14.values[to_size_t(x12)].high._super._super}; - // ControlResume(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:42) - MemoryWriteStruct x16 = - exec_MemoryWrite(ctx, arg0, (x12 + Val(1073725592)), x15, LAYOUT_LOOKUP(x13, _0)); - return ControlResume_SuperArm1_Super__0Struct{}; - })); - x7 = InstOutputStruct{.newPc = arg1.pcU32, .newState = Val(32), .newMode = arg1.mode}; - } else { - assert(0 && "Reached unreachable mux arm"); - } - return x7; -} -__device__ InstOutputStruct exec_ControlUserECALL(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2) { - // ControlUserECALL(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:50) - RegStruct x3 = exec_Reg(ctx, arg1.mode, LAYOUT_LOOKUP(layout2, safeMode)); - // ControlUserECALL(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:51) - AddrDecomposeBitsStruct x4 = - exec_AddrDecomposeBits(ctx, arg1.pcU32, x3._super._super, LAYOUT_LOOKUP(layout2, pcAddr)); - // ControlUserECALL(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:52) - EQZ(x4.low2, "ControlUserECALL(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:52)"); - // ControlUserECALL(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:53) - GetDataStruct x5 = exec_MemoryRead(ctx, arg0, x4._super, LAYOUT_LOOKUP(layout2, loadInst)); - // ControlUserECALL(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:54) - EQZ(x5._super.high, "ControlUserECALL(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:54)"); - // ControlUserECALL(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:55) - Val x6 = (x5._super.low - Val(115)); - EQZ(x6, "ControlUserECALL(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:55)"); - // ControlUserECALL(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:56) - EQZ((arg1.state - Val(32)), "ControlUserECALL(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:56)"); - // ControlUserECALL(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:57) - EQZ(arg1.mode, "ControlUserECALL(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:57)"); - // ControlUserECALL(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:58) - GetDataStruct x7 = - exec_MemoryRead(ctx, arg0, Val(1073725489), LAYOUT_LOOKUP(layout2, dispatchIdx)); - // ControlUserECALL(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:59) - EQZ(x7._super.high, "ControlUserECALL(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:59)"); - // ControlUserECALL(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:60) - Val x8 = (x7._super.low * Val(128)); - U16RegStruct x9 = exec_U16Reg(ctx, x8, LAYOUT_LOOKUP(layout2, _0)); - // ControlUserECALL(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:61) - Val x10 = (x7._super.low + Val(1073726464)); - GetDataStruct x11 = exec_MemoryRead(ctx, arg0, x10, LAYOUT_LOOKUP(layout2, newPcAddr)); - // ControlUserECALL(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:62) - MemoryWriteStruct x12 = - exec_MemoryWrite(ctx, arg0, Val(1073725568), arg1.pcU32, LAYOUT_LOOKUP(layout2, _1)); - return InstOutputStruct{.newPc = x11._super, .newState = Val(32), .newMode = Val(1)}; -} -__device__ InstOutputStruct exec_ControlMRET(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2) { - // ControlMRET(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:67) - RegStruct x3 = exec_Reg(ctx, arg1.mode, LAYOUT_LOOKUP(layout2, safeMode)); - // ControlMRET(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:68) - AddrDecomposeBitsStruct x4 = - exec_AddrDecomposeBits(ctx, arg1.pcU32, x3._super._super, LAYOUT_LOOKUP(layout2, pcAddr)); - // ControlMRET(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:69) - EQZ(x4.low2, "ControlMRET(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:69)"); - // ControlMRET(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:70) - GetDataStruct x5 = exec_MemoryRead(ctx, arg0, x4._super, LAYOUT_LOOKUP(layout2, loadInst)); - // ControlMRET(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:71) - Val x6 = (x5._super.high - Val(12320)); - EQZ(x6, "ControlMRET(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:71)"); - // ControlMRET(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:72) - Val x7 = (x5._super.low - Val(115)); - EQZ(x7, "ControlMRET(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:72)"); - // ControlMRET(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:73) - EQZ((arg1.state - Val(32)), "ControlMRET(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:73)"); - // ControlMRET(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:74) - EQZ((arg1.mode - Val(1)), "ControlMRET(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:74)"); - // ControlMRET(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:75) - GetDataStruct x8 = exec_MemoryRead(ctx, arg0, Val(1073725568), LAYOUT_LOOKUP(layout2, pc)); - // AddU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:27) - // ControlMRET(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:76) - Val x9 = (x8._super.low + Val(4)); - NormalizeU32Struct x10 = exec_NormalizeU32( - ctx, DenormedValU32Struct{.low = x9, .high = x8._super.high}, LAYOUT_LOOKUP(layout2, pcAdd)); - return InstOutputStruct{.newPc = x10._super, .newState = Val(32), .newMode = Val(0)}; -} -__device__ InstOutputStruct exec_ControlSuspend(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2, - GlobalBuf global3) { - // ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:80) - BoundLayout<_globalLayout> x4 = BIND_LAYOUT(kLayoutGlobal, global3); - // ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:81) - EQZ((arg1.state - Val(4)), "ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:81)"); - // ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:83) - Val x5 = (arg1.pcU32.low + arg1.pcU32.high); - NondetRegStruct x6 = exec_IsZero(ctx, x5, LAYOUT_LOOKUP(layout2, pcZero)); - // ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:91) - ComponentStruct x7 = ComponentStruct{}; - // ValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:10) - // ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:103) - ValU32Struct x8 = ValU32Struct{.low = Val(0), .high = Val(0)}; - InstOutputStruct x9; - if (to_size_t(x6._super)) { - // ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:89) - GetDataStruct8Array x10 = map( - Val8Array{Val(0), Val(1), Val(2), Val(3), Val(4), Val(5), Val(6), Val(7)}, - LAYOUT_LOOKUP(layout2, _super.arm0._1), - ([&](Val8Array::value_type x11, BoundLayout x12) { - GetDataStruct x13 = exec_MemoryRead(ctx, arg0, (x11 + Val(1073725584)), x12); - return x13; - })); - ValU32Struct8Array x14 = ValU32Struct8Array{x10[0]._super, - x10[1]._super, - x10[2]._super, - x10[3]._super, - x10[4]._super, - x10[5]._super, - x10[6]._super, - x10[7]._super}; - // ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:88) - DigestRegStruct x15 = exec_DigestReg(ctx, x14, LAYOUT_LOOKUP(x4, output)); - // ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:86) - RegStruct x16 = back_Reg(ctx, 0, LAYOUT_LOOKUP(x4, isTerminate)); - // ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:91) - Val x17 = (Val(1) - x16._super._super); - // ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:86) - RegStruct x18 = back_Reg(ctx, 0, LAYOUT_LOOKUP(x4, isTerminate)); - // ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:91) - Val x19 = (Val(1) - x18._super._super); - ComponentStruct x20; - if (to_size_t(x17)) { - // ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:92) - RegStruct x21 = exec_Reg(ctx, Val(0), LAYOUT_LOOKUP(x4, termA0low)); - // ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:93) - RegStruct x22 = exec_Reg(ctx, Val(0), LAYOUT_LOOKUP(x4, termA0high)); - // ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:94) - RegStruct x23 = exec_Reg(ctx, Val(0), LAYOUT_LOOKUP(x4, termA1low)); - // ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:95) - RegStruct x24 = exec_Reg(ctx, Val(0), LAYOUT_LOOKUP(x4, termA1high)); - x20 = x7; - } else if (to_size_t((Val(1) - x19))) { - x20 = x7; - } else { - assert(0 && "Reached unreachable mux arm"); - } - x9 = InstOutputStruct{.newPc = x8, .newState = Val(16), .newMode = Val(3)}; - } else if (to_size_t((Val(1) - x6._super))) { - // ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:107) - RegStruct x25 = exec_Reg(ctx, arg1.state, LAYOUT_LOOKUP(layout2, _super.arm1._super.state)); - // ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:108) - Val x26 = (x25._super._super - Val(32)); - Val x27 = (x25._super._super - Val(4)); - EQZ((x26 * x27), "ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:108)"); - // ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:111) - RegStruct x28 = exec_Reg(ctx, (x26 * Val(1797558858)), LAYOUT_LOOKUP(x4, isTerminate)); - // ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:113) - MemoryWriteStruct x29 = exec_MemoryWrite( - ctx, arg0, Val(1073725572), arg1.pcU32, LAYOUT_LOOKUP(layout2, _super.arm1._super._0)); - // ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:114) - MemoryWriteStruct x30 = exec_MemoryWrite(ctx, - arg0, - Val(1073725573), - ValU32Struct{.low = arg1.mode, .high = Val(0)}, - LAYOUT_LOOKUP(layout2, _super.arm1._super._1)); - // ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:84) - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra0.count._super), 0), - "ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:84)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra1.count._super), 0), - "ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:84)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra2.count._super), 0), - "ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:84)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra3.count._super), 0), - "ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:84)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra4.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra4.count._super), 0), - "ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:84)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra5.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra5.count._super), 0), - "ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:84)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra6.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra6.count._super), 0), - "ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:84)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra7.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra7.count._super), 0), - "ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:84)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra8.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra8.count._super), 0), - "ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:84)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra9.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra9.count._super), 0), - "ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:84)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra10.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra10.count._super), 0), - "ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:84)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra11.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra11.count._super), 0), - "ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:84)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra12.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra12.count._super), 0), - "ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:84)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra13.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra13.count._super), 0), - "ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:84)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra14.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra14.count._super), 0), - "ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:84)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra15.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra15.count._super), 0), - "ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:84)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra16.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra16.count._super), 0), - "ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:84)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra17.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra17.count._super), 0), - "ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:84)"); - x9 = InstOutputStruct{.newPc = x8, .newState = Val(4), .newMode = arg1.mode}; - } else { - assert(0 && "Reached unreachable mux arm"); - } - return x9; -} -__device__ InstOutputStruct exec_ControlStoreRoot(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2, - GlobalBuf global3) { - // ControlStoreRoot(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:120) - BoundLayout<_globalLayout> x4 = BIND_LAYOUT(kLayoutGlobal, global3); - // ControlStoreRoot(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:121) - EQZ((arg1.state - Val(5)), "ControlStoreRoot(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:121)"); - // ControlStoreRoot(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:123) - GetDataStruct8Array x5 = map( - Val8Array{Val(0), Val(1), Val(2), Val(3), Val(4), Val(5), Val(6), Val(7)}, - LAYOUT_LOOKUP(layout2, _1), - ([&](Val8Array::value_type x6, BoundLayout x7) { - // ControlStoreRoot(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:124) - GetDataStruct x8 = exec_MemoryPageOut(ctx, arg0, (x6 + Val(1140850680)), x7); - return x8; - })); - // ControlStoreRoot(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:123) - ValU32Struct8Array x9 = ValU32Struct8Array{x5[0]._super, - x5[1]._super, - x5[2]._super, - x5[3]._super, - x5[4]._super, - x5[5]._super, - x5[6]._super, - x5[7]._super}; - // ControlStoreRoot(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:122) - DigestRegStruct x10 = exec_DigestReg(ctx, x9, LAYOUT_LOOKUP(x4, stateOut)); - // InstOutput(zirgen/circuit/rv32im/v2/dsl/inst.zir:46) - // ControlStoreRoot(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:127) - InstOutputStruct x11 = InstOutputStruct{ - .newPc = ValU32Struct{.low = Val(0), .high = Val(0)}, .newState = Val(6), .newMode = Val(0)}; - return x11; -} -__device__ InstOutputStruct exec_ControlTable(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2) { - // ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:131) - EQZ((arg1.state - Val(6)), "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:131)"); - // ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:132) - RegStruct x3 = exec_Reg(ctx, arg1.pcU32.low, LAYOUT_LOOKUP(layout2, entry)); - // ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:133) - RegStruct x4 = exec_Reg(ctx, arg1.mode, LAYOUT_LOOKUP(layout2, mode)); - // ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:134) - std::initializer_list x5 = std::initializer_list{x4._super._super, x3._super._super}; - // Log(:22) - INVOKE_EXTERN(ctx, log, "mode/entry = ", x5); - // ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135) - Val x6 = (Val(1) - x4._super._super); - // ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:137) - Val16Array x7 = Val16Array{Val(0), - Val(1), - Val(2), - Val(3), - Val(4), - Val(5), - Val(6), - Val(7), - Val(8), - Val(9), - Val(10), - Val(11), - Val(12), - Val(13), - Val(14), - Val(15)}; - // ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:142) - Val x8 = (x3._super._super + Val(16)); - // ValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:10) - // ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:145) - ValU32Struct x9 = ValU32Struct{.low = Val(0), .high = Val(0)}; - // ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:147) - ValU32Struct x10 = ValU32Struct{.low = x8, .high = Val(0)}; - InstOutputStruct x11; - if (to_size_t(x4._super._super)) { - // ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:137) - ControlTable_SuperArm0_Super__0Struct16Array x12 = - map(x7, - LAYOUT_LOOKUP(layout2, _super.arm0._super._1), - ([&](Val16Array::value_type x13, - BoundLayout - x14) { - // ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:138) - Val x15 = (x3._super._super + x13); - // LookupCurrent(zirgen/circuit/rv32im/v2/dsl/lookups.zir:5) - // ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:139) - Val x16 = INVOKE_EXTERN(ctx, lookupCurrent, Val(16), x15); - ArgU16Struct x17 = exec_ArgU16(ctx, neg_0(x16), x15, LAYOUT_LOOKUP(x14, arg)); - // ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:140) - Val x18 = (x17.val._super - x15); - EQZ(x18, "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:140)"); - return ControlTable_SuperArm0_Super__0Struct{}; - })); - // ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:143) - NondetRegStruct x19 = - exec_IsZero(ctx, (x8 - Val(65536)), LAYOUT_LOOKUP(layout2, _super.arm0._super.done)); - InstOutputStruct x20; - if (to_size_t(x19._super)) { - x20 = InstOutputStruct{.newPc = x9, .newState = Val(7), .newMode = Val(0)}; - } else if (to_size_t((Val(1) - x19._super))) { - x20 = InstOutputStruct{.newPc = x10, .newState = Val(6), .newMode = Val(1)}; - } else { - assert(0 && "Reached unreachable mux arm"); - } - // ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135) - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra0.count._super), 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra1.count._super), 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra2.count._super), 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra3.count._super), 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra4.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra4.count._super), 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra5.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra5.count._super), 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra6.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra6.count._super), 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra7.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra7.count._super), 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra8.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra8.count._super), 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra9.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra9.count._super), 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra10.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra10.count._super), 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra11.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra11.count._super), 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra12.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra12.count._super), 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra13.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra13.count._super), 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra14.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra14.count._super), 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra15.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra15.count._super), 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)"); - x11 = x20; - } else if (to_size_t(x6)) { - // ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:151) - ControlTable_SuperArm1_Super__0Struct16Array x21 = - map(x7, - LAYOUT_LOOKUP(layout2, _super.arm1._super._1), - ([&](Val16Array::value_type x22, - BoundLayout - x23) { - // ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:152) - Val x24 = (x3._super._super + x22); - // LookupCurrent(zirgen/circuit/rv32im/v2/dsl/lookups.zir:5) - // ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:153) - Val x25 = INVOKE_EXTERN(ctx, lookupCurrent, Val(8), x24); - ArgU8Struct x26 = exec_ArgU8(ctx, neg_0(x25), x24, LAYOUT_LOOKUP(x23, arg)); - // ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:154) - Val x27 = (x26.val._super - x24); - EQZ(x27, "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:154)"); - return ControlTable_SuperArm1_Super__0Struct{}; - })); - // ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:157) - NondetRegStruct x28 = - exec_IsZero(ctx, (x8 - Val(256)), LAYOUT_LOOKUP(layout2, _super.arm1._super.done)); - InstOutputStruct x29; - if (to_size_t(x28._super)) { - x29 = InstOutputStruct{.newPc = x9, .newState = Val(6), .newMode = Val(1)}; - } else if (to_size_t((Val(1) - x28._super))) { - x29 = InstOutputStruct{.newPc = x10, .newState = Val(6), .newMode = Val(0)}; - } else { - assert(0 && "Reached unreachable mux arm"); - } - // ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135) - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra0.count._super), 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra1.count._super), 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra2.count._super), 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra3.count._super), 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra4.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra4.count._super), 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra5.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra5.count._super), 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra6.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra6.count._super), 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra7.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra7.count._super), 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra8.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra8.count._super), 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra9.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra9.count._super), 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra10.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra10.count._super), 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra11.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra11.count._super), 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra12.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra12.count._super), 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra13.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra13.count._super), 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra14.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra14.count._super), 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra15.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra15.count._super), 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)"); - x11 = x29; - } else { - assert(0 && "Reached unreachable mux arm"); - } - return x11; -} -__device__ InstOutputStruct exec_Control0(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2, - GlobalBuf global3) { - // GetDiffCount(zirgen/circuit/rv32im/v2/dsl/mem.zir:22) - // Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:173) - Val x4 = INVOKE_EXTERN(ctx, getDiffCount, arg0._super._super); - CycleArgStruct x5 = - exec_CycleArg(ctx, neg_0(x4), arg0._super._super, LAYOUT_LOOKUP(layout2, arg)); - // Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:175) - Val x6 = (x5.cycle._super - arg0._super._super); - EQZ(x6, "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:175)"); - // InstOutput(zirgen/circuit/rv32im/v2/dsl/inst.zir:46) - // ControlDone(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:168) - // Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:184) - InstOutputStruct x7 = InstOutputStruct{ - .newPc = ValU32Struct{.low = Val(0), .high = Val(0)}, .newState = Val(7), .newMode = Val(0)}; - InstOutputStruct x8; - if (to_size_t(arg1.minorOnehot._super[0]._super)) { - // Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:177) - InstOutputStruct x9 = - exec_ControlLoadRoot(ctx, arg0, arg1, LAYOUT_LOOKUP(layout2, _super.arm0._super), global3); - // Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176) - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra0.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra1.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra2.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra3.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra4.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra4.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra5.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra5.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra6.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra6.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra7.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra7.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra8.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra8.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra9.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra9.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra10.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra10.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra11.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra11.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra12.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra12.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra13.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra13.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra14.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra14.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra15.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra15.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra16.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra16.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra17.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra17.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra18.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra18.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra19.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra19.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra20.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra20.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra21.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra21.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra22.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra22.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra23.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra23.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra24.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra24.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra25.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra25.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra26.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra26.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra27.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra27.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra28.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra28.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra29.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra29.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra30.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra30.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra31.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra31.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra32.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra32.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra33.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra33.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra34.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra34.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra35.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra35.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra36.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra36.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra37.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra37.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra38.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra38.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra39.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra39.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - x8 = x9; - } else if (to_size_t(arg1.minorOnehot._super[1]._super)) { - // Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:178) - InstOutputStruct x10 = - exec_ControlResume(ctx, arg0, arg1, LAYOUT_LOOKUP(layout2, _super.arm1._super), global3); - // Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176) - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra0.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra1.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra2.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra3.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra4.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra4.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra5.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra5.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra6.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra6.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra7.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra7.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra8.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra8.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra9.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra9.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra10.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra10.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra11.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra11.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra12.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra12.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra13.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra13.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra14.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra14.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra15.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra15.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra16.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra16.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra17.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra17.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra18.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra18.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra19.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra19.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra20.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra20.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra21.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra21.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra22.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra22.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra23.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra23.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra24.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra24.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra25.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra25.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra26.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra26.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra27.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra27.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra28.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra28.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra29.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra29.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra30.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra30.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra31.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra31.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - x8 = x10; - } else if (to_size_t(arg1.minorOnehot._super[2]._super)) { - // Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:179) - InstOutputStruct x11 = - exec_ControlUserECALL(ctx, arg0, arg1, LAYOUT_LOOKUP(layout2, _super.arm2._super)); - // Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176) - STORE(LAYOUT_LOOKUP(layout2, _super.arm2._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm2._extra0.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm2._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm2._extra1.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm2._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm2._extra2.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm2._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm2._extra3.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm2._extra4.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm2._extra4.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm2._extra5.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm2._extra5.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm2._extra6.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm2._extra6.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm2._extra7.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm2._extra7.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm2._extra8.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm2._extra8.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm2._extra9.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm2._extra9.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm2._extra10.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm2._extra10.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm2._extra11.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm2._extra11.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm2._extra12.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm2._extra12.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm2._extra13.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm2._extra13.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm2._extra14.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm2._extra14.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm2._extra15.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm2._extra15.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm2._extra16.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm2._extra16.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm2._extra17.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm2._extra17.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm2._extra18.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm2._extra18.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm2._extra19.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm2._extra19.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm2._extra20.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm2._extra20.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm2._extra21.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm2._extra21.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm2._extra22.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm2._extra22.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm2._extra23.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm2._extra23.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm2._extra24.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm2._extra24.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm2._extra25.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm2._extra25.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm2._extra26.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm2._extra26.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm2._extra27.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm2._extra27.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm2._extra28.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm2._extra28.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm2._extra29.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm2._extra29.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm2._extra30.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm2._extra30.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm2._extra31.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm2._extra31.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm2._extra32.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm2._extra32.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm2._extra33.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm2._extra33.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm2._extra34.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm2._extra34.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm2._extra35.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm2._extra35.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm2._extra36.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm2._extra36.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm2._extra37.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm2._extra37.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm2._extra38.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm2._extra38.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm2._extra39.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm2._extra39.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm2._extra40.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm2._extra40.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - x8 = x11; - } else if (to_size_t(arg1.minorOnehot._super[3]._super)) { - // Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:180) - InstOutputStruct x12 = - exec_ControlMRET(ctx, arg0, arg1, LAYOUT_LOOKUP(layout2, _super.arm3._super)); - // Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176) - STORE(LAYOUT_LOOKUP(layout2, _super.arm3._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm3._extra0.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm3._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm3._extra1.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm3._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm3._extra2.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm3._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm3._extra3.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm3._extra4.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm3._extra4.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm3._extra5.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm3._extra5.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm3._extra6.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm3._extra6.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm3._extra7.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm3._extra7.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm3._extra8.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm3._extra8.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm3._extra9.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm3._extra9.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm3._extra10.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm3._extra10.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm3._extra11.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm3._extra11.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm3._extra12.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm3._extra12.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm3._extra13.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm3._extra13.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm3._extra14.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm3._extra14.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm3._extra15.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm3._extra15.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm3._extra16.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm3._extra16.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm3._extra17.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm3._extra17.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm3._extra18.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm3._extra18.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm3._extra19.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm3._extra19.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm3._extra20.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm3._extra20.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm3._extra21.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm3._extra21.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm3._extra22.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm3._extra22.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm3._extra23.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm3._extra23.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm3._extra24.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm3._extra24.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm3._extra25.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm3._extra25.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm3._extra26.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm3._extra26.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm3._extra27.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm3._extra27.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm3._extra28.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm3._extra28.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm3._extra29.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm3._extra29.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm3._extra30.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm3._extra30.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm3._extra31.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm3._extra31.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm3._extra32.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm3._extra32.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm3._extra33.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm3._extra33.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm3._extra34.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm3._extra34.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm3._extra35.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm3._extra35.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm3._extra36.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm3._extra36.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm3._extra37.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm3._extra37.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm3._extra38.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm3._extra38.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm3._extra39.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm3._extra39.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm3._extra40.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm3._extra40.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm3._extra41.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm3._extra41.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm3._extra42.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm3._extra42.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm3._extra43.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm3._extra43.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm3._extra44.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm3._extra44.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm3._extra45.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm3._extra45.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - x8 = x12; - } else if (to_size_t(arg1.minorOnehot._super[4]._super)) { - // Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:181) - InstOutputStruct x13 = - exec_ControlSuspend(ctx, arg0, arg1, LAYOUT_LOOKUP(layout2, _super.arm4._super), global3); - // Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176) - STORE(LAYOUT_LOOKUP(layout2, _super.arm4._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm4._extra0.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm4._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm4._extra1.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm4._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm4._extra2.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm4._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm4._extra3.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm4._extra4.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm4._extra4.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm4._extra5.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm4._extra5.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm4._extra6.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm4._extra6.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm4._extra7.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm4._extra7.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm4._extra8.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm4._extra8.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm4._extra9.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm4._extra9.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm4._extra10.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm4._extra10.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm4._extra11.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm4._extra11.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm4._extra12.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm4._extra12.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm4._extra13.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm4._extra13.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm4._extra14.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm4._extra14.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm4._extra15.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm4._extra15.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm4._extra16.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm4._extra16.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm4._extra17.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm4._extra17.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm4._extra18.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm4._extra18.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm4._extra19.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm4._extra19.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm4._extra20.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm4._extra20.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm4._extra21.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm4._extra21.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm4._extra22.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm4._extra22.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm4._extra23.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm4._extra23.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm4._extra24.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm4._extra24.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm4._extra25.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm4._extra25.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm4._extra26.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm4._extra26.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm4._extra27.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm4._extra27.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm4._extra28.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm4._extra28.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm4._extra29.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm4._extra29.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm4._extra30.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm4._extra30.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm4._extra31.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm4._extra31.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - x8 = x13; - } else if (to_size_t(arg1.minorOnehot._super[5]._super)) { - // Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:182) - InstOutputStruct x14 = - exec_ControlStoreRoot(ctx, arg0, arg1, LAYOUT_LOOKUP(layout2, _super.arm5._super), global3); - // Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176) - STORE(LAYOUT_LOOKUP(layout2, _super.arm5._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm5._extra0.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm5._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm5._extra1.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm5._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm5._extra2.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm5._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm5._extra3.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm5._extra4.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm5._extra4.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm5._extra5.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm5._extra5.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm5._extra6.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm5._extra6.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm5._extra7.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm5._extra7.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm5._extra8.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm5._extra8.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm5._extra9.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm5._extra9.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm5._extra10.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm5._extra10.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm5._extra11.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm5._extra11.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm5._extra12.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm5._extra12.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm5._extra13.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm5._extra13.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm5._extra14.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm5._extra14.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm5._extra15.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm5._extra15.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm5._extra16.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm5._extra16.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm5._extra17.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm5._extra17.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm5._extra18.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm5._extra18.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm5._extra19.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm5._extra19.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm5._extra20.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm5._extra20.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm5._extra21.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm5._extra21.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm5._extra22.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm5._extra22.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm5._extra23.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm5._extra23.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm5._extra24.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm5._extra24.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm5._extra25.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm5._extra25.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm5._extra26.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm5._extra26.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm5._extra27.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm5._extra27.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm5._extra28.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm5._extra28.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm5._extra29.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm5._extra29.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm5._extra30.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm5._extra30.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm5._extra31.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm5._extra31.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - x8 = x14; - } else if (to_size_t(arg1.minorOnehot._super[6]._super)) { - // Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:183) - InstOutputStruct x15 = - exec_ControlTable(ctx, arg0, arg1, LAYOUT_LOOKUP(layout2, _super.arm6._super)); - // Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176) - STORE(LAYOUT_LOOKUP(layout2, _super.arm6._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm6._extra0.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm6._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm6._extra1.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm6._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm6._extra2.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm6._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm6._extra3.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm6._extra4.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm6._extra4.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm6._extra5.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm6._extra5.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm6._extra6.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm6._extra6.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm6._extra7.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm6._extra7.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm6._extra8.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm6._extra8.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm6._extra9.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm6._extra9.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm6._extra10.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm6._extra10.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm6._extra11.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm6._extra11.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm6._extra12.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm6._extra12.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm6._extra13.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm6._extra13.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm6._extra14.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm6._extra14.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm6._extra15.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm6._extra15.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm6._extra16.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm6._extra16.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm6._extra17.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm6._extra17.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm6._extra18.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm6._extra18.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm6._extra19.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm6._extra19.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm6._extra20.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm6._extra20.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm6._extra21.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm6._extra21.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm6._extra22.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm6._extra22.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm6._extra23.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm6._extra23.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - x8 = x15; - } else if (to_size_t(arg1.minorOnehot._super[7]._super)) { - // ControlDone(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:167) - // Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:184) - EQZ((arg1.state - Val(7)), - "loc(callsite( ControlDone ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :167:16) at " - "Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :184:17)))"); - // Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176) - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra0.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra1.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra2.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra3.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra4.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra4.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra5.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra5.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra6.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra6.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra7.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra7.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra8.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra8.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra9.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra9.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra10.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra10.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra11.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra11.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra12.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra12.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra13.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra13.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra14.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra14.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra15.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra15.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra16.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra16.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra17.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra17.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra18.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra18.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra19.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra19.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra20.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra20.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra21.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra21.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra22.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra22.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra23.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra23.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra24.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra24.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra25.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra25.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra26.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra26.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra27.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra27.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra28.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra28.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra29.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra29.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra30.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra30.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra31.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra31.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra32.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra32.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra33.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra33.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra34.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra34.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra35.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra35.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra36.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra36.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra37.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra37.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra38.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra38.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra39.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra39.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra40.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra40.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra41.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra41.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra42.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra42.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra43.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra43.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra44.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra44.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra45.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra45.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra46.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra46.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra47.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra47.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra48.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra48.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra49.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra49.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra50.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra50.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra51.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra51.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra52.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra52.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra53.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra53.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra54.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra54.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra55.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra55.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - x8 = x7; - } else { - assert(0 && "Reached unreachable mux arm"); - } - return x8; -} -__device__ OneHot_4_Struct exec_OneHot_4_(ExecContext& ctx, - Val arg0, - BoundLayout layout1) { - // OneHot(zirgen/circuit/rv32im/v2/dsl/one_hot.zir:7) - NondetRegStruct4Array x2 = - map(Val4Array{Val(0), Val(1), Val(2), Val(3)}, - LAYOUT_LOOKUP(layout1, _super), - ([&](Val4Array::value_type x3, BoundLayout x4) { - NondetRegStruct x5 = exec_NondetBitReg(ctx, isz((x3 - arg0)), x4); - return x5; - })); - // OneHot(zirgen/circuit/rv32im/v2/dsl/one_hot.zir:9) - Val x6 = (x2[0]._super + x2[1]._super); - Val x7 = ((x6 + x2[2]._super) + x2[3]._super); - EQZ((x7 - Val(1)), "OneHot(zirgen/circuit/rv32im/v2/dsl/one_hot.zir:9)"); - // OneHot(zirgen/circuit/rv32im/v2/dsl/one_hot.zir:11) - Val x8 = (x2[2]._super * Val(2)); - Val x9 = (x2[3]._super * Val(3)); - Val x10 = (x2[1]._super + x8); - EQZ(((x10 + x9) - arg0), "OneHot(zirgen/circuit/rv32im/v2/dsl/one_hot.zir:11)"); - return OneHot_4_Struct{._super = x2}; -} -__device__ ECallOutputStruct exec_MachineECall(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - Val arg2, - BoundLayout layout3) { - // MachineECall(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:26) - GetDataStruct x4 = exec_MemoryRead(ctx, arg0, arg2, LAYOUT_LOOKUP(layout3, loadInst)); - // MachineECall(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:27) - EQZ((arg1.state - Val(32)), "MachineECall(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:27)"); - // MachineECall(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:28) - EQZ(x4._super.high, "MachineECall(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:28)"); - // MachineECall(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:29) - Val x5 = (x4._super.low - Val(115)); - EQZ(x5, "MachineECall(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:29)"); - // MachineECall(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:30) - EQZ((arg1.mode - Val(1)), "MachineECall(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:30)"); - // MachineECall(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:31) - GetDataStruct x6 = - exec_MemoryRead(ctx, arg0, Val(1073725457), LAYOUT_LOOKUP(layout3, dispatchIdx)); - // MachineECall(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:32) - EQZ(x6._super.high, "MachineECall(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:32)"); - // MachineECall(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:33) - OneHot_4_Struct x7 = exec_OneHot_4_(ctx, x6._super.low, LAYOUT_LOOKUP(layout3, dispatch)); - Val x8; - if (to_size_t(x7._super[0]._super)) { - x8 = Val(9); - } else if (to_size_t(x7._super[1]._super)) { - x8 = Val(10); - } else if (to_size_t(x7._super[2]._super)) { - x8 = Val(11); - } else if (to_size_t(x7._super[3]._super)) { - x8 = Val(16); - } else { - assert(0 && "Reached unreachable mux arm"); - } - return ECallOutputStruct{.state = x8, .s0 = Val(0), .s1 = Val(0), .s2 = Val(0)}; -} -__device__ ECallOutputStruct exec_ECallTerminate(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2, - GlobalBuf global3) { - // ECallTerminate(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:43) - BoundLayout<_globalLayout> x4 = BIND_LAYOUT(kLayoutGlobal, global3); - // ECallTerminate(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:44) - EQZ((arg1.state - Val(9)), "ECallTerminate(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:44)"); - // ECallTerminate(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:45) - GetDataStruct x5 = exec_MemoryRead(ctx, arg0, Val(1073725482), LAYOUT_LOOKUP(layout2, a0)); - // ECallTerminate(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:46) - GetDataStruct x6 = exec_MemoryRead(ctx, arg0, Val(1073725483), LAYOUT_LOOKUP(layout2, a1)); - // ECallTerminate(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:47) - RegStruct x7 = exec_Reg(ctx, x5._super.low, LAYOUT_LOOKUP(x4, termA0low)); - // ECallTerminate(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:48) - RegStruct x8 = exec_Reg(ctx, x5._super.high, LAYOUT_LOOKUP(x4, termA0high)); - // ECallTerminate(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:49) - RegStruct x9 = exec_Reg(ctx, x6._super.low, LAYOUT_LOOKUP(x4, termA1low)); - // ECallTerminate(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:50) - RegStruct x10 = exec_Reg(ctx, x6._super.high, LAYOUT_LOOKUP(x4, termA1high)); - return ECallOutputStruct{.state = Val(4), .s0 = Val(0), .s1 = Val(0), .s2 = Val(0)}; -} -__device__ DecomposeLow2Struct exec_DecomposeLow2(ExecContext& ctx, - Val arg0, - BoundLayout layout1) { - // DecomposeLow2(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:57) - NondetRegStruct x2 = exec_NondetReg( - ctx, (bitAnd(arg0, Val(65532)) * Val(1509949441)), LAYOUT_LOOKUP(layout1, high)); - // DecomposeLow2(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:58) - NondetRegStruct x3 = exec_NondetReg(ctx, bitAnd(arg0, Val(3)), LAYOUT_LOOKUP(layout1, low2)); - // DecomposeLow2(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:59) - OneHot_4_Struct x4 = exec_OneHot_4_(ctx, x3._super, LAYOUT_LOOKUP(layout1, low2Hot)); - // DecomposeLow2(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:60) - NondetRegStruct x5 = exec_IsZero(ctx, x2._super, LAYOUT_LOOKUP(layout1, highZero)); - // DecomposeLow2(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:61) - Val x6 = (x5._super * x4._super[0]._super); - RegStruct x7 = exec_Reg(ctx, x6, LAYOUT_LOOKUP(layout1, isZero)); - // DecomposeLow2(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:63) - Val x8 = (x4._super[1]._super + x4._super[2]._super); - return DecomposeLow2Struct{.high = x2, - .low2 = x3, - .low2Hot = x4, - .highZero = x5, - .isZero = x7, - .low2Nonzero = (x8 + x4._super[3]._super)}; -} -__device__ ECallOutputStruct -exec_ECallHostReadSetup(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2) { - // ECallHostReadSetup(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:67) - EQZ((arg1.state - Val(10)), "ECallHostReadSetup(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:67)"); - // ECallHostReadSetup(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:69) - GetDataStruct x3 = exec_MemoryRead(ctx, arg0, Val(1073725450), LAYOUT_LOOKUP(layout2, fd)); - // ECallHostReadSetup(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:70) - GetDataStruct x4 = exec_MemoryRead(ctx, arg0, Val(1073725451), LAYOUT_LOOKUP(layout2, ptr)); - // ECallHostReadSetup(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:71) - GetDataStruct x5 = exec_MemoryRead(ctx, arg0, Val(1073725452), LAYOUT_LOOKUP(layout2, len)); - // ECallHostReadSetup(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:73) - EQZ(x3._super.high, "ECallHostReadSetup(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:73)"); - // ECallHostReadSetup(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:75) - EQZ(x5._super.high, "ECallHostReadSetup(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:75)"); - // HostReadPrepare(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:8) - // ECallHostReadSetup(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:77) - Val x6 = INVOKE_EXTERN(ctx, hostReadPrepare, x3._super.low, x5._super.low); - NondetRegStruct x7 = exec_NondetU16Reg(ctx, x6, LAYOUT_LOOKUP(layout2, newLen)); - // ECallHostReadSetup(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:79) - Val x8 = (x5._super.low - x7._super); - U16RegStruct x9 = exec_U16Reg(ctx, x8, LAYOUT_LOOKUP(layout2, diff)); - // ECallHostReadSetup(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:81) - MemoryWriteStruct x10 = exec_MemoryWrite(ctx, - arg0, - Val(1073725450), - ValU32Struct{.low = x7._super, .high = Val(0)}, - LAYOUT_LOOKUP(layout2, _0)); - // ECallHostReadSetup(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:83) - DecomposeLow2Struct x11 = - exec_DecomposeLow2(ctx, x4._super.low, LAYOUT_LOOKUP(layout2, ptrDecomp)); - // ECallHostReadSetup(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:84) - Val x12 = (x4._super.high * Val(16384)); - // ECallHostReadSetup(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:85) - DecomposeLow2Struct x13 = exec_DecomposeLow2(ctx, x7._super, LAYOUT_LOOKUP(layout2, lenDecomp)); - // ECallHostReadSetup(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:87) - Val x14 = (x13.highZero._super * x13.low2Nonzero); - RegStruct x15 = exec_Reg(ctx, x14, LAYOUT_LOOKUP(layout2, len123)); - // ECallHostReadSetup(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:89) - Val x16 = (x15._super._super * x11.low2Nonzero); - RegStruct x17 = exec_Reg(ctx, x16, LAYOUT_LOOKUP(layout2, uneven)); - // ECallHostReadSetup(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:93) - Val x18 = (x13.isZero._super._super * Val(32)); - // ECallHostReadSetup(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:95) - Val x19 = (Val(1) - x13.isZero._super._super); - // ECallHostReadSetup(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:97) - Val x20 = (Val(1) - x17._super._super); - // ECallHostReadSetup(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:95) - Val x21 = ((x18 + ((x19 * x17._super._super) * Val(12))) + ((x19 * x20) * Val(13))); - return ECallOutputStruct{ - .state = x21, .s0 = (x12 + x11.high._super), .s1 = x11.low2._super, .s2 = x7._super}; -} -__device__ ECallOutputStruct exec_ECallHostWrite(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2) { - // ECallHostWrite(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:102) - EQZ((arg1.state - Val(11)), "ECallHostWrite(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:102)"); - // ECallHostWrite(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:104) - GetDataStruct x3 = exec_MemoryRead(ctx, arg0, Val(1073725450), LAYOUT_LOOKUP(layout2, fd)); - // ECallHostWrite(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:105) - GetDataStruct x4 = exec_MemoryRead(ctx, arg0, Val(1073725451), LAYOUT_LOOKUP(layout2, ptr)); - // ECallHostWrite(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:106) - GetDataStruct x5 = exec_MemoryRead(ctx, arg0, Val(1073725452), LAYOUT_LOOKUP(layout2, len)); - // ECallHostWrite(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:107) - EQZ(x3._super.high, "ECallHostWrite(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:107)"); - // ECallHostWrite(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:108) - EQZ(x5._super.high, "ECallHostWrite(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:108)"); - // HostWrite(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:11) - // ECallHostWrite(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:110) - Val x6 = - INVOKE_EXTERN(ctx, hostWrite, x3._super.low, x4._super.low, x4._super.high, x5._super.low); - NondetRegStruct x7 = exec_NondetU16Reg(ctx, x6, LAYOUT_LOOKUP(layout2, newLen)); - // ECallHostWrite(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:112) - Val x8 = (x5._super.low - x7._super); - U16RegStruct x9 = exec_U16Reg(ctx, x8, LAYOUT_LOOKUP(layout2, diff)); - // ECallHostWrite(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:114) - MemoryWriteStruct x10 = exec_MemoryWrite(ctx, - arg0, - Val(1073725450), - ValU32Struct{.low = x7._super, .high = Val(0)}, - LAYOUT_LOOKUP(layout2, _0)); - return ECallOutputStruct{.state = Val(32), .s0 = Val(0), .s1 = Val(0), .s2 = Val(0)}; -} -__device__ ECallOutputStruct -exec_ECallHostReadWords(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - Val arg2, - Val arg3, - BoundLayout layout4) { - // ECallHostReadWords(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:127) - EQZ((arg1.state - Val(13)), - "ECallHostReadWords(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:127)"); - // ECallHostReadWords(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:128) - DecomposeLow2Struct x5 = exec_DecomposeLow2(ctx, arg3, LAYOUT_LOOKUP(layout4, lenDecomp)); - // ECallHostReadWords(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:129) - DecomposeLow2Struct x6 = - exec_DecomposeLow2(ctx, x5.high._super, LAYOUT_LOOKUP(layout4, wordsDecomp)); - // ECallHostReadWords(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:131) - Val x7 = (x6.low2Hot._super[1]._super * x6.highZero._super); - // ECallHostReadWords(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:132) - Val x8 = (x6.low2Hot._super[2]._super * x6.highZero._super); - // ECallHostReadWords(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:133) - Val x9 = (x6.low2Hot._super[3]._super * x6.highZero._super); - // ECallHostReadWords(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:134) - Val x10 = (Val(1) - x6.highZero._super); - // ECallHostReadWords(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:136) - Val x11 = (((x7 + x8) + x9) + x10); - // ECallHostReadWords(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:137) - ECallHostReadWords__0Struct4Array x12 = - map(Val4Array{Val(0), Val(1), Val(2), Val(3)}, - LAYOUT_LOOKUP(layout4, _1), - ([&](Val4Array::value_type x13, - BoundLayout x14) { - // ECallHostReadWords(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:138) - Val x15 = (Val4Array{x7, x8, x9, x10}[to_size_t(x13)] * (arg2 + x13)); - Val x16 = (Val(1) - Val4Array{x7, x8, x9, x10}[to_size_t(x13)]); - RegStruct x17 = - exec_Reg(ctx, (x15 + (x16 * Val(1073725504))), LAYOUT_LOOKUP(x14, addr)); - // ECallHostReadWords(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:139) - MemoryWriteUnconstrainedStruct x18 = - exec_MemoryWriteUnconstrained(ctx, arg0, x17._super._super, LAYOUT_LOOKUP(x14, _0)); - return ECallHostReadWords__0Struct{}; - })); - // ECallHostReadWords(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:141) - Val x19 = (arg3 - (x11 * Val(4))); - NondetRegStruct x20 = exec_IsZero(ctx, x19, LAYOUT_LOOKUP(layout4, lenZero)); - // ECallHostReadWords(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:146) - Val x21 = (Val(1) - x20._super); - // ECallHostReadWords(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:144) - Val x22 = ((x20._super * Val(32)) + ((x21 * x5.low2Nonzero) * Val(12))); - return ECallOutputStruct{.state = (x22 + ((x21 * (Val(1) - x5.low2Nonzero)) * Val(13))), - .s0 = (arg2 + x11), - .s1 = Val(0), - .s2 = x19}; -} -__device__ InstOutputStruct exec_ECall0(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2, - GlobalBuf global3) { - // ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:156) - AddrDecomposeBitsStruct x4 = - exec_AddrDecomposeBits(ctx, arg1.pcU32, arg1.mode, LAYOUT_LOOKUP(layout2, pcAddr)); - // ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:157) - EQZ(x4.low2, "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:157)"); - // ECallOutput(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:13) - // IllegalECall(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:22) - // ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:165) - ECallOutputStruct x5 = - ECallOutputStruct{.state = Val(0), .s0 = Val(0), .s1 = Val(0), .s2 = Val(0)}; - ECallOutputStruct x6; - if (to_size_t(arg1.minorOnehot._super[0]._super)) { - // ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:159) - ECallOutputStruct x7 = - exec_MachineECall(ctx, arg0, arg1, x4._super, LAYOUT_LOOKUP(layout2, output.arm0._super)); - // ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158) - STORE(LAYOUT_LOOKUP(layout2, output.arm0._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm0._extra0.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm0._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm0._extra1.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm0._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm0._extra2.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm0._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm0._extra3.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm0._extra4.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm0._extra4.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm0._extra5.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm0._extra5.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm0._extra6.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm0._extra6.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm0._extra7.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm0._extra7.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - x6 = x7; - } else if (to_size_t(arg1.minorOnehot._super[1]._super)) { - // ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:160) - ECallOutputStruct x8 = - exec_ECallTerminate(ctx, arg0, arg1, LAYOUT_LOOKUP(layout2, output.arm1._super), global3); - // ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158) - STORE(LAYOUT_LOOKUP(layout2, output.arm1._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm1._extra0.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm1._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm1._extra1.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm1._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm1._extra2.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm1._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm1._extra3.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm1._extra4.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm1._extra4.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm1._extra5.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm1._extra5.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm1._extra6.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm1._extra6.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm1._extra7.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm1._extra7.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - x6 = x8; - } else if (to_size_t(arg1.minorOnehot._super[2]._super)) { - // ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:161) - ECallOutputStruct x9 = - exec_ECallHostReadSetup(ctx, arg0, arg1, LAYOUT_LOOKUP(layout2, output.arm2)); - x6 = x9; - } else if (to_size_t(arg1.minorOnehot._super[3]._super)) { - // ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:162) - ECallOutputStruct x10 = - exec_ECallHostWrite(ctx, arg0, arg1, LAYOUT_LOOKUP(layout2, output.arm3)); - x6 = x10; - } else if (to_size_t(arg1.minorOnehot._super[4]._super)) { - // ECallHostReadBytes(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:121) - // ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:163) - EQZ((arg1.state - Val(12)), - "loc(callsite( ECallHostReadBytes ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :121:16) " - "at ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :163:24)))"); - // ECallHostReadBytes(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:122) - EQZ(Val(2013265920), - "loc(callsite( ECallHostReadBytes ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :122:6) at " - " ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :163:24)))"); - // ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158) - STORE(LAYOUT_LOOKUP(layout2, output.arm4._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm4._extra0.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm4._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm4._extra1.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm4._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm4._extra2.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm4._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm4._extra3.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm4._extra4.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm4._extra4.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm4._extra5.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm4._extra5.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm4._extra6.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm4._extra6.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm4._extra7.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm4._extra7.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm4._extra8.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm4._extra8.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm4._extra9.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm4._extra9.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm4._extra10.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm4._extra10.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm4._extra11.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm4._extra11.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm4._extra12.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm4._extra12.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm4._extra13.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm4._extra13.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - x6 = ECallOutputStruct{.state = Val(16), .s0 = Val(0), .s1 = Val(0), .s2 = Val(0)}; - } else if (to_size_t(arg1.minorOnehot._super[5]._super)) { - // ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:164) - RegStruct x11 = back_Reg(ctx, 1, LAYOUT_LOOKUP(layout2, s0)); - RegStruct x12 = back_Reg(ctx, 1, LAYOUT_LOOKUP(layout2, s2)); - ECallOutputStruct x13 = exec_ECallHostReadWords(ctx, - arg0, - arg1, - x11._super._super, - x12._super._super, - LAYOUT_LOOKUP(layout2, output.arm5._super)); - // ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158) - STORE(LAYOUT_LOOKUP(layout2, output.arm5._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm5._extra0.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm5._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm5._extra1.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - x6 = x13; - } else if (to_size_t(arg1.minorOnehot._super[6]._super)) { - // IllegalECall(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:21) - // ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:165) - EQZ(Val(2013265920), - "loc(callsite( IllegalECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :21:6) at " - "ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :165:18)))"); - // ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158) - STORE(LAYOUT_LOOKUP(layout2, output.arm6._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm6._extra0.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm6._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm6._extra1.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm6._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm6._extra2.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm6._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm6._extra3.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm6._extra4.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm6._extra4.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm6._extra5.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm6._extra5.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm6._extra6.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm6._extra6.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm6._extra7.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm6._extra7.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm6._extra8.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm6._extra8.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm6._extra9.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm6._extra9.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm6._extra10.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm6._extra10.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm6._extra11.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm6._extra11.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm6._extra12.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm6._extra12.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm6._extra13.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm6._extra13.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - x6 = x5; - } else if (to_size_t(arg1.minorOnehot._super[7]._super)) { - // IllegalECall(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:21) - // ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:166) - EQZ(Val(2013265920), - "loc(callsite( IllegalECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :21:6) at " - "ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :166:18)))"); - // ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158) - STORE(LAYOUT_LOOKUP(layout2, output.arm7._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm7._extra0.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm7._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm7._extra1.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm7._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm7._extra2.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm7._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm7._extra3.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm7._extra4.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm7._extra4.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm7._extra5.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm7._extra5.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm7._extra6.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm7._extra6.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm7._extra7.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm7._extra7.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm7._extra8.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm7._extra8.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm7._extra9.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm7._extra9.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm7._extra10.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm7._extra10.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm7._extra11.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm7._extra11.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm7._extra12.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm7._extra12.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm7._extra13.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm7._extra13.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - x6 = x5; - } else { - assert(0 && "Reached unreachable mux arm"); - } - // ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:168) - RegStruct x14 = exec_Reg(ctx, x6.s0, LAYOUT_LOOKUP(layout2, s0)); - // ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:169) - RegStruct x15 = exec_Reg(ctx, x6.s1, LAYOUT_LOOKUP(layout2, s1)); - // ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:170) - RegStruct x16 = exec_Reg(ctx, x6.s2, LAYOUT_LOOKUP(layout2, s2)); - // ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:171) - NondetRegStruct x17 = exec_IsZero(ctx, (x6.state - Val(32)), LAYOUT_LOOKUP(layout2, isDecode)); - // ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:172) - NondetRegStruct x18 = exec_IsZero(ctx, (x6.state - Val(16)), LAYOUT_LOOKUP(layout2, isP2Entry)); - // ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:173) - Val x19 = ((x17._super + x18._super) * Val(4)); - // AddU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:27) - Val x20 = (arg1.pcU32.low + x19); - NormalizeU32Struct x21 = - exec_NormalizeU32(ctx, - DenormedValU32Struct{.low = x20, .high = arg1.pcU32.high}, - LAYOUT_LOOKUP(layout2, addPC)); - // GetDiffCount(zirgen/circuit/rv32im/v2/dsl/mem.zir:22) - // ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:175) - Val x22 = INVOKE_EXTERN(ctx, getDiffCount, arg0._super._super); - CycleArgStruct x23 = - exec_CycleArg(ctx, neg_0(x22), arg0._super._super, LAYOUT_LOOKUP(layout2, arg)); - // ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:177) - Val x24 = (x23.cycle._super - arg0._super._super); - EQZ(x24, "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:177)"); - return InstOutputStruct{.newPc = x21._super, .newState = x6.state, .newMode = Val(1)}; -} -__device__ RegStruct exec_SBox(ExecContext& ctx, Val arg0, BoundLayout layout1) { - // SBox(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:25) - RegStruct x2 = exec_Reg(ctx, ((arg0 * arg0) * arg0), LAYOUT_LOOKUP(layout1, cubed)); - // SBox(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:26) - Val x3 = (x2._super._super * x2._super._super); - RegStruct x4 = exec_Reg(ctx, (x3 * arg0), LAYOUT_LOOKUP(layout1, _super)); - return x4; -} -__device__ MultiplyByMIntStruct exec_DoIntRound(ExecContext& ctx, - Val24Array arg0, - Val arg1, - BoundLayout layout2) { - // DoIntRound(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:32) - RegStruct x3 = exec_SBox(ctx, (arg0[0] + arg1), LAYOUT_LOOKUP(layout2, sbox)); - // MultiplyByMInt(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:13) - // DoIntRound(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:34) - Val x4 = (x3._super._super + arg0[1]); - Val x5 = (((x4 + arg0[2]) + arg0[3]) + arg0[4]); - Val x6 = (((x5 + arg0[5]) + arg0[6]) + arg0[7]); - Val x7 = (((x6 + arg0[8]) + arg0[9]) + arg0[10]); - Val x8 = (((x7 + arg0[11]) + arg0[12]) + arg0[13]); - Val x9 = (((x8 + arg0[14]) + arg0[15]) + arg0[16]); - Val x10 = (((x9 + arg0[17]) + arg0[18]) + arg0[19]); - Val x11 = (((x10 + arg0[20]) + arg0[21]) + arg0[22]); - Val x12 = (x11 + arg0[23]); - // MultiplyByMInt(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:14) - Val x13 = (x3._super._super * Val(1083257840)); - MultiplyByMInt_Super_SuperStruct24Array x14 = MultiplyByMInt_Super_SuperStruct24Array{ - MultiplyByMInt_Super_SuperStruct{._super = (x12 + x13)}, - MultiplyByMInt_Super_SuperStruct{._super = (x12 + (arg0[1] * Val(375892129)))}, - MultiplyByMInt_Super_SuperStruct{._super = (x12 + (arg0[2] * Val(111593398)))}, - MultiplyByMInt_Super_SuperStruct{._super = (x12 + (arg0[3] * Val(1867716110)))}, - MultiplyByMInt_Super_SuperStruct{._super = (x12 + (arg0[4] * Val(658182609)))}, - MultiplyByMInt_Super_SuperStruct{._super = (x12 + (arg0[5] * Val(51866717)))}, - MultiplyByMInt_Super_SuperStruct{._super = (x12 + (arg0[6] * Val(1928969209)))}, - MultiplyByMInt_Super_SuperStruct{._super = (x12 + (arg0[7] * Val(1942928017)))}, - MultiplyByMInt_Super_SuperStruct{._super = (x12 + (arg0[8] * Val(1558116381)))}, - MultiplyByMInt_Super_SuperStruct{._super = (x12 + (arg0[9] * Val(20525701)))}, - MultiplyByMInt_Super_SuperStruct{._super = (x12 + (arg0[10] * Val(1188752902)))}, - MultiplyByMInt_Super_SuperStruct{._super = (x12 + (arg0[11] * Val(106789798)))}, - MultiplyByMInt_Super_SuperStruct{._super = (x12 + (arg0[12] * Val(1389833583)))}, - MultiplyByMInt_Super_SuperStruct{._super = (x12 + (arg0[13] * Val(98371040)))}, - MultiplyByMInt_Super_SuperStruct{._super = (x12 + (arg0[14] * Val(1001081699)))}, - MultiplyByMInt_Super_SuperStruct{._super = (x12 + (arg0[15] * Val(1792686146)))}, - MultiplyByMInt_Super_SuperStruct{._super = (x12 + (arg0[16] * Val(801504236)))}, - MultiplyByMInt_Super_SuperStruct{._super = (x12 + (arg0[17] * Val(1997365680)))}, - MultiplyByMInt_Super_SuperStruct{._super = (x12 + (arg0[18] * Val(1461037801)))}, - MultiplyByMInt_Super_SuperStruct{._super = (x12 + (arg0[19] * Val(65998480)))}, - MultiplyByMInt_Super_SuperStruct{._super = (x12 + (arg0[20] * Val(1974912880)))}, - MultiplyByMInt_Super_SuperStruct{._super = (x12 + (arg0[21] * Val(606789471)))}, - MultiplyByMInt_Super_SuperStruct{._super = (x12 + (arg0[22] * Val(13683276)))}, - MultiplyByMInt_Super_SuperStruct{._super = (x12 + (arg0[23] * Val(918610824)))}}; - return MultiplyByMIntStruct{._super = x14}; -} -__device__ DoIntRoundsStruct exec_DoIntRounds(ExecContext& ctx, - Val24Array arg0, - BoundLayout layout1) { - // DoIntRounds(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:38) - DoIntRounds__0_SuperStruct21Array x2 = - DoIntRounds__0_SuperStruct21Array{DoIntRounds__0_SuperStruct{._super = Val(497520322)}, - DoIntRounds__0_SuperStruct{._super = Val(1930103076)}, - DoIntRounds__0_SuperStruct{._super = Val(1052077299)}, - DoIntRounds__0_SuperStruct{._super = Val(1540960371)}, - DoIntRounds__0_SuperStruct{._super = Val(924863639)}, - DoIntRounds__0_SuperStruct{._super = Val(1365519753)}, - DoIntRounds__0_SuperStruct{._super = Val(1726563304)}, - DoIntRounds__0_SuperStruct{._super = Val(440300254)}, - DoIntRounds__0_SuperStruct{._super = Val(1891545577)}, - DoIntRounds__0_SuperStruct{._super = Val(822033215)}, - DoIntRounds__0_SuperStruct{._super = Val(1111544260)}, - DoIntRounds__0_SuperStruct{._super = Val(308575117)}, - DoIntRounds__0_SuperStruct{._super = Val(1708681573)}, - DoIntRounds__0_SuperStruct{._super = Val(1240419708)}, - DoIntRounds__0_SuperStruct{._super = Val(1199068823)}, - DoIntRounds__0_SuperStruct{._super = Val(1186174623)}, - DoIntRounds__0_SuperStruct{._super = Val(1551596046)}, - DoIntRounds__0_SuperStruct{._super = Val(1886977120)}, - DoIntRounds__0_SuperStruct{._super = Val(1327682690)}, - DoIntRounds__0_SuperStruct{._super = Val(1210751726)}, - DoIntRounds__0_SuperStruct{._super = Val(1810596765)}}; - Val24Array x3 = reduce( - x2, - arg0, - LAYOUT_LOOKUP(layout1, _super), - ([&](Val24Array x4, - DoIntRounds__0_SuperStruct21Array::value_type x5, - BoundLayout x6) { - MultiplyByMIntStruct x7 = exec_DoIntRound(ctx, x4, x5._super, x6); - Val24Array x8 = Val24Array{ - x7._super[0]._super, x7._super[1]._super, x7._super[2]._super, x7._super[3]._super, - x7._super[4]._super, x7._super[5]._super, x7._super[6]._super, x7._super[7]._super, - x7._super[8]._super, x7._super[9]._super, x7._super[10]._super, x7._super[11]._super, - x7._super[12]._super, x7._super[13]._super, x7._super[14]._super, x7._super[15]._super, - x7._super[16]._super, x7._super[17]._super, x7._super[18]._super, x7._super[19]._super, - x7._super[20]._super, x7._super[21]._super, x7._super[22]._super, x7._super[23]._super}; - return x8; - })); - return DoIntRoundsStruct{._super = x3}; -} -__device__ MultiplyByMExtStruct exec_DoExtRound(ExecContext& ctx, - Val24Array arg0, - Val24Array arg1, - BoundLayout layout2) { - // DoExtRound(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:103) - RegStruct24Array x3 = - map(Val24Array{Val(0), Val(1), Val(2), Val(3), Val(4), Val(5), Val(6), Val(7), - Val(8), Val(9), Val(10), Val(11), Val(12), Val(13), Val(14), Val(15), - Val(16), Val(17), Val(18), Val(19), Val(20), Val(21), Val(22), Val(23)}, - LAYOUT_LOOKUP(layout2, _1), - ([&](Val24Array::value_type x4, BoundLayout x5) { - RegStruct x6 = exec_SBox(ctx, (arg0[to_size_t(x4)] + arg1[to_size_t(x4)]), x5); - return x6; - })); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:42) - // MultiplyByMExt(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:61) - Val x7 = (x3[0]._super._super + x3[1]._super._super); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:43) - Val x8 = (x3[2]._super._super + x3[3]._super._super); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:44) - Val x9 = (x3[1]._super._super * Val(2)); - Val x10 = (x9 + x8); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:45) - Val x11 = (x3[3]._super._super * Val(2)); - Val x12 = (x11 + x7); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:46) - Val x13 = ((x8 * Val(4)) + x12); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:47) - Val x14 = ((x7 * Val(4)) + x10); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:48) - Val x15 = (x12 + x14); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:49) - Val x16 = (x10 + x13); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:42) - Val x17 = (x3[4]._super._super + x3[5]._super._super); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:43) - Val x18 = (x3[6]._super._super + x3[7]._super._super); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:44) - Val x19 = (x3[5]._super._super * Val(2)); - Val x20 = (x19 + x18); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:45) - Val x21 = (x3[7]._super._super * Val(2)); - Val x22 = (x21 + x17); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:46) - Val x23 = ((x18 * Val(4)) + x22); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:47) - Val x24 = ((x17 * Val(4)) + x20); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:48) - Val x25 = (x22 + x24); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:49) - Val x26 = (x20 + x23); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:42) - Val x27 = (x3[8]._super._super + x3[9]._super._super); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:43) - Val x28 = (x3[10]._super._super + x3[11]._super._super); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:44) - Val x29 = (x3[9]._super._super * Val(2)); - Val x30 = (x29 + x28); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:45) - Val x31 = (x3[11]._super._super * Val(2)); - Val x32 = (x31 + x27); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:46) - Val x33 = ((x28 * Val(4)) + x32); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:47) - Val x34 = ((x27 * Val(4)) + x30); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:48) - Val x35 = (x32 + x34); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:49) - Val x36 = (x30 + x33); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:42) - Val x37 = (x3[12]._super._super + x3[13]._super._super); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:43) - Val x38 = (x3[14]._super._super + x3[15]._super._super); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:44) - Val x39 = (x3[13]._super._super * Val(2)); - Val x40 = (x39 + x38); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:45) - Val x41 = (x3[15]._super._super * Val(2)); - Val x42 = (x41 + x37); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:46) - Val x43 = ((x38 * Val(4)) + x42); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:47) - Val x44 = ((x37 * Val(4)) + x40); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:48) - Val x45 = (x42 + x44); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:49) - Val x46 = (x40 + x43); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:42) - Val x47 = (x3[16]._super._super + x3[17]._super._super); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:43) - Val x48 = (x3[18]._super._super + x3[19]._super._super); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:44) - Val x49 = (x3[17]._super._super * Val(2)); - Val x50 = (x49 + x48); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:45) - Val x51 = (x3[19]._super._super * Val(2)); - Val x52 = (x51 + x47); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:46) - Val x53 = ((x48 * Val(4)) + x52); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:47) - Val x54 = ((x47 * Val(4)) + x50); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:48) - Val x55 = (x52 + x54); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:49) - Val x56 = (x50 + x53); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:42) - Val x57 = (x3[20]._super._super + x3[21]._super._super); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:43) - Val x58 = (x3[22]._super._super + x3[23]._super._super); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:44) - Val x59 = (x3[21]._super._super * Val(2)); - Val x60 = (x59 + x58); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:45) - Val x61 = (x3[23]._super._super * Val(2)); - Val x62 = (x61 + x57); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:46) - Val x63 = ((x58 * Val(4)) + x62); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:47) - Val x64 = ((x57 * Val(4)) + x60); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:48) - Val x65 = (x62 + x64); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:49) - Val x66 = (x60 + x63); - // ReduceVec4(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:54) - // MultiplyByMExt(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:64) - Val x67 = (((x15 + x25) + x35) + x45); - Val x68 = (((x14 + x24) + x34) + x44); - Val x69 = (((x16 + x26) + x36) + x46); - Val x70 = (((x13 + x23) + x33) + x43); - Val x71 = ((x67 + x55) + x65); - Val x72 = ((x68 + x54) + x64); - Val x73 = ((x69 + x56) + x66); - Val x74 = ((x70 + x53) + x63); - // MultiplyByMExt(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:65) - MultiplyByMExt_Super_SuperStruct24Array x75 = MultiplyByMExt_Super_SuperStruct24Array{ - MultiplyByMExt_Super_SuperStruct{._super = (x15 + x71)}, - MultiplyByMExt_Super_SuperStruct{._super = (x14 + x72)}, - MultiplyByMExt_Super_SuperStruct{._super = (x16 + x73)}, - MultiplyByMExt_Super_SuperStruct{._super = (x13 + x74)}, - MultiplyByMExt_Super_SuperStruct{._super = (x25 + x71)}, - MultiplyByMExt_Super_SuperStruct{._super = (x24 + x72)}, - MultiplyByMExt_Super_SuperStruct{._super = (x26 + x73)}, - MultiplyByMExt_Super_SuperStruct{._super = (x23 + x74)}, - MultiplyByMExt_Super_SuperStruct{._super = (x35 + x71)}, - MultiplyByMExt_Super_SuperStruct{._super = (x34 + x72)}, - MultiplyByMExt_Super_SuperStruct{._super = (x36 + x73)}, - MultiplyByMExt_Super_SuperStruct{._super = (x33 + x74)}, - MultiplyByMExt_Super_SuperStruct{._super = (x45 + x71)}, - MultiplyByMExt_Super_SuperStruct{._super = (x44 + x72)}, - MultiplyByMExt_Super_SuperStruct{._super = (x46 + x73)}, - MultiplyByMExt_Super_SuperStruct{._super = (x43 + x74)}, - MultiplyByMExt_Super_SuperStruct{._super = (x55 + x71)}, - MultiplyByMExt_Super_SuperStruct{._super = (x54 + x72)}, - MultiplyByMExt_Super_SuperStruct{._super = (x56 + x73)}, - MultiplyByMExt_Super_SuperStruct{._super = (x53 + x74)}, - MultiplyByMExt_Super_SuperStruct{._super = (x65 + x71)}, - MultiplyByMExt_Super_SuperStruct{._super = (x64 + x72)}, - MultiplyByMExt_Super_SuperStruct{._super = (x66 + x73)}, - MultiplyByMExt_Super_SuperStruct{._super = (x63 + x74)}}; - return MultiplyByMExtStruct{._super = x75}; -} -__device__ MultiplyByMExtStruct exec_DoExtRoundByIdx(ExecContext& ctx, - Val24Array arg0, - Val arg1, - BoundLayout layout2) { - // DoExtRoundByIdx(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:115) - OneHot_8_Struct x3 = exec_OneHot_8_(ctx, arg1, LAYOUT_LOOKUP(layout2, idxHot)); - // MultBy(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:111) - // DoExtRoundByIdx(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:119) - Val x4 = (x3.bits[0]._super * Val(262278199)); - Val x5 = (x3.bits[0]._super * Val(127253399)); - Val x6 = (x3.bits[0]._super * Val(314968988)); - Val x7 = (x3.bits[0]._super * Val(246143118)); - Val x8 = (x3.bits[0]._super * Val(157582794)); - Val x9 = (x3.bits[0]._super * Val(118043943)); - Val x10 = (x3.bits[0]._super * Val(454905424)); - Val x11 = (x3.bits[0]._super * Val(815798990)); - Val x12 = (x3.bits[0]._super * Val(1004040026)); - Val x13 = (x3.bits[0]._super * Val(1773108264)); - Val x14 = (x3.bits[0]._super * Val(1066694495)); - Val x15 = (x3.bits[0]._super * Val(1930780904)); - Val x16 = (x3.bits[0]._super * Val(1180307149)); - Val x17 = (x3.bits[0]._super * Val(1464793095)); - Val x18 = (x3.bits[0]._super * Val(1660766320)); - Val x19 = (x3.bits[0]._super * Val(1389166148)); - Val x20 = (x3.bits[0]._super * Val(343354132)); - Val x21 = (x3.bits[0]._super * Val(1307439985)); - Val x22 = (x3.bits[0]._super * Val(638242172)); - Val x23 = (x3.bits[0]._super * Val(525458520)); - Val x24 = (x3.bits[0]._super * Val(1964135730)); - Val x25 = (x3.bits[0]._super * Val(1751797115)); - Val x26 = (x3.bits[0]._super * Val(1421525369)); - Val x27 = (x3.bits[0]._super * Val(831813382)); - Val x28 = (x3.bits[1]._super * Val(695835963)); - Val x29 = (x3.bits[1]._super * Val(1845603984)); - Val x30 = (x3.bits[1]._super * Val(540703332)); - Val x31 = (x3.bits[1]._super * Val(1333667262)); - Val x32 = (x3.bits[1]._super * Val(1917861751)); - Val x33 = (x3.bits[1]._super * Val(1170029417)); - Val x34 = (x3.bits[1]._super * Val(1989924532)); - Val x35 = (x3.bits[1]._super * Val(1518763784)); - Val x36 = (x3.bits[1]._super * Val(1339793538)); - Val x37 = (x3.bits[1]._super * Val(622609176)); - Val x38 = (x3.bits[1]._super * Val(686842369)); - Val x39 = (x3.bits[1]._super * Val(1737016378)); - Val x40 = (x3.bits[1]._super * Val(1282239129)); - Val x41 = (x3.bits[1]._super * Val(897025192)); - Val x42 = (x3.bits[1]._super * Val(716894289)); - Val x43 = (x3.bits[1]._super * Val(1997503974)); - Val x44 = (x3.bits[1]._super * Val(395622276)); - Val x45 = (x3.bits[1]._super * Val(1201063290)); - Val x46 = (x3.bits[1]._super * Val(1917549072)); - Val x47 = (x3.bits[1]._super * Val(1150912935)); - Val x48 = (x3.bits[1]._super * Val(1687379185)); - Val x49 = (x3.bits[1]._super * Val(1507936940)); - Val x50 = (x3.bits[1]._super * Val(241306552)); - Val x51 = (x3.bits[1]._super * Val(989176635)); - Val x52 = (x3.bits[2]._super * Val(1147522062)); - Val x53 = (x3.bits[2]._super * Val(27129487)); - Val x54 = (x3.bits[2]._super * Val(1257820264)); - Val x55 = (x3.bits[2]._super * Val(142102402)); - Val x56 = (x3.bits[2]._super * Val(217046702)); - Val x57 = (x3.bits[2]._super * Val(1664590951)); - Val x58 = (x3.bits[2]._super * Val(855276054)); - Val x59 = (x3.bits[2]._super * Val(1215259350)); - Val x60 = (x3.bits[2]._super * Val(946500736)); - Val x61 = (x3.bits[2]._super * Val(552696906)); - Val x62 = (x3.bits[2]._super * Val(1424297384)); - Val x63 = (x3.bits[2]._super * Val(538103555)); - Val x64 = (x3.bits[2]._super * Val(1608853840)); - Val x65 = (x3.bits[2]._super * Val(162510541)); - Val x66 = (x3.bits[2]._super * Val(623051854)); - Val x67 = (x3.bits[2]._super * Val(1549062383)); - Val x68 = (x3.bits[2]._super * Val(1908416316)); - Val x69 = (x3.bits[2]._super * Val(1622328571)); - Val x70 = (x3.bits[2]._super * Val(1079030649)); - Val x71 = (x3.bits[2]._super * Val(1584033957)); - Val x72 = (x3.bits[2]._super * Val(1099252725)); - Val x73 = (x3.bits[2]._super * Val(1910423126)); - Val x74 = (x3.bits[2]._super * Val(447555988)); - Val x75 = (x3.bits[2]._super * Val(862495875)); - Val x76 = (x3.bits[3]._super * Val(128479034)); - Val x77 = (x3.bits[3]._super * Val(1587822577)); - Val x78 = (x3.bits[3]._super * Val(608401422)); - Val x79 = (x3.bits[3]._super * Val(1290028279)); - Val x80 = (x3.bits[3]._super * Val(342857858)); - Val x81 = (x3.bits[3]._super * Val(825405577)); - Val x82 = (x3.bits[3]._super * Val(427731030)); - Val x83 = (x3.bits[3]._super * Val(1718628547)); - Val x84 = (x3.bits[3]._super * Val(588764636)); - Val x85 = (x3.bits[3]._super * Val(204228775)); - Val x86 = (x3.bits[3]._super * Val(1454563174)); - Val x87 = (x3.bits[3]._super * Val(1740472809)); - Val x88 = (x3.bits[3]._super * Val(1338899225)); - Val x89 = (x3.bits[3]._super * Val(1269493554)); - Val x90 = (x3.bits[3]._super * Val(53007114)); - Val x91 = (x3.bits[3]._super * Val(1647670797)); - Val x92 = (x3.bits[3]._super * Val(306391314)); - Val x93 = (x3.bits[3]._super * Val(172614232)); - Val x94 = (x3.bits[3]._super * Val(51256176)); - Val x95 = (x3.bits[3]._super * Val(1221257987)); - Val x96 = (x3.bits[3]._super * Val(1239734761)); - Val x97 = (x3.bits[3]._super * Val(273790406)); - Val x98 = (x3.bits[3]._super * Val(1781980094)); - Val x99 = (x3.bits[3]._super * Val(1291790245)); - Val x100 = (x3.bits[4]._super * Val(53041581)); - Val x101 = (x3.bits[4]._super * Val(723038058)); - Val x102 = (x3.bits[4]._super * Val(1439947916)); - Val x103 = (x3.bits[4]._super * Val(1136469704)); - Val x104 = (x3.bits[4]._super * Val(205609311)); - Val x105 = (x3.bits[4]._super * Val(1883820770)); - Val x106 = (x3.bits[4]._super * Val(14387587)); - Val x107 = (x3.bits[4]._super * Val(720724951)); - Val x108 = (x3.bits[4]._super * Val(1854174607)); - Val x109 = (x3.bits[4]._super * Val(1629316321)); - Val x110 = (x3.bits[4]._super * Val(530151394)); - Val x111 = (x3.bits[4]._super * Val(1679178250)); - Val x112 = (x3.bits[4]._super * Val(1549779579)); - Val x113 = (x3.bits[4]._super * Val(48375137)); - Val x114 = (x3.bits[4]._super * Val(976057819)); - Val x115 = (x3.bits[4]._super * Val(463976218)); - Val x116 = (x3.bits[4]._super * Val(875839332)); - Val x117 = (x3.bits[4]._super * Val(1946596189)); - Val x118 = (x3.bits[4]._super * Val(434078361)); - Val x119 = (x3.bits[4]._super * Val(1878280202)); - Val x120 = (x3.bits[4]._super * Val(1363837384)); - Val x121 = (x3.bits[4]._super * Val(1470845646)); - Val x122 = (x3.bits[4]._super * Val(1792450386)); - Val x123 = (x3.bits[4]._super * Val(1040977421)); - Val x124 = (x3.bits[5]._super * Val(1209164052)); - Val x125 = (x3.bits[5]._super * Val(714957516)); - Val x126 = (x3.bits[5]._super * Val(390340387)); - Val x127 = (x3.bits[5]._super * Val(1213686459)); - Val x128 = (x3.bits[5]._super * Val(790726260)); - Val x129 = (x3.bits[5]._super * Val(117294666)); - Val x130 = (x3.bits[5]._super * Val(140621810)); - Val x131 = (x3.bits[5]._super * Val(993455846)); - Val x132 = (x3.bits[5]._super * Val(1889603648)); - Val x133 = (x3.bits[5]._super * Val(78845751)); - Val x134 = (x3.bits[5]._super * Val(925018226)); - Val x135 = (x3.bits[5]._super * Val(708123747)); - Val x136 = (x3.bits[5]._super * Val(1647665372)); - Val x137 = (x3.bits[5]._super * Val(1649953458)); - Val x138 = (x3.bits[5]._super * Val(942439428)); - Val x139 = (x3.bits[5]._super * Val(1006235079)); - Val x140 = (x3.bits[5]._super * Val(238616145)); - Val x141 = (x3.bits[5]._super * Val(930036496)); - Val x142 = (x3.bits[5]._super * Val(1401020792)); - Val x143 = (x3.bits[5]._super * Val(989618631)); - Val x144 = (x3.bits[5]._super * Val(1545325389)); - Val x145 = (x3.bits[5]._super * Val(1715719711)); - Val x146 = (x3.bits[5]._super * Val(755691969)); - Val x147 = (x3.bits[5]._super * Val(150307788)); - Val x148 = (x3.bits[6]._super * Val(1567618575)); - Val x149 = (x3.bits[6]._super * Val(1663353317)); - Val x150 = (x3.bits[6]._super * Val(1950429111)); - Val x151 = (x3.bits[6]._super * Val(1891637550)); - Val x152 = (x3.bits[6]._super * Val(192082241)); - Val x153 = (x3.bits[6]._super * Val(1080533265)); - Val x154 = (x3.bits[6]._super * Val(1463323727)); - Val x155 = (x3.bits[6]._super * Val(890243564)); - Val x156 = (x3.bits[6]._super * Val(158646617)); - Val x157 = (x3.bits[6]._super * Val(1402624179)); - Val x158 = (x3.bits[6]._super * Val(59510015)); - Val x159 = (x3.bits[6]._super * Val(1198261138)); - Val x160 = (x3.bits[6]._super * Val(1065075039)); - Val x161 = (x3.bits[6]._super * Val(1150410028)); - Val x162 = (x3.bits[6]._super * Val(1293938517)); - Val x163 = (x3.bits[6]._super * Val(76770019)); - Val x164 = (x3.bits[6]._super * Val(1478577620)); - Val x165 = (x3.bits[6]._super * Val(1748789933)); - Val x166 = (x3.bits[6]._super * Val(457372011)); - Val x167 = (x3.bits[6]._super * Val(1841795381)); - Val x168 = (x3.bits[6]._super * Val(760115692)); - Val x169 = (x3.bits[6]._super * Val(1042892522)); - Val x170 = (x3.bits[6]._super * Val(1507649755)); - Val x171 = (x3.bits[6]._super * Val(1827572010)); - Val x172 = (x3.bits[7]._super * Val(1206940496)); - Val x173 = (x3.bits[7]._super * Val(1896271507)); - Val x174 = (x3.bits[7]._super * Val(1003792297)); - Val x175 = (x3.bits[7]._super * Val(738091882)); - Val x176 = (x3.bits[7]._super * Val(1124078057)); - Val x177 = (x3.bits[7]._super * Val(1889898)); - Val x178 = (x3.bits[7]._super * Val(813674331)); - Val x179 = (x3.bits[7]._super * Val(228520958)); - Val x180 = (x3.bits[7]._super * Val(1832911930)); - Val x181 = (x3.bits[7]._super * Val(781141772)); - Val x182 = (x3.bits[7]._super * Val(459826664)); - Val x183 = (x3.bits[7]._super * Val(202271745)); - Val x184 = (x3.bits[7]._super * Val(1296144415)); - Val x185 = (x3.bits[7]._super * Val(1111203133)); - Val x186 = (x3.bits[7]._super * Val(1090783436)); - Val x187 = (x3.bits[7]._super * Val(641665156)); - Val x188 = (x3.bits[7]._super * Val(1393671120)); - Val x189 = (x3.bits[7]._super * Val(1303271640)); - Val x190 = (x3.bits[7]._super * Val(809508074)); - Val x191 = (x3.bits[7]._super * Val(162506101)); - Val x192 = (x3.bits[7]._super * Val(1262312258)); - Val x193 = (x3.bits[7]._super * Val(1672219447)); - Val x194 = (x3.bits[7]._super * Val(1608891156)); - Val x195 = (x3.bits[7]._super * Val(1380248020)); - // AddConsts(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:107) - // DoExtRoundByIdx(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:118) - Val x196 = (((x4 + x28) + x52) + x76); - Val x197 = (((x5 + x29) + x53) + x77); - Val x198 = (((x6 + x30) + x54) + x78); - Val x199 = (((x7 + x31) + x55) + x79); - Val x200 = (((x8 + x32) + x56) + x80); - Val x201 = (((x9 + x33) + x57) + x81); - Val x202 = (((x10 + x34) + x58) + x82); - Val x203 = (((x11 + x35) + x59) + x83); - Val x204 = (((x12 + x36) + x60) + x84); - Val x205 = (((x13 + x37) + x61) + x85); - Val x206 = (((x14 + x38) + x62) + x86); - Val x207 = (((x15 + x39) + x63) + x87); - Val x208 = (((x16 + x40) + x64) + x88); - Val x209 = (((x17 + x41) + x65) + x89); - Val x210 = (((x18 + x42) + x66) + x90); - Val x211 = (((x19 + x43) + x67) + x91); - Val x212 = (((x20 + x44) + x68) + x92); - Val x213 = (((x21 + x45) + x69) + x93); - Val x214 = (((x22 + x46) + x70) + x94); - Val x215 = (((x23 + x47) + x71) + x95); - Val x216 = (((x24 + x48) + x72) + x96); - Val x217 = (((x25 + x49) + x73) + x97); - Val x218 = (((x26 + x50) + x74) + x98); - Val x219 = (((x27 + x51) + x75) + x99); - Val x220 = (((x196 + x100) + x124) + x148); - Val x221 = (((x197 + x101) + x125) + x149); - Val x222 = (((x198 + x102) + x126) + x150); - Val x223 = (((x199 + x103) + x127) + x151); - Val x224 = (((x200 + x104) + x128) + x152); - Val x225 = (((x201 + x105) + x129) + x153); - Val x226 = (((x202 + x106) + x130) + x154); - Val x227 = (((x203 + x107) + x131) + x155); - Val x228 = (((x204 + x108) + x132) + x156); - Val x229 = (((x205 + x109) + x133) + x157); - Val x230 = (((x206 + x110) + x134) + x158); - Val x231 = (((x207 + x111) + x135) + x159); - Val x232 = (((x208 + x112) + x136) + x160); - Val x233 = (((x209 + x113) + x137) + x161); - Val x234 = (((x210 + x114) + x138) + x162); - Val x235 = (((x211 + x115) + x139) + x163); - Val x236 = (((x212 + x116) + x140) + x164); - Val x237 = (((x213 + x117) + x141) + x165); - Val x238 = (((x214 + x118) + x142) + x166); - Val x239 = (((x215 + x119) + x143) + x167); - Val x240 = (((x216 + x120) + x144) + x168); - Val x241 = (((x217 + x121) + x145) + x169); - Val x242 = (((x218 + x122) + x146) + x170); - Val x243 = (((x219 + x123) + x147) + x171); - // DoExtRoundByIdx(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:122) - MultiplyByMExtStruct x244 = exec_DoExtRound( - ctx, - arg0, - Val24Array{(x220 + x172), (x221 + x173), (x222 + x174), (x223 + x175), (x224 + x176), - (x225 + x177), (x226 + x178), (x227 + x179), (x228 + x180), (x229 + x181), - (x230 + x182), (x231 + x183), (x232 + x184), (x233 + x185), (x234 + x186), - (x235 + x187), (x236 + x188), (x237 + x189), (x238 + x190), (x239 + x191), - (x240 + x192), (x241 + x193), (x242 + x194), (x243 + x195)}, - LAYOUT_LOOKUP(layout2, _super)); - return x244; -} -__device__ PoseidonStateStruct back_PoseidonState(ExecContext& ctx, - Index distance0, - BoundLayout layout1) { - // PoseidonState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:34) - RegStruct x2 = back_Reg(ctx, distance0, LAYOUT_LOOKUP(layout1, hasState)); - // PoseidonState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:35) - RegStruct x3 = back_Reg(ctx, distance0, LAYOUT_LOOKUP(layout1, stateAddr)); - // PoseidonState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:36) - RegStruct x4 = back_Reg(ctx, distance0, LAYOUT_LOOKUP(layout1, bufOutAddr)); - // PoseidonState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:37) - RegStruct x5 = back_Reg(ctx, distance0, LAYOUT_LOOKUP(layout1, isElem)); - // PoseidonState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:38) - RegStruct x6 = back_Reg(ctx, distance0, LAYOUT_LOOKUP(layout1, checkOut)); - // PoseidonState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:39) - RegStruct x7 = back_Reg(ctx, distance0, LAYOUT_LOOKUP(layout1, loadTxType)); - // PoseidonState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:41) - RegStruct x8 = back_Reg(ctx, distance0, LAYOUT_LOOKUP(layout1, nextState)); - // PoseidonState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:42) - RegStruct x9 = back_Reg(ctx, distance0, LAYOUT_LOOKUP(layout1, subState)); - // PoseidonState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:43) - RegStruct x10 = back_Reg(ctx, distance0, LAYOUT_LOOKUP(layout1, bufInAddr)); - // PoseidonState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:44) - RegStruct x11 = back_Reg(ctx, distance0, LAYOUT_LOOKUP(layout1, count)); - // PoseidonState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:45) - RegStruct x12 = back_Reg(ctx, distance0, LAYOUT_LOOKUP(layout1, mode)); - // PoseidonState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:47) - RegStruct24Array x13 = map( - Val24Array{Val(0), Val(1), Val(2), Val(3), Val(4), Val(5), Val(6), Val(7), - Val(8), Val(9), Val(10), Val(11), Val(12), Val(13), Val(14), Val(15), - Val(16), Val(17), Val(18), Val(19), Val(20), Val(21), Val(22), Val(23)}, - LAYOUT_LOOKUP(layout1, inner), - ([&](Val24Array::value_type x14, BoundLayout x15) { - RegStruct x16 = back_Reg(ctx, distance0, x15); - return x16; - })); - // PoseidonState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:48) - NondetExtRegStruct x17 = back_ExtReg(ctx, distance0, LAYOUT_LOOKUP(layout1, zcheck)); - return PoseidonStateStruct{.hasState = x2, - .stateAddr = x3, - .bufOutAddr = x4, - .isElem = x5, - .checkOut = x6, - .loadTxType = x7, - .nextState = x8, - .subState = x9, - .bufInAddr = x10, - .count = x11, - .mode = x12, - .inner = x13, - .zcheck = x17}; -} -__device__ PoseidonStateStruct exec_PoseidonState(ExecContext& ctx, - PoseidonOpDefStruct arg0, - Val arg1, - Val arg2, - Val arg3, - Val arg4, - Val arg5, - Val24Array arg6, - ExtVal arg7, - BoundLayout layout8) { - // PoseidonState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:34) - RegStruct x9 = exec_Reg(ctx, arg0.hasState, LAYOUT_LOOKUP(layout8, hasState)); - // PoseidonState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:35) - RegStruct x10 = exec_Reg(ctx, arg0.stateAddr, LAYOUT_LOOKUP(layout8, stateAddr)); - // PoseidonState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:36) - RegStruct x11 = exec_Reg(ctx, arg0.bufOutAddr, LAYOUT_LOOKUP(layout8, bufOutAddr)); - // PoseidonState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:37) - RegStruct x12 = exec_Reg(ctx, arg0.isElem, LAYOUT_LOOKUP(layout8, isElem)); - // PoseidonState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:38) - RegStruct x13 = exec_Reg(ctx, arg0.checkOut, LAYOUT_LOOKUP(layout8, checkOut)); - // PoseidonState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:39) - RegStruct x14 = exec_Reg(ctx, arg0.loadTxType, LAYOUT_LOOKUP(layout8, loadTxType)); - // PoseidonState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:41) - RegStruct x15 = exec_Reg(ctx, arg1, LAYOUT_LOOKUP(layout8, nextState)); - // PoseidonState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:42) - RegStruct x16 = exec_Reg(ctx, arg2, LAYOUT_LOOKUP(layout8, subState)); - // PoseidonState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:43) - RegStruct x17 = exec_Reg(ctx, arg3, LAYOUT_LOOKUP(layout8, bufInAddr)); - // PoseidonState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:44) - RegStruct x18 = exec_Reg(ctx, arg4, LAYOUT_LOOKUP(layout8, count)); - // PoseidonState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:45) - RegStruct x19 = exec_Reg(ctx, arg5, LAYOUT_LOOKUP(layout8, mode)); - // PoseidonState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:47) - RegStruct24Array x20 = map( - arg6, - LAYOUT_LOOKUP(layout8, inner), - ([&](Val24Array::value_type x21, BoundLayout x22) { - RegStruct x23 = exec_Reg(ctx, x21, x22); - return x23; - })); - // PoseidonState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:48) - NondetExtRegStruct x24 = exec_ExtReg(ctx, arg7, LAYOUT_LOOKUP(layout8, zcheck)); - return PoseidonStateStruct{.hasState = x9, - .stateAddr = x10, - .bufOutAddr = x11, - .isElem = x12, - .checkOut = x13, - .loadTxType = x14, - .nextState = x15, - .subState = x16, - .bufInAddr = x17, - .count = x18, - .mode = x19, - .inner = x20, - .zcheck = x24}; -} -__device__ PoseidonStateStruct exec_PoseidonInvalid(ExecContext& ctx, - BoundLayout layout0) { - // PoseidonInvalid(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:52) - EQZ(Val(2013265920), "PoseidonInvalid(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:52)"); - // PoseidonInvalid(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:61) - PoseidonStateStruct x1 = - exec_PoseidonState(ctx, - PoseidonOpDefStruct{.hasState = Val(0), - .stateAddr = Val(0), - .bufOutAddr = Val(0), - .isElem = Val(0), - .checkOut = Val(0), - .loadTxType = Val(0)}, - Val(0), - Val(0), - Val(0), - Val(0), - Val(0), - Val24Array{Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), - Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), - Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0)}, - ExtVal(0, 0, 0, 0), - layout0); - return x1; -} -__device__ ReadAddrStruct exec_ReadAddr(ExecContext& ctx, - RegStruct arg0, - Val arg1, - BoundLayout layout2) { - // ReadAddr(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:78) - GetDataStruct x3 = - exec_MemoryRead(ctx, arg0, (arg1 + Val(1073725440)), LAYOUT_LOOKUP(layout2, addr32)); - // ReadAddr(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:79) - Val x4 = (x3._super.high * Val(16384)); - // Div(:19) - Val x5 = (x3._super.low * Val(1509949441)); - return ReadAddrStruct{._super = (x4 + x5)}; -} -__device__ PoseidonStateStruct exec_PoseidonEcall(ExecContext& ctx, - RegStruct arg0, - Val arg1, - BoundLayout layout2) { - // PoseidonEcall(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:84) - ReadAddrStruct x3 = exec_ReadAddr(ctx, arg0, Val(10), LAYOUT_LOOKUP(layout2, stateAddr)); - // PoseidonEcall(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:85) - ReadAddrStruct x4 = exec_ReadAddr(ctx, arg0, Val(11), LAYOUT_LOOKUP(layout2, bufInAddr)); - // PoseidonEcall(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:86) - ReadAddrStruct x5 = exec_ReadAddr(ctx, arg0, Val(12), LAYOUT_LOOKUP(layout2, bufOutAddr)); - // PoseidonEcall(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:87) - GetDataStruct x6 = - exec_MemoryRead(ctx, arg0, Val(1073725453), LAYOUT_LOOKUP(layout2, bitsAndCount)); - // PoseidonEcall(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:90) - NondetRegStruct x7 = exec_IsZero(ctx, x3._super, LAYOUT_LOOKUP(layout2, _0)); - Val x8 = (Val(1) - x7._super); - // PoseidonEcall(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:94) - Val x9 = bitAnd(x6._super.high, Val(32768)); - NondetRegStruct x10 = - exec_NondetBitReg(ctx, (x9 * Val(2013204481)), LAYOUT_LOOKUP(layout2, isElem)); - // PoseidonEcall(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:95) - Val x11 = bitAnd(x6._super.high, Val(16384)); - NondetRegStruct x12 = - exec_NondetBitReg(ctx, (x11 * Val(2013143041)), LAYOUT_LOOKUP(layout2, checkOut)); - // PoseidonEcall(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:96) - Val x13 = ((x10._super * Val(32768)) + (x12._super * Val(16384))); - Val x14 = (x6._super.high - x13); - EQZ(x14, "PoseidonEcall(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:96)"); - // PoseidonEcall(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:99) - NondetRegStruct x15 = exec_IsZero(ctx, x6._super.low, LAYOUT_LOOKUP(layout2, countZero)); - // PoseidonEcall(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:102) - Val x16 = (Val(1) - x15._super); - // PoseidonEcall(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:101) - Val x17 = ((x15._super * Val(32)) + ((x16 * x8) * Val(17))); - // PoseidonEcall(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:105) - PoseidonStateStruct x18 = - exec_PoseidonState(ctx, - PoseidonOpDefStruct{.hasState = x8, - .stateAddr = x3._super, - .bufOutAddr = x5._super, - .isElem = x10._super, - .checkOut = x12._super, - .loadTxType = Val(0)}, - (x17 + ((x16 * (Val(1) - x8)) * Val(18))), - Val(0), - x4._super, - x6._super.low, - arg1, - Val24Array{Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), - Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), - Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0)}, - ExtVal(0, 0, 0, 0), - LAYOUT_LOOKUP(layout2, _super)); - return x18; -} -__device__ PoseidonStateStruct exec_PoseidonPagingEntry(ExecContext& ctx, - RegStruct arg0, - Val arg1, - BoundLayout layout2) { - // Div(:19) - // PoseidonPagingEntry(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:110) - Val x3 = (arg1 * Val(1342177281)); - // PoseidonPagingEntry(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:114) - Val x4 = ((Val(1) - x3) * Val(1140850688)); - // PoseidonOpDef(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:8) - // PoseidonPagingEntry(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:111) - PoseidonOpDefStruct x5 = PoseidonOpDefStruct{.hasState = Val(0), - .stateAddr = Val(0), - .bufOutAddr = ((x3 * Val(1073741824)) + x4), - .isElem = Val(1), - .checkOut = Val(1), - .loadTxType = Val(1)}; - // PoseidonPagingEntry(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:119) - PoseidonStateStruct x6 = - exec_PoseidonState(ctx, - x5, - Val(22), - Val(0), - Val(0), - Val(0), - arg1, - Val24Array{Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), - Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), - Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0)}, - ExtVal(0, 0, 0, 0), - layout2); - return x6; -} -__device__ PoseidonStateStruct exec_PoseidonEntry(ExecContext& ctx, - RegStruct arg0, - ValU32Struct arg1, - Val arg2, - BoundLayout layout3) { - // PoseidonEntry(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:131) - NondetRegStruct x4 = exec_IsZero(ctx, (arg1.low + arg1.high), LAYOUT_LOOKUP(layout3, pcZero)); - PoseidonStateStruct x5; - if (to_size_t(x4._super)) { - // PoseidonEntry(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:133) - PoseidonStateStruct x6 = - exec_PoseidonPagingEntry(ctx, arg0, arg2, LAYOUT_LOOKUP(layout3, _super.arm0._super)); - // PoseidonEntry(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:132) - STORE(LAYOUT_LOOKUP(layout3, _super.arm0._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout3, _super.arm0._extra0.count._super), 0), - "PoseidonEntry(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:132)"); - STORE(LAYOUT_LOOKUP(layout3, _super.arm0._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout3, _super.arm0._extra1.count._super), 0), - "PoseidonEntry(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:132)"); - STORE(LAYOUT_LOOKUP(layout3, _super.arm0._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout3, _super.arm0._extra2.count._super), 0), - "PoseidonEntry(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:132)"); - STORE(LAYOUT_LOOKUP(layout3, _super.arm0._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout3, _super.arm0._extra3.count._super), 0), - "PoseidonEntry(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:132)"); - STORE(LAYOUT_LOOKUP(layout3, _super.arm0._extra4.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout3, _super.arm0._extra4.count._super), 0), - "PoseidonEntry(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:132)"); - STORE(LAYOUT_LOOKUP(layout3, _super.arm0._extra5.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout3, _super.arm0._extra5.count._super), 0), - "PoseidonEntry(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:132)"); - STORE(LAYOUT_LOOKUP(layout3, _super.arm0._extra6.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout3, _super.arm0._extra6.count._super), 0), - "PoseidonEntry(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:132)"); - STORE(LAYOUT_LOOKUP(layout3, _super.arm0._extra7.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout3, _super.arm0._extra7.count._super), 0), - "PoseidonEntry(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:132)"); - STORE(LAYOUT_LOOKUP(layout3, _super.arm0._extra8.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout3, _super.arm0._extra8.count._super), 0), - "PoseidonEntry(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:132)"); - STORE(LAYOUT_LOOKUP(layout3, _super.arm0._extra9.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout3, _super.arm0._extra9.count._super), 0), - "PoseidonEntry(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:132)"); - STORE(LAYOUT_LOOKUP(layout3, _super.arm0._extra10.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout3, _super.arm0._extra10.count._super), 0), - "PoseidonEntry(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:132)"); - STORE(LAYOUT_LOOKUP(layout3, _super.arm0._extra11.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout3, _super.arm0._extra11.count._super), 0), - "PoseidonEntry(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:132)"); - x5 = x6; - } else if (to_size_t((Val(1) - x4._super))) { - // PoseidonEntry(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:135) - PoseidonStateStruct x7 = - exec_PoseidonEcall(ctx, arg0, arg2, LAYOUT_LOOKUP(layout3, _super.arm1)); - x5 = x7; - } else { - assert(0 && "Reached unreachable mux arm"); - } - // PoseidonEntry(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:132) - PoseidonStateStruct x8 = back_PoseidonState(ctx, 0, LAYOUT_LOOKUP(layout3, _super._super)); - return x8; -} -__device__ ReadElemStruct exec_ReadElem(ExecContext& ctx, - RegStruct arg0, - Val arg1, - BoundLayout layout2) { - // ReadElem(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:140) - GetDataStruct x3 = exec_MemoryRead(ctx, arg0, arg1, LAYOUT_LOOKUP(layout2, elem32)); - // ReadElem(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:141) - Val x4 = (x3._super.high * Val(65536)); - return ReadElemStruct{._super = (x4 + x3._super.low)}; -} -__device__ PoseidonStateStruct -exec_PoseidonLoadState(ExecContext& ctx, - RegStruct arg0, - PoseidonStateStruct arg1, - BoundLayout layout2) { - // PoseidonLoadState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:146) - ReadElemStruct8Array x3 = - map(Val8Array{Val(0), Val(1), Val(2), Val(3), Val(4), Val(5), Val(6), Val(7)}, - LAYOUT_LOOKUP(layout2, loadList), - ([&](Val8Array::value_type x4, BoundLayout x5) { - // PoseidonLoadState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:147) - Val x6 = (arg1.stateAddr._super._super + x4); - ReadElemStruct x7 = exec_ReadElem(ctx, arg0, x6, x5); - return x7; - })); - // PoseidonOpDef(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:8) - // GetDef(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:72) - // PoseidonLoadState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:156) - PoseidonOpDefStruct x8 = PoseidonOpDefStruct{.hasState = arg1.hasState._super._super, - .stateAddr = arg1.stateAddr._super._super, - .bufOutAddr = arg1.bufOutAddr._super._super, - .isElem = arg1.isElem._super._super, - .checkOut = arg1.checkOut._super._super, - .loadTxType = arg1.loadTxType._super._super}; - // PoseidonLoadState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:149) - Val24Array x9 = Val24Array{Val(0), Val(0), Val(0), Val(0), Val(0), - Val(0), Val(0), Val(0), Val(0), Val(0), - Val(0), Val(0), Val(0), Val(0), Val(0), - Val(0), x3[0]._super, x3[1]._super, x3[2]._super, x3[3]._super, - x3[4]._super, x3[5]._super, x3[6]._super, x3[7]._super}; - // PoseidonLoadState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:156) - PoseidonStateStruct x10 = exec_PoseidonState(ctx, - x8, - Val(18), - Val(0), - arg1.bufInAddr._super._super, - arg1.count._super._super, - arg1.mode._super._super, - x9, - ExtVal(0, 0, 0, 0), - LAYOUT_LOOKUP(layout2, _super)); - return x10; -} -__device__ PoseidonStateStruct -exec_PoseidonLoadInShort(ExecContext& ctx, - RegStruct arg0, - PoseidonStateStruct arg1, - BoundLayout layout2, - GlobalBuf global3) { - // PoseidonLoadInShort(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:175) - std::initializer_list x4 = std::initializer_list{arg1.loadTxType._super._super}; - // Log(:22) - INVOKE_EXTERN(ctx, log, "txnType", x4); - // PoseidonLoadInShort(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:176) - OneHot_3_Struct x5 = - exec_OneHot_3_(ctx, arg1.loadTxType._super._super, LAYOUT_LOOKUP(layout2, txType)); - // PoseidonLoadInShort(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:177) - GetDataStruct8Array x6 = - map(Val8Array{Val(0), Val(1), Val(2), Val(3), Val(4), Val(5), Val(6), Val(7)}, - LAYOUT_LOOKUP(layout2, loadList), - ([&](Val8Array::value_type x7, BoundLayout x8) { - // PoseidonLoadInShort(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:178) - Val x9 = (arg1.bufInAddr._super._super + x7); - GetDataStruct x10 = exec_MemoryGet(ctx, arg0, x9, x5, x8); - return x10; - })); - // ShiftPoly(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:159) - // PoseidonLoadInShort(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:180) - BoundLayout<_globalLayout> x11 = BIND_LAYOUT(kLayoutGlobal, global3); - // ShiftPoly(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:160) - NondetExtRegStruct x12 = back_ExtReg(ctx, 0, LAYOUT_LOOKUP(x11, rng)); - // PolyEvalStateReduce(zirgen/circuit/rv32im/v2/dsl/poly.zir:14) - // PolyEval(zirgen/circuit/rv32im/v2/dsl/poly.zir:18) - // ShiftPoly(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:170) - ExtVal x13 = (x12._super * ExtVal(1, 0, 0, 0)); - ExtVal x14 = (x6[0].diffLow + ExtVal(0, 0, 0, 0)); - ExtVal x15 = (x13 * x12._super); - ExtVal x16 = (x6[0].diffHigh + ExtVal(0, 0, 0, 0)); - ExtVal x17 = (((x14 * ExtVal(1, 0, 0, 0)) + ExtVal(0, 0, 0, 0)) + (x16 * x13)); - ExtVal x18 = (x15 * x12._super); - ExtVal x19 = (x6[1].diffLow + ExtVal(0, 0, 0, 0)); - ExtVal x20 = (x18 * x12._super); - ExtVal x21 = (x6[1].diffHigh + ExtVal(0, 0, 0, 0)); - ExtVal x22 = (x20 * x12._super); - ExtVal x23 = (x6[2].diffLow + ExtVal(0, 0, 0, 0)); - ExtVal x24 = (((x17 + (x19 * x15)) + (x21 * x18)) + (x23 * x20)); - ExtVal x25 = (x22 * x12._super); - ExtVal x26 = (x6[2].diffHigh + ExtVal(0, 0, 0, 0)); - ExtVal x27 = (x25 * x12._super); - ExtVal x28 = (x6[3].diffLow + ExtVal(0, 0, 0, 0)); - ExtVal x29 = (x27 * x12._super); - ExtVal x30 = (x6[3].diffHigh + ExtVal(0, 0, 0, 0)); - ExtVal x31 = (((x24 + (x26 * x22)) + (x28 * x25)) + (x30 * x27)); - ExtVal x32 = (x29 * x12._super); - ExtVal x33 = (x6[4].diffLow + ExtVal(0, 0, 0, 0)); - ExtVal x34 = (x32 * x12._super); - ExtVal x35 = (x6[4].diffHigh + ExtVal(0, 0, 0, 0)); - ExtVal x36 = (x34 * x12._super); - ExtVal x37 = (x6[5].diffLow + ExtVal(0, 0, 0, 0)); - ExtVal x38 = (((x31 + (x33 * x29)) + (x35 * x32)) + (x37 * x34)); - ExtVal x39 = (x36 * x12._super); - ExtVal x40 = (x6[5].diffHigh + ExtVal(0, 0, 0, 0)); - ExtVal x41 = (x39 * x12._super); - ExtVal x42 = (x6[6].diffLow + ExtVal(0, 0, 0, 0)); - ExtVal x43 = (x41 * x12._super); - ExtVal x44 = (x6[6].diffHigh + ExtVal(0, 0, 0, 0)); - ExtVal x45 = (((x38 + (x40 * x36)) + (x42 * x39)) + (x44 * x41)); - ExtVal x46 = (x6[7].diffLow + ExtVal(0, 0, 0, 0)); - ExtVal x47 = (x6[7].diffHigh + ExtVal(0, 0, 0, 0)); - // ShiftPoly(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:160) - NondetExtRegStruct x48 = back_ExtReg(ctx, 0, LAYOUT_LOOKUP(x11, rng)); - // Pow(zirgen/circuit/rv32im/v2/dsl/poly.zir:10) - // ShiftPoly(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:171) - ExtVal x49 = ((x48._super * ExtVal(1, 0, 0, 0)) * x48._super); - ExtVal x50 = (((x49 * x48._super) * x48._super) * x48._super); - ExtVal x51 = (((x50 * x48._super) * x48._super) * x48._super); - ExtVal x52 = (((x51 * x48._super) * x48._super) * x48._super); - ExtVal x53 = (((x52 * x48._super) * x48._super) * x48._super); - ExtVal x54 = (arg1.zcheck._super * ((x53 * x48._super) * x48._super)); - // PoseidonOpDef(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:8) - // GetDef(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:72) - // PoseidonLoadInShort(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:194) - PoseidonOpDefStruct x55 = PoseidonOpDefStruct{.hasState = arg1.hasState._super._super, - .stateAddr = arg1.stateAddr._super._super, - .bufOutAddr = arg1.bufOutAddr._super._super, - .isElem = arg1.isElem._super._super, - .checkOut = arg1.checkOut._super._super, - .loadTxType = arg1.loadTxType._super._super}; - Val x56 = (arg1.bufInAddr._super._super + Val(8)); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:42) - // MultiplyByMExt(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:61) - Val x57 = (x6[0]._super.low + x6[0]._super.high); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:43) - Val x58 = (x6[1]._super.low + x6[1]._super.high); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:44) - Val x59 = (x6[0]._super.high * Val(2)); - Val x60 = (x59 + x58); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:45) - Val x61 = (x6[1]._super.high * Val(2)); - Val x62 = (x61 + x57); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:46) - Val x63 = ((x58 * Val(4)) + x62); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:47) - Val x64 = ((x57 * Val(4)) + x60); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:48) - Val x65 = (x62 + x64); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:49) - Val x66 = (x60 + x63); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:42) - Val x67 = (x6[2]._super.low + x6[2]._super.high); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:43) - Val x68 = (x6[3]._super.low + x6[3]._super.high); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:44) - Val x69 = (x6[2]._super.high * Val(2)); - Val x70 = (x69 + x68); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:45) - Val x71 = (x6[3]._super.high * Val(2)); - Val x72 = (x71 + x67); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:46) - Val x73 = ((x68 * Val(4)) + x72); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:47) - Val x74 = ((x67 * Val(4)) + x70); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:48) - Val x75 = (x72 + x74); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:49) - Val x76 = (x70 + x73); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:42) - Val x77 = (x6[4]._super.low + x6[4]._super.high); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:43) - Val x78 = (x6[5]._super.low + x6[5]._super.high); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:44) - Val x79 = (x6[4]._super.high * Val(2)); - Val x80 = (x79 + x78); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:45) - Val x81 = (x6[5]._super.high * Val(2)); - Val x82 = (x81 + x77); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:46) - Val x83 = ((x78 * Val(4)) + x82); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:47) - Val x84 = ((x77 * Val(4)) + x80); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:48) - Val x85 = (x82 + x84); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:49) - Val x86 = (x80 + x83); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:42) - Val x87 = (x6[6]._super.low + x6[6]._super.high); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:43) - Val x88 = (x6[7]._super.low + x6[7]._super.high); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:44) - Val x89 = (x6[6]._super.high * Val(2)); - Val x90 = (x89 + x88); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:45) - Val x91 = (x6[7]._super.high * Val(2)); - Val x92 = (x91 + x87); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:46) - Val x93 = ((x88 * Val(4)) + x92); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:47) - Val x94 = ((x87 * Val(4)) + x90); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:48) - Val x95 = (x92 + x94); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:49) - Val x96 = (x90 + x93); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:42) - Val x97 = (arg1.inner[16]._super._super + arg1.inner[17]._super._super); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:43) - Val x98 = (arg1.inner[18]._super._super + arg1.inner[19]._super._super); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:44) - Val x99 = (arg1.inner[17]._super._super * Val(2)); - Val x100 = (x99 + x98); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:45) - Val x101 = (arg1.inner[19]._super._super * Val(2)); - Val x102 = (x101 + x97); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:46) - Val x103 = ((x98 * Val(4)) + x102); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:47) - Val x104 = ((x97 * Val(4)) + x100); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:48) - Val x105 = (x102 + x104); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:49) - Val x106 = (x100 + x103); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:42) - Val x107 = (arg1.inner[20]._super._super + arg1.inner[21]._super._super); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:43) - Val x108 = (arg1.inner[22]._super._super + arg1.inner[23]._super._super); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:44) - Val x109 = (arg1.inner[21]._super._super * Val(2)); - Val x110 = (x109 + x108); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:45) - Val x111 = (arg1.inner[23]._super._super * Val(2)); - Val x112 = (x111 + x107); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:46) - Val x113 = ((x108 * Val(4)) + x112); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:47) - Val x114 = ((x107 * Val(4)) + x110); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:48) - Val x115 = (x112 + x114); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:49) - Val x116 = (x110 + x113); - // ReduceVec4(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:54) - // MultiplyByMExt(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:64) - Val x117 = (((x65 + x75) + x85) + x95); - Val x118 = (((x64 + x74) + x84) + x94); - Val x119 = (((x66 + x76) + x86) + x96); - Val x120 = (((x63 + x73) + x83) + x93); - Val x121 = ((x117 + x105) + x115); - Val x122 = ((x118 + x104) + x114); - Val x123 = ((x119 + x106) + x116); - Val x124 = ((x120 + x103) + x113); - PoseidonStateStruct x125 = exec_PoseidonState( - ctx, - x55, - Val(24), - Val(0), - x56, - arg1.count._super._super, - arg1.mode._super._super, - Val24Array{(x65 + x121), (x64 + x122), (x66 + x123), (x63 + x124), (x75 + x121), - (x74 + x122), (x76 + x123), (x73 + x124), (x85 + x121), (x84 + x122), - (x86 + x123), (x83 + x124), (x95 + x121), (x94 + x122), (x96 + x123), - (x93 + x124), (x105 + x121), (x104 + x122), (x106 + x123), (x103 + x124), - (x115 + x121), (x114 + x122), (x116 + x123), (x113 + x124)}, - (x54 + ((x45 + (x46 * x43)) + (x47 * (x43 * x12._super)))), - LAYOUT_LOOKUP(layout2, _super)); - return x125; -} -__device__ PoseidonStateStruct exec_PoseidonLoadInLow(ExecContext& ctx, - RegStruct arg0, - PoseidonStateStruct arg1, - BoundLayout layout2, - GlobalBuf global3) { - // PoseidonLoadInLow(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:198) - std::initializer_list x4 = std::initializer_list{arg1.loadTxType._super._super}; - // Log(:22) - INVOKE_EXTERN(ctx, log, "txnType", x4); - // PoseidonLoadInLow(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:199) - OneHot_3_Struct x5 = - exec_OneHot_3_(ctx, arg1.loadTxType._super._super, LAYOUT_LOOKUP(layout2, txType)); - // PoseidonLoadInLow(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:200) - GetDataStruct8Array x6 = - map(Val8Array{Val(0), Val(1), Val(2), Val(3), Val(4), Val(5), Val(6), Val(7)}, - LAYOUT_LOOKUP(layout2, loadList), - ([&](Val8Array::value_type x7, BoundLayout x8) { - // PoseidonLoadInLow(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:201) - Val x9 = (arg1.bufInAddr._super._super + x7); - GetDataStruct x10 = exec_MemoryGet(ctx, arg0, x9, x5, x8); - return x10; - })); - // ShiftPoly(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:159) - // PoseidonLoadInLow(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:203) - BoundLayout<_globalLayout> x11 = BIND_LAYOUT(kLayoutGlobal, global3); - // ShiftPoly(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:160) - NondetExtRegStruct x12 = back_ExtReg(ctx, 0, LAYOUT_LOOKUP(x11, rng)); - // PolyEvalStateReduce(zirgen/circuit/rv32im/v2/dsl/poly.zir:14) - // PolyEval(zirgen/circuit/rv32im/v2/dsl/poly.zir:18) - // ShiftPoly(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:170) - ExtVal x13 = (x12._super * ExtVal(1, 0, 0, 0)); - ExtVal x14 = (x6[0].diffLow + ExtVal(0, 0, 0, 0)); - ExtVal x15 = (x13 * x12._super); - ExtVal x16 = (x6[0].diffHigh + ExtVal(0, 0, 0, 0)); - ExtVal x17 = (((x14 * ExtVal(1, 0, 0, 0)) + ExtVal(0, 0, 0, 0)) + (x16 * x13)); - ExtVal x18 = (x15 * x12._super); - ExtVal x19 = (x6[1].diffLow + ExtVal(0, 0, 0, 0)); - ExtVal x20 = (x18 * x12._super); - ExtVal x21 = (x6[1].diffHigh + ExtVal(0, 0, 0, 0)); - ExtVal x22 = (x20 * x12._super); - ExtVal x23 = (x6[2].diffLow + ExtVal(0, 0, 0, 0)); - ExtVal x24 = (((x17 + (x19 * x15)) + (x21 * x18)) + (x23 * x20)); - ExtVal x25 = (x22 * x12._super); - ExtVal x26 = (x6[2].diffHigh + ExtVal(0, 0, 0, 0)); - ExtVal x27 = (x25 * x12._super); - ExtVal x28 = (x6[3].diffLow + ExtVal(0, 0, 0, 0)); - ExtVal x29 = (x27 * x12._super); - ExtVal x30 = (x6[3].diffHigh + ExtVal(0, 0, 0, 0)); - ExtVal x31 = (((x24 + (x26 * x22)) + (x28 * x25)) + (x30 * x27)); - ExtVal x32 = (x29 * x12._super); - ExtVal x33 = (x6[4].diffLow + ExtVal(0, 0, 0, 0)); - ExtVal x34 = (x32 * x12._super); - ExtVal x35 = (x6[4].diffHigh + ExtVal(0, 0, 0, 0)); - ExtVal x36 = (x34 * x12._super); - ExtVal x37 = (x6[5].diffLow + ExtVal(0, 0, 0, 0)); - ExtVal x38 = (((x31 + (x33 * x29)) + (x35 * x32)) + (x37 * x34)); - ExtVal x39 = (x36 * x12._super); - ExtVal x40 = (x6[5].diffHigh + ExtVal(0, 0, 0, 0)); - ExtVal x41 = (x39 * x12._super); - ExtVal x42 = (x6[6].diffLow + ExtVal(0, 0, 0, 0)); - ExtVal x43 = (x41 * x12._super); - ExtVal x44 = (x6[6].diffHigh + ExtVal(0, 0, 0, 0)); - ExtVal x45 = (((x38 + (x40 * x36)) + (x42 * x39)) + (x44 * x41)); - ExtVal x46 = (x6[7].diffLow + ExtVal(0, 0, 0, 0)); - ExtVal x47 = (x6[7].diffHigh + ExtVal(0, 0, 0, 0)); - // ShiftPoly(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:160) - NondetExtRegStruct x48 = back_ExtReg(ctx, 0, LAYOUT_LOOKUP(x11, rng)); - // Pow(zirgen/circuit/rv32im/v2/dsl/poly.zir:10) - // ShiftPoly(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:171) - ExtVal x49 = ((x48._super * ExtVal(1, 0, 0, 0)) * x48._super); - ExtVal x50 = (((x49 * x48._super) * x48._super) * x48._super); - ExtVal x51 = (((x50 * x48._super) * x48._super) * x48._super); - ExtVal x52 = (((x51 * x48._super) * x48._super) * x48._super); - ExtVal x53 = (((x52 * x48._super) * x48._super) * x48._super); - ExtVal x54 = (arg1.zcheck._super * ((x53 * x48._super) * x48._super)); - // PoseidonLoadInLow(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:206) - Val x55 = (x6[0]._super.high * Val(65536)); - Val x56 = (x6[1]._super.high * Val(65536)); - Val x57 = (x6[2]._super.high * Val(65536)); - Val x58 = (x6[3]._super.high * Val(65536)); - Val x59 = (x6[4]._super.high * Val(65536)); - Val x60 = (x6[5]._super.high * Val(65536)); - Val x61 = (x6[6]._super.high * Val(65536)); - Val x62 = (x6[7]._super.high * Val(65536)); - // PoseidonOpDef(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:8) - // GetDef(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:72) - // PoseidonLoadInLow(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:211) - PoseidonOpDefStruct x63 = PoseidonOpDefStruct{.hasState = arg1.hasState._super._super, - .stateAddr = arg1.stateAddr._super._super, - .bufOutAddr = arg1.bufOutAddr._super._super, - .isElem = arg1.isElem._super._super, - .checkOut = arg1.checkOut._super._super, - .loadTxType = arg1.loadTxType._super._super}; - Val x64 = (arg1.bufInAddr._super._super + Val(8)); - // PoseidonLoadInLow(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:204) - Val24Array x65 = Val24Array{ - (x55 + x6[0]._super.low), (x56 + x6[1]._super.low), (x57 + x6[2]._super.low), - (x58 + x6[3]._super.low), (x59 + x6[4]._super.low), (x60 + x6[5]._super.low), - (x61 + x6[6]._super.low), (x62 + x6[7]._super.low), arg1.inner[8]._super._super, - arg1.inner[9]._super._super, arg1.inner[10]._super._super, arg1.inner[11]._super._super, - arg1.inner[12]._super._super, arg1.inner[13]._super._super, arg1.inner[14]._super._super, - arg1.inner[15]._super._super, arg1.inner[16]._super._super, arg1.inner[17]._super._super, - arg1.inner[18]._super._super, arg1.inner[19]._super._super, arg1.inner[20]._super._super, - arg1.inner[21]._super._super, arg1.inner[22]._super._super, arg1.inner[23]._super._super}; - // PoseidonLoadInLow(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:211) - PoseidonStateStruct x66 = - exec_PoseidonState(ctx, - x63, - Val(18), - Val(1), - x64, - arg1.count._super._super, - arg1.mode._super._super, - x65, - (x54 + ((x45 + (x46 * x43)) + (x47 * (x43 * x12._super)))), - LAYOUT_LOOKUP(layout2, _super)); - return x66; -} -__device__ PoseidonStateStruct -exec_PoseidonLoadInHigh(ExecContext& ctx, - RegStruct arg0, - PoseidonStateStruct arg1, - BoundLayout layout2, - GlobalBuf global3) { - // PoseidonLoadInHigh(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:215) - std::initializer_list x4 = std::initializer_list{arg1.loadTxType._super._super}; - // Log(:22) - INVOKE_EXTERN(ctx, log, "txnType", x4); - // PoseidonLoadInHigh(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:216) - OneHot_3_Struct x5 = - exec_OneHot_3_(ctx, arg1.loadTxType._super._super, LAYOUT_LOOKUP(layout2, txType)); - // PoseidonLoadInHigh(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:217) - GetDataStruct8Array x6 = - map(Val8Array{Val(0), Val(1), Val(2), Val(3), Val(4), Val(5), Val(6), Val(7)}, - LAYOUT_LOOKUP(layout2, loadList), - ([&](Val8Array::value_type x7, BoundLayout x8) { - // PoseidonLoadInHigh(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:218) - Val x9 = (arg1.bufInAddr._super._super + x7); - GetDataStruct x10 = exec_MemoryGet(ctx, arg0, x9, x5, x8); - return x10; - })); - // PoseidonLoadInHigh(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:222) - Val x11 = (x6[0]._super.high * Val(65536)); - Val x12 = (x6[1]._super.high * Val(65536)); - Val x13 = (x12 + x6[1]._super.low); - Val x14 = (x6[2]._super.high * Val(65536)); - Val x15 = (x6[3]._super.high * Val(65536)); - Val x16 = (x15 + x6[3]._super.low); - Val x17 = (x6[4]._super.high * Val(65536)); - Val x18 = (x6[5]._super.high * Val(65536)); - Val x19 = (x18 + x6[5]._super.low); - Val x20 = (x6[6]._super.high * Val(65536)); - Val x21 = (x6[7]._super.high * Val(65536)); - Val x22 = (x21 + x6[7]._super.low); - // ShiftPoly(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:159) - // PoseidonLoadInHigh(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:227) - BoundLayout<_globalLayout> x23 = BIND_LAYOUT(kLayoutGlobal, global3); - // ShiftPoly(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:160) - NondetExtRegStruct x24 = back_ExtReg(ctx, 0, LAYOUT_LOOKUP(x23, rng)); - // PolyEvalStateReduce(zirgen/circuit/rv32im/v2/dsl/poly.zir:14) - // PolyEval(zirgen/circuit/rv32im/v2/dsl/poly.zir:18) - // ShiftPoly(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:170) - ExtVal x25 = (x24._super * ExtVal(1, 0, 0, 0)); - ExtVal x26 = (x6[0].diffLow + ExtVal(0, 0, 0, 0)); - ExtVal x27 = (x25 * x24._super); - ExtVal x28 = (x6[0].diffHigh + ExtVal(0, 0, 0, 0)); - ExtVal x29 = (((x26 * ExtVal(1, 0, 0, 0)) + ExtVal(0, 0, 0, 0)) + (x28 * x25)); - ExtVal x30 = (x27 * x24._super); - ExtVal x31 = (x6[1].diffLow + ExtVal(0, 0, 0, 0)); - ExtVal x32 = (x30 * x24._super); - ExtVal x33 = (x6[1].diffHigh + ExtVal(0, 0, 0, 0)); - ExtVal x34 = (x32 * x24._super); - ExtVal x35 = (x6[2].diffLow + ExtVal(0, 0, 0, 0)); - ExtVal x36 = (((x29 + (x31 * x27)) + (x33 * x30)) + (x35 * x32)); - ExtVal x37 = (x34 * x24._super); - ExtVal x38 = (x6[2].diffHigh + ExtVal(0, 0, 0, 0)); - ExtVal x39 = (x37 * x24._super); - ExtVal x40 = (x6[3].diffLow + ExtVal(0, 0, 0, 0)); - ExtVal x41 = (x39 * x24._super); - ExtVal x42 = (x6[3].diffHigh + ExtVal(0, 0, 0, 0)); - ExtVal x43 = (((x36 + (x38 * x34)) + (x40 * x37)) + (x42 * x39)); - ExtVal x44 = (x41 * x24._super); - ExtVal x45 = (x6[4].diffLow + ExtVal(0, 0, 0, 0)); - ExtVal x46 = (x44 * x24._super); - ExtVal x47 = (x6[4].diffHigh + ExtVal(0, 0, 0, 0)); - ExtVal x48 = (x46 * x24._super); - ExtVal x49 = (x6[5].diffLow + ExtVal(0, 0, 0, 0)); - ExtVal x50 = (((x43 + (x45 * x41)) + (x47 * x44)) + (x49 * x46)); - ExtVal x51 = (x48 * x24._super); - ExtVal x52 = (x6[5].diffHigh + ExtVal(0, 0, 0, 0)); - ExtVal x53 = (x51 * x24._super); - ExtVal x54 = (x6[6].diffLow + ExtVal(0, 0, 0, 0)); - ExtVal x55 = (x53 * x24._super); - ExtVal x56 = (x6[6].diffHigh + ExtVal(0, 0, 0, 0)); - ExtVal x57 = (((x50 + (x52 * x48)) + (x54 * x51)) + (x56 * x53)); - ExtVal x58 = (x6[7].diffLow + ExtVal(0, 0, 0, 0)); - ExtVal x59 = (x6[7].diffHigh + ExtVal(0, 0, 0, 0)); - // ShiftPoly(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:160) - NondetExtRegStruct x60 = back_ExtReg(ctx, 0, LAYOUT_LOOKUP(x23, rng)); - // Pow(zirgen/circuit/rv32im/v2/dsl/poly.zir:10) - // ShiftPoly(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:171) - ExtVal x61 = ((x60._super * ExtVal(1, 0, 0, 0)) * x60._super); - ExtVal x62 = (((x61 * x60._super) * x60._super) * x60._super); - ExtVal x63 = (((x62 * x60._super) * x60._super) * x60._super); - ExtVal x64 = (((x63 * x60._super) * x60._super) * x60._super); - ExtVal x65 = (((x64 * x60._super) * x60._super) * x60._super); - ExtVal x66 = (arg1.zcheck._super * ((x65 * x60._super) * x60._super)); - // PoseidonOpDef(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:8) - // GetDef(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:72) - // PoseidonLoadInHigh(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:228) - PoseidonOpDefStruct x67 = PoseidonOpDefStruct{.hasState = arg1.hasState._super._super, - .stateAddr = arg1.stateAddr._super._super, - .bufOutAddr = arg1.bufOutAddr._super._super, - .isElem = arg1.isElem._super._super, - .checkOut = arg1.checkOut._super._super, - .loadTxType = arg1.loadTxType._super._super}; - Val x68 = (arg1.bufInAddr._super._super + Val(8)); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:42) - // MultiplyByMExt(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:61) - Val x69 = (arg1.inner[0]._super._super + arg1.inner[1]._super._super); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:43) - Val x70 = (arg1.inner[2]._super._super + arg1.inner[3]._super._super); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:44) - Val x71 = (arg1.inner[1]._super._super * Val(2)); - Val x72 = (x71 + x70); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:45) - Val x73 = (arg1.inner[3]._super._super * Val(2)); - Val x74 = (x73 + x69); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:46) - Val x75 = ((x70 * Val(4)) + x74); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:47) - Val x76 = ((x69 * Val(4)) + x72); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:48) - Val x77 = (x74 + x76); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:49) - Val x78 = (x72 + x75); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:42) - Val x79 = (arg1.inner[4]._super._super + arg1.inner[5]._super._super); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:43) - Val x80 = (arg1.inner[6]._super._super + arg1.inner[7]._super._super); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:44) - Val x81 = (arg1.inner[5]._super._super * Val(2)); - Val x82 = (x81 + x80); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:45) - Val x83 = (arg1.inner[7]._super._super * Val(2)); - Val x84 = (x83 + x79); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:46) - Val x85 = ((x80 * Val(4)) + x84); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:47) - Val x86 = ((x79 * Val(4)) + x82); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:48) - Val x87 = (x84 + x86); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:49) - Val x88 = (x82 + x85); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:42) - Val x89 = ((x11 + x6[0]._super.low) + x13); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:43) - Val x90 = ((x14 + x6[2]._super.low) + x16); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:44) - Val x91 = ((x13 * Val(2)) + x90); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:45) - Val x92 = ((x16 * Val(2)) + x89); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:46) - Val x93 = ((x90 * Val(4)) + x92); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:47) - Val x94 = ((x89 * Val(4)) + x91); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:48) - Val x95 = (x92 + x94); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:49) - Val x96 = (x91 + x93); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:42) - Val x97 = ((x17 + x6[4]._super.low) + x19); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:43) - Val x98 = ((x20 + x6[6]._super.low) + x22); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:44) - Val x99 = ((x19 * Val(2)) + x98); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:45) - Val x100 = ((x22 * Val(2)) + x97); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:46) - Val x101 = ((x98 * Val(4)) + x100); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:47) - Val x102 = ((x97 * Val(4)) + x99); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:48) - Val x103 = (x100 + x102); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:49) - Val x104 = (x99 + x101); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:42) - Val x105 = (arg1.inner[16]._super._super + arg1.inner[17]._super._super); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:43) - Val x106 = (arg1.inner[18]._super._super + arg1.inner[19]._super._super); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:44) - Val x107 = (arg1.inner[17]._super._super * Val(2)); - Val x108 = (x107 + x106); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:45) - Val x109 = (arg1.inner[19]._super._super * Val(2)); - Val x110 = (x109 + x105); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:46) - Val x111 = ((x106 * Val(4)) + x110); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:47) - Val x112 = ((x105 * Val(4)) + x108); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:48) - Val x113 = (x110 + x112); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:49) - Val x114 = (x108 + x111); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:42) - Val x115 = (arg1.inner[20]._super._super + arg1.inner[21]._super._super); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:43) - Val x116 = (arg1.inner[22]._super._super + arg1.inner[23]._super._super); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:44) - Val x117 = (arg1.inner[21]._super._super * Val(2)); - Val x118 = (x117 + x116); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:45) - Val x119 = (arg1.inner[23]._super._super * Val(2)); - Val x120 = (x119 + x115); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:46) - Val x121 = ((x116 * Val(4)) + x120); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:47) - Val x122 = ((x115 * Val(4)) + x118); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:48) - Val x123 = (x120 + x122); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:49) - Val x124 = (x118 + x121); - // ReduceVec4(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:54) - // MultiplyByMExt(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:64) - Val x125 = (((x77 + x87) + x95) + x103); - Val x126 = (((x76 + x86) + x94) + x102); - Val x127 = (((x78 + x88) + x96) + x104); - Val x128 = (((x75 + x85) + x93) + x101); - Val x129 = ((x125 + x113) + x123); - Val x130 = ((x126 + x112) + x122); - Val x131 = ((x127 + x114) + x124); - Val x132 = ((x128 + x111) + x121); - PoseidonStateStruct x133 = exec_PoseidonState( - ctx, - x67, - Val(24), - Val(0), - x68, - arg1.count._super._super, - arg1.mode._super._super, - Val24Array{(x77 + x129), (x76 + x130), (x78 + x131), (x75 + x132), (x87 + x129), - (x86 + x130), (x88 + x131), (x85 + x132), (x95 + x129), (x94 + x130), - (x96 + x131), (x93 + x132), (x103 + x129), (x102 + x130), (x104 + x131), - (x101 + x132), (x113 + x129), (x112 + x130), (x114 + x131), (x111 + x132), - (x123 + x129), (x122 + x130), (x124 + x131), (x121 + x132)}, - (x66 + ((x57 + (x58 * x55)) + (x59 * (x55 * x24._super)))), - LAYOUT_LOOKUP(layout2, _super)); - return x133; -} -__device__ PoseidonStateStruct exec_PoseidonLoadIn(ExecContext& ctx, - RegStruct arg0, - PoseidonStateStruct arg1, - BoundLayout layout2, - GlobalBuf global3) { - // PoseidonLoadIn(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:232) - Val x4 = (arg1.isElem._super._super + arg1.subState._super._super); - // PoseidonLoadIn(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:233) - OneHot_3_Struct x5 = exec_OneHot_3_(ctx, x4, LAYOUT_LOOKUP(layout2, _0)); - PoseidonStateStruct x6; - if (to_size_t(x5._super[0]._super)) { - // PoseidonLoadIn(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:234) - PoseidonStateStruct x7 = - exec_PoseidonLoadInShort(ctx, arg0, arg1, LAYOUT_LOOKUP(layout2, _super.arm0), global3); - x6 = x7; - } else if (to_size_t(x5._super[1]._super)) { - // PoseidonLoadIn(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:235) - PoseidonStateStruct x8 = - exec_PoseidonLoadInLow(ctx, arg0, arg1, LAYOUT_LOOKUP(layout2, _super.arm1), global3); - x6 = x8; - } else if (to_size_t(x5._super[2]._super)) { - // PoseidonLoadIn(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:236) - PoseidonStateStruct x9 = - exec_PoseidonLoadInHigh(ctx, arg0, arg1, LAYOUT_LOOKUP(layout2, _super.arm2), global3); - x6 = x9; - } else { - assert(0 && "Reached unreachable mux arm"); - } - // PoseidonLoadIn(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:233) - PoseidonStateStruct x10 = back_PoseidonState(ctx, 0, LAYOUT_LOOKUP(layout2, _super._super)); - return x10; -} -__device__ PoseidonStateStruct exec_PoseidonExtRound(ExecContext& ctx, - PoseidonStateStruct arg0, - BoundLayout layout1) { - // PoseidonExtRound(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:241) - Val x2 = (arg0.subState._super._super - Val(3)); - NondetRegStruct x3 = exec_IsZero(ctx, x2, LAYOUT_LOOKUP(layout1, isRound3)); - // PoseidonExtRound(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:242) - Val x4 = (arg0.subState._super._super - Val(7)); - NondetRegStruct x5 = exec_IsZero(ctx, x4, LAYOUT_LOOKUP(layout1, isRound7)); - // PoseidonExtRound(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:243) - Val x6 = (arg0.count._super._super - Val(1)); - // PoseidonExtRound(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:244) - NondetRegStruct x7 = exec_IsZero(ctx, x6, LAYOUT_LOOKUP(layout1, lastBlock)); - // PoseidonExtRound(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:245) - Val x8 = (arg0.count._super._super - x5._super); - // PoseidonExtRound(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:248) - Val x9 = ((Val(1) - x3._super) - x5._super); - // PoseidonExtRound(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:247) - Val x10 = ((x3._super * Val(25)) + (x9 * Val(24))); - // PoseidonExtRound(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:249) - Val x11 = (x5._super * (Val(1) - x7._super)); - // PoseidonExtRound(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:250) - Val x12 = ((x5._super * x7._super) * Val(21)); - // PoseidonExtRound(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:251) - Val x13 = (arg0.subState._super._super + Val(1)); - // PoseidonExtRound(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:240) - Val24Array x14 = Val24Array{ - arg0.inner[0]._super._super, arg0.inner[1]._super._super, arg0.inner[2]._super._super, - arg0.inner[3]._super._super, arg0.inner[4]._super._super, arg0.inner[5]._super._super, - arg0.inner[6]._super._super, arg0.inner[7]._super._super, arg0.inner[8]._super._super, - arg0.inner[9]._super._super, arg0.inner[10]._super._super, arg0.inner[11]._super._super, - arg0.inner[12]._super._super, arg0.inner[13]._super._super, arg0.inner[14]._super._super, - arg0.inner[15]._super._super, arg0.inner[16]._super._super, arg0.inner[17]._super._super, - arg0.inner[18]._super._super, arg0.inner[19]._super._super, arg0.inner[20]._super._super, - arg0.inner[21]._super._super, arg0.inner[22]._super._super, arg0.inner[23]._super._super}; - // PoseidonExtRound(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:252) - MultiplyByMExtStruct x15 = exec_DoExtRoundByIdx( - ctx, x14, arg0.subState._super._super, LAYOUT_LOOKUP(layout1, nextInner)); - // PoseidonOpDef(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:8) - // GetDef(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:72) - // PoseidonExtRound(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:253) - PoseidonOpDefStruct x16 = PoseidonOpDefStruct{.hasState = arg0.hasState._super._super, - .stateAddr = arg0.stateAddr._super._super, - .bufOutAddr = arg0.bufOutAddr._super._super, - .isElem = arg0.isElem._super._super, - .checkOut = arg0.checkOut._super._super, - .loadTxType = arg0.loadTxType._super._super}; - // PoseidonExtRound(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:252) - Val24Array x17 = Val24Array{ - x15._super[0]._super, x15._super[1]._super, x15._super[2]._super, x15._super[3]._super, - x15._super[4]._super, x15._super[5]._super, x15._super[6]._super, x15._super[7]._super, - x15._super[8]._super, x15._super[9]._super, x15._super[10]._super, x15._super[11]._super, - x15._super[12]._super, x15._super[13]._super, x15._super[14]._super, x15._super[15]._super, - x15._super[16]._super, x15._super[17]._super, x15._super[18]._super, x15._super[19]._super, - x15._super[20]._super, x15._super[21]._super, x15._super[22]._super, x15._super[23]._super}; - // PoseidonExtRound(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:253) - PoseidonStateStruct x18 = exec_PoseidonState(ctx, - x16, - ((x10 + (x11 * Val(18))) + x12), - (x9 * x13), - arg0.bufInAddr._super._super, - x8, - arg0.mode._super._super, - x17, - arg0.zcheck._super, - LAYOUT_LOOKUP(layout1, _super)); - return x18; -} -__device__ PoseidonStateStruct exec_PoseidonIntRounds( - ExecContext& ctx, PoseidonStateStruct arg0, BoundLayout layout1) { - // PoseidonIntRounds(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:256) - Val24Array x2 = Val24Array{ - arg0.inner[0]._super._super, arg0.inner[1]._super._super, arg0.inner[2]._super._super, - arg0.inner[3]._super._super, arg0.inner[4]._super._super, arg0.inner[5]._super._super, - arg0.inner[6]._super._super, arg0.inner[7]._super._super, arg0.inner[8]._super._super, - arg0.inner[9]._super._super, arg0.inner[10]._super._super, arg0.inner[11]._super._super, - arg0.inner[12]._super._super, arg0.inner[13]._super._super, arg0.inner[14]._super._super, - arg0.inner[15]._super._super, arg0.inner[16]._super._super, arg0.inner[17]._super._super, - arg0.inner[18]._super._super, arg0.inner[19]._super._super, arg0.inner[20]._super._super, - arg0.inner[21]._super._super, arg0.inner[22]._super._super, arg0.inner[23]._super._super}; - // PoseidonIntRounds(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:257) - DoIntRoundsStruct x3 = exec_DoIntRounds(ctx, x2, LAYOUT_LOOKUP(layout1, nextInner)); - // PoseidonOpDef(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:8) - // GetDef(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:72) - // PoseidonIntRounds(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:258) - PoseidonOpDefStruct x4 = PoseidonOpDefStruct{.hasState = arg0.hasState._super._super, - .stateAddr = arg0.stateAddr._super._super, - .bufOutAddr = arg0.bufOutAddr._super._super, - .isElem = arg0.isElem._super._super, - .checkOut = arg0.checkOut._super._super, - .loadTxType = arg0.loadTxType._super._super}; - PoseidonStateStruct x5 = exec_PoseidonState(ctx, - x4, - Val(24), - Val(4), - arg0.bufInAddr._super._super, - arg0.count._super._super, - arg0.mode._super._super, - x3._super, - arg0.zcheck._super, - LAYOUT_LOOKUP(layout1, _super)); - return x5; -} -__device__ PoseidonStateStruct exec_PoseidonCheckOut(ExecContext& ctx, - RegStruct arg0, - PoseidonStateStruct arg1, - BoundLayout layout2) { - // PoseidonCheckOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:262) - PoseidonCheckOut__0Struct8Array x3 = - map(Val8Array{Val(0), Val(1), Val(2), Val(3), Val(4), Val(5), Val(6), Val(7)}, - LAYOUT_LOOKUP(layout2, _1), - ([&](Val8Array::value_type x4, - BoundLayout x5) { - // PoseidonCheckOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:264) - Val x6 = (arg1.bufOutAddr._super._super + x4); - ReadElemStruct x7 = exec_ReadElem(ctx, arg0, x6, LAYOUT_LOOKUP(x5, goal)); - // PoseidonCheckOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:265) - Val x8 = (x7._super - arg1.inner[to_size_t(x4)]._super._super); - EQZ(x8, "PoseidonCheckOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:265)"); - return PoseidonCheckOut__0Struct{}; - })); - // PoseidonCheckOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:267) - NondetRegStruct x9 = - exec_IsZero(ctx, arg1.loadTxType._super._super, LAYOUT_LOOKUP(layout2, isNormal)); - // PoseidonCheckOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:268) - Val x10 = ((Val(1) - x9._super) * Val(22)); - Val x11 = ((x9._super * Val(32)) + x10); - // PoseidonCheckOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:269) - Val x12 = (arg1.hasState._super._super * Val(23)); - Val x13 = (Val(1) - arg1.hasState._super._super); - // PoseidonCheckOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:274) - ExtVal x14 = inv_0(arg1.zcheck._super); - NondetExtRegStruct x15 = exec_NondetExtReg(ctx, x14, LAYOUT_LOOKUP(layout2, extInv)); - // PoseidonCheckOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:275) - ExtVal x16 = (x15._super * arg1.zcheck._super); - EQZ((x16 - ExtVal(1, 0, 0, 0)), - "loc(callsite(unknown at PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir " - ":275:10)))"); - // PoseidonOpDef(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:8) - // GetDef(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:72) - // PoseidonCheckOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:276) - PoseidonOpDefStruct x17 = PoseidonOpDefStruct{.hasState = arg1.hasState._super._super, - .stateAddr = arg1.stateAddr._super._super, - .bufOutAddr = arg1.bufOutAddr._super._super, - .isElem = arg1.isElem._super._super, - .checkOut = arg1.checkOut._super._super, - .loadTxType = arg1.loadTxType._super._super}; - // PoseidonCheckOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:261) - Val24Array x18 = Val24Array{ - arg1.inner[0]._super._super, arg1.inner[1]._super._super, arg1.inner[2]._super._super, - arg1.inner[3]._super._super, arg1.inner[4]._super._super, arg1.inner[5]._super._super, - arg1.inner[6]._super._super, arg1.inner[7]._super._super, arg1.inner[8]._super._super, - arg1.inner[9]._super._super, arg1.inner[10]._super._super, arg1.inner[11]._super._super, - arg1.inner[12]._super._super, arg1.inner[13]._super._super, arg1.inner[14]._super._super, - arg1.inner[15]._super._super, arg1.inner[16]._super._super, arg1.inner[17]._super._super, - arg1.inner[18]._super._super, arg1.inner[19]._super._super, arg1.inner[20]._super._super, - arg1.inner[21]._super._super, arg1.inner[22]._super._super, arg1.inner[23]._super._super}; - // PoseidonCheckOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:276) - PoseidonStateStruct x19 = exec_PoseidonState(ctx, - x17, - (x12 + (x13 * x11)), - Val(0), - Val(0), - Val(0), - arg1.mode._super._super, - x18, - ExtVal(0, 0, 0, 0), - LAYOUT_LOOKUP(layout2, _super)); - return x19; -} -__device__ PoseidonStateStruct exec_PoseidonStoreOut(ExecContext& ctx, - RegStruct arg0, - PoseidonStateStruct arg1, - BoundLayout layout2) { - // PoseidonStoreOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:280) - PoseidonStoreOut__0Struct8Array x3 = - map(Val8Array{Val(0), Val(1), Val(2), Val(3), Val(4), Val(5), Val(6), Val(7)}, - LAYOUT_LOOKUP(layout2, _1), - ([&](Val8Array::value_type x4, - BoundLayout x5) { - // PoseidonStoreOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:282) - Val x6 = bitAnd(arg1.inner[to_size_t(x4)]._super._super, Val(65535)); - NondetRegStruct x7 = exec_NondetU16Reg(ctx, x6, LAYOUT_LOOKUP(x5, low)); - // PoseidonStoreOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:283) - Val x8 = (arg1.inner[to_size_t(x4)]._super._super - x7._super); - U16RegStruct x9 = exec_U16Reg(ctx, (x8 * Val(2013235201)), LAYOUT_LOOKUP(x5, high)); - // PoseidonStoreOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:284) - Val x10 = (arg1.bufOutAddr._super._super + x4); - MemoryWriteStruct x11 = - exec_MemoryWrite(ctx, - arg0, - x10, - ValU32Struct{.low = x7._super, .high = x9._super}, - LAYOUT_LOOKUP(x5, _0)); - return PoseidonStoreOut__0Struct{}; - })); - // PoseidonStoreOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:286) - NondetRegStruct x12 = - exec_IsZero(ctx, arg1.loadTxType._super._super, LAYOUT_LOOKUP(layout2, isNormal)); - // PoseidonStoreOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:287) - Val x13 = ((Val(1) - x12._super) * Val(22)); - Val x14 = ((x12._super * Val(32)) + x13); - // PoseidonStoreOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:289) - Val x15 = (arg1.hasState._super._super * Val(23)); - // PoseidonStoreOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:290) - Val x16 = (Val(1) - arg1.hasState._super._super); - // PoseidonStoreOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:291) - ExtVal x17 = inv_0(arg1.zcheck._super); - NondetExtRegStruct x18 = exec_NondetExtReg(ctx, x17, LAYOUT_LOOKUP(layout2, extInv)); - // PoseidonOpDef(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:8) - // GetDef(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:72) - // PoseidonStoreOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:292) - PoseidonOpDefStruct x19 = PoseidonOpDefStruct{.hasState = arg1.hasState._super._super, - .stateAddr = arg1.stateAddr._super._super, - .bufOutAddr = arg1.bufOutAddr._super._super, - .isElem = arg1.isElem._super._super, - .checkOut = arg1.checkOut._super._super, - .loadTxType = arg1.loadTxType._super._super}; - // PoseidonStoreOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:279) - Val24Array x20 = Val24Array{ - arg1.inner[0]._super._super, arg1.inner[1]._super._super, arg1.inner[2]._super._super, - arg1.inner[3]._super._super, arg1.inner[4]._super._super, arg1.inner[5]._super._super, - arg1.inner[6]._super._super, arg1.inner[7]._super._super, arg1.inner[8]._super._super, - arg1.inner[9]._super._super, arg1.inner[10]._super._super, arg1.inner[11]._super._super, - arg1.inner[12]._super._super, arg1.inner[13]._super._super, arg1.inner[14]._super._super, - arg1.inner[15]._super._super, arg1.inner[16]._super._super, arg1.inner[17]._super._super, - arg1.inner[18]._super._super, arg1.inner[19]._super._super, arg1.inner[20]._super._super, - arg1.inner[21]._super._super, arg1.inner[22]._super._super, arg1.inner[23]._super._super}; - // PoseidonStoreOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:292) - PoseidonStateStruct x21 = exec_PoseidonState(ctx, - x19, - (x15 + (x16 * x14)), - Val(0), - Val(0), - Val(0), - arg1.mode._super._super, - x20, - ExtVal(0, 0, 0, 0), - LAYOUT_LOOKUP(layout2, _super)); - return x21; -} -__device__ PoseidonStateStruct exec_PoseidonDoOut(ExecContext& ctx, - RegStruct arg0, - PoseidonStateStruct arg1, - BoundLayout layout2) { - // PoseidonDoOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:296) - Val x3 = (Val(1) - arg1.checkOut._super._super); - PoseidonStateStruct x4; - if (to_size_t(arg1.checkOut._super._super)) { - PoseidonStateStruct x5 = - exec_PoseidonCheckOut(ctx, arg0, arg1, LAYOUT_LOOKUP(layout2, _super.arm0._super)); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra0.count._super), 0), - "PoseidonDoOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:296)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra1.count._super), 0), - "PoseidonDoOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:296)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra2.count._super), 0), - "PoseidonDoOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:296)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra3.count._super), 0), - "PoseidonDoOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:296)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra4.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra4.count._super), 0), - "PoseidonDoOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:296)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra5.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra5.count._super), 0), - "PoseidonDoOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:296)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra6.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra6.count._super), 0), - "PoseidonDoOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:296)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra7.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra7.count._super), 0), - "PoseidonDoOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:296)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra8.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra8.count._super), 0), - "PoseidonDoOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:296)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra9.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra9.count._super), 0), - "PoseidonDoOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:296)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra10.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra10.count._super), 0), - "PoseidonDoOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:296)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra11.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra11.count._super), 0), - "PoseidonDoOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:296)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra12.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra12.count._super), 0), - "PoseidonDoOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:296)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra13.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra13.count._super), 0), - "PoseidonDoOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:296)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra14.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra14.count._super), 0), - "PoseidonDoOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:296)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra15.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra15.count._super), 0), - "PoseidonDoOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:296)"); - x4 = x5; - } else if (to_size_t(x3)) { - PoseidonStateStruct x6 = - exec_PoseidonStoreOut(ctx, arg0, arg1, LAYOUT_LOOKUP(layout2, _super.arm1)); - x4 = x6; - } else { - assert(0 && "Reached unreachable mux arm"); - } - PoseidonStateStruct x7 = back_PoseidonState(ctx, 0, LAYOUT_LOOKUP(layout2, _super._super)); - return x7; -} -__device__ PoseidonStateStruct -exec_PoseidonStoreState(ExecContext& ctx, - RegStruct arg0, - PoseidonStateStruct arg1, - BoundLayout layout2) { - // PoseidonStoreState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:300) - PoseidonStoreState__0Struct8Array x3 = - map(Val8Array{Val(0), Val(1), Val(2), Val(3), Val(4), Val(5), Val(6), Val(7)}, - LAYOUT_LOOKUP(layout2, _1), - ([&](Val8Array::value_type x4, - BoundLayout x5) { - // PoseidonStoreState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:302) - Val x6 = bitAnd(arg1.inner[to_size_t((x4 + Val(16)))]._super._super, Val(65535)); - NondetRegStruct x7 = exec_NondetU16Reg(ctx, x6, LAYOUT_LOOKUP(x5, low)); - // PoseidonStoreState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:303) - Val x8 = (arg1.inner[to_size_t((x4 + Val(16)))]._super._super - x7._super); - U16RegStruct x9 = exec_U16Reg(ctx, (x8 * Val(2013235201)), LAYOUT_LOOKUP(x5, high)); - // PoseidonStoreState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:304) - Val x10 = (arg1.stateAddr._super._super + x4); - MemoryWriteStruct x11 = - exec_MemoryWrite(ctx, - arg0, - x10, - ValU32Struct{.low = x7._super, .high = x9._super}, - LAYOUT_LOOKUP(x5, _0)); - return PoseidonStoreState__0Struct{}; - })); - // PoseidonOpDef(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:8) - // GetDef(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:72) - // PoseidonStoreState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:306) - PoseidonOpDefStruct x12 = PoseidonOpDefStruct{.hasState = arg1.hasState._super._super, - .stateAddr = arg1.stateAddr._super._super, - .bufOutAddr = arg1.bufOutAddr._super._super, - .isElem = arg1.isElem._super._super, - .checkOut = arg1.checkOut._super._super, - .loadTxType = arg1.loadTxType._super._super}; - // PoseidonStoreState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:299) - Val24Array x13 = Val24Array{ - arg1.inner[0]._super._super, arg1.inner[1]._super._super, arg1.inner[2]._super._super, - arg1.inner[3]._super._super, arg1.inner[4]._super._super, arg1.inner[5]._super._super, - arg1.inner[6]._super._super, arg1.inner[7]._super._super, arg1.inner[8]._super._super, - arg1.inner[9]._super._super, arg1.inner[10]._super._super, arg1.inner[11]._super._super, - arg1.inner[12]._super._super, arg1.inner[13]._super._super, arg1.inner[14]._super._super, - arg1.inner[15]._super._super, arg1.inner[16]._super._super, arg1.inner[17]._super._super, - arg1.inner[18]._super._super, arg1.inner[19]._super._super, arg1.inner[20]._super._super, - arg1.inner[21]._super._super, arg1.inner[22]._super._super, arg1.inner[23]._super._super}; - // PoseidonStoreState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:306) - PoseidonStateStruct x14 = exec_PoseidonState(ctx, - x12, - Val(32), - Val(0), - Val(0), - Val(0), - arg1.mode._super._super, - x13, - ExtVal(0, 0, 0, 0), - LAYOUT_LOOKUP(layout2, _super)); - return x14; -} -__device__ IsU24Struct exec_IsU24(ExecContext& ctx, Val arg0, BoundLayout layout1) { - // IsU24(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:320) - NondetRegStruct x2 = - exec_NondetU16Reg(ctx, bitAnd(arg0, Val(65535)), LAYOUT_LOOKUP(layout1, low16)); - // IsU24(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:321) - U8RegStruct x3 = - exec_U8Reg(ctx, ((arg0 - x2._super) * Val(2013235201)), LAYOUT_LOOKUP(layout1, _0)); - return IsU24Struct{}; -} -__device__ PoseidonStateStruct exec_PoseidonPagingLoadNode( - ExecContext& ctx, RegStruct arg0, Val arg1, BoundLayout layout2) { - // PoseidonOpDef(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:8) - // PoseidonPagingLoadNode(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:325) - PoseidonOpDefStruct x3 = PoseidonOpDefStruct{.hasState = Val(0), - .stateAddr = Val(0), - .bufOutAddr = (Val(1140850688) - (arg1 * Val(8))), - .isElem = Val(1), - .checkOut = Val(1), - .loadTxType = Val(1)}; - // NodeIdxToAddr(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:317) - // PoseidonPagingLoadNode(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:337) - Val x4 = (((arg1 * Val(2)) + Val(1)) * Val(8)); - // PoseidonPagingLoadNode(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:333) - PoseidonStateStruct x5 = - exec_PoseidonState(ctx, - x3, - Val(18), - Val(0), - (Val(1140850688) - x4), - Val(1), - Val(0), - Val24Array{Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), - Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), - Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0)}, - ExtVal(0, 0, 0, 0), - layout2); - return x5; -} -__device__ PoseidonStateStruct exec_PoseidonPagingLoadPage( - ExecContext& ctx, RegStruct arg0, Val arg1, BoundLayout layout2) { - // PoseidonOpDef(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:8) - // PoseidonPagingLoadPage(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:347) - PoseidonOpDefStruct x3 = PoseidonOpDefStruct{.hasState = Val(0), - .stateAddr = Val(0), - .bufOutAddr = (Val(1140850688) - (arg1 * Val(8))), - .isElem = Val(0), - .checkOut = Val(1), - .loadTxType = Val(1)}; - // PoseidonPagingLoadPage(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:355) - PoseidonStateStruct x4 = - exec_PoseidonState(ctx, - x3, - Val(18), - Val(0), - ((arg1 - Val(4194304)) * Val(256)), - Val(32), - Val(1), - Val24Array{Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), - Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), - Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0)}, - ExtVal(0, 0, 0, 0), - layout2); - return x4; -} -__device__ PoseidonStateStruct -exec_PoseidonPagingLoadDone(ExecContext& ctx, BoundLayout layout0) { - // PoseidonPagingLoadDone(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:369) - PoseidonStateStruct x1 = - exec_PoseidonState(ctx, - PoseidonOpDefStruct{.hasState = Val(0), - .stateAddr = Val(0), - .bufOutAddr = Val(1073741824), - .isElem = Val(0), - .checkOut = Val(0), - .loadTxType = Val(0)}, - Val(1), - Val(0), - Val(0), - Val(0), - Val(2), - Val24Array{Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), - Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), - Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0)}, - ExtVal(0, 0, 0, 0), - layout0); - return x1; -} -__device__ PoseidonStateStruct exec_PoseidonPagingStoreNode( - ExecContext& ctx, RegStruct arg0, Val arg1, BoundLayout layout2) { - // PoseidonOpDef(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:8) - // PoseidonPagingStoreNode(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:373) - PoseidonOpDefStruct x3 = PoseidonOpDefStruct{.hasState = Val(0), - .stateAddr = Val(0), - .bufOutAddr = (Val(1140850688) - (arg1 * Val(8))), - .isElem = Val(1), - .checkOut = Val(0), - .loadTxType = Val(2)}; - // NodeIdxToAddr(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:317) - // PoseidonPagingStoreNode(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:385) - Val x4 = (((arg1 * Val(2)) + Val(1)) * Val(8)); - // PoseidonPagingStoreNode(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:381) - PoseidonStateStruct x5 = - exec_PoseidonState(ctx, - x3, - Val(18), - Val(0), - (Val(1140850688) - x4), - Val(1), - Val(4), - Val24Array{Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), - Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), - Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0)}, - ExtVal(0, 0, 0, 0), - layout2); - return x5; -} -__device__ PoseidonStateStruct exec_PoseidonPagingStorePage( - ExecContext& ctx, RegStruct arg0, Val arg1, BoundLayout layout2) { - // PoseidonOpDef(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:8) - // PoseidonPagingStorePage(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:395) - PoseidonOpDefStruct x3 = PoseidonOpDefStruct{.hasState = Val(0), - .stateAddr = Val(0), - .bufOutAddr = (Val(1140850688) - (arg1 * Val(8))), - .isElem = Val(0), - .checkOut = Val(0), - .loadTxType = Val(2)}; - // PoseidonPagingStorePage(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:403) - PoseidonStateStruct x4 = - exec_PoseidonState(ctx, - x3, - Val(18), - Val(0), - ((arg1 - Val(4194304)) * Val(256)), - Val(32), - Val(3), - Val24Array{Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), - Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), - Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0)}, - ExtVal(0, 0, 0, 0), - layout2); - return x4; -} -__device__ PoseidonStateStruct -exec_PoseidonPagingStoreDone(ExecContext& ctx, BoundLayout layout0) { - // PoseidonPagingStoreDone(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:417) - PoseidonStateStruct x1 = - exec_PoseidonState(ctx, - PoseidonOpDefStruct{.hasState = Val(0), - .stateAddr = Val(0), - .bufOutAddr = Val(1140850688), - .isElem = Val(0), - .checkOut = Val(0), - .loadTxType = Val(0)}, - Val(5), - Val(0), - Val(0), - Val(0), - Val(5), - Val24Array{Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), - Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), - Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0)}, - ExtVal(0, 0, 0, 0), - layout0); - return x1; -} -__device__ OneHot_6_Struct exec_OneHot_6_(ExecContext& ctx, - Val arg0, - BoundLayout layout1) { - // OneHot(zirgen/circuit/rv32im/v2/dsl/one_hot.zir:7) - NondetRegStruct6Array x2 = - map(Val6Array{Val(0), Val(1), Val(2), Val(3), Val(4), Val(5)}, - LAYOUT_LOOKUP(layout1, _super), - ([&](Val6Array::value_type x3, BoundLayout x4) { - NondetRegStruct x5 = exec_NondetBitReg(ctx, isz((x3 - arg0)), x4); - return x5; - })); - // OneHot(zirgen/circuit/rv32im/v2/dsl/one_hot.zir:9) - Val x6 = (x2[0]._super + x2[1]._super); - Val x7 = ((x6 + x2[2]._super) + x2[3]._super); - Val x8 = ((x7 + x2[4]._super) + x2[5]._super); - EQZ((x8 - Val(1)), "OneHot(zirgen/circuit/rv32im/v2/dsl/one_hot.zir:9)"); - // OneHot(zirgen/circuit/rv32im/v2/dsl/one_hot.zir:11) - Val x9 = (x2[2]._super * Val(2)); - Val x10 = (x2[3]._super * Val(3)); - Val x11 = (x2[4]._super * Val(4)); - Val x12 = (x2[5]._super * Val(5)); - Val x13 = (x2[1]._super + x9); - Val x14 = (((x13 + x10) + x11) + x12); - EQZ((x14 - arg0), "OneHot(zirgen/circuit/rv32im/v2/dsl/one_hot.zir:11)"); - return OneHot_6_Struct{._super = x2, .bits = x2}; -} -__device__ PoseidonStateStruct exec_PoseidonPaging(ExecContext& ctx, - RegStruct arg0, - Val arg1, - PoseidonStateStruct arg2, - BoundLayout layout3) { - // NodeAddrToIdx(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:316) - // PoseidonPaging(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:421) - Val x4 = (Val(1140850688) - arg2.bufOutAddr._super._super); - // Div(:19) - Val x5 = (x4 * Val(1761607681)); - // nextPagingIdx(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:314) - // PoseidonPaging(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:422) - auto [x6, x7] = INVOKE_EXTERN(ctx, nextPagingIdx); - // PoseidonPaging(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:423) - NondetRegStruct x8 = exec_NondetReg(ctx, x6, LAYOUT_LOOKUP(layout3, curIdx)); - // PoseidonPaging(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:424) - NondetRegStruct x9 = exec_NondetReg(ctx, x7, LAYOUT_LOOKUP(layout3, curMode)); - // PoseidonPaging(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:425) - OneHot_6_Struct x10 = exec_OneHot_6_(ctx, x9._super, LAYOUT_LOOKUP(layout3, modeSplit)); - // PoseidonPaging(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:426) - Val x11 = (x10.bits[0]._super + x10.bits[1]._super); - Val x12 = (x11 + x10.bits[2]._super); - // PoseidonPaging(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:427) - IsU24Struct x13 = exec_IsU24(ctx, x8._super, LAYOUT_LOOKUP(layout3, _0)); - // PoseidonPaging(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:428) - ComponentStruct x14 = ComponentStruct{}; - ComponentStruct x15; - if (to_size_t(x12)) { - // PoseidonPaging(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:429) - IsU24Struct x16 = - exec_IsU24(ctx, (x8._super - (x5 + Val(1))), LAYOUT_LOOKUP(layout3, _3.arm0._0)); - x15 = x14; - } else if (to_size_t((Val(1) - x12))) { - // PoseidonPaging(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:431) - IsU24Struct x17 = - exec_IsU24(ctx, ((x5 - Val(1)) - x8._super), LAYOUT_LOOKUP(layout3, _3.arm1._0)); - x15 = x14; - } else { - assert(0 && "Reached unreachable mux arm"); - } - // PoseidonPaging(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:434) - BitRegStruct x18 = exec_BitReg(ctx, (x9._super - arg1), LAYOUT_LOOKUP(layout3, _4)); - PoseidonStateStruct x19; - if (to_size_t(x10._super[0]._super)) { - // PoseidonPaging(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:436) - PoseidonStateStruct x20 = - exec_PoseidonPagingLoadNode(ctx, arg0, x8._super, LAYOUT_LOOKUP(layout3, _super.arm0)); - x19 = x20; - } else if (to_size_t(x10._super[1]._super)) { - // PoseidonPaging(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:437) - PoseidonStateStruct x21 = - exec_PoseidonPagingLoadPage(ctx, arg0, x8._super, LAYOUT_LOOKUP(layout3, _super.arm1)); - x19 = x21; - } else if (to_size_t(x10._super[2]._super)) { - // PoseidonPaging(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:438) - PoseidonStateStruct x22 = exec_PoseidonPagingLoadDone(ctx, LAYOUT_LOOKUP(layout3, _super.arm2)); - x19 = x22; - } else if (to_size_t(x10._super[3]._super)) { - // PoseidonPaging(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:439) - PoseidonStateStruct x23 = - exec_PoseidonPagingStorePage(ctx, arg0, x8._super, LAYOUT_LOOKUP(layout3, _super.arm3)); - x19 = x23; - } else if (to_size_t(x10._super[4]._super)) { - // PoseidonPaging(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:440) - PoseidonStateStruct x24 = - exec_PoseidonPagingStoreNode(ctx, arg0, x8._super, LAYOUT_LOOKUP(layout3, _super.arm4)); - x19 = x24; - } else if (to_size_t(x10._super[5]._super)) { - // PoseidonPaging(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:441) - PoseidonStateStruct x25 = - exec_PoseidonPagingStoreDone(ctx, LAYOUT_LOOKUP(layout3, _super.arm5)); - x19 = x25; - } else { - assert(0 && "Reached unreachable mux arm"); - } - // PoseidonPaging(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:435) - PoseidonStateStruct x26 = back_PoseidonState(ctx, 0, LAYOUT_LOOKUP(layout3, _super._super)); - return x26; -} -__device__ InstOutputStruct exec_Poseidon0(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2, - GlobalBuf global3) { - PoseidonStateStruct x4; - if (to_size_t(arg1.minorOnehot._super[0]._super)) { - // Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:449) - PoseidonStateStruct x5 = exec_PoseidonEntry( - ctx, arg0, arg1.pcU32, arg1.mode, LAYOUT_LOOKUP(layout2, stateRedef.arm0._super)); - // Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448) - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra0.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra1.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra2.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra3.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra4.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra4.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra5.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra5.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra6.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra6.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra7.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra7.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra8.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra8.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra9.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra9.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra10.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra10.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra11.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra11.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra12.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra12.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra13.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra13.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra14.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra14.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra15.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra15.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra16.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra16.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra17.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra17.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra18.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra18.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra19.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra19.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra20.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra20.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra21.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra21.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra22.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra22.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra23.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra23.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra24.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra24.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra25.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra25.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra26.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra26.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra27.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra27.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra28.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra28.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra29.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra29.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - x4 = x5; - } else if (to_size_t(arg1.minorOnehot._super[1]._super)) { - // Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:450) - PoseidonStateStruct x6 = back_PoseidonState(ctx, 1, LAYOUT_LOOKUP(layout2, state)); - PoseidonStateStruct x7 = - exec_PoseidonLoadState(ctx, arg0, x6, LAYOUT_LOOKUP(layout2, stateRedef.arm1._super)); - // Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448) - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm1._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm1._extra0.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm1._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm1._extra1.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm1._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm1._extra2.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm1._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm1._extra3.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm1._extra4.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm1._extra4.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm1._extra5.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm1._extra5.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm1._extra6.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm1._extra6.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm1._extra7.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm1._extra7.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm1._extra8.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm1._extra8.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm1._extra9.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm1._extra9.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm1._extra10.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm1._extra10.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm1._extra11.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm1._extra11.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm1._extra12.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm1._extra12.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm1._extra13.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm1._extra13.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm1._extra14.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm1._extra14.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm1._extra15.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm1._extra15.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm1._extra16.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm1._extra16.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm1._extra17.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm1._extra17.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - x4 = x7; - } else if (to_size_t(arg1.minorOnehot._super[2]._super)) { - // Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:451) - PoseidonStateStruct x8 = back_PoseidonState(ctx, 1, LAYOUT_LOOKUP(layout2, state)); - PoseidonStateStruct x9 = - exec_PoseidonLoadIn(ctx, arg0, x8, LAYOUT_LOOKUP(layout2, stateRedef.arm2._super), global3); - // Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448) - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm2._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm2._extra0.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm2._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm2._extra1.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm2._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm2._extra2.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm2._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm2._extra3.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm2._extra4.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm2._extra4.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm2._extra5.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm2._extra5.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm2._extra6.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm2._extra6.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm2._extra7.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm2._extra7.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm2._extra8.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm2._extra8.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm2._extra9.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm2._extra9.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm2._extra10.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm2._extra10.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm2._extra11.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm2._extra11.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm2._extra12.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm2._extra12.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm2._extra13.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm2._extra13.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm2._extra14.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm2._extra14.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm2._extra15.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm2._extra15.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm2._extra16.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm2._extra16.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm2._extra17.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm2._extra17.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - x4 = x9; - } else if (to_size_t(arg1.minorOnehot._super[3]._super)) { - // Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:452) - PoseidonStateStruct x10 = - exec_PoseidonInvalid(ctx, LAYOUT_LOOKUP(layout2, stateRedef.arm3._super)); - // Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448) - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra0.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra1.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra2.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra3.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra4.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra4.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra5.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra5.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra6.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra6.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra7.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra7.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra8.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra8.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra9.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra9.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra10.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra10.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra11.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra11.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra12.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra12.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra13.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra13.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra14.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra14.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra15.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra15.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra16.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra16.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra17.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra17.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra18.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra18.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra19.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra19.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra20.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra20.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra21.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra21.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra22.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra22.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra23.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra23.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra24.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra24.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra25.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra25.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra26.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra26.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra27.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra27.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra28.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra28.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra29.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra29.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra30.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra30.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra31.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra31.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra32.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra32.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra33.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra33.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra34.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra34.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra35.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra35.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra36.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra36.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra37.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra37.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra38.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra38.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra39.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra39.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra40.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra40.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra41.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra41.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - x4 = x10; - } else if (to_size_t(arg1.minorOnehot._super[4]._super)) { - // Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:453) - PoseidonStateStruct x11 = - exec_PoseidonInvalid(ctx, LAYOUT_LOOKUP(layout2, stateRedef.arm4._super)); - // Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448) - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra0.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra1.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra2.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra3.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra4.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra4.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra5.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra5.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra6.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra6.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra7.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra7.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra8.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra8.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra9.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra9.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra10.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra10.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra11.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra11.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra12.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra12.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra13.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra13.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra14.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra14.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra15.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra15.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra16.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra16.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra17.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra17.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra18.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra18.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra19.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra19.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra20.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra20.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra21.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra21.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra22.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra22.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra23.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra23.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra24.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra24.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra25.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra25.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra26.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra26.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra27.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra27.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra28.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra28.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra29.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra29.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra30.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra30.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra31.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra31.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra32.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra32.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra33.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra33.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra34.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra34.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra35.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra35.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra36.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra36.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra37.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra37.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra38.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra38.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra39.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra39.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra40.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra40.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra41.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra41.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - x4 = x11; - } else if (to_size_t(arg1.minorOnehot._super[5]._super)) { - // Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:454) - PoseidonStateStruct x12 = back_PoseidonState(ctx, 1, LAYOUT_LOOKUP(layout2, state)); - PoseidonStateStruct x13 = - exec_PoseidonDoOut(ctx, arg0, x12, LAYOUT_LOOKUP(layout2, stateRedef.arm5._super)); - // Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448) - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm5._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm5._extra0.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm5._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm5._extra1.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - x4 = x13; - } else if (to_size_t(arg1.minorOnehot._super[6]._super)) { - // Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:455) - PoseidonStateStruct x14 = back_PoseidonState(ctx, 1, LAYOUT_LOOKUP(layout2, state)); - PoseidonStateStruct x15 = exec_PoseidonPaging( - ctx, arg0, arg1.mode, x14, LAYOUT_LOOKUP(layout2, stateRedef.arm6._super)); - // Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448) - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra0.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra1.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra2.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra3.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra4.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra4.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra5.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra5.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra6.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra6.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra7.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra7.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra8.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra8.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra9.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra9.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra10.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra10.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra11.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra11.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra12.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra12.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra13.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra13.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra14.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra14.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra15.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra15.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra16.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra16.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra17.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra17.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra18.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra18.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra19.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra19.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra20.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra20.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra21.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra21.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra22.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra22.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra23.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra23.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra24.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra24.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra25.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra25.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra26.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra26.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra27.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra27.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra28.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra28.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra29.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra29.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra30.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra30.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra31.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra31.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra32.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra32.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra33.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra33.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra34.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra34.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra35.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra35.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra36.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra36.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra37.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra37.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - x4 = x15; - } else if (to_size_t(arg1.minorOnehot._super[7]._super)) { - // Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:456) - PoseidonStateStruct x16 = back_PoseidonState(ctx, 1, LAYOUT_LOOKUP(layout2, state)); - PoseidonStateStruct x17 = - exec_PoseidonStoreState(ctx, arg0, x16, LAYOUT_LOOKUP(layout2, stateRedef.arm7._super)); - // Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448) - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm7._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm7._extra0.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm7._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm7._extra1.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - x4 = x17; - } else { - assert(0 && "Reached unreachable mux arm"); - } - // GetDiffCount(zirgen/circuit/rv32im/v2/dsl/mem.zir:22) - // Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:458) - Val x18 = INVOKE_EXTERN(ctx, getDiffCount, arg0._super._super); - CycleArgStruct x19 = - exec_CycleArg(ctx, neg_0(x18), arg0._super._super, LAYOUT_LOOKUP(layout2, arg)); - // Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:460) - Val x20 = (x19.cycle._super - arg0._super._super); - EQZ(x20, "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:460)"); - // Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448) - PoseidonStateStruct x21 = back_PoseidonState(ctx, 0, LAYOUT_LOOKUP(layout2, stateRedef._super)); - // InstOutput(zirgen/circuit/rv32im/v2/dsl/inst.zir:46) - // Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:461) - InstOutputStruct x22 = InstOutputStruct{.newPc = arg1.pcU32, - .newState = x21.nextState._super._super, - .newMode = x21.mode._super._super}; - return x22; -} -__device__ InstOutputStruct exec_Poseidon1(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2) { - PoseidonStateStruct x3; - if (to_size_t(arg1.minorOnehot._super[0]._super)) { - // Poseidon1(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:468) - PoseidonStateStruct x4 = back_PoseidonState(ctx, 1, LAYOUT_LOOKUP(layout2, state)); - PoseidonStateStruct x5 = - exec_PoseidonExtRound(ctx, x4, LAYOUT_LOOKUP(layout2, stateRedef.arm0)); - x3 = x5; - } else if (to_size_t(arg1.minorOnehot._super[1]._super)) { - // Poseidon1(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:469) - PoseidonStateStruct x6 = back_PoseidonState(ctx, 1, LAYOUT_LOOKUP(layout2, state)); - PoseidonStateStruct x7 = - exec_PoseidonIntRounds(ctx, x6, LAYOUT_LOOKUP(layout2, stateRedef.arm1)); - x3 = x7; - } else if (to_size_t(arg1.minorOnehot._super[2]._super)) { - // Poseidon1(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:470) - PoseidonStateStruct x8 = exec_PoseidonInvalid(ctx, LAYOUT_LOOKUP(layout2, stateRedef.arm2)); - x3 = x8; - } else if (to_size_t(arg1.minorOnehot._super[3]._super)) { - // Poseidon1(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:471) - PoseidonStateStruct x9 = exec_PoseidonInvalid(ctx, LAYOUT_LOOKUP(layout2, stateRedef.arm3)); - x3 = x9; - } else if (to_size_t(arg1.minorOnehot._super[4]._super)) { - // Poseidon1(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:472) - PoseidonStateStruct x10 = exec_PoseidonInvalid(ctx, LAYOUT_LOOKUP(layout2, stateRedef.arm4)); - x3 = x10; - } else if (to_size_t(arg1.minorOnehot._super[5]._super)) { - // Poseidon1(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:473) - PoseidonStateStruct x11 = exec_PoseidonInvalid(ctx, LAYOUT_LOOKUP(layout2, stateRedef.arm5)); - x3 = x11; - } else if (to_size_t(arg1.minorOnehot._super[6]._super)) { - // Poseidon1(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:474) - PoseidonStateStruct x12 = exec_PoseidonInvalid(ctx, LAYOUT_LOOKUP(layout2, stateRedef.arm6)); - x3 = x12; - } else if (to_size_t(arg1.minorOnehot._super[7]._super)) { - // Poseidon1(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:475) - PoseidonStateStruct x13 = exec_PoseidonInvalid(ctx, LAYOUT_LOOKUP(layout2, stateRedef.arm7)); - x3 = x13; - } else { - assert(0 && "Reached unreachable mux arm"); - } - // GetDiffCount(zirgen/circuit/rv32im/v2/dsl/mem.zir:22) - // Poseidon1(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:477) - Val x14 = INVOKE_EXTERN(ctx, getDiffCount, arg0._super._super); - CycleArgStruct x15 = - exec_CycleArg(ctx, neg_0(x14), arg0._super._super, LAYOUT_LOOKUP(layout2, arg)); - // Poseidon1(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:479) - Val x16 = (x15.cycle._super - arg0._super._super); - EQZ(x16, "Poseidon1(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:479)"); - // Poseidon1(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:467) - PoseidonStateStruct x17 = back_PoseidonState(ctx, 0, LAYOUT_LOOKUP(layout2, stateRedef._super)); - // InstOutput(zirgen/circuit/rv32im/v2/dsl/inst.zir:46) - // Poseidon1(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:480) - InstOutputStruct x18 = InstOutputStruct{.newPc = arg1.pcU32, - .newState = x17.nextState._super._super, - .newMode = x17.mode._super._super}; - return x18; -} -__device__ OneHot_11_Struct exec_OneHot_11_(ExecContext& ctx, - Val arg0, - BoundLayout layout1) { - // OneHot(zirgen/circuit/rv32im/v2/dsl/one_hot.zir:7) - NondetRegStruct11Array x2 = map( - Val11Array{ - Val(0), Val(1), Val(2), Val(3), Val(4), Val(5), Val(6), Val(7), Val(8), Val(9), Val(10)}, - LAYOUT_LOOKUP(layout1, _super), - ([&](Val11Array::value_type x3, BoundLayout x4) { - NondetRegStruct x5 = exec_NondetBitReg(ctx, isz((x3 - arg0)), x4); - return x5; - })); - // OneHot(zirgen/circuit/rv32im/v2/dsl/one_hot.zir:9) - Val x6 = (x2[0]._super + x2[1]._super); - Val x7 = ((x6 + x2[2]._super) + x2[3]._super); - Val x8 = ((x7 + x2[4]._super) + x2[5]._super); - Val x9 = ((x8 + x2[6]._super) + x2[7]._super); - Val x10 = ((x9 + x2[8]._super) + x2[9]._super); - EQZ(((x10 + x2[10]._super) - Val(1)), "OneHot(zirgen/circuit/rv32im/v2/dsl/one_hot.zir:9)"); - // OneHot(zirgen/circuit/rv32im/v2/dsl/one_hot.zir:11) - Val x11 = (x2[2]._super * Val(2)); - Val x12 = (x2[3]._super * Val(3)); - Val x13 = (x2[4]._super * Val(4)); - Val x14 = (x2[5]._super * Val(5)); - Val x15 = (x2[6]._super * Val(6)); - Val x16 = (x2[7]._super * Val(7)); - Val x17 = (x2[8]._super * Val(8)); - Val x18 = (x2[9]._super * Val(9)); - Val x19 = (x2[10]._super * Val(10)); - Val x20 = (x2[1]._super + x11); - Val x21 = (((x20 + x12) + x13) + x14); - Val x22 = (((x21 + x15) + x16) + x17); - Val x23 = (((x22 + x18) + x19) - arg0); - EQZ(x23, "OneHot(zirgen/circuit/rv32im/v2/dsl/one_hot.zir:11)"); - return OneHot_11_Struct{._super = x2}; -} -__device__ TopStruct exec_Top(ExecContext& ctx, BoundLayout layout0, GlobalBuf global1) { - // IsFirstCycle(zirgen/circuit/rv32im/v2/dsl/top.zir:17) - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:47) - Val x2 = INVOKE_EXTERN(ctx, isFirstCycle_0); - NondetRegStruct x3 = exec_NondetReg(ctx, x2, LAYOUT_LOOKUP(layout0, isFirstCycle)); - // GetCycle(zirgen/circuit/rv32im/v2/dsl/top.zir:18) - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:48) - Val x4 = INVOKE_EXTERN(ctx, getCycle); - NondetRegStruct x5 = exec_NondetReg(ctx, x4, LAYOUT_LOOKUP(layout0, cycleND)); - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:49) - RegStruct x6 = exec_Reg(ctx, x5._super, LAYOUT_LOOKUP(layout0, cycle)); - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:52) - Val x7 = (Val(1) - x3._super); - RegStruct x8 = back_Reg(ctx, 1, LAYOUT_LOOKUP(layout0, nextPcLow)); - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:53) - RegStruct x9 = back_Reg(ctx, 1, LAYOUT_LOOKUP(layout0, nextPcHigh)); - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:56) - RegStruct x10 = back_Reg(ctx, 1, LAYOUT_LOOKUP(layout0, nextState_0)); - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:58) - RegStruct x11 = back_Reg(ctx, 1, LAYOUT_LOOKUP(layout0, nextMachineMode)); - // GetMajorMinor(zirgen/circuit/rv32im/v2/dsl/top.zir:25) - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:60) - auto [x12, x13] = INVOKE_EXTERN(ctx, getMajorMinor); - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:62) - NondetRegStruct x14 = exec_NondetReg(ctx, x12, LAYOUT_LOOKUP(layout0, major)); - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:63) - NondetRegStruct x15 = exec_NondetReg(ctx, x13, LAYOUT_LOOKUP(layout0, minor)); - // Log(:22) - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:64) - INVOKE_EXTERN(ctx, log, "Major/Minor = ", std::initializer_list{x14._super, x15._super}); - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:66) - InstInputStruct x16 = - exec_InstInput(ctx, - x6._super._super, - x14._super, - x15._super, - ValU32Struct{.low = (x7 * x8._super._super), .high = (x7 * x9._super._super)}, - (x7 * x10._super._super), - ((x7 * x11._super._super) + x3._super), - LAYOUT_LOOKUP(layout0, instInput)); - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:68) - OneHot_11_Struct x17 = exec_OneHot_11_(ctx, x14._super, LAYOUT_LOOKUP(layout0, majorOnehot)); - InstOutputStruct x18; - if (to_size_t(x17._super[0]._super)) { - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:70) - InstOutputStruct x19 = exec_Misc0(ctx, x6, x16, LAYOUT_LOOKUP(layout0, instResult.arm0)); - x18 = x19; - } else if (to_size_t(x17._super[1]._super)) { - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:71) - InstOutputStruct x20 = exec_Misc1(ctx, x6, x16, LAYOUT_LOOKUP(layout0, instResult.arm1)); - x18 = x20; - } else if (to_size_t(x17._super[2]._super)) { - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:72) - InstOutputStruct x21 = exec_Misc2(ctx, x6, x16, LAYOUT_LOOKUP(layout0, instResult.arm2)); - x18 = x21; - } else if (to_size_t(x17._super[3]._super)) { - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:73) - InstOutputStruct x22 = exec_Mul0(ctx, x6, x16, LAYOUT_LOOKUP(layout0, instResult.arm3)); - x18 = x22; - } else if (to_size_t(x17._super[4]._super)) { - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:74) - InstOutputStruct x23 = exec_Div0(ctx, x6, x16, LAYOUT_LOOKUP(layout0, instResult.arm4)); - x18 = x23; - } else if (to_size_t(x17._super[5]._super)) { - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:75) - InstOutputStruct x24 = exec_Mem0(ctx, x6, x16, LAYOUT_LOOKUP(layout0, instResult.arm5)); - x18 = x24; - } else if (to_size_t(x17._super[6]._super)) { - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:76) - InstOutputStruct x25 = exec_Mem1(ctx, x6, x16, LAYOUT_LOOKUP(layout0, instResult.arm6)); - x18 = x25; - } else if (to_size_t(x17._super[7]._super)) { - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:77) - InstOutputStruct x26 = - exec_Control0(ctx, x6, x16, LAYOUT_LOOKUP(layout0, instResult.arm7), global1); - x18 = x26; - } else if (to_size_t(x17._super[8]._super)) { - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:78) - InstOutputStruct x27 = - exec_ECall0(ctx, x6, x16, LAYOUT_LOOKUP(layout0, instResult.arm8), global1); - x18 = x27; - } else if (to_size_t(x17._super[9]._super)) { - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:79) - InstOutputStruct x28 = - exec_Poseidon0(ctx, x6, x16, LAYOUT_LOOKUP(layout0, instResult.arm9), global1); - x18 = x28; - } else if (to_size_t(x17._super[10]._super)) { - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:80) - InstOutputStruct x29 = exec_Poseidon1(ctx, x6, x16, LAYOUT_LOOKUP(layout0, instResult.arm10)); - x18 = x29; - } else { - assert(0 && "Reached unreachable mux arm"); - } - // Div(:19) - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:83) - Val x30 = (x18.newPc.low * Val(1509949441)); - Val x31 = (x18.newPc.high * Val(16384)); - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:84) - std::initializer_list x32 = - std::initializer_list{x6._super._super, (x30 + x31), x18.newState, x18.newMode}; - // Log(:22) - INVOKE_EXTERN(ctx, log, "Cycle, pc, state, mm", x32); - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:85) - RegStruct x33 = exec_Reg(ctx, x18.newPc.low, LAYOUT_LOOKUP(layout0, nextPcLow)); - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:86) - RegStruct x34 = exec_Reg(ctx, x18.newPc.high, LAYOUT_LOOKUP(layout0, nextPcHigh)); - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:87) - RegStruct x35 = exec_Reg(ctx, x18.newState, LAYOUT_LOOKUP(layout0, nextState_0)); - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:88) - RegStruct x36 = exec_Reg(ctx, x18.newMode, LAYOUT_LOOKUP(layout0, nextMachineMode)); - return TopStruct{}; -} -__device__ void step_Top(ExecContext& ctx, MutableBuf data0, GlobalBuf global1) { - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:27) - BoundLayout x2 = BIND_LAYOUT(kLayout_Top, data0); - TopStruct x3 = exec_Top(ctx, x2, global1); - return; -} -__device__ ComponentStruct exec_TopAccum(ExecContext& ctx, - BoundLayout arg0, - BoundLayout layout1, - GlobalBuf mix2) { - // zirgen/dsl/passes/GenerateAccum.cpp:526 - BoundLayout<_mixLayout> x3 = BIND_LAYOUT(kLayoutMix, mix2); - // zirgen/dsl/passes/GenerateAccum.cpp:624 - ComponentStruct x4 = ComponentStruct{}; - ComponentStruct x5; - if (to_size_t(LOAD( - LAYOUT_LOOKUP(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(arg0, instResult._selector), 0), _super), - 0))) { - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x6 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0._super.writeData.low16.arg.val._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x7 = (x6 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x8 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0._super.writeData.low16.arg.count._super), 0) * - inv_0(x7)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x9 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 18), 1) + x8); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x10 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0._super.writeData.high16.arg.val._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x11 = (x10 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x12 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0._super.writeData.high16.arg.count._super), 0) * - inv_0(x11)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x13 = (x7 * x11); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x14 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0._super.writeData.low16.arg.count._super), 0) * - x11); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x15 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0._super.pcNorm.low16.arg.val._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x16 = (x15 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x17 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0._super.pcNorm.low16.arg.count._super), 0) * - inv_0(x16)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x18 = ((x9 + x12) + x17); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 0), x18); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x19 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 0), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 18), 1)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x20 = - (((x19 * (x13 * x16)) - (x14 * x16)) - - ((x7 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0._super.writeData.high16.arg.count._super), 0)) * - x16)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x20 - - (x13 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0._super.pcNorm.low16.arg.count._super), 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x21 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0._super.pcNorm.high16.arg.val._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x22 = (x21 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x23 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0._super.pcNorm.high16.arg.count._super), 0) * - inv_0(x22)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x24 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0._super._0._0.io.oldTxn.addr._super), 0)); - ExtVal x25 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0._super._0._0.io.oldTxn.cycle._super), 0)); - ExtVal x26 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0._super._0._0.io.oldTxn.dataLow._super), 0)); - ExtVal x27 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0._super._0._0.io.oldTxn.dataHigh._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x28 = (((x24 + x25) + x26) + x27); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x29 = (x28 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x30 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0._super._0._0.io.oldTxn.count._super), 0) * - inv_0(x29)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x31 = (x22 * x29); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x32 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0._super.pcNorm.high16.arg.count._super), 0) * x29); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x33 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0._super._0._0.io.newTxn.addr._super), 0)); - ExtVal x34 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0._super._0._0.io.newTxn.cycle._super), 0)); - ExtVal x35 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0._super._0._0.io.newTxn.dataLow._super), 0)); - ExtVal x36 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0._super._0._0.io.newTxn.dataHigh._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x37 = (((x33 + x34) + x35) + x36); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x38 = (x37 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x39 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0._super._0._0.io.newTxn.count._super), 0) * - inv_0(x38)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x40 = (((x18 + x23) + x30) + x39); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 1), x40); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x41 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 1), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 0), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x42 = - (((x41 * (x31 * x38)) - (x32 * x38)) - - ((x22 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0._super._0._0.io.oldTxn.count._super), 0)) * - x38)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x42 - - (x31 * LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0._super._0._0.io.newTxn.count._super), 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x43 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0._super._0._0._0._0.arg.cycle._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x44 = (x43 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x45 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0._super._0._0._0._0.arg.count._super), 0) * - inv_0(x44)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x46 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.decoded.arg.cycle._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x47 = (x46 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x48 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.decoded.arg.count._super), 0) * inv_0(x47)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x49 = (x44 * x47); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x50 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0._super._0._0._0._0.arg.count._super), 0) * x47); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x51 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - arg0, instResult.arm0.input.decoded.pcAddr.upperDiff.ret.arg.val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x52 = (x51 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x53 = - (LOAD(LAYOUT_LOOKUP(arg0, - instResult.arm0.input.decoded.pcAddr.upperDiff.ret.arg.count._super), - 0) * - inv_0(x52)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x54 = (((x40 + x45) + x48) + x53); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 2), x54); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x55 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 2), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 1), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x56 = - (((x55 * (x49 * x52)) - (x50 * x52)) - - ((x44 * LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.decoded.arg.count._super), 0)) * - x52)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x56 - - (x49 * LOAD(LAYOUT_LOOKUP( - arg0, instResult.arm0.input.decoded.pcAddr.upperDiff.ret.arg.count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x57 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.decoded.pcAddr.med14.arg.val._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x58 = (x57 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x59 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.decoded.pcAddr.med14.arg.count._super), 0) * - inv_0(x58)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x60 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.decoded.loadInst.io.oldTxn.addr._super), - 0)); - ExtVal x61 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.decoded.loadInst.io.oldTxn.cycle._super), - 0)); - ExtVal x62 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.decoded.loadInst.io.oldTxn.dataLow._super), - 0)); - ExtVal x63 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.decoded.loadInst.io.oldTxn.dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x64 = (((x60 + x61) + x62) + x63); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x65 = (x64 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x66 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.decoded.loadInst.io.oldTxn.count._super), - 0) * - inv_0(x65)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x67 = (x58 * x65); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x68 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.decoded.pcAddr.med14.arg.count._super), 0) * - x65); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x69 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.decoded.loadInst.io.newTxn.addr._super), - 0)); - ExtVal x70 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.decoded.loadInst.io.newTxn.cycle._super), - 0)); - ExtVal x71 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.decoded.loadInst.io.newTxn.dataLow._super), - 0)); - ExtVal x72 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.decoded.loadInst.io.newTxn.dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x73 = (((x69 + x70) + x71) + x72); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x74 = (x73 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x75 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.decoded.loadInst.io.newTxn.count._super), - 0) * - inv_0(x74)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x76 = (((x54 + x59) + x66) + x75); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 3), x76); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x77 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 3), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 2), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x78 = - (((x77 * (x67 * x74)) - (x68 * x74)) - - ((x58 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.decoded.loadInst.io.oldTxn.count._super), - 0)) * - x74)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x78 - (x67 * LOAD(LAYOUT_LOOKUP( - arg0, instResult.arm0.input.decoded.loadInst.io.newTxn.count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x79 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.decoded.loadInst._0._0.arg.cycle._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x80 = (x79 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x81 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.decoded.loadInst._0._0.arg.count._super), - 0) * - inv_0(x80)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x82 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.rs1._super.io.oldTxn.addr._super), 0)); - ExtVal x83 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.rs1._super.io.oldTxn.cycle._super), 0)); - ExtVal x84 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.rs1._super.io.oldTxn.dataLow._super), 0)); - ExtVal x85 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.rs1._super.io.oldTxn.dataHigh._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x86 = (((x82 + x83) + x84) + x85); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x87 = (x86 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x88 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.rs1._super.io.oldTxn.count._super), 0) * - inv_0(x87)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x89 = (x80 * x87); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x90 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.decoded.loadInst._0._0.arg.count._super), - 0) * - x87); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x91 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.rs1._super.io.newTxn.addr._super), 0)); - ExtVal x92 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.rs1._super.io.newTxn.cycle._super), 0)); - ExtVal x93 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.rs1._super.io.newTxn.dataLow._super), 0)); - ExtVal x94 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.rs1._super.io.newTxn.dataHigh._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x95 = (((x91 + x92) + x93) + x94); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x96 = (x95 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x97 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.rs1._super.io.newTxn.count._super), 0) * - inv_0(x96)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x98 = (((x76 + x81) + x88) + x97); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 4), x98); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x99 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 4), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 3), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x100 = - (((x99 * (x89 * x96)) - (x90 * x96)) - - ((x80 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.rs1._super.io.oldTxn.count._super), 0)) * - x96)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x100 - - (x89 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.rs1._super.io.newTxn.count._super), 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x101 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.rs1._super._0._0.arg.cycle._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x102 = (x101 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x103 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.rs1._super._0._0.arg.count._super), 0) * - inv_0(x102)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x104 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.rs2._super.io.oldTxn.addr._super), 0)); - ExtVal x105 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.rs2._super.io.oldTxn.cycle._super), 0)); - ExtVal x106 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.rs2._super.io.oldTxn.dataLow._super), 0)); - ExtVal x107 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.rs2._super.io.oldTxn.dataHigh._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x108 = (((x104 + x105) + x106) + x107); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x109 = (x108 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x110 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.rs2._super.io.oldTxn.count._super), 0) * - inv_0(x109)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x111 = (x102 * x109); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x112 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.rs1._super._0._0.arg.count._super), 0) * - x109); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x113 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.rs2._super.io.newTxn.addr._super), 0)); - ExtVal x114 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.rs2._super.io.newTxn.cycle._super), 0)); - ExtVal x115 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.rs2._super.io.newTxn.dataLow._super), 0)); - ExtVal x116 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.rs2._super.io.newTxn.dataHigh._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x117 = (((x113 + x114) + x115) + x116); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x118 = (x117 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x119 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.rs2._super.io.newTxn.count._super), 0) * - inv_0(x118)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x120 = (((x98 + x103) + x110) + x119); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 5), x120); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x121 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 5), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 4), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x122 = - (((x121 * (x111 * x118)) - (x112 * x118)) - - ((x102 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.rs2._super.io.oldTxn.count._super), 0)) * - x118)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x122 - - (x111 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.rs2._super.io.newTxn.count._super), 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x123 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.rs2._super._0._0.arg.cycle._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x124 = (x123 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x125 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.rs2._super._0._0.arg.count._super), 0) * - inv_0(x124)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x126 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm0._arguments_Misc0MiscOutput.argU16), 0), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x127 = (x126 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x128 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm0._arguments_Misc0MiscOutput.argU16), 0), - count._super), - 0) * - inv_0(x127)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x129 = (x124 * x127); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x130 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.rs2._super._0._0.arg.count._super), 0) * - x127); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x131 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm0._arguments_Misc0MiscOutput.argU16), 1), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x132 = (x131 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x133 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm0._arguments_Misc0MiscOutput.argU16), 1), - count._super), - 0) * - inv_0(x132)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x134 = (((x120 + x125) + x128) + x133); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 6), x134); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x135 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 6), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 5), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x136 = - (((x135 * (x129 * x132)) - (x130 * x132)) - - ((x124 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm0._arguments_Misc0MiscOutput.argU16), 0), - count._super), - 0)) * - x132)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x136 - - (x129 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm0._arguments_Misc0MiscOutput.argU16), 1), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x137 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm0._arguments_Misc0MiscOutput.argU16), 2), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x138 = (x137 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x139 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm0._arguments_Misc0MiscOutput.argU16), 2), - count._super), - 0) * - inv_0(x138)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x140 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm0._arguments_Misc0MiscOutput.argU16), 3), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x141 = (x140 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x142 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm0._arguments_Misc0MiscOutput.argU16), 3), - count._super), - 0) * - inv_0(x141)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x143 = (x138 * x141); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x144 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm0._arguments_Misc0MiscOutput.argU16), 2), - count._super), - 0) * - x141); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x145 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm0._arguments_Misc0MiscOutput.argU16), 4), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x146 = (x145 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x147 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm0._arguments_Misc0MiscOutput.argU16), 4), - count._super), - 0) * - inv_0(x146)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x148 = (((x134 + x139) + x142) + x147); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 7), x148); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x149 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 7), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 6), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x150 = - (((x149 * (x143 * x146)) - (x144 * x146)) - - ((x138 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm0._arguments_Misc0MiscOutput.argU16), 3), - count._super), - 0)) * - x146)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x150 - - (x143 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm0._arguments_Misc0MiscOutput.argU16), 4), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:122 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 18), x148); - // zirgen/dsl/passes/GenerateAccum.cpp:124 - ExtVal x151 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 18), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 7), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:125 - EQZ(x151, "zirgen/dsl/passes/GenerateAccum.cpp:125"); - x5 = x4; - } else if (to_size_t( - LOAD(LAYOUT_LOOKUP(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(arg0, instResult._selector), 1), - _super), - 0))) { - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x152 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1._super.writeData.low16.arg.val._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x153 = (x152 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x154 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1._super.writeData.low16.arg.count._super), 0) * - inv_0(x153)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x155 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 18), 1) + x154); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x156 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1._super.writeData.high16.arg.val._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x157 = (x156 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x158 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1._super.writeData.high16.arg.count._super), 0) * - inv_0(x157)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x159 = (x153 * x157); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x160 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1._super.writeData.low16.arg.count._super), 0) * - x157); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x161 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1._super.pcNorm.low16.arg.val._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x162 = (x161 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x163 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1._super.pcNorm.low16.arg.count._super), 0) * - inv_0(x162)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x164 = ((x155 + x158) + x163); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 0), x164); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x165 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 0), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 18), 1)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x166 = - (((x165 * (x159 * x162)) - (x160 * x162)) - - ((x153 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1._super.writeData.high16.arg.count._super), 0)) * - x162)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x166 - - (x159 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1._super.pcNorm.low16.arg.count._super), 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x167 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1._super.pcNorm.high16.arg.val._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x168 = (x167 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x169 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1._super.pcNorm.high16.arg.count._super), 0) * - inv_0(x168)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x170 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1._super._0._0.io.oldTxn.addr._super), 0)); - ExtVal x171 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1._super._0._0.io.oldTxn.cycle._super), 0)); - ExtVal x172 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1._super._0._0.io.oldTxn.dataLow._super), 0)); - ExtVal x173 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1._super._0._0.io.oldTxn.dataHigh._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x174 = (((x170 + x171) + x172) + x173); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x175 = (x174 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x176 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1._super._0._0.io.oldTxn.count._super), 0) * - inv_0(x175)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x177 = (x168 * x175); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x178 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1._super.pcNorm.high16.arg.count._super), 0) * - x175); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x179 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1._super._0._0.io.newTxn.addr._super), 0)); - ExtVal x180 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1._super._0._0.io.newTxn.cycle._super), 0)); - ExtVal x181 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1._super._0._0.io.newTxn.dataLow._super), 0)); - ExtVal x182 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1._super._0._0.io.newTxn.dataHigh._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x183 = (((x179 + x180) + x181) + x182); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x184 = (x183 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x185 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1._super._0._0.io.newTxn.count._super), 0) * - inv_0(x184)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x186 = (((x164 + x169) + x176) + x185); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 1), x186); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x187 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 1), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 0), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x188 = - (((x187 * (x177 * x184)) - (x178 * x184)) - - ((x168 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1._super._0._0.io.oldTxn.count._super), 0)) * - x184)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x188 - - (x177 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1._super._0._0.io.newTxn.count._super), 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x189 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1._super._0._0._0._0.arg.cycle._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x190 = (x189 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x191 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1._super._0._0._0._0.arg.count._super), 0) * - inv_0(x190)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x192 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.decoded.arg.cycle._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x193 = (x192 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x194 = (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.decoded.arg.count._super), 0) * - inv_0(x193)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x195 = (x190 * x193); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x196 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1._super._0._0._0._0.arg.count._super), 0) * x193); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x197 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD( - LAYOUT_LOOKUP(arg0, instResult.arm1.input.decoded.pcAddr.upperDiff.ret.arg.val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x198 = (x197 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x199 = - (LOAD(LAYOUT_LOOKUP(arg0, - instResult.arm1.input.decoded.pcAddr.upperDiff.ret.arg.count._super), - 0) * - inv_0(x198)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x200 = (((x186 + x191) + x194) + x199); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 2), x200); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x201 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 2), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 1), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x202 = - (((x201 * (x195 * x198)) - (x196 * x198)) - - ((x190 * LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.decoded.arg.count._super), 0)) * - x198)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x202 - - (x195 * - LOAD(LAYOUT_LOOKUP(arg0, - instResult.arm1.input.decoded.pcAddr.upperDiff.ret.arg.count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x203 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.decoded.pcAddr.med14.arg.val._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x204 = (x203 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x205 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.decoded.pcAddr.med14.arg.count._super), 0) * - inv_0(x204)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x206 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.decoded.loadInst.io.oldTxn.addr._super), - 0)); - ExtVal x207 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.decoded.loadInst.io.oldTxn.cycle._super), - 0)); - ExtVal x208 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.decoded.loadInst.io.oldTxn.dataLow._super), - 0)); - ExtVal x209 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.decoded.loadInst.io.oldTxn.dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x210 = (((x206 + x207) + x208) + x209); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x211 = (x210 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x212 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.decoded.loadInst.io.oldTxn.count._super), - 0) * - inv_0(x211)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x213 = (x204 * x211); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x214 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.decoded.pcAddr.med14.arg.count._super), 0) * - x211); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x215 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.decoded.loadInst.io.newTxn.addr._super), - 0)); - ExtVal x216 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.decoded.loadInst.io.newTxn.cycle._super), - 0)); - ExtVal x217 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.decoded.loadInst.io.newTxn.dataLow._super), - 0)); - ExtVal x218 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.decoded.loadInst.io.newTxn.dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x219 = (((x215 + x216) + x217) + x218); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x220 = (x219 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x221 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.decoded.loadInst.io.newTxn.count._super), - 0) * - inv_0(x220)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x222 = (((x200 + x205) + x212) + x221); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 3), x222); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x223 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 3), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 2), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x224 = - (((x223 * (x213 * x220)) - (x214 * x220)) - - ((x204 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.decoded.loadInst.io.oldTxn.count._super), - 0)) * - x220)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x224 - - (x213 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.decoded.loadInst.io.newTxn.count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x225 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.decoded.loadInst._0._0.arg.cycle._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x226 = (x225 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x227 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.decoded.loadInst._0._0.arg.count._super), - 0) * - inv_0(x226)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x228 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.rs1._super.io.oldTxn.addr._super), 0)); - ExtVal x229 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.rs1._super.io.oldTxn.cycle._super), 0)); - ExtVal x230 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.rs1._super.io.oldTxn.dataLow._super), 0)); - ExtVal x231 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.rs1._super.io.oldTxn.dataHigh._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x232 = (((x228 + x229) + x230) + x231); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x233 = (x232 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x234 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.rs1._super.io.oldTxn.count._super), 0) * - inv_0(x233)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x235 = (x226 * x233); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x236 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.decoded.loadInst._0._0.arg.count._super), - 0) * - x233); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x237 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.rs1._super.io.newTxn.addr._super), 0)); - ExtVal x238 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.rs1._super.io.newTxn.cycle._super), 0)); - ExtVal x239 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.rs1._super.io.newTxn.dataLow._super), 0)); - ExtVal x240 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.rs1._super.io.newTxn.dataHigh._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x241 = (((x237 + x238) + x239) + x240); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x242 = (x241 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x243 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.rs1._super.io.newTxn.count._super), 0) * - inv_0(x242)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x244 = (((x222 + x227) + x234) + x243); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 4), x244); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x245 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 4), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 3), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x246 = - (((x245 * (x235 * x242)) - (x236 * x242)) - - ((x226 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.rs1._super.io.oldTxn.count._super), 0)) * - x242)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x246 - - (x235 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.rs1._super.io.newTxn.count._super), 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x247 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.rs1._super._0._0.arg.cycle._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x248 = (x247 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x249 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.rs1._super._0._0.arg.count._super), 0) * - inv_0(x248)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x250 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.rs2._super.io.oldTxn.addr._super), 0)); - ExtVal x251 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.rs2._super.io.oldTxn.cycle._super), 0)); - ExtVal x252 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.rs2._super.io.oldTxn.dataLow._super), 0)); - ExtVal x253 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.rs2._super.io.oldTxn.dataHigh._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x254 = (((x250 + x251) + x252) + x253); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x255 = (x254 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x256 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.rs2._super.io.oldTxn.count._super), 0) * - inv_0(x255)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x257 = (x248 * x255); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x258 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.rs1._super._0._0.arg.count._super), 0) * - x255); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x259 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.rs2._super.io.newTxn.addr._super), 0)); - ExtVal x260 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.rs2._super.io.newTxn.cycle._super), 0)); - ExtVal x261 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.rs2._super.io.newTxn.dataLow._super), 0)); - ExtVal x262 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.rs2._super.io.newTxn.dataHigh._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x263 = (((x259 + x260) + x261) + x262); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x264 = (x263 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x265 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.rs2._super.io.newTxn.count._super), 0) * - inv_0(x264)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x266 = (((x244 + x249) + x256) + x265); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 5), x266); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x267 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 5), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 4), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x268 = - (((x267 * (x257 * x264)) - (x258 * x264)) - - ((x248 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.rs2._super.io.oldTxn.count._super), 0)) * - x264)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x268 - - (x257 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.rs2._super.io.newTxn.count._super), 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x269 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.rs2._super._0._0.arg.cycle._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x270 = (x269 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x271 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.rs2._super._0._0.arg.count._super), 0) * - inv_0(x270)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x272 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm1._arguments_Misc1MiscOutput.argU16), 0), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x273 = (x272 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x274 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm1._arguments_Misc1MiscOutput.argU16), 0), - count._super), - 0) * - inv_0(x273)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x275 = (x270 * x273); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x276 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.rs2._super._0._0.arg.count._super), 0) * - x273); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x277 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm1._arguments_Misc1MiscOutput.argU16), 1), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x278 = (x277 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x279 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm1._arguments_Misc1MiscOutput.argU16), 1), - count._super), - 0) * - inv_0(x278)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x280 = (((x266 + x271) + x274) + x279); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 6), x280); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x281 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 6), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 5), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x282 = - (((x281 * (x275 * x278)) - (x276 * x278)) - - ((x270 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm1._arguments_Misc1MiscOutput.argU16), 0), - count._super), - 0)) * - x278)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x282 - - (x275 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm1._arguments_Misc1MiscOutput.argU16), 1), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x283 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm1._arguments_Misc1MiscOutput.argU16), 2), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x284 = (x283 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x285 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm1._arguments_Misc1MiscOutput.argU16), 2), - count._super), - 0) * - inv_0(x284)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x286 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm1._arguments_Misc1MiscOutput.argU16), 3), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x287 = (x286 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x288 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm1._arguments_Misc1MiscOutput.argU16), 3), - count._super), - 0) * - inv_0(x287)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x289 = (x284 * x287); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x290 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm1._arguments_Misc1MiscOutput.argU16), 2), - count._super), - 0) * - x287); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x291 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm1._arguments_Misc1MiscOutput.argU16), 4), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x292 = (x291 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x293 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm1._arguments_Misc1MiscOutput.argU16), 4), - count._super), - 0) * - inv_0(x292)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x294 = (((x280 + x285) + x288) + x293); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 7), x294); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x295 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 7), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 6), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x296 = - (((x295 * (x289 * x292)) - (x290 * x292)) - - ((x284 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm1._arguments_Misc1MiscOutput.argU16), 3), - count._super), - 0)) * - x292)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x296 - - (x289 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm1._arguments_Misc1MiscOutput.argU16), 4), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:122 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 18), x294); - // zirgen/dsl/passes/GenerateAccum.cpp:124 - ExtVal x297 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 18), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 7), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:125 - EQZ(x297, "zirgen/dsl/passes/GenerateAccum.cpp:125"); - x5 = x4; - } else if (to_size_t( - LOAD(LAYOUT_LOOKUP(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(arg0, instResult._selector), 2), - _super), - 0))) { - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x298 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2._super.writeData.low16.arg.val._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x299 = (x298 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x300 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2._super.writeData.low16.arg.count._super), 0) * - inv_0(x299)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x301 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 18), 1) + x300); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x302 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2._super.writeData.high16.arg.val._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x303 = (x302 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x304 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2._super.writeData.high16.arg.count._super), 0) * - inv_0(x303)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x305 = (x299 * x303); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x306 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2._super.writeData.low16.arg.count._super), 0) * - x303); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x307 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2._super.pcNorm.low16.arg.val._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x308 = (x307 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x309 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2._super.pcNorm.low16.arg.count._super), 0) * - inv_0(x308)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x310 = ((x301 + x304) + x309); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 0), x310); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x311 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 0), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 18), 1)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x312 = - (((x311 * (x305 * x308)) - (x306 * x308)) - - ((x299 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2._super.writeData.high16.arg.count._super), 0)) * - x308)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x312 - - (x305 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2._super.pcNorm.low16.arg.count._super), 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x313 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2._super.pcNorm.high16.arg.val._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x314 = (x313 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x315 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2._super.pcNorm.high16.arg.count._super), 0) * - inv_0(x314)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x316 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2._super._0._0.io.oldTxn.addr._super), 0)); - ExtVal x317 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2._super._0._0.io.oldTxn.cycle._super), 0)); - ExtVal x318 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2._super._0._0.io.oldTxn.dataLow._super), 0)); - ExtVal x319 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2._super._0._0.io.oldTxn.dataHigh._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x320 = (((x316 + x317) + x318) + x319); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x321 = (x320 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x322 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2._super._0._0.io.oldTxn.count._super), 0) * - inv_0(x321)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x323 = (x314 * x321); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x324 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2._super.pcNorm.high16.arg.count._super), 0) * - x321); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x325 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2._super._0._0.io.newTxn.addr._super), 0)); - ExtVal x326 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2._super._0._0.io.newTxn.cycle._super), 0)); - ExtVal x327 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2._super._0._0.io.newTxn.dataLow._super), 0)); - ExtVal x328 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2._super._0._0.io.newTxn.dataHigh._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x329 = (((x325 + x326) + x327) + x328); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x330 = (x329 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x331 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2._super._0._0.io.newTxn.count._super), 0) * - inv_0(x330)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x332 = (((x310 + x315) + x322) + x331); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 1), x332); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x333 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 1), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 0), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x334 = - (((x333 * (x323 * x330)) - (x324 * x330)) - - ((x314 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2._super._0._0.io.oldTxn.count._super), 0)) * - x330)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x334 - - (x323 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2._super._0._0.io.newTxn.count._super), 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x335 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2._super._0._0._0._0.arg.cycle._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x336 = (x335 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x337 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2._super._0._0._0._0.arg.count._super), 0) * - inv_0(x336)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x338 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.decoded.arg.cycle._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x339 = (x338 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x340 = (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.decoded.arg.count._super), 0) * - inv_0(x339)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x341 = (x336 * x339); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x342 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2._super._0._0._0._0.arg.count._super), 0) * x339); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x343 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD( - LAYOUT_LOOKUP(arg0, instResult.arm2.input.decoded.pcAddr.upperDiff.ret.arg.val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x344 = (x343 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x345 = - (LOAD(LAYOUT_LOOKUP(arg0, - instResult.arm2.input.decoded.pcAddr.upperDiff.ret.arg.count._super), - 0) * - inv_0(x344)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x346 = (((x332 + x337) + x340) + x345); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 2), x346); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x347 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 2), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 1), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x348 = - (((x347 * (x341 * x344)) - (x342 * x344)) - - ((x336 * LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.decoded.arg.count._super), 0)) * - x344)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x348 - - (x341 * - LOAD(LAYOUT_LOOKUP(arg0, - instResult.arm2.input.decoded.pcAddr.upperDiff.ret.arg.count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x349 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.decoded.pcAddr.med14.arg.val._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x350 = (x349 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x351 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.decoded.pcAddr.med14.arg.count._super), 0) * - inv_0(x350)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x352 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.decoded.loadInst.io.oldTxn.addr._super), - 0)); - ExtVal x353 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.decoded.loadInst.io.oldTxn.cycle._super), - 0)); - ExtVal x354 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.decoded.loadInst.io.oldTxn.dataLow._super), - 0)); - ExtVal x355 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.decoded.loadInst.io.oldTxn.dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x356 = (((x352 + x353) + x354) + x355); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x357 = (x356 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x358 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.decoded.loadInst.io.oldTxn.count._super), - 0) * - inv_0(x357)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x359 = (x350 * x357); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x360 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.decoded.pcAddr.med14.arg.count._super), 0) * - x357); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x361 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.decoded.loadInst.io.newTxn.addr._super), - 0)); - ExtVal x362 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.decoded.loadInst.io.newTxn.cycle._super), - 0)); - ExtVal x363 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.decoded.loadInst.io.newTxn.dataLow._super), - 0)); - ExtVal x364 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.decoded.loadInst.io.newTxn.dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x365 = (((x361 + x362) + x363) + x364); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x366 = (x365 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x367 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.decoded.loadInst.io.newTxn.count._super), - 0) * - inv_0(x366)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x368 = (((x346 + x351) + x358) + x367); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 3), x368); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x369 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 3), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 2), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x370 = - (((x369 * (x359 * x366)) - (x360 * x366)) - - ((x350 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.decoded.loadInst.io.oldTxn.count._super), - 0)) * - x366)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x370 - - (x359 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.decoded.loadInst.io.newTxn.count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x371 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.decoded.loadInst._0._0.arg.cycle._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x372 = (x371 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x373 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.decoded.loadInst._0._0.arg.count._super), - 0) * - inv_0(x372)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x374 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.rs1._super.io.oldTxn.addr._super), 0)); - ExtVal x375 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.rs1._super.io.oldTxn.cycle._super), 0)); - ExtVal x376 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.rs1._super.io.oldTxn.dataLow._super), 0)); - ExtVal x377 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.rs1._super.io.oldTxn.dataHigh._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x378 = (((x374 + x375) + x376) + x377); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x379 = (x378 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x380 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.rs1._super.io.oldTxn.count._super), 0) * - inv_0(x379)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x381 = (x372 * x379); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x382 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.decoded.loadInst._0._0.arg.count._super), - 0) * - x379); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x383 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.rs1._super.io.newTxn.addr._super), 0)); - ExtVal x384 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.rs1._super.io.newTxn.cycle._super), 0)); - ExtVal x385 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.rs1._super.io.newTxn.dataLow._super), 0)); - ExtVal x386 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.rs1._super.io.newTxn.dataHigh._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x387 = (((x383 + x384) + x385) + x386); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x388 = (x387 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x389 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.rs1._super.io.newTxn.count._super), 0) * - inv_0(x388)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x390 = (((x368 + x373) + x380) + x389); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 4), x390); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x391 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 4), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 3), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x392 = - (((x391 * (x381 * x388)) - (x382 * x388)) - - ((x372 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.rs1._super.io.oldTxn.count._super), 0)) * - x388)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x392 - - (x381 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.rs1._super.io.newTxn.count._super), 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x393 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.rs1._super._0._0.arg.cycle._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x394 = (x393 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x395 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.rs1._super._0._0.arg.count._super), 0) * - inv_0(x394)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x396 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.rs2._super.io.oldTxn.addr._super), 0)); - ExtVal x397 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.rs2._super.io.oldTxn.cycle._super), 0)); - ExtVal x398 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.rs2._super.io.oldTxn.dataLow._super), 0)); - ExtVal x399 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.rs2._super.io.oldTxn.dataHigh._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x400 = (((x396 + x397) + x398) + x399); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x401 = (x400 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x402 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.rs2._super.io.oldTxn.count._super), 0) * - inv_0(x401)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x403 = (x394 * x401); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x404 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.rs1._super._0._0.arg.count._super), 0) * - x401); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x405 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.rs2._super.io.newTxn.addr._super), 0)); - ExtVal x406 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.rs2._super.io.newTxn.cycle._super), 0)); - ExtVal x407 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.rs2._super.io.newTxn.dataLow._super), 0)); - ExtVal x408 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.rs2._super.io.newTxn.dataHigh._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x409 = (((x405 + x406) + x407) + x408); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x410 = (x409 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x411 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.rs2._super.io.newTxn.count._super), 0) * - inv_0(x410)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x412 = (((x390 + x395) + x402) + x411); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 5), x412); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x413 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 5), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 4), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x414 = - (((x413 * (x403 * x410)) - (x404 * x410)) - - ((x394 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.rs2._super.io.oldTxn.count._super), 0)) * - x410)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x414 - - (x403 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.rs2._super.io.newTxn.count._super), 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x415 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.rs2._super._0._0.arg.cycle._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x416 = (x415 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x417 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.rs2._super._0._0.arg.count._super), 0) * - inv_0(x416)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x418 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm2._arguments_Misc2MiscOutput.argU16), 0), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x419 = (x418 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x420 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm2._arguments_Misc2MiscOutput.argU16), 0), - count._super), - 0) * - inv_0(x419)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x421 = (x416 * x419); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x422 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.rs2._super._0._0.arg.count._super), 0) * - x419); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x423 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm2._arguments_Misc2MiscOutput.argU16), 1), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x424 = (x423 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x425 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm2._arguments_Misc2MiscOutput.argU16), 1), - count._super), - 0) * - inv_0(x424)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x426 = (((x412 + x417) + x420) + x425); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 6), x426); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x427 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 6), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 5), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x428 = - (((x427 * (x421 * x424)) - (x422 * x424)) - - ((x416 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm2._arguments_Misc2MiscOutput.argU16), 0), - count._super), - 0)) * - x424)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x428 - - (x421 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm2._arguments_Misc2MiscOutput.argU16), 1), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x429 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm2._arguments_Misc2MiscOutput.argU16), 2), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x430 = (x429 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x431 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm2._arguments_Misc2MiscOutput.argU16), 2), - count._super), - 0) * - inv_0(x430)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x432 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm2._arguments_Misc2MiscOutput.argU16), 3), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x433 = (x432 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x434 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm2._arguments_Misc2MiscOutput.argU16), 3), - count._super), - 0) * - inv_0(x433)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x435 = (x430 * x433); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x436 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm2._arguments_Misc2MiscOutput.argU16), 2), - count._super), - 0) * - x433); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x437 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm2._arguments_Misc2MiscOutput.argU16), 4), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x438 = (x437 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x439 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm2._arguments_Misc2MiscOutput.argU16), 4), - count._super), - 0) * - inv_0(x438)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x440 = (((x426 + x431) + x434) + x439); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 7), x440); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x441 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 7), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 6), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x442 = - (((x441 * (x435 * x438)) - (x436 * x438)) - - ((x430 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm2._arguments_Misc2MiscOutput.argU16), 3), - count._super), - 0)) * - x438)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x442 - - (x435 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm2._arguments_Misc2MiscOutput.argU16), 4), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:122 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 18), x440); - // zirgen/dsl/passes/GenerateAccum.cpp:124 - ExtVal x443 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 18), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 7), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:125 - EQZ(x443, "zirgen/dsl/passes/GenerateAccum.cpp:125"); - x5 = x4; - } else if (to_size_t( - LOAD(LAYOUT_LOOKUP(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(arg0, instResult._selector), 3), - _super), - 0))) { - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x444 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.decoded.arg.cycle._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x445 = (x444 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x446 = (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.decoded.arg.count._super), 0) * - inv_0(x445)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x447 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 18), 1) + x446); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x448 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD( - LAYOUT_LOOKUP(arg0, instResult.arm3.input.decoded.pcAddr.upperDiff.ret.arg.val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x449 = (x448 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x450 = - (LOAD(LAYOUT_LOOKUP(arg0, - instResult.arm3.input.decoded.pcAddr.upperDiff.ret.arg.count._super), - 0) * - inv_0(x449)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x451 = (x445 * x449); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x452 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.decoded.arg.count._super), 0) * x449); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x453 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.decoded.pcAddr.med14.arg.val._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x454 = (x453 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x455 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.decoded.pcAddr.med14.arg.count._super), 0) * - inv_0(x454)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x456 = ((x447 + x450) + x455); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 0), x456); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x457 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 0), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 18), 1)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x458 = - (((x457 * (x451 * x454)) - (x452 * x454)) - - ((x445 * - LOAD(LAYOUT_LOOKUP(arg0, - instResult.arm3.input.decoded.pcAddr.upperDiff.ret.arg.count._super), - 0)) * - x454)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x458 - (x451 * LOAD(LAYOUT_LOOKUP( - arg0, instResult.arm3.input.decoded.pcAddr.med14.arg.count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x459 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.decoded.loadInst.io.oldTxn.addr._super), - 0)); - ExtVal x460 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.decoded.loadInst.io.oldTxn.cycle._super), - 0)); - ExtVal x461 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.decoded.loadInst.io.oldTxn.dataLow._super), - 0)); - ExtVal x462 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.decoded.loadInst.io.oldTxn.dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x463 = (((x459 + x460) + x461) + x462); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x464 = (x463 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x465 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.decoded.loadInst.io.oldTxn.count._super), - 0) * - inv_0(x464)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x466 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.decoded.loadInst.io.newTxn.addr._super), - 0)); - ExtVal x467 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.decoded.loadInst.io.newTxn.cycle._super), - 0)); - ExtVal x468 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.decoded.loadInst.io.newTxn.dataLow._super), - 0)); - ExtVal x469 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.decoded.loadInst.io.newTxn.dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x470 = (((x466 + x467) + x468) + x469); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x471 = (x470 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x472 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.decoded.loadInst.io.newTxn.count._super), - 0) * - inv_0(x471)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x473 = (x464 * x471); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x474 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.decoded.loadInst.io.oldTxn.count._super), - 0) * - x471); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x475 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.decoded.loadInst._0._0.arg.cycle._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x476 = (x475 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x477 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.decoded.loadInst._0._0.arg.count._super), - 0) * - inv_0(x476)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x478 = (((x456 + x465) + x472) + x477); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 1), x478); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x479 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 1), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 0), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x480 = - (((x479 * (x473 * x476)) - (x474 * x476)) - - ((x464 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.decoded.loadInst.io.newTxn.count._super), - 0)) * - x476)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x480 - - (x473 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.decoded.loadInst._0._0.arg.count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x481 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.rs1._super.io.oldTxn.addr._super), 0)); - ExtVal x482 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.rs1._super.io.oldTxn.cycle._super), 0)); - ExtVal x483 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.rs1._super.io.oldTxn.dataLow._super), 0)); - ExtVal x484 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.rs1._super.io.oldTxn.dataHigh._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x485 = (((x481 + x482) + x483) + x484); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x486 = (x485 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x487 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.rs1._super.io.oldTxn.count._super), 0) * - inv_0(x486)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x488 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.rs1._super.io.newTxn.addr._super), 0)); - ExtVal x489 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.rs1._super.io.newTxn.cycle._super), 0)); - ExtVal x490 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.rs1._super.io.newTxn.dataLow._super), 0)); - ExtVal x491 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.rs1._super.io.newTxn.dataHigh._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x492 = (((x488 + x489) + x490) + x491); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x493 = (x492 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x494 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.rs1._super.io.newTxn.count._super), 0) * - inv_0(x493)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x495 = (x486 * x493); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x496 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.rs1._super.io.oldTxn.count._super), 0) * - x493); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x497 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.rs1._super._0._0.arg.cycle._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x498 = (x497 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x499 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.rs1._super._0._0.arg.count._super), 0) * - inv_0(x498)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x500 = (((x478 + x487) + x494) + x499); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 2), x500); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x501 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 2), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 1), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x502 = - (((x501 * (x495 * x498)) - (x496 * x498)) - - ((x486 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.rs1._super.io.newTxn.count._super), 0)) * - x498)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x502 - - (x495 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.rs1._super._0._0.arg.count._super), 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x503 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.rs2._super.io.oldTxn.addr._super), 0)); - ExtVal x504 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.rs2._super.io.oldTxn.cycle._super), 0)); - ExtVal x505 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.rs2._super.io.oldTxn.dataLow._super), 0)); - ExtVal x506 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.rs2._super.io.oldTxn.dataHigh._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x507 = (((x503 + x504) + x505) + x506); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x508 = (x507 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x509 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.rs2._super.io.oldTxn.count._super), 0) * - inv_0(x508)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x510 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.rs2._super.io.newTxn.addr._super), 0)); - ExtVal x511 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.rs2._super.io.newTxn.cycle._super), 0)); - ExtVal x512 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.rs2._super.io.newTxn.dataLow._super), 0)); - ExtVal x513 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.rs2._super.io.newTxn.dataHigh._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x514 = (((x510 + x511) + x512) + x513); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x515 = (x514 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x516 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.rs2._super.io.newTxn.count._super), 0) * - inv_0(x515)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x517 = (x508 * x515); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x518 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.rs2._super.io.oldTxn.count._super), 0) * - x515); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x519 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.rs2._super._0._0.arg.cycle._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x520 = (x519 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x521 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.rs2._super._0._0.arg.count._super), 0) * - inv_0(x520)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x522 = (((x500 + x509) + x516) + x521); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 3), x522); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x523 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 3), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 2), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x524 = - (((x523 * (x517 * x520)) - (x518 * x520)) - - ((x508 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.rs2._super.io.newTxn.count._super), 0)) * - x520)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x524 - - (x517 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.rs2._super._0._0.arg.count._super), 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x525 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU16), 0), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x526 = (x525 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x527 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU16), 0), - count._super), - 0) * - inv_0(x526)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x528 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU16), 1), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x529 = (x528 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x530 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU16), 1), - count._super), - 0) * - inv_0(x529)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x531 = (x526 * x529); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x532 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU16), 0), - count._super), - 0) * - x529); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x533 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU16), 2), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x534 = (x533 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x535 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU16), 2), - count._super), - 0) * - inv_0(x534)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x536 = (((x522 + x527) + x530) + x535); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 4), x536); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x537 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 4), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 3), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x538 = - (((x537 * (x531 * x534)) - (x532 * x534)) - - ((x526 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU16), 1), - count._super), - 0)) * - x534)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x538 - - (x531 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU16), 2), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x539 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU16), 3), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x540 = (x539 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x541 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU16), 3), - count._super), - 0) * - inv_0(x540)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x542 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU16), 4), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x543 = (x542 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x544 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU16), 4), - count._super), - 0) * - inv_0(x543)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x545 = (x540 * x543); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x546 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU16), 3), - count._super), - 0) * - x543); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x547 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU16), 5), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x548 = (x547 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x549 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU16), 5), - count._super), - 0) * - inv_0(x548)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x550 = (((x536 + x541) + x544) + x549); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 5), x550); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x551 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 5), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 4), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x552 = - (((x551 * (x545 * x548)) - (x546 * x548)) - - ((x540 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU16), 4), - count._super), - 0)) * - x548)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x552 - - (x545 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU16), 5), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x553 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU8), 0), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x554 = (x553 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x555 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU8), 0), - count._super), - 0) * - inv_0(x554)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x556 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU8), 1), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x557 = (x556 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x558 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU8), 1), - count._super), - 0) * - inv_0(x557)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x559 = (x554 * x557); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x560 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU8), 0), - count._super), - 0) * - x557); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x561 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU8), 2), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x562 = (x561 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x563 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU8), 2), - count._super), - 0) * - inv_0(x562)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x564 = (((x550 + x555) + x558) + x563); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 6), x564); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x565 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 6), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 5), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x566 = - (((x565 * (x559 * x562)) - (x560 * x562)) - - ((x554 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU8), 1), - count._super), - 0)) * - x562)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x566 - - (x559 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU8), 2), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x567 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU8), 3), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x568 = (x567 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x569 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU8), 3), - count._super), - 0) * - inv_0(x568)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x570 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU8), 4), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x571 = (x570 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x572 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU8), 4), - count._super), - 0) * - inv_0(x571)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x573 = (x568 * x571); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x574 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU8), 3), - count._super), - 0) * - x571); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x575 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU8), 5), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x576 = (x575 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x577 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU8), 5), - count._super), - 0) * - inv_0(x576)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x578 = (((x564 + x569) + x572) + x577); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 7), x578); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x579 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 7), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 6), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x580 = - (((x579 * (x573 * x576)) - (x574 * x576)) - - ((x568 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU8), 4), - count._super), - 0)) * - x576)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x580 - - (x573 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU8), 5), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x581 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU8), 6), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x582 = (x581 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x583 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU8), 6), - count._super), - 0) * - inv_0(x582)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x584 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU8), 7), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x585 = (x584 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x586 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU8), 7), - count._super), - 0) * - inv_0(x585)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x587 = (x582 * x585); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x588 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU8), 6), - count._super), - 0) * - x585); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x589 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU8), 8), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x590 = (x589 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x591 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU8), 8), - count._super), - 0) * - inv_0(x590)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x592 = (((x578 + x583) + x586) + x591); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 8), x592); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x593 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 8), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 7), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x594 = - (((x593 * (x587 * x590)) - (x588 * x590)) - - ((x582 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU8), 7), - count._super), - 0)) * - x590)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x594 - - (x587 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU8), 8), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x595 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU8), 9), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x596 = (x595 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x597 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU8), 9), - count._super), - 0) * - inv_0(x596)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x598 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU8), 10), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x599 = (x598 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x600 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU8), 10), - count._super), - 0) * - inv_0(x599)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x601 = (x596 * x599); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x602 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU8), 9), - count._super), - 0) * - x599); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x603 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU8), 11), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x604 = (x603 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x605 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU8), 11), - count._super), - 0) * - inv_0(x604)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x606 = (((x592 + x597) + x600) + x605); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 9), x606); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x607 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 9), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 8), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x608 = - (((x607 * (x601 * x604)) - (x602 * x604)) - - ((x596 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU8), 10), - count._super), - 0)) * - x604)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x608 - - (x601 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU8), 11), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x609 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU8), 12), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x610 = (x609 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x611 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU8), 12), - count._super), - 0) * - inv_0(x610)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x612 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3._0._0.io.oldTxn.addr._super), 0)); - ExtVal x613 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3._0._0.io.oldTxn.cycle._super), 0)); - ExtVal x614 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3._0._0.io.oldTxn.dataLow._super), 0)); - ExtVal x615 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3._0._0.io.oldTxn.dataHigh._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x616 = (((x612 + x613) + x614) + x615); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x617 = (x616 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x618 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3._0._0.io.oldTxn.count._super), 0) * inv_0(x617)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x619 = (x610 * x617); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x620 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU8), 12), - count._super), - 0) * - x617); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x621 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3._0._0.io.newTxn.addr._super), 0)); - ExtVal x622 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3._0._0.io.newTxn.cycle._super), 0)); - ExtVal x623 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3._0._0.io.newTxn.dataLow._super), 0)); - ExtVal x624 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3._0._0.io.newTxn.dataHigh._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x625 = (((x621 + x622) + x623) + x624); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x626 = (x625 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x627 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3._0._0.io.newTxn.count._super), 0) * inv_0(x626)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x628 = (((x606 + x611) + x618) + x627); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 10), x628); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x629 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 10), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 9), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x630 = - (((x629 * (x619 * x626)) - (x620 * x626)) - - ((x610 * LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3._0._0.io.oldTxn.count._super), 0)) * - x626)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x630 - - (x619 * LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3._0._0.io.newTxn.count._super), 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x631 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3._0._0._0._0.arg.cycle._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x632 = (x631 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x633 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3._0._0._0._0.arg.count._super), 0) * inv_0(x632)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x634 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.pcAdd.low16.arg.val._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x635 = (x634 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x636 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.pcAdd.low16.arg.count._super), 0) * inv_0(x635)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x637 = (x632 * x635); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x638 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3._0._0._0._0.arg.count._super), 0) * x635); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x639 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.pcAdd.high16.arg.val._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x640 = (x639 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x641 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.pcAdd.high16.arg.count._super), 0) * inv_0(x640)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x642 = (((x628 + x633) + x636) + x641); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 11), x642); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x643 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 11), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 10), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x644 = - (((x643 * (x637 * x640)) - (x638 * x640)) - - ((x632 * LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.pcAdd.low16.arg.count._super), 0)) * - x640)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x644 - - (x637 * LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.pcAdd.high16.arg.count._super), 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:122 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 18), x642); - // zirgen/dsl/passes/GenerateAccum.cpp:124 - ExtVal x645 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 18), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 11), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:125 - EQZ(x645, "zirgen/dsl/passes/GenerateAccum.cpp:125"); - x5 = x4; - } else if (to_size_t( - LOAD(LAYOUT_LOOKUP(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(arg0, instResult._selector), 4), - _super), - 0))) { - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x646 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.decoded.arg.cycle._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x647 = (x646 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x648 = (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.decoded.arg.count._super), 0) * - inv_0(x647)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x649 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 18), 1) + x648); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x650 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD( - LAYOUT_LOOKUP(arg0, instResult.arm4.input.decoded.pcAddr.upperDiff.ret.arg.val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x651 = (x650 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x652 = - (LOAD(LAYOUT_LOOKUP(arg0, - instResult.arm4.input.decoded.pcAddr.upperDiff.ret.arg.count._super), - 0) * - inv_0(x651)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x653 = (x647 * x651); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x654 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.decoded.arg.count._super), 0) * x651); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x655 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.decoded.pcAddr.med14.arg.val._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x656 = (x655 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x657 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.decoded.pcAddr.med14.arg.count._super), 0) * - inv_0(x656)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x658 = ((x649 + x652) + x657); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 0), x658); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x659 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 0), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 18), 1)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x660 = - (((x659 * (x653 * x656)) - (x654 * x656)) - - ((x647 * - LOAD(LAYOUT_LOOKUP(arg0, - instResult.arm4.input.decoded.pcAddr.upperDiff.ret.arg.count._super), - 0)) * - x656)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x660 - (x653 * LOAD(LAYOUT_LOOKUP( - arg0, instResult.arm4.input.decoded.pcAddr.med14.arg.count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x661 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.decoded.loadInst.io.oldTxn.addr._super), - 0)); - ExtVal x662 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.decoded.loadInst.io.oldTxn.cycle._super), - 0)); - ExtVal x663 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.decoded.loadInst.io.oldTxn.dataLow._super), - 0)); - ExtVal x664 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.decoded.loadInst.io.oldTxn.dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x665 = (((x661 + x662) + x663) + x664); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x666 = (x665 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x667 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.decoded.loadInst.io.oldTxn.count._super), - 0) * - inv_0(x666)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x668 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.decoded.loadInst.io.newTxn.addr._super), - 0)); - ExtVal x669 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.decoded.loadInst.io.newTxn.cycle._super), - 0)); - ExtVal x670 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.decoded.loadInst.io.newTxn.dataLow._super), - 0)); - ExtVal x671 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.decoded.loadInst.io.newTxn.dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x672 = (((x668 + x669) + x670) + x671); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x673 = (x672 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x674 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.decoded.loadInst.io.newTxn.count._super), - 0) * - inv_0(x673)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x675 = (x666 * x673); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x676 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.decoded.loadInst.io.oldTxn.count._super), - 0) * - x673); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x677 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.decoded.loadInst._0._0.arg.cycle._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x678 = (x677 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x679 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.decoded.loadInst._0._0.arg.count._super), - 0) * - inv_0(x678)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x680 = (((x658 + x667) + x674) + x679); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 1), x680); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x681 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 1), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 0), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x682 = - (((x681 * (x675 * x678)) - (x676 * x678)) - - ((x666 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.decoded.loadInst.io.newTxn.count._super), - 0)) * - x678)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x682 - - (x675 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.decoded.loadInst._0._0.arg.count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x683 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.rs1._super.io.oldTxn.addr._super), 0)); - ExtVal x684 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.rs1._super.io.oldTxn.cycle._super), 0)); - ExtVal x685 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.rs1._super.io.oldTxn.dataLow._super), 0)); - ExtVal x686 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.rs1._super.io.oldTxn.dataHigh._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x687 = (((x683 + x684) + x685) + x686); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x688 = (x687 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x689 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.rs1._super.io.oldTxn.count._super), 0) * - inv_0(x688)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x690 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.rs1._super.io.newTxn.addr._super), 0)); - ExtVal x691 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.rs1._super.io.newTxn.cycle._super), 0)); - ExtVal x692 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.rs1._super.io.newTxn.dataLow._super), 0)); - ExtVal x693 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.rs1._super.io.newTxn.dataHigh._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x694 = (((x690 + x691) + x692) + x693); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x695 = (x694 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x696 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.rs1._super.io.newTxn.count._super), 0) * - inv_0(x695)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x697 = (x688 * x695); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x698 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.rs1._super.io.oldTxn.count._super), 0) * - x695); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x699 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.rs1._super._0._0.arg.cycle._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x700 = (x699 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x701 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.rs1._super._0._0.arg.count._super), 0) * - inv_0(x700)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x702 = (((x680 + x689) + x696) + x701); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 2), x702); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x703 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 2), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 1), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x704 = - (((x703 * (x697 * x700)) - (x698 * x700)) - - ((x688 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.rs1._super.io.newTxn.count._super), 0)) * - x700)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x704 - - (x697 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.rs1._super._0._0.arg.count._super), 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x705 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.rs2._super.io.oldTxn.addr._super), 0)); - ExtVal x706 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.rs2._super.io.oldTxn.cycle._super), 0)); - ExtVal x707 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.rs2._super.io.oldTxn.dataLow._super), 0)); - ExtVal x708 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.rs2._super.io.oldTxn.dataHigh._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x709 = (((x705 + x706) + x707) + x708); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x710 = (x709 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x711 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.rs2._super.io.oldTxn.count._super), 0) * - inv_0(x710)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x712 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.rs2._super.io.newTxn.addr._super), 0)); - ExtVal x713 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.rs2._super.io.newTxn.cycle._super), 0)); - ExtVal x714 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.rs2._super.io.newTxn.dataLow._super), 0)); - ExtVal x715 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.rs2._super.io.newTxn.dataHigh._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x716 = (((x712 + x713) + x714) + x715); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x717 = (x716 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x718 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.rs2._super.io.newTxn.count._super), 0) * - inv_0(x717)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x719 = (x710 * x717); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x720 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.rs2._super.io.oldTxn.count._super), 0) * - x717); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x721 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.rs2._super._0._0.arg.cycle._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x722 = (x721 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x723 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.rs2._super._0._0.arg.count._super), 0) * - inv_0(x722)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x724 = (((x702 + x711) + x718) + x723); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 3), x724); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x725 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 3), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 2), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x726 = - (((x725 * (x719 * x722)) - (x720 * x722)) - - ((x710 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.rs2._super.io.newTxn.count._super), 0)) * - x722)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x726 - - (x719 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.rs2._super._0._0.arg.count._super), 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x727 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU16), 0), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x728 = (x727 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x729 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU16), 0), - count._super), - 0) * - inv_0(x728)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x730 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU16), 1), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x731 = (x730 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x732 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU16), 1), - count._super), - 0) * - inv_0(x731)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x733 = (x728 * x731); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x734 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU16), 0), - count._super), - 0) * - x731); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x735 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU16), 2), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x736 = (x735 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x737 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU16), 2), - count._super), - 0) * - inv_0(x736)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x738 = (((x724 + x729) + x732) + x737); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 4), x738); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x739 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 4), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 3), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x740 = - (((x739 * (x733 * x736)) - (x734 * x736)) - - ((x728 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU16), 1), - count._super), - 0)) * - x736)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x740 - - (x733 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU16), 2), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x741 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU16), 3), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x742 = (x741 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x743 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU16), 3), - count._super), - 0) * - inv_0(x742)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x744 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU16), 4), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x745 = (x744 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x746 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU16), 4), - count._super), - 0) * - inv_0(x745)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x747 = (x742 * x745); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x748 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU16), 3), - count._super), - 0) * - x745); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x749 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU16), 5), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x750 = (x749 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x751 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU16), 5), - count._super), - 0) * - inv_0(x750)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x752 = (((x738 + x743) + x746) + x751); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 5), x752); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x753 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 5), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 4), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x754 = - (((x753 * (x747 * x750)) - (x748 * x750)) - - ((x742 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU16), 4), - count._super), - 0)) * - x750)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x754 - - (x747 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU16), 5), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x755 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU16), 6), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x756 = (x755 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x757 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU16), 6), - count._super), - 0) * - inv_0(x756)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x758 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU16), 7), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x759 = (x758 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x760 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU16), 7), - count._super), - 0) * - inv_0(x759)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x761 = (x756 * x759); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x762 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU16), 6), - count._super), - 0) * - x759); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x763 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU16), 8), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x764 = (x763 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x765 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU16), 8), - count._super), - 0) * - inv_0(x764)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x766 = (((x752 + x757) + x760) + x765); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 6), x766); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x767 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 6), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 5), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x768 = - (((x767 * (x761 * x764)) - (x762 * x764)) - - ((x756 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU16), 7), - count._super), - 0)) * - x764)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x768 - - (x761 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU16), 8), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x769 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU8), 0), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x770 = (x769 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x771 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU8), 0), - count._super), - 0) * - inv_0(x770)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x772 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU8), 1), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x773 = (x772 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x774 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU8), 1), - count._super), - 0) * - inv_0(x773)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x775 = (x770 * x773); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x776 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU8), 0), - count._super), - 0) * - x773); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x777 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU8), 2), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x778 = (x777 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x779 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU8), 2), - count._super), - 0) * - inv_0(x778)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x780 = (((x766 + x771) + x774) + x779); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 7), x780); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x781 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 7), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 6), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x782 = - (((x781 * (x775 * x778)) - (x776 * x778)) - - ((x770 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU8), 1), - count._super), - 0)) * - x778)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x782 - - (x775 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU8), 2), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x783 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU8), 3), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x784 = (x783 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x785 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU8), 3), - count._super), - 0) * - inv_0(x784)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x786 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU8), 4), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x787 = (x786 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x788 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU8), 4), - count._super), - 0) * - inv_0(x787)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x789 = (x784 * x787); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x790 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU8), 3), - count._super), - 0) * - x787); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x791 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU8), 5), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x792 = (x791 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x793 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU8), 5), - count._super), - 0) * - inv_0(x792)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x794 = (((x780 + x785) + x788) + x793); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 8), x794); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x795 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 8), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 7), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x796 = - (((x795 * (x789 * x792)) - (x790 * x792)) - - ((x784 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU8), 4), - count._super), - 0)) * - x792)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x796 - - (x789 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU8), 5), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x797 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU8), 6), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x798 = (x797 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x799 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU8), 6), - count._super), - 0) * - inv_0(x798)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x800 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU8), 7), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x801 = (x800 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x802 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU8), 7), - count._super), - 0) * - inv_0(x801)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x803 = (x798 * x801); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x804 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU8), 6), - count._super), - 0) * - x801); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x805 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU8), 8), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x806 = (x805 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x807 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU8), 8), - count._super), - 0) * - inv_0(x806)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x808 = (((x794 + x799) + x802) + x807); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 9), x808); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x809 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 9), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 8), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x810 = - (((x809 * (x803 * x806)) - (x804 * x806)) - - ((x798 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU8), 7), - count._super), - 0)) * - x806)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x810 - - (x803 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU8), 8), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x811 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU8), 9), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x812 = (x811 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x813 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU8), 9), - count._super), - 0) * - inv_0(x812)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x814 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU8), 10), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x815 = (x814 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x816 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU8), 10), - count._super), - 0) * - inv_0(x815)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x817 = (x812 * x815); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x818 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU8), 9), - count._super), - 0) * - x815); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x819 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU8), 11), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x820 = (x819 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x821 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU8), 11), - count._super), - 0) * - inv_0(x820)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x822 = (((x808 + x813) + x816) + x821); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 10), x822); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x823 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 10), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 9), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x824 = - (((x823 * (x817 * x820)) - (x818 * x820)) - - ((x812 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU8), 10), - count._super), - 0)) * - x820)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x824 - - (x817 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU8), 11), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x825 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU8), 12), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x826 = (x825 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x827 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU8), 12), - count._super), - 0) * - inv_0(x826)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x828 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4._0._0.io.oldTxn.addr._super), 0)); - ExtVal x829 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4._0._0.io.oldTxn.cycle._super), 0)); - ExtVal x830 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4._0._0.io.oldTxn.dataLow._super), 0)); - ExtVal x831 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4._0._0.io.oldTxn.dataHigh._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x832 = (((x828 + x829) + x830) + x831); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x833 = (x832 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x834 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4._0._0.io.oldTxn.count._super), 0) * inv_0(x833)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x835 = (x826 * x833); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x836 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU8), 12), - count._super), - 0) * - x833); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x837 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4._0._0.io.newTxn.addr._super), 0)); - ExtVal x838 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4._0._0.io.newTxn.cycle._super), 0)); - ExtVal x839 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4._0._0.io.newTxn.dataLow._super), 0)); - ExtVal x840 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4._0._0.io.newTxn.dataHigh._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x841 = (((x837 + x838) + x839) + x840); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x842 = (x841 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x843 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4._0._0.io.newTxn.count._super), 0) * inv_0(x842)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x844 = (((x822 + x827) + x834) + x843); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 11), x844); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x845 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 11), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 10), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x846 = - (((x845 * (x835 * x842)) - (x836 * x842)) - - ((x826 * LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4._0._0.io.oldTxn.count._super), 0)) * - x842)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x846 - - (x835 * LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4._0._0.io.newTxn.count._super), 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x847 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4._0._0._0._0.arg.cycle._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x848 = (x847 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x849 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4._0._0._0._0.arg.count._super), 0) * inv_0(x848)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x850 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.pcAdd.low16.arg.val._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x851 = (x850 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x852 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.pcAdd.low16.arg.count._super), 0) * inv_0(x851)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x853 = (x848 * x851); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x854 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4._0._0._0._0.arg.count._super), 0) * x851); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x855 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.pcAdd.high16.arg.val._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x856 = (x855 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x857 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.pcAdd.high16.arg.count._super), 0) * inv_0(x856)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x858 = (((x844 + x849) + x852) + x857); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 12), x858); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x859 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 12), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 11), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x860 = - (((x859 * (x853 * x856)) - (x854 * x856)) - - ((x848 * LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.pcAdd.low16.arg.count._super), 0)) * - x856)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x860 - - (x853 * LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.pcAdd.high16.arg.count._super), 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:122 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 18), x858); - // zirgen/dsl/passes/GenerateAccum.cpp:124 - ExtVal x861 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 18), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 12), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:125 - EQZ(x861, "zirgen/dsl/passes/GenerateAccum.cpp:125"); - x5 = x4; - } else if (to_size_t( - LOAD(LAYOUT_LOOKUP(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(arg0, instResult._selector), 5), - _super), - 0))) { - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x862 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.decoded.arg.cycle._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x863 = (x862 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x864 = (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.decoded.arg.count._super), 0) * - inv_0(x863)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x865 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 18), 1) + x864); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x866 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD( - LAYOUT_LOOKUP(arg0, instResult.arm5.input.decoded.pcAddr.upperDiff.ret.arg.val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x867 = (x866 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x868 = - (LOAD(LAYOUT_LOOKUP(arg0, - instResult.arm5.input.decoded.pcAddr.upperDiff.ret.arg.count._super), - 0) * - inv_0(x867)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x869 = (x863 * x867); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x870 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.decoded.arg.count._super), 0) * x867); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x871 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.decoded.pcAddr.med14.arg.val._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x872 = (x871 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x873 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.decoded.pcAddr.med14.arg.count._super), 0) * - inv_0(x872)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x874 = ((x865 + x868) + x873); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 0), x874); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x875 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 0), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 18), 1)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x876 = - (((x875 * (x869 * x872)) - (x870 * x872)) - - ((x863 * - LOAD(LAYOUT_LOOKUP(arg0, - instResult.arm5.input.decoded.pcAddr.upperDiff.ret.arg.count._super), - 0)) * - x872)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x876 - (x869 * LOAD(LAYOUT_LOOKUP( - arg0, instResult.arm5.input.decoded.pcAddr.med14.arg.count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x877 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.decoded.loadInst.io.oldTxn.addr._super), - 0)); - ExtVal x878 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.decoded.loadInst.io.oldTxn.cycle._super), - 0)); - ExtVal x879 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.decoded.loadInst.io.oldTxn.dataLow._super), - 0)); - ExtVal x880 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.decoded.loadInst.io.oldTxn.dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x881 = (((x877 + x878) + x879) + x880); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x882 = (x881 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x883 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.decoded.loadInst.io.oldTxn.count._super), - 0) * - inv_0(x882)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x884 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.decoded.loadInst.io.newTxn.addr._super), - 0)); - ExtVal x885 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.decoded.loadInst.io.newTxn.cycle._super), - 0)); - ExtVal x886 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.decoded.loadInst.io.newTxn.dataLow._super), - 0)); - ExtVal x887 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.decoded.loadInst.io.newTxn.dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x888 = (((x884 + x885) + x886) + x887); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x889 = (x888 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x890 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.decoded.loadInst.io.newTxn.count._super), - 0) * - inv_0(x889)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x891 = (x882 * x889); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x892 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.decoded.loadInst.io.oldTxn.count._super), - 0) * - x889); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x893 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.decoded.loadInst._0._0.arg.cycle._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x894 = (x893 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x895 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.decoded.loadInst._0._0.arg.count._super), - 0) * - inv_0(x894)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x896 = (((x874 + x883) + x890) + x895); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 1), x896); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x897 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 1), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 0), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x898 = - (((x897 * (x891 * x894)) - (x892 * x894)) - - ((x882 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.decoded.loadInst.io.newTxn.count._super), - 0)) * - x894)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x898 - - (x891 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.decoded.loadInst._0._0.arg.count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x899 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.rs1._super.io.oldTxn.addr._super), 0)); - ExtVal x900 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.rs1._super.io.oldTxn.cycle._super), 0)); - ExtVal x901 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.rs1._super.io.oldTxn.dataLow._super), 0)); - ExtVal x902 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.rs1._super.io.oldTxn.dataHigh._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x903 = (((x899 + x900) + x901) + x902); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x904 = (x903 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x905 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.rs1._super.io.oldTxn.count._super), 0) * - inv_0(x904)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x906 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.rs1._super.io.newTxn.addr._super), 0)); - ExtVal x907 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.rs1._super.io.newTxn.cycle._super), 0)); - ExtVal x908 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.rs1._super.io.newTxn.dataLow._super), 0)); - ExtVal x909 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.rs1._super.io.newTxn.dataHigh._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x910 = (((x906 + x907) + x908) + x909); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x911 = (x910 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x912 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.rs1._super.io.newTxn.count._super), 0) * - inv_0(x911)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x913 = (x904 * x911); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x914 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.rs1._super.io.oldTxn.count._super), 0) * - x911); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x915 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.rs1._super._0._0.arg.cycle._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x916 = (x915 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x917 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.rs1._super._0._0.arg.count._super), 0) * - inv_0(x916)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x918 = (((x896 + x905) + x912) + x917); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 2), x918); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x919 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 2), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 1), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x920 = - (((x919 * (x913 * x916)) - (x914 * x916)) - - ((x904 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.rs1._super.io.newTxn.count._super), 0)) * - x916)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x920 - - (x913 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.rs1._super._0._0.arg.count._super), 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x921 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.addrU32.low16.arg.val._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x922 = (x921 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x923 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.addrU32.low16.arg.count._super), 0) * - inv_0(x922)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x924 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.addrU32.high16.arg.val._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x925 = (x924 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x926 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.addrU32.high16.arg.count._super), 0) * - inv_0(x925)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x927 = (x922 * x925); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x928 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.addrU32.low16.arg.count._super), 0) * x925); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x929 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.addr.upperDiff.ret.arg.val._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x930 = (x929 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x931 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.addr.upperDiff.ret.arg.count._super), 0) * - inv_0(x930)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x932 = (((x918 + x923) + x926) + x931); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 3), x932); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x933 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 3), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 2), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x934 = - (((x933 * (x927 * x930)) - (x928 * x930)) - - ((x922 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.addrU32.high16.arg.count._super), 0)) * - x930)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x934 - - (x927 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.addr.upperDiff.ret.arg.count._super), 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x935 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.addr.med14.arg.val._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x936 = (x935 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x937 = (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.addr.med14.arg.count._super), 0) * - inv_0(x936)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x938 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.data.io.oldTxn.addr._super), 0)); - ExtVal x939 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.data.io.oldTxn.cycle._super), 0)); - ExtVal x940 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.data.io.oldTxn.dataLow._super), 0)); - ExtVal x941 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.data.io.oldTxn.dataHigh._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x942 = (((x938 + x939) + x940) + x941); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x943 = (x942 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x944 = (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.data.io.oldTxn.count._super), 0) * - inv_0(x943)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x945 = (x936 * x943); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x946 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.addr.med14.arg.count._super), 0) * x943); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x947 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.data.io.newTxn.addr._super), 0)); - ExtVal x948 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.data.io.newTxn.cycle._super), 0)); - ExtVal x949 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.data.io.newTxn.dataLow._super), 0)); - ExtVal x950 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.data.io.newTxn.dataHigh._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x951 = (((x947 + x948) + x949) + x950); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x952 = (x951 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x953 = (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.data.io.newTxn.count._super), 0) * - inv_0(x952)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x954 = (((x932 + x937) + x944) + x953); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 4), x954); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x955 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 4), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 3), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x956 = - (((x955 * (x945 * x952)) - (x946 * x952)) - - ((x936 * LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.data.io.oldTxn.count._super), 0)) * - x952)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x956 - - (x945 * LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.data.io.newTxn.count._super), 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x957 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.data._0._0.arg.cycle._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x958 = (x957 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x959 = (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.data._0._0.arg.count._super), 0) * - inv_0(x958)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x960 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD( - LAYOUT_LOOKUP(LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm5._arguments_Mem0Output.argU8), 0), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x961 = (x960 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x962 = - (LOAD( - LAYOUT_LOOKUP(LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm5._arguments_Mem0Output.argU8), 0), - count._super), - 0) * - inv_0(x961)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x963 = (x958 * x961); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x964 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.data._0._0.arg.count._super), 0) * x961); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x965 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD( - LAYOUT_LOOKUP(LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm5._arguments_Mem0Output.argU8), 1), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x966 = (x965 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x967 = - (LOAD( - LAYOUT_LOOKUP(LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm5._arguments_Mem0Output.argU8), 1), - count._super), - 0) * - inv_0(x966)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x968 = (((x954 + x959) + x962) + x967); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 5), x968); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x969 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 5), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 4), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x970 = - (((x969 * (x963 * x966)) - (x964 * x966)) - - ((x958 * LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm5._arguments_Mem0Output.argU8), 0), - count._super), - 0)) * - x966)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x970 - - (x963 * LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm5._arguments_Mem0Output.argU8), 1), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x971 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD( - LAYOUT_LOOKUP(LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm5._arguments_Mem0Output.argU8), 2), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x972 = (x971 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x973 = - (LOAD( - LAYOUT_LOOKUP(LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm5._arguments_Mem0Output.argU8), 2), - count._super), - 0) * - inv_0(x972)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x974 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5._0._0.io.oldTxn.addr._super), 0)); - ExtVal x975 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5._0._0.io.oldTxn.cycle._super), 0)); - ExtVal x976 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5._0._0.io.oldTxn.dataLow._super), 0)); - ExtVal x977 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5._0._0.io.oldTxn.dataHigh._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x978 = (((x974 + x975) + x976) + x977); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x979 = (x978 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x980 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5._0._0.io.oldTxn.count._super), 0) * inv_0(x979)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x981 = (x972 * x979); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x982 = - (LOAD( - LAYOUT_LOOKUP(LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm5._arguments_Mem0Output.argU8), 2), - count._super), - 0) * - x979); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x983 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5._0._0.io.newTxn.addr._super), 0)); - ExtVal x984 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5._0._0.io.newTxn.cycle._super), 0)); - ExtVal x985 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5._0._0.io.newTxn.dataLow._super), 0)); - ExtVal x986 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5._0._0.io.newTxn.dataHigh._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x987 = (((x983 + x984) + x985) + x986); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x988 = (x987 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x989 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5._0._0.io.newTxn.count._super), 0) * inv_0(x988)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x990 = (((x968 + x973) + x980) + x989); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 6), x990); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x991 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 6), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 5), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x992 = - (((x991 * (x981 * x988)) - (x982 * x988)) - - ((x972 * LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5._0._0.io.oldTxn.count._super), 0)) * - x988)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x992 - - (x981 * LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5._0._0.io.newTxn.count._super), 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x993 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5._0._0._0._0.arg.cycle._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x994 = (x993 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x995 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5._0._0._0._0.arg.count._super), 0) * inv_0(x994)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x996 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.pcAdd.low16.arg.val._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x997 = (x996 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x998 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.pcAdd.low16.arg.count._super), 0) * inv_0(x997)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x999 = (x994 * x997); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1000 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5._0._0._0._0.arg.count._super), 0) * x997); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1001 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.pcAdd.high16.arg.val._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1002 = (x1001 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1003 = (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.pcAdd.high16.arg.count._super), 0) * - inv_0(x1002)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1004 = (((x990 + x995) + x998) + x1003); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 7), x1004); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1005 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 7), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 6), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1006 = - (((x1005 * (x999 * x1002)) - (x1000 * x1002)) - - ((x994 * LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.pcAdd.low16.arg.count._super), 0)) * - x1002)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1006 - - (x999 * LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.pcAdd.high16.arg.count._super), 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:122 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 18), x1004); - // zirgen/dsl/passes/GenerateAccum.cpp:124 - ExtVal x1007 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 18), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 7), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:125 - EQZ(x1007, "zirgen/dsl/passes/GenerateAccum.cpp:125"); - x5 = x4; - } else if (to_size_t( - LOAD(LAYOUT_LOOKUP(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(arg0, instResult._selector), 6), - _super), - 0))) { - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1008 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.decoded.arg.cycle._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1009 = (x1008 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1010 = (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.decoded.arg.count._super), 0) * - inv_0(x1009)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1011 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 18), 1) + x1010); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1012 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD( - LAYOUT_LOOKUP(arg0, instResult.arm6.input.decoded.pcAddr.upperDiff.ret.arg.val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1013 = (x1012 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1014 = - (LOAD(LAYOUT_LOOKUP(arg0, - instResult.arm6.input.decoded.pcAddr.upperDiff.ret.arg.count._super), - 0) * - inv_0(x1013)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1015 = (x1009 * x1013); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1016 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.decoded.arg.count._super), 0) * x1013); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1017 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.decoded.pcAddr.med14.arg.val._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1018 = (x1017 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1019 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.decoded.pcAddr.med14.arg.count._super), 0) * - inv_0(x1018)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1020 = ((x1011 + x1014) + x1019); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 0), x1020); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1021 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 0), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 18), 1)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1022 = - (((x1021 * (x1015 * x1018)) - (x1016 * x1018)) - - ((x1009 * - LOAD(LAYOUT_LOOKUP(arg0, - instResult.arm6.input.decoded.pcAddr.upperDiff.ret.arg.count._super), - 0)) * - x1018)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1022 - - (x1015 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.decoded.pcAddr.med14.arg.count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1023 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.decoded.loadInst.io.oldTxn.addr._super), - 0)); - ExtVal x1024 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.decoded.loadInst.io.oldTxn.cycle._super), - 0)); - ExtVal x1025 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.decoded.loadInst.io.oldTxn.dataLow._super), - 0)); - ExtVal x1026 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.decoded.loadInst.io.oldTxn.dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1027 = (((x1023 + x1024) + x1025) + x1026); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1028 = (x1027 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1029 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.decoded.loadInst.io.oldTxn.count._super), - 0) * - inv_0(x1028)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1030 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.decoded.loadInst.io.newTxn.addr._super), - 0)); - ExtVal x1031 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.decoded.loadInst.io.newTxn.cycle._super), - 0)); - ExtVal x1032 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.decoded.loadInst.io.newTxn.dataLow._super), - 0)); - ExtVal x1033 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.decoded.loadInst.io.newTxn.dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1034 = (((x1030 + x1031) + x1032) + x1033); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1035 = (x1034 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1036 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.decoded.loadInst.io.newTxn.count._super), - 0) * - inv_0(x1035)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1037 = (x1028 * x1035); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1038 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.decoded.loadInst.io.oldTxn.count._super), - 0) * - x1035); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1039 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.decoded.loadInst._0._0.arg.cycle._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1040 = (x1039 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1041 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.decoded.loadInst._0._0.arg.count._super), - 0) * - inv_0(x1040)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1042 = (((x1020 + x1029) + x1036) + x1041); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 1), x1042); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1043 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 1), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 0), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1044 = - (((x1043 * (x1037 * x1040)) - (x1038 * x1040)) - - ((x1028 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.decoded.loadInst.io.newTxn.count._super), - 0)) * - x1040)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1044 - - (x1037 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.decoded.loadInst._0._0.arg.count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1045 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.rs1._super.io.oldTxn.addr._super), 0)); - ExtVal x1046 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.rs1._super.io.oldTxn.cycle._super), 0)); - ExtVal x1047 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.rs1._super.io.oldTxn.dataLow._super), 0)); - ExtVal x1048 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.rs1._super.io.oldTxn.dataHigh._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1049 = (((x1045 + x1046) + x1047) + x1048); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1050 = (x1049 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1051 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.rs1._super.io.oldTxn.count._super), 0) * - inv_0(x1050)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1052 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.rs1._super.io.newTxn.addr._super), 0)); - ExtVal x1053 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.rs1._super.io.newTxn.cycle._super), 0)); - ExtVal x1054 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.rs1._super.io.newTxn.dataLow._super), 0)); - ExtVal x1055 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.rs1._super.io.newTxn.dataHigh._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1056 = (((x1052 + x1053) + x1054) + x1055); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1057 = (x1056 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1058 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.rs1._super.io.newTxn.count._super), 0) * - inv_0(x1057)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1059 = (x1050 * x1057); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1060 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.rs1._super.io.oldTxn.count._super), 0) * - x1057); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1061 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.rs1._super._0._0.arg.cycle._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1062 = (x1061 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1063 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.rs1._super._0._0.arg.count._super), 0) * - inv_0(x1062)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1064 = (((x1042 + x1051) + x1058) + x1063); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 2), x1064); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1065 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 2), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 1), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1066 = - (((x1065 * (x1059 * x1062)) - (x1060 * x1062)) - - ((x1050 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.rs1._super.io.newTxn.count._super), 0)) * - x1062)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1066 - - (x1059 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.rs1._super._0._0.arg.count._super), 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1067 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.rs2._super.io.oldTxn.addr._super), 0)); - ExtVal x1068 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.rs2._super.io.oldTxn.cycle._super), 0)); - ExtVal x1069 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.rs2._super.io.oldTxn.dataLow._super), 0)); - ExtVal x1070 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.rs2._super.io.oldTxn.dataHigh._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1071 = (((x1067 + x1068) + x1069) + x1070); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1072 = (x1071 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1073 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.rs2._super.io.oldTxn.count._super), 0) * - inv_0(x1072)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1074 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.rs2._super.io.newTxn.addr._super), 0)); - ExtVal x1075 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.rs2._super.io.newTxn.cycle._super), 0)); - ExtVal x1076 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.rs2._super.io.newTxn.dataLow._super), 0)); - ExtVal x1077 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.rs2._super.io.newTxn.dataHigh._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1078 = (((x1074 + x1075) + x1076) + x1077); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1079 = (x1078 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1080 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.rs2._super.io.newTxn.count._super), 0) * - inv_0(x1079)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1081 = (x1072 * x1079); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1082 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.rs2._super.io.oldTxn.count._super), 0) * - x1079); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1083 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.rs2._super._0._0.arg.cycle._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1084 = (x1083 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1085 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.rs2._super._0._0.arg.count._super), 0) * - inv_0(x1084)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1086 = (((x1064 + x1073) + x1080) + x1085); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 3), x1086); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1087 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 3), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 2), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1088 = - (((x1087 * (x1081 * x1084)) - (x1082 * x1084)) - - ((x1072 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.rs2._super.io.newTxn.count._super), 0)) * - x1084)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1088 - - (x1081 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.rs2._super._0._0.arg.count._super), 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1089 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.addrU32.low16.arg.val._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1090 = (x1089 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1091 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.addrU32.low16.arg.count._super), 0) * - inv_0(x1090)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1092 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.addrU32.high16.arg.val._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1093 = (x1092 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1094 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.addrU32.high16.arg.count._super), 0) * - inv_0(x1093)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1095 = (x1090 * x1093); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1096 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.addrU32.low16.arg.count._super), 0) * - x1093); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1097 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.addr.upperDiff.ret.arg.val._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1098 = (x1097 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1099 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.addr.upperDiff.ret.arg.count._super), 0) * - inv_0(x1098)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1100 = (((x1086 + x1091) + x1094) + x1099); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 4), x1100); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1101 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 4), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 3), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1102 = - (((x1101 * (x1095 * x1098)) - (x1096 * x1098)) - - ((x1090 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.addrU32.high16.arg.count._super), 0)) * - x1098)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1102 - - (x1095 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.addr.upperDiff.ret.arg.count._super), 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1103 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.addr.med14.arg.val._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1104 = (x1103 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1105 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.addr.med14.arg.count._super), 0) * - inv_0(x1104)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1106 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.data.io.oldTxn.addr._super), 0)); - ExtVal x1107 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.data.io.oldTxn.cycle._super), 0)); - ExtVal x1108 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.data.io.oldTxn.dataLow._super), 0)); - ExtVal x1109 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.data.io.oldTxn.dataHigh._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1110 = (((x1106 + x1107) + x1108) + x1109); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1111 = (x1110 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1112 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.data.io.oldTxn.count._super), 0) * - inv_0(x1111)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1113 = (x1104 * x1111); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1114 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.addr.med14.arg.count._super), 0) * x1111); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1115 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.data.io.newTxn.addr._super), 0)); - ExtVal x1116 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.data.io.newTxn.cycle._super), 0)); - ExtVal x1117 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.data.io.newTxn.dataLow._super), 0)); - ExtVal x1118 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.data.io.newTxn.dataHigh._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1119 = (((x1115 + x1116) + x1117) + x1118); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1120 = (x1119 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1121 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.data.io.newTxn.count._super), 0) * - inv_0(x1120)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1122 = (((x1100 + x1105) + x1112) + x1121); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 5), x1122); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1123 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 5), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 4), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1124 = - (((x1123 * (x1113 * x1120)) - (x1114 * x1120)) - - ((x1104 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.data.io.oldTxn.count._super), 0)) * - x1120)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1124 - - (x1113 * LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.data.io.newTxn.count._super), 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1125 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.data._0._0.arg.cycle._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1126 = (x1125 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1127 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.data._0._0.arg.count._super), 0) * - inv_0(x1126)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1128 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD( - LAYOUT_LOOKUP(LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm6._arguments_Mem1Output.argU8), 0), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1129 = (x1128 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1130 = - (LOAD( - LAYOUT_LOOKUP(LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm6._arguments_Mem1Output.argU8), 0), - count._super), - 0) * - inv_0(x1129)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1131 = (x1126 * x1129); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1132 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.data._0._0.arg.count._super), 0) * x1129); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1133 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD( - LAYOUT_LOOKUP(LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm6._arguments_Mem1Output.argU8), 1), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1134 = (x1133 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1135 = - (LOAD( - LAYOUT_LOOKUP(LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm6._arguments_Mem1Output.argU8), 1), - count._super), - 0) * - inv_0(x1134)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1136 = (((x1122 + x1127) + x1130) + x1135); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 6), x1136); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1137 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 6), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 5), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1138 = - (((x1137 * (x1131 * x1134)) - (x1132 * x1134)) - - ((x1126 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm6._arguments_Mem1Output.argU8), 0), - count._super), - 0)) * - x1134)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1138 - - (x1131 * LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm6._arguments_Mem1Output.argU8), 1), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1139 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD( - LAYOUT_LOOKUP(LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm6._arguments_Mem1Output.argU8), 2), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1140 = (x1139 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1141 = - (LOAD( - LAYOUT_LOOKUP(LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm6._arguments_Mem1Output.argU8), 2), - count._super), - 0) * - inv_0(x1140)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1142 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD( - LAYOUT_LOOKUP(LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm6._arguments_Mem1Output.argU8), 3), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1143 = (x1142 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1144 = - (LOAD( - LAYOUT_LOOKUP(LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm6._arguments_Mem1Output.argU8), 3), - count._super), - 0) * - inv_0(x1143)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1145 = (x1140 * x1143); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1146 = - (LOAD( - LAYOUT_LOOKUP(LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm6._arguments_Mem1Output.argU8), 2), - count._super), - 0) * - x1143); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1147 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6._0._0.io.oldTxn.addr._super), 0)); - ExtVal x1148 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6._0._0.io.oldTxn.cycle._super), 0)); - ExtVal x1149 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6._0._0.io.oldTxn.dataLow._super), 0)); - ExtVal x1150 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6._0._0.io.oldTxn.dataHigh._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1151 = (((x1147 + x1148) + x1149) + x1150); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1152 = (x1151 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1153 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6._0._0.io.oldTxn.count._super), 0) * inv_0(x1152)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1154 = (((x1136 + x1141) + x1144) + x1153); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 7), x1154); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1155 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 7), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 6), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1156 = - (((x1155 * (x1145 * x1152)) - (x1146 * x1152)) - - ((x1140 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm6._arguments_Mem1Output.argU8), 3), - count._super), - 0)) * - x1152)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1156 - - (x1145 * LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6._0._0.io.oldTxn.count._super), 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1157 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6._0._0.io.newTxn.addr._super), 0)); - ExtVal x1158 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6._0._0.io.newTxn.cycle._super), 0)); - ExtVal x1159 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6._0._0.io.newTxn.dataLow._super), 0)); - ExtVal x1160 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6._0._0.io.newTxn.dataHigh._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1161 = (((x1157 + x1158) + x1159) + x1160); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1162 = (x1161 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1163 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6._0._0.io.newTxn.count._super), 0) * inv_0(x1162)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1164 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6._0._0._0._0.arg.cycle._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1165 = (x1164 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1166 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6._0._0._0._0.arg.count._super), 0) * inv_0(x1165)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1167 = (x1162 * x1165); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1168 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6._0._0.io.newTxn.count._super), 0) * x1165); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1169 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.pcAdd.low16.arg.val._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1170 = (x1169 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1171 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.pcAdd.low16.arg.count._super), 0) * inv_0(x1170)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1172 = (((x1154 + x1163) + x1166) + x1171); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 8), x1172); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1173 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 8), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 7), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1174 = - (((x1173 * (x1167 * x1170)) - (x1168 * x1170)) - - ((x1162 * LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6._0._0._0._0.arg.count._super), 0)) * - x1170)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1174 - - (x1167 * LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.pcAdd.low16.arg.count._super), 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1175 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.pcAdd.high16.arg.val._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1176 = (x1175 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1177 = (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.pcAdd.high16.arg.count._super), 0) * - inv_0(x1176)); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 9), (x1172 + x1177)); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1178 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 9), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 8), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1179 = ((x1178 * x1176) - - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.pcAdd.high16.arg.count._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ(x1179, "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:122 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 18), - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 9), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:124 - ExtVal x1180 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 18), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 9), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:125 - EQZ(x1180, "zirgen/dsl/passes/GenerateAccum.cpp:125"); - x5 = x4; - } else if (to_size_t( - LOAD(LAYOUT_LOOKUP(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(arg0, instResult._selector), 7), - _super), - 0))) { - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1181 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm7.arg.cycle._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1182 = (x1181 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1183 = (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm7.arg.count._super), 0) * inv_0(x1182)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1184 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 18), 1) + x1183); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1185 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 0), - addr._super), - 0)); - ExtVal x1186 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 0), - cycle._super), - 0)); - ExtVal x1187 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 0), - dataLow._super), - 0)); - ExtVal x1188 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 0), - dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1189 = (((x1185 + x1186) + x1187) + x1188); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1190 = (x1189 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1191 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 0), - count._super), - 0) * - inv_0(x1190)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1192 = (x1182 * x1190); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1193 = (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm7.arg.count._super), 0) * x1190); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1194 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 1), - addr._super), - 0)); - ExtVal x1195 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 1), - cycle._super), - 0)); - ExtVal x1196 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 1), - dataLow._super), - 0)); - ExtVal x1197 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 1), - dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1198 = (((x1194 + x1195) + x1196) + x1197); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1199 = (x1198 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1200 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 1), - count._super), - 0) * - inv_0(x1199)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1201 = ((x1184 + x1191) + x1200); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 0), x1201); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1202 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 0), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 18), 1)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1203 = - (((x1202 * (x1192 * x1199)) - (x1193 * x1199)) - - ((x1182 * - LOAD( - LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 0), - count._super), - 0)) * - x1199)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1203 - - (x1192 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 1), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1204 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 2), - addr._super), - 0)); - ExtVal x1205 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 2), - cycle._super), - 0)); - ExtVal x1206 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 2), - dataLow._super), - 0)); - ExtVal x1207 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 2), - dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1208 = (((x1204 + x1205) + x1206) + x1207); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1209 = (x1208 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1210 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 2), - count._super), - 0) * - inv_0(x1209)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1211 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 3), - addr._super), - 0)); - ExtVal x1212 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 3), - cycle._super), - 0)); - ExtVal x1213 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 3), - dataLow._super), - 0)); - ExtVal x1214 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 3), - dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1215 = (((x1211 + x1212) + x1213) + x1214); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1216 = (x1215 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1217 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 3), - count._super), - 0) * - inv_0(x1216)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1218 = (x1209 * x1216); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1219 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 2), - count._super), - 0) * - x1216); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1220 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 4), - addr._super), - 0)); - ExtVal x1221 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 4), - cycle._super), - 0)); - ExtVal x1222 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 4), - dataLow._super), - 0)); - ExtVal x1223 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 4), - dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1224 = (((x1220 + x1221) + x1222) + x1223); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1225 = (x1224 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1226 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 4), - count._super), - 0) * - inv_0(x1225)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1227 = (((x1201 + x1210) + x1217) + x1226); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 1), x1227); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1228 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 1), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 0), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1229 = - (((x1228 * (x1218 * x1225)) - (x1219 * x1225)) - - ((x1209 * - LOAD( - LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 3), - count._super), - 0)) * - x1225)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1229 - - (x1218 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 4), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1230 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 5), - addr._super), - 0)); - ExtVal x1231 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 5), - cycle._super), - 0)); - ExtVal x1232 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 5), - dataLow._super), - 0)); - ExtVal x1233 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 5), - dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1234 = (((x1230 + x1231) + x1232) + x1233); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1235 = (x1234 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1236 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 5), - count._super), - 0) * - inv_0(x1235)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1237 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 6), - addr._super), - 0)); - ExtVal x1238 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 6), - cycle._super), - 0)); - ExtVal x1239 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 6), - dataLow._super), - 0)); - ExtVal x1240 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 6), - dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1241 = (((x1237 + x1238) + x1239) + x1240); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1242 = (x1241 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1243 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 6), - count._super), - 0) * - inv_0(x1242)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1244 = (x1235 * x1242); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1245 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 5), - count._super), - 0) * - x1242); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1246 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 7), - addr._super), - 0)); - ExtVal x1247 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 7), - cycle._super), - 0)); - ExtVal x1248 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 7), - dataLow._super), - 0)); - ExtVal x1249 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 7), - dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1250 = (((x1246 + x1247) + x1248) + x1249); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1251 = (x1250 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1252 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 7), - count._super), - 0) * - inv_0(x1251)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1253 = (((x1227 + x1236) + x1243) + x1252); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 2), x1253); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1254 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 2), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 1), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1255 = - (((x1254 * (x1244 * x1251)) - (x1245 * x1251)) - - ((x1235 * - LOAD( - LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 6), - count._super), - 0)) * - x1251)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1255 - - (x1244 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 7), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1256 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 8), - addr._super), - 0)); - ExtVal x1257 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 8), - cycle._super), - 0)); - ExtVal x1258 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 8), - dataLow._super), - 0)); - ExtVal x1259 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 8), - dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1260 = (((x1256 + x1257) + x1258) + x1259); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1261 = (x1260 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1262 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 8), - count._super), - 0) * - inv_0(x1261)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1263 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 9), - addr._super), - 0)); - ExtVal x1264 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 9), - cycle._super), - 0)); - ExtVal x1265 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 9), - dataLow._super), - 0)); - ExtVal x1266 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 9), - dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1267 = (((x1263 + x1264) + x1265) + x1266); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1268 = (x1267 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1269 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 9), - count._super), - 0) * - inv_0(x1268)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1270 = (x1261 * x1268); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1271 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 8), - count._super), - 0) * - x1268); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1272 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 10), - addr._super), - 0)); - ExtVal x1273 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 10), - cycle._super), - 0)); - ExtVal x1274 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 10), - dataLow._super), - 0)); - ExtVal x1275 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 10), - dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1276 = (((x1272 + x1273) + x1274) + x1275); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1277 = (x1276 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1278 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 10), - count._super), - 0) * - inv_0(x1277)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1279 = (((x1253 + x1262) + x1269) + x1278); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 3), x1279); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1280 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 3), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 2), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1281 = - (((x1280 * (x1270 * x1277)) - (x1271 * x1277)) - - ((x1261 * - LOAD( - LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 9), - count._super), - 0)) * - x1277)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1281 - - (x1270 * - LOAD( - LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 10), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1282 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 11), - addr._super), - 0)); - ExtVal x1283 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 11), - cycle._super), - 0)); - ExtVal x1284 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 11), - dataLow._super), - 0)); - ExtVal x1285 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 11), - dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1286 = (((x1282 + x1283) + x1284) + x1285); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1287 = (x1286 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1288 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 11), - count._super), - 0) * - inv_0(x1287)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1289 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 12), - addr._super), - 0)); - ExtVal x1290 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 12), - cycle._super), - 0)); - ExtVal x1291 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 12), - dataLow._super), - 0)); - ExtVal x1292 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 12), - dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1293 = (((x1289 + x1290) + x1291) + x1292); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1294 = (x1293 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1295 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 12), - count._super), - 0) * - inv_0(x1294)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1296 = (x1287 * x1294); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1297 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 11), - count._super), - 0) * - x1294); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1298 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 13), - addr._super), - 0)); - ExtVal x1299 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 13), - cycle._super), - 0)); - ExtVal x1300 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 13), - dataLow._super), - 0)); - ExtVal x1301 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 13), - dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1302 = (((x1298 + x1299) + x1300) + x1301); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1303 = (x1302 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1304 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 13), - count._super), - 0) * - inv_0(x1303)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1305 = (((x1279 + x1288) + x1295) + x1304); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 4), x1305); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1306 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 4), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 3), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1307 = - (((x1306 * (x1296 * x1303)) - (x1297 * x1303)) - - ((x1287 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), - 12), - count._super), - 0)) * - x1303)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1307 - - (x1296 * - LOAD( - LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 13), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1308 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 14), - addr._super), - 0)); - ExtVal x1309 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 14), - cycle._super), - 0)); - ExtVal x1310 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 14), - dataLow._super), - 0)); - ExtVal x1311 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 14), - dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1312 = (((x1308 + x1309) + x1310) + x1311); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1313 = (x1312 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1314 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 14), - count._super), - 0) * - inv_0(x1313)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1315 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 15), - addr._super), - 0)); - ExtVal x1316 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 15), - cycle._super), - 0)); - ExtVal x1317 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 15), - dataLow._super), - 0)); - ExtVal x1318 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 15), - dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1319 = (((x1315 + x1316) + x1317) + x1318); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1320 = (x1319 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1321 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 15), - count._super), - 0) * - inv_0(x1320)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1322 = (x1313 * x1320); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1323 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 14), - count._super), - 0) * - x1320); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1324 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.cycleArg), 0), - cycle._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1325 = (x1324 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1326 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.cycleArg), 0), - count._super), - 0) * - inv_0(x1325)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1327 = (((x1305 + x1314) + x1321) + x1326); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 5), x1327); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1328 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 5), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 4), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1329 = - (((x1328 * (x1322 * x1325)) - (x1323 * x1325)) - - ((x1313 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), - 15), - count._super), - 0)) * - x1325)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1329 - - (x1322 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.cycleArg), 0), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1330 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.cycleArg), 1), - cycle._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1331 = (x1330 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1332 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.cycleArg), 1), - count._super), - 0) * - inv_0(x1331)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1333 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.cycleArg), 2), - cycle._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1334 = (x1333 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1335 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.cycleArg), 2), - count._super), - 0) * - inv_0(x1334)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1336 = (x1331 * x1334); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1337 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.cycleArg), 1), - count._super), - 0) * - x1334); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1338 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.cycleArg), 3), - cycle._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1339 = (x1338 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1340 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.cycleArg), 3), - count._super), - 0) * - inv_0(x1339)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1341 = (((x1327 + x1332) + x1335) + x1340); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 6), x1341); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1342 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 6), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 5), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1343 = - (((x1342 * (x1336 * x1339)) - (x1337 * x1339)) - - ((x1331 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.cycleArg), 2), - count._super), - 0)) * - x1339)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1343 - - (x1336 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.cycleArg), 3), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1344 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.cycleArg), 4), - cycle._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1345 = (x1344 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1346 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.cycleArg), 4), - count._super), - 0) * - inv_0(x1345)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1347 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.cycleArg), 5), - cycle._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1348 = (x1347 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1349 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.cycleArg), 5), - count._super), - 0) * - inv_0(x1348)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1350 = (x1345 * x1348); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1351 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.cycleArg), 4), - count._super), - 0) * - x1348); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1352 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.cycleArg), 6), - cycle._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1353 = (x1352 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1354 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.cycleArg), 6), - count._super), - 0) * - inv_0(x1353)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1355 = (((x1341 + x1346) + x1349) + x1354); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 7), x1355); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1356 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 7), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 6), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1357 = - (((x1356 * (x1350 * x1353)) - (x1351 * x1353)) - - ((x1345 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.cycleArg), 5), - count._super), - 0)) * - x1353)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1357 - - (x1350 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.cycleArg), 6), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1358 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.cycleArg), 7), - cycle._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1359 = (x1358 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1360 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.cycleArg), 7), - count._super), - 0) * - inv_0(x1359)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1361 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 0), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1362 = (x1361 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1363 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 0), - count._super), - 0) * - inv_0(x1362)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1364 = (x1359 * x1362); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1365 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.cycleArg), 7), - count._super), - 0) * - x1362); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1366 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 1), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1367 = (x1366 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1368 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 1), - count._super), - 0) * - inv_0(x1367)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1369 = (((x1355 + x1360) + x1363) + x1368); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 8), x1369); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1370 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 8), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 7), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1371 = - (((x1370 * (x1364 * x1367)) - (x1365 * x1367)) - - ((x1359 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 0), - count._super), - 0)) * - x1367)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1371 - - (x1364 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 1), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1372 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 2), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1373 = (x1372 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1374 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 2), - count._super), - 0) * - inv_0(x1373)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1375 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 3), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1376 = (x1375 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1377 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 3), - count._super), - 0) * - inv_0(x1376)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1378 = (x1373 * x1376); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1379 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 2), - count._super), - 0) * - x1376); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1380 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 4), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1381 = (x1380 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1382 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 4), - count._super), - 0) * - inv_0(x1381)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1383 = (((x1369 + x1374) + x1377) + x1382); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 9), x1383); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1384 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 9), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 8), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1385 = - (((x1384 * (x1378 * x1381)) - (x1379 * x1381)) - - ((x1373 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 3), - count._super), - 0)) * - x1381)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1385 - - (x1378 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 4), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1386 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 5), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1387 = (x1386 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1388 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 5), - count._super), - 0) * - inv_0(x1387)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1389 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 6), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1390 = (x1389 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1391 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 6), - count._super), - 0) * - inv_0(x1390)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1392 = (x1387 * x1390); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1393 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 5), - count._super), - 0) * - x1390); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1394 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 7), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1395 = (x1394 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1396 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 7), - count._super), - 0) * - inv_0(x1395)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1397 = (((x1383 + x1388) + x1391) + x1396); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 10), x1397); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1398 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 10), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 9), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1399 = - (((x1398 * (x1392 * x1395)) - (x1393 * x1395)) - - ((x1387 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 6), - count._super), - 0)) * - x1395)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1399 - - (x1392 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 7), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1400 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 8), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1401 = (x1400 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1402 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 8), - count._super), - 0) * - inv_0(x1401)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1403 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 9), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1404 = (x1403 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1405 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 9), - count._super), - 0) * - inv_0(x1404)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1406 = (x1401 * x1404); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1407 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 8), - count._super), - 0) * - x1404); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1408 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 10), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1409 = (x1408 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1410 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 10), - count._super), - 0) * - inv_0(x1409)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1411 = (((x1397 + x1402) + x1405) + x1410); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 11), x1411); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1412 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 11), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 10), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1413 = - (((x1412 * (x1406 * x1409)) - (x1407 * x1409)) - - ((x1401 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 9), - count._super), - 0)) * - x1409)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1413 - - (x1406 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 10), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1414 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 11), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1415 = (x1414 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1416 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 11), - count._super), - 0) * - inv_0(x1415)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1417 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 12), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1418 = (x1417 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1419 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 12), - count._super), - 0) * - inv_0(x1418)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1420 = (x1415 * x1418); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1421 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 11), - count._super), - 0) * - x1418); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1422 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 13), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1423 = (x1422 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1424 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 13), - count._super), - 0) * - inv_0(x1423)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1425 = (((x1411 + x1416) + x1419) + x1424); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 12), x1425); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1426 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 12), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 11), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1427 = - (((x1426 * (x1420 * x1423)) - (x1421 * x1423)) - - ((x1415 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 12), - count._super), - 0)) * - x1423)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1427 - - (x1420 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 13), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1428 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 14), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1429 = (x1428 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1430 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 14), - count._super), - 0) * - inv_0(x1429)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1431 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 15), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1432 = (x1431 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1433 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 15), - count._super), - 0) * - inv_0(x1432)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1434 = (x1429 * x1432); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1435 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 14), - count._super), - 0) * - x1432); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1436 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 0), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1437 = (x1436 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1438 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 0), - count._super), - 0) * - inv_0(x1437)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1439 = (((x1425 + x1430) + x1433) + x1438); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 13), x1439); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1440 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 13), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 12), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1441 = - (((x1440 * (x1434 * x1437)) - (x1435 * x1437)) - - ((x1429 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 15), - count._super), - 0)) * - x1437)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1441 - - (x1434 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 0), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1442 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 1), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1443 = (x1442 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1444 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 1), - count._super), - 0) * - inv_0(x1443)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1445 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 2), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1446 = (x1445 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1447 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 2), - count._super), - 0) * - inv_0(x1446)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1448 = (x1443 * x1446); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1449 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 1), - count._super), - 0) * - x1446); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1450 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 3), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1451 = (x1450 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1452 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 3), - count._super), - 0) * - inv_0(x1451)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1453 = (((x1439 + x1444) + x1447) + x1452); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 14), x1453); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1454 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 14), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 13), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1455 = - (((x1454 * (x1448 * x1451)) - (x1449 * x1451)) - - ((x1443 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 2), - count._super), - 0)) * - x1451)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1455 - - (x1448 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 3), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1456 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 4), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1457 = (x1456 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1458 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 4), - count._super), - 0) * - inv_0(x1457)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1459 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 5), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1460 = (x1459 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1461 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 5), - count._super), - 0) * - inv_0(x1460)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1462 = (x1457 * x1460); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1463 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 4), - count._super), - 0) * - x1460); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1464 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 6), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1465 = (x1464 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1466 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 6), - count._super), - 0) * - inv_0(x1465)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1467 = (((x1453 + x1458) + x1461) + x1466); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 15), x1467); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1468 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 15), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 14), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1469 = - (((x1468 * (x1462 * x1465)) - (x1463 * x1465)) - - ((x1457 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 5), - count._super), - 0)) * - x1465)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1469 - - (x1462 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 6), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1470 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 7), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1471 = (x1470 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1472 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 7), - count._super), - 0) * - inv_0(x1471)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1473 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 8), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1474 = (x1473 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1475 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 8), - count._super), - 0) * - inv_0(x1474)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1476 = (x1471 * x1474); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1477 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 7), - count._super), - 0) * - x1474); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1478 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 9), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1479 = (x1478 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1480 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 9), - count._super), - 0) * - inv_0(x1479)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1481 = (((x1467 + x1472) + x1475) + x1480); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 16), x1481); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1482 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 16), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 15), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1483 = - (((x1482 * (x1476 * x1479)) - (x1477 * x1479)) - - ((x1471 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 8), - count._super), - 0)) * - x1479)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1483 - - (x1476 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 9), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1484 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 10), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1485 = (x1484 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1486 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 10), - count._super), - 0) * - inv_0(x1485)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1487 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 11), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1488 = (x1487 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1489 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 11), - count._super), - 0) * - inv_0(x1488)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1490 = (x1485 * x1488); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1491 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 10), - count._super), - 0) * - x1488); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1492 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 12), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1493 = (x1492 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1494 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 12), - count._super), - 0) * - inv_0(x1493)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1495 = (((x1481 + x1486) + x1489) + x1494); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 17), x1495); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1496 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 17), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 16), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1497 = - (((x1496 * (x1490 * x1493)) - (x1491 * x1493)) - - ((x1485 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 11), - count._super), - 0)) * - x1493)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1497 - - (x1490 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 12), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1498 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 13), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1499 = (x1498 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1500 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 13), - count._super), - 0) * - inv_0(x1499)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1501 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 14), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1502 = (x1501 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1503 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 14), - count._super), - 0) * - inv_0(x1502)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1504 = (x1499 * x1502); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1505 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 13), - count._super), - 0) * - x1502); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1506 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 15), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1507 = (x1506 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1508 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 15), - count._super), - 0) * - inv_0(x1507)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1509 = (((x1495 + x1500) + x1503) + x1508); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 18), x1509); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1510 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 18), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 17), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1511 = - (((x1510 * (x1504 * x1507)) - (x1505 * x1507)) - - ((x1499 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 14), - count._super), - 0)) * - x1507)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1511 - - (x1504 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 15), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - x5 = x4; - } else if (to_size_t( - LOAD(LAYOUT_LOOKUP(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(arg0, instResult._selector), 8), - _super), - 0))) { - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1512 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm8.pcAddr.upperDiff.ret.arg.val._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1513 = (x1512 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1514 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm8.pcAddr.upperDiff.ret.arg.count._super), 0) * - inv_0(x1513)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1515 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 18), 1) + x1514); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1516 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm8.pcAddr.med14.arg.val._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1517 = (x1516 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1518 = (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm8.pcAddr.med14.arg.count._super), 0) * - inv_0(x1517)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1519 = (x1513 * x1517); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1520 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm8.pcAddr.upperDiff.ret.arg.count._super), 0) * - x1517); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1521 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 0), - addr._super), - 0)); - ExtVal x1522 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 0), - cycle._super), - 0)); - ExtVal x1523 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 0), - dataLow._super), - 0)); - ExtVal x1524 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 0), - dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1525 = (((x1521 + x1522) + x1523) + x1524); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1526 = (x1525 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1527 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 0), - count._super), - 0) * - inv_0(x1526)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1528 = ((x1515 + x1518) + x1527); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 0), x1528); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1529 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 0), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 18), 1)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1530 = - (((x1529 * (x1519 * x1526)) - (x1520 * x1526)) - - ((x1513 * LOAD(LAYOUT_LOOKUP(arg0, instResult.arm8.pcAddr.med14.arg.count._super), 0)) * - x1526)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1530 - - (x1519 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 0), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1531 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 1), - addr._super), - 0)); - ExtVal x1532 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 1), - cycle._super), - 0)); - ExtVal x1533 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 1), - dataLow._super), - 0)); - ExtVal x1534 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 1), - dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1535 = (((x1531 + x1532) + x1533) + x1534); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1536 = (x1535 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1537 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 1), - count._super), - 0) * - inv_0(x1536)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1538 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 2), - addr._super), - 0)); - ExtVal x1539 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 2), - cycle._super), - 0)); - ExtVal x1540 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 2), - dataLow._super), - 0)); - ExtVal x1541 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 2), - dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1542 = (((x1538 + x1539) + x1540) + x1541); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1543 = (x1542 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1544 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 2), - count._super), - 0) * - inv_0(x1543)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1545 = (x1536 * x1543); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1546 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 1), - count._super), - 0) * - x1543); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1547 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 3), - addr._super), - 0)); - ExtVal x1548 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 3), - cycle._super), - 0)); - ExtVal x1549 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 3), - dataLow._super), - 0)); - ExtVal x1550 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 3), - dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1551 = (((x1547 + x1548) + x1549) + x1550); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1552 = (x1551 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1553 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 3), - count._super), - 0) * - inv_0(x1552)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1554 = (((x1528 + x1537) + x1544) + x1553); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 1), x1554); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1555 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 1), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 0), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1556 = - (((x1555 * (x1545 * x1552)) - (x1546 * x1552)) - - ((x1536 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 2), - count._super), - 0)) * - x1552)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1556 - - (x1545 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 3), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1557 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 4), - addr._super), - 0)); - ExtVal x1558 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 4), - cycle._super), - 0)); - ExtVal x1559 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 4), - dataLow._super), - 0)); - ExtVal x1560 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 4), - dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1561 = (((x1557 + x1558) + x1559) + x1560); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1562 = (x1561 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1563 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 4), - count._super), - 0) * - inv_0(x1562)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1564 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 5), - addr._super), - 0)); - ExtVal x1565 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 5), - cycle._super), - 0)); - ExtVal x1566 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 5), - dataLow._super), - 0)); - ExtVal x1567 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 5), - dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1568 = (((x1564 + x1565) + x1566) + x1567); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1569 = (x1568 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1570 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 5), - count._super), - 0) * - inv_0(x1569)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1571 = (x1562 * x1569); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1572 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 4), - count._super), - 0) * - x1569); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1573 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 6), - addr._super), - 0)); - ExtVal x1574 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 6), - cycle._super), - 0)); - ExtVal x1575 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 6), - dataLow._super), - 0)); - ExtVal x1576 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 6), - dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1577 = (((x1573 + x1574) + x1575) + x1576); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1578 = (x1577 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1579 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 6), - count._super), - 0) * - inv_0(x1578)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1580 = (((x1554 + x1563) + x1570) + x1579); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 2), x1580); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1581 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 2), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 1), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1582 = - (((x1581 * (x1571 * x1578)) - (x1572 * x1578)) - - ((x1562 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 5), - count._super), - 0)) * - x1578)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1582 - - (x1571 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 6), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1583 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 7), - addr._super), - 0)); - ExtVal x1584 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 7), - cycle._super), - 0)); - ExtVal x1585 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 7), - dataLow._super), - 0)); - ExtVal x1586 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 7), - dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1587 = (((x1583 + x1584) + x1585) + x1586); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1588 = (x1587 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1589 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 7), - count._super), - 0) * - inv_0(x1588)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1590 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.cycleArg), 0), - cycle._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1591 = (x1590 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1592 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.cycleArg), 0), - count._super), - 0) * - inv_0(x1591)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1593 = (x1588 * x1591); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1594 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 7), - count._super), - 0) * - x1591); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1595 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.cycleArg), 1), - cycle._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1596 = (x1595 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1597 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.cycleArg), 1), - count._super), - 0) * - inv_0(x1596)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1598 = (((x1580 + x1589) + x1592) + x1597); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 3), x1598); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1599 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 3), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 2), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1600 = - (((x1599 * (x1593 * x1596)) - (x1594 * x1596)) - - ((x1588 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.cycleArg), 0), - count._super), - 0)) * - x1596)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1600 - - (x1593 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.cycleArg), 1), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1601 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.cycleArg), 2), - cycle._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1602 = (x1601 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1603 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.cycleArg), 2), - count._super), - 0) * - inv_0(x1602)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1604 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.cycleArg), 3), - cycle._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1605 = (x1604 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1606 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.cycleArg), 3), - count._super), - 0) * - inv_0(x1605)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1607 = (x1602 * x1605); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1608 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.cycleArg), 2), - count._super), - 0) * - x1605); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1609 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.argU16), 0), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1610 = (x1609 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1611 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.argU16), 0), - count._super), - 0) * - inv_0(x1610)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1612 = (((x1598 + x1603) + x1606) + x1611); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 4), x1612); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1613 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 4), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 3), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1614 = - (((x1613 * (x1607 * x1610)) - (x1608 * x1610)) - - ((x1602 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.cycleArg), 3), - count._super), - 0)) * - x1610)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1614 - - (x1607 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.argU16), 0), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1615 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.argU16), 1), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1616 = (x1615 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1617 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.argU16), 1), - count._super), - 0) * - inv_0(x1616)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1618 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm8.addPC.low16.arg.val._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1619 = (x1618 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1620 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm8.addPC.low16.arg.count._super), 0) * inv_0(x1619)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1621 = (x1616 * x1619); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1622 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.argU16), 1), - count._super), - 0) * - x1619); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1623 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm8.addPC.high16.arg.val._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1624 = (x1623 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1625 = (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm8.addPC.high16.arg.count._super), 0) * - inv_0(x1624)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1626 = (((x1612 + x1617) + x1620) + x1625); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 5), x1626); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1627 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 5), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 4), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1628 = - (((x1627 * (x1621 * x1624)) - (x1622 * x1624)) - - ((x1616 * LOAD(LAYOUT_LOOKUP(arg0, instResult.arm8.addPC.low16.arg.count._super), 0)) * - x1624)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1628 - - (x1621 * LOAD(LAYOUT_LOOKUP(arg0, instResult.arm8.addPC.high16.arg.count._super), 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1629 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm8.arg.cycle._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1630 = (x1629 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1631 = (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm8.arg.count._super), 0) * inv_0(x1630)); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 6), (x1626 + x1631)); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1632 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 6), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 5), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1633 = - ((x1632 * x1630) - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm8.arg.count._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ(x1633, "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:122 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 18), - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 6), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:124 - ExtVal x1634 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 18), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 6), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:125 - EQZ(x1634, "zirgen/dsl/passes/GenerateAccum.cpp:125"); - x5 = x4; - } else if (to_size_t( - LOAD(LAYOUT_LOOKUP(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(arg0, instResult._selector), 9), - _super), - 0))) { - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1635 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 0), - addr._super), - 0)); - ExtVal x1636 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 0), - cycle._super), - 0)); - ExtVal x1637 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 0), - dataLow._super), - 0)); - ExtVal x1638 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 0), - dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1639 = (((x1635 + x1636) + x1637) + x1638); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1640 = (x1639 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1641 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 0), - count._super), - 0) * - inv_0(x1640)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1642 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 18), 1) + x1641); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1643 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 1), - addr._super), - 0)); - ExtVal x1644 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 1), - cycle._super), - 0)); - ExtVal x1645 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 1), - dataLow._super), - 0)); - ExtVal x1646 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 1), - dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1647 = (((x1643 + x1644) + x1645) + x1646); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1648 = (x1647 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1649 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 1), - count._super), - 0) * - inv_0(x1648)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1650 = (x1640 * x1648); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1651 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 0), - count._super), - 0) * - x1648); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1652 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 2), - addr._super), - 0)); - ExtVal x1653 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 2), - cycle._super), - 0)); - ExtVal x1654 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 2), - dataLow._super), - 0)); - ExtVal x1655 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 2), - dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1656 = (((x1652 + x1653) + x1654) + x1655); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1657 = (x1656 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1658 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 2), - count._super), - 0) * - inv_0(x1657)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1659 = ((x1642 + x1649) + x1658); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 0), x1659); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1660 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 0), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 18), 1)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1661 = - (((x1660 * (x1650 * x1657)) - (x1651 * x1657)) - - ((x1640 * - LOAD( - LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 1), - count._super), - 0)) * - x1657)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1661 - - (x1650 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 2), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1662 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 3), - addr._super), - 0)); - ExtVal x1663 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 3), - cycle._super), - 0)); - ExtVal x1664 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 3), - dataLow._super), - 0)); - ExtVal x1665 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 3), - dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1666 = (((x1662 + x1663) + x1664) + x1665); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1667 = (x1666 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1668 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 3), - count._super), - 0) * - inv_0(x1667)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1669 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 4), - addr._super), - 0)); - ExtVal x1670 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 4), - cycle._super), - 0)); - ExtVal x1671 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 4), - dataLow._super), - 0)); - ExtVal x1672 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 4), - dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1673 = (((x1669 + x1670) + x1671) + x1672); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1674 = (x1673 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1675 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 4), - count._super), - 0) * - inv_0(x1674)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1676 = (x1667 * x1674); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1677 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 3), - count._super), - 0) * - x1674); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1678 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 5), - addr._super), - 0)); - ExtVal x1679 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 5), - cycle._super), - 0)); - ExtVal x1680 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 5), - dataLow._super), - 0)); - ExtVal x1681 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 5), - dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1682 = (((x1678 + x1679) + x1680) + x1681); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1683 = (x1682 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1684 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 5), - count._super), - 0) * - inv_0(x1683)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1685 = (((x1659 + x1668) + x1675) + x1684); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 1), x1685); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1686 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 1), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 0), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1687 = - (((x1686 * (x1676 * x1683)) - (x1677 * x1683)) - - ((x1667 * - LOAD( - LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 4), - count._super), - 0)) * - x1683)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1687 - - (x1676 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 5), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1688 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 6), - addr._super), - 0)); - ExtVal x1689 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 6), - cycle._super), - 0)); - ExtVal x1690 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 6), - dataLow._super), - 0)); - ExtVal x1691 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 6), - dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1692 = (((x1688 + x1689) + x1690) + x1691); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1693 = (x1692 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1694 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 6), - count._super), - 0) * - inv_0(x1693)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1695 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 7), - addr._super), - 0)); - ExtVal x1696 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 7), - cycle._super), - 0)); - ExtVal x1697 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 7), - dataLow._super), - 0)); - ExtVal x1698 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 7), - dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1699 = (((x1695 + x1696) + x1697) + x1698); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1700 = (x1699 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1701 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 7), - count._super), - 0) * - inv_0(x1700)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1702 = (x1693 * x1700); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1703 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 6), - count._super), - 0) * - x1700); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1704 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 8), - addr._super), - 0)); - ExtVal x1705 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 8), - cycle._super), - 0)); - ExtVal x1706 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 8), - dataLow._super), - 0)); - ExtVal x1707 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 8), - dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1708 = (((x1704 + x1705) + x1706) + x1707); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1709 = (x1708 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1710 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 8), - count._super), - 0) * - inv_0(x1709)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1711 = (((x1685 + x1694) + x1701) + x1710); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 2), x1711); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1712 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 2), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 1), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1713 = - (((x1712 * (x1702 * x1709)) - (x1703 * x1709)) - - ((x1693 * - LOAD( - LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 7), - count._super), - 0)) * - x1709)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1713 - - (x1702 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 8), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1714 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 9), - addr._super), - 0)); - ExtVal x1715 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 9), - cycle._super), - 0)); - ExtVal x1716 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 9), - dataLow._super), - 0)); - ExtVal x1717 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 9), - dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1718 = (((x1714 + x1715) + x1716) + x1717); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1719 = (x1718 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1720 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 9), - count._super), - 0) * - inv_0(x1719)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1721 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 10), - addr._super), - 0)); - ExtVal x1722 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 10), - cycle._super), - 0)); - ExtVal x1723 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 10), - dataLow._super), - 0)); - ExtVal x1724 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 10), - dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1725 = (((x1721 + x1722) + x1723) + x1724); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1726 = (x1725 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1727 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 10), - count._super), - 0) * - inv_0(x1726)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1728 = (x1719 * x1726); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1729 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 9), - count._super), - 0) * - x1726); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1730 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 11), - addr._super), - 0)); - ExtVal x1731 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 11), - cycle._super), - 0)); - ExtVal x1732 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 11), - dataLow._super), - 0)); - ExtVal x1733 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 11), - dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1734 = (((x1730 + x1731) + x1732) + x1733); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1735 = (x1734 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1736 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 11), - count._super), - 0) * - inv_0(x1735)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1737 = (((x1711 + x1720) + x1727) + x1736); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 3), x1737); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1738 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 3), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 2), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1739 = - (((x1738 * (x1728 * x1735)) - (x1729 * x1735)) - - ((x1719 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), - 10), - count._super), - 0)) * - x1735)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1739 - - (x1728 * - LOAD( - LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 11), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1740 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 12), - addr._super), - 0)); - ExtVal x1741 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 12), - cycle._super), - 0)); - ExtVal x1742 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 12), - dataLow._super), - 0)); - ExtVal x1743 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 12), - dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1744 = (((x1740 + x1741) + x1742) + x1743); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1745 = (x1744 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1746 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 12), - count._super), - 0) * - inv_0(x1745)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1747 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 13), - addr._super), - 0)); - ExtVal x1748 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 13), - cycle._super), - 0)); - ExtVal x1749 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 13), - dataLow._super), - 0)); - ExtVal x1750 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 13), - dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1751 = (((x1747 + x1748) + x1749) + x1750); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1752 = (x1751 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1753 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 13), - count._super), - 0) * - inv_0(x1752)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1754 = (x1745 * x1752); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1755 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 12), - count._super), - 0) * - x1752); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1756 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 14), - addr._super), - 0)); - ExtVal x1757 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 14), - cycle._super), - 0)); - ExtVal x1758 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 14), - dataLow._super), - 0)); - ExtVal x1759 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 14), - dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1760 = (((x1756 + x1757) + x1758) + x1759); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1761 = (x1760 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1762 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 14), - count._super), - 0) * - inv_0(x1761)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1763 = (((x1737 + x1746) + x1753) + x1762); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 4), x1763); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1764 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 4), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 3), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1765 = - (((x1764 * (x1754 * x1761)) - (x1755 * x1761)) - - ((x1745 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), - 13), - count._super), - 0)) * - x1761)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1765 - - (x1754 * - LOAD( - LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 14), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1766 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 15), - addr._super), - 0)); - ExtVal x1767 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 15), - cycle._super), - 0)); - ExtVal x1768 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 15), - dataLow._super), - 0)); - ExtVal x1769 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 15), - dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1770 = (((x1766 + x1767) + x1768) + x1769); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1771 = (x1770 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1772 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 15), - count._super), - 0) * - inv_0(x1771)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1773 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.cycleArg), 0), - cycle._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1774 = (x1773 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1775 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.cycleArg), 0), - count._super), - 0) * - inv_0(x1774)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1776 = (x1771 * x1774); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1777 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 15), - count._super), - 0) * - x1774); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1778 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.cycleArg), 1), - cycle._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1779 = (x1778 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1780 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.cycleArg), 1), - count._super), - 0) * - inv_0(x1779)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1781 = (((x1763 + x1772) + x1775) + x1780); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 5), x1781); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1782 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 5), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 4), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1783 = - (((x1782 * (x1776 * x1779)) - (x1777 * x1779)) - - ((x1771 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.cycleArg), 0), - count._super), - 0)) * - x1779)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1783 - - (x1776 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.cycleArg), 1), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1784 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.cycleArg), 2), - cycle._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1785 = (x1784 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1786 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.cycleArg), 2), - count._super), - 0) * - inv_0(x1785)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1787 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.cycleArg), 3), - cycle._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1788 = (x1787 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1789 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.cycleArg), 3), - count._super), - 0) * - inv_0(x1788)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1790 = (x1785 * x1788); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1791 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.cycleArg), 2), - count._super), - 0) * - x1788); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1792 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.cycleArg), 4), - cycle._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1793 = (x1792 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1794 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.cycleArg), 4), - count._super), - 0) * - inv_0(x1793)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1795 = (((x1781 + x1786) + x1789) + x1794); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 6), x1795); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1796 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 6), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 5), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1797 = - (((x1796 * (x1790 * x1793)) - (x1791 * x1793)) - - ((x1785 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.cycleArg), 3), - count._super), - 0)) * - x1793)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1797 - - (x1790 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.cycleArg), 4), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1798 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.cycleArg), 5), - cycle._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1799 = (x1798 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1800 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.cycleArg), 5), - count._super), - 0) * - inv_0(x1799)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1801 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.cycleArg), 6), - cycle._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1802 = (x1801 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1803 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.cycleArg), 6), - count._super), - 0) * - inv_0(x1802)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1804 = (x1799 * x1802); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1805 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.cycleArg), 5), - count._super), - 0) * - x1802); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1806 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.cycleArg), 7), - cycle._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1807 = (x1806 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1808 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.cycleArg), 7), - count._super), - 0) * - inv_0(x1807)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1809 = (((x1795 + x1800) + x1803) + x1808); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 7), x1809); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1810 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 7), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 6), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1811 = - (((x1810 * (x1804 * x1807)) - (x1805 * x1807)) - - ((x1799 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.cycleArg), 6), - count._super), - 0)) * - x1807)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1811 - - (x1804 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.cycleArg), 7), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1812 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 0), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1813 = (x1812 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1814 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 0), - count._super), - 0) * - inv_0(x1813)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1815 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 1), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1816 = (x1815 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1817 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 1), - count._super), - 0) * - inv_0(x1816)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1818 = (x1813 * x1816); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1819 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 0), - count._super), - 0) * - x1816); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1820 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 2), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1821 = (x1820 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1822 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 2), - count._super), - 0) * - inv_0(x1821)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1823 = (((x1809 + x1814) + x1817) + x1822); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 8), x1823); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1824 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 8), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 7), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1825 = - (((x1824 * (x1818 * x1821)) - (x1819 * x1821)) - - ((x1813 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 1), - count._super), - 0)) * - x1821)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1825 - - (x1818 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 2), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1826 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 3), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1827 = (x1826 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1828 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 3), - count._super), - 0) * - inv_0(x1827)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1829 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 4), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1830 = (x1829 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1831 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 4), - count._super), - 0) * - inv_0(x1830)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1832 = (x1827 * x1830); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1833 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 3), - count._super), - 0) * - x1830); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1834 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 5), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1835 = (x1834 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1836 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 5), - count._super), - 0) * - inv_0(x1835)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1837 = (((x1823 + x1828) + x1831) + x1836); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 9), x1837); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1838 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 9), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 8), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1839 = - (((x1838 * (x1832 * x1835)) - (x1833 * x1835)) - - ((x1827 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 4), - count._super), - 0)) * - x1835)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1839 - - (x1832 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 5), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1840 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 6), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1841 = (x1840 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1842 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 6), - count._super), - 0) * - inv_0(x1841)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1843 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 7), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1844 = (x1843 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1845 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 7), - count._super), - 0) * - inv_0(x1844)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1846 = (x1841 * x1844); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1847 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 6), - count._super), - 0) * - x1844); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1848 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 8), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1849 = (x1848 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1850 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 8), - count._super), - 0) * - inv_0(x1849)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1851 = (((x1837 + x1842) + x1845) + x1850); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 10), x1851); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1852 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 10), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 9), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1853 = - (((x1852 * (x1846 * x1849)) - (x1847 * x1849)) - - ((x1841 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 7), - count._super), - 0)) * - x1849)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1853 - - (x1846 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 8), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1854 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 9), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1855 = (x1854 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1856 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 9), - count._super), - 0) * - inv_0(x1855)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1857 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 10), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1858 = (x1857 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1859 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 10), - count._super), - 0) * - inv_0(x1858)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1860 = (x1855 * x1858); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1861 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 9), - count._super), - 0) * - x1858); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1862 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 11), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1863 = (x1862 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1864 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 11), - count._super), - 0) * - inv_0(x1863)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1865 = (((x1851 + x1856) + x1859) + x1864); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 11), x1865); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1866 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 11), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 10), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1867 = - (((x1866 * (x1860 * x1863)) - (x1861 * x1863)) - - ((x1855 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 10), - count._super), - 0)) * - x1863)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1867 - - (x1860 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 11), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1868 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 12), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1869 = (x1868 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1870 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 12), - count._super), - 0) * - inv_0(x1869)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1871 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 13), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1872 = (x1871 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1873 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 13), - count._super), - 0) * - inv_0(x1872)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1874 = (x1869 * x1872); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1875 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 12), - count._super), - 0) * - x1872); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1876 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 14), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1877 = (x1876 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1878 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 14), - count._super), - 0) * - inv_0(x1877)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1879 = (((x1865 + x1870) + x1873) + x1878); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 12), x1879); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1880 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 12), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 11), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1881 = - (((x1880 * (x1874 * x1877)) - (x1875 * x1877)) - - ((x1869 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 13), - count._super), - 0)) * - x1877)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1881 - - (x1874 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 14), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1882 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 15), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1883 = (x1882 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1884 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 15), - count._super), - 0) * - inv_0(x1883)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1885 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU8), 0), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1886 = (x1885 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1887 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU8), 0), - count._super), - 0) * - inv_0(x1886)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1888 = (x1883 * x1886); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1889 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 15), - count._super), - 0) * - x1886); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1890 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU8), 1), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1891 = (x1890 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1892 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU8), 1), - count._super), - 0) * - inv_0(x1891)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1893 = (((x1879 + x1884) + x1887) + x1892); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 13), x1893); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1894 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 13), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 12), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1895 = - (((x1894 * (x1888 * x1891)) - (x1889 * x1891)) - - ((x1883 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU8), 0), - count._super), - 0)) * - x1891)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1895 - - (x1888 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU8), 1), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1896 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm9.arg.cycle._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1897 = (x1896 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1898 = (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm9.arg.count._super), 0) * inv_0(x1897)); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 14), (x1893 + x1898)); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1899 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 14), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 13), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1900 = - ((x1899 * x1897) - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm9.arg.count._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ(x1900, "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:122 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 18), - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 14), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:124 - ExtVal x1901 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 18), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 14), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:125 - EQZ(x1901, "zirgen/dsl/passes/GenerateAccum.cpp:125"); - x5 = x4; - } else if (to_size_t( - LOAD(LAYOUT_LOOKUP(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(arg0, instResult._selector), 10), - _super), - 0))) { - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1902 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm10.arg.cycle._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1903 = (x1902 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1904 = (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm10.arg.count._super), 0) * inv_0(x1903)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1905 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 18), 1) + x1904); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 0), x1905); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1906 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 0), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 18), 1)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1907 = - ((x1906 * x1903) - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm10.arg.count._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ(x1907, "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:122 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 18), - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 0), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:124 - ExtVal x1908 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 18), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 0), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:125 - EQZ(x1908, "zirgen/dsl/passes/GenerateAccum.cpp:125"); - x5 = x4; - } else { - assert(0 && "Reached unreachable mux arm"); - } - return x4; -} -__device__ void -step_TopAccum(ExecContext& ctx, MutableBuf accum0, MutableBuf data1, GlobalBuf mix2) { - // zirgen/dsl/passes/GenerateAccum.cpp:526 - BoundLayout x3 = BIND_LAYOUT(kLayout_Top, data1); - BoundLayout x4 = BIND_LAYOUT(kLayout_TopAccum, accum0); - ComponentStruct x5 = exec_TopAccum(ctx, x3, x4, mix2); - return; -} - -} // namespace risc0::circuit::rv32im_v2::cuda diff --git a/risc0/circuit/rv32im-v2-sys/kernels/cuda/steps.cuh b/risc0/circuit/rv32im-v2-sys/kernels/cuda/steps.cuh deleted file mode 100644 index 26d6f1e8..00000000 --- a/risc0/circuit/rv32im-v2-sys/kernels/cuda/steps.cuh +++ /dev/null @@ -1,632 +0,0 @@ -// Copyright 2024 RISC Zero, Inc. -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include "witgen.h" - -namespace risc0::circuit::rv32im_v2::cuda { -extern __device__ NondetRegStruct back_NondetReg(ExecContext& ctx, - Index distance0, - BoundLayout layout1); -extern __device__ NondetRegStruct exec_NondetReg(ExecContext& ctx, - Val arg0, - BoundLayout layout1); -extern __device__ NondetExtRegStruct back_NondetExtReg(ExecContext& ctx, - Index distance0, - BoundLayout layout1); -extern __device__ NondetExtRegStruct exec_NondetExtReg(ExecContext& ctx, - ExtVal arg0, - BoundLayout layout1); -extern __device__ RegStruct back_Reg(ExecContext& ctx, - Index distance0, - BoundLayout layout1); -extern __device__ RegStruct exec_Reg(ExecContext& ctx, - Val arg0, - BoundLayout layout1); -extern __device__ NondetExtRegStruct back_ExtReg(ExecContext& ctx, - Index distance0, - BoundLayout layout1); -extern __device__ NondetExtRegStruct exec_ExtReg(ExecContext& ctx, - ExtVal arg0, - BoundLayout layout1); -extern __device__ NondetRegStruct exec_NondetBitReg(ExecContext& ctx, - Val arg0, - BoundLayout layout1); -extern __device__ BitRegStruct exec_BitReg(ExecContext& ctx, - Val arg0, - BoundLayout layout1); -extern __device__ NondetRegStruct exec_NondetTwitReg(ExecContext& ctx, - Val arg0, - BoundLayout layout1); -extern __device__ NondetFakeTwitRegStruct -exec_NondetFakeTwitReg(ExecContext& ctx, Val arg0, BoundLayout layout1); -extern __device__ FakeTwitRegStruct exec_FakeTwitReg(ExecContext& ctx, - Val arg0, - BoundLayout layout1); -extern __device__ NondetRegStruct exec_IsZero(ExecContext& ctx, - Val arg0, - BoundLayout layout1); -extern __device__ ArgU8Struct exec_ArgU8(ExecContext& ctx, - Val arg0, - Val arg1, - BoundLayout layout2); -extern __device__ NondetRegStruct exec_NondetU8Reg(ExecContext& ctx, - Val arg0, - BoundLayout layout1); -extern __device__ U8RegStruct exec_U8Reg(ExecContext& ctx, - Val arg0, - BoundLayout layout1); -extern __device__ ArgU16Struct exec_ArgU16(ExecContext& ctx, - Val arg0, - Val arg1, - BoundLayout layout2); -extern __device__ NondetRegStruct exec_NondetU16Reg(ExecContext& ctx, - Val arg0, - BoundLayout layout1); -extern __device__ U16RegStruct exec_U16Reg(ExecContext& ctx, - Val arg0, - BoundLayout layout1); -extern __device__ ToBits_5_Struct exec_ToBits_5_(ExecContext& ctx, - Val arg0, - BoundLayout layout1); -extern __device__ ValU32Struct exec_DynPo2(ExecContext& ctx, - Val arg0, - BoundLayout layout1); -extern __device__ NormalizeU32Struct exec_NormalizeU32(ExecContext& ctx, - DenormedValU32Struct arg0, - BoundLayout layout1); -extern __device__ AddrDecomposeStruct exec_AddrDecompose(ExecContext& ctx, - ValU32Struct arg0, - Val arg1, - BoundLayout layout2); -extern __device__ AddrDecomposeBitsStruct exec_AddrDecomposeBits( - ExecContext& ctx, ValU32Struct arg0, Val arg1, BoundLayout layout2); -extern __device__ CmpEqualStruct exec_CmpEqual(ExecContext& ctx, - ValU32Struct arg0, - ValU32Struct arg1, - BoundLayout layout2); -extern __device__ CmpLessThanUnsignedStruct -exec_CmpLessThanUnsigned(ExecContext& ctx, - ValU32Struct arg0, - ValU32Struct arg1, - BoundLayout layout2); -extern __device__ NondetRegStruct exec_GetSignU32(ExecContext& ctx, - ValU32Struct arg0, - BoundLayout layout1); -extern __device__ CmpLessThanStruct exec_CmpLessThan(ExecContext& ctx, - ValU32Struct arg0, - ValU32Struct arg1, - BoundLayout layout2); -extern __device__ ToBits_16_Struct exec_ToBits_16_(ExecContext& ctx, - Val arg0, - BoundLayout layout1); -extern __device__ FromBits_16_Struct exec_BitwiseAndU16(ExecContext& ctx, - Val arg0, - Val arg1, - BoundLayout layout2); -extern __device__ ValU32Struct exec_BitwiseAnd(ExecContext& ctx, - ValU32Struct arg0, - ValU32Struct arg1, - BoundLayout layout2); -extern __device__ ValU32Struct exec_BitwiseOr(ExecContext& ctx, - ValU32Struct arg0, - ValU32Struct arg1, - BoundLayout layout2); -extern __device__ ValU32Struct exec_BitwiseXor(ExecContext& ctx, - ValU32Struct arg0, - ValU32Struct arg1, - BoundLayout layout2); -extern __device__ DecoderStruct exec_Decoder(ExecContext& ctx, - ValU32Struct arg0, - BoundLayout layout1); -extern __device__ MemoryArgStruct exec_MemoryArg(ExecContext& ctx, - Val arg0, - Val arg1, - Val arg2, - ValU32Struct arg3, - BoundLayout layout4); -extern __device__ CycleArgStruct exec_CycleArg(ExecContext& ctx, - Val arg0, - Val arg1, - BoundLayout layout2); -extern __device__ IsCycleStruct exec_IsCycle(ExecContext& ctx, - Val arg0, - BoundLayout layout1); -extern __device__ MemoryIOStruct exec_MemoryIO(ExecContext& ctx, - RegStruct arg0, - Val arg1, - BoundLayout layout2); -extern __device__ IsForwardStruct exec_IsForward(ExecContext& ctx, - MemoryIOStruct arg0, - BoundLayout layout1); -extern __device__ GetDataStruct exec_MemoryRead(ExecContext& ctx, - RegStruct arg0, - Val arg1, - BoundLayout layout2); -extern __device__ MemoryWriteStruct exec_MemoryWrite(ExecContext& ctx, - RegStruct arg0, - Val arg1, - ValU32Struct arg2, - BoundLayout layout3); -extern __device__ MemoryWriteUnconstrainedStruct -exec_MemoryWriteUnconstrained(ExecContext& ctx, - RegStruct arg0, - Val arg1, - BoundLayout layout2); -extern __device__ GetDataStruct exec_MemoryPageIn(ExecContext& ctx, - RegStruct arg0, - Val arg1, - BoundLayout layout2); -extern __device__ GetDataStruct exec_MemoryPageOut(ExecContext& ctx, - RegStruct arg0, - Val arg1, - BoundLayout layout2); -extern __device__ OneHot_3_Struct exec_OneHot_3_(ExecContext& ctx, - Val arg0, - BoundLayout layout1); -extern __device__ GetDataStruct exec_MemoryGet(ExecContext& ctx, - RegStruct arg0, - Val arg1, - OneHot_3_Struct arg2, - BoundLayout layout3); -extern __device__ OneHot_8_Struct exec_OneHot_8_(ExecContext& ctx, - Val arg0, - BoundLayout layout1); -extern __device__ InstInputStruct exec_InstInput(ExecContext& ctx, - Val arg0, - Val arg1, - Val arg2, - ValU32Struct arg3, - Val arg4, - Val arg5, - BoundLayout layout6); -extern __device__ DecoderStruct exec_DecodeInst(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2); -extern __device__ GetDataStruct exec_ReadReg(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - Val arg2, - BoundLayout layout3); -extern __device__ WriteRdStruct exec_WriteRd(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - DecoderStruct arg2, - Val arg3, - ValU32Struct arg4, - BoundLayout layout5); -extern __device__ ExpandU32Struct exec_ExpandU32(ExecContext& ctx, - ValU32Struct arg0, - Val arg1, - BoundLayout layout2); -extern __device__ SplitTotalStruct exec_SplitTotal(ExecContext& ctx, - Val arg0, - BoundLayout layout1); -extern __device__ MultiplyAccumulateStruct -exec_MultiplyAccumulate(ExecContext& ctx, - ValU32Struct arg0, - ValU32Struct arg1, - ValU32Struct arg2, - MultiplySettingsStruct arg3, - BoundLayout layout4); -extern __device__ DivInputStruct exec_DivInput(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2); -extern __device__ DivideReturnStruct exec_DoDiv(ExecContext& ctx, - ValU32Struct arg0, - ValU32Struct arg1, - Val arg2, - Val arg3, - BoundLayout layout4); -extern __device__ ValU32Struct exec_OpSRL(ExecContext& ctx, - DivInputStruct arg0, - BoundLayout layout1); -extern __device__ NondetRegStruct exec_TopBit(ExecContext& ctx, - ValU32Struct arg0, - BoundLayout layout1); -extern __device__ ValU32Struct exec_OpSRA(ExecContext& ctx, - DivInputStruct arg0, - BoundLayout layout1); -extern __device__ ValU32Struct exec_OpSRLI(ExecContext& ctx, - DivInputStruct arg0, - BoundLayout layout1); -extern __device__ ValU32Struct exec_OpSRAI(ExecContext& ctx, - DivInputStruct arg0, - BoundLayout layout1); -extern __device__ ValU32Struct exec_OpDIV(ExecContext& ctx, - DivInputStruct arg0, - BoundLayout layout1); -extern __device__ ValU32Struct exec_OpDIVU(ExecContext& ctx, - DivInputStruct arg0, - BoundLayout layout1); -extern __device__ ValU32Struct exec_OpREM(ExecContext& ctx, - DivInputStruct arg0, - BoundLayout layout1); -extern __device__ ValU32Struct exec_OpREMU(ExecContext& ctx, - DivInputStruct arg0, - BoundLayout layout1); -extern __device__ InstOutputStruct exec_Div0(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2); -extern __device__ MiscInputStruct exec_MiscInput(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2); -extern __device__ InstOutputStruct exec_FinalizeMisc(ExecContext& ctx, - RegStruct arg0, - MiscInputStruct arg1, - MiscOutputStruct arg2, - BoundLayout layout3); -extern __device__ MiscOutputStruct exec_OpXOR(ExecContext& ctx, - MiscInputStruct arg0, - BoundLayout layout1); -extern __device__ MiscOutputStruct exec_OpOR(ExecContext& ctx, - MiscInputStruct arg0, - BoundLayout layout1); -extern __device__ MiscOutputStruct exec_OpAND(ExecContext& ctx, - MiscInputStruct arg0, - BoundLayout layout1); -extern __device__ MiscOutputStruct exec_OpSLT(ExecContext& ctx, - MiscInputStruct arg0, - BoundLayout layout1); -extern __device__ MiscOutputStruct exec_OpSLTU(ExecContext& ctx, - MiscInputStruct arg0, - BoundLayout layout1); -extern __device__ InstOutputStruct exec_Misc0(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2); -extern __device__ MiscOutputStruct exec_OpXORI(ExecContext& ctx, - MiscInputStruct arg0, - BoundLayout layout1); -extern __device__ MiscOutputStruct exec_OpORI(ExecContext& ctx, - MiscInputStruct arg0, - BoundLayout layout1); -extern __device__ MiscOutputStruct exec_OpANDI(ExecContext& ctx, - MiscInputStruct arg0, - BoundLayout layout1); -extern __device__ MiscOutputStruct exec_OpSLTI(ExecContext& ctx, - MiscInputStruct arg0, - BoundLayout layout1); -extern __device__ MiscOutputStruct exec_OpSLTIU(ExecContext& ctx, - MiscInputStruct arg0, - BoundLayout layout1); -extern __device__ MiscOutputStruct exec_OpBEQ(ExecContext& ctx, - MiscInputStruct arg0, - BoundLayout layout1); -extern __device__ MiscOutputStruct exec_OpBNE(ExecContext& ctx, - MiscInputStruct arg0, - BoundLayout layout1); -extern __device__ MiscOutputStruct exec_OpBLT(ExecContext& ctx, - MiscInputStruct arg0, - BoundLayout layout1); -extern __device__ InstOutputStruct exec_Misc1(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2); -extern __device__ MiscOutputStruct exec_OpBGE(ExecContext& ctx, - MiscInputStruct arg0, - BoundLayout layout1); -extern __device__ MiscOutputStruct exec_OpBLTU(ExecContext& ctx, - MiscInputStruct arg0, - BoundLayout layout1); -extern __device__ MiscOutputStruct exec_OpBGEU(ExecContext& ctx, - MiscInputStruct arg0, - BoundLayout layout1); -extern __device__ InstOutputStruct exec_Misc2(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2); -extern __device__ MulInputStruct exec_MulInput(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2); -extern __device__ DoMulStruct exec_DoMul(ExecContext& ctx, - ValU32Struct arg0, - ValU32Struct arg1, - Val arg2, - Val arg3, - BoundLayout layout4); -extern __device__ ValU32Struct exec_OpSLL(ExecContext& ctx, - MulInputStruct arg0, - BoundLayout layout1); -extern __device__ ValU32Struct exec_OpSLLI(ExecContext& ctx, - MulInputStruct arg0, - BoundLayout layout1); -extern __device__ ValU32Struct exec_OpMUL(ExecContext& ctx, - MulInputStruct arg0, - BoundLayout layout1); -extern __device__ ValU32Struct exec_OpMULH(ExecContext& ctx, - MulInputStruct arg0, - BoundLayout layout1); -extern __device__ ValU32Struct exec_OpMULHSU(ExecContext& ctx, - MulInputStruct arg0, - BoundLayout layout1); -extern __device__ ValU32Struct exec_OpMULHU(ExecContext& ctx, - MulInputStruct arg0, - BoundLayout layout1); -extern __device__ InstOutputStruct exec_Mul0(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2); -extern __device__ MemLoadInputStruct exec_MemLoadInput(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2); -extern __device__ MemStoreInputStruct exec_MemStoreInput(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2); -extern __device__ MemStoreFinalizeStruct -exec_MemStoreFinalize(ExecContext& ctx, - RegStruct arg0, - MemStoreInputStruct arg1, - ValU32Struct arg2, - BoundLayout layout3); -extern __device__ SplitWordStruct exec_SplitWord(ExecContext& ctx, - Val arg0, - BoundLayout layout1); -extern __device__ ValU32Struct exec_OpLB(ExecContext& ctx, - MemLoadInputStruct arg0, - BoundLayout layout1); -extern __device__ ValU32Struct exec_OpLH(ExecContext& ctx, - MemLoadInputStruct arg0, - BoundLayout layout1); -extern __device__ ValU32Struct exec_OpLBU(ExecContext& ctx, - MemLoadInputStruct arg0, - BoundLayout layout1); -extern __device__ InstOutputStruct exec_Mem0(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2); -extern __device__ ValU32Struct exec_OpSB(ExecContext& ctx, - MemStoreInputStruct arg0, - BoundLayout layout1); -extern __device__ InstOutputStruct exec_Mem1(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2); -extern __device__ DigestRegStruct back_DigestReg(ExecContext& ctx, - Index distance0, - BoundLayout layout1); -extern __device__ DigestRegStruct exec_DigestReg(ExecContext& ctx, - ValU32Struct8Array arg0, - BoundLayout layout1); -extern __device__ InstOutputStruct exec_ControlLoadRoot(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2, - GlobalBuf global3); -extern __device__ InstOutputStruct exec_ControlResume(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2, - GlobalBuf global3); -extern __device__ InstOutputStruct -exec_ControlUserECALL(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2); -extern __device__ InstOutputStruct exec_ControlMRET(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2); -extern __device__ InstOutputStruct exec_ControlSuspend(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2, - GlobalBuf global3); -extern __device__ InstOutputStruct -exec_ControlStoreRoot(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2, - GlobalBuf global3); -extern __device__ InstOutputStruct exec_ControlTable(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2); -extern __device__ InstOutputStruct exec_Control0(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2, - GlobalBuf global3); -extern __device__ OneHot_4_Struct exec_OneHot_4_(ExecContext& ctx, - Val arg0, - BoundLayout layout1); -extern __device__ ECallOutputStruct exec_MachineECall(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - Val arg2, - BoundLayout layout3); -extern __device__ ECallOutputStruct exec_ECallTerminate(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2, - GlobalBuf global3); -extern __device__ DecomposeLow2Struct exec_DecomposeLow2(ExecContext& ctx, - Val arg0, - BoundLayout layout1); -extern __device__ ECallOutputStruct -exec_ECallHostReadSetup(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2); -extern __device__ ECallOutputStruct exec_ECallHostWrite(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2); -extern __device__ ECallOutputStruct -exec_ECallHostReadWords(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - Val arg2, - Val arg3, - BoundLayout layout4); -extern __device__ InstOutputStruct exec_ECall0(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2, - GlobalBuf global3); -extern __device__ RegStruct exec_SBox(ExecContext& ctx, Val arg0, BoundLayout layout1); -extern __device__ MultiplyByMIntStruct exec_DoIntRound(ExecContext& ctx, - Val24Array arg0, - Val arg1, - BoundLayout layout2); -extern __device__ DoIntRoundsStruct exec_DoIntRounds(ExecContext& ctx, - Val24Array arg0, - BoundLayout layout1); -extern __device__ MultiplyByMExtStruct exec_DoExtRound(ExecContext& ctx, - Val24Array arg0, - Val24Array arg1, - BoundLayout layout2); -extern __device__ MultiplyByMExtStruct exec_DoExtRoundByIdx( - ExecContext& ctx, Val24Array arg0, Val arg1, BoundLayout layout2); -extern __device__ PoseidonStateStruct back_PoseidonState(ExecContext& ctx, - Index distance0, - BoundLayout layout1); -extern __device__ PoseidonStateStruct exec_PoseidonState(ExecContext& ctx, - PoseidonOpDefStruct arg0, - Val arg1, - Val arg2, - Val arg3, - Val arg4, - Val arg5, - Val24Array arg6, - ExtVal arg7, - BoundLayout layout8); -extern __device__ PoseidonStateStruct -exec_PoseidonInvalid(ExecContext& ctx, BoundLayout layout0); -extern __device__ ReadAddrStruct exec_ReadAddr(ExecContext& ctx, - RegStruct arg0, - Val arg1, - BoundLayout layout2); -extern __device__ PoseidonStateStruct exec_PoseidonEcall(ExecContext& ctx, - RegStruct arg0, - Val arg1, - BoundLayout layout2); -extern __device__ PoseidonStateStruct exec_PoseidonPagingEntry( - ExecContext& ctx, RegStruct arg0, Val arg1, BoundLayout layout2); -extern __device__ PoseidonStateStruct exec_PoseidonEntry(ExecContext& ctx, - RegStruct arg0, - ValU32Struct arg1, - Val arg2, - BoundLayout layout3); -extern __device__ ReadElemStruct exec_ReadElem(ExecContext& ctx, - RegStruct arg0, - Val arg1, - BoundLayout layout2); -extern __device__ PoseidonStateStruct -exec_PoseidonLoadState(ExecContext& ctx, - RegStruct arg0, - PoseidonStateStruct arg1, - BoundLayout layout2); -extern __device__ PoseidonStateStruct -exec_PoseidonLoadInShort(ExecContext& ctx, - RegStruct arg0, - PoseidonStateStruct arg1, - BoundLayout layout2, - GlobalBuf global3); -extern __device__ PoseidonStateStruct -exec_PoseidonLoadInLow(ExecContext& ctx, - RegStruct arg0, - PoseidonStateStruct arg1, - BoundLayout layout2, - GlobalBuf global3); -extern __device__ PoseidonStateStruct -exec_PoseidonLoadInHigh(ExecContext& ctx, - RegStruct arg0, - PoseidonStateStruct arg1, - BoundLayout layout2, - GlobalBuf global3); -extern __device__ PoseidonStateStruct exec_PoseidonLoadIn(ExecContext& ctx, - RegStruct arg0, - PoseidonStateStruct arg1, - BoundLayout layout2, - GlobalBuf global3); -extern __device__ PoseidonStateStruct exec_PoseidonExtRound( - ExecContext& ctx, PoseidonStateStruct arg0, BoundLayout layout1); -extern __device__ PoseidonStateStruct exec_PoseidonIntRounds( - ExecContext& ctx, PoseidonStateStruct arg0, BoundLayout layout1); -extern __device__ PoseidonStateStruct -exec_PoseidonCheckOut(ExecContext& ctx, - RegStruct arg0, - PoseidonStateStruct arg1, - BoundLayout layout2); -extern __device__ PoseidonStateStruct -exec_PoseidonStoreOut(ExecContext& ctx, - RegStruct arg0, - PoseidonStateStruct arg1, - BoundLayout layout2); -extern __device__ PoseidonStateStruct exec_PoseidonDoOut(ExecContext& ctx, - RegStruct arg0, - PoseidonStateStruct arg1, - BoundLayout layout2); -extern __device__ PoseidonStateStruct -exec_PoseidonStoreState(ExecContext& ctx, - RegStruct arg0, - PoseidonStateStruct arg1, - BoundLayout layout2); -extern __device__ IsU24Struct exec_IsU24(ExecContext& ctx, - Val arg0, - BoundLayout layout1); -extern __device__ PoseidonStateStruct exec_PoseidonPagingLoadNode( - ExecContext& ctx, RegStruct arg0, Val arg1, BoundLayout layout2); -extern __device__ PoseidonStateStruct exec_PoseidonPagingLoadPage( - ExecContext& ctx, RegStruct arg0, Val arg1, BoundLayout layout2); -extern __device__ PoseidonStateStruct -exec_PoseidonPagingLoadDone(ExecContext& ctx, BoundLayout layout0); -extern __device__ PoseidonStateStruct exec_PoseidonPagingStoreNode( - ExecContext& ctx, RegStruct arg0, Val arg1, BoundLayout layout2); -extern __device__ PoseidonStateStruct exec_PoseidonPagingStorePage( - ExecContext& ctx, RegStruct arg0, Val arg1, BoundLayout layout2); -extern __device__ PoseidonStateStruct -exec_PoseidonPagingStoreDone(ExecContext& ctx, BoundLayout layout0); -extern __device__ OneHot_6_Struct exec_OneHot_6_(ExecContext& ctx, - Val arg0, - BoundLayout layout1); -extern __device__ PoseidonStateStruct -exec_PoseidonPaging(ExecContext& ctx, - RegStruct arg0, - Val arg1, - PoseidonStateStruct arg2, - BoundLayout layout3); -extern __device__ InstOutputStruct exec_Poseidon0(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2, - GlobalBuf global3); -extern __device__ InstOutputStruct exec_Poseidon1(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2); -extern __device__ OneHot_11_Struct exec_OneHot_11_(ExecContext& ctx, - Val arg0, - BoundLayout layout1); -extern __device__ TopStruct exec_Top(ExecContext& ctx, - BoundLayout layout0, - GlobalBuf global1); -extern __device__ void step_Top(ExecContext& ctx, MutableBuf data0, GlobalBuf global1); -extern __device__ ComponentStruct exec_TopAccum(ExecContext& ctx, - BoundLayout arg0, - BoundLayout layout1, - GlobalBuf mix2); -extern __device__ void -step_TopAccum(ExecContext& ctx, MutableBuf accum0, MutableBuf data1, GlobalBuf mix2); - -} // namespace risc0::circuit::rv32im_v2::cuda diff --git a/risc0/circuit/rv32im-v2-sys/kernels/cuda/tables.h b/risc0/circuit/rv32im-v2-sys/kernels/cuda/tables.h deleted file mode 100644 index 98ea5e64..00000000 --- a/risc0/circuit/rv32im-v2-sys/kernels/cuda/tables.h +++ /dev/null @@ -1,66 +0,0 @@ -// Copyright 2024 RISC Zero, Inc. -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include "fp.h" - -#include -#include -#include -#include - -namespace risc0::circuit::rv32im_v2::cuda { - -struct LookupTables { - ::cuda::atomic* tableU8; - ::cuda::atomic* tableU16; - - __device__ void lookupDelta(Fp table, Fp index, Fp count) { - uint32_t tableU32 = table.asUInt32(); - uint32_t indexU32 = index.asUInt32(); - if (tableU32 == 0) { - // tableCycle[index] += count; - return; - } - if (tableU32 != 8 && tableU32 != 16) { - assert(false && "Invalid lookup table"); - } - if (indexU32 >= (1 << tableU32)) { - printf("LOOKUP ERROR: table = %u, index = %u\n", tableU32, indexU32); - assert(false && "u8/16 table error"); - } - // printf("table = %u, index = %u\n", tableU32, indexU32); - if (tableU32 == 8) { - tableU8[indexU32]++; - } else { - tableU16[indexU32]++; - } - } - - __device__ Fp lookupCurrent(Fp table, Fp index) { - uint32_t tableU32 = table.asUInt32(); - if (tableU32 != 8 && tableU32 != 16) { - assert(false && "Invalid lookup table"); - } - uint32_t indexU32 = index.asUInt32(); - if (tableU32 == 8) { - return Fp(tableU8[indexU32]); - } else { - return Fp(tableU16[indexU32]); - } - } -}; - -} // namespace risc0::circuit::rv32im_v2::cuda diff --git a/risc0/circuit/rv32im-v2-sys/kernels/cuda/types.cuh.inc b/risc0/circuit/rv32im-v2-sys/kernels/cuda/types.cuh.inc deleted file mode 100644 index 0c33ccce..00000000 --- a/risc0/circuit/rv32im-v2-sys/kernels/cuda/types.cuh.inc +++ /dev/null @@ -1,2451 +0,0 @@ -struct NondetRegLayout { - Reg _super; -}; -using NondetRegLayout8LayoutArray = ::cuda::std::array; -struct OneHot_8_Layout { - NondetRegLayout8LayoutArray _super; -}; -struct InstInputLayout { - OneHot_8_Layout minorOnehot; -}; -using NondetRegLayout11LayoutArray = ::cuda::std::array; -struct OneHot_11_Layout { - NondetRegLayout11LayoutArray _super; -}; -struct ArgU16Layout { - NondetRegLayout count; - NondetRegLayout val; -}; -struct NondetU16RegLayout { - ArgU16Layout arg; -}; -struct NormalizeU32Layout { - NondetU16RegLayout low16; - NondetRegLayout lowCarry; - NondetU16RegLayout high16; - NondetRegLayout highCarry; -}; -struct MemoryArgLayout { - NondetRegLayout count; - NondetRegLayout addr; - NondetRegLayout cycle; - NondetRegLayout dataLow; - NondetRegLayout dataHigh; -}; -struct MemoryIOLayout { - MemoryArgLayout oldTxn; - MemoryArgLayout newTxn; -}; -struct CycleArgLayout { - NondetRegLayout count; - NondetRegLayout cycle; -}; -struct IsCycleLayout { - CycleArgLayout arg; -}; -struct IsForwardLayout { - IsCycleLayout _0; -}; -struct MemoryWriteLayout { - MemoryIOLayout io; - IsForwardLayout _0; -}; -struct IsZeroLayout { - NondetRegLayout _super; - NondetRegLayout inv; -}; -struct WriteRdLayout { - IsZeroLayout isRd0; - NondetRegLayout writeAddr; - MemoryWriteLayout _0; -}; -struct FinalizeMiscLayout { - NormalizeU32Layout writeData; - NormalizeU32Layout pcNorm; - WriteRdLayout _0; -}; -struct DecoderLayout { - NondetRegLayout _f7_6; - NondetRegLayout _f7_45; - NondetRegLayout _f7_23; - NondetRegLayout _f7_01; - NondetRegLayout _rs2_34; - NondetRegLayout _rs2_12; - NondetRegLayout _rs2_0; - NondetRegLayout _rs1_34; - NondetRegLayout _rs1_12; - NondetRegLayout _rs1_0; - NondetRegLayout _f3_2; - NondetRegLayout _f3_01; - NondetRegLayout _rd_34; - NondetRegLayout _rd_12; - NondetRegLayout _rd_0; - NondetRegLayout opcode; -}; -struct U16RegLayout { - NondetU16RegLayout ret; -}; -struct AddrDecomposeLayout { - NondetRegLayout low2; - U16RegLayout upperDiff; - IsZeroLayout _0; - NondetU16RegLayout med14; -}; -struct MemoryReadLayout { - MemoryIOLayout io; - IsForwardLayout _0; -}; -struct DecodeInstLayout { - DecoderLayout _super; - CycleArgLayout arg; - AddrDecomposeLayout pcAddr; - MemoryReadLayout loadInst; -}; -struct ReadRegLayout { - MemoryReadLayout _super; - NondetRegLayout addr; -}; -struct MiscInputLayout { - DecodeInstLayout decoded; - ReadRegLayout rs1; - ReadRegLayout rs2; -}; -using ArgU16Layout5LayoutArray = ::cuda::std::array; -struct _Arguments_Misc0MiscOutputLayout { - ArgU16Layout5LayoutArray argU16; -}; -struct Misc0MiscOutputArm0Layout { - ArgU16Layout _extra0; - ArgU16Layout _extra1; - ArgU16Layout _extra2; - ArgU16Layout _extra3; - ArgU16Layout _extra4; -}; -struct Misc0MiscOutputArm1Layout { - ArgU16Layout _extra0; - ArgU16Layout _extra1; - ArgU16Layout _extra2; - ArgU16Layout _extra3; - ArgU16Layout _extra4; -}; -using NondetRegLayout16LayoutArray = ::cuda::std::array; -struct ToBits_16_Layout { - NondetRegLayout16LayoutArray _super; -}; -struct BitwiseAndU16Layout { - ToBits_16_Layout bitsX; - ToBits_16_Layout bitsY; -}; -struct BitwiseAndLayout { - BitwiseAndU16Layout _0; - BitwiseAndU16Layout _1; -}; -struct BitwiseXorLayout { - BitwiseAndLayout andXy; -}; -struct OpXORLayout { - BitwiseXorLayout _0; -}; -struct Misc0MiscOutputArm2Layout { - OpXORLayout _super; - ArgU16Layout _extra0; - ArgU16Layout _extra1; - ArgU16Layout _extra2; - ArgU16Layout _extra3; - ArgU16Layout _extra4; -}; -struct BitwiseOrLayout { - BitwiseAndLayout andXy; -}; -struct OpORLayout { - BitwiseOrLayout _0; -}; -struct Misc0MiscOutputArm3Layout { - OpORLayout _super; - ArgU16Layout _extra0; - ArgU16Layout _extra1; - ArgU16Layout _extra2; - ArgU16Layout _extra3; - ArgU16Layout _extra4; -}; -struct OpANDLayout { - BitwiseAndLayout _0; -}; -struct Misc0MiscOutputArm4Layout { - OpANDLayout _super; - ArgU16Layout _extra0; - ArgU16Layout _extra1; - ArgU16Layout _extra2; - ArgU16Layout _extra3; - ArgU16Layout _extra4; -}; -struct GetSignU32Layout { - NondetRegLayout _super; - NondetU16RegLayout restTimesTwo; -}; -struct CmpLessThanLayout { - NormalizeU32Layout diff; - GetSignU32Layout s1; - GetSignU32Layout s2; - GetSignU32Layout s3; - NondetRegLayout overflow; - NondetRegLayout isLessThan; -}; -struct OpSLTLayout { - CmpLessThanLayout cmp; -}; -struct CmpLessThanUnsignedLayout { - NormalizeU32Layout diff; -}; -struct OpSLTULayout { - CmpLessThanUnsignedLayout cmp; -}; -struct Misc0MiscOutputArm6Layout { - OpSLTULayout _super; - ArgU16Layout _extra0; - ArgU16Layout _extra1; - ArgU16Layout _extra2; -}; -struct Misc0MiscOutputArm7Layout { - ArgU16Layout _extra0; - ArgU16Layout _extra1; - ArgU16Layout _extra2; - ArgU16Layout _extra3; - ArgU16Layout _extra4; -}; -struct Misc0MiscOutputLayout { - Misc0MiscOutputArm0Layout arm0; - Misc0MiscOutputArm1Layout arm1; - Misc0MiscOutputArm2Layout arm2; - Misc0MiscOutputArm3Layout arm3; - Misc0MiscOutputArm4Layout arm4; - OpSLTLayout arm5; - Misc0MiscOutputArm6Layout arm6; - Misc0MiscOutputArm7Layout arm7; -}; -struct Misc0Layout { - FinalizeMiscLayout _super; - MiscInputLayout input; - _Arguments_Misc0MiscOutputLayout _arguments_Misc0MiscOutput; - Misc0MiscOutputLayout miscOutput; -}; -struct _Arguments_Misc1MiscOutputLayout { - ArgU16Layout5LayoutArray argU16; -}; -struct OpXORILayout { - BitwiseXorLayout _0; -}; -struct Misc1MiscOutputArm0Layout { - OpXORILayout _super; - ArgU16Layout _extra0; - ArgU16Layout _extra1; - ArgU16Layout _extra2; - ArgU16Layout _extra3; - ArgU16Layout _extra4; -}; -struct OpORILayout { - BitwiseOrLayout _0; -}; -struct Misc1MiscOutputArm1Layout { - OpORILayout _super; - ArgU16Layout _extra0; - ArgU16Layout _extra1; - ArgU16Layout _extra2; - ArgU16Layout _extra3; - ArgU16Layout _extra4; -}; -struct OpANDILayout { - BitwiseAndLayout _0; -}; -struct Misc1MiscOutputArm2Layout { - OpANDILayout _super; - ArgU16Layout _extra0; - ArgU16Layout _extra1; - ArgU16Layout _extra2; - ArgU16Layout _extra3; - ArgU16Layout _extra4; -}; -struct OpSLTILayout { - CmpLessThanLayout cmp; -}; -struct OpSLTIULayout { - CmpLessThanUnsignedLayout cmp; -}; -struct Misc1MiscOutputArm4Layout { - OpSLTIULayout _super; - ArgU16Layout _extra0; - ArgU16Layout _extra1; - ArgU16Layout _extra2; -}; -struct CmpEqualLayout { - IsZeroLayout lowSame; - IsZeroLayout highSame; - NondetRegLayout isEqual; -}; -struct OpBEQLayout { - CmpEqualLayout cmp; -}; -struct Misc1MiscOutputArm5Layout { - OpBEQLayout _super; - ArgU16Layout _extra0; - ArgU16Layout _extra1; - ArgU16Layout _extra2; - ArgU16Layout _extra3; - ArgU16Layout _extra4; -}; -struct OpBNELayout { - CmpEqualLayout cmp; -}; -struct Misc1MiscOutputArm6Layout { - OpBNELayout _super; - ArgU16Layout _extra0; - ArgU16Layout _extra1; - ArgU16Layout _extra2; - ArgU16Layout _extra3; - ArgU16Layout _extra4; -}; -struct OpBLTLayout { - CmpLessThanLayout cmp; -}; -struct Misc1MiscOutputLayout { - Misc1MiscOutputArm0Layout arm0; - Misc1MiscOutputArm1Layout arm1; - Misc1MiscOutputArm2Layout arm2; - OpSLTILayout arm3; - Misc1MiscOutputArm4Layout arm4; - Misc1MiscOutputArm5Layout arm5; - Misc1MiscOutputArm6Layout arm6; - OpBLTLayout arm7; -}; -struct Misc1Layout { - FinalizeMiscLayout _super; - MiscInputLayout input; - _Arguments_Misc1MiscOutputLayout _arguments_Misc1MiscOutput; - Misc1MiscOutputLayout miscOutput; -}; -struct _Arguments_Misc2MiscOutputLayout { - ArgU16Layout5LayoutArray argU16; -}; -struct OpBGELayout { - CmpLessThanLayout cmp; -}; -struct OpBLTULayout { - CmpLessThanUnsignedLayout cmp; -}; -struct Misc2MiscOutputArm1Layout { - OpBLTULayout _super; - ArgU16Layout _extra0; - ArgU16Layout _extra1; - ArgU16Layout _extra2; -}; -struct OpBGEULayout { - CmpLessThanUnsignedLayout cmp; -}; -struct Misc2MiscOutputArm2Layout { - OpBGEULayout _super; - ArgU16Layout _extra0; - ArgU16Layout _extra1; - ArgU16Layout _extra2; -}; -struct Misc2MiscOutputArm3Layout { - ArgU16Layout _extra0; - ArgU16Layout _extra1; - ArgU16Layout _extra2; - ArgU16Layout _extra3; - ArgU16Layout _extra4; -}; -struct Misc2MiscOutputArm4Layout { - ArgU16Layout _extra0; - ArgU16Layout _extra1; - ArgU16Layout _extra2; - ArgU16Layout _extra3; - ArgU16Layout _extra4; -}; -struct Misc2MiscOutputArm5Layout { - ArgU16Layout _extra0; - ArgU16Layout _extra1; - ArgU16Layout _extra2; - ArgU16Layout _extra3; - ArgU16Layout _extra4; -}; -struct Misc2MiscOutputArm6Layout { - ArgU16Layout _extra0; - ArgU16Layout _extra1; - ArgU16Layout _extra2; - ArgU16Layout _extra3; - ArgU16Layout _extra4; -}; -struct Misc2MiscOutputArm7Layout { - ArgU16Layout _extra0; - ArgU16Layout _extra1; - ArgU16Layout _extra2; - ArgU16Layout _extra3; - ArgU16Layout _extra4; -}; -struct Misc2MiscOutputLayout { - OpBGELayout arm0; - Misc2MiscOutputArm1Layout arm1; - Misc2MiscOutputArm2Layout arm2; - Misc2MiscOutputArm3Layout arm3; - Misc2MiscOutputArm4Layout arm4; - Misc2MiscOutputArm5Layout arm5; - Misc2MiscOutputArm6Layout arm6; - Misc2MiscOutputArm7Layout arm7; -}; -struct Misc2Layout { - FinalizeMiscLayout _super; - MiscInputLayout input; - _Arguments_Misc2MiscOutputLayout _arguments_Misc2MiscOutput; - Misc2MiscOutputLayout miscOutput; -}; -struct MulInputLayout { - DecodeInstLayout decoded; - ReadRegLayout rs1; - ReadRegLayout rs2; -}; -using ArgU16Layout6LayoutArray = ::cuda::std::array; -struct ArgU8Layout { - NondetRegLayout count; - NondetRegLayout val; -}; -using ArgU8Layout13LayoutArray = ::cuda::std::array; -struct _Arguments_Mul0MulOutputLayout { - ArgU16Layout6LayoutArray argU16; - ArgU8Layout13LayoutArray argU8; -}; -using NondetRegLayout5LayoutArray = ::cuda::std::array; -struct ToBits_5_Layout { - NondetRegLayout5LayoutArray _super; -}; -struct DynPo2Layout { - ToBits_5_Layout low5; - NondetU16RegLayout checkU16; - NondetRegLayout b3; - NondetRegLayout low; - NondetRegLayout high; -}; -struct NondetU8RegLayout { - ArgU8Layout arg; -}; -struct ExpandU32Layout { - NondetU8RegLayout b0; - NondetU8RegLayout b1; - NondetU8RegLayout b2; - NondetU8RegLayout b3; - NondetU8RegLayout b3Top7times2; - NondetRegLayout topBit; -}; -struct NondetFakeTwitRegLayout { - NondetRegLayout reg0; - NondetRegLayout reg1; -}; -struct SplitTotalLayout { - NondetU16RegLayout out; - NondetU8RegLayout carryByte; - NondetFakeTwitRegLayout carryExtra; -}; -struct MultiplyAccumulateLayout { - ExpandU32Layout ax; - ExpandU32Layout bx; - NondetRegLayout cSign; - NondetU16RegLayout cRestTimes2; - SplitTotalLayout s0; - SplitTotalLayout s1; - SplitTotalLayout s2; - NondetU16RegLayout s3Out; - NondetFakeTwitRegLayout s3Carry; -}; -struct DoMulLayout { - MultiplyAccumulateLayout mul; -}; -struct OpSLLLayout { - DynPo2Layout shiftMul; - DoMulLayout _0; -}; -struct OpSLLILayout { - DynPo2Layout shiftMul; - DoMulLayout _0; -}; -struct OpMULLayout { - DoMulLayout _0; -}; -struct Mul0MulOutputArm2Layout { - OpMULLayout _super; - ArgU16Layout _extra0; -}; -struct OpMULHLayout { - DoMulLayout _0; -}; -struct Mul0MulOutputArm3Layout { - OpMULHLayout _super; - ArgU16Layout _extra0; -}; -struct OpMULHSULayout { - DoMulLayout _0; -}; -struct Mul0MulOutputArm4Layout { - OpMULHSULayout _super; - ArgU16Layout _extra0; -}; -struct OpMULHULayout { - DoMulLayout _0; -}; -struct Mul0MulOutputArm5Layout { - OpMULHULayout _super; - ArgU16Layout _extra0; -}; -struct Mul0MulOutputArm6Layout { - ArgU16Layout _extra0; - ArgU16Layout _extra1; - ArgU16Layout _extra2; - ArgU16Layout _extra3; - ArgU16Layout _extra4; - ArgU16Layout _extra5; - ArgU8Layout _extra6; - ArgU8Layout _extra7; - ArgU8Layout _extra8; - ArgU8Layout _extra9; - ArgU8Layout _extra10; - ArgU8Layout _extra11; - ArgU8Layout _extra12; - ArgU8Layout _extra13; - ArgU8Layout _extra14; - ArgU8Layout _extra15; - ArgU8Layout _extra16; - ArgU8Layout _extra17; - ArgU8Layout _extra18; -}; -struct Mul0MulOutputArm7Layout { - ArgU16Layout _extra0; - ArgU16Layout _extra1; - ArgU16Layout _extra2; - ArgU16Layout _extra3; - ArgU16Layout _extra4; - ArgU16Layout _extra5; - ArgU8Layout _extra6; - ArgU8Layout _extra7; - ArgU8Layout _extra8; - ArgU8Layout _extra9; - ArgU8Layout _extra10; - ArgU8Layout _extra11; - ArgU8Layout _extra12; - ArgU8Layout _extra13; - ArgU8Layout _extra14; - ArgU8Layout _extra15; - ArgU8Layout _extra16; - ArgU8Layout _extra17; - ArgU8Layout _extra18; -}; -struct Mul0MulOutputLayout { - OpSLLLayout arm0; - OpSLLILayout arm1; - Mul0MulOutputArm2Layout arm2; - Mul0MulOutputArm3Layout arm3; - Mul0MulOutputArm4Layout arm4; - Mul0MulOutputArm5Layout arm5; - Mul0MulOutputArm6Layout arm6; - Mul0MulOutputArm7Layout arm7; -}; -struct Mul0Layout { - MulInputLayout input; - _Arguments_Mul0MulOutputLayout _arguments_Mul0MulOutput; - Mul0MulOutputLayout mulOutput; - WriteRdLayout _0; - NormalizeU32Layout pcAdd; -}; -struct DivInputLayout { - DecodeInstLayout decoded; - ReadRegLayout rs1; - ReadRegLayout rs2; -}; -using ArgU16Layout9LayoutArray = ::cuda::std::array; -struct _Arguments_Div0MulOutputLayout { - ArgU16Layout9LayoutArray argU16; - ArgU8Layout13LayoutArray argU8; -}; -struct DoDivLayout { - NondetRegLayout quotLow; - NondetRegLayout quotHigh; - NondetU16RegLayout remLow; - NondetU16RegLayout remHigh; - MultiplyAccumulateLayout mul; - NondetRegLayout topBitType; -}; -struct OpSRLLayout { - DynPo2Layout shiftMul; - DoDivLayout _0; -}; -struct Div0MulOutputArm0Layout { - OpSRLLayout _super; - ArgU16Layout _extra0; -}; -struct TopBitLayout { - NondetRegLayout _super; - NondetU16RegLayout rest; -}; -struct OpSRALayout { - DynPo2Layout shiftMul; - TopBitLayout flip; - DoDivLayout _0; -}; -struct OpSRLILayout { - DynPo2Layout shiftMul; - DoDivLayout _0; -}; -struct Div0MulOutputArm2Layout { - OpSRLILayout _super; - ArgU16Layout _extra0; -}; -struct OpSRAILayout { - DynPo2Layout shiftMul; - TopBitLayout flip; - DoDivLayout _0; -}; -struct OpDIVLayout { - DoDivLayout _0; -}; -struct Div0MulOutputArm4Layout { - OpDIVLayout _super; - ArgU16Layout _extra0; - ArgU16Layout _extra1; -}; -struct OpDIVULayout { - DoDivLayout _0; -}; -struct Div0MulOutputArm5Layout { - OpDIVULayout _super; - ArgU16Layout _extra0; - ArgU16Layout _extra1; -}; -struct OpREMLayout { - DoDivLayout _0; -}; -struct Div0MulOutputArm6Layout { - OpREMLayout _super; - ArgU16Layout _extra0; - ArgU16Layout _extra1; -}; -struct OpREMULayout { - DoDivLayout _0; -}; -struct Div0MulOutputArm7Layout { - OpREMULayout _super; - ArgU16Layout _extra0; - ArgU16Layout _extra1; -}; -struct Div0MulOutputLayout { - Div0MulOutputArm0Layout arm0; - OpSRALayout arm1; - Div0MulOutputArm2Layout arm2; - OpSRAILayout arm3; - Div0MulOutputArm4Layout arm4; - Div0MulOutputArm5Layout arm5; - Div0MulOutputArm6Layout arm6; - Div0MulOutputArm7Layout arm7; -}; -struct Div0Layout { - DivInputLayout input; - _Arguments_Div0MulOutputLayout _arguments_Div0MulOutput; - Div0MulOutputLayout mulOutput; - WriteRdLayout _0; - NormalizeU32Layout pcAdd; -}; -struct AddrDecomposeBitsLayout { - NondetRegLayout low0; - NondetRegLayout low1; - U16RegLayout upperDiff; - IsZeroLayout _0; - NondetU16RegLayout med14; -}; -struct MemLoadInputLayout { - DecodeInstLayout decoded; - ReadRegLayout rs1; - NormalizeU32Layout addrU32; - AddrDecomposeBitsLayout addr; - MemoryReadLayout data; -}; -using ArgU8Layout3LayoutArray = ::cuda::std::array; -struct _Arguments_Mem0OutputLayout { - ArgU8Layout3LayoutArray argU8; -}; -struct SplitWordLayout { - NondetU8RegLayout byte0; - NondetU8RegLayout byte1; -}; -struct OpLBLayout { - SplitWordLayout bytes; - NondetRegLayout highBit; - NondetU8RegLayout low7x2; -}; -struct OpLHLayout { - NondetRegLayout highBit; - NondetU8RegLayout low15x2; -}; -struct Mem0OutputArm1Layout { - OpLHLayout _super; - ArgU8Layout _extra0; - ArgU8Layout _extra1; -}; -struct Mem0OutputArm2Layout { - ArgU8Layout _extra0; - ArgU8Layout _extra1; - ArgU8Layout _extra2; -}; -struct OpLBULayout { - SplitWordLayout bytes; -}; -struct Mem0OutputArm3Layout { - OpLBULayout _super; - ArgU8Layout _extra0; -}; -struct Mem0OutputArm4Layout { - ArgU8Layout _extra0; - ArgU8Layout _extra1; - ArgU8Layout _extra2; -}; -struct Mem0OutputArm5Layout { - ArgU8Layout _extra0; - ArgU8Layout _extra1; - ArgU8Layout _extra2; -}; -struct Mem0OutputArm6Layout { - ArgU8Layout _extra0; - ArgU8Layout _extra1; - ArgU8Layout _extra2; -}; -struct Mem0OutputArm7Layout { - ArgU8Layout _extra0; - ArgU8Layout _extra1; - ArgU8Layout _extra2; -}; -struct Mem0OutputLayout { - OpLBLayout arm0; - Mem0OutputArm1Layout arm1; - Mem0OutputArm2Layout arm2; - Mem0OutputArm3Layout arm3; - Mem0OutputArm4Layout arm4; - Mem0OutputArm5Layout arm5; - Mem0OutputArm6Layout arm6; - Mem0OutputArm7Layout arm7; -}; -struct Mem0Layout { - MemLoadInputLayout input; - _Arguments_Mem0OutputLayout _arguments_Mem0Output; - Mem0OutputLayout output; - WriteRdLayout _0; - NormalizeU32Layout pcAdd; -}; -struct MemStoreInputLayout { - DecodeInstLayout decoded; - ReadRegLayout rs1; - ReadRegLayout rs2; - NormalizeU32Layout addrU32; - AddrDecomposeBitsLayout addr; - MemoryReadLayout data; -}; -using ArgU8Layout4LayoutArray = ::cuda::std::array; -struct _Arguments_Mem1OutputLayout { - ArgU8Layout4LayoutArray argU8; -}; -struct OpSBLayout { - SplitWordLayout origBytes; - SplitWordLayout newBytes; -}; -struct Mem1OutputArm1Layout { - ArgU8Layout _extra0; - ArgU8Layout _extra1; - ArgU8Layout _extra2; - ArgU8Layout _extra3; -}; -struct Mem1OutputArm2Layout { - ArgU8Layout _extra0; - ArgU8Layout _extra1; - ArgU8Layout _extra2; - ArgU8Layout _extra3; -}; -struct Mem1OutputArm3Layout { - ArgU8Layout _extra0; - ArgU8Layout _extra1; - ArgU8Layout _extra2; - ArgU8Layout _extra3; -}; -struct Mem1OutputArm4Layout { - ArgU8Layout _extra0; - ArgU8Layout _extra1; - ArgU8Layout _extra2; - ArgU8Layout _extra3; -}; -struct Mem1OutputArm5Layout { - ArgU8Layout _extra0; - ArgU8Layout _extra1; - ArgU8Layout _extra2; - ArgU8Layout _extra3; -}; -struct Mem1OutputArm6Layout { - ArgU8Layout _extra0; - ArgU8Layout _extra1; - ArgU8Layout _extra2; - ArgU8Layout _extra3; -}; -struct Mem1OutputArm7Layout { - ArgU8Layout _extra0; - ArgU8Layout _extra1; - ArgU8Layout _extra2; - ArgU8Layout _extra3; -}; -struct Mem1OutputLayout { - OpSBLayout arm0; - Mem1OutputArm1Layout arm1; - Mem1OutputArm2Layout arm2; - Mem1OutputArm3Layout arm3; - Mem1OutputArm4Layout arm4; - Mem1OutputArm5Layout arm5; - Mem1OutputArm6Layout arm6; - Mem1OutputArm7Layout arm7; -}; -struct MemStoreFinalizeLayout { - MemoryWriteLayout _0; -}; -struct Mem1Layout { - MemStoreInputLayout input; - _Arguments_Mem1OutputLayout _arguments_Mem1Output; - Mem1OutputLayout output; - MemStoreFinalizeLayout _0; - NormalizeU32Layout pcAdd; -}; -struct MemoryPageInLayout { - MemoryIOLayout io; -}; -struct ControlLoadRoot__0_SuperLayout { - MemoryPageInLayout mem; -}; -using ControlLoadRoot__0_SuperLayout8LayoutArray = ::cuda::std::array; -struct ControlLoadRootLayout { - ControlLoadRoot__0_SuperLayout8LayoutArray _1; -}; -struct Control0_SuperArm0Layout { - ControlLoadRootLayout _super; - CycleArgLayout _extra0; - CycleArgLayout _extra1; - CycleArgLayout _extra2; - CycleArgLayout _extra3; - CycleArgLayout _extra4; - CycleArgLayout _extra5; - CycleArgLayout _extra6; - CycleArgLayout _extra7; - ArgU16Layout _extra8; - ArgU16Layout _extra9; - ArgU16Layout _extra10; - ArgU16Layout _extra11; - ArgU16Layout _extra12; - ArgU16Layout _extra13; - ArgU16Layout _extra14; - ArgU16Layout _extra15; - ArgU16Layout _extra16; - ArgU16Layout _extra17; - ArgU16Layout _extra18; - ArgU16Layout _extra19; - ArgU16Layout _extra20; - ArgU16Layout _extra21; - ArgU16Layout _extra22; - ArgU16Layout _extra23; - ArgU8Layout _extra24; - ArgU8Layout _extra25; - ArgU8Layout _extra26; - ArgU8Layout _extra27; - ArgU8Layout _extra28; - ArgU8Layout _extra29; - ArgU8Layout _extra30; - ArgU8Layout _extra31; - ArgU8Layout _extra32; - ArgU8Layout _extra33; - ArgU8Layout _extra34; - ArgU8Layout _extra35; - ArgU8Layout _extra36; - ArgU8Layout _extra37; - ArgU8Layout _extra38; - ArgU8Layout _extra39; -}; -struct ControlResume_SuperArm0_SuperLayout { - MemoryReadLayout pc; - MemoryReadLayout mode; -}; -struct ControlResume_SuperArm0Layout { - ControlResume_SuperArm0_SuperLayout _super; - MemoryArgLayout _extra0; - MemoryArgLayout _extra1; - MemoryArgLayout _extra2; - MemoryArgLayout _extra3; - MemoryArgLayout _extra4; - MemoryArgLayout _extra5; - MemoryArgLayout _extra6; - MemoryArgLayout _extra7; - MemoryArgLayout _extra8; - MemoryArgLayout _extra9; - MemoryArgLayout _extra10; - MemoryArgLayout _extra11; - CycleArgLayout _extra12; - CycleArgLayout _extra13; - CycleArgLayout _extra14; - CycleArgLayout _extra15; - CycleArgLayout _extra16; - CycleArgLayout _extra17; -}; -struct ControlResume_SuperArm1_Super__0_SuperLayout { - MemoryWriteLayout _0; -}; -using ControlResume_SuperArm1_Super__0_SuperLayout8LayoutArray = ::cuda::std::array; -struct ControlResume_SuperArm1_SuperLayout { - ControlResume_SuperArm1_Super__0_SuperLayout8LayoutArray _1; -}; -struct ControlResume_SuperLayout { - ControlResume_SuperArm0Layout arm0; - ControlResume_SuperArm1_SuperLayout arm1; -}; -using MemoryArgLayout16LayoutArray = ::cuda::std::array; -using CycleArgLayout8LayoutArray = ::cuda::std::array; -struct _Arguments_ControlResume_SuperLayout { - MemoryArgLayout16LayoutArray memoryArg; - CycleArgLayout8LayoutArray cycleArg; -}; -struct ControlResumeLayout { - ControlResume_SuperLayout _super; - IsZeroLayout pcZero; - _Arguments_ControlResume_SuperLayout _arguments_ControlResume_Super; -}; -struct Control0_SuperArm1Layout { - ControlResumeLayout _super; - ArgU16Layout _extra0; - ArgU16Layout _extra1; - ArgU16Layout _extra2; - ArgU16Layout _extra3; - ArgU16Layout _extra4; - ArgU16Layout _extra5; - ArgU16Layout _extra6; - ArgU16Layout _extra7; - ArgU16Layout _extra8; - ArgU16Layout _extra9; - ArgU16Layout _extra10; - ArgU16Layout _extra11; - ArgU16Layout _extra12; - ArgU16Layout _extra13; - ArgU16Layout _extra14; - ArgU16Layout _extra15; - ArgU8Layout _extra16; - ArgU8Layout _extra17; - ArgU8Layout _extra18; - ArgU8Layout _extra19; - ArgU8Layout _extra20; - ArgU8Layout _extra21; - ArgU8Layout _extra22; - ArgU8Layout _extra23; - ArgU8Layout _extra24; - ArgU8Layout _extra25; - ArgU8Layout _extra26; - ArgU8Layout _extra27; - ArgU8Layout _extra28; - ArgU8Layout _extra29; - ArgU8Layout _extra30; - ArgU8Layout _extra31; -}; -struct ControlUserECALLLayout { - NondetRegLayout safeMode; - AddrDecomposeBitsLayout pcAddr; - MemoryReadLayout loadInst; - MemoryReadLayout dispatchIdx; - U16RegLayout _0; - MemoryReadLayout newPcAddr; - MemoryWriteLayout _1; -}; -struct Control0_SuperArm2Layout { - ControlUserECALLLayout _super; - MemoryArgLayout _extra0; - MemoryArgLayout _extra1; - MemoryArgLayout _extra2; - MemoryArgLayout _extra3; - MemoryArgLayout _extra4; - MemoryArgLayout _extra5; - MemoryArgLayout _extra6; - MemoryArgLayout _extra7; - CycleArgLayout _extra8; - CycleArgLayout _extra9; - CycleArgLayout _extra10; - CycleArgLayout _extra11; - ArgU16Layout _extra12; - ArgU16Layout _extra13; - ArgU16Layout _extra14; - ArgU16Layout _extra15; - ArgU16Layout _extra16; - ArgU16Layout _extra17; - ArgU16Layout _extra18; - ArgU16Layout _extra19; - ArgU16Layout _extra20; - ArgU16Layout _extra21; - ArgU16Layout _extra22; - ArgU16Layout _extra23; - ArgU16Layout _extra24; - ArgU8Layout _extra25; - ArgU8Layout _extra26; - ArgU8Layout _extra27; - ArgU8Layout _extra28; - ArgU8Layout _extra29; - ArgU8Layout _extra30; - ArgU8Layout _extra31; - ArgU8Layout _extra32; - ArgU8Layout _extra33; - ArgU8Layout _extra34; - ArgU8Layout _extra35; - ArgU8Layout _extra36; - ArgU8Layout _extra37; - ArgU8Layout _extra38; - ArgU8Layout _extra39; - ArgU8Layout _extra40; -}; -struct ControlMRETLayout { - NondetRegLayout safeMode; - AddrDecomposeBitsLayout pcAddr; - MemoryReadLayout loadInst; - MemoryReadLayout pc; - NormalizeU32Layout pcAdd; -}; -struct Control0_SuperArm3Layout { - ControlMRETLayout _super; - MemoryArgLayout _extra0; - MemoryArgLayout _extra1; - MemoryArgLayout _extra2; - MemoryArgLayout _extra3; - MemoryArgLayout _extra4; - MemoryArgLayout _extra5; - MemoryArgLayout _extra6; - MemoryArgLayout _extra7; - MemoryArgLayout _extra8; - MemoryArgLayout _extra9; - MemoryArgLayout _extra10; - MemoryArgLayout _extra11; - CycleArgLayout _extra12; - CycleArgLayout _extra13; - CycleArgLayout _extra14; - CycleArgLayout _extra15; - CycleArgLayout _extra16; - CycleArgLayout _extra17; - ArgU16Layout _extra18; - ArgU16Layout _extra19; - ArgU16Layout _extra20; - ArgU16Layout _extra21; - ArgU16Layout _extra22; - ArgU16Layout _extra23; - ArgU16Layout _extra24; - ArgU16Layout _extra25; - ArgU16Layout _extra26; - ArgU16Layout _extra27; - ArgU16Layout _extra28; - ArgU16Layout _extra29; - ArgU8Layout _extra30; - ArgU8Layout _extra31; - ArgU8Layout _extra32; - ArgU8Layout _extra33; - ArgU8Layout _extra34; - ArgU8Layout _extra35; - ArgU8Layout _extra36; - ArgU8Layout _extra37; - ArgU8Layout _extra38; - ArgU8Layout _extra39; - ArgU8Layout _extra40; - ArgU8Layout _extra41; - ArgU8Layout _extra42; - ArgU8Layout _extra43; - ArgU8Layout _extra44; - ArgU8Layout _extra45; -}; -using MemoryReadLayout8LayoutArray = ::cuda::std::array; -struct ControlSuspend_SuperArm0_SuperLayout { - MemoryReadLayout8LayoutArray _1; -}; -struct ControlSuspend_SuperArm1_SuperLayout { - NondetRegLayout state; - MemoryWriteLayout _0; - MemoryWriteLayout _1; -}; -struct ControlSuspend_SuperArm1Layout { - ControlSuspend_SuperArm1_SuperLayout _super; - MemoryArgLayout _extra0; - MemoryArgLayout _extra1; - MemoryArgLayout _extra2; - MemoryArgLayout _extra3; - MemoryArgLayout _extra4; - MemoryArgLayout _extra5; - MemoryArgLayout _extra6; - MemoryArgLayout _extra7; - MemoryArgLayout _extra8; - MemoryArgLayout _extra9; - MemoryArgLayout _extra10; - MemoryArgLayout _extra11; - CycleArgLayout _extra12; - CycleArgLayout _extra13; - CycleArgLayout _extra14; - CycleArgLayout _extra15; - CycleArgLayout _extra16; - CycleArgLayout _extra17; -}; -struct ControlSuspend_SuperLayout { - ControlSuspend_SuperArm0_SuperLayout arm0; - ControlSuspend_SuperArm1Layout arm1; -}; -struct _Arguments_ControlSuspend_SuperLayout { - MemoryArgLayout16LayoutArray memoryArg; - CycleArgLayout8LayoutArray cycleArg; -}; -struct ControlSuspendLayout { - ControlSuspend_SuperLayout _super; - IsZeroLayout pcZero; - _Arguments_ControlSuspend_SuperLayout _arguments_ControlSuspend_Super; -}; -struct Control0_SuperArm4Layout { - ControlSuspendLayout _super; - ArgU16Layout _extra0; - ArgU16Layout _extra1; - ArgU16Layout _extra2; - ArgU16Layout _extra3; - ArgU16Layout _extra4; - ArgU16Layout _extra5; - ArgU16Layout _extra6; - ArgU16Layout _extra7; - ArgU16Layout _extra8; - ArgU16Layout _extra9; - ArgU16Layout _extra10; - ArgU16Layout _extra11; - ArgU16Layout _extra12; - ArgU16Layout _extra13; - ArgU16Layout _extra14; - ArgU16Layout _extra15; - ArgU8Layout _extra16; - ArgU8Layout _extra17; - ArgU8Layout _extra18; - ArgU8Layout _extra19; - ArgU8Layout _extra20; - ArgU8Layout _extra21; - ArgU8Layout _extra22; - ArgU8Layout _extra23; - ArgU8Layout _extra24; - ArgU8Layout _extra25; - ArgU8Layout _extra26; - ArgU8Layout _extra27; - ArgU8Layout _extra28; - ArgU8Layout _extra29; - ArgU8Layout _extra30; - ArgU8Layout _extra31; -}; -struct MemoryPageOutLayout { - MemoryIOLayout io; - IsForwardLayout _0; -}; -using MemoryPageOutLayout8LayoutArray = ::cuda::std::array; -struct ControlStoreRootLayout { - MemoryPageOutLayout8LayoutArray _1; -}; -struct Control0_SuperArm5Layout { - ControlStoreRootLayout _super; - ArgU16Layout _extra0; - ArgU16Layout _extra1; - ArgU16Layout _extra2; - ArgU16Layout _extra3; - ArgU16Layout _extra4; - ArgU16Layout _extra5; - ArgU16Layout _extra6; - ArgU16Layout _extra7; - ArgU16Layout _extra8; - ArgU16Layout _extra9; - ArgU16Layout _extra10; - ArgU16Layout _extra11; - ArgU16Layout _extra12; - ArgU16Layout _extra13; - ArgU16Layout _extra14; - ArgU16Layout _extra15; - ArgU8Layout _extra16; - ArgU8Layout _extra17; - ArgU8Layout _extra18; - ArgU8Layout _extra19; - ArgU8Layout _extra20; - ArgU8Layout _extra21; - ArgU8Layout _extra22; - ArgU8Layout _extra23; - ArgU8Layout _extra24; - ArgU8Layout _extra25; - ArgU8Layout _extra26; - ArgU8Layout _extra27; - ArgU8Layout _extra28; - ArgU8Layout _extra29; - ArgU8Layout _extra30; - ArgU8Layout _extra31; -}; -struct ControlTable_SuperArm0_Super__0_SuperLayout { - ArgU16Layout arg; -}; -using ControlTable_SuperArm0_Super__0_SuperLayout16LayoutArray = ::cuda::std::array; -struct ControlTable_SuperArm0_SuperLayout { - ControlTable_SuperArm0_Super__0_SuperLayout16LayoutArray _1; - IsZeroLayout done; -}; -struct ControlTable_SuperArm0Layout { - ControlTable_SuperArm0_SuperLayout _super; - ArgU8Layout _extra0; - ArgU8Layout _extra1; - ArgU8Layout _extra2; - ArgU8Layout _extra3; - ArgU8Layout _extra4; - ArgU8Layout _extra5; - ArgU8Layout _extra6; - ArgU8Layout _extra7; - ArgU8Layout _extra8; - ArgU8Layout _extra9; - ArgU8Layout _extra10; - ArgU8Layout _extra11; - ArgU8Layout _extra12; - ArgU8Layout _extra13; - ArgU8Layout _extra14; - ArgU8Layout _extra15; -}; -struct ControlTable_SuperArm1_Super__0_SuperLayout { - ArgU8Layout arg; -}; -using ControlTable_SuperArm1_Super__0_SuperLayout16LayoutArray = ::cuda::std::array; -struct ControlTable_SuperArm1_SuperLayout { - ControlTable_SuperArm1_Super__0_SuperLayout16LayoutArray _1; - IsZeroLayout done; -}; -struct ControlTable_SuperArm1Layout { - ControlTable_SuperArm1_SuperLayout _super; - ArgU16Layout _extra0; - ArgU16Layout _extra1; - ArgU16Layout _extra2; - ArgU16Layout _extra3; - ArgU16Layout _extra4; - ArgU16Layout _extra5; - ArgU16Layout _extra6; - ArgU16Layout _extra7; - ArgU16Layout _extra8; - ArgU16Layout _extra9; - ArgU16Layout _extra10; - ArgU16Layout _extra11; - ArgU16Layout _extra12; - ArgU16Layout _extra13; - ArgU16Layout _extra14; - ArgU16Layout _extra15; -}; -struct ControlTable_SuperLayout { - ControlTable_SuperArm0Layout arm0; - ControlTable_SuperArm1Layout arm1; -}; -using ArgU16Layout16LayoutArray = ::cuda::std::array; -using ArgU8Layout16LayoutArray = ::cuda::std::array; -struct _Arguments_ControlTable_SuperLayout { - ArgU16Layout16LayoutArray argU16; - ArgU8Layout16LayoutArray argU8; -}; -struct ControlTableLayout { - ControlTable_SuperLayout _super; - NondetRegLayout entry; - NondetRegLayout mode; - _Arguments_ControlTable_SuperLayout _arguments_ControlTable_Super; -}; -struct Control0_SuperArm6Layout { - ControlTableLayout _super; - MemoryArgLayout _extra0; - MemoryArgLayout _extra1; - MemoryArgLayout _extra2; - MemoryArgLayout _extra3; - MemoryArgLayout _extra4; - MemoryArgLayout _extra5; - MemoryArgLayout _extra6; - MemoryArgLayout _extra7; - MemoryArgLayout _extra8; - MemoryArgLayout _extra9; - MemoryArgLayout _extra10; - MemoryArgLayout _extra11; - MemoryArgLayout _extra12; - MemoryArgLayout _extra13; - MemoryArgLayout _extra14; - MemoryArgLayout _extra15; - CycleArgLayout _extra16; - CycleArgLayout _extra17; - CycleArgLayout _extra18; - CycleArgLayout _extra19; - CycleArgLayout _extra20; - CycleArgLayout _extra21; - CycleArgLayout _extra22; - CycleArgLayout _extra23; -}; -struct Control0_SuperArm7Layout { - MemoryArgLayout _extra0; - MemoryArgLayout _extra1; - MemoryArgLayout _extra2; - MemoryArgLayout _extra3; - MemoryArgLayout _extra4; - MemoryArgLayout _extra5; - MemoryArgLayout _extra6; - MemoryArgLayout _extra7; - MemoryArgLayout _extra8; - MemoryArgLayout _extra9; - MemoryArgLayout _extra10; - MemoryArgLayout _extra11; - MemoryArgLayout _extra12; - MemoryArgLayout _extra13; - MemoryArgLayout _extra14; - MemoryArgLayout _extra15; - CycleArgLayout _extra16; - CycleArgLayout _extra17; - CycleArgLayout _extra18; - CycleArgLayout _extra19; - CycleArgLayout _extra20; - CycleArgLayout _extra21; - CycleArgLayout _extra22; - CycleArgLayout _extra23; - ArgU16Layout _extra24; - ArgU16Layout _extra25; - ArgU16Layout _extra26; - ArgU16Layout _extra27; - ArgU16Layout _extra28; - ArgU16Layout _extra29; - ArgU16Layout _extra30; - ArgU16Layout _extra31; - ArgU16Layout _extra32; - ArgU16Layout _extra33; - ArgU16Layout _extra34; - ArgU16Layout _extra35; - ArgU16Layout _extra36; - ArgU16Layout _extra37; - ArgU16Layout _extra38; - ArgU16Layout _extra39; - ArgU8Layout _extra40; - ArgU8Layout _extra41; - ArgU8Layout _extra42; - ArgU8Layout _extra43; - ArgU8Layout _extra44; - ArgU8Layout _extra45; - ArgU8Layout _extra46; - ArgU8Layout _extra47; - ArgU8Layout _extra48; - ArgU8Layout _extra49; - ArgU8Layout _extra50; - ArgU8Layout _extra51; - ArgU8Layout _extra52; - ArgU8Layout _extra53; - ArgU8Layout _extra54; - ArgU8Layout _extra55; -}; -struct Control0_SuperLayout { - Control0_SuperArm0Layout arm0; - Control0_SuperArm1Layout arm1; - Control0_SuperArm2Layout arm2; - Control0_SuperArm3Layout arm3; - Control0_SuperArm4Layout arm4; - Control0_SuperArm5Layout arm5; - Control0_SuperArm6Layout arm6; - Control0_SuperArm7Layout arm7; -}; -struct _Arguments_Control0_SuperLayout { - MemoryArgLayout16LayoutArray memoryArg; - CycleArgLayout8LayoutArray cycleArg; - ArgU16Layout16LayoutArray argU16; - ArgU8Layout16LayoutArray argU8; -}; -struct Control0Layout { - Control0_SuperLayout _super; - CycleArgLayout arg; - _Arguments_Control0_SuperLayout _arguments_Control0_Super; -}; -using MemoryArgLayout8LayoutArray = ::cuda::std::array; -using CycleArgLayout4LayoutArray = ::cuda::std::array; -using ArgU16Layout2LayoutArray = ::cuda::std::array; -struct _Arguments_ECall0OutputLayout { - MemoryArgLayout8LayoutArray memoryArg; - CycleArgLayout4LayoutArray cycleArg; - ArgU16Layout2LayoutArray argU16; -}; -using NondetRegLayout4LayoutArray = ::cuda::std::array; -struct OneHot_4_Layout { - NondetRegLayout4LayoutArray _super; -}; -struct MachineECallLayout { - MemoryReadLayout loadInst; - MemoryReadLayout dispatchIdx; - OneHot_4_Layout dispatch; -}; -struct ECall0OutputArm0Layout { - MachineECallLayout _super; - MemoryArgLayout _extra0; - MemoryArgLayout _extra1; - MemoryArgLayout _extra2; - MemoryArgLayout _extra3; - CycleArgLayout _extra4; - CycleArgLayout _extra5; - ArgU16Layout _extra6; - ArgU16Layout _extra7; -}; -struct ECallTerminateLayout { - MemoryReadLayout a0; - MemoryReadLayout a1; -}; -struct ECall0OutputArm1Layout { - ECallTerminateLayout _super; - MemoryArgLayout _extra0; - MemoryArgLayout _extra1; - MemoryArgLayout _extra2; - MemoryArgLayout _extra3; - CycleArgLayout _extra4; - CycleArgLayout _extra5; - ArgU16Layout _extra6; - ArgU16Layout _extra7; -}; -struct DecomposeLow2Layout { - NondetRegLayout high; - NondetRegLayout low2; - OneHot_4_Layout low2Hot; - IsZeroLayout highZero; - NondetRegLayout isZero; -}; -struct ECallHostReadSetupLayout { - MemoryReadLayout fd; - MemoryReadLayout ptr; - MemoryReadLayout len; - NondetU16RegLayout newLen; - U16RegLayout diff; - MemoryWriteLayout _0; - DecomposeLow2Layout ptrDecomp; - DecomposeLow2Layout lenDecomp; - NondetRegLayout len123; - NondetRegLayout uneven; -}; -struct ECallHostWriteLayout { - MemoryReadLayout fd; - MemoryReadLayout ptr; - MemoryReadLayout len; - NondetU16RegLayout newLen; - U16RegLayout diff; - MemoryWriteLayout _0; -}; -struct ECall0OutputArm4Layout { - MemoryArgLayout _extra0; - MemoryArgLayout _extra1; - MemoryArgLayout _extra2; - MemoryArgLayout _extra3; - MemoryArgLayout _extra4; - MemoryArgLayout _extra5; - MemoryArgLayout _extra6; - MemoryArgLayout _extra7; - CycleArgLayout _extra8; - CycleArgLayout _extra9; - CycleArgLayout _extra10; - CycleArgLayout _extra11; - ArgU16Layout _extra12; - ArgU16Layout _extra13; -}; -struct MemoryWriteUnconstrainedLayout { - MemoryIOLayout io; - IsForwardLayout _0; -}; -struct ECallHostReadWords__0_SuperLayout { - NondetRegLayout addr; - MemoryWriteUnconstrainedLayout _0; -}; -using ECallHostReadWords__0_SuperLayout4LayoutArray = ::cuda::std::array; -struct ECallHostReadWordsLayout { - DecomposeLow2Layout lenDecomp; - DecomposeLow2Layout wordsDecomp; - ECallHostReadWords__0_SuperLayout4LayoutArray _1; - IsZeroLayout lenZero; -}; -struct ECall0OutputArm5Layout { - ECallHostReadWordsLayout _super; - ArgU16Layout _extra0; - ArgU16Layout _extra1; -}; -struct ECall0OutputArm6Layout { - MemoryArgLayout _extra0; - MemoryArgLayout _extra1; - MemoryArgLayout _extra2; - MemoryArgLayout _extra3; - MemoryArgLayout _extra4; - MemoryArgLayout _extra5; - MemoryArgLayout _extra6; - MemoryArgLayout _extra7; - CycleArgLayout _extra8; - CycleArgLayout _extra9; - CycleArgLayout _extra10; - CycleArgLayout _extra11; - ArgU16Layout _extra12; - ArgU16Layout _extra13; -}; -struct ECall0OutputArm7Layout { - MemoryArgLayout _extra0; - MemoryArgLayout _extra1; - MemoryArgLayout _extra2; - MemoryArgLayout _extra3; - MemoryArgLayout _extra4; - MemoryArgLayout _extra5; - MemoryArgLayout _extra6; - MemoryArgLayout _extra7; - CycleArgLayout _extra8; - CycleArgLayout _extra9; - CycleArgLayout _extra10; - CycleArgLayout _extra11; - ArgU16Layout _extra12; - ArgU16Layout _extra13; -}; -struct ECall0OutputLayout { - ECall0OutputArm0Layout arm0; - ECall0OutputArm1Layout arm1; - ECallHostReadSetupLayout arm2; - ECallHostWriteLayout arm3; - ECall0OutputArm4Layout arm4; - ECall0OutputArm5Layout arm5; - ECall0OutputArm6Layout arm6; - ECall0OutputArm7Layout arm7; -}; -struct ECall0Layout { - NondetRegLayout s0; - NondetRegLayout s1; - NondetRegLayout s2; - AddrDecomposeBitsLayout pcAddr; - _Arguments_ECall0OutputLayout _arguments_ECall0Output; - ECall0OutputLayout output; - IsZeroLayout isDecode; - IsZeroLayout isP2Entry; - NormalizeU32Layout addPC; - CycleArgLayout arg; -}; -using NondetRegLayout24LayoutArray = ::cuda::std::array; -struct NondetExtRegLayout { - Reg _super; -}; -struct PoseidonStateLayout { - NondetRegLayout hasState; - NondetRegLayout stateAddr; - NondetRegLayout bufOutAddr; - NondetRegLayout isElem; - NondetRegLayout checkOut; - NondetRegLayout loadTxType; - NondetRegLayout nextState; - NondetRegLayout subState; - NondetRegLayout bufInAddr; - NondetRegLayout count; - NondetRegLayout mode; - NondetRegLayout24LayoutArray inner; - NondetExtRegLayout zcheck; -}; -using ArgU8Layout2LayoutArray = ::cuda::std::array; -struct _Arguments_Poseidon0StateLayout { - MemoryArgLayout16LayoutArray memoryArg; - CycleArgLayout8LayoutArray cycleArg; - ArgU16Layout16LayoutArray argU16; - ArgU8Layout2LayoutArray argU8; -}; -struct PoseidonEntry_SuperArm0Layout { - PoseidonStateLayout _super; - MemoryArgLayout _extra0; - MemoryArgLayout _extra1; - MemoryArgLayout _extra2; - MemoryArgLayout _extra3; - MemoryArgLayout _extra4; - MemoryArgLayout _extra5; - MemoryArgLayout _extra6; - MemoryArgLayout _extra7; - CycleArgLayout _extra8; - CycleArgLayout _extra9; - CycleArgLayout _extra10; - CycleArgLayout _extra11; -}; -struct ReadAddrLayout { - MemoryReadLayout addr32; -}; -struct PoseidonEcallLayout { - PoseidonStateLayout _super; - ReadAddrLayout stateAddr; - ReadAddrLayout bufInAddr; - ReadAddrLayout bufOutAddr; - MemoryReadLayout bitsAndCount; - IsZeroLayout _0; - NondetRegLayout isElem; - NondetRegLayout checkOut; - IsZeroLayout countZero; -}; -struct PoseidonEntry_SuperLayout { - PoseidonStateLayout _super; - PoseidonEntry_SuperArm0Layout arm0; - PoseidonEcallLayout arm1; -}; -struct _Arguments_PoseidonEntry_SuperLayout { - MemoryArgLayout8LayoutArray memoryArg; - CycleArgLayout4LayoutArray cycleArg; -}; -struct PoseidonEntryLayout { - PoseidonEntry_SuperLayout _super; - IsZeroLayout pcZero; - _Arguments_PoseidonEntry_SuperLayout _arguments_PoseidonEntry_Super; -}; -struct Poseidon0StateArm0Layout { - PoseidonEntryLayout _super; - MemoryArgLayout _extra0; - MemoryArgLayout _extra1; - MemoryArgLayout _extra2; - MemoryArgLayout _extra3; - MemoryArgLayout _extra4; - MemoryArgLayout _extra5; - MemoryArgLayout _extra6; - MemoryArgLayout _extra7; - CycleArgLayout _extra8; - CycleArgLayout _extra9; - CycleArgLayout _extra10; - CycleArgLayout _extra11; - ArgU16Layout _extra12; - ArgU16Layout _extra13; - ArgU16Layout _extra14; - ArgU16Layout _extra15; - ArgU16Layout _extra16; - ArgU16Layout _extra17; - ArgU16Layout _extra18; - ArgU16Layout _extra19; - ArgU16Layout _extra20; - ArgU16Layout _extra21; - ArgU16Layout _extra22; - ArgU16Layout _extra23; - ArgU16Layout _extra24; - ArgU16Layout _extra25; - ArgU16Layout _extra26; - ArgU16Layout _extra27; - ArgU8Layout _extra28; - ArgU8Layout _extra29; -}; -struct ReadElemLayout { - MemoryReadLayout elem32; -}; -using ReadElemLayout8LayoutArray = ::cuda::std::array; -struct PoseidonLoadStateLayout { - PoseidonStateLayout _super; - ReadElemLayout8LayoutArray loadList; -}; -struct Poseidon0StateArm1Layout { - PoseidonLoadStateLayout _super; - ArgU16Layout _extra0; - ArgU16Layout _extra1; - ArgU16Layout _extra2; - ArgU16Layout _extra3; - ArgU16Layout _extra4; - ArgU16Layout _extra5; - ArgU16Layout _extra6; - ArgU16Layout _extra7; - ArgU16Layout _extra8; - ArgU16Layout _extra9; - ArgU16Layout _extra10; - ArgU16Layout _extra11; - ArgU16Layout _extra12; - ArgU16Layout _extra13; - ArgU16Layout _extra14; - ArgU16Layout _extra15; - ArgU8Layout _extra16; - ArgU8Layout _extra17; -}; -using NondetRegLayout3LayoutArray = ::cuda::std::array; -struct OneHot_3_Layout { - NondetRegLayout3LayoutArray _super; -}; -struct MemoryGet_SuperArm1Layout { - MemoryPageInLayout _super; - CycleArgLayout _extra0; -}; -struct MemoryGet_SuperLayout { - MemoryReadLayout arm0; - MemoryGet_SuperArm1Layout arm1; - MemoryPageOutLayout arm2; -}; -using MemoryArgLayout2LayoutArray = ::cuda::std::array; -using CycleArgLayout1LayoutArray = ::cuda::std::array; -struct _Arguments_MemoryGet_SuperLayout { - MemoryArgLayout2LayoutArray memoryArg; - CycleArgLayout1LayoutArray cycleArg; -}; -struct MemoryGetLayout { - MemoryGet_SuperLayout _super; - _Arguments_MemoryGet_SuperLayout _arguments_MemoryGet_Super; -}; -using MemoryGetLayout8LayoutArray = ::cuda::std::array; -struct PoseidonLoadInShortLayout { - PoseidonStateLayout _super; - OneHot_3_Layout txType; - MemoryGetLayout8LayoutArray loadList; -}; -struct PoseidonLoadInLowLayout { - PoseidonStateLayout _super; - OneHot_3_Layout txType; - MemoryGetLayout8LayoutArray loadList; -}; -struct PoseidonLoadInHighLayout { - PoseidonStateLayout _super; - OneHot_3_Layout txType; - MemoryGetLayout8LayoutArray loadList; -}; -struct PoseidonLoadIn_SuperLayout { - PoseidonStateLayout _super; - PoseidonLoadInShortLayout arm0; - PoseidonLoadInLowLayout arm1; - PoseidonLoadInHighLayout arm2; -}; -struct _Arguments_PoseidonLoadIn_SuperLayout { - MemoryArgLayout16LayoutArray memoryArg; - CycleArgLayout8LayoutArray cycleArg; -}; -struct PoseidonLoadInLayout { - PoseidonLoadIn_SuperLayout _super; - OneHot_3_Layout _0; - _Arguments_PoseidonLoadIn_SuperLayout _arguments_PoseidonLoadIn_Super; -}; -struct Poseidon0StateArm2Layout { - PoseidonLoadInLayout _super; - ArgU16Layout _extra0; - ArgU16Layout _extra1; - ArgU16Layout _extra2; - ArgU16Layout _extra3; - ArgU16Layout _extra4; - ArgU16Layout _extra5; - ArgU16Layout _extra6; - ArgU16Layout _extra7; - ArgU16Layout _extra8; - ArgU16Layout _extra9; - ArgU16Layout _extra10; - ArgU16Layout _extra11; - ArgU16Layout _extra12; - ArgU16Layout _extra13; - ArgU16Layout _extra14; - ArgU16Layout _extra15; - ArgU8Layout _extra16; - ArgU8Layout _extra17; -}; -struct Poseidon0StateArm3Layout { - PoseidonStateLayout _super; - MemoryArgLayout _extra0; - MemoryArgLayout _extra1; - MemoryArgLayout _extra2; - MemoryArgLayout _extra3; - MemoryArgLayout _extra4; - MemoryArgLayout _extra5; - MemoryArgLayout _extra6; - MemoryArgLayout _extra7; - MemoryArgLayout _extra8; - MemoryArgLayout _extra9; - MemoryArgLayout _extra10; - MemoryArgLayout _extra11; - MemoryArgLayout _extra12; - MemoryArgLayout _extra13; - MemoryArgLayout _extra14; - MemoryArgLayout _extra15; - CycleArgLayout _extra16; - CycleArgLayout _extra17; - CycleArgLayout _extra18; - CycleArgLayout _extra19; - CycleArgLayout _extra20; - CycleArgLayout _extra21; - CycleArgLayout _extra22; - CycleArgLayout _extra23; - ArgU16Layout _extra24; - ArgU16Layout _extra25; - ArgU16Layout _extra26; - ArgU16Layout _extra27; - ArgU16Layout _extra28; - ArgU16Layout _extra29; - ArgU16Layout _extra30; - ArgU16Layout _extra31; - ArgU16Layout _extra32; - ArgU16Layout _extra33; - ArgU16Layout _extra34; - ArgU16Layout _extra35; - ArgU16Layout _extra36; - ArgU16Layout _extra37; - ArgU16Layout _extra38; - ArgU16Layout _extra39; - ArgU8Layout _extra40; - ArgU8Layout _extra41; -}; -struct Poseidon0StateArm4Layout { - PoseidonStateLayout _super; - MemoryArgLayout _extra0; - MemoryArgLayout _extra1; - MemoryArgLayout _extra2; - MemoryArgLayout _extra3; - MemoryArgLayout _extra4; - MemoryArgLayout _extra5; - MemoryArgLayout _extra6; - MemoryArgLayout _extra7; - MemoryArgLayout _extra8; - MemoryArgLayout _extra9; - MemoryArgLayout _extra10; - MemoryArgLayout _extra11; - MemoryArgLayout _extra12; - MemoryArgLayout _extra13; - MemoryArgLayout _extra14; - MemoryArgLayout _extra15; - CycleArgLayout _extra16; - CycleArgLayout _extra17; - CycleArgLayout _extra18; - CycleArgLayout _extra19; - CycleArgLayout _extra20; - CycleArgLayout _extra21; - CycleArgLayout _extra22; - CycleArgLayout _extra23; - ArgU16Layout _extra24; - ArgU16Layout _extra25; - ArgU16Layout _extra26; - ArgU16Layout _extra27; - ArgU16Layout _extra28; - ArgU16Layout _extra29; - ArgU16Layout _extra30; - ArgU16Layout _extra31; - ArgU16Layout _extra32; - ArgU16Layout _extra33; - ArgU16Layout _extra34; - ArgU16Layout _extra35; - ArgU16Layout _extra36; - ArgU16Layout _extra37; - ArgU16Layout _extra38; - ArgU16Layout _extra39; - ArgU8Layout _extra40; - ArgU8Layout _extra41; -}; -struct PoseidonCheckOut__0_SuperLayout { - ReadElemLayout goal; -}; -using PoseidonCheckOut__0_SuperLayout8LayoutArray = ::cuda::std::array; -struct PoseidonCheckOutLayout { - PoseidonStateLayout _super; - PoseidonCheckOut__0_SuperLayout8LayoutArray _1; - IsZeroLayout isNormal; - NondetExtRegLayout extInv; -}; -struct PoseidonDoOut_SuperArm0Layout { - PoseidonCheckOutLayout _super; - ArgU16Layout _extra0; - ArgU16Layout _extra1; - ArgU16Layout _extra2; - ArgU16Layout _extra3; - ArgU16Layout _extra4; - ArgU16Layout _extra5; - ArgU16Layout _extra6; - ArgU16Layout _extra7; - ArgU16Layout _extra8; - ArgU16Layout _extra9; - ArgU16Layout _extra10; - ArgU16Layout _extra11; - ArgU16Layout _extra12; - ArgU16Layout _extra13; - ArgU16Layout _extra14; - ArgU16Layout _extra15; -}; -struct PoseidonStoreOut__0_SuperLayout { - NondetU16RegLayout low; - U16RegLayout high; - MemoryWriteLayout _0; -}; -using PoseidonStoreOut__0_SuperLayout8LayoutArray = ::cuda::std::array; -struct PoseidonStoreOutLayout { - PoseidonStateLayout _super; - PoseidonStoreOut__0_SuperLayout8LayoutArray _1; - IsZeroLayout isNormal; - NondetExtRegLayout extInv; -}; -struct PoseidonDoOut_SuperLayout { - PoseidonStateLayout _super; - PoseidonDoOut_SuperArm0Layout arm0; - PoseidonStoreOutLayout arm1; -}; -struct _Arguments_PoseidonDoOut_SuperLayout { - MemoryArgLayout16LayoutArray memoryArg; - CycleArgLayout8LayoutArray cycleArg; - ArgU16Layout16LayoutArray argU16; -}; -struct PoseidonDoOutLayout { - PoseidonDoOut_SuperLayout _super; - _Arguments_PoseidonDoOut_SuperLayout _arguments_PoseidonDoOut_Super; -}; -struct Poseidon0StateArm5Layout { - PoseidonDoOutLayout _super; - ArgU8Layout _extra0; - ArgU8Layout _extra1; -}; -struct PoseidonPaging_SuperLayout { - PoseidonStateLayout _super; - PoseidonStateLayout arm0; - PoseidonStateLayout arm1; - PoseidonStateLayout arm2; - PoseidonStateLayout arm3; - PoseidonStateLayout arm4; - PoseidonStateLayout arm5; -}; -using NondetRegLayout6LayoutArray = ::cuda::std::array; -struct OneHot_6_Layout { - NondetRegLayout6LayoutArray _super; -}; -struct U8RegLayout { - NondetU8RegLayout ret; -}; -struct IsU24Layout { - NondetU16RegLayout low16; - U8RegLayout _0; -}; -using ArgU16Layout1LayoutArray = ::cuda::std::array; -using ArgU8Layout1LayoutArray = ::cuda::std::array; -struct _Arguments_PoseidonPaging__1Layout { - ArgU16Layout1LayoutArray argU16; - ArgU8Layout1LayoutArray argU8; -}; -struct PoseidonPaging__1Arm0_SuperLayout { - IsU24Layout _0; -}; -struct PoseidonPaging__1Arm1_SuperLayout { - IsU24Layout _0; -}; -struct PoseidonPaging__1Layout { - PoseidonPaging__1Arm0_SuperLayout arm0; - PoseidonPaging__1Arm1_SuperLayout arm1; -}; -struct PoseidonPagingLayout { - PoseidonPaging_SuperLayout _super; - NondetRegLayout curIdx; - NondetRegLayout curMode; - OneHot_6_Layout modeSplit; - IsU24Layout _0; - _Arguments_PoseidonPaging__1Layout _arguments_PoseidonPaging__1; - PoseidonPaging__1Layout _3; - NondetRegLayout _4; -}; -struct Poseidon0StateArm6Layout { - PoseidonPagingLayout _super; - MemoryArgLayout _extra0; - MemoryArgLayout _extra1; - MemoryArgLayout _extra2; - MemoryArgLayout _extra3; - MemoryArgLayout _extra4; - MemoryArgLayout _extra5; - MemoryArgLayout _extra6; - MemoryArgLayout _extra7; - MemoryArgLayout _extra8; - MemoryArgLayout _extra9; - MemoryArgLayout _extra10; - MemoryArgLayout _extra11; - MemoryArgLayout _extra12; - MemoryArgLayout _extra13; - MemoryArgLayout _extra14; - MemoryArgLayout _extra15; - CycleArgLayout _extra16; - CycleArgLayout _extra17; - CycleArgLayout _extra18; - CycleArgLayout _extra19; - CycleArgLayout _extra20; - CycleArgLayout _extra21; - CycleArgLayout _extra22; - CycleArgLayout _extra23; - ArgU16Layout _extra24; - ArgU16Layout _extra25; - ArgU16Layout _extra26; - ArgU16Layout _extra27; - ArgU16Layout _extra28; - ArgU16Layout _extra29; - ArgU16Layout _extra30; - ArgU16Layout _extra31; - ArgU16Layout _extra32; - ArgU16Layout _extra33; - ArgU16Layout _extra34; - ArgU16Layout _extra35; - ArgU16Layout _extra36; - ArgU16Layout _extra37; -}; -struct PoseidonStoreState__0_SuperLayout { - NondetU16RegLayout low; - U16RegLayout high; - MemoryWriteLayout _0; -}; -using PoseidonStoreState__0_SuperLayout8LayoutArray = ::cuda::std::array; -struct PoseidonStoreStateLayout { - PoseidonStateLayout _super; - PoseidonStoreState__0_SuperLayout8LayoutArray _1; -}; -struct Poseidon0StateArm7Layout { - PoseidonStoreStateLayout _super; - ArgU8Layout _extra0; - ArgU8Layout _extra1; -}; -struct Poseidon0StateLayout { - PoseidonStateLayout _super; - Poseidon0StateArm0Layout arm0; - Poseidon0StateArm1Layout arm1; - Poseidon0StateArm2Layout arm2; - Poseidon0StateArm3Layout arm3; - Poseidon0StateArm4Layout arm4; - Poseidon0StateArm5Layout arm5; - Poseidon0StateArm6Layout arm6; - Poseidon0StateArm7Layout arm7; -}; -struct Poseidon0Layout { - PoseidonStateLayout state; - _Arguments_Poseidon0StateLayout _arguments_Poseidon0State; - Poseidon0StateLayout stateRedef; - CycleArgLayout arg; -}; -struct SBoxLayout { - NondetRegLayout _super; - NondetRegLayout cubed; -}; -using SBoxLayout24LayoutArray = ::cuda::std::array; -struct DoExtRoundLayout { - SBoxLayout24LayoutArray _1; -}; -struct DoExtRoundByIdxLayout { - DoExtRoundLayout _super; - OneHot_8_Layout idxHot; -}; -struct PoseidonExtRoundLayout { - PoseidonStateLayout _super; - IsZeroLayout isRound3; - IsZeroLayout isRound7; - IsZeroLayout lastBlock; - DoExtRoundByIdxLayout nextInner; -}; -struct DoIntRoundLayout { - SBoxLayout sbox; -}; -using DoIntRoundLayout21LayoutArray = ::cuda::std::array; -struct DoIntRoundsLayout { - DoIntRoundLayout21LayoutArray _super; -}; -struct PoseidonIntRoundsLayout { - PoseidonStateLayout _super; - DoIntRoundsLayout nextInner; -}; -struct Poseidon1StateLayout { - PoseidonStateLayout _super; - PoseidonExtRoundLayout arm0; - PoseidonIntRoundsLayout arm1; - PoseidonStateLayout arm2; - PoseidonStateLayout arm3; - PoseidonStateLayout arm4; - PoseidonStateLayout arm5; - PoseidonStateLayout arm6; - PoseidonStateLayout arm7; -}; -struct Poseidon1Layout { - PoseidonStateLayout state; - Poseidon1StateLayout stateRedef; - CycleArgLayout arg; -}; -struct TopInstResultLayout { - NondetRegLayout11LayoutArray _selector; - Misc0Layout arm0; - Misc1Layout arm1; - Misc2Layout arm2; - Mul0Layout arm3; - Div0Layout arm4; - Mem0Layout arm5; - Mem1Layout arm6; - Control0Layout arm7; - ECall0Layout arm8; - Poseidon0Layout arm9; - Poseidon1Layout arm10; -}; -struct TopLayout { - NondetRegLayout nextPcLow; - NondetRegLayout nextPcHigh; - NondetRegLayout nextState_0; - NondetRegLayout nextMachineMode; - NondetRegLayout isFirstCycle; - NondetRegLayout cycleND; - NondetRegLayout cycle; - NondetRegLayout major; - NondetRegLayout minor; - InstInputLayout instInput; - OneHot_11_Layout majorOnehot; - TopInstResultLayout instResult; -}; -struct DigestRegValues_SuperLayout { - NondetRegLayout low; - NondetRegLayout high; -}; -using DigestRegValues_SuperLayout8LayoutArray = ::cuda::std::array; -struct DigestRegLayout { - DigestRegValues_SuperLayout8LayoutArray values; -}; -struct Arg_ArgU8Layout { - Reg val; -}; -struct Arg_ArgU16Layout { - Reg val; -}; -struct Arg_MemoryArgLayout { - Reg addr; - Reg cycle; - Reg dataLow; - Reg dataHigh; -}; -struct Arg_CycleArgLayout { - Reg cycle; -}; -struct _accumLayout { - Arg_ArgU8Layout argU8; - Arg_ArgU16Layout argU16; - Arg_MemoryArgLayout memoryArg; - Arg_CycleArgLayout cycleArg; - Reg _offset; -}; -using Reg19LayoutArray = ::cuda::std::array; -struct LayoutAccumLayout { - Reg19LayoutArray columns; -}; -struct TestSuccRunLayout { - TopLayout _0; -}; -struct _globalLayout { - DigestRegLayout input; - NondetRegLayout isTerminate; - DigestRegLayout output; - NondetExtRegLayout rng; - DigestRegLayout stateIn; - DigestRegLayout stateOut; - NondetRegLayout termA0high; - NondetRegLayout termA0low; - NondetRegLayout termA1high; - NondetRegLayout termA1low; -}; -struct _mixLayout { - _accumLayout randomness; -}; -struct NondetRegStruct { - Val _super; -}; -struct NondetExtRegStruct { - ExtVal _super; -}; -struct RegStruct { - NondetRegStruct _super; -}; -struct BitRegStruct { -}; -struct NondetFakeTwitRegStruct { - Val _super; -}; -struct FakeTwitRegStruct { -}; -struct ArgU8Struct { - NondetRegStruct count; - NondetRegStruct val; -}; -struct U8RegStruct { -}; -struct ArgU16Struct { - NondetRegStruct count; - NondetRegStruct val; -}; -struct U16RegStruct { - Val _super; -}; -using Val5Array = ::cuda::std::array; -using Val16Array = ::cuda::std::array; -using NondetRegStruct5Array = ::cuda::std::array; -struct ToBits_5_Struct { - NondetRegStruct5Array _super; -}; -struct ValU32Struct { - Val low; - Val high; -}; -struct DenormedValU32Struct { - Val low; - Val high; -}; -struct NormalizeU32Struct { - ValU32Struct _super; - NondetRegStruct carry; -}; -struct AddrDecomposeStruct { - Val _super; - NondetRegStruct low2; -}; -struct AddrDecomposeBitsStruct { - Val _super; - NondetRegStruct low0; - NondetRegStruct low1; - Val low2; - Val addr; -}; -struct CmpEqualStruct { - RegStruct isEqual; -}; -struct CmpLessThanUnsignedStruct { - Val isLessThan; -}; -struct CmpLessThanStruct { - RegStruct isLessThan; -}; -using NondetRegStruct16Array = ::cuda::std::array; -struct ToBits_16_Struct { - NondetRegStruct16Array _super; -}; -struct FromBits_16_Struct { - Val _super; -}; -struct DecoderStruct { - NondetRegStruct opcode; - Val rs1; - Val rs2; - Val rd; - Val func7; - Val func3; - ValU32Struct immI; - ValU32Struct immS; - ValU32Struct immB; - ValU32Struct immU; - ValU32Struct immJ; -}; -struct MemoryArgStruct { - NondetRegStruct count; - NondetRegStruct addr; - NondetRegStruct cycle; - NondetRegStruct dataLow; - NondetRegStruct dataHigh; -}; -struct CycleArgStruct { - NondetRegStruct count; - NondetRegStruct cycle; -}; -struct IsCycleStruct { -}; -struct MemoryIOStruct { - MemoryArgStruct oldTxn; - MemoryArgStruct newTxn; -}; -struct IsForwardStruct { -}; -struct GetDataStruct { - ValU32Struct _super; - Val diffLow; - Val diffHigh; -}; -struct MemoryWriteStruct { -}; -struct MemoryWriteUnconstrainedStruct { -}; -using Val3Array = ::cuda::std::array; -using NondetRegStruct3Array = ::cuda::std::array; -struct OneHot_3_Struct { - NondetRegStruct3Array _super; -}; -using Val8Array = ::cuda::std::array; -using NondetRegStruct8Array = ::cuda::std::array; -struct OneHot_8_Struct { - NondetRegStruct8Array _super; - NondetRegStruct8Array bits; -}; -struct InstInputStruct { - ValU32Struct pcU32; - Val state; - Val mode; - OneHot_8_Struct minorOnehot; -}; -struct WriteRdStruct { -}; -struct ExpandU32Struct { - NondetRegStruct b0; - NondetRegStruct b1; - NondetRegStruct b2; - NondetRegStruct b3; - Val neg; -}; -struct SplitTotalStruct { - NondetRegStruct out; - Val carry; -}; -struct MultiplySettingsStruct { - Val aSigned; - Val bSigned; - Val cSigned; -}; -struct MultiplyAccumulateStruct { - ValU32Struct outLow; - ValU32Struct outHigh; -}; -struct DivInputStruct { - InstInputStruct _super; - InstInputStruct ii; - DecoderStruct decoded; - GetDataStruct rs1; - GetDataStruct rs2; -}; -struct DivideReturnStruct { - ValU32Struct quot; - ValU32Struct rem; -}; -struct InstOutputStruct { - ValU32Struct newPc; - Val newState; - Val newMode; -}; -struct MiscInputStruct { - InstInputStruct _super; - InstInputStruct ii; - DecoderStruct decoded; - GetDataStruct rs1; - GetDataStruct rs2; -}; -struct MiscOutputStruct { - Val doWrite; - DenormedValU32Struct toWrite; - DenormedValU32Struct newPc; -}; -struct MulInputStruct { - InstInputStruct _super; - InstInputStruct ii; - DecoderStruct decoded; - GetDataStruct rs1; - GetDataStruct rs2; -}; -struct DoMulStruct { - ValU32Struct low; - ValU32Struct high; -}; -struct MemLoadInputStruct { - InstInputStruct ii; - DecoderStruct decoded; - AddrDecomposeBitsStruct addr; - GetDataStruct data; -}; -struct MemStoreInputStruct { - DecoderStruct decoded; - GetDataStruct rs2; - AddrDecomposeBitsStruct addr; - GetDataStruct data; -}; -struct MemStoreFinalizeStruct { -}; -struct SplitWordStruct { - NondetRegStruct byte0; - NondetRegStruct byte1; -}; -struct DigestRegValues_SuperStruct { - RegStruct low; - RegStruct high; -}; -using DigestRegValues_SuperStruct8Array = ::cuda::std::array; -struct DigestRegStruct { - DigestRegValues_SuperStruct8Array values; -}; -using ValU32Struct8Array = ::cuda::std::array; -struct ControlLoadRoot__0Struct { -}; -using ControlLoadRoot__0Struct8Array = ::cuda::std::array; -struct ControlResume_SuperArm1_Super__0Struct { -}; -using ControlResume_SuperArm1_Super__0Struct8Array = ::cuda::std::array; -struct ComponentStruct { -}; -using GetDataStruct8Array = ::cuda::std::array; -struct ControlTable_SuperArm0_Super__0Struct { -}; -struct ControlTable_SuperArm1_Super__0Struct { -}; -using ControlTable_SuperArm0_Super__0Struct16Array = ::cuda::std::array; -using ControlTable_SuperArm1_Super__0Struct16Array = ::cuda::std::array; -using Val4Array = ::cuda::std::array; -using NondetRegStruct4Array = ::cuda::std::array; -struct OneHot_4_Struct { - NondetRegStruct4Array _super; -}; -struct ECallOutputStruct { - Val state; - Val s0; - Val s1; - Val s2; -}; -struct DecomposeLow2Struct { - NondetRegStruct high; - NondetRegStruct low2; - OneHot_4_Struct low2Hot; - NondetRegStruct highZero; - RegStruct isZero; - Val low2Nonzero; -}; -struct ECallHostReadWords__0Struct { -}; -using ECallHostReadWords__0Struct4Array = ::cuda::std::array; -using Val24Array = ::cuda::std::array; -struct MultiplyByMInt_Super_SuperStruct { - Val _super; -}; -using MultiplyByMInt_Super_SuperStruct24Array = ::cuda::std::array; -struct MultiplyByMIntStruct { - MultiplyByMInt_Super_SuperStruct24Array _super; -}; -struct DoIntRounds__0_SuperStruct { - Val _super; -}; -using DoIntRounds__0_SuperStruct21Array = ::cuda::std::array; -struct DoIntRoundsStruct { - Val24Array _super; -}; -using RegStruct24Array = ::cuda::std::array; -struct MultiplyByMExt_Super_SuperStruct { - Val _super; -}; -using MultiplyByMExt_Super_SuperStruct24Array = ::cuda::std::array; -struct MultiplyByMExtStruct { - MultiplyByMExt_Super_SuperStruct24Array _super; -}; -struct PoseidonStateStruct { - RegStruct hasState; - RegStruct stateAddr; - RegStruct bufOutAddr; - RegStruct isElem; - RegStruct checkOut; - RegStruct loadTxType; - RegStruct nextState; - RegStruct subState; - RegStruct bufInAddr; - RegStruct count; - RegStruct mode; - RegStruct24Array inner; - NondetExtRegStruct zcheck; -}; -struct PoseidonOpDefStruct { - Val hasState; - Val stateAddr; - Val bufOutAddr; - Val isElem; - Val checkOut; - Val loadTxType; -}; -struct ReadAddrStruct { - Val _super; -}; -struct ReadElemStruct { - Val _super; -}; -using ReadElemStruct8Array = ::cuda::std::array; -struct PoseidonCheckOut__0Struct { -}; -using PoseidonCheckOut__0Struct8Array = ::cuda::std::array; -struct PoseidonStoreOut__0Struct { -}; -using PoseidonStoreOut__0Struct8Array = ::cuda::std::array; -struct PoseidonStoreState__0Struct { -}; -using PoseidonStoreState__0Struct8Array = ::cuda::std::array; -struct IsU24Struct { -}; -using Val6Array = ::cuda::std::array; -using NondetRegStruct6Array = ::cuda::std::array; -struct OneHot_6_Struct { - NondetRegStruct6Array _super; - NondetRegStruct6Array bits; -}; -using Val11Array = ::cuda::std::array; -using NondetRegStruct11Array = ::cuda::std::array; -struct OneHot_11_Struct { - NondetRegStruct11Array _super; -}; -struct TopStruct { -}; diff --git a/risc0/circuit/rv32im-v2-sys/kernels/cuda/witgen.h b/risc0/circuit/rv32im-v2-sys/kernels/cuda/witgen.h deleted file mode 100644 index eaa5d23f..00000000 --- a/risc0/circuit/rv32im-v2-sys/kernels/cuda/witgen.h +++ /dev/null @@ -1,280 +0,0 @@ -// Copyright 2024 RISC Zero, Inc. -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include "buffers.h" -#include "fp.h" -#include "fpext.h" -#include "preflight.h" -#include "tables.h" - -#include -#include - -namespace risc0::circuit::rv32im_v2::cuda { - -#if defined(__clang__) -#pragma clang diagnostic ignored "-Wunused-parameter" -#pragma clang diagnostic ignored "-Wunused-variable" -#elif defined(__GNUC__) -#pragma GCC diagnostic ignored "-Wunused-parameter" -#pragma GCC diagnostic ignored "-Wunused-variable" -#pragma GCC diagnostic ignored "-Wunused-but-set-variable" -#endif - -using Val = Fp; -using ExtVal = FpExt; - -struct ExecContext { - __device__ ExecContext(PreflightTrace& preflight, LookupTables& tables, size_t cycle) - : preflight(preflight), tables(tables), cycle(cycle) {} - PreflightTrace& preflight; - LookupTables& tables; - size_t cycle; -}; - -struct BufferObj { - __device__ virtual Val load(ExecContext& ctx, size_t col, size_t back) = 0; - __device__ virtual void store(ExecContext& ctx, size_t col, Val val) = 0; -}; - -struct MutableBufObj : public BufferObj { - __device__ MutableBufObj(Buffer& buf) : buf(buf) {} - - __device__ Val load(ExecContext& ctx, size_t col, size_t back) override { - if (back > ctx.cycle) { - return 0; - } - return buf.get(ctx.cycle - back, col); - } - - __device__ void store(ExecContext& ctx, size_t col, Val val) override { - return buf.set(ctx.cycle, col, val); - } - - Buffer& buf; -}; - -using MutableBuf = MutableBufObj*; - -struct GlobalBufObj : public BufferObj { - __device__ GlobalBufObj(Buffer& buf) : buf(buf) {} - - __device__ Val load(ExecContext& ctx, size_t col, size_t back) override { - assert(back == 0); - return buf.get(0, col); - } - - __device__ void store(ExecContext& ctx, size_t col, Val val) override { - return buf.set(0, col, val); - } - - Buffer& buf; -}; - -using GlobalBuf = GlobalBufObj*; - -template struct BoundLayout { - __device__ BoundLayout(const T& layout, BufferObj* buf) : layout(layout), buf(buf) {} - - const T& layout; - BufferObj* buf = nullptr; -}; - -__device__ inline size_t to_size_t(Val v) { - return v.asUInt32(); -} - -__device__ inline Val mod(Val a, Val b) { - return Val(a.asUInt32() % b.asUInt32()); -} - -constexpr size_t EXT_SIZE = 4; - -// Built in field operations -__device__ inline Val isz(Val x) { - return Val(x == Val(0)); -} - -__device__ inline Val neg_0(Val x) { - return -x; -} - -__device__ inline Val inv_0(Val x) { - return inv(x); -} - -__device__ inline ExtVal inv_0(ExtVal x) { - return inv(x); -} - -__device__ inline Val bitAnd(Val a, Val b) { - return Val(a.asUInt32() & b.asUInt32()); -} - -__device__ inline Val inRange(Val low, Val mid, Val high) { - assert(low <= high); - return Val(low <= mid && mid < high); -} - -__device__ inline void eqz(Val a, const char* loc) { - if (a.asUInt32()) { - printf("eqz failure at: %s\n", loc); - assert(false && "eqz failure"); - } -} - -__device__ inline void eqz(ExtVal a, const char* loc) { - for (size_t i = 0; i < EXT_SIZE; i++) { - eqz(a.elems[i], loc); - } -} - -// Define index type (used in back) -using Index = size_t; - -struct Reg { - __device__ constexpr Reg(size_t col) : col(col) {} - size_t col; -}; - -#define BIND_LAYOUT(orig, buf) BoundLayout(orig, buf) -#define LAYOUT_LOOKUP(orig, elem) BoundLayout(orig.layout.elem, orig.buf) -#define LAYOUT_SUBSCRIPT(orig, index) BoundLayout(orig.layout[index], orig.buf) -#define EQZ(val, loc) eqz(val, loc) - -__device__ inline void store(ExecContext& ctx, BoundLayout reg, Val val) { - reg.buf->store(ctx, reg.layout.col, val); -} - -__device__ inline void set(ExecContext& ctx, BufferObj* buf, size_t offset, Val val) { - static_cast(buf)->store(ctx, offset, val); -} - -__device__ inline void setGlobal(ExecContext& ctx, BufferObj* buf, size_t offset, Val val) { - static_cast(buf)->store(ctx, offset, val); -} - -__device__ inline void storeExt(ExecContext& ctx, BoundLayout reg, ExtVal val) { - for (size_t i = 0; i < EXT_SIZE; i++) { - reg.buf->store(ctx, reg.layout.col + i, val.elems[i]); - } -} - -__device__ inline Val load(ExecContext& ctx, BoundLayout reg, size_t back) { - return reg.buf->load(ctx, reg.layout.col, back); -} - -__device__ inline ExtVal loadExt(ExecContext& ctx, BoundLayout reg, size_t back) { - ::cuda::std::array elems; - for (size_t i = 0; i < EXT_SIZE; i++) { - elems[i] = reg.buf->load(ctx, reg.layout.col + i, back); - } - return FpExt(elems[0], elems[1], elems[2], elems[3]); -} - -__device__ inline Val get(ExecContext& ctx, BufferObj* buf, size_t offset, size_t back) { - return static_cast(buf)->load(ctx, offset, back); -} - -__device__ inline Val getGlobal(ExecContext& ctx, BufferObj* buf, size_t offset) { - return static_cast(buf)->load(ctx, offset, 0); -} - -#define LOAD(reg, back) load(ctx, reg, back) -#define LOAD_EXT(reg, back) loadExt(ctx, reg, back) -#define STORE(reg, val) store(ctx, reg, val) -#define STORE_EXT(reg, val) storeExt(ctx, reg, val) - -// Map + reduce support -template -__device__ inline auto map(::cuda::std::array a, F f) { - ::cuda::std::array out; - for (size_t i = 0; i < N; i++) { - out[i] = f(a[i]); - } - return out; -} - -template -__device__ inline auto map(::cuda::std::array a, ::cuda::std::array b, F f) { - ::cuda::std::array out; - for (size_t i = 0; i < N; i++) { - out[i] = f(a[i], b[i]); - } - return out; -} - -template -__device__ inline auto map(::cuda::std::array a, const BoundLayout& b, F f) { - ::cuda::std::array out; - for (size_t i = 0; i < N; i++) { - out[i] = f(a[i], BoundLayout(b.layout[i], b.buf)); - } - return out; -} - -template -__device__ inline auto reduce(::cuda::std::array elems, T2 start, F f) { - T2 cur = start; - for (size_t i = 0; i < N; i++) { - cur = f(cur, elems[i]); - } - return cur; -} - -template -__device__ inline auto -reduce(::cuda::std::array elems, T2 start, const BoundLayout& b, F f) { - T2 cur = start; - for (size_t i = 0; i < N; i++) { - cur = f(cur, elems[i], BoundLayout(b.layout[i], b.buf)); - } - return cur; -} - -// All the extern handling -#define INVOKE_EXTERN(ctx, name, ...) extern_##name(ctx, ##__VA_ARGS__) - -__device__ ::cuda::std::array extern_getMemoryTxn(ExecContext& ctx, Val addrElem); -__device__ void extern_lookupDelta(ExecContext& ctx, Val table, Val index, Val count); -__device__ Val extern_lookupCurrent(ExecContext& ctx, Val table, Val index); -__device__ void -extern_memoryDelta(ExecContext& ctx, Val addr, Val cycle, Val dataLow, Val dataHigh, Val count); -__device__ uint32_t extern_getDiffCount(ExecContext& ctx, Val cycle); -__device__ Val extern_isFirstCycle_0(ExecContext& ctx); -__device__ Val extern_getCycle(ExecContext& ctx); -__device__ ::cuda::std::array extern_divide( - ExecContext& ctx, Val numerLow, Val numerHigh, Val denomLow, Val denomHigh, Val signType); -__device__ void extern_print(ExecContext& ctx, Val v); -__device__ ::cuda::std::array extern_getMajorMinor(ExecContext& ctx); -__device__ Val extern_hostReadPrepare(ExecContext& ctx, Val fp, Val len); -__device__ Val extern_hostWrite(ExecContext& ctx, Val fdVal, Val addrLow, Val addrHigh, Val lenVal); -__device__ ::cuda::std::array extern_nextPagingIdx(ExecContext& ctx); - -template __device__ void extern_log(ExecContext& ctx, const char* message, T vals) { - // printf("%s\n", message); -} - -// Setup the basic field stuff -#define SET_FIELD(x) /**/ - -#include "defs.cu.inc" - -#include "types.cuh.inc" - -#include "layout.cu.inc" - -} // namespace risc0::circuit::rv32im_v2::cuda diff --git a/risc0/circuit/rv32im-v2-sys/kernels/cxx/buffers.h b/risc0/circuit/rv32im-v2-sys/kernels/cxx/buffers.h deleted file mode 100644 index 7d017bbf..00000000 --- a/risc0/circuit/rv32im-v2-sys/kernels/cxx/buffers.h +++ /dev/null @@ -1,55 +0,0 @@ -// Copyright 2024 RISC Zero, Inc. -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include "fp.h" - -#include -#include - -namespace risc0 { - -struct Buffer { - Fp* buf; - size_t rows; - size_t cols; - bool checkedReads; - - void set(size_t row, size_t col, Fp val) { - Fp& elem = buf[col * rows + row]; - if (elem != Fp::invalid() && elem != val) { - printf("set(row: %zu, col: %zu, val: 0x%08x) cur: 0x%08x\n", - row, - col, - val.asUInt32(), - elem.asUInt32()); - throw std::runtime_error("Inconsistent set"); - } - // printf("set(row: %zu, col: %zu, val: 0x%08x)\n", row, col, val.asUInt32()); - elem = val; - } - - Fp get(size_t row, size_t col) { - Fp ret = buf[col * rows + row]; - if (ret == Fp::invalid() && checkedReads) { - printf("get(row: %zu, col: %zu) -> 0x%08x\n", row, col, ret.asRaw()); - throw std::runtime_error("Read of unset value"); - } - // printf("get(row: %zu, col: %zu) -> 0x%08x\n", row, col, ret.asUInt32()); - return ret; - } -}; - -} // namespace risc0 diff --git a/risc0/circuit/rv32im-v2-sys/kernels/cxx/defs.cpp.inc b/risc0/circuit/rv32im-v2-sys/kernels/cxx/defs.cpp.inc deleted file mode 100644 index 5fd202ef..00000000 --- a/risc0/circuit/rv32im-v2-sys/kernels/cxx/defs.cpp.inc +++ /dev/null @@ -1,7 +0,0 @@ -SET_FIELD(BabyBear); -constexpr size_t kRegCountAccum = 76; -constexpr size_t kRegCountCode = 1; -constexpr size_t kRegCountData = 192; -constexpr size_t kRegCountGlobal = 73; -constexpr size_t kRegCountMix = 32; -constexpr size_t kRegCountTest = 192; diff --git a/risc0/circuit/rv32im-v2-sys/kernels/cxx/eval_check.cpp b/risc0/circuit/rv32im-v2-sys/kernels/cxx/eval_check.cpp deleted file mode 100644 index 4eae5379..00000000 --- a/risc0/circuit/rv32im-v2-sys/kernels/cxx/eval_check.cpp +++ /dev/null @@ -1,39 +0,0 @@ -// Copyright 2024 RISC Zero, Inc. -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#include "fp.h" -#include "fpext.h" - -#include -#include -#include -#include - -using namespace risc0; - -namespace risc0::circuit::rv32im_v2 { - -FpExt poly_fp(size_t cycle, size_t steps, FpExt* poly_mix, Fp** args); - -} // namespace risc0::circuit::rv32im_v2 - -extern "C" const char* risc0_circuit_rv32im_v2_cpu_poly_fp( - size_t cycle, size_t steps, FpExt* poly_mix, Fp** args, FpExt* result) { - try { - *result = circuit::rv32im_v2::poly_fp(cycle, steps, poly_mix, args); - } catch (const std::exception& err) { - return strdup(err.what()); - } - return nullptr; -} diff --git a/risc0/circuit/rv32im-v2-sys/kernels/cxx/ffi.cpp b/risc0/circuit/rv32im-v2-sys/kernels/cxx/ffi.cpp deleted file mode 100644 index 55fd93a2..00000000 --- a/risc0/circuit/rv32im-v2-sys/kernels/cxx/ffi.cpp +++ /dev/null @@ -1,287 +0,0 @@ -// Copyright 2024 RISC Zero, Inc. -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#include "buffers.h" -#include "fp.h" -#include "fpext.h" -#include "preflight.h" -#include "steps.h" -#include "witgen.h" - -#include "vendor/poolstl.hpp" - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -namespace risc0::circuit::rv32im_v2::cpu { - -std::array divide_rv32im(uint32_t numer, uint32_t denom, uint32_t signType) { - uint32_t onesComp = (signType == 2); - bool negNumer = signType && int32_t(numer) < 0; - bool negDenom = signType == 1 && int32_t(denom) < 0; - if (negNumer) { - numer = -numer - onesComp; - } - if (negDenom) { - denom = -denom - onesComp; - } - uint32_t quot; - uint32_t rem; - if (denom == 0) { - quot = 0xffffffff; - rem = numer; - } else { - quot = numer / denom; - rem = numer % denom; - } - uint32_t quotNegOut = (negNumer ^ negDenom) - ((denom == 0) * negNumer); - uint32_t remNegOut = negNumer; - if (quotNegOut) { - quot = -quot - onesComp; - } - if (remNegOut) { - rem = -rem - onesComp; - } - return {quot, rem}; -} - -std::array extern_getMemoryTxn(ExecContext& ctx, Val addrElem) { - uint32_t addr = addrElem.asUInt32(); - size_t txnIdx = ctx.preflight.cycles[ctx.cycle].txnIdx++; - const MemoryTransaction& txn = ctx.preflight.txns[txnIdx]; - // printf("getMemoryTxn(%lu, 0x%08x): txn(%u, 0x%08x, 0x%08x)\n", - // ctx.cycle, - // addr, - // txn.cycle, - // txn.addr, - // txn.word); - - if (txn.cycle != ctx.cycle) { - printf("txn.cycle: %u, ctx.cycle: %zu\n", txn.cycle, ctx.cycle); - throw std::runtime_error("txn cycle mismatch"); - } - - if (txn.addr != addr) { - printf("txn.addr: 0x%08x, addr: 0x%08x\n", txn.addr, addr); - throw std::runtime_error("memory peek not in preflight"); - } - return { - txn.prevCycle, - txn.prevWord & 0xffff, - txn.prevWord >> 16, - txn.word & 0xffff, - txn.word >> 16, - }; -} - -void extern_lookupDelta(ExecContext& ctx, Val table, Val index, Val count) { - // printf("lookupDelta(table: %u, index: %u, count: %u, P: %u)\n", - // table.asUInt32(), - // index.asUInt32(), - // count.asUInt32(), - // Fp::P); - ctx.tables.lookupDelta(table, index, count); -} - -Val extern_lookupCurrent(ExecContext& ctx, Val table, Val index) { - Val ret = ctx.tables.lookupCurrent(table, index); - // printf("lookupCurrent(table: %u, index: %u): %u\n", - // table.asUInt32(), - // index.asUInt32(), - // ret.asUInt32()); - return ret; -} - -void extern_memoryDelta( - ExecContext& ctx, Val addr, Val cycle, Val dataLow, Val dataHigh, Val count) { - // printf("memoryDelta\n"); - // ctx.tables.memoryDelta( - // addr.asUInt32(), cycle.asUInt32(), dataLow.asUInt32() | (dataHigh.asUInt32() << 16), - // count); -} - -uint32_t extern_getDiffCount(ExecContext& ctx, Val cycle) { - // printf("getDiffCount\n"); - return ctx.preflight.cycles[cycle.asUInt32()].diffCount; -} - -Val extern_isFirstCycle_0(ExecContext& ctx) { - return ctx.cycle == 0; -} - -Val extern_getCycle(ExecContext& ctx) { - return ctx.cycle; -} - -std::ostream& hex_word(std::ostream& os, uint32_t word) { - std::cout << "0x" // - << std::hex << std::setw(8) << std::setfill('0') // - << word // - << std::dec << std::setw(0); - return os; -} - -void extern_log(ExecContext& ctx, const std::string& message, std::vector vals) { - // std::cout << "LOG: '" << message << "': "; - // for (size_t i = 0; i < vals.size(); i++) { - // if (i != 0) { - // std::cout << ", "; - // } - // hex_word(std::cout, vals[i].asUInt32()); - // } - // std::cout << "\n"; -} - -std::array extern_divide( - ExecContext& ctx, Val numerLow, Val numerHigh, Val denomLow, Val denomHigh, Val signType) { - printf("divide\n"); - uint32_t numer = numerLow.asUInt32() | (numerHigh.asUInt32() << 16); - uint32_t denom = denomLow.asUInt32() | (denomHigh.asUInt32() << 16); - auto [quot, rem] = divide_rv32im(numer, denom, signType.asUInt32()); - std::array ret; - ret[0] = quot & 0xffff; - ret[1] = quot >> 16; - ret[2] = rem & 0xffff; - ret[3] = rem >> 16; - return ret; -} - -// TODO: logging -void extern_print(ExecContext& ctx, Val v) { - std::cout << "LOG: " << v.asUInt32() << "\n"; -} - -std::array extern_getMajorMinor(ExecContext& ctx) { - uint8_t major = ctx.preflight.cycles[ctx.cycle].major; - uint8_t minor = ctx.preflight.cycles[ctx.cycle].minor; - return {major, minor}; -} - -Val extern_hostReadPrepare(ExecContext& ctx, Val fp, Val len) { - std::cout << "hostReadPrepare\n"; - throw std::runtime_error("extern_hostReadPrepare"); - // return ctx.stepHandler.readPrepare(fp.asUInt32(), len.asUInt32()); - // return 0; -} - -Val extern_hostWrite(ExecContext& ctx, Val fdVal, Val addrLow, Val addrHigh, Val lenVal) { - std::cout << "hostWrite\n"; - throw std::runtime_error("extern_hostWrite"); - // uint32_t fd = fdVal.asUInt32(); - // uint32_t addr = addrLow.asUInt32() | (addrHigh.asUInt32() << 16); - // uint32_t len = lenVal.asUInt32(); - // return ctx.stepHandler.write(fd, addr, len); - // return 0; -} - -std::array extern_nextPagingIdx(ExecContext& ctx) { - uint32_t pagingIdx = ctx.preflight.cycles[ctx.cycle].pagingIdx; - uint32_t machineMode = ctx.preflight.cycles[ctx.cycle].machineMode; - // printf("nextPagingIdx: (0x%05x, %u)\n", pagingIdx, machineMode); - return {pagingIdx, machineMode}; -} - -void stepExec(ExecBuffers& buffers, PreflightTrace& preflight, LookupTables& tables, size_t cycle) { - ExecContext ctx(preflight, tables, cycle); - MutableBufObj data(buffers.data); - GlobalBufObj global(buffers.global); - step_Top(ctx, &data, &global); -} - -void stepAccum(AccumBuffers& buffers, - PreflightTrace& preflight, - LookupTables& tables, - size_t cycle) { - ExecContext ctx(preflight, tables, cycle); - MutableBufObj data(buffers.data); - MutableBufObj accum(buffers.accum); - GlobalBufObj mix(buffers.mix); - step_TopAccum(ctx, &accum, &data, &mix); -} - -} // namespace risc0::circuit::rv32im_v2::cpu - -constexpr size_t kStepModeParallel = 0; -constexpr size_t kStepModeSeqForward = 1; -constexpr size_t kStepModeSeqReverse = 2; - -extern "C" { - -using namespace risc0::circuit::rv32im_v2::cpu; - -const char* risc0_circuit_rv32im_v2_cpu_witgen(uint32_t mode, - ExecBuffers* buffers, - PreflightTrace* preflight, - uint32_t lastCycle) { - LookupTables tables; - size_t split = preflight->tableSplitCycle; - try { - switch (mode) { - case kStepModeParallel: { - auto begin1 = poolstl::iota_iter(0); - auto end1 = poolstl::iota_iter(split); - std::for_each(poolstl::par, begin1, end1, [&](uint32_t cycle) { - stepExec(*buffers, *preflight, tables, cycle); - }); - - auto begin2 = poolstl::iota_iter(split); - auto end2 = poolstl::iota_iter(lastCycle); - std::for_each(poolstl::par, begin2, end2, [&](uint32_t cycle) { - stepExec(*buffers, *preflight, tables, cycle); - }); - } break; - case kStepModeSeqForward: - for (size_t cycle = 0; cycle < lastCycle; cycle++) { - stepExec(*buffers, *preflight, tables, cycle); - } - break; - case kStepModeSeqReverse: { - for (size_t i = split; i-- > 0;) { - // printf("stepExec: %zu\n", i); - stepExec(*buffers, *preflight, tables, i); - } - for (size_t i = lastCycle; i-- > split;) { - // printf("stepExec: %zu\n", i); - stepExec(*buffers, *preflight, tables, i); - } - } break; - } - } catch (const std::exception& err) { - return strdup(err.what()); - } - return nullptr; -} - -const char* risc0_circuit_rv32im_v2_cpu_accum(AccumBuffers* buffers, - PreflightTrace* preflight, - uint32_t lastCycle) { - try { - LookupTables tables; - for (size_t cycle = 0; cycle < lastCycle; cycle++) { - stepAccum(*buffers, *preflight, tables, cycle); - } - } catch (const std::exception& err) { - return strdup(err.what()); - } - return nullptr; -} - -} // extern "C" diff --git a/risc0/circuit/rv32im-v2-sys/kernels/cxx/layout.cpp.inc b/risc0/circuit/rv32im-v2-sys/kernels/cxx/layout.cpp.inc deleted file mode 100644 index dca6f62b..00000000 --- a/risc0/circuit/rv32im-v2-sys/kernels/cxx/layout.cpp.inc +++ /dev/null @@ -1,4908 +0,0 @@ -constexpr NondetRegLayout8LayoutArray kLayout__3 = - NondetRegLayout8LayoutArray{NondetRegLayout{._super = /*offset=*/19}, - NondetRegLayout{._super = /*offset=*/20}, - NondetRegLayout{._super = /*offset=*/21}, - NondetRegLayout{._super = /*offset=*/22}, - NondetRegLayout{._super = /*offset=*/23}, - NondetRegLayout{._super = /*offset=*/24}, - NondetRegLayout{._super = /*offset=*/25}, - NondetRegLayout{._super = /*offset=*/26}}; -constexpr OneHot_8_Layout kLayout__2 = OneHot_8_Layout{._super = kLayout__3}; -constexpr InstInputLayout kLayout__1 = InstInputLayout{.minorOnehot = kLayout__2}; -constexpr NondetRegLayout11LayoutArray kLayout__5 = - NondetRegLayout11LayoutArray{NondetRegLayout{._super = /*offset=*/1}, - NondetRegLayout{._super = /*offset=*/2}, - NondetRegLayout{._super = /*offset=*/3}, - NondetRegLayout{._super = /*offset=*/4}, - NondetRegLayout{._super = /*offset=*/5}, - NondetRegLayout{._super = /*offset=*/6}, - NondetRegLayout{._super = /*offset=*/7}, - NondetRegLayout{._super = /*offset=*/8}, - NondetRegLayout{._super = /*offset=*/9}, - NondetRegLayout{._super = /*offset=*/10}, - NondetRegLayout{._super = /*offset=*/11}}; -constexpr OneHot_11_Layout kLayout__4 = OneHot_11_Layout{._super = kLayout__5}; -constexpr NondetU16RegLayout kLayout__10 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/37}, - .val = NondetRegLayout{._super = /*offset=*/38}}}; -constexpr NondetU16RegLayout kLayout__11 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/40}, - .val = NondetRegLayout{._super = /*offset=*/41}}}; -constexpr NormalizeU32Layout kLayout__9 = - NormalizeU32Layout{.low16 = kLayout__10, - .lowCarry = NondetRegLayout{._super = /*offset=*/39}, - .high16 = kLayout__11, - .highCarry = NondetRegLayout{._super = /*offset=*/42}}; -constexpr NondetU16RegLayout kLayout__13 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/43}, - .val = NondetRegLayout{._super = /*offset=*/44}}}; -constexpr NondetU16RegLayout kLayout__14 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/46}, - .val = NondetRegLayout{._super = /*offset=*/47}}}; -constexpr NormalizeU32Layout kLayout__12 = - NormalizeU32Layout{.low16 = kLayout__13, - .lowCarry = NondetRegLayout{._super = /*offset=*/45}, - .high16 = kLayout__14, - .highCarry = NondetRegLayout{._super = /*offset=*/48}}; -constexpr MemoryArgLayout kLayout__18 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/53}, - .addr = NondetRegLayout{._super = /*offset=*/52}, - .cycle = NondetRegLayout{._super = /*offset=*/54}, - .dataLow = NondetRegLayout{._super = /*offset=*/55}, - .dataHigh = NondetRegLayout{._super = /*offset=*/56}}; -constexpr MemoryArgLayout kLayout__19 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/57}, - .addr = NondetRegLayout{._super = /*offset=*/52}, - .cycle = NondetRegLayout{._super = /*offset=*/0}, - .dataLow = NondetRegLayout{._super = /*offset=*/58}, - .dataHigh = NondetRegLayout{._super = /*offset=*/59}}; -constexpr MemoryIOLayout kLayout__17 = MemoryIOLayout{.oldTxn = kLayout__18, .newTxn = kLayout__19}; -constexpr IsCycleLayout kLayout__21 = - IsCycleLayout{.arg = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/60}, - .cycle = NondetRegLayout{._super = /*offset=*/61}}}; -constexpr IsForwardLayout kLayout__20 = IsForwardLayout{._0 = kLayout__21}; -constexpr MemoryWriteLayout kLayout__16 = MemoryWriteLayout{.io = kLayout__17, ._0 = kLayout__20}; -constexpr WriteRdLayout kLayout__15 = - WriteRdLayout{.isRd0 = IsZeroLayout{._super = NondetRegLayout{._super = /*offset=*/49}, - .inv = NondetRegLayout{._super = /*offset=*/50}}, - .writeAddr = NondetRegLayout{._super = /*offset=*/51}, - ._0 = kLayout__16}; -constexpr FinalizeMiscLayout kLayout__8 = - FinalizeMiscLayout{.writeData = kLayout__9, .pcNorm = kLayout__12, ._0 = kLayout__15}; -constexpr DecoderLayout kLayout__24 = - DecoderLayout{._f7_6 = NondetRegLayout{._super = /*offset=*/62}, - ._f7_45 = NondetRegLayout{._super = /*offset=*/63}, - ._f7_23 = NondetRegLayout{._super = /*offset=*/64}, - ._f7_01 = NondetRegLayout{._super = /*offset=*/65}, - ._rs2_34 = NondetRegLayout{._super = /*offset=*/66}, - ._rs2_12 = NondetRegLayout{._super = /*offset=*/67}, - ._rs2_0 = NondetRegLayout{._super = /*offset=*/68}, - ._rs1_34 = NondetRegLayout{._super = /*offset=*/69}, - ._rs1_12 = NondetRegLayout{._super = /*offset=*/70}, - ._rs1_0 = NondetRegLayout{._super = /*offset=*/71}, - ._f3_2 = NondetRegLayout{._super = /*offset=*/72}, - ._f3_01 = NondetRegLayout{._super = /*offset=*/73}, - ._rd_34 = NondetRegLayout{._super = /*offset=*/74}, - ._rd_12 = NondetRegLayout{._super = /*offset=*/75}, - ._rd_0 = NondetRegLayout{._super = /*offset=*/76}, - .opcode = NondetRegLayout{._super = /*offset=*/77}}; -constexpr NondetU16RegLayout kLayout__27 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/80}, - .val = NondetRegLayout{._super = /*offset=*/81}}}; -constexpr U16RegLayout kLayout__26 = U16RegLayout{.ret = kLayout__27}; -constexpr NondetU16RegLayout kLayout__28 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/84}, - .val = NondetRegLayout{._super = /*offset=*/85}}}; -constexpr AddrDecomposeLayout kLayout__25 = - AddrDecomposeLayout{.low2 = NondetRegLayout{._super = /*offset=*/79}, - .upperDiff = kLayout__26, - ._0 = IsZeroLayout{._super = NondetRegLayout{._super = /*offset=*/82}, - .inv = NondetRegLayout{._super = /*offset=*/83}}, - .med14 = kLayout__28}; -constexpr MemoryArgLayout kLayout__31 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/87}, - .addr = NondetRegLayout{._super = /*offset=*/86}, - .cycle = NondetRegLayout{._super = /*offset=*/88}, - .dataLow = NondetRegLayout{._super = /*offset=*/89}, - .dataHigh = NondetRegLayout{._super = /*offset=*/90}}; -constexpr MemoryArgLayout kLayout__32 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/91}, - .addr = NondetRegLayout{._super = /*offset=*/86}, - .cycle = NondetRegLayout{._super = /*offset=*/0}, - .dataLow = NondetRegLayout{._super = /*offset=*/92}, - .dataHigh = NondetRegLayout{._super = /*offset=*/93}}; -constexpr MemoryIOLayout kLayout__30 = MemoryIOLayout{.oldTxn = kLayout__31, .newTxn = kLayout__32}; -constexpr IsCycleLayout kLayout__34 = - IsCycleLayout{.arg = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/94}, - .cycle = NondetRegLayout{._super = /*offset=*/95}}}; -constexpr IsForwardLayout kLayout__33 = IsForwardLayout{._0 = kLayout__34}; -constexpr MemoryReadLayout kLayout__29 = MemoryReadLayout{.io = kLayout__30, ._0 = kLayout__33}; -constexpr DecodeInstLayout kLayout__23 = - DecodeInstLayout{._super = kLayout__24, - .arg = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/78}, - .cycle = NondetRegLayout{._super = /*offset=*/0}}, - .pcAddr = kLayout__25, - .loadInst = kLayout__29}; -constexpr MemoryArgLayout kLayout__38 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/97}, - .addr = NondetRegLayout{._super = /*offset=*/96}, - .cycle = NondetRegLayout{._super = /*offset=*/98}, - .dataLow = NondetRegLayout{._super = /*offset=*/99}, - .dataHigh = NondetRegLayout{._super = /*offset=*/100}}; -constexpr MemoryArgLayout kLayout__39 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/101}, - .addr = NondetRegLayout{._super = /*offset=*/96}, - .cycle = NondetRegLayout{._super = /*offset=*/0}, - .dataLow = NondetRegLayout{._super = /*offset=*/102}, - .dataHigh = NondetRegLayout{._super = /*offset=*/103}}; -constexpr MemoryIOLayout kLayout__37 = MemoryIOLayout{.oldTxn = kLayout__38, .newTxn = kLayout__39}; -constexpr IsCycleLayout kLayout__41 = - IsCycleLayout{.arg = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/104}, - .cycle = NondetRegLayout{._super = /*offset=*/105}}}; -constexpr IsForwardLayout kLayout__40 = IsForwardLayout{._0 = kLayout__41}; -constexpr MemoryReadLayout kLayout__36 = MemoryReadLayout{.io = kLayout__37, ._0 = kLayout__40}; -constexpr ReadRegLayout kLayout__35 = - ReadRegLayout{._super = kLayout__36, .addr = NondetRegLayout{._super = /*offset=*/106}}; -constexpr MemoryArgLayout kLayout__45 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/108}, - .addr = NondetRegLayout{._super = /*offset=*/107}, - .cycle = NondetRegLayout{._super = /*offset=*/109}, - .dataLow = NondetRegLayout{._super = /*offset=*/110}, - .dataHigh = NondetRegLayout{._super = /*offset=*/111}}; -constexpr MemoryArgLayout kLayout__46 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/112}, - .addr = NondetRegLayout{._super = /*offset=*/107}, - .cycle = NondetRegLayout{._super = /*offset=*/0}, - .dataLow = NondetRegLayout{._super = /*offset=*/113}, - .dataHigh = NondetRegLayout{._super = /*offset=*/114}}; -constexpr MemoryIOLayout kLayout__44 = MemoryIOLayout{.oldTxn = kLayout__45, .newTxn = kLayout__46}; -constexpr IsCycleLayout kLayout__48 = - IsCycleLayout{.arg = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/115}, - .cycle = NondetRegLayout{._super = /*offset=*/116}}}; -constexpr IsForwardLayout kLayout__47 = IsForwardLayout{._0 = kLayout__48}; -constexpr MemoryReadLayout kLayout__43 = MemoryReadLayout{.io = kLayout__44, ._0 = kLayout__47}; -constexpr ReadRegLayout kLayout__42 = - ReadRegLayout{._super = kLayout__43, .addr = NondetRegLayout{._super = /*offset=*/117}}; -constexpr MiscInputLayout kLayout__22 = - MiscInputLayout{.decoded = kLayout__23, .rs1 = kLayout__35, .rs2 = kLayout__42}; -constexpr ArgU16Layout5LayoutArray kLayout__50 = - ArgU16Layout5LayoutArray{ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/27}, - .val = NondetRegLayout{._super = /*offset=*/28}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/29}, - .val = NondetRegLayout{._super = /*offset=*/30}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/31}, - .val = NondetRegLayout{._super = /*offset=*/32}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/33}, - .val = NondetRegLayout{._super = /*offset=*/34}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/35}, - .val = NondetRegLayout{._super = /*offset=*/36}}}; -constexpr _Arguments_Misc0MiscOutputLayout kLayout__49 = - _Arguments_Misc0MiscOutputLayout{.argU16 = kLayout__50}; -constexpr Misc0MiscOutputArm0Layout kLayout__52 = Misc0MiscOutputArm0Layout{ - ._extra0 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/27}, - .val = NondetRegLayout{._super = /*offset=*/28}}, - ._extra1 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/29}, - .val = NondetRegLayout{._super = /*offset=*/30}}, - ._extra2 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/31}, - .val = NondetRegLayout{._super = /*offset=*/32}}, - ._extra3 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/33}, - .val = NondetRegLayout{._super = /*offset=*/34}}, - ._extra4 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/35}, - .val = NondetRegLayout{._super = /*offset=*/36}}}; -constexpr Misc0MiscOutputArm1Layout kLayout__53 = Misc0MiscOutputArm1Layout{ - ._extra0 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/27}, - .val = NondetRegLayout{._super = /*offset=*/28}}, - ._extra1 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/29}, - .val = NondetRegLayout{._super = /*offset=*/30}}, - ._extra2 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/31}, - .val = NondetRegLayout{._super = /*offset=*/32}}, - ._extra3 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/33}, - .val = NondetRegLayout{._super = /*offset=*/34}}, - ._extra4 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/35}, - .val = NondetRegLayout{._super = /*offset=*/36}}}; -constexpr NondetRegLayout16LayoutArray kLayout__60 = - NondetRegLayout16LayoutArray{NondetRegLayout{._super = /*offset=*/118}, - NondetRegLayout{._super = /*offset=*/119}, - NondetRegLayout{._super = /*offset=*/120}, - NondetRegLayout{._super = /*offset=*/121}, - NondetRegLayout{._super = /*offset=*/122}, - NondetRegLayout{._super = /*offset=*/123}, - NondetRegLayout{._super = /*offset=*/124}, - NondetRegLayout{._super = /*offset=*/125}, - NondetRegLayout{._super = /*offset=*/126}, - NondetRegLayout{._super = /*offset=*/127}, - NondetRegLayout{._super = /*offset=*/128}, - NondetRegLayout{._super = /*offset=*/129}, - NondetRegLayout{._super = /*offset=*/130}, - NondetRegLayout{._super = /*offset=*/131}, - NondetRegLayout{._super = /*offset=*/132}, - NondetRegLayout{._super = /*offset=*/133}}; -constexpr ToBits_16_Layout kLayout__59 = ToBits_16_Layout{._super = kLayout__60}; -constexpr NondetRegLayout16LayoutArray kLayout__62 = - NondetRegLayout16LayoutArray{NondetRegLayout{._super = /*offset=*/134}, - NondetRegLayout{._super = /*offset=*/135}, - NondetRegLayout{._super = /*offset=*/136}, - NondetRegLayout{._super = /*offset=*/137}, - NondetRegLayout{._super = /*offset=*/138}, - NondetRegLayout{._super = /*offset=*/139}, - NondetRegLayout{._super = /*offset=*/140}, - NondetRegLayout{._super = /*offset=*/141}, - NondetRegLayout{._super = /*offset=*/142}, - NondetRegLayout{._super = /*offset=*/143}, - NondetRegLayout{._super = /*offset=*/144}, - NondetRegLayout{._super = /*offset=*/145}, - NondetRegLayout{._super = /*offset=*/146}, - NondetRegLayout{._super = /*offset=*/147}, - NondetRegLayout{._super = /*offset=*/148}, - NondetRegLayout{._super = /*offset=*/149}}; -constexpr ToBits_16_Layout kLayout__61 = ToBits_16_Layout{._super = kLayout__62}; -constexpr BitwiseAndU16Layout kLayout__58 = - BitwiseAndU16Layout{.bitsX = kLayout__59, .bitsY = kLayout__61}; -constexpr NondetRegLayout16LayoutArray kLayout__65 = - NondetRegLayout16LayoutArray{NondetRegLayout{._super = /*offset=*/150}, - NondetRegLayout{._super = /*offset=*/151}, - NondetRegLayout{._super = /*offset=*/152}, - NondetRegLayout{._super = /*offset=*/153}, - NondetRegLayout{._super = /*offset=*/154}, - NondetRegLayout{._super = /*offset=*/155}, - NondetRegLayout{._super = /*offset=*/156}, - NondetRegLayout{._super = /*offset=*/157}, - NondetRegLayout{._super = /*offset=*/158}, - NondetRegLayout{._super = /*offset=*/159}, - NondetRegLayout{._super = /*offset=*/160}, - NondetRegLayout{._super = /*offset=*/161}, - NondetRegLayout{._super = /*offset=*/162}, - NondetRegLayout{._super = /*offset=*/163}, - NondetRegLayout{._super = /*offset=*/164}, - NondetRegLayout{._super = /*offset=*/165}}; -constexpr ToBits_16_Layout kLayout__64 = ToBits_16_Layout{._super = kLayout__65}; -constexpr NondetRegLayout16LayoutArray kLayout__67 = - NondetRegLayout16LayoutArray{NondetRegLayout{._super = /*offset=*/166}, - NondetRegLayout{._super = /*offset=*/167}, - NondetRegLayout{._super = /*offset=*/168}, - NondetRegLayout{._super = /*offset=*/169}, - NondetRegLayout{._super = /*offset=*/170}, - NondetRegLayout{._super = /*offset=*/171}, - NondetRegLayout{._super = /*offset=*/172}, - NondetRegLayout{._super = /*offset=*/173}, - NondetRegLayout{._super = /*offset=*/174}, - NondetRegLayout{._super = /*offset=*/175}, - NondetRegLayout{._super = /*offset=*/176}, - NondetRegLayout{._super = /*offset=*/177}, - NondetRegLayout{._super = /*offset=*/178}, - NondetRegLayout{._super = /*offset=*/179}, - NondetRegLayout{._super = /*offset=*/180}, - NondetRegLayout{._super = /*offset=*/181}}; -constexpr ToBits_16_Layout kLayout__66 = ToBits_16_Layout{._super = kLayout__67}; -constexpr BitwiseAndU16Layout kLayout__63 = - BitwiseAndU16Layout{.bitsX = kLayout__64, .bitsY = kLayout__66}; -constexpr BitwiseAndLayout kLayout__57 = BitwiseAndLayout{._0 = kLayout__58, ._1 = kLayout__63}; -constexpr BitwiseXorLayout kLayout__56 = BitwiseXorLayout{.andXy = kLayout__57}; -constexpr OpXORLayout kLayout__55 = OpXORLayout{._0 = kLayout__56}; -constexpr Misc0MiscOutputArm2Layout kLayout__54 = Misc0MiscOutputArm2Layout{ - ._super = kLayout__55, - ._extra0 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/27}, - .val = NondetRegLayout{._super = /*offset=*/28}}, - ._extra1 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/29}, - .val = NondetRegLayout{._super = /*offset=*/30}}, - ._extra2 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/31}, - .val = NondetRegLayout{._super = /*offset=*/32}}, - ._extra3 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/33}, - .val = NondetRegLayout{._super = /*offset=*/34}}, - ._extra4 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/35}, - .val = NondetRegLayout{._super = /*offset=*/36}}}; -constexpr BitwiseOrLayout kLayout__70 = BitwiseOrLayout{.andXy = kLayout__57}; -constexpr OpORLayout kLayout__69 = OpORLayout{._0 = kLayout__70}; -constexpr Misc0MiscOutputArm3Layout kLayout__68 = Misc0MiscOutputArm3Layout{ - ._super = kLayout__69, - ._extra0 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/27}, - .val = NondetRegLayout{._super = /*offset=*/28}}, - ._extra1 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/29}, - .val = NondetRegLayout{._super = /*offset=*/30}}, - ._extra2 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/31}, - .val = NondetRegLayout{._super = /*offset=*/32}}, - ._extra3 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/33}, - .val = NondetRegLayout{._super = /*offset=*/34}}, - ._extra4 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/35}, - .val = NondetRegLayout{._super = /*offset=*/36}}}; -constexpr OpANDLayout kLayout__72 = OpANDLayout{._0 = kLayout__57}; -constexpr Misc0MiscOutputArm4Layout kLayout__71 = Misc0MiscOutputArm4Layout{ - ._super = kLayout__72, - ._extra0 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/27}, - .val = NondetRegLayout{._super = /*offset=*/28}}, - ._extra1 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/29}, - .val = NondetRegLayout{._super = /*offset=*/30}}, - ._extra2 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/31}, - .val = NondetRegLayout{._super = /*offset=*/32}}, - ._extra3 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/33}, - .val = NondetRegLayout{._super = /*offset=*/34}}, - ._extra4 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/35}, - .val = NondetRegLayout{._super = /*offset=*/36}}}; -constexpr NondetU16RegLayout kLayout__76 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/27}, - .val = NondetRegLayout{._super = /*offset=*/28}}}; -constexpr NondetU16RegLayout kLayout__77 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/29}, - .val = NondetRegLayout{._super = /*offset=*/30}}}; -constexpr NormalizeU32Layout kLayout__75 = - NormalizeU32Layout{.low16 = kLayout__76, - .lowCarry = NondetRegLayout{._super = /*offset=*/118}, - .high16 = kLayout__77, - .highCarry = NondetRegLayout{._super = /*offset=*/119}}; -constexpr NondetU16RegLayout kLayout__79 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/31}, - .val = NondetRegLayout{._super = /*offset=*/32}}}; -constexpr GetSignU32Layout kLayout__78 = GetSignU32Layout{ - ._super = NondetRegLayout{._super = /*offset=*/120}, .restTimesTwo = kLayout__79}; -constexpr NondetU16RegLayout kLayout__81 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/33}, - .val = NondetRegLayout{._super = /*offset=*/34}}}; -constexpr GetSignU32Layout kLayout__80 = GetSignU32Layout{ - ._super = NondetRegLayout{._super = /*offset=*/121}, .restTimesTwo = kLayout__81}; -constexpr NondetU16RegLayout kLayout__83 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/35}, - .val = NondetRegLayout{._super = /*offset=*/36}}}; -constexpr GetSignU32Layout kLayout__82 = GetSignU32Layout{ - ._super = NondetRegLayout{._super = /*offset=*/122}, .restTimesTwo = kLayout__83}; -constexpr CmpLessThanLayout kLayout__74 = - CmpLessThanLayout{.diff = kLayout__75, - .s1 = kLayout__78, - .s2 = kLayout__80, - .s3 = kLayout__82, - .overflow = NondetRegLayout{._super = /*offset=*/123}, - .isLessThan = NondetRegLayout{._super = /*offset=*/124}}; -constexpr OpSLTLayout kLayout__73 = OpSLTLayout{.cmp = kLayout__74}; -constexpr CmpLessThanUnsignedLayout kLayout__86 = CmpLessThanUnsignedLayout{.diff = kLayout__75}; -constexpr OpSLTULayout kLayout__85 = OpSLTULayout{.cmp = kLayout__86}; -constexpr Misc0MiscOutputArm6Layout kLayout__84 = Misc0MiscOutputArm6Layout{ - ._super = kLayout__85, - ._extra0 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/31}, - .val = NondetRegLayout{._super = /*offset=*/32}}, - ._extra1 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/33}, - .val = NondetRegLayout{._super = /*offset=*/34}}, - ._extra2 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/35}, - .val = NondetRegLayout{._super = /*offset=*/36}}}; -constexpr Misc0MiscOutputArm7Layout kLayout__87 = Misc0MiscOutputArm7Layout{ - ._extra0 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/27}, - .val = NondetRegLayout{._super = /*offset=*/28}}, - ._extra1 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/29}, - .val = NondetRegLayout{._super = /*offset=*/30}}, - ._extra2 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/31}, - .val = NondetRegLayout{._super = /*offset=*/32}}, - ._extra3 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/33}, - .val = NondetRegLayout{._super = /*offset=*/34}}, - ._extra4 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/35}, - .val = NondetRegLayout{._super = /*offset=*/36}}}; -constexpr Misc0MiscOutputLayout kLayout__51 = Misc0MiscOutputLayout{.arm0 = kLayout__52, - .arm1 = kLayout__53, - .arm2 = kLayout__54, - .arm3 = kLayout__68, - .arm4 = kLayout__71, - .arm5 = kLayout__73, - .arm6 = kLayout__84, - .arm7 = kLayout__87}; -constexpr Misc0Layout kLayout__7 = Misc0Layout{._super = kLayout__8, - .input = kLayout__22, - ._arguments_Misc0MiscOutput = kLayout__49, - .miscOutput = kLayout__51}; -constexpr _Arguments_Misc1MiscOutputLayout kLayout__89 = - _Arguments_Misc1MiscOutputLayout{.argU16 = kLayout__50}; -constexpr OpXORILayout kLayout__92 = OpXORILayout{._0 = kLayout__56}; -constexpr Misc1MiscOutputArm0Layout kLayout__91 = Misc1MiscOutputArm0Layout{ - ._super = kLayout__92, - ._extra0 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/27}, - .val = NondetRegLayout{._super = /*offset=*/28}}, - ._extra1 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/29}, - .val = NondetRegLayout{._super = /*offset=*/30}}, - ._extra2 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/31}, - .val = NondetRegLayout{._super = /*offset=*/32}}, - ._extra3 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/33}, - .val = NondetRegLayout{._super = /*offset=*/34}}, - ._extra4 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/35}, - .val = NondetRegLayout{._super = /*offset=*/36}}}; -constexpr OpORILayout kLayout__94 = OpORILayout{._0 = kLayout__70}; -constexpr Misc1MiscOutputArm1Layout kLayout__93 = Misc1MiscOutputArm1Layout{ - ._super = kLayout__94, - ._extra0 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/27}, - .val = NondetRegLayout{._super = /*offset=*/28}}, - ._extra1 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/29}, - .val = NondetRegLayout{._super = /*offset=*/30}}, - ._extra2 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/31}, - .val = NondetRegLayout{._super = /*offset=*/32}}, - ._extra3 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/33}, - .val = NondetRegLayout{._super = /*offset=*/34}}, - ._extra4 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/35}, - .val = NondetRegLayout{._super = /*offset=*/36}}}; -constexpr OpANDILayout kLayout__96 = OpANDILayout{._0 = kLayout__57}; -constexpr Misc1MiscOutputArm2Layout kLayout__95 = Misc1MiscOutputArm2Layout{ - ._super = kLayout__96, - ._extra0 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/27}, - .val = NondetRegLayout{._super = /*offset=*/28}}, - ._extra1 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/29}, - .val = NondetRegLayout{._super = /*offset=*/30}}, - ._extra2 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/31}, - .val = NondetRegLayout{._super = /*offset=*/32}}, - ._extra3 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/33}, - .val = NondetRegLayout{._super = /*offset=*/34}}, - ._extra4 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/35}, - .val = NondetRegLayout{._super = /*offset=*/36}}}; -constexpr OpSLTILayout kLayout__97 = OpSLTILayout{.cmp = kLayout__74}; -constexpr OpSLTIULayout kLayout__99 = OpSLTIULayout{.cmp = kLayout__86}; -constexpr Misc1MiscOutputArm4Layout kLayout__98 = Misc1MiscOutputArm4Layout{ - ._super = kLayout__99, - ._extra0 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/31}, - .val = NondetRegLayout{._super = /*offset=*/32}}, - ._extra1 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/33}, - .val = NondetRegLayout{._super = /*offset=*/34}}, - ._extra2 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/35}, - .val = NondetRegLayout{._super = /*offset=*/36}}}; -constexpr CmpEqualLayout kLayout__102 = - CmpEqualLayout{.lowSame = IsZeroLayout{._super = NondetRegLayout{._super = /*offset=*/118}, - .inv = NondetRegLayout{._super = /*offset=*/119}}, - .highSame = IsZeroLayout{._super = NondetRegLayout{._super = /*offset=*/120}, - .inv = NondetRegLayout{._super = /*offset=*/121}}, - .isEqual = NondetRegLayout{._super = /*offset=*/122}}; -constexpr OpBEQLayout kLayout__101 = OpBEQLayout{.cmp = kLayout__102}; -constexpr Misc1MiscOutputArm5Layout kLayout__100 = Misc1MiscOutputArm5Layout{ - ._super = kLayout__101, - ._extra0 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/27}, - .val = NondetRegLayout{._super = /*offset=*/28}}, - ._extra1 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/29}, - .val = NondetRegLayout{._super = /*offset=*/30}}, - ._extra2 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/31}, - .val = NondetRegLayout{._super = /*offset=*/32}}, - ._extra3 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/33}, - .val = NondetRegLayout{._super = /*offset=*/34}}, - ._extra4 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/35}, - .val = NondetRegLayout{._super = /*offset=*/36}}}; -constexpr OpBNELayout kLayout__104 = OpBNELayout{.cmp = kLayout__102}; -constexpr Misc1MiscOutputArm6Layout kLayout__103 = Misc1MiscOutputArm6Layout{ - ._super = kLayout__104, - ._extra0 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/27}, - .val = NondetRegLayout{._super = /*offset=*/28}}, - ._extra1 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/29}, - .val = NondetRegLayout{._super = /*offset=*/30}}, - ._extra2 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/31}, - .val = NondetRegLayout{._super = /*offset=*/32}}, - ._extra3 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/33}, - .val = NondetRegLayout{._super = /*offset=*/34}}, - ._extra4 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/35}, - .val = NondetRegLayout{._super = /*offset=*/36}}}; -constexpr OpBLTLayout kLayout__105 = OpBLTLayout{.cmp = kLayout__74}; -constexpr Misc1MiscOutputLayout kLayout__90 = Misc1MiscOutputLayout{.arm0 = kLayout__91, - .arm1 = kLayout__93, - .arm2 = kLayout__95, - .arm3 = kLayout__97, - .arm4 = kLayout__98, - .arm5 = kLayout__100, - .arm6 = kLayout__103, - .arm7 = kLayout__105}; -constexpr Misc1Layout kLayout__88 = Misc1Layout{._super = kLayout__8, - .input = kLayout__22, - ._arguments_Misc1MiscOutput = kLayout__89, - .miscOutput = kLayout__90}; -constexpr _Arguments_Misc2MiscOutputLayout kLayout__107 = - _Arguments_Misc2MiscOutputLayout{.argU16 = kLayout__50}; -constexpr OpBGELayout kLayout__109 = OpBGELayout{.cmp = kLayout__74}; -constexpr OpBLTULayout kLayout__111 = OpBLTULayout{.cmp = kLayout__86}; -constexpr Misc2MiscOutputArm1Layout kLayout__110 = Misc2MiscOutputArm1Layout{ - ._super = kLayout__111, - ._extra0 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/31}, - .val = NondetRegLayout{._super = /*offset=*/32}}, - ._extra1 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/33}, - .val = NondetRegLayout{._super = /*offset=*/34}}, - ._extra2 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/35}, - .val = NondetRegLayout{._super = /*offset=*/36}}}; -constexpr OpBGEULayout kLayout__113 = OpBGEULayout{.cmp = kLayout__86}; -constexpr Misc2MiscOutputArm2Layout kLayout__112 = Misc2MiscOutputArm2Layout{ - ._super = kLayout__113, - ._extra0 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/31}, - .val = NondetRegLayout{._super = /*offset=*/32}}, - ._extra1 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/33}, - .val = NondetRegLayout{._super = /*offset=*/34}}, - ._extra2 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/35}, - .val = NondetRegLayout{._super = /*offset=*/36}}}; -constexpr Misc2MiscOutputArm3Layout kLayout__114 = Misc2MiscOutputArm3Layout{ - ._extra0 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/27}, - .val = NondetRegLayout{._super = /*offset=*/28}}, - ._extra1 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/29}, - .val = NondetRegLayout{._super = /*offset=*/30}}, - ._extra2 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/31}, - .val = NondetRegLayout{._super = /*offset=*/32}}, - ._extra3 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/33}, - .val = NondetRegLayout{._super = /*offset=*/34}}, - ._extra4 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/35}, - .val = NondetRegLayout{._super = /*offset=*/36}}}; -constexpr Misc2MiscOutputArm4Layout kLayout__115 = Misc2MiscOutputArm4Layout{ - ._extra0 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/27}, - .val = NondetRegLayout{._super = /*offset=*/28}}, - ._extra1 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/29}, - .val = NondetRegLayout{._super = /*offset=*/30}}, - ._extra2 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/31}, - .val = NondetRegLayout{._super = /*offset=*/32}}, - ._extra3 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/33}, - .val = NondetRegLayout{._super = /*offset=*/34}}, - ._extra4 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/35}, - .val = NondetRegLayout{._super = /*offset=*/36}}}; -constexpr Misc2MiscOutputArm5Layout kLayout__116 = Misc2MiscOutputArm5Layout{ - ._extra0 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/27}, - .val = NondetRegLayout{._super = /*offset=*/28}}, - ._extra1 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/29}, - .val = NondetRegLayout{._super = /*offset=*/30}}, - ._extra2 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/31}, - .val = NondetRegLayout{._super = /*offset=*/32}}, - ._extra3 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/33}, - .val = NondetRegLayout{._super = /*offset=*/34}}, - ._extra4 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/35}, - .val = NondetRegLayout{._super = /*offset=*/36}}}; -constexpr Misc2MiscOutputArm6Layout kLayout__117 = Misc2MiscOutputArm6Layout{ - ._extra0 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/27}, - .val = NondetRegLayout{._super = /*offset=*/28}}, - ._extra1 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/29}, - .val = NondetRegLayout{._super = /*offset=*/30}}, - ._extra2 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/31}, - .val = NondetRegLayout{._super = /*offset=*/32}}, - ._extra3 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/33}, - .val = NondetRegLayout{._super = /*offset=*/34}}, - ._extra4 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/35}, - .val = NondetRegLayout{._super = /*offset=*/36}}}; -constexpr Misc2MiscOutputArm7Layout kLayout__118 = Misc2MiscOutputArm7Layout{ - ._extra0 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/27}, - .val = NondetRegLayout{._super = /*offset=*/28}}, - ._extra1 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/29}, - .val = NondetRegLayout{._super = /*offset=*/30}}, - ._extra2 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/31}, - .val = NondetRegLayout{._super = /*offset=*/32}}, - ._extra3 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/33}, - .val = NondetRegLayout{._super = /*offset=*/34}}, - ._extra4 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/35}, - .val = NondetRegLayout{._super = /*offset=*/36}}}; -constexpr Misc2MiscOutputLayout kLayout__108 = Misc2MiscOutputLayout{.arm0 = kLayout__109, - .arm1 = kLayout__110, - .arm2 = kLayout__112, - .arm3 = kLayout__114, - .arm4 = kLayout__115, - .arm5 = kLayout__116, - .arm6 = kLayout__117, - .arm7 = kLayout__118}; -constexpr Misc2Layout kLayout__106 = Misc2Layout{._super = kLayout__8, - .input = kLayout__22, - ._arguments_Misc2MiscOutput = kLayout__107, - .miscOutput = kLayout__108}; -constexpr DecoderLayout kLayout__122 = - DecoderLayout{._f7_6 = NondetRegLayout{._super = /*offset=*/65}, - ._f7_45 = NondetRegLayout{._super = /*offset=*/66}, - ._f7_23 = NondetRegLayout{._super = /*offset=*/67}, - ._f7_01 = NondetRegLayout{._super = /*offset=*/68}, - ._rs2_34 = NondetRegLayout{._super = /*offset=*/69}, - ._rs2_12 = NondetRegLayout{._super = /*offset=*/70}, - ._rs2_0 = NondetRegLayout{._super = /*offset=*/71}, - ._rs1_34 = NondetRegLayout{._super = /*offset=*/72}, - ._rs1_12 = NondetRegLayout{._super = /*offset=*/73}, - ._rs1_0 = NondetRegLayout{._super = /*offset=*/74}, - ._f3_2 = NondetRegLayout{._super = /*offset=*/75}, - ._f3_01 = NondetRegLayout{._super = /*offset=*/76}, - ._rd_34 = NondetRegLayout{._super = /*offset=*/77}, - ._rd_12 = NondetRegLayout{._super = /*offset=*/78}, - ._rd_0 = NondetRegLayout{._super = /*offset=*/79}, - .opcode = NondetRegLayout{._super = /*offset=*/80}}; -constexpr NondetU16RegLayout kLayout__125 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/83}, - .val = NondetRegLayout{._super = /*offset=*/84}}}; -constexpr U16RegLayout kLayout__124 = U16RegLayout{.ret = kLayout__125}; -constexpr NondetU16RegLayout kLayout__126 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/87}, - .val = NondetRegLayout{._super = /*offset=*/88}}}; -constexpr AddrDecomposeLayout kLayout__123 = - AddrDecomposeLayout{.low2 = NondetRegLayout{._super = /*offset=*/82}, - .upperDiff = kLayout__124, - ._0 = IsZeroLayout{._super = NondetRegLayout{._super = /*offset=*/85}, - .inv = NondetRegLayout{._super = /*offset=*/86}}, - .med14 = kLayout__126}; -constexpr MemoryArgLayout kLayout__129 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/90}, - .addr = NondetRegLayout{._super = /*offset=*/89}, - .cycle = NondetRegLayout{._super = /*offset=*/91}, - .dataLow = NondetRegLayout{._super = /*offset=*/92}, - .dataHigh = NondetRegLayout{._super = /*offset=*/93}}; -constexpr MemoryArgLayout kLayout__130 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/94}, - .addr = NondetRegLayout{._super = /*offset=*/89}, - .cycle = NondetRegLayout{._super = /*offset=*/0}, - .dataLow = NondetRegLayout{._super = /*offset=*/95}, - .dataHigh = NondetRegLayout{._super = /*offset=*/96}}; -constexpr MemoryIOLayout kLayout__128 = - MemoryIOLayout{.oldTxn = kLayout__129, .newTxn = kLayout__130}; -constexpr IsCycleLayout kLayout__132 = - IsCycleLayout{.arg = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/97}, - .cycle = NondetRegLayout{._super = /*offset=*/98}}}; -constexpr IsForwardLayout kLayout__131 = IsForwardLayout{._0 = kLayout__132}; -constexpr MemoryReadLayout kLayout__127 = MemoryReadLayout{.io = kLayout__128, ._0 = kLayout__131}; -constexpr DecodeInstLayout kLayout__121 = - DecodeInstLayout{._super = kLayout__122, - .arg = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/81}, - .cycle = NondetRegLayout{._super = /*offset=*/0}}, - .pcAddr = kLayout__123, - .loadInst = kLayout__127}; -constexpr MemoryArgLayout kLayout__136 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/100}, - .addr = NondetRegLayout{._super = /*offset=*/99}, - .cycle = NondetRegLayout{._super = /*offset=*/101}, - .dataLow = NondetRegLayout{._super = /*offset=*/102}, - .dataHigh = NondetRegLayout{._super = /*offset=*/103}}; -constexpr MemoryArgLayout kLayout__137 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/104}, - .addr = NondetRegLayout{._super = /*offset=*/99}, - .cycle = NondetRegLayout{._super = /*offset=*/0}, - .dataLow = NondetRegLayout{._super = /*offset=*/105}, - .dataHigh = NondetRegLayout{._super = /*offset=*/106}}; -constexpr MemoryIOLayout kLayout__135 = - MemoryIOLayout{.oldTxn = kLayout__136, .newTxn = kLayout__137}; -constexpr IsCycleLayout kLayout__139 = - IsCycleLayout{.arg = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/107}, - .cycle = NondetRegLayout{._super = /*offset=*/108}}}; -constexpr IsForwardLayout kLayout__138 = IsForwardLayout{._0 = kLayout__139}; -constexpr MemoryReadLayout kLayout__134 = MemoryReadLayout{.io = kLayout__135, ._0 = kLayout__138}; -constexpr ReadRegLayout kLayout__133 = - ReadRegLayout{._super = kLayout__134, .addr = NondetRegLayout{._super = /*offset=*/109}}; -constexpr MemoryArgLayout kLayout__143 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/111}, - .addr = NondetRegLayout{._super = /*offset=*/110}, - .cycle = NondetRegLayout{._super = /*offset=*/112}, - .dataLow = NondetRegLayout{._super = /*offset=*/113}, - .dataHigh = NondetRegLayout{._super = /*offset=*/114}}; -constexpr MemoryArgLayout kLayout__144 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/115}, - .addr = NondetRegLayout{._super = /*offset=*/110}, - .cycle = NondetRegLayout{._super = /*offset=*/0}, - .dataLow = NondetRegLayout{._super = /*offset=*/116}, - .dataHigh = NondetRegLayout{._super = /*offset=*/117}}; -constexpr MemoryIOLayout kLayout__142 = - MemoryIOLayout{.oldTxn = kLayout__143, .newTxn = kLayout__144}; -constexpr IsCycleLayout kLayout__146 = - IsCycleLayout{.arg = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/118}, - .cycle = NondetRegLayout{._super = /*offset=*/119}}}; -constexpr IsForwardLayout kLayout__145 = IsForwardLayout{._0 = kLayout__146}; -constexpr MemoryReadLayout kLayout__141 = MemoryReadLayout{.io = kLayout__142, ._0 = kLayout__145}; -constexpr ReadRegLayout kLayout__140 = - ReadRegLayout{._super = kLayout__141, .addr = NondetRegLayout{._super = /*offset=*/120}}; -constexpr MulInputLayout kLayout__120 = - MulInputLayout{.decoded = kLayout__121, .rs1 = kLayout__133, .rs2 = kLayout__140}; -constexpr ArgU16Layout6LayoutArray kLayout__148 = - ArgU16Layout6LayoutArray{ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/27}, - .val = NondetRegLayout{._super = /*offset=*/28}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/29}, - .val = NondetRegLayout{._super = /*offset=*/30}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/31}, - .val = NondetRegLayout{._super = /*offset=*/32}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/33}, - .val = NondetRegLayout{._super = /*offset=*/34}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/35}, - .val = NondetRegLayout{._super = /*offset=*/36}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/37}, - .val = NondetRegLayout{._super = /*offset=*/38}}}; -constexpr ArgU8Layout13LayoutArray kLayout__149 = - ArgU8Layout13LayoutArray{ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/39}, - .val = NondetRegLayout{._super = /*offset=*/40}}, - ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/41}, - .val = NondetRegLayout{._super = /*offset=*/42}}, - ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/43}, - .val = NondetRegLayout{._super = /*offset=*/44}}, - ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/45}, - .val = NondetRegLayout{._super = /*offset=*/46}}, - ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/47}, - .val = NondetRegLayout{._super = /*offset=*/48}}, - ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/49}, - .val = NondetRegLayout{._super = /*offset=*/50}}, - ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/51}, - .val = NondetRegLayout{._super = /*offset=*/52}}, - ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/53}, - .val = NondetRegLayout{._super = /*offset=*/54}}, - ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/55}, - .val = NondetRegLayout{._super = /*offset=*/56}}, - ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/57}, - .val = NondetRegLayout{._super = /*offset=*/58}}, - ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/59}, - .val = NondetRegLayout{._super = /*offset=*/60}}, - ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/61}, - .val = NondetRegLayout{._super = /*offset=*/62}}, - ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/63}, - .val = NondetRegLayout{._super = /*offset=*/64}}}; -constexpr _Arguments_Mul0MulOutputLayout kLayout__147 = - _Arguments_Mul0MulOutputLayout{.argU16 = kLayout__148, .argU8 = kLayout__149}; -constexpr NondetRegLayout5LayoutArray kLayout__154 = - NondetRegLayout5LayoutArray{NondetRegLayout{._super = /*offset=*/121}, - NondetRegLayout{._super = /*offset=*/122}, - NondetRegLayout{._super = /*offset=*/123}, - NondetRegLayout{._super = /*offset=*/124}, - NondetRegLayout{._super = /*offset=*/125}}; -constexpr ToBits_5_Layout kLayout__153 = ToBits_5_Layout{._super = kLayout__154}; -constexpr DynPo2Layout kLayout__152 = - DynPo2Layout{.low5 = kLayout__153, - .checkU16 = kLayout__76, - .b3 = NondetRegLayout{._super = /*offset=*/126}, - .low = NondetRegLayout{._super = /*offset=*/127}, - .high = NondetRegLayout{._super = /*offset=*/128}}; -constexpr NondetU8RegLayout kLayout__158 = - NondetU8RegLayout{.arg = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/39}, - .val = NondetRegLayout{._super = /*offset=*/40}}}; -constexpr NondetU8RegLayout kLayout__159 = - NondetU8RegLayout{.arg = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/41}, - .val = NondetRegLayout{._super = /*offset=*/42}}}; -constexpr NondetU8RegLayout kLayout__160 = - NondetU8RegLayout{.arg = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/43}, - .val = NondetRegLayout{._super = /*offset=*/44}}}; -constexpr NondetU8RegLayout kLayout__161 = - NondetU8RegLayout{.arg = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/45}, - .val = NondetRegLayout{._super = /*offset=*/46}}}; -constexpr NondetU8RegLayout kLayout__162 = - NondetU8RegLayout{.arg = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/47}, - .val = NondetRegLayout{._super = /*offset=*/48}}}; -constexpr ExpandU32Layout kLayout__157 = - ExpandU32Layout{.b0 = kLayout__158, - .b1 = kLayout__159, - .b2 = kLayout__160, - .b3 = kLayout__161, - .b3Top7times2 = kLayout__162, - .topBit = NondetRegLayout{._super = /*offset=*/129}}; -constexpr NondetU8RegLayout kLayout__164 = - NondetU8RegLayout{.arg = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/49}, - .val = NondetRegLayout{._super = /*offset=*/50}}}; -constexpr NondetU8RegLayout kLayout__165 = - NondetU8RegLayout{.arg = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/51}, - .val = NondetRegLayout{._super = /*offset=*/52}}}; -constexpr NondetU8RegLayout kLayout__166 = - NondetU8RegLayout{.arg = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/53}, - .val = NondetRegLayout{._super = /*offset=*/54}}}; -constexpr NondetU8RegLayout kLayout__167 = - NondetU8RegLayout{.arg = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/55}, - .val = NondetRegLayout{._super = /*offset=*/56}}}; -constexpr NondetU8RegLayout kLayout__168 = - NondetU8RegLayout{.arg = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/57}, - .val = NondetRegLayout{._super = /*offset=*/58}}}; -constexpr ExpandU32Layout kLayout__163 = - ExpandU32Layout{.b0 = kLayout__164, - .b1 = kLayout__165, - .b2 = kLayout__166, - .b3 = kLayout__167, - .b3Top7times2 = kLayout__168, - .topBit = NondetRegLayout{._super = /*offset=*/130}}; -constexpr NondetU8RegLayout kLayout__170 = - NondetU8RegLayout{.arg = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/59}, - .val = NondetRegLayout{._super = /*offset=*/60}}}; -constexpr SplitTotalLayout kLayout__169 = SplitTotalLayout{ - .out = kLayout__79, - .carryByte = kLayout__170, - .carryExtra = NondetFakeTwitRegLayout{.reg0 = NondetRegLayout{._super = /*offset=*/132}, - .reg1 = NondetRegLayout{._super = /*offset=*/133}}}; -constexpr NondetU8RegLayout kLayout__172 = - NondetU8RegLayout{.arg = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/61}, - .val = NondetRegLayout{._super = /*offset=*/62}}}; -constexpr SplitTotalLayout kLayout__171 = SplitTotalLayout{ - .out = kLayout__81, - .carryByte = kLayout__172, - .carryExtra = NondetFakeTwitRegLayout{.reg0 = NondetRegLayout{._super = /*offset=*/134}, - .reg1 = NondetRegLayout{._super = /*offset=*/135}}}; -constexpr NondetU8RegLayout kLayout__174 = - NondetU8RegLayout{.arg = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/63}, - .val = NondetRegLayout{._super = /*offset=*/64}}}; -constexpr SplitTotalLayout kLayout__173 = SplitTotalLayout{ - .out = kLayout__83, - .carryByte = kLayout__174, - .carryExtra = NondetFakeTwitRegLayout{.reg0 = NondetRegLayout{._super = /*offset=*/136}, - .reg1 = NondetRegLayout{._super = /*offset=*/137}}}; -constexpr MultiplyAccumulateLayout kLayout__156 = MultiplyAccumulateLayout{ - .ax = kLayout__157, - .bx = kLayout__163, - .cSign = NondetRegLayout{._super = /*offset=*/131}, - .cRestTimes2 = kLayout__77, - .s0 = kLayout__169, - .s1 = kLayout__171, - .s2 = kLayout__173, - .s3Out = kLayout__10, - .s3Carry = NondetFakeTwitRegLayout{.reg0 = NondetRegLayout{._super = /*offset=*/138}, - .reg1 = NondetRegLayout{._super = /*offset=*/139}}}; -constexpr DoMulLayout kLayout__155 = DoMulLayout{.mul = kLayout__156}; -constexpr OpSLLLayout kLayout__151 = OpSLLLayout{.shiftMul = kLayout__152, ._0 = kLayout__155}; -constexpr OpSLLILayout kLayout__175 = OpSLLILayout{.shiftMul = kLayout__152, ._0 = kLayout__155}; -constexpr ExpandU32Layout kLayout__180 = - ExpandU32Layout{.b0 = kLayout__158, - .b1 = kLayout__159, - .b2 = kLayout__160, - .b3 = kLayout__161, - .b3Top7times2 = kLayout__162, - .topBit = NondetRegLayout{._super = /*offset=*/121}}; -constexpr ExpandU32Layout kLayout__181 = - ExpandU32Layout{.b0 = kLayout__164, - .b1 = kLayout__165, - .b2 = kLayout__166, - .b3 = kLayout__167, - .b3Top7times2 = kLayout__168, - .topBit = NondetRegLayout{._super = /*offset=*/122}}; -constexpr SplitTotalLayout kLayout__182 = SplitTotalLayout{ - .out = kLayout__77, - .carryByte = kLayout__170, - .carryExtra = NondetFakeTwitRegLayout{.reg0 = NondetRegLayout{._super = /*offset=*/124}, - .reg1 = NondetRegLayout{._super = /*offset=*/125}}}; -constexpr SplitTotalLayout kLayout__183 = SplitTotalLayout{ - .out = kLayout__79, - .carryByte = kLayout__172, - .carryExtra = NondetFakeTwitRegLayout{.reg0 = NondetRegLayout{._super = /*offset=*/126}, - .reg1 = NondetRegLayout{._super = /*offset=*/127}}}; -constexpr SplitTotalLayout kLayout__184 = SplitTotalLayout{ - .out = kLayout__81, - .carryByte = kLayout__174, - .carryExtra = NondetFakeTwitRegLayout{.reg0 = NondetRegLayout{._super = /*offset=*/128}, - .reg1 = NondetRegLayout{._super = /*offset=*/129}}}; -constexpr MultiplyAccumulateLayout kLayout__179 = MultiplyAccumulateLayout{ - .ax = kLayout__180, - .bx = kLayout__181, - .cSign = NondetRegLayout{._super = /*offset=*/123}, - .cRestTimes2 = kLayout__76, - .s0 = kLayout__182, - .s1 = kLayout__183, - .s2 = kLayout__184, - .s3Out = kLayout__83, - .s3Carry = NondetFakeTwitRegLayout{.reg0 = NondetRegLayout{._super = /*offset=*/130}, - .reg1 = NondetRegLayout{._super = /*offset=*/131}}}; -constexpr DoMulLayout kLayout__178 = DoMulLayout{.mul = kLayout__179}; -constexpr OpMULLayout kLayout__177 = OpMULLayout{._0 = kLayout__178}; -constexpr Mul0MulOutputArm2Layout kLayout__176 = Mul0MulOutputArm2Layout{ - ._super = kLayout__177, - ._extra0 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/37}, - .val = NondetRegLayout{._super = /*offset=*/38}}}; -constexpr OpMULHLayout kLayout__186 = OpMULHLayout{._0 = kLayout__178}; -constexpr Mul0MulOutputArm3Layout kLayout__185 = Mul0MulOutputArm3Layout{ - ._super = kLayout__186, - ._extra0 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/37}, - .val = NondetRegLayout{._super = /*offset=*/38}}}; -constexpr OpMULHSULayout kLayout__188 = OpMULHSULayout{._0 = kLayout__178}; -constexpr Mul0MulOutputArm4Layout kLayout__187 = Mul0MulOutputArm4Layout{ - ._super = kLayout__188, - ._extra0 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/37}, - .val = NondetRegLayout{._super = /*offset=*/38}}}; -constexpr OpMULHULayout kLayout__190 = OpMULHULayout{._0 = kLayout__178}; -constexpr Mul0MulOutputArm5Layout kLayout__189 = Mul0MulOutputArm5Layout{ - ._super = kLayout__190, - ._extra0 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/37}, - .val = NondetRegLayout{._super = /*offset=*/38}}}; -constexpr Mul0MulOutputArm6Layout kLayout__191 = Mul0MulOutputArm6Layout{ - ._extra0 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/27}, - .val = NondetRegLayout{._super = /*offset=*/28}}, - ._extra1 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/29}, - .val = NondetRegLayout{._super = /*offset=*/30}}, - ._extra2 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/31}, - .val = NondetRegLayout{._super = /*offset=*/32}}, - ._extra3 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/33}, - .val = NondetRegLayout{._super = /*offset=*/34}}, - ._extra4 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/35}, - .val = NondetRegLayout{._super = /*offset=*/36}}, - ._extra5 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/37}, - .val = NondetRegLayout{._super = /*offset=*/38}}, - ._extra6 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/39}, - .val = NondetRegLayout{._super = /*offset=*/40}}, - ._extra7 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/41}, - .val = NondetRegLayout{._super = /*offset=*/42}}, - ._extra8 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/43}, - .val = NondetRegLayout{._super = /*offset=*/44}}, - ._extra9 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/45}, - .val = NondetRegLayout{._super = /*offset=*/46}}, - ._extra10 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/47}, - .val = NondetRegLayout{._super = /*offset=*/48}}, - ._extra11 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/49}, - .val = NondetRegLayout{._super = /*offset=*/50}}, - ._extra12 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/51}, - .val = NondetRegLayout{._super = /*offset=*/52}}, - ._extra13 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/53}, - .val = NondetRegLayout{._super = /*offset=*/54}}, - ._extra14 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/55}, - .val = NondetRegLayout{._super = /*offset=*/56}}, - ._extra15 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/57}, - .val = NondetRegLayout{._super = /*offset=*/58}}, - ._extra16 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/59}, - .val = NondetRegLayout{._super = /*offset=*/60}}, - ._extra17 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/61}, - .val = NondetRegLayout{._super = /*offset=*/62}}, - ._extra18 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/63}, - .val = NondetRegLayout{._super = /*offset=*/64}}}; -constexpr Mul0MulOutputArm7Layout kLayout__192 = Mul0MulOutputArm7Layout{ - ._extra0 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/27}, - .val = NondetRegLayout{._super = /*offset=*/28}}, - ._extra1 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/29}, - .val = NondetRegLayout{._super = /*offset=*/30}}, - ._extra2 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/31}, - .val = NondetRegLayout{._super = /*offset=*/32}}, - ._extra3 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/33}, - .val = NondetRegLayout{._super = /*offset=*/34}}, - ._extra4 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/35}, - .val = NondetRegLayout{._super = /*offset=*/36}}, - ._extra5 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/37}, - .val = NondetRegLayout{._super = /*offset=*/38}}, - ._extra6 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/39}, - .val = NondetRegLayout{._super = /*offset=*/40}}, - ._extra7 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/41}, - .val = NondetRegLayout{._super = /*offset=*/42}}, - ._extra8 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/43}, - .val = NondetRegLayout{._super = /*offset=*/44}}, - ._extra9 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/45}, - .val = NondetRegLayout{._super = /*offset=*/46}}, - ._extra10 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/47}, - .val = NondetRegLayout{._super = /*offset=*/48}}, - ._extra11 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/49}, - .val = NondetRegLayout{._super = /*offset=*/50}}, - ._extra12 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/51}, - .val = NondetRegLayout{._super = /*offset=*/52}}, - ._extra13 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/53}, - .val = NondetRegLayout{._super = /*offset=*/54}}, - ._extra14 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/55}, - .val = NondetRegLayout{._super = /*offset=*/56}}, - ._extra15 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/57}, - .val = NondetRegLayout{._super = /*offset=*/58}}, - ._extra16 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/59}, - .val = NondetRegLayout{._super = /*offset=*/60}}, - ._extra17 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/61}, - .val = NondetRegLayout{._super = /*offset=*/62}}, - ._extra18 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/63}, - .val = NondetRegLayout{._super = /*offset=*/64}}}; -constexpr Mul0MulOutputLayout kLayout__150 = Mul0MulOutputLayout{.arm0 = kLayout__151, - .arm1 = kLayout__175, - .arm2 = kLayout__176, - .arm3 = kLayout__185, - .arm4 = kLayout__187, - .arm5 = kLayout__189, - .arm6 = kLayout__191, - .arm7 = kLayout__192}; -constexpr MemoryArgLayout kLayout__196 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/144}, - .addr = NondetRegLayout{._super = /*offset=*/143}, - .cycle = NondetRegLayout{._super = /*offset=*/145}, - .dataLow = NondetRegLayout{._super = /*offset=*/146}, - .dataHigh = NondetRegLayout{._super = /*offset=*/147}}; -constexpr MemoryArgLayout kLayout__197 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/148}, - .addr = NondetRegLayout{._super = /*offset=*/143}, - .cycle = NondetRegLayout{._super = /*offset=*/0}, - .dataLow = NondetRegLayout{._super = /*offset=*/149}, - .dataHigh = NondetRegLayout{._super = /*offset=*/150}}; -constexpr MemoryIOLayout kLayout__195 = - MemoryIOLayout{.oldTxn = kLayout__196, .newTxn = kLayout__197}; -constexpr IsCycleLayout kLayout__199 = - IsCycleLayout{.arg = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/151}, - .cycle = NondetRegLayout{._super = /*offset=*/152}}}; -constexpr IsForwardLayout kLayout__198 = IsForwardLayout{._0 = kLayout__199}; -constexpr MemoryWriteLayout kLayout__194 = - MemoryWriteLayout{.io = kLayout__195, ._0 = kLayout__198}; -constexpr WriteRdLayout kLayout__193 = - WriteRdLayout{.isRd0 = IsZeroLayout{._super = NondetRegLayout{._super = /*offset=*/140}, - .inv = NondetRegLayout{._super = /*offset=*/141}}, - .writeAddr = NondetRegLayout{._super = /*offset=*/142}, - ._0 = kLayout__194}; -constexpr NondetU16RegLayout kLayout__201 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/153}, - .val = NondetRegLayout{._super = /*offset=*/154}}}; -constexpr NondetU16RegLayout kLayout__202 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/156}, - .val = NondetRegLayout{._super = /*offset=*/157}}}; -constexpr NormalizeU32Layout kLayout__200 = - NormalizeU32Layout{.low16 = kLayout__201, - .lowCarry = NondetRegLayout{._super = /*offset=*/155}, - .high16 = kLayout__202, - .highCarry = NondetRegLayout{._super = /*offset=*/158}}; -constexpr Mul0Layout kLayout__119 = Mul0Layout{.input = kLayout__120, - ._arguments_Mul0MulOutput = kLayout__147, - .mulOutput = kLayout__150, - ._0 = kLayout__193, - .pcAdd = kLayout__200}; -constexpr DecoderLayout kLayout__206 = - DecoderLayout{._f7_6 = NondetRegLayout{._super = /*offset=*/71}, - ._f7_45 = NondetRegLayout{._super = /*offset=*/72}, - ._f7_23 = NondetRegLayout{._super = /*offset=*/73}, - ._f7_01 = NondetRegLayout{._super = /*offset=*/74}, - ._rs2_34 = NondetRegLayout{._super = /*offset=*/75}, - ._rs2_12 = NondetRegLayout{._super = /*offset=*/76}, - ._rs2_0 = NondetRegLayout{._super = /*offset=*/77}, - ._rs1_34 = NondetRegLayout{._super = /*offset=*/78}, - ._rs1_12 = NondetRegLayout{._super = /*offset=*/79}, - ._rs1_0 = NondetRegLayout{._super = /*offset=*/80}, - ._f3_2 = NondetRegLayout{._super = /*offset=*/81}, - ._f3_01 = NondetRegLayout{._super = /*offset=*/82}, - ._rd_34 = NondetRegLayout{._super = /*offset=*/83}, - ._rd_12 = NondetRegLayout{._super = /*offset=*/84}, - ._rd_0 = NondetRegLayout{._super = /*offset=*/85}, - .opcode = NondetRegLayout{._super = /*offset=*/86}}; -constexpr NondetU16RegLayout kLayout__209 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/89}, - .val = NondetRegLayout{._super = /*offset=*/90}}}; -constexpr U16RegLayout kLayout__208 = U16RegLayout{.ret = kLayout__209}; -constexpr NondetU16RegLayout kLayout__210 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/93}, - .val = NondetRegLayout{._super = /*offset=*/94}}}; -constexpr AddrDecomposeLayout kLayout__207 = - AddrDecomposeLayout{.low2 = NondetRegLayout{._super = /*offset=*/88}, - .upperDiff = kLayout__208, - ._0 = IsZeroLayout{._super = NondetRegLayout{._super = /*offset=*/91}, - .inv = NondetRegLayout{._super = /*offset=*/92}}, - .med14 = kLayout__210}; -constexpr MemoryArgLayout kLayout__213 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/96}, - .addr = NondetRegLayout{._super = /*offset=*/95}, - .cycle = NondetRegLayout{._super = /*offset=*/97}, - .dataLow = NondetRegLayout{._super = /*offset=*/98}, - .dataHigh = NondetRegLayout{._super = /*offset=*/99}}; -constexpr MemoryArgLayout kLayout__214 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/100}, - .addr = NondetRegLayout{._super = /*offset=*/95}, - .cycle = NondetRegLayout{._super = /*offset=*/0}, - .dataLow = NondetRegLayout{._super = /*offset=*/101}, - .dataHigh = NondetRegLayout{._super = /*offset=*/102}}; -constexpr MemoryIOLayout kLayout__212 = - MemoryIOLayout{.oldTxn = kLayout__213, .newTxn = kLayout__214}; -constexpr IsCycleLayout kLayout__216 = - IsCycleLayout{.arg = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/103}, - .cycle = NondetRegLayout{._super = /*offset=*/104}}}; -constexpr IsForwardLayout kLayout__215 = IsForwardLayout{._0 = kLayout__216}; -constexpr MemoryReadLayout kLayout__211 = MemoryReadLayout{.io = kLayout__212, ._0 = kLayout__215}; -constexpr DecodeInstLayout kLayout__205 = - DecodeInstLayout{._super = kLayout__206, - .arg = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/87}, - .cycle = NondetRegLayout{._super = /*offset=*/0}}, - .pcAddr = kLayout__207, - .loadInst = kLayout__211}; -constexpr MemoryArgLayout kLayout__220 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/106}, - .addr = NondetRegLayout{._super = /*offset=*/105}, - .cycle = NondetRegLayout{._super = /*offset=*/107}, - .dataLow = NondetRegLayout{._super = /*offset=*/108}, - .dataHigh = NondetRegLayout{._super = /*offset=*/109}}; -constexpr MemoryArgLayout kLayout__221 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/110}, - .addr = NondetRegLayout{._super = /*offset=*/105}, - .cycle = NondetRegLayout{._super = /*offset=*/0}, - .dataLow = NondetRegLayout{._super = /*offset=*/111}, - .dataHigh = NondetRegLayout{._super = /*offset=*/112}}; -constexpr MemoryIOLayout kLayout__219 = - MemoryIOLayout{.oldTxn = kLayout__220, .newTxn = kLayout__221}; -constexpr IsCycleLayout kLayout__223 = - IsCycleLayout{.arg = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/113}, - .cycle = NondetRegLayout{._super = /*offset=*/114}}}; -constexpr IsForwardLayout kLayout__222 = IsForwardLayout{._0 = kLayout__223}; -constexpr MemoryReadLayout kLayout__218 = MemoryReadLayout{.io = kLayout__219, ._0 = kLayout__222}; -constexpr ReadRegLayout kLayout__217 = - ReadRegLayout{._super = kLayout__218, .addr = NondetRegLayout{._super = /*offset=*/115}}; -constexpr MemoryArgLayout kLayout__227 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/117}, - .addr = NondetRegLayout{._super = /*offset=*/116}, - .cycle = NondetRegLayout{._super = /*offset=*/118}, - .dataLow = NondetRegLayout{._super = /*offset=*/119}, - .dataHigh = NondetRegLayout{._super = /*offset=*/120}}; -constexpr MemoryArgLayout kLayout__228 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/121}, - .addr = NondetRegLayout{._super = /*offset=*/116}, - .cycle = NondetRegLayout{._super = /*offset=*/0}, - .dataLow = NondetRegLayout{._super = /*offset=*/122}, - .dataHigh = NondetRegLayout{._super = /*offset=*/123}}; -constexpr MemoryIOLayout kLayout__226 = - MemoryIOLayout{.oldTxn = kLayout__227, .newTxn = kLayout__228}; -constexpr IsCycleLayout kLayout__230 = - IsCycleLayout{.arg = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/124}, - .cycle = NondetRegLayout{._super = /*offset=*/125}}}; -constexpr IsForwardLayout kLayout__229 = IsForwardLayout{._0 = kLayout__230}; -constexpr MemoryReadLayout kLayout__225 = MemoryReadLayout{.io = kLayout__226, ._0 = kLayout__229}; -constexpr ReadRegLayout kLayout__224 = - ReadRegLayout{._super = kLayout__225, .addr = NondetRegLayout{._super = /*offset=*/126}}; -constexpr DivInputLayout kLayout__204 = - DivInputLayout{.decoded = kLayout__205, .rs1 = kLayout__217, .rs2 = kLayout__224}; -constexpr ArgU16Layout9LayoutArray kLayout__232 = - ArgU16Layout9LayoutArray{ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/27}, - .val = NondetRegLayout{._super = /*offset=*/28}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/29}, - .val = NondetRegLayout{._super = /*offset=*/30}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/31}, - .val = NondetRegLayout{._super = /*offset=*/32}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/33}, - .val = NondetRegLayout{._super = /*offset=*/34}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/35}, - .val = NondetRegLayout{._super = /*offset=*/36}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/37}, - .val = NondetRegLayout{._super = /*offset=*/38}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/39}, - .val = NondetRegLayout{._super = /*offset=*/40}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/41}, - .val = NondetRegLayout{._super = /*offset=*/42}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/43}, - .val = NondetRegLayout{._super = /*offset=*/44}}}; -constexpr ArgU8Layout13LayoutArray kLayout__233 = - ArgU8Layout13LayoutArray{ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/45}, - .val = NondetRegLayout{._super = /*offset=*/46}}, - ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/47}, - .val = NondetRegLayout{._super = /*offset=*/48}}, - ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/49}, - .val = NondetRegLayout{._super = /*offset=*/50}}, - ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/51}, - .val = NondetRegLayout{._super = /*offset=*/52}}, - ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/53}, - .val = NondetRegLayout{._super = /*offset=*/54}}, - ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/55}, - .val = NondetRegLayout{._super = /*offset=*/56}}, - ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/57}, - .val = NondetRegLayout{._super = /*offset=*/58}}, - ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/59}, - .val = NondetRegLayout{._super = /*offset=*/60}}, - ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/61}, - .val = NondetRegLayout{._super = /*offset=*/62}}, - ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/63}, - .val = NondetRegLayout{._super = /*offset=*/64}}, - ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/65}, - .val = NondetRegLayout{._super = /*offset=*/66}}, - ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/67}, - .val = NondetRegLayout{._super = /*offset=*/68}}, - ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/69}, - .val = NondetRegLayout{._super = /*offset=*/70}}}; -constexpr _Arguments_Div0MulOutputLayout kLayout__231 = - _Arguments_Div0MulOutputLayout{.argU16 = kLayout__232, .argU8 = kLayout__233}; -constexpr NondetRegLayout5LayoutArray kLayout__239 = - NondetRegLayout5LayoutArray{NondetRegLayout{._super = /*offset=*/127}, - NondetRegLayout{._super = /*offset=*/128}, - NondetRegLayout{._super = /*offset=*/129}, - NondetRegLayout{._super = /*offset=*/130}, - NondetRegLayout{._super = /*offset=*/131}}; -constexpr ToBits_5_Layout kLayout__238 = ToBits_5_Layout{._super = kLayout__239}; -constexpr DynPo2Layout kLayout__237 = - DynPo2Layout{.low5 = kLayout__238, - .checkU16 = kLayout__76, - .b3 = NondetRegLayout{._super = /*offset=*/132}, - .low = NondetRegLayout{._super = /*offset=*/133}, - .high = NondetRegLayout{._super = /*offset=*/134}}; -constexpr ExpandU32Layout kLayout__242 = - ExpandU32Layout{.b0 = kLayout__161, - .b1 = kLayout__162, - .b2 = kLayout__164, - .b3 = kLayout__165, - .b3Top7times2 = kLayout__166, - .topBit = NondetRegLayout{._super = /*offset=*/137}}; -constexpr ExpandU32Layout kLayout__243 = - ExpandU32Layout{.b0 = kLayout__167, - .b1 = kLayout__168, - .b2 = kLayout__170, - .b3 = kLayout__172, - .b3Top7times2 = kLayout__174, - .topBit = NondetRegLayout{._super = /*offset=*/138}}; -constexpr NondetU8RegLayout kLayout__245 = - NondetU8RegLayout{.arg = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/65}, - .val = NondetRegLayout{._super = /*offset=*/66}}}; -constexpr SplitTotalLayout kLayout__244 = SplitTotalLayout{ - .out = kLayout__83, - .carryByte = kLayout__245, - .carryExtra = NondetFakeTwitRegLayout{.reg0 = NondetRegLayout{._super = /*offset=*/140}, - .reg1 = NondetRegLayout{._super = /*offset=*/141}}}; -constexpr NondetU8RegLayout kLayout__247 = - NondetU8RegLayout{.arg = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/67}, - .val = NondetRegLayout{._super = /*offset=*/68}}}; -constexpr SplitTotalLayout kLayout__246 = SplitTotalLayout{ - .out = kLayout__10, - .carryByte = kLayout__247, - .carryExtra = NondetFakeTwitRegLayout{.reg0 = NondetRegLayout{._super = /*offset=*/142}, - .reg1 = NondetRegLayout{._super = /*offset=*/143}}}; -constexpr NondetU16RegLayout kLayout__249 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/39}, - .val = NondetRegLayout{._super = /*offset=*/40}}}; -constexpr NondetU8RegLayout kLayout__250 = - NondetU8RegLayout{.arg = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/69}, - .val = NondetRegLayout{._super = /*offset=*/70}}}; -constexpr SplitTotalLayout kLayout__248 = SplitTotalLayout{ - .out = kLayout__249, - .carryByte = kLayout__250, - .carryExtra = NondetFakeTwitRegLayout{.reg0 = NondetRegLayout{._super = /*offset=*/144}, - .reg1 = NondetRegLayout{._super = /*offset=*/145}}}; -constexpr NondetU16RegLayout kLayout__251 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/41}, - .val = NondetRegLayout{._super = /*offset=*/42}}}; -constexpr MultiplyAccumulateLayout kLayout__241 = MultiplyAccumulateLayout{ - .ax = kLayout__242, - .bx = kLayout__243, - .cSign = NondetRegLayout{._super = /*offset=*/139}, - .cRestTimes2 = kLayout__81, - .s0 = kLayout__244, - .s1 = kLayout__246, - .s2 = kLayout__248, - .s3Out = kLayout__251, - .s3Carry = NondetFakeTwitRegLayout{.reg0 = NondetRegLayout{._super = /*offset=*/146}, - .reg1 = NondetRegLayout{._super = /*offset=*/147}}}; -constexpr DoDivLayout kLayout__240 = - DoDivLayout{.quotLow = NondetRegLayout{._super = /*offset=*/135}, - .quotHigh = NondetRegLayout{._super = /*offset=*/136}, - .remLow = kLayout__77, - .remHigh = kLayout__79, - .mul = kLayout__241, - .topBitType = NondetRegLayout{._super = /*offset=*/148}}; -constexpr OpSRLLayout kLayout__236 = OpSRLLayout{.shiftMul = kLayout__237, ._0 = kLayout__240}; -constexpr Div0MulOutputArm0Layout kLayout__235 = Div0MulOutputArm0Layout{ - ._super = kLayout__236, - ._extra0 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/43}, - .val = NondetRegLayout{._super = /*offset=*/44}}}; -constexpr TopBitLayout kLayout__253 = - TopBitLayout{._super = NondetRegLayout{._super = /*offset=*/135}, .rest = kLayout__77}; -constexpr ExpandU32Layout kLayout__256 = - ExpandU32Layout{.b0 = kLayout__161, - .b1 = kLayout__162, - .b2 = kLayout__164, - .b3 = kLayout__165, - .b3Top7times2 = kLayout__166, - .topBit = NondetRegLayout{._super = /*offset=*/138}}; -constexpr ExpandU32Layout kLayout__257 = - ExpandU32Layout{.b0 = kLayout__167, - .b1 = kLayout__168, - .b2 = kLayout__170, - .b3 = kLayout__172, - .b3Top7times2 = kLayout__174, - .topBit = NondetRegLayout{._super = /*offset=*/139}}; -constexpr SplitTotalLayout kLayout__258 = SplitTotalLayout{ - .out = kLayout__10, - .carryByte = kLayout__245, - .carryExtra = NondetFakeTwitRegLayout{.reg0 = NondetRegLayout{._super = /*offset=*/141}, - .reg1 = NondetRegLayout{._super = /*offset=*/142}}}; -constexpr SplitTotalLayout kLayout__259 = SplitTotalLayout{ - .out = kLayout__249, - .carryByte = kLayout__247, - .carryExtra = NondetFakeTwitRegLayout{.reg0 = NondetRegLayout{._super = /*offset=*/143}, - .reg1 = NondetRegLayout{._super = /*offset=*/144}}}; -constexpr SplitTotalLayout kLayout__260 = SplitTotalLayout{ - .out = kLayout__251, - .carryByte = kLayout__250, - .carryExtra = NondetFakeTwitRegLayout{.reg0 = NondetRegLayout{._super = /*offset=*/145}, - .reg1 = NondetRegLayout{._super = /*offset=*/146}}}; -constexpr MultiplyAccumulateLayout kLayout__255 = MultiplyAccumulateLayout{ - .ax = kLayout__256, - .bx = kLayout__257, - .cSign = NondetRegLayout{._super = /*offset=*/140}, - .cRestTimes2 = kLayout__83, - .s0 = kLayout__258, - .s1 = kLayout__259, - .s2 = kLayout__260, - .s3Out = kLayout__13, - .s3Carry = NondetFakeTwitRegLayout{.reg0 = NondetRegLayout{._super = /*offset=*/147}, - .reg1 = NondetRegLayout{._super = /*offset=*/148}}}; -constexpr DoDivLayout kLayout__254 = - DoDivLayout{.quotLow = NondetRegLayout{._super = /*offset=*/136}, - .quotHigh = NondetRegLayout{._super = /*offset=*/137}, - .remLow = kLayout__79, - .remHigh = kLayout__81, - .mul = kLayout__255, - .topBitType = NondetRegLayout{._super = /*offset=*/149}}; -constexpr OpSRALayout kLayout__252 = - OpSRALayout{.shiftMul = kLayout__237, .flip = kLayout__253, ._0 = kLayout__254}; -constexpr OpSRLILayout kLayout__262 = OpSRLILayout{.shiftMul = kLayout__237, ._0 = kLayout__240}; -constexpr Div0MulOutputArm2Layout kLayout__261 = Div0MulOutputArm2Layout{ - ._super = kLayout__262, - ._extra0 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/43}, - .val = NondetRegLayout{._super = /*offset=*/44}}}; -constexpr OpSRAILayout kLayout__263 = - OpSRAILayout{.shiftMul = kLayout__237, .flip = kLayout__253, ._0 = kLayout__254}; -constexpr ExpandU32Layout kLayout__268 = - ExpandU32Layout{.b0 = kLayout__161, - .b1 = kLayout__162, - .b2 = kLayout__164, - .b3 = kLayout__165, - .b3Top7times2 = kLayout__166, - .topBit = NondetRegLayout{._super = /*offset=*/129}}; -constexpr ExpandU32Layout kLayout__269 = - ExpandU32Layout{.b0 = kLayout__167, - .b1 = kLayout__168, - .b2 = kLayout__170, - .b3 = kLayout__172, - .b3Top7times2 = kLayout__174, - .topBit = NondetRegLayout{._super = /*offset=*/130}}; -constexpr SplitTotalLayout kLayout__270 = SplitTotalLayout{ - .out = kLayout__81, - .carryByte = kLayout__245, - .carryExtra = NondetFakeTwitRegLayout{.reg0 = NondetRegLayout{._super = /*offset=*/132}, - .reg1 = NondetRegLayout{._super = /*offset=*/133}}}; -constexpr SplitTotalLayout kLayout__271 = SplitTotalLayout{ - .out = kLayout__83, - .carryByte = kLayout__247, - .carryExtra = NondetFakeTwitRegLayout{.reg0 = NondetRegLayout{._super = /*offset=*/134}, - .reg1 = NondetRegLayout{._super = /*offset=*/135}}}; -constexpr SplitTotalLayout kLayout__272 = SplitTotalLayout{ - .out = kLayout__10, - .carryByte = kLayout__250, - .carryExtra = NondetFakeTwitRegLayout{.reg0 = NondetRegLayout{._super = /*offset=*/136}, - .reg1 = NondetRegLayout{._super = /*offset=*/137}}}; -constexpr MultiplyAccumulateLayout kLayout__267 = MultiplyAccumulateLayout{ - .ax = kLayout__268, - .bx = kLayout__269, - .cSign = NondetRegLayout{._super = /*offset=*/131}, - .cRestTimes2 = kLayout__79, - .s0 = kLayout__270, - .s1 = kLayout__271, - .s2 = kLayout__272, - .s3Out = kLayout__249, - .s3Carry = NondetFakeTwitRegLayout{.reg0 = NondetRegLayout{._super = /*offset=*/138}, - .reg1 = NondetRegLayout{._super = /*offset=*/139}}}; -constexpr DoDivLayout kLayout__266 = - DoDivLayout{.quotLow = NondetRegLayout{._super = /*offset=*/127}, - .quotHigh = NondetRegLayout{._super = /*offset=*/128}, - .remLow = kLayout__76, - .remHigh = kLayout__77, - .mul = kLayout__267, - .topBitType = NondetRegLayout{._super = /*offset=*/140}}; -constexpr OpDIVLayout kLayout__265 = OpDIVLayout{._0 = kLayout__266}; -constexpr Div0MulOutputArm4Layout kLayout__264 = Div0MulOutputArm4Layout{ - ._super = kLayout__265, - ._extra0 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/41}, - .val = NondetRegLayout{._super = /*offset=*/42}}, - ._extra1 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/43}, - .val = NondetRegLayout{._super = /*offset=*/44}}}; -constexpr OpDIVULayout kLayout__274 = OpDIVULayout{._0 = kLayout__266}; -constexpr Div0MulOutputArm5Layout kLayout__273 = Div0MulOutputArm5Layout{ - ._super = kLayout__274, - ._extra0 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/41}, - .val = NondetRegLayout{._super = /*offset=*/42}}, - ._extra1 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/43}, - .val = NondetRegLayout{._super = /*offset=*/44}}}; -constexpr OpREMLayout kLayout__276 = OpREMLayout{._0 = kLayout__266}; -constexpr Div0MulOutputArm6Layout kLayout__275 = Div0MulOutputArm6Layout{ - ._super = kLayout__276, - ._extra0 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/41}, - .val = NondetRegLayout{._super = /*offset=*/42}}, - ._extra1 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/43}, - .val = NondetRegLayout{._super = /*offset=*/44}}}; -constexpr OpREMULayout kLayout__278 = OpREMULayout{._0 = kLayout__266}; -constexpr Div0MulOutputArm7Layout kLayout__277 = Div0MulOutputArm7Layout{ - ._super = kLayout__278, - ._extra0 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/41}, - .val = NondetRegLayout{._super = /*offset=*/42}}, - ._extra1 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/43}, - .val = NondetRegLayout{._super = /*offset=*/44}}}; -constexpr Div0MulOutputLayout kLayout__234 = Div0MulOutputLayout{.arm0 = kLayout__235, - .arm1 = kLayout__252, - .arm2 = kLayout__261, - .arm3 = kLayout__263, - .arm4 = kLayout__264, - .arm5 = kLayout__273, - .arm6 = kLayout__275, - .arm7 = kLayout__277}; -constexpr MemoryArgLayout kLayout__282 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/154}, - .addr = NondetRegLayout{._super = /*offset=*/153}, - .cycle = NondetRegLayout{._super = /*offset=*/155}, - .dataLow = NondetRegLayout{._super = /*offset=*/156}, - .dataHigh = NondetRegLayout{._super = /*offset=*/157}}; -constexpr MemoryArgLayout kLayout__283 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/158}, - .addr = NondetRegLayout{._super = /*offset=*/153}, - .cycle = NondetRegLayout{._super = /*offset=*/0}, - .dataLow = NondetRegLayout{._super = /*offset=*/159}, - .dataHigh = NondetRegLayout{._super = /*offset=*/160}}; -constexpr MemoryIOLayout kLayout__281 = - MemoryIOLayout{.oldTxn = kLayout__282, .newTxn = kLayout__283}; -constexpr IsCycleLayout kLayout__285 = - IsCycleLayout{.arg = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/161}, - .cycle = NondetRegLayout{._super = /*offset=*/162}}}; -constexpr IsForwardLayout kLayout__284 = IsForwardLayout{._0 = kLayout__285}; -constexpr MemoryWriteLayout kLayout__280 = - MemoryWriteLayout{.io = kLayout__281, ._0 = kLayout__284}; -constexpr WriteRdLayout kLayout__279 = - WriteRdLayout{.isRd0 = IsZeroLayout{._super = NondetRegLayout{._super = /*offset=*/150}, - .inv = NondetRegLayout{._super = /*offset=*/151}}, - .writeAddr = NondetRegLayout{._super = /*offset=*/152}, - ._0 = kLayout__280}; -constexpr NondetU16RegLayout kLayout__287 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/163}, - .val = NondetRegLayout{._super = /*offset=*/164}}}; -constexpr NondetU16RegLayout kLayout__288 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/166}, - .val = NondetRegLayout{._super = /*offset=*/167}}}; -constexpr NormalizeU32Layout kLayout__286 = - NormalizeU32Layout{.low16 = kLayout__287, - .lowCarry = NondetRegLayout{._super = /*offset=*/165}, - .high16 = kLayout__288, - .highCarry = NondetRegLayout{._super = /*offset=*/168}}; -constexpr Div0Layout kLayout__203 = Div0Layout{.input = kLayout__204, - ._arguments_Div0MulOutput = kLayout__231, - .mulOutput = kLayout__234, - ._0 = kLayout__279, - .pcAdd = kLayout__286}; -constexpr DecoderLayout kLayout__292 = - DecoderLayout{._f7_6 = NondetRegLayout{._super = /*offset=*/33}, - ._f7_45 = NondetRegLayout{._super = /*offset=*/34}, - ._f7_23 = NondetRegLayout{._super = /*offset=*/35}, - ._f7_01 = NondetRegLayout{._super = /*offset=*/36}, - ._rs2_34 = NondetRegLayout{._super = /*offset=*/37}, - ._rs2_12 = NondetRegLayout{._super = /*offset=*/38}, - ._rs2_0 = NondetRegLayout{._super = /*offset=*/39}, - ._rs1_34 = NondetRegLayout{._super = /*offset=*/40}, - ._rs1_12 = NondetRegLayout{._super = /*offset=*/41}, - ._rs1_0 = NondetRegLayout{._super = /*offset=*/42}, - ._f3_2 = NondetRegLayout{._super = /*offset=*/43}, - ._f3_01 = NondetRegLayout{._super = /*offset=*/44}, - ._rd_34 = NondetRegLayout{._super = /*offset=*/45}, - ._rd_12 = NondetRegLayout{._super = /*offset=*/46}, - ._rd_0 = NondetRegLayout{._super = /*offset=*/47}, - .opcode = NondetRegLayout{._super = /*offset=*/48}}; -constexpr NondetU16RegLayout kLayout__295 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/51}, - .val = NondetRegLayout{._super = /*offset=*/52}}}; -constexpr U16RegLayout kLayout__294 = U16RegLayout{.ret = kLayout__295}; -constexpr NondetU16RegLayout kLayout__296 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/55}, - .val = NondetRegLayout{._super = /*offset=*/56}}}; -constexpr AddrDecomposeLayout kLayout__293 = - AddrDecomposeLayout{.low2 = NondetRegLayout{._super = /*offset=*/50}, - .upperDiff = kLayout__294, - ._0 = IsZeroLayout{._super = NondetRegLayout{._super = /*offset=*/53}, - .inv = NondetRegLayout{._super = /*offset=*/54}}, - .med14 = kLayout__296}; -constexpr MemoryArgLayout kLayout__299 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/58}, - .addr = NondetRegLayout{._super = /*offset=*/57}, - .cycle = NondetRegLayout{._super = /*offset=*/59}, - .dataLow = NondetRegLayout{._super = /*offset=*/60}, - .dataHigh = NondetRegLayout{._super = /*offset=*/61}}; -constexpr MemoryArgLayout kLayout__300 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/62}, - .addr = NondetRegLayout{._super = /*offset=*/57}, - .cycle = NondetRegLayout{._super = /*offset=*/0}, - .dataLow = NondetRegLayout{._super = /*offset=*/63}, - .dataHigh = NondetRegLayout{._super = /*offset=*/64}}; -constexpr MemoryIOLayout kLayout__298 = - MemoryIOLayout{.oldTxn = kLayout__299, .newTxn = kLayout__300}; -constexpr IsCycleLayout kLayout__302 = - IsCycleLayout{.arg = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/65}, - .cycle = NondetRegLayout{._super = /*offset=*/66}}}; -constexpr IsForwardLayout kLayout__301 = IsForwardLayout{._0 = kLayout__302}; -constexpr MemoryReadLayout kLayout__297 = MemoryReadLayout{.io = kLayout__298, ._0 = kLayout__301}; -constexpr DecodeInstLayout kLayout__291 = - DecodeInstLayout{._super = kLayout__292, - .arg = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/49}, - .cycle = NondetRegLayout{._super = /*offset=*/0}}, - .pcAddr = kLayout__293, - .loadInst = kLayout__297}; -constexpr MemoryArgLayout kLayout__306 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/68}, - .addr = NondetRegLayout{._super = /*offset=*/67}, - .cycle = NondetRegLayout{._super = /*offset=*/69}, - .dataLow = NondetRegLayout{._super = /*offset=*/70}, - .dataHigh = NondetRegLayout{._super = /*offset=*/71}}; -constexpr MemoryArgLayout kLayout__307 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/72}, - .addr = NondetRegLayout{._super = /*offset=*/67}, - .cycle = NondetRegLayout{._super = /*offset=*/0}, - .dataLow = NondetRegLayout{._super = /*offset=*/73}, - .dataHigh = NondetRegLayout{._super = /*offset=*/74}}; -constexpr MemoryIOLayout kLayout__305 = - MemoryIOLayout{.oldTxn = kLayout__306, .newTxn = kLayout__307}; -constexpr IsCycleLayout kLayout__309 = - IsCycleLayout{.arg = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/75}, - .cycle = NondetRegLayout{._super = /*offset=*/76}}}; -constexpr IsForwardLayout kLayout__308 = IsForwardLayout{._0 = kLayout__309}; -constexpr MemoryReadLayout kLayout__304 = MemoryReadLayout{.io = kLayout__305, ._0 = kLayout__308}; -constexpr ReadRegLayout kLayout__303 = - ReadRegLayout{._super = kLayout__304, .addr = NondetRegLayout{._super = /*offset=*/77}}; -constexpr NondetU16RegLayout kLayout__311 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/78}, - .val = NondetRegLayout{._super = /*offset=*/79}}}; -constexpr NondetU16RegLayout kLayout__312 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/81}, - .val = NondetRegLayout{._super = /*offset=*/82}}}; -constexpr NormalizeU32Layout kLayout__310 = - NormalizeU32Layout{.low16 = kLayout__311, - .lowCarry = NondetRegLayout{._super = /*offset=*/80}, - .high16 = kLayout__312, - .highCarry = NondetRegLayout{._super = /*offset=*/83}}; -constexpr NondetU16RegLayout kLayout__315 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/86}, - .val = NondetRegLayout{._super = /*offset=*/87}}}; -constexpr U16RegLayout kLayout__314 = U16RegLayout{.ret = kLayout__315}; -constexpr NondetU16RegLayout kLayout__316 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/90}, - .val = NondetRegLayout{._super = /*offset=*/91}}}; -constexpr AddrDecomposeBitsLayout kLayout__313 = - AddrDecomposeBitsLayout{.low0 = NondetRegLayout{._super = /*offset=*/84}, - .low1 = NondetRegLayout{._super = /*offset=*/85}, - .upperDiff = kLayout__314, - ._0 = IsZeroLayout{._super = NondetRegLayout{._super = /*offset=*/88}, - .inv = NondetRegLayout{._super = /*offset=*/89}}, - .med14 = kLayout__316}; -constexpr MemoryArgLayout kLayout__319 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/93}, - .addr = NondetRegLayout{._super = /*offset=*/92}, - .cycle = NondetRegLayout{._super = /*offset=*/94}, - .dataLow = NondetRegLayout{._super = /*offset=*/95}, - .dataHigh = NondetRegLayout{._super = /*offset=*/96}}; -constexpr MemoryArgLayout kLayout__320 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/97}, - .addr = NondetRegLayout{._super = /*offset=*/92}, - .cycle = NondetRegLayout{._super = /*offset=*/0}, - .dataLow = NondetRegLayout{._super = /*offset=*/98}, - .dataHigh = NondetRegLayout{._super = /*offset=*/99}}; -constexpr MemoryIOLayout kLayout__318 = - MemoryIOLayout{.oldTxn = kLayout__319, .newTxn = kLayout__320}; -constexpr IsCycleLayout kLayout__322 = - IsCycleLayout{.arg = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/100}, - .cycle = NondetRegLayout{._super = /*offset=*/101}}}; -constexpr IsForwardLayout kLayout__321 = IsForwardLayout{._0 = kLayout__322}; -constexpr MemoryReadLayout kLayout__317 = MemoryReadLayout{.io = kLayout__318, ._0 = kLayout__321}; -constexpr MemLoadInputLayout kLayout__290 = MemLoadInputLayout{.decoded = kLayout__291, - .rs1 = kLayout__303, - .addrU32 = kLayout__310, - .addr = kLayout__313, - .data = kLayout__317}; -constexpr ArgU8Layout3LayoutArray kLayout__324 = - ArgU8Layout3LayoutArray{ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/27}, - .val = NondetRegLayout{._super = /*offset=*/28}}, - ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/29}, - .val = NondetRegLayout{._super = /*offset=*/30}}, - ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/31}, - .val = NondetRegLayout{._super = /*offset=*/32}}}; -constexpr _Arguments_Mem0OutputLayout kLayout__323 = - _Arguments_Mem0OutputLayout{.argU8 = kLayout__324}; -constexpr NondetU8RegLayout kLayout__328 = - NondetU8RegLayout{.arg = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/27}, - .val = NondetRegLayout{._super = /*offset=*/28}}}; -constexpr NondetU8RegLayout kLayout__329 = - NondetU8RegLayout{.arg = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/29}, - .val = NondetRegLayout{._super = /*offset=*/30}}}; -constexpr SplitWordLayout kLayout__327 = - SplitWordLayout{.byte0 = kLayout__328, .byte1 = kLayout__329}; -constexpr NondetU8RegLayout kLayout__330 = - NondetU8RegLayout{.arg = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/31}, - .val = NondetRegLayout{._super = /*offset=*/32}}}; -constexpr OpLBLayout kLayout__326 = OpLBLayout{.bytes = kLayout__327, - .highBit = NondetRegLayout{._super = /*offset=*/102}, - .low7x2 = kLayout__330}; -constexpr OpLHLayout kLayout__332 = - OpLHLayout{.highBit = NondetRegLayout{._super = /*offset=*/102}, .low15x2 = kLayout__328}; -constexpr Mem0OutputArm1Layout kLayout__331 = - Mem0OutputArm1Layout{._super = kLayout__332, - ._extra0 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/29}, - .val = NondetRegLayout{._super = /*offset=*/30}}, - ._extra1 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/31}, - .val = NondetRegLayout{._super = /*offset=*/32}}}; -constexpr Mem0OutputArm2Layout kLayout__333 = - Mem0OutputArm2Layout{._extra0 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/27}, - .val = NondetRegLayout{._super = /*offset=*/28}}, - ._extra1 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/29}, - .val = NondetRegLayout{._super = /*offset=*/30}}, - ._extra2 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/31}, - .val = NondetRegLayout{._super = /*offset=*/32}}}; -constexpr OpLBULayout kLayout__335 = OpLBULayout{.bytes = kLayout__327}; -constexpr Mem0OutputArm3Layout kLayout__334 = - Mem0OutputArm3Layout{._super = kLayout__335, - ._extra0 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/31}, - .val = NondetRegLayout{._super = /*offset=*/32}}}; -constexpr Mem0OutputArm4Layout kLayout__336 = - Mem0OutputArm4Layout{._extra0 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/27}, - .val = NondetRegLayout{._super = /*offset=*/28}}, - ._extra1 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/29}, - .val = NondetRegLayout{._super = /*offset=*/30}}, - ._extra2 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/31}, - .val = NondetRegLayout{._super = /*offset=*/32}}}; -constexpr Mem0OutputArm5Layout kLayout__337 = - Mem0OutputArm5Layout{._extra0 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/27}, - .val = NondetRegLayout{._super = /*offset=*/28}}, - ._extra1 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/29}, - .val = NondetRegLayout{._super = /*offset=*/30}}, - ._extra2 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/31}, - .val = NondetRegLayout{._super = /*offset=*/32}}}; -constexpr Mem0OutputArm6Layout kLayout__338 = - Mem0OutputArm6Layout{._extra0 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/27}, - .val = NondetRegLayout{._super = /*offset=*/28}}, - ._extra1 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/29}, - .val = NondetRegLayout{._super = /*offset=*/30}}, - ._extra2 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/31}, - .val = NondetRegLayout{._super = /*offset=*/32}}}; -constexpr Mem0OutputArm7Layout kLayout__339 = - Mem0OutputArm7Layout{._extra0 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/27}, - .val = NondetRegLayout{._super = /*offset=*/28}}, - ._extra1 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/29}, - .val = NondetRegLayout{._super = /*offset=*/30}}, - ._extra2 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/31}, - .val = NondetRegLayout{._super = /*offset=*/32}}}; -constexpr Mem0OutputLayout kLayout__325 = Mem0OutputLayout{.arm0 = kLayout__326, - .arm1 = kLayout__331, - .arm2 = kLayout__333, - .arm3 = kLayout__334, - .arm4 = kLayout__336, - .arm5 = kLayout__337, - .arm6 = kLayout__338, - .arm7 = kLayout__339}; -constexpr MemoryArgLayout kLayout__343 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/107}, - .addr = NondetRegLayout{._super = /*offset=*/106}, - .cycle = NondetRegLayout{._super = /*offset=*/108}, - .dataLow = NondetRegLayout{._super = /*offset=*/109}, - .dataHigh = NondetRegLayout{._super = /*offset=*/110}}; -constexpr MemoryArgLayout kLayout__344 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/111}, - .addr = NondetRegLayout{._super = /*offset=*/106}, - .cycle = NondetRegLayout{._super = /*offset=*/0}, - .dataLow = NondetRegLayout{._super = /*offset=*/112}, - .dataHigh = NondetRegLayout{._super = /*offset=*/113}}; -constexpr MemoryIOLayout kLayout__342 = - MemoryIOLayout{.oldTxn = kLayout__343, .newTxn = kLayout__344}; -constexpr IsCycleLayout kLayout__346 = - IsCycleLayout{.arg = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/114}, - .cycle = NondetRegLayout{._super = /*offset=*/115}}}; -constexpr IsForwardLayout kLayout__345 = IsForwardLayout{._0 = kLayout__346}; -constexpr MemoryWriteLayout kLayout__341 = - MemoryWriteLayout{.io = kLayout__342, ._0 = kLayout__345}; -constexpr WriteRdLayout kLayout__340 = - WriteRdLayout{.isRd0 = IsZeroLayout{._super = NondetRegLayout{._super = /*offset=*/103}, - .inv = NondetRegLayout{._super = /*offset=*/104}}, - .writeAddr = NondetRegLayout{._super = /*offset=*/105}, - ._0 = kLayout__341}; -constexpr NondetU16RegLayout kLayout__348 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/116}, - .val = NondetRegLayout{._super = /*offset=*/117}}}; -constexpr NondetU16RegLayout kLayout__349 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/119}, - .val = NondetRegLayout{._super = /*offset=*/120}}}; -constexpr NormalizeU32Layout kLayout__347 = - NormalizeU32Layout{.low16 = kLayout__348, - .lowCarry = NondetRegLayout{._super = /*offset=*/118}, - .high16 = kLayout__349, - .highCarry = NondetRegLayout{._super = /*offset=*/121}}; -constexpr Mem0Layout kLayout__289 = Mem0Layout{.input = kLayout__290, - ._arguments_Mem0Output = kLayout__323, - .output = kLayout__325, - ._0 = kLayout__340, - .pcAdd = kLayout__347}; -constexpr DecoderLayout kLayout__353 = - DecoderLayout{._f7_6 = NondetRegLayout{._super = /*offset=*/35}, - ._f7_45 = NondetRegLayout{._super = /*offset=*/36}, - ._f7_23 = NondetRegLayout{._super = /*offset=*/37}, - ._f7_01 = NondetRegLayout{._super = /*offset=*/38}, - ._rs2_34 = NondetRegLayout{._super = /*offset=*/39}, - ._rs2_12 = NondetRegLayout{._super = /*offset=*/40}, - ._rs2_0 = NondetRegLayout{._super = /*offset=*/41}, - ._rs1_34 = NondetRegLayout{._super = /*offset=*/42}, - ._rs1_12 = NondetRegLayout{._super = /*offset=*/43}, - ._rs1_0 = NondetRegLayout{._super = /*offset=*/44}, - ._f3_2 = NondetRegLayout{._super = /*offset=*/45}, - ._f3_01 = NondetRegLayout{._super = /*offset=*/46}, - ._rd_34 = NondetRegLayout{._super = /*offset=*/47}, - ._rd_12 = NondetRegLayout{._super = /*offset=*/48}, - ._rd_0 = NondetRegLayout{._super = /*offset=*/49}, - .opcode = NondetRegLayout{._super = /*offset=*/50}}; -constexpr NondetU16RegLayout kLayout__356 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/53}, - .val = NondetRegLayout{._super = /*offset=*/54}}}; -constexpr U16RegLayout kLayout__355 = U16RegLayout{.ret = kLayout__356}; -constexpr NondetU16RegLayout kLayout__357 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/57}, - .val = NondetRegLayout{._super = /*offset=*/58}}}; -constexpr AddrDecomposeLayout kLayout__354 = - AddrDecomposeLayout{.low2 = NondetRegLayout{._super = /*offset=*/52}, - .upperDiff = kLayout__355, - ._0 = IsZeroLayout{._super = NondetRegLayout{._super = /*offset=*/55}, - .inv = NondetRegLayout{._super = /*offset=*/56}}, - .med14 = kLayout__357}; -constexpr MemoryArgLayout kLayout__360 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/60}, - .addr = NondetRegLayout{._super = /*offset=*/59}, - .cycle = NondetRegLayout{._super = /*offset=*/61}, - .dataLow = NondetRegLayout{._super = /*offset=*/62}, - .dataHigh = NondetRegLayout{._super = /*offset=*/63}}; -constexpr MemoryArgLayout kLayout__361 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/64}, - .addr = NondetRegLayout{._super = /*offset=*/59}, - .cycle = NondetRegLayout{._super = /*offset=*/0}, - .dataLow = NondetRegLayout{._super = /*offset=*/65}, - .dataHigh = NondetRegLayout{._super = /*offset=*/66}}; -constexpr MemoryIOLayout kLayout__359 = - MemoryIOLayout{.oldTxn = kLayout__360, .newTxn = kLayout__361}; -constexpr IsCycleLayout kLayout__363 = - IsCycleLayout{.arg = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/67}, - .cycle = NondetRegLayout{._super = /*offset=*/68}}}; -constexpr IsForwardLayout kLayout__362 = IsForwardLayout{._0 = kLayout__363}; -constexpr MemoryReadLayout kLayout__358 = MemoryReadLayout{.io = kLayout__359, ._0 = kLayout__362}; -constexpr DecodeInstLayout kLayout__352 = - DecodeInstLayout{._super = kLayout__353, - .arg = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/51}, - .cycle = NondetRegLayout{._super = /*offset=*/0}}, - .pcAddr = kLayout__354, - .loadInst = kLayout__358}; -constexpr MemoryArgLayout kLayout__367 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/70}, - .addr = NondetRegLayout{._super = /*offset=*/69}, - .cycle = NondetRegLayout{._super = /*offset=*/71}, - .dataLow = NondetRegLayout{._super = /*offset=*/72}, - .dataHigh = NondetRegLayout{._super = /*offset=*/73}}; -constexpr MemoryArgLayout kLayout__368 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/74}, - .addr = NondetRegLayout{._super = /*offset=*/69}, - .cycle = NondetRegLayout{._super = /*offset=*/0}, - .dataLow = NondetRegLayout{._super = /*offset=*/75}, - .dataHigh = NondetRegLayout{._super = /*offset=*/76}}; -constexpr MemoryIOLayout kLayout__366 = - MemoryIOLayout{.oldTxn = kLayout__367, .newTxn = kLayout__368}; -constexpr IsCycleLayout kLayout__370 = - IsCycleLayout{.arg = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/77}, - .cycle = NondetRegLayout{._super = /*offset=*/78}}}; -constexpr IsForwardLayout kLayout__369 = IsForwardLayout{._0 = kLayout__370}; -constexpr MemoryReadLayout kLayout__365 = MemoryReadLayout{.io = kLayout__366, ._0 = kLayout__369}; -constexpr ReadRegLayout kLayout__364 = - ReadRegLayout{._super = kLayout__365, .addr = NondetRegLayout{._super = /*offset=*/79}}; -constexpr MemoryArgLayout kLayout__374 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/81}, - .addr = NondetRegLayout{._super = /*offset=*/80}, - .cycle = NondetRegLayout{._super = /*offset=*/82}, - .dataLow = NondetRegLayout{._super = /*offset=*/83}, - .dataHigh = NondetRegLayout{._super = /*offset=*/84}}; -constexpr MemoryArgLayout kLayout__375 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/85}, - .addr = NondetRegLayout{._super = /*offset=*/80}, - .cycle = NondetRegLayout{._super = /*offset=*/0}, - .dataLow = NondetRegLayout{._super = /*offset=*/86}, - .dataHigh = NondetRegLayout{._super = /*offset=*/87}}; -constexpr MemoryIOLayout kLayout__373 = - MemoryIOLayout{.oldTxn = kLayout__374, .newTxn = kLayout__375}; -constexpr IsCycleLayout kLayout__377 = - IsCycleLayout{.arg = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/88}, - .cycle = NondetRegLayout{._super = /*offset=*/89}}}; -constexpr IsForwardLayout kLayout__376 = IsForwardLayout{._0 = kLayout__377}; -constexpr MemoryReadLayout kLayout__372 = MemoryReadLayout{.io = kLayout__373, ._0 = kLayout__376}; -constexpr ReadRegLayout kLayout__371 = - ReadRegLayout{._super = kLayout__372, .addr = NondetRegLayout{._super = /*offset=*/90}}; -constexpr NondetU16RegLayout kLayout__379 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/91}, - .val = NondetRegLayout{._super = /*offset=*/92}}}; -constexpr NondetU16RegLayout kLayout__380 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/94}, - .val = NondetRegLayout{._super = /*offset=*/95}}}; -constexpr NormalizeU32Layout kLayout__378 = - NormalizeU32Layout{.low16 = kLayout__379, - .lowCarry = NondetRegLayout{._super = /*offset=*/93}, - .high16 = kLayout__380, - .highCarry = NondetRegLayout{._super = /*offset=*/96}}; -constexpr NondetU16RegLayout kLayout__383 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/99}, - .val = NondetRegLayout{._super = /*offset=*/100}}}; -constexpr U16RegLayout kLayout__382 = U16RegLayout{.ret = kLayout__383}; -constexpr NondetU16RegLayout kLayout__384 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/103}, - .val = NondetRegLayout{._super = /*offset=*/104}}}; -constexpr AddrDecomposeBitsLayout kLayout__381 = - AddrDecomposeBitsLayout{.low0 = NondetRegLayout{._super = /*offset=*/97}, - .low1 = NondetRegLayout{._super = /*offset=*/98}, - .upperDiff = kLayout__382, - ._0 = IsZeroLayout{._super = NondetRegLayout{._super = /*offset=*/101}, - .inv = NondetRegLayout{._super = /*offset=*/102}}, - .med14 = kLayout__384}; -constexpr MemStoreInputLayout kLayout__351 = MemStoreInputLayout{.decoded = kLayout__352, - .rs1 = kLayout__364, - .rs2 = kLayout__371, - .addrU32 = kLayout__378, - .addr = kLayout__381, - .data = kLayout__218}; -constexpr ArgU8Layout4LayoutArray kLayout__386 = - ArgU8Layout4LayoutArray{ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/27}, - .val = NondetRegLayout{._super = /*offset=*/28}}, - ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/29}, - .val = NondetRegLayout{._super = /*offset=*/30}}, - ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/31}, - .val = NondetRegLayout{._super = /*offset=*/32}}, - ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/33}, - .val = NondetRegLayout{._super = /*offset=*/34}}}; -constexpr _Arguments_Mem1OutputLayout kLayout__385 = - _Arguments_Mem1OutputLayout{.argU8 = kLayout__386}; -constexpr NondetU8RegLayout kLayout__390 = - NondetU8RegLayout{.arg = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/33}, - .val = NondetRegLayout{._super = /*offset=*/34}}}; -constexpr SplitWordLayout kLayout__389 = - SplitWordLayout{.byte0 = kLayout__330, .byte1 = kLayout__390}; -constexpr OpSBLayout kLayout__388 = OpSBLayout{.origBytes = kLayout__327, .newBytes = kLayout__389}; -constexpr Mem1OutputArm1Layout kLayout__391 = - Mem1OutputArm1Layout{._extra0 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/27}, - .val = NondetRegLayout{._super = /*offset=*/28}}, - ._extra1 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/29}, - .val = NondetRegLayout{._super = /*offset=*/30}}, - ._extra2 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/31}, - .val = NondetRegLayout{._super = /*offset=*/32}}, - ._extra3 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/33}, - .val = NondetRegLayout{._super = /*offset=*/34}}}; -constexpr Mem1OutputArm2Layout kLayout__392 = - Mem1OutputArm2Layout{._extra0 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/27}, - .val = NondetRegLayout{._super = /*offset=*/28}}, - ._extra1 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/29}, - .val = NondetRegLayout{._super = /*offset=*/30}}, - ._extra2 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/31}, - .val = NondetRegLayout{._super = /*offset=*/32}}, - ._extra3 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/33}, - .val = NondetRegLayout{._super = /*offset=*/34}}}; -constexpr Mem1OutputArm3Layout kLayout__393 = - Mem1OutputArm3Layout{._extra0 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/27}, - .val = NondetRegLayout{._super = /*offset=*/28}}, - ._extra1 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/29}, - .val = NondetRegLayout{._super = /*offset=*/30}}, - ._extra2 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/31}, - .val = NondetRegLayout{._super = /*offset=*/32}}, - ._extra3 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/33}, - .val = NondetRegLayout{._super = /*offset=*/34}}}; -constexpr Mem1OutputArm4Layout kLayout__394 = - Mem1OutputArm4Layout{._extra0 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/27}, - .val = NondetRegLayout{._super = /*offset=*/28}}, - ._extra1 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/29}, - .val = NondetRegLayout{._super = /*offset=*/30}}, - ._extra2 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/31}, - .val = NondetRegLayout{._super = /*offset=*/32}}, - ._extra3 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/33}, - .val = NondetRegLayout{._super = /*offset=*/34}}}; -constexpr Mem1OutputArm5Layout kLayout__395 = - Mem1OutputArm5Layout{._extra0 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/27}, - .val = NondetRegLayout{._super = /*offset=*/28}}, - ._extra1 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/29}, - .val = NondetRegLayout{._super = /*offset=*/30}}, - ._extra2 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/31}, - .val = NondetRegLayout{._super = /*offset=*/32}}, - ._extra3 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/33}, - .val = NondetRegLayout{._super = /*offset=*/34}}}; -constexpr Mem1OutputArm6Layout kLayout__396 = - Mem1OutputArm6Layout{._extra0 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/27}, - .val = NondetRegLayout{._super = /*offset=*/28}}, - ._extra1 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/29}, - .val = NondetRegLayout{._super = /*offset=*/30}}, - ._extra2 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/31}, - .val = NondetRegLayout{._super = /*offset=*/32}}, - ._extra3 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/33}, - .val = NondetRegLayout{._super = /*offset=*/34}}}; -constexpr Mem1OutputArm7Layout kLayout__397 = - Mem1OutputArm7Layout{._extra0 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/27}, - .val = NondetRegLayout{._super = /*offset=*/28}}, - ._extra1 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/29}, - .val = NondetRegLayout{._super = /*offset=*/30}}, - ._extra2 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/31}, - .val = NondetRegLayout{._super = /*offset=*/32}}, - ._extra3 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/33}, - .val = NondetRegLayout{._super = /*offset=*/34}}}; -constexpr Mem1OutputLayout kLayout__387 = Mem1OutputLayout{.arm0 = kLayout__388, - .arm1 = kLayout__391, - .arm2 = kLayout__392, - .arm3 = kLayout__393, - .arm4 = kLayout__394, - .arm5 = kLayout__395, - .arm6 = kLayout__396, - .arm7 = kLayout__397}; -constexpr MemoryArgLayout kLayout__401 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/116}, - .addr = NondetRegLayout{._super = /*offset=*/115}, - .cycle = NondetRegLayout{._super = /*offset=*/117}, - .dataLow = NondetRegLayout{._super = /*offset=*/118}, - .dataHigh = NondetRegLayout{._super = /*offset=*/119}}; -constexpr MemoryArgLayout kLayout__402 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/120}, - .addr = NondetRegLayout{._super = /*offset=*/115}, - .cycle = NondetRegLayout{._super = /*offset=*/0}, - .dataLow = NondetRegLayout{._super = /*offset=*/121}, - .dataHigh = NondetRegLayout{._super = /*offset=*/122}}; -constexpr MemoryIOLayout kLayout__400 = - MemoryIOLayout{.oldTxn = kLayout__401, .newTxn = kLayout__402}; -constexpr IsCycleLayout kLayout__404 = - IsCycleLayout{.arg = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/123}, - .cycle = NondetRegLayout{._super = /*offset=*/124}}}; -constexpr IsForwardLayout kLayout__403 = IsForwardLayout{._0 = kLayout__404}; -constexpr MemoryWriteLayout kLayout__399 = - MemoryWriteLayout{.io = kLayout__400, ._0 = kLayout__403}; -constexpr MemStoreFinalizeLayout kLayout__398 = MemStoreFinalizeLayout{._0 = kLayout__399}; -constexpr NondetU16RegLayout kLayout__406 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/125}, - .val = NondetRegLayout{._super = /*offset=*/126}}}; -constexpr NondetU16RegLayout kLayout__407 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/128}, - .val = NondetRegLayout{._super = /*offset=*/129}}}; -constexpr NormalizeU32Layout kLayout__405 = - NormalizeU32Layout{.low16 = kLayout__406, - .lowCarry = NondetRegLayout{._super = /*offset=*/127}, - .high16 = kLayout__407, - .highCarry = NondetRegLayout{._super = /*offset=*/130}}; -constexpr Mem1Layout kLayout__350 = Mem1Layout{.input = kLayout__351, - ._arguments_Mem1Output = kLayout__385, - .output = kLayout__387, - ._0 = kLayout__398, - .pcAdd = kLayout__405}; -constexpr MemoryArgLayout kLayout__416 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/27}, - .addr = NondetRegLayout{._super = /*offset=*/28}, - .cycle = NondetRegLayout{._super = /*offset=*/29}, - .dataLow = NondetRegLayout{._super = /*offset=*/30}, - .dataHigh = NondetRegLayout{._super = /*offset=*/31}}; -constexpr MemoryArgLayout kLayout__417 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/32}, - .addr = NondetRegLayout{._super = /*offset=*/28}, - .cycle = NondetRegLayout{._super = /*offset=*/0}, - .dataLow = NondetRegLayout{._super = /*offset=*/33}, - .dataHigh = NondetRegLayout{._super = /*offset=*/34}}; -constexpr MemoryIOLayout kLayout__415 = - MemoryIOLayout{.oldTxn = kLayout__416, .newTxn = kLayout__417}; -constexpr MemoryPageInLayout kLayout__414 = MemoryPageInLayout{.io = kLayout__415}; -constexpr ControlLoadRoot__0_SuperLayout kLayout__413 = - ControlLoadRoot__0_SuperLayout{.mem = kLayout__414}; -constexpr MemoryArgLayout kLayout__421 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/35}, - .addr = NondetRegLayout{._super = /*offset=*/36}, - .cycle = NondetRegLayout{._super = /*offset=*/37}, - .dataLow = NondetRegLayout{._super = /*offset=*/38}, - .dataHigh = NondetRegLayout{._super = /*offset=*/39}}; -constexpr MemoryArgLayout kLayout__422 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/40}, - .addr = NondetRegLayout{._super = /*offset=*/36}, - .cycle = NondetRegLayout{._super = /*offset=*/0}, - .dataLow = NondetRegLayout{._super = /*offset=*/41}, - .dataHigh = NondetRegLayout{._super = /*offset=*/42}}; -constexpr MemoryIOLayout kLayout__420 = - MemoryIOLayout{.oldTxn = kLayout__421, .newTxn = kLayout__422}; -constexpr MemoryPageInLayout kLayout__419 = MemoryPageInLayout{.io = kLayout__420}; -constexpr ControlLoadRoot__0_SuperLayout kLayout__418 = - ControlLoadRoot__0_SuperLayout{.mem = kLayout__419}; -constexpr MemoryArgLayout kLayout__426 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/43}, - .addr = NondetRegLayout{._super = /*offset=*/44}, - .cycle = NondetRegLayout{._super = /*offset=*/45}, - .dataLow = NondetRegLayout{._super = /*offset=*/46}, - .dataHigh = NondetRegLayout{._super = /*offset=*/47}}; -constexpr MemoryArgLayout kLayout__427 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/48}, - .addr = NondetRegLayout{._super = /*offset=*/44}, - .cycle = NondetRegLayout{._super = /*offset=*/0}, - .dataLow = NondetRegLayout{._super = /*offset=*/49}, - .dataHigh = NondetRegLayout{._super = /*offset=*/50}}; -constexpr MemoryIOLayout kLayout__425 = - MemoryIOLayout{.oldTxn = kLayout__426, .newTxn = kLayout__427}; -constexpr MemoryPageInLayout kLayout__424 = MemoryPageInLayout{.io = kLayout__425}; -constexpr ControlLoadRoot__0_SuperLayout kLayout__423 = - ControlLoadRoot__0_SuperLayout{.mem = kLayout__424}; -constexpr MemoryArgLayout kLayout__431 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/51}, - .addr = NondetRegLayout{._super = /*offset=*/52}, - .cycle = NondetRegLayout{._super = /*offset=*/53}, - .dataLow = NondetRegLayout{._super = /*offset=*/54}, - .dataHigh = NondetRegLayout{._super = /*offset=*/55}}; -constexpr MemoryArgLayout kLayout__432 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/56}, - .addr = NondetRegLayout{._super = /*offset=*/52}, - .cycle = NondetRegLayout{._super = /*offset=*/0}, - .dataLow = NondetRegLayout{._super = /*offset=*/57}, - .dataHigh = NondetRegLayout{._super = /*offset=*/58}}; -constexpr MemoryIOLayout kLayout__430 = - MemoryIOLayout{.oldTxn = kLayout__431, .newTxn = kLayout__432}; -constexpr MemoryPageInLayout kLayout__429 = MemoryPageInLayout{.io = kLayout__430}; -constexpr ControlLoadRoot__0_SuperLayout kLayout__428 = - ControlLoadRoot__0_SuperLayout{.mem = kLayout__429}; -constexpr MemoryArgLayout kLayout__436 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/59}, - .addr = NondetRegLayout{._super = /*offset=*/60}, - .cycle = NondetRegLayout{._super = /*offset=*/61}, - .dataLow = NondetRegLayout{._super = /*offset=*/62}, - .dataHigh = NondetRegLayout{._super = /*offset=*/63}}; -constexpr MemoryArgLayout kLayout__437 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/64}, - .addr = NondetRegLayout{._super = /*offset=*/60}, - .cycle = NondetRegLayout{._super = /*offset=*/0}, - .dataLow = NondetRegLayout{._super = /*offset=*/65}, - .dataHigh = NondetRegLayout{._super = /*offset=*/66}}; -constexpr MemoryIOLayout kLayout__435 = - MemoryIOLayout{.oldTxn = kLayout__436, .newTxn = kLayout__437}; -constexpr MemoryPageInLayout kLayout__434 = MemoryPageInLayout{.io = kLayout__435}; -constexpr ControlLoadRoot__0_SuperLayout kLayout__433 = - ControlLoadRoot__0_SuperLayout{.mem = kLayout__434}; -constexpr MemoryArgLayout kLayout__441 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/67}, - .addr = NondetRegLayout{._super = /*offset=*/68}, - .cycle = NondetRegLayout{._super = /*offset=*/69}, - .dataLow = NondetRegLayout{._super = /*offset=*/70}, - .dataHigh = NondetRegLayout{._super = /*offset=*/71}}; -constexpr MemoryArgLayout kLayout__442 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/72}, - .addr = NondetRegLayout{._super = /*offset=*/68}, - .cycle = NondetRegLayout{._super = /*offset=*/0}, - .dataLow = NondetRegLayout{._super = /*offset=*/73}, - .dataHigh = NondetRegLayout{._super = /*offset=*/74}}; -constexpr MemoryIOLayout kLayout__440 = - MemoryIOLayout{.oldTxn = kLayout__441, .newTxn = kLayout__442}; -constexpr MemoryPageInLayout kLayout__439 = MemoryPageInLayout{.io = kLayout__440}; -constexpr ControlLoadRoot__0_SuperLayout kLayout__438 = - ControlLoadRoot__0_SuperLayout{.mem = kLayout__439}; -constexpr MemoryArgLayout kLayout__446 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/75}, - .addr = NondetRegLayout{._super = /*offset=*/76}, - .cycle = NondetRegLayout{._super = /*offset=*/77}, - .dataLow = NondetRegLayout{._super = /*offset=*/78}, - .dataHigh = NondetRegLayout{._super = /*offset=*/79}}; -constexpr MemoryArgLayout kLayout__447 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/80}, - .addr = NondetRegLayout{._super = /*offset=*/76}, - .cycle = NondetRegLayout{._super = /*offset=*/0}, - .dataLow = NondetRegLayout{._super = /*offset=*/81}, - .dataHigh = NondetRegLayout{._super = /*offset=*/82}}; -constexpr MemoryIOLayout kLayout__445 = - MemoryIOLayout{.oldTxn = kLayout__446, .newTxn = kLayout__447}; -constexpr MemoryPageInLayout kLayout__444 = MemoryPageInLayout{.io = kLayout__445}; -constexpr ControlLoadRoot__0_SuperLayout kLayout__443 = - ControlLoadRoot__0_SuperLayout{.mem = kLayout__444}; -constexpr MemoryArgLayout kLayout__451 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/83}, - .addr = NondetRegLayout{._super = /*offset=*/84}, - .cycle = NondetRegLayout{._super = /*offset=*/85}, - .dataLow = NondetRegLayout{._super = /*offset=*/86}, - .dataHigh = NondetRegLayout{._super = /*offset=*/87}}; -constexpr MemoryArgLayout kLayout__452 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/88}, - .addr = NondetRegLayout{._super = /*offset=*/84}, - .cycle = NondetRegLayout{._super = /*offset=*/0}, - .dataLow = NondetRegLayout{._super = /*offset=*/89}, - .dataHigh = NondetRegLayout{._super = /*offset=*/90}}; -constexpr MemoryIOLayout kLayout__450 = - MemoryIOLayout{.oldTxn = kLayout__451, .newTxn = kLayout__452}; -constexpr MemoryPageInLayout kLayout__449 = MemoryPageInLayout{.io = kLayout__450}; -constexpr ControlLoadRoot__0_SuperLayout kLayout__448 = - ControlLoadRoot__0_SuperLayout{.mem = kLayout__449}; -constexpr ControlLoadRoot__0_SuperLayout8LayoutArray kLayout__412 = - ControlLoadRoot__0_SuperLayout8LayoutArray{kLayout__413, - kLayout__418, - kLayout__423, - kLayout__428, - kLayout__433, - kLayout__438, - kLayout__443, - kLayout__448}; -constexpr ControlLoadRootLayout kLayout__411 = ControlLoadRootLayout{._1 = kLayout__412}; -constexpr Control0_SuperArm0Layout kLayout__410 = Control0_SuperArm0Layout{ - ._super = kLayout__411, - ._extra0 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/91}, - .cycle = NondetRegLayout{._super = /*offset=*/92}}, - ._extra1 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/93}, - .cycle = NondetRegLayout{._super = /*offset=*/94}}, - ._extra2 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/95}, - .cycle = NondetRegLayout{._super = /*offset=*/96}}, - ._extra3 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/97}, - .cycle = NondetRegLayout{._super = /*offset=*/98}}, - ._extra4 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/99}, - .cycle = NondetRegLayout{._super = /*offset=*/100}}, - ._extra5 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/101}, - .cycle = NondetRegLayout{._super = /*offset=*/102}}, - ._extra6 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/103}, - .cycle = NondetRegLayout{._super = /*offset=*/104}}, - ._extra7 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/105}, - .cycle = NondetRegLayout{._super = /*offset=*/106}}, - ._extra8 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/107}, - .val = NondetRegLayout{._super = /*offset=*/108}}, - ._extra9 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/109}, - .val = NondetRegLayout{._super = /*offset=*/110}}, - ._extra10 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/111}, - .val = NondetRegLayout{._super = /*offset=*/112}}, - ._extra11 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/113}, - .val = NondetRegLayout{._super = /*offset=*/114}}, - ._extra12 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/115}, - .val = NondetRegLayout{._super = /*offset=*/116}}, - ._extra13 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/117}, - .val = NondetRegLayout{._super = /*offset=*/118}}, - ._extra14 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/119}, - .val = NondetRegLayout{._super = /*offset=*/120}}, - ._extra15 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/121}, - .val = NondetRegLayout{._super = /*offset=*/122}}, - ._extra16 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/123}, - .val = NondetRegLayout{._super = /*offset=*/124}}, - ._extra17 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/125}, - .val = NondetRegLayout{._super = /*offset=*/126}}, - ._extra18 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/127}, - .val = NondetRegLayout{._super = /*offset=*/128}}, - ._extra19 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/129}, - .val = NondetRegLayout{._super = /*offset=*/130}}, - ._extra20 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/131}, - .val = NondetRegLayout{._super = /*offset=*/132}}, - ._extra21 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/133}, - .val = NondetRegLayout{._super = /*offset=*/134}}, - ._extra22 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/135}, - .val = NondetRegLayout{._super = /*offset=*/136}}, - ._extra23 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/137}, - .val = NondetRegLayout{._super = /*offset=*/138}}, - ._extra24 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/139}, - .val = NondetRegLayout{._super = /*offset=*/140}}, - ._extra25 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/141}, - .val = NondetRegLayout{._super = /*offset=*/142}}, - ._extra26 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/143}, - .val = NondetRegLayout{._super = /*offset=*/144}}, - ._extra27 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/145}, - .val = NondetRegLayout{._super = /*offset=*/146}}, - ._extra28 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/147}, - .val = NondetRegLayout{._super = /*offset=*/148}}, - ._extra29 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/149}, - .val = NondetRegLayout{._super = /*offset=*/150}}, - ._extra30 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/151}, - .val = NondetRegLayout{._super = /*offset=*/152}}, - ._extra31 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/153}, - .val = NondetRegLayout{._super = /*offset=*/154}}, - ._extra32 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/155}, - .val = NondetRegLayout{._super = /*offset=*/156}}, - ._extra33 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/157}, - .val = NondetRegLayout{._super = /*offset=*/158}}, - ._extra34 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/159}, - .val = NondetRegLayout{._super = /*offset=*/160}}, - ._extra35 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/161}, - .val = NondetRegLayout{._super = /*offset=*/162}}, - ._extra36 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/163}, - .val = NondetRegLayout{._super = /*offset=*/164}}, - ._extra37 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/165}, - .val = NondetRegLayout{._super = /*offset=*/166}}, - ._extra38 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/167}, - .val = NondetRegLayout{._super = /*offset=*/168}}, - ._extra39 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/169}, - .val = NondetRegLayout{._super = /*offset=*/170}}}; -constexpr IsCycleLayout kLayout__460 = - IsCycleLayout{.arg = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/91}, - .cycle = NondetRegLayout{._super = /*offset=*/92}}}; -constexpr IsForwardLayout kLayout__459 = IsForwardLayout{._0 = kLayout__460}; -constexpr MemoryReadLayout kLayout__458 = MemoryReadLayout{.io = kLayout__415, ._0 = kLayout__459}; -constexpr IsCycleLayout kLayout__463 = - IsCycleLayout{.arg = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/93}, - .cycle = NondetRegLayout{._super = /*offset=*/94}}}; -constexpr IsForwardLayout kLayout__462 = IsForwardLayout{._0 = kLayout__463}; -constexpr MemoryReadLayout kLayout__461 = MemoryReadLayout{.io = kLayout__420, ._0 = kLayout__462}; -constexpr ControlResume_SuperArm0_SuperLayout kLayout__457 = - ControlResume_SuperArm0_SuperLayout{.pc = kLayout__458, .mode = kLayout__461}; -constexpr ControlResume_SuperArm0Layout kLayout__456 = ControlResume_SuperArm0Layout{ - ._super = kLayout__457, - ._extra0 = kLayout__426, - ._extra1 = kLayout__427, - ._extra2 = kLayout__431, - ._extra3 = kLayout__432, - ._extra4 = kLayout__436, - ._extra5 = kLayout__437, - ._extra6 = kLayout__441, - ._extra7 = kLayout__442, - ._extra8 = kLayout__446, - ._extra9 = kLayout__447, - ._extra10 = kLayout__451, - ._extra11 = kLayout__452, - ._extra12 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/95}, - .cycle = NondetRegLayout{._super = /*offset=*/96}}, - ._extra13 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/97}, - .cycle = NondetRegLayout{._super = /*offset=*/98}}, - ._extra14 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/99}, - .cycle = NondetRegLayout{._super = /*offset=*/100}}, - ._extra15 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/101}, - .cycle = NondetRegLayout{._super = /*offset=*/102}}, - ._extra16 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/103}, - .cycle = NondetRegLayout{._super = /*offset=*/104}}, - ._extra17 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/105}, - .cycle = NondetRegLayout{._super = /*offset=*/106}}}; -constexpr MemoryWriteLayout kLayout__467 = - MemoryWriteLayout{.io = kLayout__415, ._0 = kLayout__459}; -constexpr ControlResume_SuperArm1_Super__0_SuperLayout kLayout__466 = - ControlResume_SuperArm1_Super__0_SuperLayout{._0 = kLayout__467}; -constexpr MemoryWriteLayout kLayout__469 = - MemoryWriteLayout{.io = kLayout__420, ._0 = kLayout__462}; -constexpr ControlResume_SuperArm1_Super__0_SuperLayout kLayout__468 = - ControlResume_SuperArm1_Super__0_SuperLayout{._0 = kLayout__469}; -constexpr IsCycleLayout kLayout__473 = - IsCycleLayout{.arg = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/95}, - .cycle = NondetRegLayout{._super = /*offset=*/96}}}; -constexpr IsForwardLayout kLayout__472 = IsForwardLayout{._0 = kLayout__473}; -constexpr MemoryWriteLayout kLayout__471 = - MemoryWriteLayout{.io = kLayout__425, ._0 = kLayout__472}; -constexpr ControlResume_SuperArm1_Super__0_SuperLayout kLayout__470 = - ControlResume_SuperArm1_Super__0_SuperLayout{._0 = kLayout__471}; -constexpr MemoryWriteLayout kLayout__475 = - MemoryWriteLayout{.io = kLayout__430, ._0 = kLayout__131}; -constexpr ControlResume_SuperArm1_Super__0_SuperLayout kLayout__474 = - ControlResume_SuperArm1_Super__0_SuperLayout{._0 = kLayout__475}; -constexpr IsCycleLayout kLayout__479 = - IsCycleLayout{.arg = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/99}, - .cycle = NondetRegLayout{._super = /*offset=*/100}}}; -constexpr IsForwardLayout kLayout__478 = IsForwardLayout{._0 = kLayout__479}; -constexpr MemoryWriteLayout kLayout__477 = - MemoryWriteLayout{.io = kLayout__435, ._0 = kLayout__478}; -constexpr ControlResume_SuperArm1_Super__0_SuperLayout kLayout__476 = - ControlResume_SuperArm1_Super__0_SuperLayout{._0 = kLayout__477}; -constexpr IsCycleLayout kLayout__483 = - IsCycleLayout{.arg = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/101}, - .cycle = NondetRegLayout{._super = /*offset=*/102}}}; -constexpr IsForwardLayout kLayout__482 = IsForwardLayout{._0 = kLayout__483}; -constexpr MemoryWriteLayout kLayout__481 = - MemoryWriteLayout{.io = kLayout__440, ._0 = kLayout__482}; -constexpr ControlResume_SuperArm1_Super__0_SuperLayout kLayout__480 = - ControlResume_SuperArm1_Super__0_SuperLayout{._0 = kLayout__481}; -constexpr MemoryWriteLayout kLayout__485 = - MemoryWriteLayout{.io = kLayout__445, ._0 = kLayout__215}; -constexpr ControlResume_SuperArm1_Super__0_SuperLayout kLayout__484 = - ControlResume_SuperArm1_Super__0_SuperLayout{._0 = kLayout__485}; -constexpr IsCycleLayout kLayout__489 = - IsCycleLayout{.arg = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/105}, - .cycle = NondetRegLayout{._super = /*offset=*/106}}}; -constexpr IsForwardLayout kLayout__488 = IsForwardLayout{._0 = kLayout__489}; -constexpr MemoryWriteLayout kLayout__487 = - MemoryWriteLayout{.io = kLayout__450, ._0 = kLayout__488}; -constexpr ControlResume_SuperArm1_Super__0_SuperLayout kLayout__486 = - ControlResume_SuperArm1_Super__0_SuperLayout{._0 = kLayout__487}; -constexpr ControlResume_SuperArm1_Super__0_SuperLayout8LayoutArray kLayout__465 = - ControlResume_SuperArm1_Super__0_SuperLayout8LayoutArray{kLayout__466, - kLayout__468, - kLayout__470, - kLayout__474, - kLayout__476, - kLayout__480, - kLayout__484, - kLayout__486}; -constexpr ControlResume_SuperArm1_SuperLayout kLayout__464 = - ControlResume_SuperArm1_SuperLayout{._1 = kLayout__465}; -constexpr ControlResume_SuperLayout kLayout__455 = - ControlResume_SuperLayout{.arm0 = kLayout__456, .arm1 = kLayout__464}; -constexpr MemoryArgLayout16LayoutArray kLayout__491 = MemoryArgLayout16LayoutArray{kLayout__416, - kLayout__417, - kLayout__421, - kLayout__422, - kLayout__426, - kLayout__427, - kLayout__431, - kLayout__432, - kLayout__436, - kLayout__437, - kLayout__441, - kLayout__442, - kLayout__446, - kLayout__447, - kLayout__451, - kLayout__452}; -constexpr CycleArgLayout8LayoutArray kLayout__492 = - CycleArgLayout8LayoutArray{CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/91}, - .cycle = NondetRegLayout{._super = /*offset=*/92}}, - CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/93}, - .cycle = NondetRegLayout{._super = /*offset=*/94}}, - CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/95}, - .cycle = NondetRegLayout{._super = /*offset=*/96}}, - CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/97}, - .cycle = NondetRegLayout{._super = /*offset=*/98}}, - CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/99}, - .cycle = NondetRegLayout{._super = /*offset=*/100}}, - CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/101}, - .cycle = NondetRegLayout{._super = /*offset=*/102}}, - CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/103}, - .cycle = NondetRegLayout{._super = /*offset=*/104}}, - CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/105}, - .cycle = NondetRegLayout{._super = /*offset=*/106}}}; -constexpr _Arguments_ControlResume_SuperLayout kLayout__490 = - _Arguments_ControlResume_SuperLayout{.memoryArg = kLayout__491, .cycleArg = kLayout__492}; -constexpr ControlResumeLayout kLayout__454 = - ControlResumeLayout{._super = kLayout__455, - .pcZero = IsZeroLayout{._super = NondetRegLayout{._super = /*offset=*/171}, - .inv = NondetRegLayout{._super = /*offset=*/172}}, - ._arguments_ControlResume_Super = kLayout__490}; -constexpr Control0_SuperArm1Layout kLayout__453 = Control0_SuperArm1Layout{ - ._super = kLayout__454, - ._extra0 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/107}, - .val = NondetRegLayout{._super = /*offset=*/108}}, - ._extra1 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/109}, - .val = NondetRegLayout{._super = /*offset=*/110}}, - ._extra2 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/111}, - .val = NondetRegLayout{._super = /*offset=*/112}}, - ._extra3 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/113}, - .val = NondetRegLayout{._super = /*offset=*/114}}, - ._extra4 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/115}, - .val = NondetRegLayout{._super = /*offset=*/116}}, - ._extra5 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/117}, - .val = NondetRegLayout{._super = /*offset=*/118}}, - ._extra6 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/119}, - .val = NondetRegLayout{._super = /*offset=*/120}}, - ._extra7 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/121}, - .val = NondetRegLayout{._super = /*offset=*/122}}, - ._extra8 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/123}, - .val = NondetRegLayout{._super = /*offset=*/124}}, - ._extra9 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/125}, - .val = NondetRegLayout{._super = /*offset=*/126}}, - ._extra10 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/127}, - .val = NondetRegLayout{._super = /*offset=*/128}}, - ._extra11 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/129}, - .val = NondetRegLayout{._super = /*offset=*/130}}, - ._extra12 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/131}, - .val = NondetRegLayout{._super = /*offset=*/132}}, - ._extra13 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/133}, - .val = NondetRegLayout{._super = /*offset=*/134}}, - ._extra14 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/135}, - .val = NondetRegLayout{._super = /*offset=*/136}}, - ._extra15 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/137}, - .val = NondetRegLayout{._super = /*offset=*/138}}, - ._extra16 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/139}, - .val = NondetRegLayout{._super = /*offset=*/140}}, - ._extra17 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/141}, - .val = NondetRegLayout{._super = /*offset=*/142}}, - ._extra18 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/143}, - .val = NondetRegLayout{._super = /*offset=*/144}}, - ._extra19 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/145}, - .val = NondetRegLayout{._super = /*offset=*/146}}, - ._extra20 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/147}, - .val = NondetRegLayout{._super = /*offset=*/148}}, - ._extra21 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/149}, - .val = NondetRegLayout{._super = /*offset=*/150}}, - ._extra22 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/151}, - .val = NondetRegLayout{._super = /*offset=*/152}}, - ._extra23 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/153}, - .val = NondetRegLayout{._super = /*offset=*/154}}, - ._extra24 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/155}, - .val = NondetRegLayout{._super = /*offset=*/156}}, - ._extra25 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/157}, - .val = NondetRegLayout{._super = /*offset=*/158}}, - ._extra26 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/159}, - .val = NondetRegLayout{._super = /*offset=*/160}}, - ._extra27 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/161}, - .val = NondetRegLayout{._super = /*offset=*/162}}, - ._extra28 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/163}, - .val = NondetRegLayout{._super = /*offset=*/164}}, - ._extra29 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/165}, - .val = NondetRegLayout{._super = /*offset=*/166}}, - ._extra30 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/167}, - .val = NondetRegLayout{._super = /*offset=*/168}}, - ._extra31 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/169}, - .val = NondetRegLayout{._super = /*offset=*/170}}}; -constexpr NondetU16RegLayout kLayout__497 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/107}, - .val = NondetRegLayout{._super = /*offset=*/108}}}; -constexpr U16RegLayout kLayout__496 = U16RegLayout{.ret = kLayout__497}; -constexpr NondetU16RegLayout kLayout__498 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/109}, - .val = NondetRegLayout{._super = /*offset=*/110}}}; -constexpr AddrDecomposeBitsLayout kLayout__495 = - AddrDecomposeBitsLayout{.low0 = NondetRegLayout{._super = /*offset=*/172}, - .low1 = NondetRegLayout{._super = /*offset=*/173}, - .upperDiff = kLayout__496, - ._0 = IsZeroLayout{._super = NondetRegLayout{._super = /*offset=*/174}, - .inv = NondetRegLayout{._super = /*offset=*/175}}, - .med14 = kLayout__498}; -constexpr NondetU16RegLayout kLayout__500 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/111}, - .val = NondetRegLayout{._super = /*offset=*/112}}}; -constexpr U16RegLayout kLayout__499 = U16RegLayout{.ret = kLayout__500}; -constexpr MemoryReadLayout kLayout__501 = MemoryReadLayout{.io = kLayout__425, ._0 = kLayout__472}; -constexpr ControlUserECALLLayout kLayout__494 = - ControlUserECALLLayout{.safeMode = NondetRegLayout{._super = /*offset=*/171}, - .pcAddr = kLayout__495, - .loadInst = kLayout__458, - .dispatchIdx = kLayout__461, - ._0 = kLayout__499, - .newPcAddr = kLayout__501, - ._1 = kLayout__475}; -constexpr Control0_SuperArm2Layout kLayout__493 = Control0_SuperArm2Layout{ - ._super = kLayout__494, - ._extra0 = kLayout__436, - ._extra1 = kLayout__437, - ._extra2 = kLayout__441, - ._extra3 = kLayout__442, - ._extra4 = kLayout__446, - ._extra5 = kLayout__447, - ._extra6 = kLayout__451, - ._extra7 = kLayout__452, - ._extra8 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/99}, - .cycle = NondetRegLayout{._super = /*offset=*/100}}, - ._extra9 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/101}, - .cycle = NondetRegLayout{._super = /*offset=*/102}}, - ._extra10 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/103}, - .cycle = NondetRegLayout{._super = /*offset=*/104}}, - ._extra11 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/105}, - .cycle = NondetRegLayout{._super = /*offset=*/106}}, - ._extra12 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/113}, - .val = NondetRegLayout{._super = /*offset=*/114}}, - ._extra13 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/115}, - .val = NondetRegLayout{._super = /*offset=*/116}}, - ._extra14 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/117}, - .val = NondetRegLayout{._super = /*offset=*/118}}, - ._extra15 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/119}, - .val = NondetRegLayout{._super = /*offset=*/120}}, - ._extra16 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/121}, - .val = NondetRegLayout{._super = /*offset=*/122}}, - ._extra17 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/123}, - .val = NondetRegLayout{._super = /*offset=*/124}}, - ._extra18 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/125}, - .val = NondetRegLayout{._super = /*offset=*/126}}, - ._extra19 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/127}, - .val = NondetRegLayout{._super = /*offset=*/128}}, - ._extra20 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/129}, - .val = NondetRegLayout{._super = /*offset=*/130}}, - ._extra21 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/131}, - .val = NondetRegLayout{._super = /*offset=*/132}}, - ._extra22 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/133}, - .val = NondetRegLayout{._super = /*offset=*/134}}, - ._extra23 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/135}, - .val = NondetRegLayout{._super = /*offset=*/136}}, - ._extra24 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/137}, - .val = NondetRegLayout{._super = /*offset=*/138}}, - ._extra25 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/139}, - .val = NondetRegLayout{._super = /*offset=*/140}}, - ._extra26 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/141}, - .val = NondetRegLayout{._super = /*offset=*/142}}, - ._extra27 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/143}, - .val = NondetRegLayout{._super = /*offset=*/144}}, - ._extra28 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/145}, - .val = NondetRegLayout{._super = /*offset=*/146}}, - ._extra29 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/147}, - .val = NondetRegLayout{._super = /*offset=*/148}}, - ._extra30 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/149}, - .val = NondetRegLayout{._super = /*offset=*/150}}, - ._extra31 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/151}, - .val = NondetRegLayout{._super = /*offset=*/152}}, - ._extra32 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/153}, - .val = NondetRegLayout{._super = /*offset=*/154}}, - ._extra33 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/155}, - .val = NondetRegLayout{._super = /*offset=*/156}}, - ._extra34 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/157}, - .val = NondetRegLayout{._super = /*offset=*/158}}, - ._extra35 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/159}, - .val = NondetRegLayout{._super = /*offset=*/160}}, - ._extra36 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/161}, - .val = NondetRegLayout{._super = /*offset=*/162}}, - ._extra37 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/163}, - .val = NondetRegLayout{._super = /*offset=*/164}}, - ._extra38 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/165}, - .val = NondetRegLayout{._super = /*offset=*/166}}, - ._extra39 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/167}, - .val = NondetRegLayout{._super = /*offset=*/168}}, - ._extra40 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/169}, - .val = NondetRegLayout{._super = /*offset=*/170}}}; -constexpr NondetU16RegLayout kLayout__505 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/113}, - .val = NondetRegLayout{._super = /*offset=*/114}}}; -constexpr NormalizeU32Layout kLayout__504 = - NormalizeU32Layout{.low16 = kLayout__500, - .lowCarry = NondetRegLayout{._super = /*offset=*/176}, - .high16 = kLayout__505, - .highCarry = NondetRegLayout{._super = /*offset=*/177}}; -constexpr ControlMRETLayout kLayout__503 = - ControlMRETLayout{.safeMode = NondetRegLayout{._super = /*offset=*/171}, - .pcAddr = kLayout__495, - .loadInst = kLayout__458, - .pc = kLayout__461, - .pcAdd = kLayout__504}; -constexpr Control0_SuperArm3Layout kLayout__502 = Control0_SuperArm3Layout{ - ._super = kLayout__503, - ._extra0 = kLayout__426, - ._extra1 = kLayout__427, - ._extra2 = kLayout__431, - ._extra3 = kLayout__432, - ._extra4 = kLayout__436, - ._extra5 = kLayout__437, - ._extra6 = kLayout__441, - ._extra7 = kLayout__442, - ._extra8 = kLayout__446, - ._extra9 = kLayout__447, - ._extra10 = kLayout__451, - ._extra11 = kLayout__452, - ._extra12 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/95}, - .cycle = NondetRegLayout{._super = /*offset=*/96}}, - ._extra13 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/97}, - .cycle = NondetRegLayout{._super = /*offset=*/98}}, - ._extra14 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/99}, - .cycle = NondetRegLayout{._super = /*offset=*/100}}, - ._extra15 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/101}, - .cycle = NondetRegLayout{._super = /*offset=*/102}}, - ._extra16 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/103}, - .cycle = NondetRegLayout{._super = /*offset=*/104}}, - ._extra17 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/105}, - .cycle = NondetRegLayout{._super = /*offset=*/106}}, - ._extra18 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/115}, - .val = NondetRegLayout{._super = /*offset=*/116}}, - ._extra19 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/117}, - .val = NondetRegLayout{._super = /*offset=*/118}}, - ._extra20 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/119}, - .val = NondetRegLayout{._super = /*offset=*/120}}, - ._extra21 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/121}, - .val = NondetRegLayout{._super = /*offset=*/122}}, - ._extra22 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/123}, - .val = NondetRegLayout{._super = /*offset=*/124}}, - ._extra23 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/125}, - .val = NondetRegLayout{._super = /*offset=*/126}}, - ._extra24 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/127}, - .val = NondetRegLayout{._super = /*offset=*/128}}, - ._extra25 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/129}, - .val = NondetRegLayout{._super = /*offset=*/130}}, - ._extra26 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/131}, - .val = NondetRegLayout{._super = /*offset=*/132}}, - ._extra27 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/133}, - .val = NondetRegLayout{._super = /*offset=*/134}}, - ._extra28 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/135}, - .val = NondetRegLayout{._super = /*offset=*/136}}, - ._extra29 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/137}, - .val = NondetRegLayout{._super = /*offset=*/138}}, - ._extra30 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/139}, - .val = NondetRegLayout{._super = /*offset=*/140}}, - ._extra31 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/141}, - .val = NondetRegLayout{._super = /*offset=*/142}}, - ._extra32 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/143}, - .val = NondetRegLayout{._super = /*offset=*/144}}, - ._extra33 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/145}, - .val = NondetRegLayout{._super = /*offset=*/146}}, - ._extra34 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/147}, - .val = NondetRegLayout{._super = /*offset=*/148}}, - ._extra35 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/149}, - .val = NondetRegLayout{._super = /*offset=*/150}}, - ._extra36 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/151}, - .val = NondetRegLayout{._super = /*offset=*/152}}, - ._extra37 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/153}, - .val = NondetRegLayout{._super = /*offset=*/154}}, - ._extra38 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/155}, - .val = NondetRegLayout{._super = /*offset=*/156}}, - ._extra39 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/157}, - .val = NondetRegLayout{._super = /*offset=*/158}}, - ._extra40 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/159}, - .val = NondetRegLayout{._super = /*offset=*/160}}, - ._extra41 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/161}, - .val = NondetRegLayout{._super = /*offset=*/162}}, - ._extra42 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/163}, - .val = NondetRegLayout{._super = /*offset=*/164}}, - ._extra43 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/165}, - .val = NondetRegLayout{._super = /*offset=*/166}}, - ._extra44 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/167}, - .val = NondetRegLayout{._super = /*offset=*/168}}, - ._extra45 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/169}, - .val = NondetRegLayout{._super = /*offset=*/170}}}; -constexpr MemoryReadLayout kLayout__511 = MemoryReadLayout{.io = kLayout__430, ._0 = kLayout__131}; -constexpr MemoryReadLayout kLayout__512 = MemoryReadLayout{.io = kLayout__435, ._0 = kLayout__478}; -constexpr MemoryReadLayout kLayout__513 = MemoryReadLayout{.io = kLayout__440, ._0 = kLayout__482}; -constexpr MemoryReadLayout kLayout__514 = MemoryReadLayout{.io = kLayout__445, ._0 = kLayout__215}; -constexpr MemoryReadLayout kLayout__515 = MemoryReadLayout{.io = kLayout__450, ._0 = kLayout__488}; -constexpr MemoryReadLayout8LayoutArray kLayout__510 = MemoryReadLayout8LayoutArray{kLayout__458, - kLayout__461, - kLayout__501, - kLayout__511, - kLayout__512, - kLayout__513, - kLayout__514, - kLayout__515}; -constexpr ControlSuspend_SuperArm0_SuperLayout kLayout__509 = - ControlSuspend_SuperArm0_SuperLayout{._1 = kLayout__510}; -constexpr ControlSuspend_SuperArm1_SuperLayout kLayout__517 = ControlSuspend_SuperArm1_SuperLayout{ - .state = NondetRegLayout{._super = /*offset=*/171}, ._0 = kLayout__467, ._1 = kLayout__469}; -constexpr ControlSuspend_SuperArm1Layout kLayout__516 = ControlSuspend_SuperArm1Layout{ - ._super = kLayout__517, - ._extra0 = kLayout__426, - ._extra1 = kLayout__427, - ._extra2 = kLayout__431, - ._extra3 = kLayout__432, - ._extra4 = kLayout__436, - ._extra5 = kLayout__437, - ._extra6 = kLayout__441, - ._extra7 = kLayout__442, - ._extra8 = kLayout__446, - ._extra9 = kLayout__447, - ._extra10 = kLayout__451, - ._extra11 = kLayout__452, - ._extra12 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/95}, - .cycle = NondetRegLayout{._super = /*offset=*/96}}, - ._extra13 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/97}, - .cycle = NondetRegLayout{._super = /*offset=*/98}}, - ._extra14 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/99}, - .cycle = NondetRegLayout{._super = /*offset=*/100}}, - ._extra15 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/101}, - .cycle = NondetRegLayout{._super = /*offset=*/102}}, - ._extra16 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/103}, - .cycle = NondetRegLayout{._super = /*offset=*/104}}, - ._extra17 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/105}, - .cycle = NondetRegLayout{._super = /*offset=*/106}}}; -constexpr ControlSuspend_SuperLayout kLayout__508 = - ControlSuspend_SuperLayout{.arm0 = kLayout__509, .arm1 = kLayout__516}; -constexpr _Arguments_ControlSuspend_SuperLayout kLayout__518 = - _Arguments_ControlSuspend_SuperLayout{.memoryArg = kLayout__491, .cycleArg = kLayout__492}; -constexpr ControlSuspendLayout kLayout__507 = - ControlSuspendLayout{._super = kLayout__508, - .pcZero = IsZeroLayout{._super = NondetRegLayout{._super = /*offset=*/172}, - .inv = NondetRegLayout{._super = /*offset=*/173}}, - ._arguments_ControlSuspend_Super = kLayout__518}; -constexpr Control0_SuperArm4Layout kLayout__506 = Control0_SuperArm4Layout{ - ._super = kLayout__507, - ._extra0 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/107}, - .val = NondetRegLayout{._super = /*offset=*/108}}, - ._extra1 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/109}, - .val = NondetRegLayout{._super = /*offset=*/110}}, - ._extra2 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/111}, - .val = NondetRegLayout{._super = /*offset=*/112}}, - ._extra3 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/113}, - .val = NondetRegLayout{._super = /*offset=*/114}}, - ._extra4 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/115}, - .val = NondetRegLayout{._super = /*offset=*/116}}, - ._extra5 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/117}, - .val = NondetRegLayout{._super = /*offset=*/118}}, - ._extra6 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/119}, - .val = NondetRegLayout{._super = /*offset=*/120}}, - ._extra7 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/121}, - .val = NondetRegLayout{._super = /*offset=*/122}}, - ._extra8 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/123}, - .val = NondetRegLayout{._super = /*offset=*/124}}, - ._extra9 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/125}, - .val = NondetRegLayout{._super = /*offset=*/126}}, - ._extra10 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/127}, - .val = NondetRegLayout{._super = /*offset=*/128}}, - ._extra11 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/129}, - .val = NondetRegLayout{._super = /*offset=*/130}}, - ._extra12 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/131}, - .val = NondetRegLayout{._super = /*offset=*/132}}, - ._extra13 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/133}, - .val = NondetRegLayout{._super = /*offset=*/134}}, - ._extra14 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/135}, - .val = NondetRegLayout{._super = /*offset=*/136}}, - ._extra15 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/137}, - .val = NondetRegLayout{._super = /*offset=*/138}}, - ._extra16 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/139}, - .val = NondetRegLayout{._super = /*offset=*/140}}, - ._extra17 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/141}, - .val = NondetRegLayout{._super = /*offset=*/142}}, - ._extra18 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/143}, - .val = NondetRegLayout{._super = /*offset=*/144}}, - ._extra19 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/145}, - .val = NondetRegLayout{._super = /*offset=*/146}}, - ._extra20 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/147}, - .val = NondetRegLayout{._super = /*offset=*/148}}, - ._extra21 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/149}, - .val = NondetRegLayout{._super = /*offset=*/150}}, - ._extra22 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/151}, - .val = NondetRegLayout{._super = /*offset=*/152}}, - ._extra23 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/153}, - .val = NondetRegLayout{._super = /*offset=*/154}}, - ._extra24 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/155}, - .val = NondetRegLayout{._super = /*offset=*/156}}, - ._extra25 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/157}, - .val = NondetRegLayout{._super = /*offset=*/158}}, - ._extra26 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/159}, - .val = NondetRegLayout{._super = /*offset=*/160}}, - ._extra27 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/161}, - .val = NondetRegLayout{._super = /*offset=*/162}}, - ._extra28 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/163}, - .val = NondetRegLayout{._super = /*offset=*/164}}, - ._extra29 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/165}, - .val = NondetRegLayout{._super = /*offset=*/166}}, - ._extra30 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/167}, - .val = NondetRegLayout{._super = /*offset=*/168}}, - ._extra31 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/169}, - .val = NondetRegLayout{._super = /*offset=*/170}}}; -constexpr MemoryPageOutLayout kLayout__522 = - MemoryPageOutLayout{.io = kLayout__415, ._0 = kLayout__459}; -constexpr MemoryPageOutLayout kLayout__523 = - MemoryPageOutLayout{.io = kLayout__420, ._0 = kLayout__462}; -constexpr MemoryPageOutLayout kLayout__524 = - MemoryPageOutLayout{.io = kLayout__425, ._0 = kLayout__472}; -constexpr MemoryPageOutLayout kLayout__525 = - MemoryPageOutLayout{.io = kLayout__430, ._0 = kLayout__131}; -constexpr MemoryPageOutLayout kLayout__526 = - MemoryPageOutLayout{.io = kLayout__435, ._0 = kLayout__478}; -constexpr MemoryPageOutLayout kLayout__527 = - MemoryPageOutLayout{.io = kLayout__440, ._0 = kLayout__482}; -constexpr MemoryPageOutLayout kLayout__528 = - MemoryPageOutLayout{.io = kLayout__445, ._0 = kLayout__215}; -constexpr MemoryPageOutLayout kLayout__529 = - MemoryPageOutLayout{.io = kLayout__450, ._0 = kLayout__488}; -constexpr MemoryPageOutLayout8LayoutArray kLayout__521 = - MemoryPageOutLayout8LayoutArray{kLayout__522, - kLayout__523, - kLayout__524, - kLayout__525, - kLayout__526, - kLayout__527, - kLayout__528, - kLayout__529}; -constexpr ControlStoreRootLayout kLayout__520 = ControlStoreRootLayout{._1 = kLayout__521}; -constexpr Control0_SuperArm5Layout kLayout__519 = Control0_SuperArm5Layout{ - ._super = kLayout__520, - ._extra0 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/107}, - .val = NondetRegLayout{._super = /*offset=*/108}}, - ._extra1 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/109}, - .val = NondetRegLayout{._super = /*offset=*/110}}, - ._extra2 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/111}, - .val = NondetRegLayout{._super = /*offset=*/112}}, - ._extra3 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/113}, - .val = NondetRegLayout{._super = /*offset=*/114}}, - ._extra4 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/115}, - .val = NondetRegLayout{._super = /*offset=*/116}}, - ._extra5 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/117}, - .val = NondetRegLayout{._super = /*offset=*/118}}, - ._extra6 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/119}, - .val = NondetRegLayout{._super = /*offset=*/120}}, - ._extra7 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/121}, - .val = NondetRegLayout{._super = /*offset=*/122}}, - ._extra8 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/123}, - .val = NondetRegLayout{._super = /*offset=*/124}}, - ._extra9 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/125}, - .val = NondetRegLayout{._super = /*offset=*/126}}, - ._extra10 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/127}, - .val = NondetRegLayout{._super = /*offset=*/128}}, - ._extra11 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/129}, - .val = NondetRegLayout{._super = /*offset=*/130}}, - ._extra12 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/131}, - .val = NondetRegLayout{._super = /*offset=*/132}}, - ._extra13 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/133}, - .val = NondetRegLayout{._super = /*offset=*/134}}, - ._extra14 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/135}, - .val = NondetRegLayout{._super = /*offset=*/136}}, - ._extra15 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/137}, - .val = NondetRegLayout{._super = /*offset=*/138}}, - ._extra16 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/139}, - .val = NondetRegLayout{._super = /*offset=*/140}}, - ._extra17 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/141}, - .val = NondetRegLayout{._super = /*offset=*/142}}, - ._extra18 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/143}, - .val = NondetRegLayout{._super = /*offset=*/144}}, - ._extra19 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/145}, - .val = NondetRegLayout{._super = /*offset=*/146}}, - ._extra20 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/147}, - .val = NondetRegLayout{._super = /*offset=*/148}}, - ._extra21 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/149}, - .val = NondetRegLayout{._super = /*offset=*/150}}, - ._extra22 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/151}, - .val = NondetRegLayout{._super = /*offset=*/152}}, - ._extra23 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/153}, - .val = NondetRegLayout{._super = /*offset=*/154}}, - ._extra24 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/155}, - .val = NondetRegLayout{._super = /*offset=*/156}}, - ._extra25 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/157}, - .val = NondetRegLayout{._super = /*offset=*/158}}, - ._extra26 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/159}, - .val = NondetRegLayout{._super = /*offset=*/160}}, - ._extra27 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/161}, - .val = NondetRegLayout{._super = /*offset=*/162}}, - ._extra28 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/163}, - .val = NondetRegLayout{._super = /*offset=*/164}}, - ._extra29 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/165}, - .val = NondetRegLayout{._super = /*offset=*/166}}, - ._extra30 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/167}, - .val = NondetRegLayout{._super = /*offset=*/168}}, - ._extra31 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/169}, - .val = NondetRegLayout{._super = /*offset=*/170}}}; -constexpr ControlTable_SuperArm0_Super__0_SuperLayout kLayout__536 = - ControlTable_SuperArm0_Super__0_SuperLayout{ - .arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/107}, - .val = NondetRegLayout{._super = /*offset=*/108}}}; -constexpr ControlTable_SuperArm0_Super__0_SuperLayout kLayout__537 = - ControlTable_SuperArm0_Super__0_SuperLayout{ - .arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/109}, - .val = NondetRegLayout{._super = /*offset=*/110}}}; -constexpr ControlTable_SuperArm0_Super__0_SuperLayout kLayout__538 = - ControlTable_SuperArm0_Super__0_SuperLayout{ - .arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/111}, - .val = NondetRegLayout{._super = /*offset=*/112}}}; -constexpr ControlTable_SuperArm0_Super__0_SuperLayout kLayout__539 = - ControlTable_SuperArm0_Super__0_SuperLayout{ - .arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/113}, - .val = NondetRegLayout{._super = /*offset=*/114}}}; -constexpr ControlTable_SuperArm0_Super__0_SuperLayout kLayout__540 = - ControlTable_SuperArm0_Super__0_SuperLayout{ - .arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/115}, - .val = NondetRegLayout{._super = /*offset=*/116}}}; -constexpr ControlTable_SuperArm0_Super__0_SuperLayout kLayout__541 = - ControlTable_SuperArm0_Super__0_SuperLayout{ - .arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/117}, - .val = NondetRegLayout{._super = /*offset=*/118}}}; -constexpr ControlTable_SuperArm0_Super__0_SuperLayout kLayout__542 = - ControlTable_SuperArm0_Super__0_SuperLayout{ - .arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/119}, - .val = NondetRegLayout{._super = /*offset=*/120}}}; -constexpr ControlTable_SuperArm0_Super__0_SuperLayout kLayout__543 = - ControlTable_SuperArm0_Super__0_SuperLayout{ - .arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/121}, - .val = NondetRegLayout{._super = /*offset=*/122}}}; -constexpr ControlTable_SuperArm0_Super__0_SuperLayout kLayout__544 = - ControlTable_SuperArm0_Super__0_SuperLayout{ - .arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/123}, - .val = NondetRegLayout{._super = /*offset=*/124}}}; -constexpr ControlTable_SuperArm0_Super__0_SuperLayout kLayout__545 = - ControlTable_SuperArm0_Super__0_SuperLayout{ - .arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/125}, - .val = NondetRegLayout{._super = /*offset=*/126}}}; -constexpr ControlTable_SuperArm0_Super__0_SuperLayout kLayout__546 = - ControlTable_SuperArm0_Super__0_SuperLayout{ - .arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/127}, - .val = NondetRegLayout{._super = /*offset=*/128}}}; -constexpr ControlTable_SuperArm0_Super__0_SuperLayout kLayout__547 = - ControlTable_SuperArm0_Super__0_SuperLayout{ - .arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/129}, - .val = NondetRegLayout{._super = /*offset=*/130}}}; -constexpr ControlTable_SuperArm0_Super__0_SuperLayout kLayout__548 = - ControlTable_SuperArm0_Super__0_SuperLayout{ - .arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/131}, - .val = NondetRegLayout{._super = /*offset=*/132}}}; -constexpr ControlTable_SuperArm0_Super__0_SuperLayout kLayout__549 = - ControlTable_SuperArm0_Super__0_SuperLayout{ - .arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/133}, - .val = NondetRegLayout{._super = /*offset=*/134}}}; -constexpr ControlTable_SuperArm0_Super__0_SuperLayout kLayout__550 = - ControlTable_SuperArm0_Super__0_SuperLayout{ - .arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/135}, - .val = NondetRegLayout{._super = /*offset=*/136}}}; -constexpr ControlTable_SuperArm0_Super__0_SuperLayout kLayout__551 = - ControlTable_SuperArm0_Super__0_SuperLayout{ - .arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/137}, - .val = NondetRegLayout{._super = /*offset=*/138}}}; -constexpr ControlTable_SuperArm0_Super__0_SuperLayout16LayoutArray kLayout__535 = - ControlTable_SuperArm0_Super__0_SuperLayout16LayoutArray{kLayout__536, - kLayout__537, - kLayout__538, - kLayout__539, - kLayout__540, - kLayout__541, - kLayout__542, - kLayout__543, - kLayout__544, - kLayout__545, - kLayout__546, - kLayout__547, - kLayout__548, - kLayout__549, - kLayout__550, - kLayout__551}; -constexpr ControlTable_SuperArm0_SuperLayout kLayout__534 = ControlTable_SuperArm0_SuperLayout{ - ._1 = kLayout__535, - .done = IsZeroLayout{._super = NondetRegLayout{._super = /*offset=*/171}, - .inv = NondetRegLayout{._super = /*offset=*/172}}}; -constexpr ControlTable_SuperArm0Layout kLayout__533 = ControlTable_SuperArm0Layout{ - ._super = kLayout__534, - ._extra0 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/139}, - .val = NondetRegLayout{._super = /*offset=*/140}}, - ._extra1 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/141}, - .val = NondetRegLayout{._super = /*offset=*/142}}, - ._extra2 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/143}, - .val = NondetRegLayout{._super = /*offset=*/144}}, - ._extra3 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/145}, - .val = NondetRegLayout{._super = /*offset=*/146}}, - ._extra4 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/147}, - .val = NondetRegLayout{._super = /*offset=*/148}}, - ._extra5 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/149}, - .val = NondetRegLayout{._super = /*offset=*/150}}, - ._extra6 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/151}, - .val = NondetRegLayout{._super = /*offset=*/152}}, - ._extra7 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/153}, - .val = NondetRegLayout{._super = /*offset=*/154}}, - ._extra8 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/155}, - .val = NondetRegLayout{._super = /*offset=*/156}}, - ._extra9 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/157}, - .val = NondetRegLayout{._super = /*offset=*/158}}, - ._extra10 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/159}, - .val = NondetRegLayout{._super = /*offset=*/160}}, - ._extra11 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/161}, - .val = NondetRegLayout{._super = /*offset=*/162}}, - ._extra12 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/163}, - .val = NondetRegLayout{._super = /*offset=*/164}}, - ._extra13 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/165}, - .val = NondetRegLayout{._super = /*offset=*/166}}, - ._extra14 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/167}, - .val = NondetRegLayout{._super = /*offset=*/168}}, - ._extra15 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/169}, - .val = NondetRegLayout{._super = /*offset=*/170}}}; -constexpr ControlTable_SuperArm1_Super__0_SuperLayout kLayout__555 = - ControlTable_SuperArm1_Super__0_SuperLayout{ - .arg = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/139}, - .val = NondetRegLayout{._super = /*offset=*/140}}}; -constexpr ControlTable_SuperArm1_Super__0_SuperLayout kLayout__556 = - ControlTable_SuperArm1_Super__0_SuperLayout{ - .arg = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/141}, - .val = NondetRegLayout{._super = /*offset=*/142}}}; -constexpr ControlTable_SuperArm1_Super__0_SuperLayout kLayout__557 = - ControlTable_SuperArm1_Super__0_SuperLayout{ - .arg = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/143}, - .val = NondetRegLayout{._super = /*offset=*/144}}}; -constexpr ControlTable_SuperArm1_Super__0_SuperLayout kLayout__558 = - ControlTable_SuperArm1_Super__0_SuperLayout{ - .arg = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/145}, - .val = NondetRegLayout{._super = /*offset=*/146}}}; -constexpr ControlTable_SuperArm1_Super__0_SuperLayout kLayout__559 = - ControlTable_SuperArm1_Super__0_SuperLayout{ - .arg = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/147}, - .val = NondetRegLayout{._super = /*offset=*/148}}}; -constexpr ControlTable_SuperArm1_Super__0_SuperLayout kLayout__560 = - ControlTable_SuperArm1_Super__0_SuperLayout{ - .arg = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/149}, - .val = NondetRegLayout{._super = /*offset=*/150}}}; -constexpr ControlTable_SuperArm1_Super__0_SuperLayout kLayout__561 = - ControlTable_SuperArm1_Super__0_SuperLayout{ - .arg = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/151}, - .val = NondetRegLayout{._super = /*offset=*/152}}}; -constexpr ControlTable_SuperArm1_Super__0_SuperLayout kLayout__562 = - ControlTable_SuperArm1_Super__0_SuperLayout{ - .arg = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/153}, - .val = NondetRegLayout{._super = /*offset=*/154}}}; -constexpr ControlTable_SuperArm1_Super__0_SuperLayout kLayout__563 = - ControlTable_SuperArm1_Super__0_SuperLayout{ - .arg = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/155}, - .val = NondetRegLayout{._super = /*offset=*/156}}}; -constexpr ControlTable_SuperArm1_Super__0_SuperLayout kLayout__564 = - ControlTable_SuperArm1_Super__0_SuperLayout{ - .arg = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/157}, - .val = NondetRegLayout{._super = /*offset=*/158}}}; -constexpr ControlTable_SuperArm1_Super__0_SuperLayout kLayout__565 = - ControlTable_SuperArm1_Super__0_SuperLayout{ - .arg = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/159}, - .val = NondetRegLayout{._super = /*offset=*/160}}}; -constexpr ControlTable_SuperArm1_Super__0_SuperLayout kLayout__566 = - ControlTable_SuperArm1_Super__0_SuperLayout{ - .arg = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/161}, - .val = NondetRegLayout{._super = /*offset=*/162}}}; -constexpr ControlTable_SuperArm1_Super__0_SuperLayout kLayout__567 = - ControlTable_SuperArm1_Super__0_SuperLayout{ - .arg = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/163}, - .val = NondetRegLayout{._super = /*offset=*/164}}}; -constexpr ControlTable_SuperArm1_Super__0_SuperLayout kLayout__568 = - ControlTable_SuperArm1_Super__0_SuperLayout{ - .arg = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/165}, - .val = NondetRegLayout{._super = /*offset=*/166}}}; -constexpr ControlTable_SuperArm1_Super__0_SuperLayout kLayout__569 = - ControlTable_SuperArm1_Super__0_SuperLayout{ - .arg = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/167}, - .val = NondetRegLayout{._super = /*offset=*/168}}}; -constexpr ControlTable_SuperArm1_Super__0_SuperLayout kLayout__570 = - ControlTable_SuperArm1_Super__0_SuperLayout{ - .arg = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/169}, - .val = NondetRegLayout{._super = /*offset=*/170}}}; -constexpr ControlTable_SuperArm1_Super__0_SuperLayout16LayoutArray kLayout__554 = - ControlTable_SuperArm1_Super__0_SuperLayout16LayoutArray{kLayout__555, - kLayout__556, - kLayout__557, - kLayout__558, - kLayout__559, - kLayout__560, - kLayout__561, - kLayout__562, - kLayout__563, - kLayout__564, - kLayout__565, - kLayout__566, - kLayout__567, - kLayout__568, - kLayout__569, - kLayout__570}; -constexpr ControlTable_SuperArm1_SuperLayout kLayout__553 = ControlTable_SuperArm1_SuperLayout{ - ._1 = kLayout__554, - .done = IsZeroLayout{._super = NondetRegLayout{._super = /*offset=*/171}, - .inv = NondetRegLayout{._super = /*offset=*/172}}}; -constexpr ControlTable_SuperArm1Layout kLayout__552 = ControlTable_SuperArm1Layout{ - ._super = kLayout__553, - ._extra0 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/107}, - .val = NondetRegLayout{._super = /*offset=*/108}}, - ._extra1 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/109}, - .val = NondetRegLayout{._super = /*offset=*/110}}, - ._extra2 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/111}, - .val = NondetRegLayout{._super = /*offset=*/112}}, - ._extra3 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/113}, - .val = NondetRegLayout{._super = /*offset=*/114}}, - ._extra4 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/115}, - .val = NondetRegLayout{._super = /*offset=*/116}}, - ._extra5 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/117}, - .val = NondetRegLayout{._super = /*offset=*/118}}, - ._extra6 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/119}, - .val = NondetRegLayout{._super = /*offset=*/120}}, - ._extra7 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/121}, - .val = NondetRegLayout{._super = /*offset=*/122}}, - ._extra8 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/123}, - .val = NondetRegLayout{._super = /*offset=*/124}}, - ._extra9 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/125}, - .val = NondetRegLayout{._super = /*offset=*/126}}, - ._extra10 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/127}, - .val = NondetRegLayout{._super = /*offset=*/128}}, - ._extra11 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/129}, - .val = NondetRegLayout{._super = /*offset=*/130}}, - ._extra12 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/131}, - .val = NondetRegLayout{._super = /*offset=*/132}}, - ._extra13 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/133}, - .val = NondetRegLayout{._super = /*offset=*/134}}, - ._extra14 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/135}, - .val = NondetRegLayout{._super = /*offset=*/136}}, - ._extra15 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/137}, - .val = NondetRegLayout{._super = /*offset=*/138}}}; -constexpr ControlTable_SuperLayout kLayout__532 = - ControlTable_SuperLayout{.arm0 = kLayout__533, .arm1 = kLayout__552}; -constexpr ArgU16Layout16LayoutArray kLayout__572 = - ArgU16Layout16LayoutArray{ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/107}, - .val = NondetRegLayout{._super = /*offset=*/108}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/109}, - .val = NondetRegLayout{._super = /*offset=*/110}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/111}, - .val = NondetRegLayout{._super = /*offset=*/112}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/113}, - .val = NondetRegLayout{._super = /*offset=*/114}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/115}, - .val = NondetRegLayout{._super = /*offset=*/116}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/117}, - .val = NondetRegLayout{._super = /*offset=*/118}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/119}, - .val = NondetRegLayout{._super = /*offset=*/120}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/121}, - .val = NondetRegLayout{._super = /*offset=*/122}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/123}, - .val = NondetRegLayout{._super = /*offset=*/124}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/125}, - .val = NondetRegLayout{._super = /*offset=*/126}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/127}, - .val = NondetRegLayout{._super = /*offset=*/128}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/129}, - .val = NondetRegLayout{._super = /*offset=*/130}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/131}, - .val = NondetRegLayout{._super = /*offset=*/132}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/133}, - .val = NondetRegLayout{._super = /*offset=*/134}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/135}, - .val = NondetRegLayout{._super = /*offset=*/136}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/137}, - .val = NondetRegLayout{._super = /*offset=*/138}}}; -constexpr ArgU8Layout16LayoutArray kLayout__573 = - ArgU8Layout16LayoutArray{ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/139}, - .val = NondetRegLayout{._super = /*offset=*/140}}, - ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/141}, - .val = NondetRegLayout{._super = /*offset=*/142}}, - ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/143}, - .val = NondetRegLayout{._super = /*offset=*/144}}, - ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/145}, - .val = NondetRegLayout{._super = /*offset=*/146}}, - ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/147}, - .val = NondetRegLayout{._super = /*offset=*/148}}, - ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/149}, - .val = NondetRegLayout{._super = /*offset=*/150}}, - ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/151}, - .val = NondetRegLayout{._super = /*offset=*/152}}, - ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/153}, - .val = NondetRegLayout{._super = /*offset=*/154}}, - ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/155}, - .val = NondetRegLayout{._super = /*offset=*/156}}, - ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/157}, - .val = NondetRegLayout{._super = /*offset=*/158}}, - ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/159}, - .val = NondetRegLayout{._super = /*offset=*/160}}, - ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/161}, - .val = NondetRegLayout{._super = /*offset=*/162}}, - ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/163}, - .val = NondetRegLayout{._super = /*offset=*/164}}, - ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/165}, - .val = NondetRegLayout{._super = /*offset=*/166}}, - ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/167}, - .val = NondetRegLayout{._super = /*offset=*/168}}, - ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/169}, - .val = NondetRegLayout{._super = /*offset=*/170}}}; -constexpr _Arguments_ControlTable_SuperLayout kLayout__571 = - _Arguments_ControlTable_SuperLayout{.argU16 = kLayout__572, .argU8 = kLayout__573}; -constexpr ControlTableLayout kLayout__531 = - ControlTableLayout{._super = kLayout__532, - .entry = NondetRegLayout{._super = /*offset=*/173}, - .mode = NondetRegLayout{._super = /*offset=*/174}, - ._arguments_ControlTable_Super = kLayout__571}; -constexpr Control0_SuperArm6Layout kLayout__530 = Control0_SuperArm6Layout{ - ._super = kLayout__531, - ._extra0 = kLayout__416, - ._extra1 = kLayout__417, - ._extra2 = kLayout__421, - ._extra3 = kLayout__422, - ._extra4 = kLayout__426, - ._extra5 = kLayout__427, - ._extra6 = kLayout__431, - ._extra7 = kLayout__432, - ._extra8 = kLayout__436, - ._extra9 = kLayout__437, - ._extra10 = kLayout__441, - ._extra11 = kLayout__442, - ._extra12 = kLayout__446, - ._extra13 = kLayout__447, - ._extra14 = kLayout__451, - ._extra15 = kLayout__452, - ._extra16 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/91}, - .cycle = NondetRegLayout{._super = /*offset=*/92}}, - ._extra17 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/93}, - .cycle = NondetRegLayout{._super = /*offset=*/94}}, - ._extra18 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/95}, - .cycle = NondetRegLayout{._super = /*offset=*/96}}, - ._extra19 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/97}, - .cycle = NondetRegLayout{._super = /*offset=*/98}}, - ._extra20 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/99}, - .cycle = NondetRegLayout{._super = /*offset=*/100}}, - ._extra21 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/101}, - .cycle = NondetRegLayout{._super = /*offset=*/102}}, - ._extra22 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/103}, - .cycle = NondetRegLayout{._super = /*offset=*/104}}, - ._extra23 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/105}, - .cycle = NondetRegLayout{._super = /*offset=*/106}}}; -constexpr Control0_SuperArm7Layout kLayout__574 = Control0_SuperArm7Layout{ - ._extra0 = kLayout__416, - ._extra1 = kLayout__417, - ._extra2 = kLayout__421, - ._extra3 = kLayout__422, - ._extra4 = kLayout__426, - ._extra5 = kLayout__427, - ._extra6 = kLayout__431, - ._extra7 = kLayout__432, - ._extra8 = kLayout__436, - ._extra9 = kLayout__437, - ._extra10 = kLayout__441, - ._extra11 = kLayout__442, - ._extra12 = kLayout__446, - ._extra13 = kLayout__447, - ._extra14 = kLayout__451, - ._extra15 = kLayout__452, - ._extra16 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/91}, - .cycle = NondetRegLayout{._super = /*offset=*/92}}, - ._extra17 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/93}, - .cycle = NondetRegLayout{._super = /*offset=*/94}}, - ._extra18 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/95}, - .cycle = NondetRegLayout{._super = /*offset=*/96}}, - ._extra19 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/97}, - .cycle = NondetRegLayout{._super = /*offset=*/98}}, - ._extra20 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/99}, - .cycle = NondetRegLayout{._super = /*offset=*/100}}, - ._extra21 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/101}, - .cycle = NondetRegLayout{._super = /*offset=*/102}}, - ._extra22 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/103}, - .cycle = NondetRegLayout{._super = /*offset=*/104}}, - ._extra23 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/105}, - .cycle = NondetRegLayout{._super = /*offset=*/106}}, - ._extra24 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/107}, - .val = NondetRegLayout{._super = /*offset=*/108}}, - ._extra25 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/109}, - .val = NondetRegLayout{._super = /*offset=*/110}}, - ._extra26 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/111}, - .val = NondetRegLayout{._super = /*offset=*/112}}, - ._extra27 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/113}, - .val = NondetRegLayout{._super = /*offset=*/114}}, - ._extra28 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/115}, - .val = NondetRegLayout{._super = /*offset=*/116}}, - ._extra29 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/117}, - .val = NondetRegLayout{._super = /*offset=*/118}}, - ._extra30 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/119}, - .val = NondetRegLayout{._super = /*offset=*/120}}, - ._extra31 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/121}, - .val = NondetRegLayout{._super = /*offset=*/122}}, - ._extra32 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/123}, - .val = NondetRegLayout{._super = /*offset=*/124}}, - ._extra33 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/125}, - .val = NondetRegLayout{._super = /*offset=*/126}}, - ._extra34 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/127}, - .val = NondetRegLayout{._super = /*offset=*/128}}, - ._extra35 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/129}, - .val = NondetRegLayout{._super = /*offset=*/130}}, - ._extra36 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/131}, - .val = NondetRegLayout{._super = /*offset=*/132}}, - ._extra37 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/133}, - .val = NondetRegLayout{._super = /*offset=*/134}}, - ._extra38 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/135}, - .val = NondetRegLayout{._super = /*offset=*/136}}, - ._extra39 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/137}, - .val = NondetRegLayout{._super = /*offset=*/138}}, - ._extra40 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/139}, - .val = NondetRegLayout{._super = /*offset=*/140}}, - ._extra41 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/141}, - .val = NondetRegLayout{._super = /*offset=*/142}}, - ._extra42 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/143}, - .val = NondetRegLayout{._super = /*offset=*/144}}, - ._extra43 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/145}, - .val = NondetRegLayout{._super = /*offset=*/146}}, - ._extra44 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/147}, - .val = NondetRegLayout{._super = /*offset=*/148}}, - ._extra45 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/149}, - .val = NondetRegLayout{._super = /*offset=*/150}}, - ._extra46 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/151}, - .val = NondetRegLayout{._super = /*offset=*/152}}, - ._extra47 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/153}, - .val = NondetRegLayout{._super = /*offset=*/154}}, - ._extra48 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/155}, - .val = NondetRegLayout{._super = /*offset=*/156}}, - ._extra49 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/157}, - .val = NondetRegLayout{._super = /*offset=*/158}}, - ._extra50 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/159}, - .val = NondetRegLayout{._super = /*offset=*/160}}, - ._extra51 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/161}, - .val = NondetRegLayout{._super = /*offset=*/162}}, - ._extra52 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/163}, - .val = NondetRegLayout{._super = /*offset=*/164}}, - ._extra53 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/165}, - .val = NondetRegLayout{._super = /*offset=*/166}}, - ._extra54 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/167}, - .val = NondetRegLayout{._super = /*offset=*/168}}, - ._extra55 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/169}, - .val = NondetRegLayout{._super = /*offset=*/170}}}; -constexpr Control0_SuperLayout kLayout__409 = Control0_SuperLayout{.arm0 = kLayout__410, - .arm1 = kLayout__453, - .arm2 = kLayout__493, - .arm3 = kLayout__502, - .arm4 = kLayout__506, - .arm5 = kLayout__519, - .arm6 = kLayout__530, - .arm7 = kLayout__574}; -constexpr _Arguments_Control0_SuperLayout kLayout__575 = - _Arguments_Control0_SuperLayout{.memoryArg = kLayout__491, - .cycleArg = kLayout__492, - .argU16 = kLayout__572, - .argU8 = kLayout__573}; -constexpr Control0Layout kLayout__408 = - Control0Layout{._super = kLayout__409, - .arg = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/178}, - .cycle = NondetRegLayout{._super = /*offset=*/0}}, - ._arguments_Control0_Super = kLayout__575}; -constexpr NondetU16RegLayout kLayout__579 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/76}, - .val = NondetRegLayout{._super = /*offset=*/77}}}; -constexpr U16RegLayout kLayout__578 = U16RegLayout{.ret = kLayout__579}; -constexpr AddrDecomposeBitsLayout kLayout__577 = - AddrDecomposeBitsLayout{.low0 = NondetRegLayout{._super = /*offset=*/74}, - .low1 = NondetRegLayout{._super = /*offset=*/75}, - .upperDiff = kLayout__578, - ._0 = IsZeroLayout{._super = NondetRegLayout{._super = /*offset=*/78}, - .inv = NondetRegLayout{._super = /*offset=*/79}}, - .med14 = kLayout__27}; -constexpr MemoryArgLayout8LayoutArray kLayout__581 = MemoryArgLayout8LayoutArray{kLayout__416, - kLayout__417, - kLayout__421, - kLayout__422, - kLayout__426, - kLayout__427, - kLayout__431, - kLayout__432}; -constexpr CycleArgLayout4LayoutArray kLayout__582 = - CycleArgLayout4LayoutArray{CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/59}, - .cycle = NondetRegLayout{._super = /*offset=*/60}}, - CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/61}, - .cycle = NondetRegLayout{._super = /*offset=*/62}}, - CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/63}, - .cycle = NondetRegLayout{._super = /*offset=*/64}}, - CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/65}, - .cycle = NondetRegLayout{._super = /*offset=*/66}}}; -constexpr ArgU16Layout2LayoutArray kLayout__583 = - ArgU16Layout2LayoutArray{ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/67}, - .val = NondetRegLayout{._super = /*offset=*/68}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/69}, - .val = NondetRegLayout{._super = /*offset=*/70}}}; -constexpr _Arguments_ECall0OutputLayout kLayout__580 = _Arguments_ECall0OutputLayout{ - .memoryArg = kLayout__581, .cycleArg = kLayout__582, .argU16 = kLayout__583}; -constexpr IsCycleLayout kLayout__589 = - IsCycleLayout{.arg = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/59}, - .cycle = NondetRegLayout{._super = /*offset=*/60}}}; -constexpr IsForwardLayout kLayout__588 = IsForwardLayout{._0 = kLayout__589}; -constexpr MemoryReadLayout kLayout__587 = MemoryReadLayout{.io = kLayout__415, ._0 = kLayout__588}; -constexpr IsCycleLayout kLayout__592 = - IsCycleLayout{.arg = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/61}, - .cycle = NondetRegLayout{._super = /*offset=*/62}}}; -constexpr IsForwardLayout kLayout__591 = IsForwardLayout{._0 = kLayout__592}; -constexpr MemoryReadLayout kLayout__590 = MemoryReadLayout{.io = kLayout__420, ._0 = kLayout__591}; -constexpr NondetRegLayout4LayoutArray kLayout__594 = - NondetRegLayout4LayoutArray{NondetRegLayout{._super = /*offset=*/82}, - NondetRegLayout{._super = /*offset=*/83}, - NondetRegLayout{._super = /*offset=*/84}, - NondetRegLayout{._super = /*offset=*/85}}; -constexpr OneHot_4_Layout kLayout__593 = OneHot_4_Layout{._super = kLayout__594}; -constexpr MachineECallLayout kLayout__586 = MachineECallLayout{ - .loadInst = kLayout__587, .dispatchIdx = kLayout__590, .dispatch = kLayout__593}; -constexpr ECall0OutputArm0Layout kLayout__585 = ECall0OutputArm0Layout{ - ._super = kLayout__586, - ._extra0 = kLayout__426, - ._extra1 = kLayout__427, - ._extra2 = kLayout__431, - ._extra3 = kLayout__432, - ._extra4 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/63}, - .cycle = NondetRegLayout{._super = /*offset=*/64}}, - ._extra5 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/65}, - .cycle = NondetRegLayout{._super = /*offset=*/66}}, - ._extra6 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/67}, - .val = NondetRegLayout{._super = /*offset=*/68}}, - ._extra7 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/69}, - .val = NondetRegLayout{._super = /*offset=*/70}}}; -constexpr ECallTerminateLayout kLayout__596 = - ECallTerminateLayout{.a0 = kLayout__587, .a1 = kLayout__590}; -constexpr ECall0OutputArm1Layout kLayout__595 = ECall0OutputArm1Layout{ - ._super = kLayout__596, - ._extra0 = kLayout__426, - ._extra1 = kLayout__427, - ._extra2 = kLayout__431, - ._extra3 = kLayout__432, - ._extra4 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/63}, - .cycle = NondetRegLayout{._super = /*offset=*/64}}, - ._extra5 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/65}, - .cycle = NondetRegLayout{._super = /*offset=*/66}}, - ._extra6 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/67}, - .val = NondetRegLayout{._super = /*offset=*/68}}, - ._extra7 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/69}, - .val = NondetRegLayout{._super = /*offset=*/70}}}; -constexpr IsCycleLayout kLayout__600 = - IsCycleLayout{.arg = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/63}, - .cycle = NondetRegLayout{._super = /*offset=*/64}}}; -constexpr IsForwardLayout kLayout__599 = IsForwardLayout{._0 = kLayout__600}; -constexpr MemoryReadLayout kLayout__598 = MemoryReadLayout{.io = kLayout__425, ._0 = kLayout__599}; -constexpr NondetU16RegLayout kLayout__601 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/67}, - .val = NondetRegLayout{._super = /*offset=*/68}}}; -constexpr NondetU16RegLayout kLayout__603 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/69}, - .val = NondetRegLayout{._super = /*offset=*/70}}}; -constexpr U16RegLayout kLayout__602 = U16RegLayout{.ret = kLayout__603}; -constexpr MemoryWriteLayout kLayout__604 = - MemoryWriteLayout{.io = kLayout__430, ._0 = kLayout__301}; -constexpr NondetRegLayout4LayoutArray kLayout__607 = - NondetRegLayout4LayoutArray{NondetRegLayout{._super = /*offset=*/84}, - NondetRegLayout{._super = /*offset=*/85}, - NondetRegLayout{._super = /*offset=*/86}, - NondetRegLayout{._super = /*offset=*/87}}; -constexpr OneHot_4_Layout kLayout__606 = OneHot_4_Layout{._super = kLayout__607}; -constexpr DecomposeLow2Layout kLayout__605 = - DecomposeLow2Layout{.high = NondetRegLayout{._super = /*offset=*/82}, - .low2 = NondetRegLayout{._super = /*offset=*/83}, - .low2Hot = kLayout__606, - .highZero = IsZeroLayout{._super = NondetRegLayout{._super = /*offset=*/88}, - .inv = NondetRegLayout{._super = /*offset=*/89}}, - .isZero = NondetRegLayout{._super = /*offset=*/90}}; -constexpr NondetRegLayout4LayoutArray kLayout__610 = - NondetRegLayout4LayoutArray{NondetRegLayout{._super = /*offset=*/93}, - NondetRegLayout{._super = /*offset=*/94}, - NondetRegLayout{._super = /*offset=*/95}, - NondetRegLayout{._super = /*offset=*/96}}; -constexpr OneHot_4_Layout kLayout__609 = OneHot_4_Layout{._super = kLayout__610}; -constexpr DecomposeLow2Layout kLayout__608 = - DecomposeLow2Layout{.high = NondetRegLayout{._super = /*offset=*/91}, - .low2 = NondetRegLayout{._super = /*offset=*/92}, - .low2Hot = kLayout__609, - .highZero = IsZeroLayout{._super = NondetRegLayout{._super = /*offset=*/97}, - .inv = NondetRegLayout{._super = /*offset=*/98}}, - .isZero = NondetRegLayout{._super = /*offset=*/99}}; -constexpr ECallHostReadSetupLayout kLayout__597 = - ECallHostReadSetupLayout{.fd = kLayout__587, - .ptr = kLayout__590, - .len = kLayout__598, - .newLen = kLayout__601, - .diff = kLayout__602, - ._0 = kLayout__604, - .ptrDecomp = kLayout__605, - .lenDecomp = kLayout__608, - .len123 = NondetRegLayout{._super = /*offset=*/100}, - .uneven = NondetRegLayout{._super = /*offset=*/101}}; -constexpr ECallHostWriteLayout kLayout__611 = ECallHostWriteLayout{.fd = kLayout__587, - .ptr = kLayout__590, - .len = kLayout__598, - .newLen = kLayout__601, - .diff = kLayout__602, - ._0 = kLayout__604}; -constexpr ECall0OutputArm4Layout kLayout__612 = ECall0OutputArm4Layout{ - ._extra0 = kLayout__416, - ._extra1 = kLayout__417, - ._extra2 = kLayout__421, - ._extra3 = kLayout__422, - ._extra4 = kLayout__426, - ._extra5 = kLayout__427, - ._extra6 = kLayout__431, - ._extra7 = kLayout__432, - ._extra8 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/59}, - .cycle = NondetRegLayout{._super = /*offset=*/60}}, - ._extra9 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/61}, - .cycle = NondetRegLayout{._super = /*offset=*/62}}, - ._extra10 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/63}, - .cycle = NondetRegLayout{._super = /*offset=*/64}}, - ._extra11 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/65}, - .cycle = NondetRegLayout{._super = /*offset=*/66}}, - ._extra12 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/67}, - .val = NondetRegLayout{._super = /*offset=*/68}}, - ._extra13 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/69}, - .val = NondetRegLayout{._super = /*offset=*/70}}}; -constexpr MemoryWriteUnconstrainedLayout kLayout__617 = - MemoryWriteUnconstrainedLayout{.io = kLayout__415, ._0 = kLayout__588}; -constexpr ECallHostReadWords__0_SuperLayout kLayout__616 = ECallHostReadWords__0_SuperLayout{ - .addr = NondetRegLayout{._super = /*offset=*/100}, ._0 = kLayout__617}; -constexpr MemoryWriteUnconstrainedLayout kLayout__619 = - MemoryWriteUnconstrainedLayout{.io = kLayout__420, ._0 = kLayout__591}; -constexpr ECallHostReadWords__0_SuperLayout kLayout__618 = ECallHostReadWords__0_SuperLayout{ - .addr = NondetRegLayout{._super = /*offset=*/101}, ._0 = kLayout__619}; -constexpr MemoryWriteUnconstrainedLayout kLayout__621 = - MemoryWriteUnconstrainedLayout{.io = kLayout__425, ._0 = kLayout__599}; -constexpr ECallHostReadWords__0_SuperLayout kLayout__620 = ECallHostReadWords__0_SuperLayout{ - .addr = NondetRegLayout{._super = /*offset=*/102}, ._0 = kLayout__621}; -constexpr MemoryWriteUnconstrainedLayout kLayout__623 = - MemoryWriteUnconstrainedLayout{.io = kLayout__430, ._0 = kLayout__301}; -constexpr ECallHostReadWords__0_SuperLayout kLayout__622 = ECallHostReadWords__0_SuperLayout{ - .addr = NondetRegLayout{._super = /*offset=*/103}, ._0 = kLayout__623}; -constexpr ECallHostReadWords__0_SuperLayout4LayoutArray kLayout__615 = - ECallHostReadWords__0_SuperLayout4LayoutArray{ - kLayout__616, kLayout__618, kLayout__620, kLayout__622}; -constexpr ECallHostReadWordsLayout kLayout__614 = ECallHostReadWordsLayout{ - .lenDecomp = kLayout__605, - .wordsDecomp = kLayout__608, - ._1 = kLayout__615, - .lenZero = IsZeroLayout{._super = NondetRegLayout{._super = /*offset=*/104}, - .inv = NondetRegLayout{._super = /*offset=*/105}}}; -constexpr ECall0OutputArm5Layout kLayout__613 = ECall0OutputArm5Layout{ - ._super = kLayout__614, - ._extra0 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/67}, - .val = NondetRegLayout{._super = /*offset=*/68}}, - ._extra1 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/69}, - .val = NondetRegLayout{._super = /*offset=*/70}}}; -constexpr ECall0OutputArm6Layout kLayout__624 = ECall0OutputArm6Layout{ - ._extra0 = kLayout__416, - ._extra1 = kLayout__417, - ._extra2 = kLayout__421, - ._extra3 = kLayout__422, - ._extra4 = kLayout__426, - ._extra5 = kLayout__427, - ._extra6 = kLayout__431, - ._extra7 = kLayout__432, - ._extra8 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/59}, - .cycle = NondetRegLayout{._super = /*offset=*/60}}, - ._extra9 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/61}, - .cycle = NondetRegLayout{._super = /*offset=*/62}}, - ._extra10 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/63}, - .cycle = NondetRegLayout{._super = /*offset=*/64}}, - ._extra11 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/65}, - .cycle = NondetRegLayout{._super = /*offset=*/66}}, - ._extra12 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/67}, - .val = NondetRegLayout{._super = /*offset=*/68}}, - ._extra13 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/69}, - .val = NondetRegLayout{._super = /*offset=*/70}}}; -constexpr ECall0OutputArm7Layout kLayout__625 = ECall0OutputArm7Layout{ - ._extra0 = kLayout__416, - ._extra1 = kLayout__417, - ._extra2 = kLayout__421, - ._extra3 = kLayout__422, - ._extra4 = kLayout__426, - ._extra5 = kLayout__427, - ._extra6 = kLayout__431, - ._extra7 = kLayout__432, - ._extra8 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/59}, - .cycle = NondetRegLayout{._super = /*offset=*/60}}, - ._extra9 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/61}, - .cycle = NondetRegLayout{._super = /*offset=*/62}}, - ._extra10 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/63}, - .cycle = NondetRegLayout{._super = /*offset=*/64}}, - ._extra11 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/65}, - .cycle = NondetRegLayout{._super = /*offset=*/66}}, - ._extra12 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/67}, - .val = NondetRegLayout{._super = /*offset=*/68}}, - ._extra13 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/69}, - .val = NondetRegLayout{._super = /*offset=*/70}}}; -constexpr ECall0OutputLayout kLayout__584 = ECall0OutputLayout{.arm0 = kLayout__585, - .arm1 = kLayout__595, - .arm2 = kLayout__597, - .arm3 = kLayout__611, - .arm4 = kLayout__612, - .arm5 = kLayout__613, - .arm6 = kLayout__624, - .arm7 = kLayout__625}; -constexpr NondetU16RegLayout kLayout__627 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/110}, - .val = NondetRegLayout{._super = /*offset=*/111}}}; -constexpr NormalizeU32Layout kLayout__626 = - NormalizeU32Layout{.low16 = kLayout__627, - .lowCarry = NondetRegLayout{._super = /*offset=*/112}, - .high16 = kLayout__505, - .highCarry = NondetRegLayout{._super = /*offset=*/115}}; -constexpr ECall0Layout kLayout__576 = - ECall0Layout{.s0 = NondetRegLayout{._super = /*offset=*/71}, - .s1 = NondetRegLayout{._super = /*offset=*/72}, - .s2 = NondetRegLayout{._super = /*offset=*/73}, - .pcAddr = kLayout__577, - ._arguments_ECall0Output = kLayout__580, - .output = kLayout__584, - .isDecode = IsZeroLayout{._super = NondetRegLayout{._super = /*offset=*/106}, - .inv = NondetRegLayout{._super = /*offset=*/107}}, - .isP2Entry = IsZeroLayout{._super = NondetRegLayout{._super = /*offset=*/108}, - .inv = NondetRegLayout{._super = /*offset=*/109}}, - .addPC = kLayout__626, - .arg = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/116}, - .cycle = NondetRegLayout{._super = /*offset=*/0}}}; -constexpr NondetRegLayout24LayoutArray kLayout__630 = NondetRegLayout24LayoutArray{ - NondetRegLayout{._super = /*offset=*/38}, NondetRegLayout{._super = /*offset=*/39}, - NondetRegLayout{._super = /*offset=*/40}, NondetRegLayout{._super = /*offset=*/41}, - NondetRegLayout{._super = /*offset=*/42}, NondetRegLayout{._super = /*offset=*/43}, - NondetRegLayout{._super = /*offset=*/44}, NondetRegLayout{._super = /*offset=*/45}, - NondetRegLayout{._super = /*offset=*/46}, NondetRegLayout{._super = /*offset=*/47}, - NondetRegLayout{._super = /*offset=*/48}, NondetRegLayout{._super = /*offset=*/49}, - NondetRegLayout{._super = /*offset=*/50}, NondetRegLayout{._super = /*offset=*/51}, - NondetRegLayout{._super = /*offset=*/52}, NondetRegLayout{._super = /*offset=*/53}, - NondetRegLayout{._super = /*offset=*/54}, NondetRegLayout{._super = /*offset=*/55}, - NondetRegLayout{._super = /*offset=*/56}, NondetRegLayout{._super = /*offset=*/57}, - NondetRegLayout{._super = /*offset=*/58}, NondetRegLayout{._super = /*offset=*/59}, - NondetRegLayout{._super = /*offset=*/60}, NondetRegLayout{._super = /*offset=*/61}}; -constexpr PoseidonStateLayout kLayout__629 = - PoseidonStateLayout{.hasState = NondetRegLayout{._super = /*offset=*/27}, - .stateAddr = NondetRegLayout{._super = /*offset=*/28}, - .bufOutAddr = NondetRegLayout{._super = /*offset=*/29}, - .isElem = NondetRegLayout{._super = /*offset=*/30}, - .checkOut = NondetRegLayout{._super = /*offset=*/31}, - .loadTxType = NondetRegLayout{._super = /*offset=*/32}, - .nextState = NondetRegLayout{._super = /*offset=*/33}, - .subState = NondetRegLayout{._super = /*offset=*/34}, - .bufInAddr = NondetRegLayout{._super = /*offset=*/35}, - .count = NondetRegLayout{._super = /*offset=*/36}, - .mode = NondetRegLayout{._super = /*offset=*/37}, - .inner = kLayout__630, - .zcheck = NondetExtRegLayout{._super = /*offset=*/62}}; -constexpr MemoryArgLayout kLayout__633 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/66}, - .addr = NondetRegLayout{._super = /*offset=*/67}, - .cycle = NondetRegLayout{._super = /*offset=*/68}, - .dataLow = NondetRegLayout{._super = /*offset=*/69}, - .dataHigh = NondetRegLayout{._super = /*offset=*/70}}; -constexpr MemoryArgLayout kLayout__634 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/71}, - .addr = NondetRegLayout{._super = /*offset=*/67}, - .cycle = NondetRegLayout{._super = /*offset=*/0}, - .dataLow = NondetRegLayout{._super = /*offset=*/72}, - .dataHigh = NondetRegLayout{._super = /*offset=*/73}}; -constexpr MemoryArgLayout kLayout__635 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/74}, - .addr = NondetRegLayout{._super = /*offset=*/75}, - .cycle = NondetRegLayout{._super = /*offset=*/76}, - .dataLow = NondetRegLayout{._super = /*offset=*/77}, - .dataHigh = NondetRegLayout{._super = /*offset=*/78}}; -constexpr MemoryArgLayout kLayout__636 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/79}, - .addr = NondetRegLayout{._super = /*offset=*/75}, - .cycle = NondetRegLayout{._super = /*offset=*/0}, - .dataLow = NondetRegLayout{._super = /*offset=*/80}, - .dataHigh = NondetRegLayout{._super = /*offset=*/81}}; -constexpr MemoryArgLayout kLayout__637 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/82}, - .addr = NondetRegLayout{._super = /*offset=*/83}, - .cycle = NondetRegLayout{._super = /*offset=*/84}, - .dataLow = NondetRegLayout{._super = /*offset=*/85}, - .dataHigh = NondetRegLayout{._super = /*offset=*/86}}; -constexpr MemoryArgLayout kLayout__638 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/87}, - .addr = NondetRegLayout{._super = /*offset=*/83}, - .cycle = NondetRegLayout{._super = /*offset=*/0}, - .dataLow = NondetRegLayout{._super = /*offset=*/88}, - .dataHigh = NondetRegLayout{._super = /*offset=*/89}}; -constexpr MemoryArgLayout kLayout__639 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/90}, - .addr = NondetRegLayout{._super = /*offset=*/91}, - .cycle = NondetRegLayout{._super = /*offset=*/92}, - .dataLow = NondetRegLayout{._super = /*offset=*/93}, - .dataHigh = NondetRegLayout{._super = /*offset=*/94}}; -constexpr MemoryArgLayout kLayout__640 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/95}, - .addr = NondetRegLayout{._super = /*offset=*/91}, - .cycle = NondetRegLayout{._super = /*offset=*/0}, - .dataLow = NondetRegLayout{._super = /*offset=*/96}, - .dataHigh = NondetRegLayout{._super = /*offset=*/97}}; -constexpr MemoryArgLayout kLayout__641 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/98}, - .addr = NondetRegLayout{._super = /*offset=*/99}, - .cycle = NondetRegLayout{._super = /*offset=*/100}, - .dataLow = NondetRegLayout{._super = /*offset=*/101}, - .dataHigh = NondetRegLayout{._super = /*offset=*/102}}; -constexpr MemoryArgLayout kLayout__642 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/103}, - .addr = NondetRegLayout{._super = /*offset=*/99}, - .cycle = NondetRegLayout{._super = /*offset=*/0}, - .dataLow = NondetRegLayout{._super = /*offset=*/104}, - .dataHigh = NondetRegLayout{._super = /*offset=*/105}}; -constexpr MemoryArgLayout kLayout__643 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/106}, - .addr = NondetRegLayout{._super = /*offset=*/107}, - .cycle = NondetRegLayout{._super = /*offset=*/108}, - .dataLow = NondetRegLayout{._super = /*offset=*/109}, - .dataHigh = NondetRegLayout{._super = /*offset=*/110}}; -constexpr MemoryArgLayout kLayout__644 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/111}, - .addr = NondetRegLayout{._super = /*offset=*/107}, - .cycle = NondetRegLayout{._super = /*offset=*/0}, - .dataLow = NondetRegLayout{._super = /*offset=*/112}, - .dataHigh = NondetRegLayout{._super = /*offset=*/113}}; -constexpr MemoryArgLayout kLayout__645 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/114}, - .addr = NondetRegLayout{._super = /*offset=*/115}, - .cycle = NondetRegLayout{._super = /*offset=*/116}, - .dataLow = NondetRegLayout{._super = /*offset=*/117}, - .dataHigh = NondetRegLayout{._super = /*offset=*/118}}; -constexpr MemoryArgLayout kLayout__646 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/119}, - .addr = NondetRegLayout{._super = /*offset=*/115}, - .cycle = NondetRegLayout{._super = /*offset=*/0}, - .dataLow = NondetRegLayout{._super = /*offset=*/120}, - .dataHigh = NondetRegLayout{._super = /*offset=*/121}}; -constexpr MemoryArgLayout kLayout__647 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/122}, - .addr = NondetRegLayout{._super = /*offset=*/123}, - .cycle = NondetRegLayout{._super = /*offset=*/124}, - .dataLow = NondetRegLayout{._super = /*offset=*/125}, - .dataHigh = NondetRegLayout{._super = /*offset=*/126}}; -constexpr MemoryArgLayout kLayout__648 = - MemoryArgLayout{.count = NondetRegLayout{._super = /*offset=*/127}, - .addr = NondetRegLayout{._super = /*offset=*/123}, - .cycle = NondetRegLayout{._super = /*offset=*/0}, - .dataLow = NondetRegLayout{._super = /*offset=*/128}, - .dataHigh = NondetRegLayout{._super = /*offset=*/129}}; -constexpr MemoryArgLayout16LayoutArray kLayout__632 = MemoryArgLayout16LayoutArray{kLayout__633, - kLayout__634, - kLayout__635, - kLayout__636, - kLayout__637, - kLayout__638, - kLayout__639, - kLayout__640, - kLayout__641, - kLayout__642, - kLayout__643, - kLayout__644, - kLayout__645, - kLayout__646, - kLayout__647, - kLayout__648}; -constexpr CycleArgLayout8LayoutArray kLayout__649 = - CycleArgLayout8LayoutArray{CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/130}, - .cycle = NondetRegLayout{._super = /*offset=*/131}}, - CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/132}, - .cycle = NondetRegLayout{._super = /*offset=*/133}}, - CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/134}, - .cycle = NondetRegLayout{._super = /*offset=*/135}}, - CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/136}, - .cycle = NondetRegLayout{._super = /*offset=*/137}}, - CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/138}, - .cycle = NondetRegLayout{._super = /*offset=*/139}}, - CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/140}, - .cycle = NondetRegLayout{._super = /*offset=*/141}}, - CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/142}, - .cycle = NondetRegLayout{._super = /*offset=*/143}}, - CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/144}, - .cycle = NondetRegLayout{._super = /*offset=*/145}}}; -constexpr ArgU16Layout16LayoutArray kLayout__650 = - ArgU16Layout16LayoutArray{ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/146}, - .val = NondetRegLayout{._super = /*offset=*/147}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/148}, - .val = NondetRegLayout{._super = /*offset=*/149}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/150}, - .val = NondetRegLayout{._super = /*offset=*/151}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/152}, - .val = NondetRegLayout{._super = /*offset=*/153}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/154}, - .val = NondetRegLayout{._super = /*offset=*/155}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/156}, - .val = NondetRegLayout{._super = /*offset=*/157}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/158}, - .val = NondetRegLayout{._super = /*offset=*/159}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/160}, - .val = NondetRegLayout{._super = /*offset=*/161}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/162}, - .val = NondetRegLayout{._super = /*offset=*/163}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/164}, - .val = NondetRegLayout{._super = /*offset=*/165}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/166}, - .val = NondetRegLayout{._super = /*offset=*/167}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/168}, - .val = NondetRegLayout{._super = /*offset=*/169}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/170}, - .val = NondetRegLayout{._super = /*offset=*/171}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/172}, - .val = NondetRegLayout{._super = /*offset=*/173}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/174}, - .val = NondetRegLayout{._super = /*offset=*/175}}, - ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/176}, - .val = NondetRegLayout{._super = /*offset=*/177}}}; -constexpr ArgU8Layout2LayoutArray kLayout__651 = - ArgU8Layout2LayoutArray{ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/178}, - .val = NondetRegLayout{._super = /*offset=*/179}}, - ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/180}, - .val = NondetRegLayout{._super = /*offset=*/181}}}; -constexpr _Arguments_Poseidon0StateLayout kLayout__631 = - _Arguments_Poseidon0StateLayout{.memoryArg = kLayout__632, - .cycleArg = kLayout__649, - .argU16 = kLayout__650, - .argU8 = kLayout__651}; -constexpr PoseidonEntry_SuperArm0Layout kLayout__656 = PoseidonEntry_SuperArm0Layout{ - ._super = kLayout__629, - ._extra0 = kLayout__633, - ._extra1 = kLayout__634, - ._extra2 = kLayout__635, - ._extra3 = kLayout__636, - ._extra4 = kLayout__637, - ._extra5 = kLayout__638, - ._extra6 = kLayout__639, - ._extra7 = kLayout__640, - ._extra8 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/130}, - .cycle = NondetRegLayout{._super = /*offset=*/131}}, - ._extra9 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/132}, - .cycle = NondetRegLayout{._super = /*offset=*/133}}, - ._extra10 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/134}, - .cycle = NondetRegLayout{._super = /*offset=*/135}}, - ._extra11 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/136}, - .cycle = NondetRegLayout{._super = /*offset=*/137}}}; -constexpr MemoryIOLayout kLayout__660 = - MemoryIOLayout{.oldTxn = kLayout__633, .newTxn = kLayout__634}; -constexpr IsCycleLayout kLayout__662 = - IsCycleLayout{.arg = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/130}, - .cycle = NondetRegLayout{._super = /*offset=*/131}}}; -constexpr IsForwardLayout kLayout__661 = IsForwardLayout{._0 = kLayout__662}; -constexpr MemoryReadLayout kLayout__659 = MemoryReadLayout{.io = kLayout__660, ._0 = kLayout__661}; -constexpr ReadAddrLayout kLayout__658 = ReadAddrLayout{.addr32 = kLayout__659}; -constexpr MemoryIOLayout kLayout__665 = - MemoryIOLayout{.oldTxn = kLayout__635, .newTxn = kLayout__636}; -constexpr IsCycleLayout kLayout__667 = - IsCycleLayout{.arg = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/132}, - .cycle = NondetRegLayout{._super = /*offset=*/133}}}; -constexpr IsForwardLayout kLayout__666 = IsForwardLayout{._0 = kLayout__667}; -constexpr MemoryReadLayout kLayout__664 = MemoryReadLayout{.io = kLayout__665, ._0 = kLayout__666}; -constexpr ReadAddrLayout kLayout__663 = ReadAddrLayout{.addr32 = kLayout__664}; -constexpr MemoryIOLayout kLayout__670 = - MemoryIOLayout{.oldTxn = kLayout__637, .newTxn = kLayout__638}; -constexpr IsCycleLayout kLayout__672 = - IsCycleLayout{.arg = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/134}, - .cycle = NondetRegLayout{._super = /*offset=*/135}}}; -constexpr IsForwardLayout kLayout__671 = IsForwardLayout{._0 = kLayout__672}; -constexpr MemoryReadLayout kLayout__669 = MemoryReadLayout{.io = kLayout__670, ._0 = kLayout__671}; -constexpr ReadAddrLayout kLayout__668 = ReadAddrLayout{.addr32 = kLayout__669}; -constexpr MemoryIOLayout kLayout__674 = - MemoryIOLayout{.oldTxn = kLayout__639, .newTxn = kLayout__640}; -constexpr IsCycleLayout kLayout__676 = - IsCycleLayout{.arg = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/136}, - .cycle = NondetRegLayout{._super = /*offset=*/137}}}; -constexpr IsForwardLayout kLayout__675 = IsForwardLayout{._0 = kLayout__676}; -constexpr MemoryReadLayout kLayout__673 = MemoryReadLayout{.io = kLayout__674, ._0 = kLayout__675}; -constexpr PoseidonEcallLayout kLayout__657 = PoseidonEcallLayout{ - ._super = kLayout__629, - .stateAddr = kLayout__658, - .bufInAddr = kLayout__663, - .bufOutAddr = kLayout__668, - .bitsAndCount = kLayout__673, - ._0 = IsZeroLayout{._super = NondetRegLayout{._super = /*offset=*/182}, - .inv = NondetRegLayout{._super = /*offset=*/183}}, - .isElem = NondetRegLayout{._super = /*offset=*/184}, - .checkOut = NondetRegLayout{._super = /*offset=*/185}, - .countZero = IsZeroLayout{._super = NondetRegLayout{._super = /*offset=*/186}, - .inv = NondetRegLayout{._super = /*offset=*/187}}}; -constexpr PoseidonEntry_SuperLayout kLayout__655 = - PoseidonEntry_SuperLayout{._super = kLayout__629, .arm0 = kLayout__656, .arm1 = kLayout__657}; -constexpr MemoryArgLayout8LayoutArray kLayout__678 = MemoryArgLayout8LayoutArray{kLayout__633, - kLayout__634, - kLayout__635, - kLayout__636, - kLayout__637, - kLayout__638, - kLayout__639, - kLayout__640}; -constexpr CycleArgLayout4LayoutArray kLayout__679 = - CycleArgLayout4LayoutArray{CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/130}, - .cycle = NondetRegLayout{._super = /*offset=*/131}}, - CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/132}, - .cycle = NondetRegLayout{._super = /*offset=*/133}}, - CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/134}, - .cycle = NondetRegLayout{._super = /*offset=*/135}}, - CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/136}, - .cycle = NondetRegLayout{._super = /*offset=*/137}}}; -constexpr _Arguments_PoseidonEntry_SuperLayout kLayout__677 = - _Arguments_PoseidonEntry_SuperLayout{.memoryArg = kLayout__678, .cycleArg = kLayout__679}; -constexpr PoseidonEntryLayout kLayout__654 = - PoseidonEntryLayout{._super = kLayout__655, - .pcZero = IsZeroLayout{._super = NondetRegLayout{._super = /*offset=*/188}, - .inv = NondetRegLayout{._super = /*offset=*/189}}, - ._arguments_PoseidonEntry_Super = kLayout__677}; -constexpr Poseidon0StateArm0Layout kLayout__653 = Poseidon0StateArm0Layout{ - ._super = kLayout__654, - ._extra0 = kLayout__641, - ._extra1 = kLayout__642, - ._extra2 = kLayout__643, - ._extra3 = kLayout__644, - ._extra4 = kLayout__645, - ._extra5 = kLayout__646, - ._extra6 = kLayout__647, - ._extra7 = kLayout__648, - ._extra8 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/138}, - .cycle = NondetRegLayout{._super = /*offset=*/139}}, - ._extra9 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/140}, - .cycle = NondetRegLayout{._super = /*offset=*/141}}, - ._extra10 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/142}, - .cycle = NondetRegLayout{._super = /*offset=*/143}}, - ._extra11 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/144}, - .cycle = NondetRegLayout{._super = /*offset=*/145}}, - ._extra12 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/146}, - .val = NondetRegLayout{._super = /*offset=*/147}}, - ._extra13 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/148}, - .val = NondetRegLayout{._super = /*offset=*/149}}, - ._extra14 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/150}, - .val = NondetRegLayout{._super = /*offset=*/151}}, - ._extra15 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/152}, - .val = NondetRegLayout{._super = /*offset=*/153}}, - ._extra16 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/154}, - .val = NondetRegLayout{._super = /*offset=*/155}}, - ._extra17 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/156}, - .val = NondetRegLayout{._super = /*offset=*/157}}, - ._extra18 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/158}, - .val = NondetRegLayout{._super = /*offset=*/159}}, - ._extra19 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/160}, - .val = NondetRegLayout{._super = /*offset=*/161}}, - ._extra20 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/162}, - .val = NondetRegLayout{._super = /*offset=*/163}}, - ._extra21 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/164}, - .val = NondetRegLayout{._super = /*offset=*/165}}, - ._extra22 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/166}, - .val = NondetRegLayout{._super = /*offset=*/167}}, - ._extra23 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/168}, - .val = NondetRegLayout{._super = /*offset=*/169}}, - ._extra24 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/170}, - .val = NondetRegLayout{._super = /*offset=*/171}}, - ._extra25 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/172}, - .val = NondetRegLayout{._super = /*offset=*/173}}, - ._extra26 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/174}, - .val = NondetRegLayout{._super = /*offset=*/175}}, - ._extra27 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/176}, - .val = NondetRegLayout{._super = /*offset=*/177}}, - ._extra28 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/178}, - .val = NondetRegLayout{._super = /*offset=*/179}}, - ._extra29 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/180}, - .val = NondetRegLayout{._super = /*offset=*/181}}}; -constexpr ReadElemLayout kLayout__683 = ReadElemLayout{.elem32 = kLayout__659}; -constexpr ReadElemLayout kLayout__684 = ReadElemLayout{.elem32 = kLayout__664}; -constexpr ReadElemLayout kLayout__685 = ReadElemLayout{.elem32 = kLayout__669}; -constexpr ReadElemLayout kLayout__686 = ReadElemLayout{.elem32 = kLayout__673}; -constexpr MemoryIOLayout kLayout__689 = - MemoryIOLayout{.oldTxn = kLayout__641, .newTxn = kLayout__642}; -constexpr IsCycleLayout kLayout__691 = - IsCycleLayout{.arg = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/138}, - .cycle = NondetRegLayout{._super = /*offset=*/139}}}; -constexpr IsForwardLayout kLayout__690 = IsForwardLayout{._0 = kLayout__691}; -constexpr MemoryReadLayout kLayout__688 = MemoryReadLayout{.io = kLayout__689, ._0 = kLayout__690}; -constexpr ReadElemLayout kLayout__687 = ReadElemLayout{.elem32 = kLayout__688}; -constexpr MemoryIOLayout kLayout__694 = - MemoryIOLayout{.oldTxn = kLayout__643, .newTxn = kLayout__644}; -constexpr IsCycleLayout kLayout__696 = - IsCycleLayout{.arg = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/140}, - .cycle = NondetRegLayout{._super = /*offset=*/141}}}; -constexpr IsForwardLayout kLayout__695 = IsForwardLayout{._0 = kLayout__696}; -constexpr MemoryReadLayout kLayout__693 = MemoryReadLayout{.io = kLayout__694, ._0 = kLayout__695}; -constexpr ReadElemLayout kLayout__692 = ReadElemLayout{.elem32 = kLayout__693}; -constexpr MemoryIOLayout kLayout__699 = - MemoryIOLayout{.oldTxn = kLayout__645, .newTxn = kLayout__646}; -constexpr IsCycleLayout kLayout__701 = - IsCycleLayout{.arg = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/142}, - .cycle = NondetRegLayout{._super = /*offset=*/143}}}; -constexpr IsForwardLayout kLayout__700 = IsForwardLayout{._0 = kLayout__701}; -constexpr MemoryReadLayout kLayout__698 = MemoryReadLayout{.io = kLayout__699, ._0 = kLayout__700}; -constexpr ReadElemLayout kLayout__697 = ReadElemLayout{.elem32 = kLayout__698}; -constexpr MemoryIOLayout kLayout__704 = - MemoryIOLayout{.oldTxn = kLayout__647, .newTxn = kLayout__648}; -constexpr IsCycleLayout kLayout__706 = - IsCycleLayout{.arg = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/144}, - .cycle = NondetRegLayout{._super = /*offset=*/145}}}; -constexpr IsForwardLayout kLayout__705 = IsForwardLayout{._0 = kLayout__706}; -constexpr MemoryReadLayout kLayout__703 = MemoryReadLayout{.io = kLayout__704, ._0 = kLayout__705}; -constexpr ReadElemLayout kLayout__702 = ReadElemLayout{.elem32 = kLayout__703}; -constexpr ReadElemLayout8LayoutArray kLayout__682 = ReadElemLayout8LayoutArray{kLayout__683, - kLayout__684, - kLayout__685, - kLayout__686, - kLayout__687, - kLayout__692, - kLayout__697, - kLayout__702}; -constexpr PoseidonLoadStateLayout kLayout__681 = - PoseidonLoadStateLayout{._super = kLayout__629, .loadList = kLayout__682}; -constexpr Poseidon0StateArm1Layout kLayout__680 = Poseidon0StateArm1Layout{ - ._super = kLayout__681, - ._extra0 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/146}, - .val = NondetRegLayout{._super = /*offset=*/147}}, - ._extra1 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/148}, - .val = NondetRegLayout{._super = /*offset=*/149}}, - ._extra2 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/150}, - .val = NondetRegLayout{._super = /*offset=*/151}}, - ._extra3 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/152}, - .val = NondetRegLayout{._super = /*offset=*/153}}, - ._extra4 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/154}, - .val = NondetRegLayout{._super = /*offset=*/155}}, - ._extra5 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/156}, - .val = NondetRegLayout{._super = /*offset=*/157}}, - ._extra6 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/158}, - .val = NondetRegLayout{._super = /*offset=*/159}}, - ._extra7 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/160}, - .val = NondetRegLayout{._super = /*offset=*/161}}, - ._extra8 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/162}, - .val = NondetRegLayout{._super = /*offset=*/163}}, - ._extra9 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/164}, - .val = NondetRegLayout{._super = /*offset=*/165}}, - ._extra10 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/166}, - .val = NondetRegLayout{._super = /*offset=*/167}}, - ._extra11 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/168}, - .val = NondetRegLayout{._super = /*offset=*/169}}, - ._extra12 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/170}, - .val = NondetRegLayout{._super = /*offset=*/171}}, - ._extra13 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/172}, - .val = NondetRegLayout{._super = /*offset=*/173}}, - ._extra14 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/174}, - .val = NondetRegLayout{._super = /*offset=*/175}}, - ._extra15 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/176}, - .val = NondetRegLayout{._super = /*offset=*/177}}, - ._extra16 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/178}, - .val = NondetRegLayout{._super = /*offset=*/179}}, - ._extra17 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/180}, - .val = NondetRegLayout{._super = /*offset=*/181}}}; -constexpr OneHot_3_Layout kLayout__711 = OneHot_3_Layout{ - ._super = NondetRegLayout3LayoutArray{NondetRegLayout{._super = /*offset=*/182}, - NondetRegLayout{._super = /*offset=*/183}, - NondetRegLayout{._super = /*offset=*/184}}}; -constexpr MemoryPageInLayout kLayout__716 = MemoryPageInLayout{.io = kLayout__660}; -constexpr MemoryGet_SuperArm1Layout kLayout__715 = MemoryGet_SuperArm1Layout{ - ._super = kLayout__716, - ._extra0 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/130}, - .cycle = NondetRegLayout{._super = /*offset=*/131}}}; -constexpr MemoryPageOutLayout kLayout__717 = - MemoryPageOutLayout{.io = kLayout__660, ._0 = kLayout__661}; -constexpr MemoryGet_SuperLayout kLayout__714 = - MemoryGet_SuperLayout{.arm0 = kLayout__659, .arm1 = kLayout__715, .arm2 = kLayout__717}; -constexpr MemoryArgLayout2LayoutArray kLayout__719 = - MemoryArgLayout2LayoutArray{kLayout__633, kLayout__634}; -constexpr _Arguments_MemoryGet_SuperLayout kLayout__718 = - _Arguments_MemoryGet_SuperLayout{.memoryArg = kLayout__719, - .cycleArg = CycleArgLayout1LayoutArray{CycleArgLayout{ - .count = NondetRegLayout{._super = /*offset=*/130}, - .cycle = NondetRegLayout{._super = /*offset=*/131}}}}; -constexpr MemoryGetLayout kLayout__713 = - MemoryGetLayout{._super = kLayout__714, ._arguments_MemoryGet_Super = kLayout__718}; -constexpr MemoryPageInLayout kLayout__723 = MemoryPageInLayout{.io = kLayout__665}; -constexpr MemoryGet_SuperArm1Layout kLayout__722 = MemoryGet_SuperArm1Layout{ - ._super = kLayout__723, - ._extra0 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/132}, - .cycle = NondetRegLayout{._super = /*offset=*/133}}}; -constexpr MemoryPageOutLayout kLayout__724 = - MemoryPageOutLayout{.io = kLayout__665, ._0 = kLayout__666}; -constexpr MemoryGet_SuperLayout kLayout__721 = - MemoryGet_SuperLayout{.arm0 = kLayout__664, .arm1 = kLayout__722, .arm2 = kLayout__724}; -constexpr MemoryArgLayout2LayoutArray kLayout__726 = - MemoryArgLayout2LayoutArray{kLayout__635, kLayout__636}; -constexpr _Arguments_MemoryGet_SuperLayout kLayout__725 = - _Arguments_MemoryGet_SuperLayout{.memoryArg = kLayout__726, - .cycleArg = CycleArgLayout1LayoutArray{CycleArgLayout{ - .count = NondetRegLayout{._super = /*offset=*/132}, - .cycle = NondetRegLayout{._super = /*offset=*/133}}}}; -constexpr MemoryGetLayout kLayout__720 = - MemoryGetLayout{._super = kLayout__721, ._arguments_MemoryGet_Super = kLayout__725}; -constexpr MemoryPageInLayout kLayout__730 = MemoryPageInLayout{.io = kLayout__670}; -constexpr MemoryGet_SuperArm1Layout kLayout__729 = MemoryGet_SuperArm1Layout{ - ._super = kLayout__730, - ._extra0 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/134}, - .cycle = NondetRegLayout{._super = /*offset=*/135}}}; -constexpr MemoryPageOutLayout kLayout__731 = - MemoryPageOutLayout{.io = kLayout__670, ._0 = kLayout__671}; -constexpr MemoryGet_SuperLayout kLayout__728 = - MemoryGet_SuperLayout{.arm0 = kLayout__669, .arm1 = kLayout__729, .arm2 = kLayout__731}; -constexpr MemoryArgLayout2LayoutArray kLayout__733 = - MemoryArgLayout2LayoutArray{kLayout__637, kLayout__638}; -constexpr _Arguments_MemoryGet_SuperLayout kLayout__732 = - _Arguments_MemoryGet_SuperLayout{.memoryArg = kLayout__733, - .cycleArg = CycleArgLayout1LayoutArray{CycleArgLayout{ - .count = NondetRegLayout{._super = /*offset=*/134}, - .cycle = NondetRegLayout{._super = /*offset=*/135}}}}; -constexpr MemoryGetLayout kLayout__727 = - MemoryGetLayout{._super = kLayout__728, ._arguments_MemoryGet_Super = kLayout__732}; -constexpr MemoryPageInLayout kLayout__737 = MemoryPageInLayout{.io = kLayout__674}; -constexpr MemoryGet_SuperArm1Layout kLayout__736 = MemoryGet_SuperArm1Layout{ - ._super = kLayout__737, - ._extra0 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/136}, - .cycle = NondetRegLayout{._super = /*offset=*/137}}}; -constexpr MemoryPageOutLayout kLayout__738 = - MemoryPageOutLayout{.io = kLayout__674, ._0 = kLayout__675}; -constexpr MemoryGet_SuperLayout kLayout__735 = - MemoryGet_SuperLayout{.arm0 = kLayout__673, .arm1 = kLayout__736, .arm2 = kLayout__738}; -constexpr MemoryArgLayout2LayoutArray kLayout__740 = - MemoryArgLayout2LayoutArray{kLayout__639, kLayout__640}; -constexpr _Arguments_MemoryGet_SuperLayout kLayout__739 = - _Arguments_MemoryGet_SuperLayout{.memoryArg = kLayout__740, - .cycleArg = CycleArgLayout1LayoutArray{CycleArgLayout{ - .count = NondetRegLayout{._super = /*offset=*/136}, - .cycle = NondetRegLayout{._super = /*offset=*/137}}}}; -constexpr MemoryGetLayout kLayout__734 = - MemoryGetLayout{._super = kLayout__735, ._arguments_MemoryGet_Super = kLayout__739}; -constexpr MemoryPageInLayout kLayout__744 = MemoryPageInLayout{.io = kLayout__689}; -constexpr MemoryGet_SuperArm1Layout kLayout__743 = MemoryGet_SuperArm1Layout{ - ._super = kLayout__744, - ._extra0 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/138}, - .cycle = NondetRegLayout{._super = /*offset=*/139}}}; -constexpr MemoryPageOutLayout kLayout__745 = - MemoryPageOutLayout{.io = kLayout__689, ._0 = kLayout__690}; -constexpr MemoryGet_SuperLayout kLayout__742 = - MemoryGet_SuperLayout{.arm0 = kLayout__688, .arm1 = kLayout__743, .arm2 = kLayout__745}; -constexpr MemoryArgLayout2LayoutArray kLayout__747 = - MemoryArgLayout2LayoutArray{kLayout__641, kLayout__642}; -constexpr _Arguments_MemoryGet_SuperLayout kLayout__746 = - _Arguments_MemoryGet_SuperLayout{.memoryArg = kLayout__747, - .cycleArg = CycleArgLayout1LayoutArray{CycleArgLayout{ - .count = NondetRegLayout{._super = /*offset=*/138}, - .cycle = NondetRegLayout{._super = /*offset=*/139}}}}; -constexpr MemoryGetLayout kLayout__741 = - MemoryGetLayout{._super = kLayout__742, ._arguments_MemoryGet_Super = kLayout__746}; -constexpr MemoryPageInLayout kLayout__751 = MemoryPageInLayout{.io = kLayout__694}; -constexpr MemoryGet_SuperArm1Layout kLayout__750 = MemoryGet_SuperArm1Layout{ - ._super = kLayout__751, - ._extra0 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/140}, - .cycle = NondetRegLayout{._super = /*offset=*/141}}}; -constexpr MemoryPageOutLayout kLayout__752 = - MemoryPageOutLayout{.io = kLayout__694, ._0 = kLayout__695}; -constexpr MemoryGet_SuperLayout kLayout__749 = - MemoryGet_SuperLayout{.arm0 = kLayout__693, .arm1 = kLayout__750, .arm2 = kLayout__752}; -constexpr MemoryArgLayout2LayoutArray kLayout__754 = - MemoryArgLayout2LayoutArray{kLayout__643, kLayout__644}; -constexpr _Arguments_MemoryGet_SuperLayout kLayout__753 = - _Arguments_MemoryGet_SuperLayout{.memoryArg = kLayout__754, - .cycleArg = CycleArgLayout1LayoutArray{CycleArgLayout{ - .count = NondetRegLayout{._super = /*offset=*/140}, - .cycle = NondetRegLayout{._super = /*offset=*/141}}}}; -constexpr MemoryGetLayout kLayout__748 = - MemoryGetLayout{._super = kLayout__749, ._arguments_MemoryGet_Super = kLayout__753}; -constexpr MemoryPageInLayout kLayout__758 = MemoryPageInLayout{.io = kLayout__699}; -constexpr MemoryGet_SuperArm1Layout kLayout__757 = MemoryGet_SuperArm1Layout{ - ._super = kLayout__758, - ._extra0 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/142}, - .cycle = NondetRegLayout{._super = /*offset=*/143}}}; -constexpr MemoryPageOutLayout kLayout__759 = - MemoryPageOutLayout{.io = kLayout__699, ._0 = kLayout__700}; -constexpr MemoryGet_SuperLayout kLayout__756 = - MemoryGet_SuperLayout{.arm0 = kLayout__698, .arm1 = kLayout__757, .arm2 = kLayout__759}; -constexpr MemoryArgLayout2LayoutArray kLayout__761 = - MemoryArgLayout2LayoutArray{kLayout__645, kLayout__646}; -constexpr _Arguments_MemoryGet_SuperLayout kLayout__760 = - _Arguments_MemoryGet_SuperLayout{.memoryArg = kLayout__761, - .cycleArg = CycleArgLayout1LayoutArray{CycleArgLayout{ - .count = NondetRegLayout{._super = /*offset=*/142}, - .cycle = NondetRegLayout{._super = /*offset=*/143}}}}; -constexpr MemoryGetLayout kLayout__755 = - MemoryGetLayout{._super = kLayout__756, ._arguments_MemoryGet_Super = kLayout__760}; -constexpr MemoryPageInLayout kLayout__765 = MemoryPageInLayout{.io = kLayout__704}; -constexpr MemoryGet_SuperArm1Layout kLayout__764 = MemoryGet_SuperArm1Layout{ - ._super = kLayout__765, - ._extra0 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/144}, - .cycle = NondetRegLayout{._super = /*offset=*/145}}}; -constexpr MemoryPageOutLayout kLayout__766 = - MemoryPageOutLayout{.io = kLayout__704, ._0 = kLayout__705}; -constexpr MemoryGet_SuperLayout kLayout__763 = - MemoryGet_SuperLayout{.arm0 = kLayout__703, .arm1 = kLayout__764, .arm2 = kLayout__766}; -constexpr MemoryArgLayout2LayoutArray kLayout__768 = - MemoryArgLayout2LayoutArray{kLayout__647, kLayout__648}; -constexpr _Arguments_MemoryGet_SuperLayout kLayout__767 = - _Arguments_MemoryGet_SuperLayout{.memoryArg = kLayout__768, - .cycleArg = CycleArgLayout1LayoutArray{CycleArgLayout{ - .count = NondetRegLayout{._super = /*offset=*/144}, - .cycle = NondetRegLayout{._super = /*offset=*/145}}}}; -constexpr MemoryGetLayout kLayout__762 = - MemoryGetLayout{._super = kLayout__763, ._arguments_MemoryGet_Super = kLayout__767}; -constexpr MemoryGetLayout8LayoutArray kLayout__712 = MemoryGetLayout8LayoutArray{kLayout__713, - kLayout__720, - kLayout__727, - kLayout__734, - kLayout__741, - kLayout__748, - kLayout__755, - kLayout__762}; -constexpr PoseidonLoadInShortLayout kLayout__710 = PoseidonLoadInShortLayout{ - ._super = kLayout__629, .txType = kLayout__711, .loadList = kLayout__712}; -constexpr PoseidonLoadInLowLayout kLayout__769 = PoseidonLoadInLowLayout{ - ._super = kLayout__629, .txType = kLayout__711, .loadList = kLayout__712}; -constexpr PoseidonLoadInHighLayout kLayout__770 = PoseidonLoadInHighLayout{ - ._super = kLayout__629, .txType = kLayout__711, .loadList = kLayout__712}; -constexpr PoseidonLoadIn_SuperLayout kLayout__709 = PoseidonLoadIn_SuperLayout{ - ._super = kLayout__629, .arm0 = kLayout__710, .arm1 = kLayout__769, .arm2 = kLayout__770}; -constexpr OneHot_3_Layout kLayout__771 = OneHot_3_Layout{ - ._super = NondetRegLayout3LayoutArray{NondetRegLayout{._super = /*offset=*/185}, - NondetRegLayout{._super = /*offset=*/186}, - NondetRegLayout{._super = /*offset=*/187}}}; -constexpr _Arguments_PoseidonLoadIn_SuperLayout kLayout__772 = - _Arguments_PoseidonLoadIn_SuperLayout{.memoryArg = kLayout__632, .cycleArg = kLayout__649}; -constexpr PoseidonLoadInLayout kLayout__708 = PoseidonLoadInLayout{ - ._super = kLayout__709, ._0 = kLayout__771, ._arguments_PoseidonLoadIn_Super = kLayout__772}; -constexpr Poseidon0StateArm2Layout kLayout__707 = Poseidon0StateArm2Layout{ - ._super = kLayout__708, - ._extra0 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/146}, - .val = NondetRegLayout{._super = /*offset=*/147}}, - ._extra1 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/148}, - .val = NondetRegLayout{._super = /*offset=*/149}}, - ._extra2 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/150}, - .val = NondetRegLayout{._super = /*offset=*/151}}, - ._extra3 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/152}, - .val = NondetRegLayout{._super = /*offset=*/153}}, - ._extra4 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/154}, - .val = NondetRegLayout{._super = /*offset=*/155}}, - ._extra5 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/156}, - .val = NondetRegLayout{._super = /*offset=*/157}}, - ._extra6 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/158}, - .val = NondetRegLayout{._super = /*offset=*/159}}, - ._extra7 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/160}, - .val = NondetRegLayout{._super = /*offset=*/161}}, - ._extra8 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/162}, - .val = NondetRegLayout{._super = /*offset=*/163}}, - ._extra9 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/164}, - .val = NondetRegLayout{._super = /*offset=*/165}}, - ._extra10 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/166}, - .val = NondetRegLayout{._super = /*offset=*/167}}, - ._extra11 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/168}, - .val = NondetRegLayout{._super = /*offset=*/169}}, - ._extra12 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/170}, - .val = NondetRegLayout{._super = /*offset=*/171}}, - ._extra13 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/172}, - .val = NondetRegLayout{._super = /*offset=*/173}}, - ._extra14 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/174}, - .val = NondetRegLayout{._super = /*offset=*/175}}, - ._extra15 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/176}, - .val = NondetRegLayout{._super = /*offset=*/177}}, - ._extra16 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/178}, - .val = NondetRegLayout{._super = /*offset=*/179}}, - ._extra17 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/180}, - .val = NondetRegLayout{._super = /*offset=*/181}}}; -constexpr Poseidon0StateArm3Layout kLayout__773 = Poseidon0StateArm3Layout{ - ._super = kLayout__629, - ._extra0 = kLayout__633, - ._extra1 = kLayout__634, - ._extra2 = kLayout__635, - ._extra3 = kLayout__636, - ._extra4 = kLayout__637, - ._extra5 = kLayout__638, - ._extra6 = kLayout__639, - ._extra7 = kLayout__640, - ._extra8 = kLayout__641, - ._extra9 = kLayout__642, - ._extra10 = kLayout__643, - ._extra11 = kLayout__644, - ._extra12 = kLayout__645, - ._extra13 = kLayout__646, - ._extra14 = kLayout__647, - ._extra15 = kLayout__648, - ._extra16 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/130}, - .cycle = NondetRegLayout{._super = /*offset=*/131}}, - ._extra17 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/132}, - .cycle = NondetRegLayout{._super = /*offset=*/133}}, - ._extra18 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/134}, - .cycle = NondetRegLayout{._super = /*offset=*/135}}, - ._extra19 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/136}, - .cycle = NondetRegLayout{._super = /*offset=*/137}}, - ._extra20 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/138}, - .cycle = NondetRegLayout{._super = /*offset=*/139}}, - ._extra21 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/140}, - .cycle = NondetRegLayout{._super = /*offset=*/141}}, - ._extra22 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/142}, - .cycle = NondetRegLayout{._super = /*offset=*/143}}, - ._extra23 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/144}, - .cycle = NondetRegLayout{._super = /*offset=*/145}}, - ._extra24 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/146}, - .val = NondetRegLayout{._super = /*offset=*/147}}, - ._extra25 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/148}, - .val = NondetRegLayout{._super = /*offset=*/149}}, - ._extra26 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/150}, - .val = NondetRegLayout{._super = /*offset=*/151}}, - ._extra27 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/152}, - .val = NondetRegLayout{._super = /*offset=*/153}}, - ._extra28 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/154}, - .val = NondetRegLayout{._super = /*offset=*/155}}, - ._extra29 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/156}, - .val = NondetRegLayout{._super = /*offset=*/157}}, - ._extra30 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/158}, - .val = NondetRegLayout{._super = /*offset=*/159}}, - ._extra31 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/160}, - .val = NondetRegLayout{._super = /*offset=*/161}}, - ._extra32 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/162}, - .val = NondetRegLayout{._super = /*offset=*/163}}, - ._extra33 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/164}, - .val = NondetRegLayout{._super = /*offset=*/165}}, - ._extra34 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/166}, - .val = NondetRegLayout{._super = /*offset=*/167}}, - ._extra35 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/168}, - .val = NondetRegLayout{._super = /*offset=*/169}}, - ._extra36 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/170}, - .val = NondetRegLayout{._super = /*offset=*/171}}, - ._extra37 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/172}, - .val = NondetRegLayout{._super = /*offset=*/173}}, - ._extra38 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/174}, - .val = NondetRegLayout{._super = /*offset=*/175}}, - ._extra39 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/176}, - .val = NondetRegLayout{._super = /*offset=*/177}}, - ._extra40 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/178}, - .val = NondetRegLayout{._super = /*offset=*/179}}, - ._extra41 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/180}, - .val = NondetRegLayout{._super = /*offset=*/181}}}; -constexpr Poseidon0StateArm4Layout kLayout__774 = Poseidon0StateArm4Layout{ - ._super = kLayout__629, - ._extra0 = kLayout__633, - ._extra1 = kLayout__634, - ._extra2 = kLayout__635, - ._extra3 = kLayout__636, - ._extra4 = kLayout__637, - ._extra5 = kLayout__638, - ._extra6 = kLayout__639, - ._extra7 = kLayout__640, - ._extra8 = kLayout__641, - ._extra9 = kLayout__642, - ._extra10 = kLayout__643, - ._extra11 = kLayout__644, - ._extra12 = kLayout__645, - ._extra13 = kLayout__646, - ._extra14 = kLayout__647, - ._extra15 = kLayout__648, - ._extra16 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/130}, - .cycle = NondetRegLayout{._super = /*offset=*/131}}, - ._extra17 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/132}, - .cycle = NondetRegLayout{._super = /*offset=*/133}}, - ._extra18 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/134}, - .cycle = NondetRegLayout{._super = /*offset=*/135}}, - ._extra19 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/136}, - .cycle = NondetRegLayout{._super = /*offset=*/137}}, - ._extra20 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/138}, - .cycle = NondetRegLayout{._super = /*offset=*/139}}, - ._extra21 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/140}, - .cycle = NondetRegLayout{._super = /*offset=*/141}}, - ._extra22 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/142}, - .cycle = NondetRegLayout{._super = /*offset=*/143}}, - ._extra23 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/144}, - .cycle = NondetRegLayout{._super = /*offset=*/145}}, - ._extra24 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/146}, - .val = NondetRegLayout{._super = /*offset=*/147}}, - ._extra25 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/148}, - .val = NondetRegLayout{._super = /*offset=*/149}}, - ._extra26 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/150}, - .val = NondetRegLayout{._super = /*offset=*/151}}, - ._extra27 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/152}, - .val = NondetRegLayout{._super = /*offset=*/153}}, - ._extra28 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/154}, - .val = NondetRegLayout{._super = /*offset=*/155}}, - ._extra29 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/156}, - .val = NondetRegLayout{._super = /*offset=*/157}}, - ._extra30 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/158}, - .val = NondetRegLayout{._super = /*offset=*/159}}, - ._extra31 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/160}, - .val = NondetRegLayout{._super = /*offset=*/161}}, - ._extra32 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/162}, - .val = NondetRegLayout{._super = /*offset=*/163}}, - ._extra33 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/164}, - .val = NondetRegLayout{._super = /*offset=*/165}}, - ._extra34 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/166}, - .val = NondetRegLayout{._super = /*offset=*/167}}, - ._extra35 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/168}, - .val = NondetRegLayout{._super = /*offset=*/169}}, - ._extra36 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/170}, - .val = NondetRegLayout{._super = /*offset=*/171}}, - ._extra37 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/172}, - .val = NondetRegLayout{._super = /*offset=*/173}}, - ._extra38 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/174}, - .val = NondetRegLayout{._super = /*offset=*/175}}, - ._extra39 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/176}, - .val = NondetRegLayout{._super = /*offset=*/177}}, - ._extra40 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/178}, - .val = NondetRegLayout{._super = /*offset=*/179}}, - ._extra41 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/180}, - .val = NondetRegLayout{._super = /*offset=*/181}}}; -constexpr PoseidonCheckOut__0_SuperLayout kLayout__781 = - PoseidonCheckOut__0_SuperLayout{.goal = kLayout__683}; -constexpr PoseidonCheckOut__0_SuperLayout kLayout__782 = - PoseidonCheckOut__0_SuperLayout{.goal = kLayout__684}; -constexpr PoseidonCheckOut__0_SuperLayout kLayout__783 = - PoseidonCheckOut__0_SuperLayout{.goal = kLayout__685}; -constexpr PoseidonCheckOut__0_SuperLayout kLayout__784 = - PoseidonCheckOut__0_SuperLayout{.goal = kLayout__686}; -constexpr PoseidonCheckOut__0_SuperLayout kLayout__785 = - PoseidonCheckOut__0_SuperLayout{.goal = kLayout__687}; -constexpr PoseidonCheckOut__0_SuperLayout kLayout__786 = - PoseidonCheckOut__0_SuperLayout{.goal = kLayout__692}; -constexpr PoseidonCheckOut__0_SuperLayout kLayout__787 = - PoseidonCheckOut__0_SuperLayout{.goal = kLayout__697}; -constexpr PoseidonCheckOut__0_SuperLayout kLayout__788 = - PoseidonCheckOut__0_SuperLayout{.goal = kLayout__702}; -constexpr PoseidonCheckOut__0_SuperLayout8LayoutArray kLayout__780 = - PoseidonCheckOut__0_SuperLayout8LayoutArray{kLayout__781, - kLayout__782, - kLayout__783, - kLayout__784, - kLayout__785, - kLayout__786, - kLayout__787, - kLayout__788}; -constexpr PoseidonCheckOutLayout kLayout__779 = PoseidonCheckOutLayout{ - ._super = kLayout__629, - ._1 = kLayout__780, - .isNormal = IsZeroLayout{._super = NondetRegLayout{._super = /*offset=*/182}, - .inv = NondetRegLayout{._super = /*offset=*/183}}, - .extInv = NondetExtRegLayout{._super = /*offset=*/184}}; -constexpr PoseidonDoOut_SuperArm0Layout kLayout__778 = PoseidonDoOut_SuperArm0Layout{ - ._super = kLayout__779, - ._extra0 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/146}, - .val = NondetRegLayout{._super = /*offset=*/147}}, - ._extra1 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/148}, - .val = NondetRegLayout{._super = /*offset=*/149}}, - ._extra2 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/150}, - .val = NondetRegLayout{._super = /*offset=*/151}}, - ._extra3 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/152}, - .val = NondetRegLayout{._super = /*offset=*/153}}, - ._extra4 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/154}, - .val = NondetRegLayout{._super = /*offset=*/155}}, - ._extra5 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/156}, - .val = NondetRegLayout{._super = /*offset=*/157}}, - ._extra6 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/158}, - .val = NondetRegLayout{._super = /*offset=*/159}}, - ._extra7 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/160}, - .val = NondetRegLayout{._super = /*offset=*/161}}, - ._extra8 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/162}, - .val = NondetRegLayout{._super = /*offset=*/163}}, - ._extra9 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/164}, - .val = NondetRegLayout{._super = /*offset=*/165}}, - ._extra10 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/166}, - .val = NondetRegLayout{._super = /*offset=*/167}}, - ._extra11 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/168}, - .val = NondetRegLayout{._super = /*offset=*/169}}, - ._extra12 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/170}, - .val = NondetRegLayout{._super = /*offset=*/171}}, - ._extra13 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/172}, - .val = NondetRegLayout{._super = /*offset=*/173}}, - ._extra14 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/174}, - .val = NondetRegLayout{._super = /*offset=*/175}}, - ._extra15 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/176}, - .val = NondetRegLayout{._super = /*offset=*/177}}}; -constexpr NondetU16RegLayout kLayout__792 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/146}, - .val = NondetRegLayout{._super = /*offset=*/147}}}; -constexpr NondetU16RegLayout kLayout__794 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/148}, - .val = NondetRegLayout{._super = /*offset=*/149}}}; -constexpr U16RegLayout kLayout__793 = U16RegLayout{.ret = kLayout__794}; -constexpr MemoryWriteLayout kLayout__795 = - MemoryWriteLayout{.io = kLayout__660, ._0 = kLayout__661}; -constexpr PoseidonStoreOut__0_SuperLayout kLayout__791 = - PoseidonStoreOut__0_SuperLayout{.low = kLayout__792, .high = kLayout__793, ._0 = kLayout__795}; -constexpr NondetU16RegLayout kLayout__797 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/150}, - .val = NondetRegLayout{._super = /*offset=*/151}}}; -constexpr NondetU16RegLayout kLayout__799 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/152}, - .val = NondetRegLayout{._super = /*offset=*/153}}}; -constexpr U16RegLayout kLayout__798 = U16RegLayout{.ret = kLayout__799}; -constexpr MemoryWriteLayout kLayout__800 = - MemoryWriteLayout{.io = kLayout__665, ._0 = kLayout__666}; -constexpr PoseidonStoreOut__0_SuperLayout kLayout__796 = - PoseidonStoreOut__0_SuperLayout{.low = kLayout__797, .high = kLayout__798, ._0 = kLayout__800}; -constexpr NondetU16RegLayout kLayout__802 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/154}, - .val = NondetRegLayout{._super = /*offset=*/155}}}; -constexpr U16RegLayout kLayout__803 = U16RegLayout{.ret = kLayout__202}; -constexpr MemoryWriteLayout kLayout__804 = - MemoryWriteLayout{.io = kLayout__670, ._0 = kLayout__671}; -constexpr PoseidonStoreOut__0_SuperLayout kLayout__801 = - PoseidonStoreOut__0_SuperLayout{.low = kLayout__802, .high = kLayout__803, ._0 = kLayout__804}; -constexpr NondetU16RegLayout kLayout__806 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/158}, - .val = NondetRegLayout{._super = /*offset=*/159}}}; -constexpr NondetU16RegLayout kLayout__808 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/160}, - .val = NondetRegLayout{._super = /*offset=*/161}}}; -constexpr U16RegLayout kLayout__807 = U16RegLayout{.ret = kLayout__808}; -constexpr MemoryWriteLayout kLayout__809 = - MemoryWriteLayout{.io = kLayout__674, ._0 = kLayout__675}; -constexpr PoseidonStoreOut__0_SuperLayout kLayout__805 = - PoseidonStoreOut__0_SuperLayout{.low = kLayout__806, .high = kLayout__807, ._0 = kLayout__809}; -constexpr NondetU16RegLayout kLayout__811 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/162}, - .val = NondetRegLayout{._super = /*offset=*/163}}}; -constexpr NondetU16RegLayout kLayout__813 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/164}, - .val = NondetRegLayout{._super = /*offset=*/165}}}; -constexpr U16RegLayout kLayout__812 = U16RegLayout{.ret = kLayout__813}; -constexpr MemoryWriteLayout kLayout__814 = - MemoryWriteLayout{.io = kLayout__689, ._0 = kLayout__690}; -constexpr PoseidonStoreOut__0_SuperLayout kLayout__810 = - PoseidonStoreOut__0_SuperLayout{.low = kLayout__811, .high = kLayout__812, ._0 = kLayout__814}; -constexpr NondetU16RegLayout kLayout__817 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/168}, - .val = NondetRegLayout{._super = /*offset=*/169}}}; -constexpr U16RegLayout kLayout__816 = U16RegLayout{.ret = kLayout__817}; -constexpr MemoryWriteLayout kLayout__818 = - MemoryWriteLayout{.io = kLayout__694, ._0 = kLayout__695}; -constexpr PoseidonStoreOut__0_SuperLayout kLayout__815 = - PoseidonStoreOut__0_SuperLayout{.low = kLayout__288, .high = kLayout__816, ._0 = kLayout__818}; -constexpr NondetU16RegLayout kLayout__820 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/170}, - .val = NondetRegLayout{._super = /*offset=*/171}}}; -constexpr NondetU16RegLayout kLayout__822 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/172}, - .val = NondetRegLayout{._super = /*offset=*/173}}}; -constexpr U16RegLayout kLayout__821 = U16RegLayout{.ret = kLayout__822}; -constexpr MemoryWriteLayout kLayout__823 = - MemoryWriteLayout{.io = kLayout__699, ._0 = kLayout__700}; -constexpr PoseidonStoreOut__0_SuperLayout kLayout__819 = - PoseidonStoreOut__0_SuperLayout{.low = kLayout__820, .high = kLayout__821, ._0 = kLayout__823}; -constexpr NondetU16RegLayout kLayout__825 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/174}, - .val = NondetRegLayout{._super = /*offset=*/175}}}; -constexpr NondetU16RegLayout kLayout__827 = - NondetU16RegLayout{.arg = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/176}, - .val = NondetRegLayout{._super = /*offset=*/177}}}; -constexpr U16RegLayout kLayout__826 = U16RegLayout{.ret = kLayout__827}; -constexpr MemoryWriteLayout kLayout__828 = - MemoryWriteLayout{.io = kLayout__704, ._0 = kLayout__705}; -constexpr PoseidonStoreOut__0_SuperLayout kLayout__824 = - PoseidonStoreOut__0_SuperLayout{.low = kLayout__825, .high = kLayout__826, ._0 = kLayout__828}; -constexpr PoseidonStoreOut__0_SuperLayout8LayoutArray kLayout__790 = - PoseidonStoreOut__0_SuperLayout8LayoutArray{kLayout__791, - kLayout__796, - kLayout__801, - kLayout__805, - kLayout__810, - kLayout__815, - kLayout__819, - kLayout__824}; -constexpr PoseidonStoreOutLayout kLayout__789 = PoseidonStoreOutLayout{ - ._super = kLayout__629, - ._1 = kLayout__790, - .isNormal = IsZeroLayout{._super = NondetRegLayout{._super = /*offset=*/182}, - .inv = NondetRegLayout{._super = /*offset=*/183}}, - .extInv = NondetExtRegLayout{._super = /*offset=*/184}}; -constexpr PoseidonDoOut_SuperLayout kLayout__777 = - PoseidonDoOut_SuperLayout{._super = kLayout__629, .arm0 = kLayout__778, .arm1 = kLayout__789}; -constexpr _Arguments_PoseidonDoOut_SuperLayout kLayout__829 = _Arguments_PoseidonDoOut_SuperLayout{ - .memoryArg = kLayout__632, .cycleArg = kLayout__649, .argU16 = kLayout__650}; -constexpr PoseidonDoOutLayout kLayout__776 = - PoseidonDoOutLayout{._super = kLayout__777, ._arguments_PoseidonDoOut_Super = kLayout__829}; -constexpr Poseidon0StateArm5Layout kLayout__775 = Poseidon0StateArm5Layout{ - ._super = kLayout__776, - ._extra0 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/178}, - .val = NondetRegLayout{._super = /*offset=*/179}}, - ._extra1 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/180}, - .val = NondetRegLayout{._super = /*offset=*/181}}}; -constexpr PoseidonPaging_SuperLayout kLayout__832 = - PoseidonPaging_SuperLayout{._super = kLayout__629, - .arm0 = kLayout__629, - .arm1 = kLayout__629, - .arm2 = kLayout__629, - .arm3 = kLayout__629, - .arm4 = kLayout__629, - .arm5 = kLayout__629}; -constexpr NondetRegLayout6LayoutArray kLayout__834 = - NondetRegLayout6LayoutArray{NondetRegLayout{._super = /*offset=*/184}, - NondetRegLayout{._super = /*offset=*/185}, - NondetRegLayout{._super = /*offset=*/186}, - NondetRegLayout{._super = /*offset=*/187}, - NondetRegLayout{._super = /*offset=*/188}, - NondetRegLayout{._super = /*offset=*/189}}; -constexpr OneHot_6_Layout kLayout__833 = OneHot_6_Layout{._super = kLayout__834}; -constexpr NondetU8RegLayout kLayout__837 = - NondetU8RegLayout{.arg = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/178}, - .val = NondetRegLayout{._super = /*offset=*/179}}}; -constexpr U8RegLayout kLayout__836 = U8RegLayout{.ret = kLayout__837}; -constexpr IsU24Layout kLayout__835 = IsU24Layout{.low16 = kLayout__792, ._0 = kLayout__836}; -constexpr _Arguments_PoseidonPaging__1Layout kLayout__838 = _Arguments_PoseidonPaging__1Layout{ - .argU16 = - ArgU16Layout1LayoutArray{ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/148}, - .val = NondetRegLayout{._super = /*offset=*/149}}}, - .argU8 = - ArgU8Layout1LayoutArray{ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/180}, - .val = NondetRegLayout{._super = /*offset=*/181}}}}; -constexpr NondetU8RegLayout kLayout__843 = - NondetU8RegLayout{.arg = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/180}, - .val = NondetRegLayout{._super = /*offset=*/181}}}; -constexpr U8RegLayout kLayout__842 = U8RegLayout{.ret = kLayout__843}; -constexpr IsU24Layout kLayout__841 = IsU24Layout{.low16 = kLayout__794, ._0 = kLayout__842}; -constexpr PoseidonPaging__1Arm0_SuperLayout kLayout__840 = - PoseidonPaging__1Arm0_SuperLayout{._0 = kLayout__841}; -constexpr PoseidonPaging__1Arm1_SuperLayout kLayout__844 = - PoseidonPaging__1Arm1_SuperLayout{._0 = kLayout__841}; -constexpr PoseidonPaging__1Layout kLayout__839 = - PoseidonPaging__1Layout{.arm0 = kLayout__840, .arm1 = kLayout__844}; -constexpr PoseidonPagingLayout kLayout__831 = - PoseidonPagingLayout{._super = kLayout__832, - .curIdx = NondetRegLayout{._super = /*offset=*/182}, - .curMode = NondetRegLayout{._super = /*offset=*/183}, - .modeSplit = kLayout__833, - ._0 = kLayout__835, - ._arguments_PoseidonPaging__1 = kLayout__838, - ._3 = kLayout__839, - ._4 = NondetRegLayout{._super = /*offset=*/190}}; -constexpr Poseidon0StateArm6Layout kLayout__830 = Poseidon0StateArm6Layout{ - ._super = kLayout__831, - ._extra0 = kLayout__633, - ._extra1 = kLayout__634, - ._extra2 = kLayout__635, - ._extra3 = kLayout__636, - ._extra4 = kLayout__637, - ._extra5 = kLayout__638, - ._extra6 = kLayout__639, - ._extra7 = kLayout__640, - ._extra8 = kLayout__641, - ._extra9 = kLayout__642, - ._extra10 = kLayout__643, - ._extra11 = kLayout__644, - ._extra12 = kLayout__645, - ._extra13 = kLayout__646, - ._extra14 = kLayout__647, - ._extra15 = kLayout__648, - ._extra16 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/130}, - .cycle = NondetRegLayout{._super = /*offset=*/131}}, - ._extra17 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/132}, - .cycle = NondetRegLayout{._super = /*offset=*/133}}, - ._extra18 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/134}, - .cycle = NondetRegLayout{._super = /*offset=*/135}}, - ._extra19 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/136}, - .cycle = NondetRegLayout{._super = /*offset=*/137}}, - ._extra20 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/138}, - .cycle = NondetRegLayout{._super = /*offset=*/139}}, - ._extra21 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/140}, - .cycle = NondetRegLayout{._super = /*offset=*/141}}, - ._extra22 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/142}, - .cycle = NondetRegLayout{._super = /*offset=*/143}}, - ._extra23 = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/144}, - .cycle = NondetRegLayout{._super = /*offset=*/145}}, - ._extra24 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/150}, - .val = NondetRegLayout{._super = /*offset=*/151}}, - ._extra25 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/152}, - .val = NondetRegLayout{._super = /*offset=*/153}}, - ._extra26 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/154}, - .val = NondetRegLayout{._super = /*offset=*/155}}, - ._extra27 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/156}, - .val = NondetRegLayout{._super = /*offset=*/157}}, - ._extra28 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/158}, - .val = NondetRegLayout{._super = /*offset=*/159}}, - ._extra29 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/160}, - .val = NondetRegLayout{._super = /*offset=*/161}}, - ._extra30 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/162}, - .val = NondetRegLayout{._super = /*offset=*/163}}, - ._extra31 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/164}, - .val = NondetRegLayout{._super = /*offset=*/165}}, - ._extra32 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/166}, - .val = NondetRegLayout{._super = /*offset=*/167}}, - ._extra33 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/168}, - .val = NondetRegLayout{._super = /*offset=*/169}}, - ._extra34 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/170}, - .val = NondetRegLayout{._super = /*offset=*/171}}, - ._extra35 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/172}, - .val = NondetRegLayout{._super = /*offset=*/173}}, - ._extra36 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/174}, - .val = NondetRegLayout{._super = /*offset=*/175}}, - ._extra37 = ArgU16Layout{.count = NondetRegLayout{._super = /*offset=*/176}, - .val = NondetRegLayout{._super = /*offset=*/177}}}; -constexpr PoseidonStoreState__0_SuperLayout kLayout__848 = PoseidonStoreState__0_SuperLayout{ - .low = kLayout__792, .high = kLayout__793, ._0 = kLayout__795}; -constexpr PoseidonStoreState__0_SuperLayout kLayout__849 = PoseidonStoreState__0_SuperLayout{ - .low = kLayout__797, .high = kLayout__798, ._0 = kLayout__800}; -constexpr PoseidonStoreState__0_SuperLayout kLayout__850 = PoseidonStoreState__0_SuperLayout{ - .low = kLayout__802, .high = kLayout__803, ._0 = kLayout__804}; -constexpr PoseidonStoreState__0_SuperLayout kLayout__851 = PoseidonStoreState__0_SuperLayout{ - .low = kLayout__806, .high = kLayout__807, ._0 = kLayout__809}; -constexpr PoseidonStoreState__0_SuperLayout kLayout__852 = PoseidonStoreState__0_SuperLayout{ - .low = kLayout__811, .high = kLayout__812, ._0 = kLayout__814}; -constexpr PoseidonStoreState__0_SuperLayout kLayout__853 = PoseidonStoreState__0_SuperLayout{ - .low = kLayout__288, .high = kLayout__816, ._0 = kLayout__818}; -constexpr PoseidonStoreState__0_SuperLayout kLayout__854 = PoseidonStoreState__0_SuperLayout{ - .low = kLayout__820, .high = kLayout__821, ._0 = kLayout__823}; -constexpr PoseidonStoreState__0_SuperLayout kLayout__855 = PoseidonStoreState__0_SuperLayout{ - .low = kLayout__825, .high = kLayout__826, ._0 = kLayout__828}; -constexpr PoseidonStoreState__0_SuperLayout8LayoutArray kLayout__847 = - PoseidonStoreState__0_SuperLayout8LayoutArray{kLayout__848, - kLayout__849, - kLayout__850, - kLayout__851, - kLayout__852, - kLayout__853, - kLayout__854, - kLayout__855}; -constexpr PoseidonStoreStateLayout kLayout__846 = - PoseidonStoreStateLayout{._super = kLayout__629, ._1 = kLayout__847}; -constexpr Poseidon0StateArm7Layout kLayout__845 = Poseidon0StateArm7Layout{ - ._super = kLayout__846, - ._extra0 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/178}, - .val = NondetRegLayout{._super = /*offset=*/179}}, - ._extra1 = ArgU8Layout{.count = NondetRegLayout{._super = /*offset=*/180}, - .val = NondetRegLayout{._super = /*offset=*/181}}}; -constexpr Poseidon0StateLayout kLayout__652 = Poseidon0StateLayout{._super = kLayout__629, - .arm0 = kLayout__653, - .arm1 = kLayout__680, - .arm2 = kLayout__707, - .arm3 = kLayout__773, - .arm4 = kLayout__774, - .arm5 = kLayout__775, - .arm6 = kLayout__830, - .arm7 = kLayout__845}; -constexpr Poseidon0Layout kLayout__628 = - Poseidon0Layout{.state = kLayout__629, - ._arguments_Poseidon0State = kLayout__631, - .stateRedef = kLayout__652, - .arg = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/191}, - .cycle = NondetRegLayout{._super = /*offset=*/0}}}; -constexpr SBoxLayout24LayoutArray kLayout__861 = - SBoxLayout24LayoutArray{SBoxLayout{._super = NondetRegLayout{._super = /*offset=*/72}, - .cubed = NondetRegLayout{._super = /*offset=*/73}}, - SBoxLayout{._super = NondetRegLayout{._super = /*offset=*/74}, - .cubed = NondetRegLayout{._super = /*offset=*/75}}, - SBoxLayout{._super = NondetRegLayout{._super = /*offset=*/76}, - .cubed = NondetRegLayout{._super = /*offset=*/77}}, - SBoxLayout{._super = NondetRegLayout{._super = /*offset=*/78}, - .cubed = NondetRegLayout{._super = /*offset=*/79}}, - SBoxLayout{._super = NondetRegLayout{._super = /*offset=*/80}, - .cubed = NondetRegLayout{._super = /*offset=*/81}}, - SBoxLayout{._super = NondetRegLayout{._super = /*offset=*/82}, - .cubed = NondetRegLayout{._super = /*offset=*/83}}, - SBoxLayout{._super = NondetRegLayout{._super = /*offset=*/84}, - .cubed = NondetRegLayout{._super = /*offset=*/85}}, - SBoxLayout{._super = NondetRegLayout{._super = /*offset=*/86}, - .cubed = NondetRegLayout{._super = /*offset=*/87}}, - SBoxLayout{._super = NondetRegLayout{._super = /*offset=*/88}, - .cubed = NondetRegLayout{._super = /*offset=*/89}}, - SBoxLayout{._super = NondetRegLayout{._super = /*offset=*/90}, - .cubed = NondetRegLayout{._super = /*offset=*/91}}, - SBoxLayout{._super = NondetRegLayout{._super = /*offset=*/92}, - .cubed = NondetRegLayout{._super = /*offset=*/93}}, - SBoxLayout{._super = NondetRegLayout{._super = /*offset=*/94}, - .cubed = NondetRegLayout{._super = /*offset=*/95}}, - SBoxLayout{._super = NondetRegLayout{._super = /*offset=*/96}, - .cubed = NondetRegLayout{._super = /*offset=*/97}}, - SBoxLayout{._super = NondetRegLayout{._super = /*offset=*/98}, - .cubed = NondetRegLayout{._super = /*offset=*/99}}, - SBoxLayout{._super = NondetRegLayout{._super = /*offset=*/100}, - .cubed = NondetRegLayout{._super = /*offset=*/101}}, - SBoxLayout{._super = NondetRegLayout{._super = /*offset=*/102}, - .cubed = NondetRegLayout{._super = /*offset=*/103}}, - SBoxLayout{._super = NondetRegLayout{._super = /*offset=*/104}, - .cubed = NondetRegLayout{._super = /*offset=*/105}}, - SBoxLayout{._super = NondetRegLayout{._super = /*offset=*/106}, - .cubed = NondetRegLayout{._super = /*offset=*/107}}, - SBoxLayout{._super = NondetRegLayout{._super = /*offset=*/108}, - .cubed = NondetRegLayout{._super = /*offset=*/109}}, - SBoxLayout{._super = NondetRegLayout{._super = /*offset=*/110}, - .cubed = NondetRegLayout{._super = /*offset=*/111}}, - SBoxLayout{._super = NondetRegLayout{._super = /*offset=*/112}, - .cubed = NondetRegLayout{._super = /*offset=*/113}}, - SBoxLayout{._super = NondetRegLayout{._super = /*offset=*/114}, - .cubed = NondetRegLayout{._super = /*offset=*/115}}, - SBoxLayout{._super = NondetRegLayout{._super = /*offset=*/116}, - .cubed = NondetRegLayout{._super = /*offset=*/117}}, - SBoxLayout{._super = NondetRegLayout{._super = /*offset=*/118}, - .cubed = NondetRegLayout{._super = /*offset=*/119}}}; -constexpr DoExtRoundLayout kLayout__860 = DoExtRoundLayout{._1 = kLayout__861}; -constexpr NondetRegLayout8LayoutArray kLayout__863 = - NondetRegLayout8LayoutArray{NondetRegLayout{._super = /*offset=*/120}, - NondetRegLayout{._super = /*offset=*/121}, - NondetRegLayout{._super = /*offset=*/122}, - NondetRegLayout{._super = /*offset=*/123}, - NondetRegLayout{._super = /*offset=*/124}, - NondetRegLayout{._super = /*offset=*/125}, - NondetRegLayout{._super = /*offset=*/126}, - NondetRegLayout{._super = /*offset=*/127}}; -constexpr OneHot_8_Layout kLayout__862 = OneHot_8_Layout{._super = kLayout__863}; -constexpr DoExtRoundByIdxLayout kLayout__859 = - DoExtRoundByIdxLayout{._super = kLayout__860, .idxHot = kLayout__862}; -constexpr PoseidonExtRoundLayout kLayout__858 = PoseidonExtRoundLayout{ - ._super = kLayout__629, - .isRound3 = IsZeroLayout{._super = NondetRegLayout{._super = /*offset=*/66}, - .inv = NondetRegLayout{._super = /*offset=*/67}}, - .isRound7 = IsZeroLayout{._super = NondetRegLayout{._super = /*offset=*/68}, - .inv = NondetRegLayout{._super = /*offset=*/69}}, - .lastBlock = IsZeroLayout{._super = NondetRegLayout{._super = /*offset=*/70}, - .inv = NondetRegLayout{._super = /*offset=*/71}}, - .nextInner = kLayout__859}; -constexpr DoIntRoundLayout kLayout__867 = - DoIntRoundLayout{.sbox = SBoxLayout{._super = NondetRegLayout{._super = /*offset=*/66}, - .cubed = NondetRegLayout{._super = /*offset=*/67}}}; -constexpr DoIntRoundLayout kLayout__868 = - DoIntRoundLayout{.sbox = SBoxLayout{._super = NondetRegLayout{._super = /*offset=*/68}, - .cubed = NondetRegLayout{._super = /*offset=*/69}}}; -constexpr DoIntRoundLayout kLayout__869 = - DoIntRoundLayout{.sbox = SBoxLayout{._super = NondetRegLayout{._super = /*offset=*/70}, - .cubed = NondetRegLayout{._super = /*offset=*/71}}}; -constexpr DoIntRoundLayout kLayout__870 = - DoIntRoundLayout{.sbox = SBoxLayout{._super = NondetRegLayout{._super = /*offset=*/72}, - .cubed = NondetRegLayout{._super = /*offset=*/73}}}; -constexpr DoIntRoundLayout kLayout__871 = - DoIntRoundLayout{.sbox = SBoxLayout{._super = NondetRegLayout{._super = /*offset=*/74}, - .cubed = NondetRegLayout{._super = /*offset=*/75}}}; -constexpr DoIntRoundLayout kLayout__872 = - DoIntRoundLayout{.sbox = SBoxLayout{._super = NondetRegLayout{._super = /*offset=*/76}, - .cubed = NondetRegLayout{._super = /*offset=*/77}}}; -constexpr DoIntRoundLayout kLayout__873 = - DoIntRoundLayout{.sbox = SBoxLayout{._super = NondetRegLayout{._super = /*offset=*/78}, - .cubed = NondetRegLayout{._super = /*offset=*/79}}}; -constexpr DoIntRoundLayout kLayout__874 = - DoIntRoundLayout{.sbox = SBoxLayout{._super = NondetRegLayout{._super = /*offset=*/80}, - .cubed = NondetRegLayout{._super = /*offset=*/81}}}; -constexpr DoIntRoundLayout kLayout__875 = - DoIntRoundLayout{.sbox = SBoxLayout{._super = NondetRegLayout{._super = /*offset=*/82}, - .cubed = NondetRegLayout{._super = /*offset=*/83}}}; -constexpr DoIntRoundLayout kLayout__876 = - DoIntRoundLayout{.sbox = SBoxLayout{._super = NondetRegLayout{._super = /*offset=*/84}, - .cubed = NondetRegLayout{._super = /*offset=*/85}}}; -constexpr DoIntRoundLayout kLayout__877 = - DoIntRoundLayout{.sbox = SBoxLayout{._super = NondetRegLayout{._super = /*offset=*/86}, - .cubed = NondetRegLayout{._super = /*offset=*/87}}}; -constexpr DoIntRoundLayout kLayout__878 = - DoIntRoundLayout{.sbox = SBoxLayout{._super = NondetRegLayout{._super = /*offset=*/88}, - .cubed = NondetRegLayout{._super = /*offset=*/89}}}; -constexpr DoIntRoundLayout kLayout__879 = - DoIntRoundLayout{.sbox = SBoxLayout{._super = NondetRegLayout{._super = /*offset=*/90}, - .cubed = NondetRegLayout{._super = /*offset=*/91}}}; -constexpr DoIntRoundLayout kLayout__880 = - DoIntRoundLayout{.sbox = SBoxLayout{._super = NondetRegLayout{._super = /*offset=*/92}, - .cubed = NondetRegLayout{._super = /*offset=*/93}}}; -constexpr DoIntRoundLayout kLayout__881 = - DoIntRoundLayout{.sbox = SBoxLayout{._super = NondetRegLayout{._super = /*offset=*/94}, - .cubed = NondetRegLayout{._super = /*offset=*/95}}}; -constexpr DoIntRoundLayout kLayout__882 = - DoIntRoundLayout{.sbox = SBoxLayout{._super = NondetRegLayout{._super = /*offset=*/96}, - .cubed = NondetRegLayout{._super = /*offset=*/97}}}; -constexpr DoIntRoundLayout kLayout__883 = - DoIntRoundLayout{.sbox = SBoxLayout{._super = NondetRegLayout{._super = /*offset=*/98}, - .cubed = NondetRegLayout{._super = /*offset=*/99}}}; -constexpr DoIntRoundLayout kLayout__884 = - DoIntRoundLayout{.sbox = SBoxLayout{._super = NondetRegLayout{._super = /*offset=*/100}, - .cubed = NondetRegLayout{._super = /*offset=*/101}}}; -constexpr DoIntRoundLayout kLayout__885 = - DoIntRoundLayout{.sbox = SBoxLayout{._super = NondetRegLayout{._super = /*offset=*/102}, - .cubed = NondetRegLayout{._super = /*offset=*/103}}}; -constexpr DoIntRoundLayout kLayout__886 = - DoIntRoundLayout{.sbox = SBoxLayout{._super = NondetRegLayout{._super = /*offset=*/104}, - .cubed = NondetRegLayout{._super = /*offset=*/105}}}; -constexpr DoIntRoundLayout kLayout__887 = - DoIntRoundLayout{.sbox = SBoxLayout{._super = NondetRegLayout{._super = /*offset=*/106}, - .cubed = NondetRegLayout{._super = /*offset=*/107}}}; -constexpr DoIntRoundLayout21LayoutArray kLayout__866 = DoIntRoundLayout21LayoutArray{ - kLayout__867, kLayout__868, kLayout__869, kLayout__870, kLayout__871, kLayout__872, - kLayout__873, kLayout__874, kLayout__875, kLayout__876, kLayout__877, kLayout__878, - kLayout__879, kLayout__880, kLayout__881, kLayout__882, kLayout__883, kLayout__884, - kLayout__885, kLayout__886, kLayout__887}; -constexpr DoIntRoundsLayout kLayout__865 = DoIntRoundsLayout{._super = kLayout__866}; -constexpr PoseidonIntRoundsLayout kLayout__864 = - PoseidonIntRoundsLayout{._super = kLayout__629, .nextInner = kLayout__865}; -constexpr Poseidon1StateLayout kLayout__857 = Poseidon1StateLayout{._super = kLayout__629, - .arm0 = kLayout__858, - .arm1 = kLayout__864, - .arm2 = kLayout__629, - .arm3 = kLayout__629, - .arm4 = kLayout__629, - .arm5 = kLayout__629, - .arm6 = kLayout__629, - .arm7 = kLayout__629}; -constexpr Poseidon1Layout kLayout__856 = - Poseidon1Layout{.state = kLayout__629, - .stateRedef = kLayout__857, - .arg = CycleArgLayout{.count = NondetRegLayout{._super = /*offset=*/128}, - .cycle = NondetRegLayout{._super = /*offset=*/0}}}; -constexpr TopInstResultLayout kLayout__6 = TopInstResultLayout{._selector = kLayout__5, - .arm0 = kLayout__7, - .arm1 = kLayout__88, - .arm2 = kLayout__106, - .arm3 = kLayout__119, - .arm4 = kLayout__203, - .arm5 = kLayout__289, - .arm6 = kLayout__350, - .arm7 = kLayout__408, - .arm8 = kLayout__576, - .arm9 = kLayout__628, - .arm10 = kLayout__856}; -constexpr TopLayout kLayout__0 = - TopLayout{.nextPcLow = NondetRegLayout{._super = /*offset=*/12}, - .nextPcHigh = NondetRegLayout{._super = /*offset=*/13}, - .nextState_0 = NondetRegLayout{._super = /*offset=*/14}, - .nextMachineMode = NondetRegLayout{._super = /*offset=*/15}, - .isFirstCycle = NondetRegLayout{._super = /*offset=*/16}, - .cycleND = NondetRegLayout{._super = /*offset=*/0}, - .cycle = NondetRegLayout{._super = /*offset=*/0}, - .major = NondetRegLayout{._super = /*offset=*/17}, - .minor = NondetRegLayout{._super = /*offset=*/18}, - .instInput = kLayout__1, - .majorOnehot = kLayout__4, - .instResult = kLayout__6}; -constexpr DigestRegValues_SuperLayout8LayoutArray kLayout__889 = - DigestRegValues_SuperLayout8LayoutArray{ - DigestRegValues_SuperLayout{.low = NondetRegLayout{._super = /*offset=*/0}, - .high = NondetRegLayout{._super = /*offset=*/1}}, - DigestRegValues_SuperLayout{.low = NondetRegLayout{._super = /*offset=*/2}, - .high = NondetRegLayout{._super = /*offset=*/3}}, - DigestRegValues_SuperLayout{.low = NondetRegLayout{._super = /*offset=*/4}, - .high = NondetRegLayout{._super = /*offset=*/5}}, - DigestRegValues_SuperLayout{.low = NondetRegLayout{._super = /*offset=*/6}, - .high = NondetRegLayout{._super = /*offset=*/7}}, - DigestRegValues_SuperLayout{.low = NondetRegLayout{._super = /*offset=*/8}, - .high = NondetRegLayout{._super = /*offset=*/9}}, - DigestRegValues_SuperLayout{.low = NondetRegLayout{._super = /*offset=*/10}, - .high = NondetRegLayout{._super = /*offset=*/11}}, - DigestRegValues_SuperLayout{.low = NondetRegLayout{._super = /*offset=*/12}, - .high = NondetRegLayout{._super = /*offset=*/13}}, - DigestRegValues_SuperLayout{.low = NondetRegLayout{._super = /*offset=*/14}, - .high = NondetRegLayout{._super = /*offset=*/15}}}; -constexpr DigestRegLayout kLayout__888 = DigestRegLayout{.values = kLayout__889}; -constexpr DigestRegValues_SuperLayout8LayoutArray kLayout__891 = - DigestRegValues_SuperLayout8LayoutArray{ - DigestRegValues_SuperLayout{.low = NondetRegLayout{._super = /*offset=*/17}, - .high = NondetRegLayout{._super = /*offset=*/18}}, - DigestRegValues_SuperLayout{.low = NondetRegLayout{._super = /*offset=*/19}, - .high = NondetRegLayout{._super = /*offset=*/20}}, - DigestRegValues_SuperLayout{.low = NondetRegLayout{._super = /*offset=*/21}, - .high = NondetRegLayout{._super = /*offset=*/22}}, - DigestRegValues_SuperLayout{.low = NondetRegLayout{._super = /*offset=*/23}, - .high = NondetRegLayout{._super = /*offset=*/24}}, - DigestRegValues_SuperLayout{.low = NondetRegLayout{._super = /*offset=*/25}, - .high = NondetRegLayout{._super = /*offset=*/26}}, - DigestRegValues_SuperLayout{.low = NondetRegLayout{._super = /*offset=*/27}, - .high = NondetRegLayout{._super = /*offset=*/28}}, - DigestRegValues_SuperLayout{.low = NondetRegLayout{._super = /*offset=*/29}, - .high = NondetRegLayout{._super = /*offset=*/30}}, - DigestRegValues_SuperLayout{.low = NondetRegLayout{._super = /*offset=*/31}, - .high = NondetRegLayout{._super = /*offset=*/32}}}; -constexpr DigestRegLayout kLayout__890 = DigestRegLayout{.values = kLayout__891}; -constexpr DigestRegValues_SuperLayout8LayoutArray kLayout__893 = - DigestRegValues_SuperLayout8LayoutArray{ - DigestRegValues_SuperLayout{.low = NondetRegLayout{._super = /*offset=*/37}, - .high = NondetRegLayout{._super = /*offset=*/38}}, - DigestRegValues_SuperLayout{.low = NondetRegLayout{._super = /*offset=*/39}, - .high = NondetRegLayout{._super = /*offset=*/40}}, - DigestRegValues_SuperLayout{.low = NondetRegLayout{._super = /*offset=*/41}, - .high = NondetRegLayout{._super = /*offset=*/42}}, - DigestRegValues_SuperLayout{.low = NondetRegLayout{._super = /*offset=*/43}, - .high = NondetRegLayout{._super = /*offset=*/44}}, - DigestRegValues_SuperLayout{.low = NondetRegLayout{._super = /*offset=*/45}, - .high = NondetRegLayout{._super = /*offset=*/46}}, - DigestRegValues_SuperLayout{.low = NondetRegLayout{._super = /*offset=*/47}, - .high = NondetRegLayout{._super = /*offset=*/48}}, - DigestRegValues_SuperLayout{.low = NondetRegLayout{._super = /*offset=*/49}, - .high = NondetRegLayout{._super = /*offset=*/50}}, - DigestRegValues_SuperLayout{.low = NondetRegLayout{._super = /*offset=*/51}, - .high = NondetRegLayout{._super = /*offset=*/52}}}; -constexpr DigestRegLayout kLayout__892 = DigestRegLayout{.values = kLayout__893}; -constexpr DigestRegValues_SuperLayout8LayoutArray kLayout__895 = - DigestRegValues_SuperLayout8LayoutArray{ - DigestRegValues_SuperLayout{.low = NondetRegLayout{._super = /*offset=*/53}, - .high = NondetRegLayout{._super = /*offset=*/54}}, - DigestRegValues_SuperLayout{.low = NondetRegLayout{._super = /*offset=*/55}, - .high = NondetRegLayout{._super = /*offset=*/56}}, - DigestRegValues_SuperLayout{.low = NondetRegLayout{._super = /*offset=*/57}, - .high = NondetRegLayout{._super = /*offset=*/58}}, - DigestRegValues_SuperLayout{.low = NondetRegLayout{._super = /*offset=*/59}, - .high = NondetRegLayout{._super = /*offset=*/60}}, - DigestRegValues_SuperLayout{.low = NondetRegLayout{._super = /*offset=*/61}, - .high = NondetRegLayout{._super = /*offset=*/62}}, - DigestRegValues_SuperLayout{.low = NondetRegLayout{._super = /*offset=*/63}, - .high = NondetRegLayout{._super = /*offset=*/64}}, - DigestRegValues_SuperLayout{.low = NondetRegLayout{._super = /*offset=*/65}, - .high = NondetRegLayout{._super = /*offset=*/66}}, - DigestRegValues_SuperLayout{.low = NondetRegLayout{._super = /*offset=*/67}, - .high = NondetRegLayout{._super = /*offset=*/68}}}; -constexpr DigestRegLayout kLayout__894 = DigestRegLayout{.values = kLayout__895}; -constexpr _accumLayout kLayout__896 = - _accumLayout{.argU8 = Arg_ArgU8Layout{.val = /*offset=*/0}, - .argU16 = Arg_ArgU16Layout{.val = /*offset=*/4}, - .memoryArg = Arg_MemoryArgLayout{.addr = /*offset=*/8, - .cycle = /*offset=*/12, - .dataLow = /*offset=*/16, - .dataHigh = /*offset=*/20}, - .cycleArg = Arg_CycleArgLayout{.cycle = /*offset=*/24}, - ._offset = /*offset=*/28}; -constexpr LayoutAccumLayout kLayoutTestSuccRunAccum = - LayoutAccumLayout{.columns = Reg19LayoutArray{/*offset=*/0, - /*offset=*/4, - /*offset=*/8, - /*offset=*/12, - /*offset=*/16, - /*offset=*/20, - /*offset=*/24, - /*offset=*/28, - /*offset=*/32, - /*offset=*/36, - /*offset=*/40, - /*offset=*/44, - /*offset=*/48, - /*offset=*/52, - /*offset=*/56, - /*offset=*/60, - /*offset=*/64, - /*offset=*/68, - /*offset=*/72}}; -constexpr LayoutAccumLayout kLayout_TopAccum = - LayoutAccumLayout{.columns = Reg19LayoutArray{/*offset=*/0, - /*offset=*/4, - /*offset=*/8, - /*offset=*/12, - /*offset=*/16, - /*offset=*/20, - /*offset=*/24, - /*offset=*/28, - /*offset=*/32, - /*offset=*/36, - /*offset=*/40, - /*offset=*/44, - /*offset=*/48, - /*offset=*/52, - /*offset=*/56, - /*offset=*/60, - /*offset=*/64, - /*offset=*/68, - /*offset=*/72}}; -constexpr TestSuccRunLayout kLayoutTestSuccRun = TestSuccRunLayout{._0 = kLayout__0}; -constexpr TopLayout kLayout_Top = - TopLayout{.nextPcLow = NondetRegLayout{._super = /*offset=*/12}, - .nextPcHigh = NondetRegLayout{._super = /*offset=*/13}, - .nextState_0 = NondetRegLayout{._super = /*offset=*/14}, - .nextMachineMode = NondetRegLayout{._super = /*offset=*/15}, - .isFirstCycle = NondetRegLayout{._super = /*offset=*/16}, - .cycleND = NondetRegLayout{._super = /*offset=*/0}, - .cycle = NondetRegLayout{._super = /*offset=*/0}, - .major = NondetRegLayout{._super = /*offset=*/17}, - .minor = NondetRegLayout{._super = /*offset=*/18}, - .instInput = kLayout__1, - .majorOnehot = kLayout__4, - .instResult = kLayout__6}; -constexpr _globalLayout kLayoutGlobal = - _globalLayout{.input = kLayout__888, - .isTerminate = NondetRegLayout{._super = /*offset=*/16}, - .output = kLayout__890, - .rng = NondetExtRegLayout{._super = /*offset=*/33}, - .stateIn = kLayout__892, - .stateOut = kLayout__894, - .termA0high = NondetRegLayout{._super = /*offset=*/69}, - .termA0low = NondetRegLayout{._super = /*offset=*/70}, - .termA1high = NondetRegLayout{._super = /*offset=*/71}, - .termA1low = NondetRegLayout{._super = /*offset=*/72}}; -constexpr _mixLayout kLayoutMix = _mixLayout{.randomness = kLayout__896}; diff --git a/risc0/circuit/rv32im-v2-sys/kernels/cxx/layout.h.inc b/risc0/circuit/rv32im-v2-sys/kernels/cxx/layout.h.inc deleted file mode 100644 index 1a718f84..00000000 --- a/risc0/circuit/rv32im-v2-sys/kernels/cxx/layout.h.inc +++ /dev/null @@ -1,903 +0,0 @@ -extern const NondetRegLayout8LayoutArray kLayout__3; -extern const OneHot_8_Layout kLayout__2; -extern const InstInputLayout kLayout__1; -extern const NondetRegLayout11LayoutArray kLayout__5; -extern const OneHot_11_Layout kLayout__4; -extern const NondetU16RegLayout kLayout__10; -extern const NondetU16RegLayout kLayout__11; -extern const NormalizeU32Layout kLayout__9; -extern const NondetU16RegLayout kLayout__13; -extern const NondetU16RegLayout kLayout__14; -extern const NormalizeU32Layout kLayout__12; -extern const MemoryArgLayout kLayout__18; -extern const MemoryArgLayout kLayout__19; -extern const MemoryIOLayout kLayout__17; -extern const IsCycleLayout kLayout__21; -extern const IsForwardLayout kLayout__20; -extern const MemoryWriteLayout kLayout__16; -extern const WriteRdLayout kLayout__15; -extern const FinalizeMiscLayout kLayout__8; -extern const DecoderLayout kLayout__24; -extern const NondetU16RegLayout kLayout__27; -extern const U16RegLayout kLayout__26; -extern const NondetU16RegLayout kLayout__28; -extern const AddrDecomposeLayout kLayout__25; -extern const MemoryArgLayout kLayout__31; -extern const MemoryArgLayout kLayout__32; -extern const MemoryIOLayout kLayout__30; -extern const IsCycleLayout kLayout__34; -extern const IsForwardLayout kLayout__33; -extern const MemoryReadLayout kLayout__29; -extern const DecodeInstLayout kLayout__23; -extern const MemoryArgLayout kLayout__38; -extern const MemoryArgLayout kLayout__39; -extern const MemoryIOLayout kLayout__37; -extern const IsCycleLayout kLayout__41; -extern const IsForwardLayout kLayout__40; -extern const MemoryReadLayout kLayout__36; -extern const ReadRegLayout kLayout__35; -extern const MemoryArgLayout kLayout__45; -extern const MemoryArgLayout kLayout__46; -extern const MemoryIOLayout kLayout__44; -extern const IsCycleLayout kLayout__48; -extern const IsForwardLayout kLayout__47; -extern const MemoryReadLayout kLayout__43; -extern const ReadRegLayout kLayout__42; -extern const MiscInputLayout kLayout__22; -extern const ArgU16Layout5LayoutArray kLayout__50; -extern const _Arguments_Misc0MiscOutputLayout kLayout__49; -extern const Misc0MiscOutputArm0Layout kLayout__52; -extern const Misc0MiscOutputArm1Layout kLayout__53; -extern const NondetRegLayout16LayoutArray kLayout__60; -extern const ToBits_16_Layout kLayout__59; -extern const NondetRegLayout16LayoutArray kLayout__62; -extern const ToBits_16_Layout kLayout__61; -extern const BitwiseAndU16Layout kLayout__58; -extern const NondetRegLayout16LayoutArray kLayout__65; -extern const ToBits_16_Layout kLayout__64; -extern const NondetRegLayout16LayoutArray kLayout__67; -extern const ToBits_16_Layout kLayout__66; -extern const BitwiseAndU16Layout kLayout__63; -extern const BitwiseAndLayout kLayout__57; -extern const BitwiseXorLayout kLayout__56; -extern const OpXORLayout kLayout__55; -extern const Misc0MiscOutputArm2Layout kLayout__54; -extern const BitwiseOrLayout kLayout__70; -extern const OpORLayout kLayout__69; -extern const Misc0MiscOutputArm3Layout kLayout__68; -extern const OpANDLayout kLayout__72; -extern const Misc0MiscOutputArm4Layout kLayout__71; -extern const NondetU16RegLayout kLayout__76; -extern const NondetU16RegLayout kLayout__77; -extern const NormalizeU32Layout kLayout__75; -extern const NondetU16RegLayout kLayout__79; -extern const GetSignU32Layout kLayout__78; -extern const NondetU16RegLayout kLayout__81; -extern const GetSignU32Layout kLayout__80; -extern const NondetU16RegLayout kLayout__83; -extern const GetSignU32Layout kLayout__82; -extern const CmpLessThanLayout kLayout__74; -extern const OpSLTLayout kLayout__73; -extern const CmpLessThanUnsignedLayout kLayout__86; -extern const OpSLTULayout kLayout__85; -extern const Misc0MiscOutputArm6Layout kLayout__84; -extern const Misc0MiscOutputArm7Layout kLayout__87; -extern const Misc0MiscOutputLayout kLayout__51; -extern const Misc0Layout kLayout__7; -extern const _Arguments_Misc1MiscOutputLayout kLayout__89; -extern const OpXORILayout kLayout__92; -extern const Misc1MiscOutputArm0Layout kLayout__91; -extern const OpORILayout kLayout__94; -extern const Misc1MiscOutputArm1Layout kLayout__93; -extern const OpANDILayout kLayout__96; -extern const Misc1MiscOutputArm2Layout kLayout__95; -extern const OpSLTILayout kLayout__97; -extern const OpSLTIULayout kLayout__99; -extern const Misc1MiscOutputArm4Layout kLayout__98; -extern const CmpEqualLayout kLayout__102; -extern const OpBEQLayout kLayout__101; -extern const Misc1MiscOutputArm5Layout kLayout__100; -extern const OpBNELayout kLayout__104; -extern const Misc1MiscOutputArm6Layout kLayout__103; -extern const OpBLTLayout kLayout__105; -extern const Misc1MiscOutputLayout kLayout__90; -extern const Misc1Layout kLayout__88; -extern const _Arguments_Misc2MiscOutputLayout kLayout__107; -extern const OpBGELayout kLayout__109; -extern const OpBLTULayout kLayout__111; -extern const Misc2MiscOutputArm1Layout kLayout__110; -extern const OpBGEULayout kLayout__113; -extern const Misc2MiscOutputArm2Layout kLayout__112; -extern const Misc2MiscOutputArm3Layout kLayout__114; -extern const Misc2MiscOutputArm4Layout kLayout__115; -extern const Misc2MiscOutputArm5Layout kLayout__116; -extern const Misc2MiscOutputArm6Layout kLayout__117; -extern const Misc2MiscOutputArm7Layout kLayout__118; -extern const Misc2MiscOutputLayout kLayout__108; -extern const Misc2Layout kLayout__106; -extern const DecoderLayout kLayout__122; -extern const NondetU16RegLayout kLayout__125; -extern const U16RegLayout kLayout__124; -extern const NondetU16RegLayout kLayout__126; -extern const AddrDecomposeLayout kLayout__123; -extern const MemoryArgLayout kLayout__129; -extern const MemoryArgLayout kLayout__130; -extern const MemoryIOLayout kLayout__128; -extern const IsCycleLayout kLayout__132; -extern const IsForwardLayout kLayout__131; -extern const MemoryReadLayout kLayout__127; -extern const DecodeInstLayout kLayout__121; -extern const MemoryArgLayout kLayout__136; -extern const MemoryArgLayout kLayout__137; -extern const MemoryIOLayout kLayout__135; -extern const IsCycleLayout kLayout__139; -extern const IsForwardLayout kLayout__138; -extern const MemoryReadLayout kLayout__134; -extern const ReadRegLayout kLayout__133; -extern const MemoryArgLayout kLayout__143; -extern const MemoryArgLayout kLayout__144; -extern const MemoryIOLayout kLayout__142; -extern const IsCycleLayout kLayout__146; -extern const IsForwardLayout kLayout__145; -extern const MemoryReadLayout kLayout__141; -extern const ReadRegLayout kLayout__140; -extern const MulInputLayout kLayout__120; -extern const ArgU16Layout6LayoutArray kLayout__148; -extern const ArgU8Layout13LayoutArray kLayout__149; -extern const _Arguments_Mul0MulOutputLayout kLayout__147; -extern const NondetRegLayout5LayoutArray kLayout__154; -extern const ToBits_5_Layout kLayout__153; -extern const DynPo2Layout kLayout__152; -extern const NondetU8RegLayout kLayout__158; -extern const NondetU8RegLayout kLayout__159; -extern const NondetU8RegLayout kLayout__160; -extern const NondetU8RegLayout kLayout__161; -extern const NondetU8RegLayout kLayout__162; -extern const ExpandU32Layout kLayout__157; -extern const NondetU8RegLayout kLayout__164; -extern const NondetU8RegLayout kLayout__165; -extern const NondetU8RegLayout kLayout__166; -extern const NondetU8RegLayout kLayout__167; -extern const NondetU8RegLayout kLayout__168; -extern const ExpandU32Layout kLayout__163; -extern const NondetU8RegLayout kLayout__170; -extern const SplitTotalLayout kLayout__169; -extern const NondetU8RegLayout kLayout__172; -extern const SplitTotalLayout kLayout__171; -extern const NondetU8RegLayout kLayout__174; -extern const SplitTotalLayout kLayout__173; -extern const MultiplyAccumulateLayout kLayout__156; -extern const DoMulLayout kLayout__155; -extern const OpSLLLayout kLayout__151; -extern const OpSLLILayout kLayout__175; -extern const ExpandU32Layout kLayout__180; -extern const ExpandU32Layout kLayout__181; -extern const SplitTotalLayout kLayout__182; -extern const SplitTotalLayout kLayout__183; -extern const SplitTotalLayout kLayout__184; -extern const MultiplyAccumulateLayout kLayout__179; -extern const DoMulLayout kLayout__178; -extern const OpMULLayout kLayout__177; -extern const Mul0MulOutputArm2Layout kLayout__176; -extern const OpMULHLayout kLayout__186; -extern const Mul0MulOutputArm3Layout kLayout__185; -extern const OpMULHSULayout kLayout__188; -extern const Mul0MulOutputArm4Layout kLayout__187; -extern const OpMULHULayout kLayout__190; -extern const Mul0MulOutputArm5Layout kLayout__189; -extern const Mul0MulOutputArm6Layout kLayout__191; -extern const Mul0MulOutputArm7Layout kLayout__192; -extern const Mul0MulOutputLayout kLayout__150; -extern const MemoryArgLayout kLayout__196; -extern const MemoryArgLayout kLayout__197; -extern const MemoryIOLayout kLayout__195; -extern const IsCycleLayout kLayout__199; -extern const IsForwardLayout kLayout__198; -extern const MemoryWriteLayout kLayout__194; -extern const WriteRdLayout kLayout__193; -extern const NondetU16RegLayout kLayout__201; -extern const NondetU16RegLayout kLayout__202; -extern const NormalizeU32Layout kLayout__200; -extern const Mul0Layout kLayout__119; -extern const DecoderLayout kLayout__206; -extern const NondetU16RegLayout kLayout__209; -extern const U16RegLayout kLayout__208; -extern const NondetU16RegLayout kLayout__210; -extern const AddrDecomposeLayout kLayout__207; -extern const MemoryArgLayout kLayout__213; -extern const MemoryArgLayout kLayout__214; -extern const MemoryIOLayout kLayout__212; -extern const IsCycleLayout kLayout__216; -extern const IsForwardLayout kLayout__215; -extern const MemoryReadLayout kLayout__211; -extern const DecodeInstLayout kLayout__205; -extern const MemoryArgLayout kLayout__220; -extern const MemoryArgLayout kLayout__221; -extern const MemoryIOLayout kLayout__219; -extern const IsCycleLayout kLayout__223; -extern const IsForwardLayout kLayout__222; -extern const MemoryReadLayout kLayout__218; -extern const ReadRegLayout kLayout__217; -extern const MemoryArgLayout kLayout__227; -extern const MemoryArgLayout kLayout__228; -extern const MemoryIOLayout kLayout__226; -extern const IsCycleLayout kLayout__230; -extern const IsForwardLayout kLayout__229; -extern const MemoryReadLayout kLayout__225; -extern const ReadRegLayout kLayout__224; -extern const DivInputLayout kLayout__204; -extern const ArgU16Layout9LayoutArray kLayout__232; -extern const ArgU8Layout13LayoutArray kLayout__233; -extern const _Arguments_Div0MulOutputLayout kLayout__231; -extern const NondetRegLayout5LayoutArray kLayout__239; -extern const ToBits_5_Layout kLayout__238; -extern const DynPo2Layout kLayout__237; -extern const ExpandU32Layout kLayout__242; -extern const ExpandU32Layout kLayout__243; -extern const NondetU8RegLayout kLayout__245; -extern const SplitTotalLayout kLayout__244; -extern const NondetU8RegLayout kLayout__247; -extern const SplitTotalLayout kLayout__246; -extern const NondetU16RegLayout kLayout__249; -extern const NondetU8RegLayout kLayout__250; -extern const SplitTotalLayout kLayout__248; -extern const NondetU16RegLayout kLayout__251; -extern const MultiplyAccumulateLayout kLayout__241; -extern const DoDivLayout kLayout__240; -extern const OpSRLLayout kLayout__236; -extern const Div0MulOutputArm0Layout kLayout__235; -extern const TopBitLayout kLayout__253; -extern const ExpandU32Layout kLayout__256; -extern const ExpandU32Layout kLayout__257; -extern const SplitTotalLayout kLayout__258; -extern const SplitTotalLayout kLayout__259; -extern const SplitTotalLayout kLayout__260; -extern const MultiplyAccumulateLayout kLayout__255; -extern const DoDivLayout kLayout__254; -extern const OpSRALayout kLayout__252; -extern const OpSRLILayout kLayout__262; -extern const Div0MulOutputArm2Layout kLayout__261; -extern const OpSRAILayout kLayout__263; -extern const ExpandU32Layout kLayout__268; -extern const ExpandU32Layout kLayout__269; -extern const SplitTotalLayout kLayout__270; -extern const SplitTotalLayout kLayout__271; -extern const SplitTotalLayout kLayout__272; -extern const MultiplyAccumulateLayout kLayout__267; -extern const DoDivLayout kLayout__266; -extern const OpDIVLayout kLayout__265; -extern const Div0MulOutputArm4Layout kLayout__264; -extern const OpDIVULayout kLayout__274; -extern const Div0MulOutputArm5Layout kLayout__273; -extern const OpREMLayout kLayout__276; -extern const Div0MulOutputArm6Layout kLayout__275; -extern const OpREMULayout kLayout__278; -extern const Div0MulOutputArm7Layout kLayout__277; -extern const Div0MulOutputLayout kLayout__234; -extern const MemoryArgLayout kLayout__282; -extern const MemoryArgLayout kLayout__283; -extern const MemoryIOLayout kLayout__281; -extern const IsCycleLayout kLayout__285; -extern const IsForwardLayout kLayout__284; -extern const MemoryWriteLayout kLayout__280; -extern const WriteRdLayout kLayout__279; -extern const NondetU16RegLayout kLayout__287; -extern const NondetU16RegLayout kLayout__288; -extern const NormalizeU32Layout kLayout__286; -extern const Div0Layout kLayout__203; -extern const DecoderLayout kLayout__292; -extern const NondetU16RegLayout kLayout__295; -extern const U16RegLayout kLayout__294; -extern const NondetU16RegLayout kLayout__296; -extern const AddrDecomposeLayout kLayout__293; -extern const MemoryArgLayout kLayout__299; -extern const MemoryArgLayout kLayout__300; -extern const MemoryIOLayout kLayout__298; -extern const IsCycleLayout kLayout__302; -extern const IsForwardLayout kLayout__301; -extern const MemoryReadLayout kLayout__297; -extern const DecodeInstLayout kLayout__291; -extern const MemoryArgLayout kLayout__306; -extern const MemoryArgLayout kLayout__307; -extern const MemoryIOLayout kLayout__305; -extern const IsCycleLayout kLayout__309; -extern const IsForwardLayout kLayout__308; -extern const MemoryReadLayout kLayout__304; -extern const ReadRegLayout kLayout__303; -extern const NondetU16RegLayout kLayout__311; -extern const NondetU16RegLayout kLayout__312; -extern const NormalizeU32Layout kLayout__310; -extern const NondetU16RegLayout kLayout__315; -extern const U16RegLayout kLayout__314; -extern const NondetU16RegLayout kLayout__316; -extern const AddrDecomposeBitsLayout kLayout__313; -extern const MemoryArgLayout kLayout__319; -extern const MemoryArgLayout kLayout__320; -extern const MemoryIOLayout kLayout__318; -extern const IsCycleLayout kLayout__322; -extern const IsForwardLayout kLayout__321; -extern const MemoryReadLayout kLayout__317; -extern const MemLoadInputLayout kLayout__290; -extern const ArgU8Layout3LayoutArray kLayout__324; -extern const _Arguments_Mem0OutputLayout kLayout__323; -extern const NondetU8RegLayout kLayout__328; -extern const NondetU8RegLayout kLayout__329; -extern const SplitWordLayout kLayout__327; -extern const NondetU8RegLayout kLayout__330; -extern const OpLBLayout kLayout__326; -extern const OpLHLayout kLayout__332; -extern const Mem0OutputArm1Layout kLayout__331; -extern const Mem0OutputArm2Layout kLayout__333; -extern const OpLBULayout kLayout__335; -extern const Mem0OutputArm3Layout kLayout__334; -extern const Mem0OutputArm4Layout kLayout__336; -extern const Mem0OutputArm5Layout kLayout__337; -extern const Mem0OutputArm6Layout kLayout__338; -extern const Mem0OutputArm7Layout kLayout__339; -extern const Mem0OutputLayout kLayout__325; -extern const MemoryArgLayout kLayout__343; -extern const MemoryArgLayout kLayout__344; -extern const MemoryIOLayout kLayout__342; -extern const IsCycleLayout kLayout__346; -extern const IsForwardLayout kLayout__345; -extern const MemoryWriteLayout kLayout__341; -extern const WriteRdLayout kLayout__340; -extern const NondetU16RegLayout kLayout__348; -extern const NondetU16RegLayout kLayout__349; -extern const NormalizeU32Layout kLayout__347; -extern const Mem0Layout kLayout__289; -extern const DecoderLayout kLayout__353; -extern const NondetU16RegLayout kLayout__356; -extern const U16RegLayout kLayout__355; -extern const NondetU16RegLayout kLayout__357; -extern const AddrDecomposeLayout kLayout__354; -extern const MemoryArgLayout kLayout__360; -extern const MemoryArgLayout kLayout__361; -extern const MemoryIOLayout kLayout__359; -extern const IsCycleLayout kLayout__363; -extern const IsForwardLayout kLayout__362; -extern const MemoryReadLayout kLayout__358; -extern const DecodeInstLayout kLayout__352; -extern const MemoryArgLayout kLayout__367; -extern const MemoryArgLayout kLayout__368; -extern const MemoryIOLayout kLayout__366; -extern const IsCycleLayout kLayout__370; -extern const IsForwardLayout kLayout__369; -extern const MemoryReadLayout kLayout__365; -extern const ReadRegLayout kLayout__364; -extern const MemoryArgLayout kLayout__374; -extern const MemoryArgLayout kLayout__375; -extern const MemoryIOLayout kLayout__373; -extern const IsCycleLayout kLayout__377; -extern const IsForwardLayout kLayout__376; -extern const MemoryReadLayout kLayout__372; -extern const ReadRegLayout kLayout__371; -extern const NondetU16RegLayout kLayout__379; -extern const NondetU16RegLayout kLayout__380; -extern const NormalizeU32Layout kLayout__378; -extern const NondetU16RegLayout kLayout__383; -extern const U16RegLayout kLayout__382; -extern const NondetU16RegLayout kLayout__384; -extern const AddrDecomposeBitsLayout kLayout__381; -extern const MemStoreInputLayout kLayout__351; -extern const ArgU8Layout4LayoutArray kLayout__386; -extern const _Arguments_Mem1OutputLayout kLayout__385; -extern const NondetU8RegLayout kLayout__390; -extern const SplitWordLayout kLayout__389; -extern const OpSBLayout kLayout__388; -extern const Mem1OutputArm1Layout kLayout__391; -extern const Mem1OutputArm2Layout kLayout__392; -extern const Mem1OutputArm3Layout kLayout__393; -extern const Mem1OutputArm4Layout kLayout__394; -extern const Mem1OutputArm5Layout kLayout__395; -extern const Mem1OutputArm6Layout kLayout__396; -extern const Mem1OutputArm7Layout kLayout__397; -extern const Mem1OutputLayout kLayout__387; -extern const MemoryArgLayout kLayout__401; -extern const MemoryArgLayout kLayout__402; -extern const MemoryIOLayout kLayout__400; -extern const IsCycleLayout kLayout__404; -extern const IsForwardLayout kLayout__403; -extern const MemoryWriteLayout kLayout__399; -extern const MemStoreFinalizeLayout kLayout__398; -extern const NondetU16RegLayout kLayout__406; -extern const NondetU16RegLayout kLayout__407; -extern const NormalizeU32Layout kLayout__405; -extern const Mem1Layout kLayout__350; -extern const MemoryArgLayout kLayout__416; -extern const MemoryArgLayout kLayout__417; -extern const MemoryIOLayout kLayout__415; -extern const MemoryPageInLayout kLayout__414; -extern const ControlLoadRoot__0_SuperLayout kLayout__413; -extern const MemoryArgLayout kLayout__421; -extern const MemoryArgLayout kLayout__422; -extern const MemoryIOLayout kLayout__420; -extern const MemoryPageInLayout kLayout__419; -extern const ControlLoadRoot__0_SuperLayout kLayout__418; -extern const MemoryArgLayout kLayout__426; -extern const MemoryArgLayout kLayout__427; -extern const MemoryIOLayout kLayout__425; -extern const MemoryPageInLayout kLayout__424; -extern const ControlLoadRoot__0_SuperLayout kLayout__423; -extern const MemoryArgLayout kLayout__431; -extern const MemoryArgLayout kLayout__432; -extern const MemoryIOLayout kLayout__430; -extern const MemoryPageInLayout kLayout__429; -extern const ControlLoadRoot__0_SuperLayout kLayout__428; -extern const MemoryArgLayout kLayout__436; -extern const MemoryArgLayout kLayout__437; -extern const MemoryIOLayout kLayout__435; -extern const MemoryPageInLayout kLayout__434; -extern const ControlLoadRoot__0_SuperLayout kLayout__433; -extern const MemoryArgLayout kLayout__441; -extern const MemoryArgLayout kLayout__442; -extern const MemoryIOLayout kLayout__440; -extern const MemoryPageInLayout kLayout__439; -extern const ControlLoadRoot__0_SuperLayout kLayout__438; -extern const MemoryArgLayout kLayout__446; -extern const MemoryArgLayout kLayout__447; -extern const MemoryIOLayout kLayout__445; -extern const MemoryPageInLayout kLayout__444; -extern const ControlLoadRoot__0_SuperLayout kLayout__443; -extern const MemoryArgLayout kLayout__451; -extern const MemoryArgLayout kLayout__452; -extern const MemoryIOLayout kLayout__450; -extern const MemoryPageInLayout kLayout__449; -extern const ControlLoadRoot__0_SuperLayout kLayout__448; -extern const ControlLoadRoot__0_SuperLayout8LayoutArray kLayout__412; -extern const ControlLoadRootLayout kLayout__411; -extern const Control0_SuperArm0Layout kLayout__410; -extern const IsCycleLayout kLayout__460; -extern const IsForwardLayout kLayout__459; -extern const MemoryReadLayout kLayout__458; -extern const IsCycleLayout kLayout__463; -extern const IsForwardLayout kLayout__462; -extern const MemoryReadLayout kLayout__461; -extern const ControlResume_SuperArm0_SuperLayout kLayout__457; -extern const ControlResume_SuperArm0Layout kLayout__456; -extern const MemoryWriteLayout kLayout__467; -extern const ControlResume_SuperArm1_Super__0_SuperLayout kLayout__466; -extern const MemoryWriteLayout kLayout__469; -extern const ControlResume_SuperArm1_Super__0_SuperLayout kLayout__468; -extern const IsCycleLayout kLayout__473; -extern const IsForwardLayout kLayout__472; -extern const MemoryWriteLayout kLayout__471; -extern const ControlResume_SuperArm1_Super__0_SuperLayout kLayout__470; -extern const MemoryWriteLayout kLayout__475; -extern const ControlResume_SuperArm1_Super__0_SuperLayout kLayout__474; -extern const IsCycleLayout kLayout__479; -extern const IsForwardLayout kLayout__478; -extern const MemoryWriteLayout kLayout__477; -extern const ControlResume_SuperArm1_Super__0_SuperLayout kLayout__476; -extern const IsCycleLayout kLayout__483; -extern const IsForwardLayout kLayout__482; -extern const MemoryWriteLayout kLayout__481; -extern const ControlResume_SuperArm1_Super__0_SuperLayout kLayout__480; -extern const MemoryWriteLayout kLayout__485; -extern const ControlResume_SuperArm1_Super__0_SuperLayout kLayout__484; -extern const IsCycleLayout kLayout__489; -extern const IsForwardLayout kLayout__488; -extern const MemoryWriteLayout kLayout__487; -extern const ControlResume_SuperArm1_Super__0_SuperLayout kLayout__486; -extern const ControlResume_SuperArm1_Super__0_SuperLayout8LayoutArray kLayout__465; -extern const ControlResume_SuperArm1_SuperLayout kLayout__464; -extern const ControlResume_SuperLayout kLayout__455; -extern const MemoryArgLayout16LayoutArray kLayout__491; -extern const CycleArgLayout8LayoutArray kLayout__492; -extern const _Arguments_ControlResume_SuperLayout kLayout__490; -extern const ControlResumeLayout kLayout__454; -extern const Control0_SuperArm1Layout kLayout__453; -extern const NondetU16RegLayout kLayout__497; -extern const U16RegLayout kLayout__496; -extern const NondetU16RegLayout kLayout__498; -extern const AddrDecomposeBitsLayout kLayout__495; -extern const NondetU16RegLayout kLayout__500; -extern const U16RegLayout kLayout__499; -extern const MemoryReadLayout kLayout__501; -extern const ControlUserECALLLayout kLayout__494; -extern const Control0_SuperArm2Layout kLayout__493; -extern const NondetU16RegLayout kLayout__505; -extern const NormalizeU32Layout kLayout__504; -extern const ControlMRETLayout kLayout__503; -extern const Control0_SuperArm3Layout kLayout__502; -extern const MemoryReadLayout kLayout__511; -extern const MemoryReadLayout kLayout__512; -extern const MemoryReadLayout kLayout__513; -extern const MemoryReadLayout kLayout__514; -extern const MemoryReadLayout kLayout__515; -extern const MemoryReadLayout8LayoutArray kLayout__510; -extern const ControlSuspend_SuperArm0_SuperLayout kLayout__509; -extern const ControlSuspend_SuperArm1_SuperLayout kLayout__517; -extern const ControlSuspend_SuperArm1Layout kLayout__516; -extern const ControlSuspend_SuperLayout kLayout__508; -extern const _Arguments_ControlSuspend_SuperLayout kLayout__518; -extern const ControlSuspendLayout kLayout__507; -extern const Control0_SuperArm4Layout kLayout__506; -extern const MemoryPageOutLayout kLayout__522; -extern const MemoryPageOutLayout kLayout__523; -extern const MemoryPageOutLayout kLayout__524; -extern const MemoryPageOutLayout kLayout__525; -extern const MemoryPageOutLayout kLayout__526; -extern const MemoryPageOutLayout kLayout__527; -extern const MemoryPageOutLayout kLayout__528; -extern const MemoryPageOutLayout kLayout__529; -extern const MemoryPageOutLayout8LayoutArray kLayout__521; -extern const ControlStoreRootLayout kLayout__520; -extern const Control0_SuperArm5Layout kLayout__519; -extern const ControlTable_SuperArm0_Super__0_SuperLayout kLayout__536; -extern const ControlTable_SuperArm0_Super__0_SuperLayout kLayout__537; -extern const ControlTable_SuperArm0_Super__0_SuperLayout kLayout__538; -extern const ControlTable_SuperArm0_Super__0_SuperLayout kLayout__539; -extern const ControlTable_SuperArm0_Super__0_SuperLayout kLayout__540; -extern const ControlTable_SuperArm0_Super__0_SuperLayout kLayout__541; -extern const ControlTable_SuperArm0_Super__0_SuperLayout kLayout__542; -extern const ControlTable_SuperArm0_Super__0_SuperLayout kLayout__543; -extern const ControlTable_SuperArm0_Super__0_SuperLayout kLayout__544; -extern const ControlTable_SuperArm0_Super__0_SuperLayout kLayout__545; -extern const ControlTable_SuperArm0_Super__0_SuperLayout kLayout__546; -extern const ControlTable_SuperArm0_Super__0_SuperLayout kLayout__547; -extern const ControlTable_SuperArm0_Super__0_SuperLayout kLayout__548; -extern const ControlTable_SuperArm0_Super__0_SuperLayout kLayout__549; -extern const ControlTable_SuperArm0_Super__0_SuperLayout kLayout__550; -extern const ControlTable_SuperArm0_Super__0_SuperLayout kLayout__551; -extern const ControlTable_SuperArm0_Super__0_SuperLayout16LayoutArray kLayout__535; -extern const ControlTable_SuperArm0_SuperLayout kLayout__534; -extern const ControlTable_SuperArm0Layout kLayout__533; -extern const ControlTable_SuperArm1_Super__0_SuperLayout kLayout__555; -extern const ControlTable_SuperArm1_Super__0_SuperLayout kLayout__556; -extern const ControlTable_SuperArm1_Super__0_SuperLayout kLayout__557; -extern const ControlTable_SuperArm1_Super__0_SuperLayout kLayout__558; -extern const ControlTable_SuperArm1_Super__0_SuperLayout kLayout__559; -extern const ControlTable_SuperArm1_Super__0_SuperLayout kLayout__560; -extern const ControlTable_SuperArm1_Super__0_SuperLayout kLayout__561; -extern const ControlTable_SuperArm1_Super__0_SuperLayout kLayout__562; -extern const ControlTable_SuperArm1_Super__0_SuperLayout kLayout__563; -extern const ControlTable_SuperArm1_Super__0_SuperLayout kLayout__564; -extern const ControlTable_SuperArm1_Super__0_SuperLayout kLayout__565; -extern const ControlTable_SuperArm1_Super__0_SuperLayout kLayout__566; -extern const ControlTable_SuperArm1_Super__0_SuperLayout kLayout__567; -extern const ControlTable_SuperArm1_Super__0_SuperLayout kLayout__568; -extern const ControlTable_SuperArm1_Super__0_SuperLayout kLayout__569; -extern const ControlTable_SuperArm1_Super__0_SuperLayout kLayout__570; -extern const ControlTable_SuperArm1_Super__0_SuperLayout16LayoutArray kLayout__554; -extern const ControlTable_SuperArm1_SuperLayout kLayout__553; -extern const ControlTable_SuperArm1Layout kLayout__552; -extern const ControlTable_SuperLayout kLayout__532; -extern const ArgU16Layout16LayoutArray kLayout__572; -extern const ArgU8Layout16LayoutArray kLayout__573; -extern const _Arguments_ControlTable_SuperLayout kLayout__571; -extern const ControlTableLayout kLayout__531; -extern const Control0_SuperArm6Layout kLayout__530; -extern const Control0_SuperArm7Layout kLayout__574; -extern const Control0_SuperLayout kLayout__409; -extern const _Arguments_Control0_SuperLayout kLayout__575; -extern const Control0Layout kLayout__408; -extern const NondetU16RegLayout kLayout__579; -extern const U16RegLayout kLayout__578; -extern const AddrDecomposeBitsLayout kLayout__577; -extern const MemoryArgLayout8LayoutArray kLayout__581; -extern const CycleArgLayout4LayoutArray kLayout__582; -extern const ArgU16Layout2LayoutArray kLayout__583; -extern const _Arguments_ECall0OutputLayout kLayout__580; -extern const IsCycleLayout kLayout__589; -extern const IsForwardLayout kLayout__588; -extern const MemoryReadLayout kLayout__587; -extern const IsCycleLayout kLayout__592; -extern const IsForwardLayout kLayout__591; -extern const MemoryReadLayout kLayout__590; -extern const NondetRegLayout4LayoutArray kLayout__594; -extern const OneHot_4_Layout kLayout__593; -extern const MachineECallLayout kLayout__586; -extern const ECall0OutputArm0Layout kLayout__585; -extern const ECallTerminateLayout kLayout__596; -extern const ECall0OutputArm1Layout kLayout__595; -extern const IsCycleLayout kLayout__600; -extern const IsForwardLayout kLayout__599; -extern const MemoryReadLayout kLayout__598; -extern const NondetU16RegLayout kLayout__601; -extern const NondetU16RegLayout kLayout__603; -extern const U16RegLayout kLayout__602; -extern const MemoryWriteLayout kLayout__604; -extern const NondetRegLayout4LayoutArray kLayout__607; -extern const OneHot_4_Layout kLayout__606; -extern const DecomposeLow2Layout kLayout__605; -extern const NondetRegLayout4LayoutArray kLayout__610; -extern const OneHot_4_Layout kLayout__609; -extern const DecomposeLow2Layout kLayout__608; -extern const ECallHostReadSetupLayout kLayout__597; -extern const ECallHostWriteLayout kLayout__611; -extern const ECall0OutputArm4Layout kLayout__612; -extern const MemoryWriteUnconstrainedLayout kLayout__617; -extern const ECallHostReadWords__0_SuperLayout kLayout__616; -extern const MemoryWriteUnconstrainedLayout kLayout__619; -extern const ECallHostReadWords__0_SuperLayout kLayout__618; -extern const MemoryWriteUnconstrainedLayout kLayout__621; -extern const ECallHostReadWords__0_SuperLayout kLayout__620; -extern const MemoryWriteUnconstrainedLayout kLayout__623; -extern const ECallHostReadWords__0_SuperLayout kLayout__622; -extern const ECallHostReadWords__0_SuperLayout4LayoutArray kLayout__615; -extern const ECallHostReadWordsLayout kLayout__614; -extern const ECall0OutputArm5Layout kLayout__613; -extern const ECall0OutputArm6Layout kLayout__624; -extern const ECall0OutputArm7Layout kLayout__625; -extern const ECall0OutputLayout kLayout__584; -extern const NondetU16RegLayout kLayout__627; -extern const NormalizeU32Layout kLayout__626; -extern const ECall0Layout kLayout__576; -extern const NondetRegLayout24LayoutArray kLayout__630; -extern const PoseidonStateLayout kLayout__629; -extern const MemoryArgLayout kLayout__633; -extern const MemoryArgLayout kLayout__634; -extern const MemoryArgLayout kLayout__635; -extern const MemoryArgLayout kLayout__636; -extern const MemoryArgLayout kLayout__637; -extern const MemoryArgLayout kLayout__638; -extern const MemoryArgLayout kLayout__639; -extern const MemoryArgLayout kLayout__640; -extern const MemoryArgLayout kLayout__641; -extern const MemoryArgLayout kLayout__642; -extern const MemoryArgLayout kLayout__643; -extern const MemoryArgLayout kLayout__644; -extern const MemoryArgLayout kLayout__645; -extern const MemoryArgLayout kLayout__646; -extern const MemoryArgLayout kLayout__647; -extern const MemoryArgLayout kLayout__648; -extern const MemoryArgLayout16LayoutArray kLayout__632; -extern const CycleArgLayout8LayoutArray kLayout__649; -extern const ArgU16Layout16LayoutArray kLayout__650; -extern const ArgU8Layout2LayoutArray kLayout__651; -extern const _Arguments_Poseidon0StateLayout kLayout__631; -extern const PoseidonEntry_SuperArm0Layout kLayout__656; -extern const MemoryIOLayout kLayout__660; -extern const IsCycleLayout kLayout__662; -extern const IsForwardLayout kLayout__661; -extern const MemoryReadLayout kLayout__659; -extern const ReadAddrLayout kLayout__658; -extern const MemoryIOLayout kLayout__665; -extern const IsCycleLayout kLayout__667; -extern const IsForwardLayout kLayout__666; -extern const MemoryReadLayout kLayout__664; -extern const ReadAddrLayout kLayout__663; -extern const MemoryIOLayout kLayout__670; -extern const IsCycleLayout kLayout__672; -extern const IsForwardLayout kLayout__671; -extern const MemoryReadLayout kLayout__669; -extern const ReadAddrLayout kLayout__668; -extern const MemoryIOLayout kLayout__674; -extern const IsCycleLayout kLayout__676; -extern const IsForwardLayout kLayout__675; -extern const MemoryReadLayout kLayout__673; -extern const PoseidonEcallLayout kLayout__657; -extern const PoseidonEntry_SuperLayout kLayout__655; -extern const MemoryArgLayout8LayoutArray kLayout__678; -extern const CycleArgLayout4LayoutArray kLayout__679; -extern const _Arguments_PoseidonEntry_SuperLayout kLayout__677; -extern const PoseidonEntryLayout kLayout__654; -extern const Poseidon0StateArm0Layout kLayout__653; -extern const ReadElemLayout kLayout__683; -extern const ReadElemLayout kLayout__684; -extern const ReadElemLayout kLayout__685; -extern const ReadElemLayout kLayout__686; -extern const MemoryIOLayout kLayout__689; -extern const IsCycleLayout kLayout__691; -extern const IsForwardLayout kLayout__690; -extern const MemoryReadLayout kLayout__688; -extern const ReadElemLayout kLayout__687; -extern const MemoryIOLayout kLayout__694; -extern const IsCycleLayout kLayout__696; -extern const IsForwardLayout kLayout__695; -extern const MemoryReadLayout kLayout__693; -extern const ReadElemLayout kLayout__692; -extern const MemoryIOLayout kLayout__699; -extern const IsCycleLayout kLayout__701; -extern const IsForwardLayout kLayout__700; -extern const MemoryReadLayout kLayout__698; -extern const ReadElemLayout kLayout__697; -extern const MemoryIOLayout kLayout__704; -extern const IsCycleLayout kLayout__706; -extern const IsForwardLayout kLayout__705; -extern const MemoryReadLayout kLayout__703; -extern const ReadElemLayout kLayout__702; -extern const ReadElemLayout8LayoutArray kLayout__682; -extern const PoseidonLoadStateLayout kLayout__681; -extern const Poseidon0StateArm1Layout kLayout__680; -extern const OneHot_3_Layout kLayout__711; -extern const MemoryPageInLayout kLayout__716; -extern const MemoryGet_SuperArm1Layout kLayout__715; -extern const MemoryPageOutLayout kLayout__717; -extern const MemoryGet_SuperLayout kLayout__714; -extern const MemoryArgLayout2LayoutArray kLayout__719; -extern const _Arguments_MemoryGet_SuperLayout kLayout__718; -extern const MemoryGetLayout kLayout__713; -extern const MemoryPageInLayout kLayout__723; -extern const MemoryGet_SuperArm1Layout kLayout__722; -extern const MemoryPageOutLayout kLayout__724; -extern const MemoryGet_SuperLayout kLayout__721; -extern const MemoryArgLayout2LayoutArray kLayout__726; -extern const _Arguments_MemoryGet_SuperLayout kLayout__725; -extern const MemoryGetLayout kLayout__720; -extern const MemoryPageInLayout kLayout__730; -extern const MemoryGet_SuperArm1Layout kLayout__729; -extern const MemoryPageOutLayout kLayout__731; -extern const MemoryGet_SuperLayout kLayout__728; -extern const MemoryArgLayout2LayoutArray kLayout__733; -extern const _Arguments_MemoryGet_SuperLayout kLayout__732; -extern const MemoryGetLayout kLayout__727; -extern const MemoryPageInLayout kLayout__737; -extern const MemoryGet_SuperArm1Layout kLayout__736; -extern const MemoryPageOutLayout kLayout__738; -extern const MemoryGet_SuperLayout kLayout__735; -extern const MemoryArgLayout2LayoutArray kLayout__740; -extern const _Arguments_MemoryGet_SuperLayout kLayout__739; -extern const MemoryGetLayout kLayout__734; -extern const MemoryPageInLayout kLayout__744; -extern const MemoryGet_SuperArm1Layout kLayout__743; -extern const MemoryPageOutLayout kLayout__745; -extern const MemoryGet_SuperLayout kLayout__742; -extern const MemoryArgLayout2LayoutArray kLayout__747; -extern const _Arguments_MemoryGet_SuperLayout kLayout__746; -extern const MemoryGetLayout kLayout__741; -extern const MemoryPageInLayout kLayout__751; -extern const MemoryGet_SuperArm1Layout kLayout__750; -extern const MemoryPageOutLayout kLayout__752; -extern const MemoryGet_SuperLayout kLayout__749; -extern const MemoryArgLayout2LayoutArray kLayout__754; -extern const _Arguments_MemoryGet_SuperLayout kLayout__753; -extern const MemoryGetLayout kLayout__748; -extern const MemoryPageInLayout kLayout__758; -extern const MemoryGet_SuperArm1Layout kLayout__757; -extern const MemoryPageOutLayout kLayout__759; -extern const MemoryGet_SuperLayout kLayout__756; -extern const MemoryArgLayout2LayoutArray kLayout__761; -extern const _Arguments_MemoryGet_SuperLayout kLayout__760; -extern const MemoryGetLayout kLayout__755; -extern const MemoryPageInLayout kLayout__765; -extern const MemoryGet_SuperArm1Layout kLayout__764; -extern const MemoryPageOutLayout kLayout__766; -extern const MemoryGet_SuperLayout kLayout__763; -extern const MemoryArgLayout2LayoutArray kLayout__768; -extern const _Arguments_MemoryGet_SuperLayout kLayout__767; -extern const MemoryGetLayout kLayout__762; -extern const MemoryGetLayout8LayoutArray kLayout__712; -extern const PoseidonLoadInShortLayout kLayout__710; -extern const PoseidonLoadInLowLayout kLayout__769; -extern const PoseidonLoadInHighLayout kLayout__770; -extern const PoseidonLoadIn_SuperLayout kLayout__709; -extern const OneHot_3_Layout kLayout__771; -extern const _Arguments_PoseidonLoadIn_SuperLayout kLayout__772; -extern const PoseidonLoadInLayout kLayout__708; -extern const Poseidon0StateArm2Layout kLayout__707; -extern const Poseidon0StateArm3Layout kLayout__773; -extern const Poseidon0StateArm4Layout kLayout__774; -extern const PoseidonCheckOut__0_SuperLayout kLayout__781; -extern const PoseidonCheckOut__0_SuperLayout kLayout__782; -extern const PoseidonCheckOut__0_SuperLayout kLayout__783; -extern const PoseidonCheckOut__0_SuperLayout kLayout__784; -extern const PoseidonCheckOut__0_SuperLayout kLayout__785; -extern const PoseidonCheckOut__0_SuperLayout kLayout__786; -extern const PoseidonCheckOut__0_SuperLayout kLayout__787; -extern const PoseidonCheckOut__0_SuperLayout kLayout__788; -extern const PoseidonCheckOut__0_SuperLayout8LayoutArray kLayout__780; -extern const PoseidonCheckOutLayout kLayout__779; -extern const PoseidonDoOut_SuperArm0Layout kLayout__778; -extern const NondetU16RegLayout kLayout__792; -extern const NondetU16RegLayout kLayout__794; -extern const U16RegLayout kLayout__793; -extern const MemoryWriteLayout kLayout__795; -extern const PoseidonStoreOut__0_SuperLayout kLayout__791; -extern const NondetU16RegLayout kLayout__797; -extern const NondetU16RegLayout kLayout__799; -extern const U16RegLayout kLayout__798; -extern const MemoryWriteLayout kLayout__800; -extern const PoseidonStoreOut__0_SuperLayout kLayout__796; -extern const NondetU16RegLayout kLayout__802; -extern const U16RegLayout kLayout__803; -extern const MemoryWriteLayout kLayout__804; -extern const PoseidonStoreOut__0_SuperLayout kLayout__801; -extern const NondetU16RegLayout kLayout__806; -extern const NondetU16RegLayout kLayout__808; -extern const U16RegLayout kLayout__807; -extern const MemoryWriteLayout kLayout__809; -extern const PoseidonStoreOut__0_SuperLayout kLayout__805; -extern const NondetU16RegLayout kLayout__811; -extern const NondetU16RegLayout kLayout__813; -extern const U16RegLayout kLayout__812; -extern const MemoryWriteLayout kLayout__814; -extern const PoseidonStoreOut__0_SuperLayout kLayout__810; -extern const NondetU16RegLayout kLayout__817; -extern const U16RegLayout kLayout__816; -extern const MemoryWriteLayout kLayout__818; -extern const PoseidonStoreOut__0_SuperLayout kLayout__815; -extern const NondetU16RegLayout kLayout__820; -extern const NondetU16RegLayout kLayout__822; -extern const U16RegLayout kLayout__821; -extern const MemoryWriteLayout kLayout__823; -extern const PoseidonStoreOut__0_SuperLayout kLayout__819; -extern const NondetU16RegLayout kLayout__825; -extern const NondetU16RegLayout kLayout__827; -extern const U16RegLayout kLayout__826; -extern const MemoryWriteLayout kLayout__828; -extern const PoseidonStoreOut__0_SuperLayout kLayout__824; -extern const PoseidonStoreOut__0_SuperLayout8LayoutArray kLayout__790; -extern const PoseidonStoreOutLayout kLayout__789; -extern const PoseidonDoOut_SuperLayout kLayout__777; -extern const _Arguments_PoseidonDoOut_SuperLayout kLayout__829; -extern const PoseidonDoOutLayout kLayout__776; -extern const Poseidon0StateArm5Layout kLayout__775; -extern const PoseidonPaging_SuperLayout kLayout__832; -extern const NondetRegLayout6LayoutArray kLayout__834; -extern const OneHot_6_Layout kLayout__833; -extern const NondetU8RegLayout kLayout__837; -extern const U8RegLayout kLayout__836; -extern const IsU24Layout kLayout__835; -extern const _Arguments_PoseidonPaging__1Layout kLayout__838; -extern const NondetU8RegLayout kLayout__843; -extern const U8RegLayout kLayout__842; -extern const IsU24Layout kLayout__841; -extern const PoseidonPaging__1Arm0_SuperLayout kLayout__840; -extern const PoseidonPaging__1Arm1_SuperLayout kLayout__844; -extern const PoseidonPaging__1Layout kLayout__839; -extern const PoseidonPagingLayout kLayout__831; -extern const Poseidon0StateArm6Layout kLayout__830; -extern const PoseidonStoreState__0_SuperLayout kLayout__848; -extern const PoseidonStoreState__0_SuperLayout kLayout__849; -extern const PoseidonStoreState__0_SuperLayout kLayout__850; -extern const PoseidonStoreState__0_SuperLayout kLayout__851; -extern const PoseidonStoreState__0_SuperLayout kLayout__852; -extern const PoseidonStoreState__0_SuperLayout kLayout__853; -extern const PoseidonStoreState__0_SuperLayout kLayout__854; -extern const PoseidonStoreState__0_SuperLayout kLayout__855; -extern const PoseidonStoreState__0_SuperLayout8LayoutArray kLayout__847; -extern const PoseidonStoreStateLayout kLayout__846; -extern const Poseidon0StateArm7Layout kLayout__845; -extern const Poseidon0StateLayout kLayout__652; -extern const Poseidon0Layout kLayout__628; -extern const SBoxLayout24LayoutArray kLayout__861; -extern const DoExtRoundLayout kLayout__860; -extern const NondetRegLayout8LayoutArray kLayout__863; -extern const OneHot_8_Layout kLayout__862; -extern const DoExtRoundByIdxLayout kLayout__859; -extern const PoseidonExtRoundLayout kLayout__858; -extern const DoIntRoundLayout kLayout__867; -extern const DoIntRoundLayout kLayout__868; -extern const DoIntRoundLayout kLayout__869; -extern const DoIntRoundLayout kLayout__870; -extern const DoIntRoundLayout kLayout__871; -extern const DoIntRoundLayout kLayout__872; -extern const DoIntRoundLayout kLayout__873; -extern const DoIntRoundLayout kLayout__874; -extern const DoIntRoundLayout kLayout__875; -extern const DoIntRoundLayout kLayout__876; -extern const DoIntRoundLayout kLayout__877; -extern const DoIntRoundLayout kLayout__878; -extern const DoIntRoundLayout kLayout__879; -extern const DoIntRoundLayout kLayout__880; -extern const DoIntRoundLayout kLayout__881; -extern const DoIntRoundLayout kLayout__882; -extern const DoIntRoundLayout kLayout__883; -extern const DoIntRoundLayout kLayout__884; -extern const DoIntRoundLayout kLayout__885; -extern const DoIntRoundLayout kLayout__886; -extern const DoIntRoundLayout kLayout__887; -extern const DoIntRoundLayout21LayoutArray kLayout__866; -extern const DoIntRoundsLayout kLayout__865; -extern const PoseidonIntRoundsLayout kLayout__864; -extern const Poseidon1StateLayout kLayout__857; -extern const Poseidon1Layout kLayout__856; -extern const TopInstResultLayout kLayout__6; -extern const TopLayout kLayout__0; -extern const DigestRegValues_SuperLayout8LayoutArray kLayout__889; -extern const DigestRegLayout kLayout__888; -extern const DigestRegValues_SuperLayout8LayoutArray kLayout__891; -extern const DigestRegLayout kLayout__890; -extern const DigestRegValues_SuperLayout8LayoutArray kLayout__893; -extern const DigestRegLayout kLayout__892; -extern const DigestRegValues_SuperLayout8LayoutArray kLayout__895; -extern const DigestRegLayout kLayout__894; -extern const _accumLayout kLayout__896; -extern const LayoutAccumLayout kLayoutTestSuccRunAccum; -extern const LayoutAccumLayout kLayout_TopAccum; -extern const TestSuccRunLayout kLayoutTestSuccRun; -extern const TopLayout kLayout_Top; -extern const _globalLayout kLayoutGlobal; -extern const _mixLayout kLayoutMix; diff --git a/risc0/circuit/rv32im-v2-sys/kernels/cxx/preflight.h b/risc0/circuit/rv32im-v2-sys/kernels/cxx/preflight.h deleted file mode 100644 index 4b15dd17..00000000 --- a/risc0/circuit/rv32im-v2-sys/kernels/cxx/preflight.h +++ /dev/null @@ -1,49 +0,0 @@ -// Copyright 2024 RISC Zero, Inc. -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include - -namespace risc0::circuit::rv32im_v2::cpu { - -struct MemoryTransaction { - uint32_t addr; - uint32_t cycle; - uint32_t word; - uint32_t prevCycle; - uint32_t prevWord; -}; - -struct PreflightCycle { - uint32_t state; - uint32_t pc; - uint8_t major; - uint8_t minor; - uint8_t machineMode; - uint8_t padding; - uint32_t userCycle; - uint32_t txnIdx; - uint32_t pagingIdx; - uint32_t diffCount; -}; - -struct PreflightTrace { - PreflightCycle* cycles; - MemoryTransaction* txns; - uint32_t txnsLen; - uint32_t tableSplitCycle; -}; - -} // namespace risc0::circuit::rv32im_v2::cpu diff --git a/risc0/circuit/rv32im-v2-sys/kernels/cxx/rust_poly_fp_0.cpp b/risc0/circuit/rv32im-v2-sys/kernels/cxx/rust_poly_fp_0.cpp deleted file mode 100644 index aa3748cc..00000000 --- a/risc0/circuit/rv32im-v2-sys/kernels/cxx/rust_poly_fp_0.cpp +++ /dev/null @@ -1,10002 +0,0 @@ -// Copyright 2024 RISC Zero, Inc. -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -// This code is automatically generated - -#include "fp.h" -#include "fpext.h" - -#include - -constexpr size_t kInvRate = 4; - -// clang-format off -namespace risc0::circuit::rv32im_v2 { - -FpExt rv32im_v2_12(size_t cycle, size_t steps, FpExt* poly_mix, Fp* arg0, FpExt arg1, FpExt arg2, FpExt arg3, FpExt arg4, FpExt arg5, FpExt arg6, FpExt arg7, FpExt arg8, FpExt* arg9, Fp* arg10, Fp* arg11, Fp* arg12, Fp* arg13); -FpExt rv32im_v2_11(size_t cycle, size_t steps, FpExt* poly_mix, FpExt arg0, Fp* arg1, FpExt arg2, FpExt arg3, FpExt arg4, FpExt arg5, FpExt* arg6, Fp* arg7, Fp* arg8, Fp* arg9, Fp* arg10); -FpExt rv32im_v2_10(size_t cycle, size_t steps, FpExt* poly_mix, Fp* arg0, FpExt arg1, FpExt arg2, FpExt arg3, FpExt arg4, FpExt arg5, FpExt arg6, FpExt arg7, FpExt arg8, FpExt arg9, FpExt arg10, FpExt arg11, FpExt* arg12, FpExt arg13, Fp* arg14, Fp* arg15, Fp* arg16, Fp* arg17); -FpExt rv32im_v2_9(size_t cycle, size_t steps, FpExt* poly_mix, FpExt arg0, Fp* arg1, FpExt arg2, FpExt arg3, FpExt arg4, FpExt arg5, FpExt arg6, FpExt arg7, FpExt arg8, FpExt* arg9, FpExt arg10, Fp* arg11, Fp* arg12, Fp* arg13, Fp* arg14); -FpExt rv32im_v2_8(size_t cycle, size_t steps, FpExt* poly_mix, Fp* arg0, FpExt arg1, FpExt arg2, FpExt arg3, FpExt arg4, FpExt arg5, FpExt arg6, FpExt arg7, FpExt* arg8, FpExt arg9, Fp* arg10, Fp* arg11, Fp* arg12, Fp* arg13); -FpExt rv32im_v2_7(size_t cycle, size_t steps, FpExt* poly_mix, FpExt arg0, FpExt arg1, Fp* arg2, FpExt arg3, FpExt arg4, FpExt arg5, FpExt* arg6, FpExt arg7, Fp* arg8, Fp* arg9, Fp* arg10, Fp* arg11); -FpExt rv32im_v2_6(size_t cycle, size_t steps, FpExt* poly_mix, Fp* arg0, FpExt arg1, FpExt arg2, FpExt* arg3, FpExt arg4, FpExt arg5, FpExt arg6, FpExt arg7, FpExt arg8, Fp* arg9, Fp* arg10, Fp* arg11, Fp* arg12); -FpExt rv32im_v2_5(size_t cycle, size_t steps, FpExt* poly_mix, Fp* arg0, FpExt arg1, FpExt* arg2, FpExt arg3, FpExt arg4, FpExt arg5, FpExt arg6, FpExt arg7, Fp* arg8, Fp* arg9, Fp* arg10); -FpExt rv32im_v2_4(size_t cycle, size_t steps, FpExt* poly_mix, Fp* arg0, FpExt arg1, FpExt* arg2, FpExt arg3, FpExt arg4, FpExt arg5, Fp* arg6, Fp* arg7, Fp* arg8); -FpExt rv32im_v2_3(size_t cycle, size_t steps, FpExt* poly_mix, Fp* arg0, FpExt arg1, FpExt* arg2, FpExt arg3, FpExt arg4, FpExt arg5, FpExt arg6, Fp* arg7, Fp* arg8, Fp* arg9); -FpExt rv32im_v2_2(size_t cycle, size_t steps, FpExt* poly_mix, Fp* arg0, FpExt arg1, FpExt* arg2, FpExt arg3, FpExt arg4, FpExt arg5, FpExt arg6, Fp* arg7, Fp* arg8, Fp* arg9); -FpExt rv32im_v2_1(size_t cycle, size_t steps, FpExt* poly_mix, FpExt* arg0, FpExt arg1, FpExt arg2, FpExt arg3, Fp* arg4, Fp* arg5, Fp* arg6); -FpExt rv32im_v2_0(size_t cycle, size_t steps, FpExt* poly_mix, FpExt* arg0, FpExt arg1, FpExt arg2, FpExt arg3, Fp* arg4, Fp* arg5); -FpExt poly_fp(size_t cycle, size_t steps, FpExt* poly_mix, Fp** args); - -FpExt rv32im_v2_12(size_t cycle, size_t steps, FpExt* poly_mix, Fp* arg0, FpExt arg1, FpExt arg2, FpExt arg3, FpExt arg4, FpExt arg5, FpExt arg6, FpExt arg7, FpExt arg8, FpExt* arg9, Fp* arg10, Fp* arg11, Fp* arg12, Fp* arg13) { - size_t mask = steps - 1; - // loc(unknown) - constexpr Fp x0(115); - // loc(unknown) - constexpr Fp x1(23); - // loc(unknown) - constexpr Fp x2(55); - // loc(unknown) - constexpr Fp x3(103); - // loc(unknown) - constexpr Fp x4(111); - // loc(unknown) - constexpr Fp x5(5); - // loc(unknown) - constexpr Fp x6(65520); - // loc(unknown) - constexpr Fp x7(99); - // loc(unknown) - constexpr Fp x8(0); - // loc(unknown) - constexpr Fp x9(2013265920); - // loc(unknown) - constexpr Fp x10(65536); - // loc(unknown) - constexpr Fp x11(16384); - // loc(unknown) - constexpr Fp x12(8192); - // loc(unknown) - constexpr Fp x13(4096); - // loc(unknown) - constexpr Fp x14(2048); - // loc(unknown) - constexpr Fp x15(1024); - // loc(unknown) - constexpr Fp x16(512); - // loc(unknown) - constexpr Fp x17(256); - // loc(unknown) - constexpr Fp x18(128); - // loc(unknown) - constexpr Fp x19(64); - // loc(unknown) - constexpr Fp x20(32); - // loc(unknown) - constexpr Fp x21(16); - // loc(unknown) - constexpr Fp x22(8); - // loc(unknown) - constexpr Fp x23(4); - // loc(unknown) - constexpr Fp x24(19); - // loc(unknown) - constexpr Fp x25(3); - // loc(unknown) - constexpr Fp x26(2); - // loc(unknown) - constexpr Fp x27(1006632961); - // loc(unknown) - constexpr Fp x28(32768); - // loc(unknown) - constexpr Fp x29(1); - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x30 = arg10[31 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x31 = arg10[120 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :126:34) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :134:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x32 = arg10[32 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x33 = arg10[103 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x34 = arg10[33 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x35 = arg10[121 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :126:34) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :135:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x36 = arg10[34 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x37 = arg10[114 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x38 = arg10[35 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x39 = arg10[122 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :126:34) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :136:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x40 = arg10[36 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x41 = arg10[30 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x42 = arg10[123 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x43 = arg10[124 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x44 = arg10[24 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x45 = arg10[25 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :34:30) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x46 = arg10[77 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x47 = arg10[27 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x48 = arg10[29 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x49 = arg10[26 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x50 = arg10[102 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x51 = arg10[113 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x52 = arg10[19 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x53 = arg10[20 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x54 = arg10[118 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x55 = arg10[134 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x56 = arg10[119 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x57 = arg10[135 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x58 = arg10[120 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x59 = arg10[136 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x60 = arg10[121 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x61 = arg10[137 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x62 = arg10[122 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x63 = arg10[138 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x64 = arg10[123 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x65 = arg10[139 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x66 = arg10[124 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x67 = arg10[140 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x68 = arg10[125 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x69 = arg10[141 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x70 = arg10[126 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x71 = arg10[142 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x72 = arg10[127 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x73 = arg10[143 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x74 = arg10[128 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x75 = arg10[144 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x76 = arg10[129 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x77 = arg10[145 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x78 = arg10[130 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x79 = arg10[146 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x80 = arg10[131 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x81 = arg10[147 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x82 = arg10[132 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x83 = arg10[148 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x84 = arg10[133 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x85 = arg10[149 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x86 = arg10[21 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x87 = arg10[22 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x88 = arg10[23 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x89 = arg10[150 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x90 = arg10[166 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x91 = arg10[151 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x92 = arg10[167 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x93 = arg10[152 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x94 = arg10[168 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x95 = arg10[153 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x96 = arg10[169 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x97 = arg10[154 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x98 = arg10[170 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x99 = arg10[155 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x100 = arg10[171 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x101 = arg10[156 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x102 = arg10[172 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x103 = arg10[157 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x104 = arg10[173 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x105 = arg10[158 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x106 = arg10[174 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x107 = arg10[159 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x108 = arg10[175 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x109 = arg10[160 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x110 = arg10[176 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x111 = arg10[161 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x112 = arg10[177 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x113 = arg10[162 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x114 = arg10[178 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x115 = arg10[163 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x116 = arg10[179 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x117 = arg10[164 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x118 = arg10[180 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x119 = arg10[165 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x120 = arg10[181 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :28:29) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x121 = arg10[37 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :45:28) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x122 = arg10[39 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x123 = arg10[38 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :28:29) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x124 = arg10[40 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :51:29) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x125 = arg10[42 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x126 = arg10[41 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :28:29) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x127 = arg10[43 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :45:28) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x128 = arg10[45 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x129 = arg10[44 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :28:29) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x130 = arg10[46 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :51:29) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x131 = arg10[48 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x132 = arg10[47 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :8:23) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x133 = arg10[49 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :11:20) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x134 = arg10[50 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :42:21) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x135 = arg10[51 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :25:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x136 = arg10[53 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :25:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x137 = arg10[57 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :26:28) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x138 = arg10[52 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :48:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x139 = arg10[0 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :27:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x140 = arg10[54 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( CycleArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :54:29) at callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :60:19) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x141 = arg10[60 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( CycleArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :55:29) at callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :60:19) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x142 = arg10[61 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x143 = arg10[58 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x144 = arg10[59 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x145 = arg10[1 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :29:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x146 = arg10[76 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x147 = arg10[118 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x148 = arg10[119 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x149 = arg10[2 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :21:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x150 = arg10[68 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :15:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x151 = arg10[62 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :23:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x152 = arg10[70 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x153 = arg10[93 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x154 = arg10[3 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :8:23) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x155 = arg10[82 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :11:20) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x156 = arg10[83 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :28:29) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :69:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x157 = arg10[84 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :69:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x158 = arg10[85 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :26:28) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x159 = arg10[86 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :25:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x160 = arg10[87 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :27:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x161 = arg10[88 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :48:14) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x162 = arg0[0]; - // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:23) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x163 = arg0[1]; - // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:9) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x164 = x162 - x163; - // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:9) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x165 = arg1 + x164 * poly_mix[8]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x166 = arg0[2]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :125:24) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :134:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x167 = x165 + x166 * poly_mix[9]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :126:34) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :134:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x168 = x30 - x29; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :126:34) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :134:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg0[146] = x168; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :126:34) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :134:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x169 = x167 + x168 * poly_mix[10]; - // loc(callsite(unknown at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :127:13) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :134:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x170 = x31 * x28; - // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :127:29) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :134:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x171 = x32 * x27; - // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :127:29) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :134:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg0[192] = x171; - // loc(callsite(unknown at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :127:22) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :134:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x172 = x170 + x171; - // loc(callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :127:11) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :134:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x173 = x33 - x172; - // loc(callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :127:11) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :134:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x174 = x169 + x173 * poly_mix[11]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x175 = arg0[3]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :125:24) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :135:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x176 = x174 + x175 * poly_mix[12]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :126:34) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :135:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x177 = x34 - x29; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :126:34) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :135:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg0[147] = x177; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :126:34) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :135:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x178 = x176 + x177 * poly_mix[13]; - // loc(callsite(unknown at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :127:13) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :135:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x179 = x35 * x28; - // loc(callsite(unknown at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :127:13) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :135:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg0[152] = x179; - // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :127:29) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :135:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x180 = x36 * x27; - // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :127:29) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :135:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg0[176] = x180; - // loc(callsite(unknown at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :127:22) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :135:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x181 = x179 + x180; - // loc(callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :127:11) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :135:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x182 = x37 - x181; - // loc(callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :127:11) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :135:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x183 = x178 + x182 * poly_mix[14]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x184 = arg0[4]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :125:24) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :136:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x185 = x183 + x184 * poly_mix[15]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :126:34) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :136:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x186 = x38 - x29; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :126:34) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :136:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg0[149] = x186; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :126:34) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :136:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x187 = x185 + x186 * poly_mix[16]; - // loc(callsite(unknown at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :127:13) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :136:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x188 = x39 * x28; - // loc(callsite(unknown at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :127:13) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :136:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg0[153] = x188; - // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :127:29) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :136:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x189 = x40 * x27; - // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :127:29) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :136:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg0[183] = x189; - // loc(callsite(unknown at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :127:22) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :136:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x190 = x188 + x189; - // loc(callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :127:11) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :136:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x191 = x41 - x190; - // loc(callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :127:11) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :136:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x192 = x187 + x191 * poly_mix[17]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x193 = arg0[5]; - // loc(callsite(unknown at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :138:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x194 = x31 * x193; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x195 = arg0[6]; - // loc(callsite(unknown at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :138:32) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x196 = x194 * x195; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x197 = arg0[7]; - // loc(callsite(unknown at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :138:54) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x198 = x197 * x35; - // loc(callsite(unknown at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :138:58) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x199 = x198 * x39; - // loc(callsite(unknown at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :138:43) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x200 = x196 + x199; - // loc(callsite( Reg ( :5:7) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :138:19) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x201 = x200 - x42; - // loc(callsite( Reg ( :5:7) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :138:19) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x202 = x192 + x201 * poly_mix[18]; - // loc(callsite(unknown at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :140:31) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x203 = x42 + x39; - // loc(callsite(unknown at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :140:47) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x204 = x42 * x26; - // loc(callsite(unknown at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :140:51) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x205 = x204 * x39; - // loc(callsite(unknown at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :140:42) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x206 = x203 - x205; - // loc(callsite( Reg ( :5:7) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :140:30) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x207 = x206 - x43; - // loc(callsite( Reg ( :5:7) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :140:30) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x208 = x202 + x207 * poly_mix[19]; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x209 = arg2 + x44 * x208 * poly_mix[261]; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :60:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x210 = arg0[8]; - // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at callsite( OpSLTU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :117:20) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :37:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x211 = x210 - x25; - // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at callsite( OpSLTU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :117:20) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :37:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x212 = arg3 + x211 * poly_mix[1]; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :59:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x213 = arg0[9]; - // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at callsite( OpSLTU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :117:20) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :37:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x214 = x212 + x213 * poly_mix[2]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x215 = arg0[10]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( CmpLessThanUnsigned ( zirgen/circuit/rv32im/v2/dsl/u32.zir :119:24) at callsite( OpSLTU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :118:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :37:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x216 = x214 + x215 * poly_mix[3]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x217 = arg0[11]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :45:28) at callsite( CmpLessThanUnsigned ( zirgen/circuit/rv32im/v2/dsl/u32.zir :119:24) at callsite( OpSLTU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :118:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :37:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x218 = x216 + x217 * poly_mix[4]; - // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:10) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x219 = arg0[12]; - // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:10) at callsite( CmpLessThanUnsigned ( zirgen/circuit/rv32im/v2/dsl/u32.zir :119:24) at callsite( OpSLTU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :118:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :37:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x220 = x218 + x219 * poly_mix[5]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x221 = arg0[13]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( CmpLessThanUnsigned ( zirgen/circuit/rv32im/v2/dsl/u32.zir :119:24) at callsite( OpSLTU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :118:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :37:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x222 = x220 + x221 * poly_mix[6]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x223 = arg0[14]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :51:29) at callsite( CmpLessThanUnsigned ( zirgen/circuit/rv32im/v2/dsl/u32.zir :119:24) at callsite( OpSLTU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :118:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :37:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x224 = x222 + x223 * poly_mix[7]; - // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:9) at callsite( CmpLessThanUnsigned ( zirgen/circuit/rv32im/v2/dsl/u32.zir :119:24) at callsite( OpSLTU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :118:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :37:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x225 = x224 + x164 * poly_mix[8]; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x226 = x225 + x30 * poly_mix[9]; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x227 = x226 + x34 * poly_mix[10]; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x228 = x227 + x38 * poly_mix[11]; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x229 = x209 + x45 * x228 * poly_mix[272]; - // loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :57:19) at callsite( OpADDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :123:18) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :38:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x230 = x46 - x24; - // loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :57:19) at callsite( OpADDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :123:18) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :38:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x231 = arg4 + x230 * poly_mix[0]; - // loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at callsite( OpADDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :123:18) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :38:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x232 = x231 + x210 * poly_mix[1]; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x233 = x232 + x47 * poly_mix[2]; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x234 = x233 + x48 * poly_mix[3]; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x235 = x234 + x30 * poly_mix[4]; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x236 = x235 + x34 * poly_mix[5]; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x237 = x236 + x38 * poly_mix[6]; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x238 = x229 + x49 * x237 * poly_mix[275]; - // loc(callsite(unknown at callsite( AddU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :27:21) at callsite( OpADD ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :87:26) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :31:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x239 = x50 + x51; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x240 = x239 * x52; - // loc(callsite(unknown at callsite( SubU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :33:31) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:31) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x241 = arg0[15]; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x242 = x241 * x53; - // loc(callsite(unknown at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :148:38) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x243 = x54 * x55; - // loc(callsite(unknown at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :148:38) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x244 = x56 * x57; - // loc(callsite(unknown at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :148:38) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x245 = x58 * x59; - // loc(callsite(unknown at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :148:38) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x246 = x60 * x61; - // loc(callsite(unknown at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :148:38) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x247 = x62 * x63; - // loc(callsite(unknown at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :148:38) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x248 = x64 * x65; - // loc(callsite(unknown at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :148:38) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x249 = x66 * x67; - // loc(callsite(unknown at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :148:38) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x250 = x68 * x69; - // loc(callsite(unknown at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :148:38) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x251 = x70 * x71; - // loc(callsite(unknown at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :148:38) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x252 = x72 * x73; - // loc(callsite(unknown at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :148:38) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x253 = x74 * x75; - // loc(callsite(unknown at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :148:38) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x254 = x76 * x77; - // loc(callsite(unknown at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :148:38) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x255 = x78 * x79; - // loc(callsite(unknown at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :148:38) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x256 = x80 * x81; - // loc(callsite(unknown at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :148:38) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x257 = x82 * x83; - // loc(callsite(unknown at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :148:38) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x258 = x84 * x85; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x259 = x244 * x26; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x260 = x245 * x23; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x261 = x246 * x22; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x262 = x247 * x21; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x263 = x248 * x20; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x264 = x249 * x19; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x265 = x250 * x18; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x266 = x251 * x17; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x267 = x252 * x16; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x268 = x253 * x15; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x269 = x254 * x14; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x270 = x255 * x13; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x271 = x256 * x12; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x272 = x257 * x11; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x273 = x258 * x28; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x274 = x243 + x259; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x275 = x274 + x260; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x276 = x275 + x261; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x277 = x276 + x262; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x278 = x277 + x263; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x279 = x278 + x264; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x280 = x279 + x265; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x281 = x280 + x266; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x282 = x281 + x267; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x283 = x282 + x268; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x284 = x283 + x269; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x285 = x284 + x270; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x286 = x285 + x271; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x287 = x286 + x272; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x288 = x287 + x273; - // loc(callsite(unknown at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :165:27) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x289 = x288 * x26; - // loc(callsite(unknown at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :165:21) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x290 = x239 - x289; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x291 = x290 * x86; - // loc(callsite(unknown at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :160:21) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x292 = x239 - x288; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x293 = x292 * x87; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x294 = x288 * x88; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x295 = x66 * x44; - // loc(callsite(unknown at callsite( CmpLessThanUnsigned ( zirgen/circuit/rv32im/v2/dsl/u32.zir :120:27) at callsite( OpSLTU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :118:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :37:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x296 = x29 - x56; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x297 = x296 * x45; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :66:53) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x298 = arg0[16]; - // loc(callsite(unknown at callsite( AddU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :27:21) at callsite( OpADDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :124:26) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :38:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x299 = x50 + x298; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x300 = x299 * x49; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x301 = x240 + x242; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x302 = x301 + x291; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x303 = x302 + x293; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x304 = x303 + x294; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x305 = x304 + x295; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x306 = x305 + x297; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x307 = x306 + x300; - // loc(callsite(unknown at callsite( AddU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :27:36) at callsite( OpADD ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :87:26) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :31:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x308 = x33 + x37; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x309 = x308 * x52; - // loc(callsite(unknown at callsite( SubU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :33:55) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:31) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x310 = arg0[17]; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x311 = x310 * x53; - // loc(callsite(unknown at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :148:38) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x312 = x89 * x90; - // loc(callsite(unknown at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :148:38) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x313 = x91 * x92; - // loc(callsite(unknown at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :148:38) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x314 = x93 * x94; - // loc(callsite(unknown at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :148:38) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x315 = x95 * x96; - // loc(callsite(unknown at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :148:38) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x316 = x97 * x98; - // loc(callsite(unknown at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :148:38) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x317 = x99 * x100; - // loc(callsite(unknown at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :148:38) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x318 = x101 * x102; - // loc(callsite(unknown at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :148:38) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x319 = x103 * x104; - // loc(callsite(unknown at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :148:38) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x320 = x105 * x106; - // loc(callsite(unknown at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :148:38) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x321 = x107 * x108; - // loc(callsite(unknown at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :148:38) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x322 = x109 * x110; - // loc(callsite(unknown at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :148:38) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x323 = x111 * x112; - // loc(callsite(unknown at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :148:38) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x324 = x113 * x114; - // loc(callsite(unknown at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :148:38) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x325 = x115 * x116; - // loc(callsite(unknown at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :148:38) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x326 = x117 * x118; - // loc(callsite(unknown at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :148:38) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x327 = x119 * x120; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x328 = x313 * x26; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x329 = x314 * x23; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x330 = x315 * x22; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x331 = x316 * x21; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x332 = x317 * x20; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x333 = x318 * x19; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x334 = x319 * x18; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x335 = x320 * x17; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x336 = x321 * x16; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x337 = x322 * x15; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x338 = x323 * x14; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x339 = x324 * x13; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x340 = x325 * x12; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x341 = x326 * x11; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x342 = x327 * x28; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x343 = x312 + x328; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x344 = x343 + x329; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x345 = x344 + x330; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x346 = x345 + x331; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x347 = x346 + x332; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x348 = x347 + x333; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x349 = x348 + x334; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x350 = x349 + x335; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x351 = x350 + x336; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x352 = x351 + x337; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x353 = x352 + x338; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x354 = x353 + x339; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x355 = x354 + x340; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x356 = x355 + x341; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x357 = x356 + x342; - // loc(callsite(unknown at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :165:59) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x358 = x357 * x26; - // loc(callsite(unknown at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :165:52) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x359 = x308 - x358; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x360 = x359 * x86; - // loc(callsite(unknown at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :160:50) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x361 = x308 - x357; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x362 = x361 * x87; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x363 = x357 * x88; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :66:63) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x364 = arg0[18]; - // loc(callsite(unknown at callsite( AddU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :27:36) at callsite( OpADDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :124:26) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :38:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x365 = x33 + x364; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x366 = x365 * x49; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x367 = x309 + x311; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x368 = x367 + x360; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x369 = x368 + x362; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x370 = x369 + x363; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x371 = x370 + x366; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x372 = x121 - x29; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - arg0[150] = x372; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x373 = x238 + x372 * poly_mix[277]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :45:28) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x374 = x29 - x122; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :45:28) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x375 = x122 * x374; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :45:28) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg0[203] = x375; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :45:28) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x376 = x373 + x375 * poly_mix[278]; - // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:12) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x377 = x122 * x10; - // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:23) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x378 = x377 + x123; - // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:10) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x379 = x307 - x378; - // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:10) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x380 = x376 + x379 * poly_mix[279]; - // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :48:14) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x381 = x371 + x122; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x382 = x124 - x29; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - arg0[239] = x382; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x383 = x380 + x382 * poly_mix[280]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :51:29) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x384 = x29 - x125; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :51:29) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x385 = x125 * x384; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :51:29) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg0[204] = x385; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :51:29) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x386 = x383 + x385 * poly_mix[281]; - // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:11) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x387 = x125 * x10; - // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:23) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x388 = x387 + x126; - // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:9) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x389 = x381 - x388; - // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:9) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x390 = x386 + x389 * poly_mix[282]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x391 = x127 - x29; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - arg0[144] = x391; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x392 = x390 + x391 * poly_mix[283]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :45:28) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x393 = x29 - x128; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :45:28) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x394 = x128 * x393; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :45:28) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg0[205] = x394; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :45:28) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x395 = x392 + x394 * poly_mix[284]; - // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:12) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x396 = x128 * x10; - // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:23) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x397 = x396 + x129; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x398 = arg0[19]; - // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:10) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x399 = x398 - x397; - // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:10) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x400 = x395 + x399 * poly_mix[285]; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x401 = arg0[20]; - // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :48:14) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x402 = x401 + x128; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x403 = x130 - x29; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x404 = x400 + x403 * poly_mix[286]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :51:29) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x405 = x29 - x131; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :51:29) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x406 = x131 * x405; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :51:29) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg0[226] = x406; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :51:29) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x407 = x404 + x406 * poly_mix[287]; - // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:11) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x408 = x131 * x10; - // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:23) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x409 = x408 + x132; - // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:9) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x410 = x402 - x409; - // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:9) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x411 = x407 + x410 * poly_mix[288]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x412 = x29 - x133; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x413 = x133 * x412; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg0[227] = x413; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x414 = x411 + x413 * poly_mix[289]; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :57:39) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x415 = arg0[21]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:4) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x416 = x415 * x134; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x417 = x416 - x412; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x418 = x414 + x417 * poly_mix[290]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:4) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x419 = x133 * x415; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:17) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x420 = x418 + x419 * poly_mix[291]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:4) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x421 = x133 * x134; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:17) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x422 = x420 + x421 * poly_mix[292]; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:4) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x423 = arg0[22]; - // loc(callsite(unknown at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :40:26) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x424 = x412 * x423; - // loc(callsite(unknown at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :41:11) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x425 = x424 * x415; - // loc(callsite(unknown at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :42:90) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x426 = x29 - x424; - // loc(callsite(unknown at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :42:102) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x427 = x426 * x19; - // loc(callsite(unknown at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :34:44) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x428 = arg0[23]; - // loc(callsite(unknown at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :42:85) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x429 = x428 + x427; - // loc(callsite(unknown at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :42:106) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x430 = x429 + x425; - // loc(callsite( Reg ( :5:7) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :42:21) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x431 = x430 - x135; - // loc(callsite( Reg ( :5:7) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :42:21) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x432 = x422 + x431 * poly_mix[293]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x433 = x136 - x9; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x434 = x432 + x433 * poly_mix[294]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x435 = x137 - x29; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg0[145] = x435; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x436 = x434 + x435 * poly_mix[295]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x437 = x436 + x8 * poly_mix[296]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x438 = x437 + x8 * poly_mix[297]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x439 = x138 - x135; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x440 = x438 + x439 * poly_mix[298]; - // loc(callsite(unknown at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:22) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x441 = x139 - x140; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x442 = x141 - x29; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x443 = x440 + x442 * poly_mix[299]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x444 = x142 - x441; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x445 = x443 + x444 * poly_mix[300]; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x446 = x143 - x123; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x447 = x445 + x446 * poly_mix[301]; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x448 = x144 - x126; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x449 = x447 + x448 * poly_mix[302]; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - FpExt x450 = arg5 + x145 * x449 * poly_mix[24]; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :68:45) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :44:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x451 = x146 * x14; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :66:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x452 = arg0[24]; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :68:36) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :44:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x453 = x452 + x451; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :58:47) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x454 = arg0[25]; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :68:61) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :44:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x455 = x454 * x20; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :68:53) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :44:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x456 = x453 + x455; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :57:17) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x457 = arg0[26]; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :68:72) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :44:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x458 = x456 + x457; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :57:30) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x459 = arg0[27]; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :68:86) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :44:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x460 = x458 + x459; - // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :96:20) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x461 = arg0[28]; - // loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :128:18) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x462 = x231 + x461 * poly_mix[1]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x463 = x462 + x217 * poly_mix[2]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x464 = x463 + x223 * poly_mix[3]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x465 = x464 + x166 * poly_mix[4]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x466 = x465 + x175 * poly_mix[5]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x467 = x466 + x184 * poly_mix[6]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x468 = arg0[29]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x469 = x467 + x468 * poly_mix[7]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x470 = arg0[30]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x471 = x469 + x470 * poly_mix[8]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x472 = arg0[31]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x473 = x471 + x472 * poly_mix[9]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x474 = arg0[32]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x475 = x473 + x474 * poly_mix[10]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x476 = arg0[33]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x477 = x475 + x476 * poly_mix[11]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x478 = arg0[34]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x479 = x477 + x478 * poly_mix[12]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x480 = arg0[35]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x481 = x479 + x480 * poly_mix[13]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x482 = arg0[36]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x483 = x481 + x482 * poly_mix[14]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x484 = arg0[37]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x485 = x483 + x484 * poly_mix[15]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x486 = arg0[38]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x487 = x485 + x486 * poly_mix[16]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x488 = arg0[39]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x489 = x487 + x488 * poly_mix[17]; - // loc(callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:6) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x490 = arg0[40]; - // loc(callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:6) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x491 = x489 + x490 * poly_mix[18]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x492 = arg0[41]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x493 = x491 + x492 * poly_mix[19]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x494 = arg0[42]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x495 = x493 + x494 * poly_mix[20]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x496 = arg0[43]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x497 = x495 + x496 * poly_mix[21]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x498 = arg0[44]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x499 = x497 + x498 * poly_mix[22]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x500 = arg0[45]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x501 = x499 + x500 * poly_mix[23]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x502 = arg0[46]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x503 = x501 + x502 * poly_mix[24]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x504 = arg0[47]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x505 = x503 + x504 * poly_mix[25]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x506 = arg0[48]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x507 = x505 + x506 * poly_mix[26]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x508 = arg0[49]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x509 = x507 + x508 * poly_mix[27]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x510 = arg0[50]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x511 = x509 + x510 * poly_mix[28]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x512 = arg0[51]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x513 = x511 + x512 * poly_mix[29]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x514 = arg0[52]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x515 = x513 + x514 * poly_mix[30]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x516 = arg0[53]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x517 = x515 + x516 * poly_mix[31]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x518 = arg0[54]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x519 = x517 + x518 * poly_mix[32]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x520 = arg0[55]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x521 = x519 + x520 * poly_mix[33]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x522 = arg0[56]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x523 = x521 + x522 * poly_mix[34]; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x524 = arg0[57]; - // loc(callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:6) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x525 = x298 - x524; - // loc(callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:6) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x526 = x523 + x525 * poly_mix[35]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x527 = arg0[58]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x528 = x526 + x527 * poly_mix[36]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x529 = arg0[59]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x530 = x528 + x529 * poly_mix[37]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x531 = arg0[60]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x532 = x530 + x531 * poly_mix[38]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x533 = arg0[61]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x534 = x532 + x533 * poly_mix[39]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x535 = arg0[62]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x536 = x534 + x535 * poly_mix[40]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x537 = arg0[63]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x538 = x536 + x537 * poly_mix[41]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x539 = arg0[64]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x540 = x538 + x539 * poly_mix[42]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x541 = arg0[65]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x542 = x540 + x541 * poly_mix[43]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x543 = arg0[66]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x544 = x542 + x543 * poly_mix[44]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x545 = arg0[67]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x546 = x544 + x545 * poly_mix[45]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x547 = arg0[68]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x548 = x546 + x547 * poly_mix[46]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x549 = arg0[69]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x550 = x548 + x549 * poly_mix[47]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x551 = arg0[70]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x552 = x550 + x551 * poly_mix[48]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x553 = arg0[71]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x554 = x552 + x553 * poly_mix[49]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x555 = arg0[72]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x556 = x554 + x555 * poly_mix[50]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x557 = arg0[73]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x558 = x556 + x557 * poly_mix[51]; - // loc(callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:6) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x559 = arg0[74]; - // loc(callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:6) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x560 = x558 + x559 * poly_mix[52]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x561 = arg0[75]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x562 = x560 + x561 * poly_mix[53]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x563 = arg0[76]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x564 = x562 + x563 * poly_mix[54]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x565 = arg0[77]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x566 = x564 + x565 * poly_mix[55]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x567 = arg0[78]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x568 = x566 + x567 * poly_mix[56]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x569 = arg0[79]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x570 = x568 + x569 * poly_mix[57]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x571 = arg0[80]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x572 = x570 + x571 * poly_mix[58]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x573 = arg0[81]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x574 = x572 + x573 * poly_mix[59]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x575 = arg0[82]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x576 = x574 + x575 * poly_mix[60]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x577 = arg0[83]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x578 = x576 + x577 * poly_mix[61]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x579 = arg0[84]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x580 = x578 + x579 * poly_mix[62]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x581 = arg0[85]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x582 = x580 + x581 * poly_mix[63]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x583 = arg0[86]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x584 = x582 + x583 * poly_mix[64]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x585 = arg0[87]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x586 = x584 + x585 * poly_mix[65]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x587 = arg0[88]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x588 = x586 + x587 * poly_mix[66]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x589 = arg0[89]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x590 = x588 + x589 * poly_mix[67]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x591 = arg0[90]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x592 = x590 + x591 * poly_mix[68]; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x593 = arg0[91]; - // loc(callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:6) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x594 = x364 - x593; - // loc(callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:6) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x595 = x592 + x594 * poly_mix[69]; - // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x596 = x595 + x47 * poly_mix[70]; - // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x597 = x596 + x48 * poly_mix[71]; - // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x598 = x597 + x30 * poly_mix[72]; - // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x599 = x598 + x34 * poly_mix[73]; - // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x600 = x599 + x38 * poly_mix[74]; - // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x601 = arg6 + x52 * x600 * poly_mix[59]; - // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :101:20) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x602 = arg0[92]; - // loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :133:18) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x603 = x231 + x602 * poly_mix[1]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x604 = x603 + x217 * poly_mix[2]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x605 = x604 + x223 * poly_mix[3]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x606 = x605 + x166 * poly_mix[4]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x607 = x606 + x175 * poly_mix[5]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x608 = x607 + x184 * poly_mix[6]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x609 = x608 + x468 * poly_mix[7]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x610 = x609 + x470 * poly_mix[8]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x611 = x610 + x472 * poly_mix[9]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x612 = x611 + x474 * poly_mix[10]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x613 = x612 + x476 * poly_mix[11]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x614 = x613 + x478 * poly_mix[12]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x615 = x614 + x480 * poly_mix[13]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x616 = x615 + x482 * poly_mix[14]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x617 = x616 + x484 * poly_mix[15]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x618 = x617 + x486 * poly_mix[16]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x619 = x618 + x488 * poly_mix[17]; - // loc(callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:6) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x620 = x619 + x490 * poly_mix[18]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x621 = x620 + x492 * poly_mix[19]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x622 = x621 + x494 * poly_mix[20]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x623 = x622 + x496 * poly_mix[21]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x624 = x623 + x498 * poly_mix[22]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x625 = x624 + x500 * poly_mix[23]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x626 = x625 + x502 * poly_mix[24]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x627 = x626 + x504 * poly_mix[25]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x628 = x627 + x506 * poly_mix[26]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x629 = x628 + x508 * poly_mix[27]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x630 = x629 + x510 * poly_mix[28]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x631 = x630 + x512 * poly_mix[29]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x632 = x631 + x514 * poly_mix[30]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x633 = x632 + x516 * poly_mix[31]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x634 = x633 + x518 * poly_mix[32]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x635 = x634 + x520 * poly_mix[33]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x636 = x635 + x522 * poly_mix[34]; - // loc(callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:6) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x637 = x636 + x525 * poly_mix[35]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x638 = x637 + x527 * poly_mix[36]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x639 = x638 + x529 * poly_mix[37]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x640 = x639 + x531 * poly_mix[38]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x641 = x640 + x533 * poly_mix[39]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x642 = x641 + x535 * poly_mix[40]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x643 = x642 + x537 * poly_mix[41]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x644 = x643 + x539 * poly_mix[42]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x645 = x644 + x541 * poly_mix[43]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x646 = x645 + x543 * poly_mix[44]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x647 = x646 + x545 * poly_mix[45]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x648 = x647 + x547 * poly_mix[46]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x649 = x648 + x549 * poly_mix[47]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x650 = x649 + x551 * poly_mix[48]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x651 = x650 + x553 * poly_mix[49]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x652 = x651 + x555 * poly_mix[50]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x653 = x652 + x557 * poly_mix[51]; - // loc(callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:6) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x654 = x653 + x559 * poly_mix[52]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x655 = x654 + x561 * poly_mix[53]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x656 = x655 + x563 * poly_mix[54]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x657 = x656 + x565 * poly_mix[55]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x658 = x657 + x567 * poly_mix[56]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x659 = x658 + x569 * poly_mix[57]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x660 = x659 + x571 * poly_mix[58]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x661 = x660 + x573 * poly_mix[59]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x662 = x661 + x575 * poly_mix[60]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x663 = x662 + x577 * poly_mix[61]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x664 = x663 + x579 * poly_mix[62]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x665 = x664 + x581 * poly_mix[63]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x666 = x665 + x583 * poly_mix[64]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x667 = x666 + x585 * poly_mix[65]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x668 = x667 + x587 * poly_mix[66]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x669 = x668 + x589 * poly_mix[67]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x670 = x669 + x591 * poly_mix[68]; - // loc(callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:6) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x671 = x670 + x594 * poly_mix[69]; - // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x672 = x671 + x47 * poly_mix[70]; - // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x673 = x672 + x48 * poly_mix[71]; - // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x674 = x673 + x30 * poly_mix[72]; - // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x675 = x674 + x34 * poly_mix[73]; - // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x676 = x675 + x38 * poly_mix[74]; - // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x677 = x601 + x53 * x676 * poly_mix[134]; - // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :106:20) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x678 = arg0[93]; - // loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :138:18) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x679 = x231 + x678 * poly_mix[1]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x680 = x679 + x217 * poly_mix[2]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x681 = x680 + x223 * poly_mix[3]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x682 = x681 + x166 * poly_mix[4]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x683 = x682 + x175 * poly_mix[5]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x684 = x683 + x184 * poly_mix[6]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x685 = x684 + x468 * poly_mix[7]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x686 = x685 + x470 * poly_mix[8]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x687 = x686 + x472 * poly_mix[9]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x688 = x687 + x474 * poly_mix[10]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x689 = x688 + x476 * poly_mix[11]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x690 = x689 + x478 * poly_mix[12]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x691 = x690 + x480 * poly_mix[13]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x692 = x691 + x482 * poly_mix[14]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x693 = x692 + x484 * poly_mix[15]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x694 = x693 + x486 * poly_mix[16]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x695 = x694 + x488 * poly_mix[17]; - // loc(callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:6) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x696 = x695 + x490 * poly_mix[18]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x697 = x696 + x492 * poly_mix[19]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x698 = x697 + x494 * poly_mix[20]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x699 = x698 + x496 * poly_mix[21]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x700 = x699 + x498 * poly_mix[22]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x701 = x700 + x500 * poly_mix[23]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x702 = x701 + x502 * poly_mix[24]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x703 = x702 + x504 * poly_mix[25]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x704 = x703 + x506 * poly_mix[26]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x705 = x704 + x508 * poly_mix[27]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x706 = x705 + x510 * poly_mix[28]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x707 = x706 + x512 * poly_mix[29]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x708 = x707 + x514 * poly_mix[30]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x709 = x708 + x516 * poly_mix[31]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x710 = x709 + x518 * poly_mix[32]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x711 = x710 + x520 * poly_mix[33]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x712 = x711 + x522 * poly_mix[34]; - // loc(callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:6) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x713 = x712 + x525 * poly_mix[35]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x714 = x713 + x527 * poly_mix[36]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x715 = x714 + x529 * poly_mix[37]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x716 = x715 + x531 * poly_mix[38]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x717 = x716 + x533 * poly_mix[39]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x718 = x717 + x535 * poly_mix[40]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x719 = x718 + x537 * poly_mix[41]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x720 = x719 + x539 * poly_mix[42]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x721 = x720 + x541 * poly_mix[43]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x722 = x721 + x543 * poly_mix[44]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x723 = x722 + x545 * poly_mix[45]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x724 = x723 + x547 * poly_mix[46]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x725 = x724 + x549 * poly_mix[47]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x726 = x725 + x551 * poly_mix[48]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x727 = x726 + x553 * poly_mix[49]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x728 = x727 + x555 * poly_mix[50]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x729 = x728 + x557 * poly_mix[51]; - // loc(callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:6) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x730 = x729 + x559 * poly_mix[52]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x731 = x730 + x561 * poly_mix[53]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x732 = x731 + x563 * poly_mix[54]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x733 = x732 + x565 * poly_mix[55]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x734 = x733 + x567 * poly_mix[56]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x735 = x734 + x569 * poly_mix[57]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x736 = x735 + x571 * poly_mix[58]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x737 = x736 + x573 * poly_mix[59]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x738 = x737 + x575 * poly_mix[60]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x739 = x738 + x577 * poly_mix[61]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x740 = x739 + x579 * poly_mix[62]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x741 = x740 + x581 * poly_mix[63]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x742 = x741 + x583 * poly_mix[64]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x743 = x742 + x585 * poly_mix[65]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x744 = x743 + x587 * poly_mix[66]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x745 = x744 + x589 * poly_mix[67]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x746 = x745 + x591 * poly_mix[68]; - // loc(callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:6) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x747 = x746 + x594 * poly_mix[69]; - // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x748 = x747 + x47 * poly_mix[70]; - // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x749 = x748 + x48 * poly_mix[71]; - // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x750 = x749 + x30 * poly_mix[72]; - // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x751 = x750 + x34 * poly_mix[73]; - // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x752 = x751 + x38 * poly_mix[74]; - // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x753 = x677 + x86 * x752 * poly_mix[186]; - // loc(callsite(unknown at callsite( SubU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :33:19) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:31) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x754 = arg0[94]; - // loc(callsite(unknown at callsite( SubU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :33:31) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:31) at callsite( OpSLTI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :144:22) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :49:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x755 = x754 - x298; - // loc(callsite(unknown at callsite( SubU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :33:44) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:31) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x756 = arg0[95]; - // loc(callsite(unknown at callsite( SubU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :33:55) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:31) at callsite( OpSLTI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :144:22) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :49:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x757 = x756 - x364; - // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :111:20) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x758 = arg0[96]; - // loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at callsite( OpSLTI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :143:18) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :49:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x759 = x231 + x758 * poly_mix[1]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpSLTI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :144:22) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :49:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x760 = x759 + x215 * poly_mix[2]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :45:28) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpSLTI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :144:22) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :49:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x761 = x760 + x217 * poly_mix[3]; - // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:23) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x762 = arg0[97]; - // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:10) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpSLTI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :144:22) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :49:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x763 = x755 - x762; - // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:10) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpSLTI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :144:22) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :49:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x764 = x761 + x763 * poly_mix[4]; - // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :48:14) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpSLTI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :144:22) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :49:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x765 = x757 + x147; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpSLTI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :144:22) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :49:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x766 = x764 + x221 * poly_mix[5]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :51:29) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpSLTI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :144:22) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :49:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x767 = x766 + x223 * poly_mix[6]; - // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:9) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpSLTI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :144:22) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :49:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x768 = x765 - x163; - // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:9) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpSLTI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :144:22) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :49:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x769 = x767 + x768 * poly_mix[7]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :125:24) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :134:20) at callsite( OpSLTI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :144:22) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :49:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x770 = x769 + x166 * poly_mix[8]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :126:34) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :134:20) at callsite( OpSLTI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :144:22) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :49:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x771 = x770 + x168 * poly_mix[9]; - // loc(callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :127:11) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :134:20) at callsite( OpSLTI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :144:22) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :49:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x772 = x771 + x173 * poly_mix[10]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :125:24) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :135:20) at callsite( OpSLTI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :144:22) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :49:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x773 = x772 + x175 * poly_mix[11]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :126:34) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :135:20) at callsite( OpSLTI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :144:22) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :49:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x774 = x773 + x177 * poly_mix[12]; - // loc(callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :127:11) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :135:20) at callsite( OpSLTI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :144:22) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :49:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x775 = x364 - x181; - // loc(callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :127:11) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :135:20) at callsite( OpSLTI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :144:22) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :49:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x776 = x774 + x775 * poly_mix[13]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :125:24) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :136:20) at callsite( OpSLTI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :144:22) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :49:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x777 = x776 + x184 * poly_mix[14]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :126:34) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :136:20) at callsite( OpSLTI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :144:22) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :49:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x778 = x777 + x186 * poly_mix[15]; - // loc(callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :127:11) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :136:20) at callsite( OpSLTI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :144:22) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :49:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x779 = x778 + x191 * poly_mix[16]; - // loc(callsite( Reg ( :5:7) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :138:19) at callsite( OpSLTI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :144:22) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :49:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x780 = x779 + x201 * poly_mix[17]; - // loc(callsite( Reg ( :5:7) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :140:30) at callsite( OpSLTI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :144:22) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :49:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x781 = x780 + x207 * poly_mix[18]; - // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x782 = x753 + x87 * x781 * poly_mix[251]; - // loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at callsite( OpSLTIU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :149:18) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :50:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x783 = x231 + x211 * poly_mix[1]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( CmpLessThanUnsigned ( zirgen/circuit/rv32im/v2/dsl/u32.zir :119:24) at callsite( OpSLTIU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :150:30) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :50:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x784 = x783 + x215 * poly_mix[2]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :45:28) at callsite( CmpLessThanUnsigned ( zirgen/circuit/rv32im/v2/dsl/u32.zir :119:24) at callsite( OpSLTIU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :150:30) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :50:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x785 = x784 + x217 * poly_mix[3]; - // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:10) at callsite( CmpLessThanUnsigned ( zirgen/circuit/rv32im/v2/dsl/u32.zir :119:24) at callsite( OpSLTIU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :150:30) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :50:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x786 = x785 + x763 * poly_mix[4]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( CmpLessThanUnsigned ( zirgen/circuit/rv32im/v2/dsl/u32.zir :119:24) at callsite( OpSLTIU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :150:30) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :50:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x787 = x786 + x221 * poly_mix[5]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :51:29) at callsite( CmpLessThanUnsigned ( zirgen/circuit/rv32im/v2/dsl/u32.zir :119:24) at callsite( OpSLTIU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :150:30) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :50:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x788 = x787 + x223 * poly_mix[6]; - // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:9) at callsite( CmpLessThanUnsigned ( zirgen/circuit/rv32im/v2/dsl/u32.zir :119:24) at callsite( OpSLTIU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :150:30) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :50:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x789 = x788 + x768 * poly_mix[7]; - // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x790 = x789 + x30 * poly_mix[8]; - // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x791 = x790 + x34 * poly_mix[9]; - // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x792 = x791 + x38 * poly_mix[10]; - // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x793 = x782 + x88 * x792 * poly_mix[261]; - // loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :57:19) at callsite( OpBEQ ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :155:18) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :51:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x794 = x46 - x7; - // loc(callsite(unknown at callsite( CmpEqual ( zirgen/circuit/rv32im/v2/dsl/u32.zir :112:25) at callsite( OpBEQ ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :156:19) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :51:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x795 = x50 - x51; - // loc(callsite(unknown at callsite( CmpEqual ( zirgen/circuit/rv32im/v2/dsl/u32.zir :113:26) at callsite( OpBEQ ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :156:19) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :51:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x796 = x33 - x37; - // loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :57:19) at callsite( OpBEQ ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :155:18) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :51:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x797 = arg4 + x794 * poly_mix[0]; - // loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at callsite( OpBEQ ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :155:18) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :51:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x798 = x797 + x210 * poly_mix[1]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( CmpEqual ( zirgen/circuit/rv32im/v2/dsl/u32.zir :112:22) at callsite( OpBEQ ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :156:19) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :51:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x799 = x798 + x217 * poly_mix[2]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:4) at callsite( CmpEqual ( zirgen/circuit/rv32im/v2/dsl/u32.zir :112:22) at callsite( OpBEQ ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :156:19) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :51:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x800 = x795 * x148; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x801 = arg0[98]; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( CmpEqual ( zirgen/circuit/rv32im/v2/dsl/u32.zir :112:22) at callsite( OpBEQ ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :156:19) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :51:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x802 = x800 - x801; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( CmpEqual ( zirgen/circuit/rv32im/v2/dsl/u32.zir :112:22) at callsite( OpBEQ ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :156:19) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :51:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x803 = x799 + x802 * poly_mix[3]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:4) at callsite( CmpEqual ( zirgen/circuit/rv32im/v2/dsl/u32.zir :112:22) at callsite( OpBEQ ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :156:19) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :51:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x804 = x147 * x795; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:17) at callsite( CmpEqual ( zirgen/circuit/rv32im/v2/dsl/u32.zir :112:22) at callsite( OpBEQ ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :156:19) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :51:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x805 = x803 + x804 * poly_mix[4]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:4) at callsite( CmpEqual ( zirgen/circuit/rv32im/v2/dsl/u32.zir :112:22) at callsite( OpBEQ ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :156:19) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :51:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x806 = x147 * x148; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:17) at callsite( CmpEqual ( zirgen/circuit/rv32im/v2/dsl/u32.zir :112:22) at callsite( OpBEQ ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :156:19) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :51:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x807 = x805 + x806 * poly_mix[5]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( CmpEqual ( zirgen/circuit/rv32im/v2/dsl/u32.zir :113:23) at callsite( OpBEQ ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :156:19) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :51:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x808 = x807 + x166 * poly_mix[6]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:4) at callsite( CmpEqual ( zirgen/circuit/rv32im/v2/dsl/u32.zir :113:23) at callsite( OpBEQ ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :156:19) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :51:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x809 = x796 * x35; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( CmpEqual ( zirgen/circuit/rv32im/v2/dsl/u32.zir :113:23) at callsite( OpBEQ ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :156:19) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :51:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x810 = x809 - x197; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( CmpEqual ( zirgen/circuit/rv32im/v2/dsl/u32.zir :113:23) at callsite( OpBEQ ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :156:19) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :51:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x811 = x808 + x810 * poly_mix[7]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:4) at callsite( CmpEqual ( zirgen/circuit/rv32im/v2/dsl/u32.zir :113:23) at callsite( OpBEQ ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :156:19) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :51:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x812 = x31 * x796; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:17) at callsite( CmpEqual ( zirgen/circuit/rv32im/v2/dsl/u32.zir :113:23) at callsite( OpBEQ ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :156:19) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :51:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x813 = x811 + x812 * poly_mix[8]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:4) at callsite( CmpEqual ( zirgen/circuit/rv32im/v2/dsl/u32.zir :113:23) at callsite( OpBEQ ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :156:19) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :51:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x814 = x31 * x35; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:17) at callsite( CmpEqual ( zirgen/circuit/rv32im/v2/dsl/u32.zir :113:23) at callsite( OpBEQ ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :156:19) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :51:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x815 = x813 + x814 * poly_mix[9]; - // loc(callsite(unknown at callsite( CmpEqual ( zirgen/circuit/rv32im/v2/dsl/u32.zir :114:27) at callsite( OpBEQ ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :156:19) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :51:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x816 = x147 * x31; - // loc(callsite( Reg ( :5:7) at callsite( CmpEqual ( zirgen/circuit/rv32im/v2/dsl/u32.zir :114:26) at callsite( OpBEQ ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :156:19) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :51:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x817 = x816 - x39; - // loc(callsite( Reg ( :5:7) at callsite( CmpEqual ( zirgen/circuit/rv32im/v2/dsl/u32.zir :114:26) at callsite( OpBEQ ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :156:19) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :51:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x818 = x815 + x817 * poly_mix[10]; - // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x819 = x818 + x47 * poly_mix[11]; - // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x820 = x819 + x48 * poly_mix[12]; - // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x821 = x820 + x30 * poly_mix[13]; - // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x822 = x821 + x34 * poly_mix[14]; - // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x823 = x822 + x38 * poly_mix[15]; - // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x824 = x793 + x44 * x823 * poly_mix[271]; - // loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at callsite( OpBNE ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :161:18) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :52:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x825 = x210 - x29; - // loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at callsite( OpBNE ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :161:18) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :52:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x826 = x797 + x825 * poly_mix[1]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( CmpEqual ( zirgen/circuit/rv32im/v2/dsl/u32.zir :112:22) at callsite( OpBNE ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :162:19) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :52:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x827 = x826 + x217 * poly_mix[2]; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( CmpEqual ( zirgen/circuit/rv32im/v2/dsl/u32.zir :112:22) at callsite( OpBNE ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :162:19) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :52:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x828 = x827 + x802 * poly_mix[3]; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:17) at callsite( CmpEqual ( zirgen/circuit/rv32im/v2/dsl/u32.zir :112:22) at callsite( OpBNE ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :162:19) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :52:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x829 = x828 + x804 * poly_mix[4]; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:17) at callsite( CmpEqual ( zirgen/circuit/rv32im/v2/dsl/u32.zir :112:22) at callsite( OpBNE ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :162:19) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :52:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x830 = x829 + x806 * poly_mix[5]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( CmpEqual ( zirgen/circuit/rv32im/v2/dsl/u32.zir :113:23) at callsite( OpBNE ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :162:19) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :52:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x831 = x830 + x166 * poly_mix[6]; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( CmpEqual ( zirgen/circuit/rv32im/v2/dsl/u32.zir :113:23) at callsite( OpBNE ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :162:19) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :52:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x832 = x831 + x810 * poly_mix[7]; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:17) at callsite( CmpEqual ( zirgen/circuit/rv32im/v2/dsl/u32.zir :113:23) at callsite( OpBNE ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :162:19) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :52:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x833 = x832 + x812 * poly_mix[8]; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:17) at callsite( CmpEqual ( zirgen/circuit/rv32im/v2/dsl/u32.zir :113:23) at callsite( OpBNE ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :162:19) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :52:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x834 = x833 + x814 * poly_mix[9]; - // loc(callsite( Reg ( :5:7) at callsite( CmpEqual ( zirgen/circuit/rv32im/v2/dsl/u32.zir :114:26) at callsite( OpBNE ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :162:19) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :52:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x835 = x834 + x817 * poly_mix[10]; - // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x836 = x835 + x47 * poly_mix[11]; - // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x837 = x836 + x48 * poly_mix[12]; - // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x838 = x837 + x30 * poly_mix[13]; - // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x839 = x838 + x34 * poly_mix[14]; - // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x840 = x839 + x38 * poly_mix[15]; - // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x841 = x824 + x45 * x840 * poly_mix[273]; - // loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at callsite( OpBLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :167:18) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :53:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x842 = x797 + x461 * poly_mix[1]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpBLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :168:22) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :53:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x843 = x842 + x215 * poly_mix[2]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :45:28) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpBLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :168:22) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :53:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x844 = x843 + x217 * poly_mix[3]; - // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:10) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpBLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :168:22) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :53:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x845 = x844 + x219 * poly_mix[4]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpBLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :168:22) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :53:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x846 = x845 + x221 * poly_mix[5]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :51:29) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpBLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :168:22) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :53:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x847 = x846 + x223 * poly_mix[6]; - // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:9) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpBLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :168:22) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :53:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x848 = x847 + x164 * poly_mix[7]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :125:24) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :134:20) at callsite( OpBLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :168:22) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :53:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x849 = x848 + x166 * poly_mix[8]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :126:34) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :134:20) at callsite( OpBLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :168:22) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :53:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x850 = x849 + x168 * poly_mix[9]; - // loc(callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :127:11) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :134:20) at callsite( OpBLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :168:22) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :53:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x851 = x850 + x173 * poly_mix[10]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :125:24) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :135:20) at callsite( OpBLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :168:22) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :53:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x852 = x851 + x175 * poly_mix[11]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :126:34) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :135:20) at callsite( OpBLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :168:22) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :53:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x853 = x852 + x177 * poly_mix[12]; - // loc(callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :127:11) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :135:20) at callsite( OpBLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :168:22) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :53:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x854 = x853 + x182 * poly_mix[13]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :125:24) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :136:20) at callsite( OpBLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :168:22) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :53:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x855 = x854 + x184 * poly_mix[14]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :126:34) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :136:20) at callsite( OpBLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :168:22) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :53:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x856 = x855 + x186 * poly_mix[15]; - // loc(callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :127:11) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :136:20) at callsite( OpBLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :168:22) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :53:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x857 = x856 + x191 * poly_mix[16]; - // loc(callsite( Reg ( :5:7) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :138:19) at callsite( OpBLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :168:22) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :53:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x858 = x857 + x201 * poly_mix[17]; - // loc(callsite( Reg ( :5:7) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :140:30) at callsite( OpBLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :168:22) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :53:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x859 = x858 + x207 * poly_mix[18]; - // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x860 = x841 + x49 * x859 * poly_mix[281]; - // loc(callsite(unknown at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :165:21) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x861 = x299 - x289; - // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x862 = x861 * x52; - // loc(callsite(unknown at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :160:21) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x863 = x299 - x288; - // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x864 = x863 * x53; - // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x865 = x288 * x86; - // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x866 = x66 * x87; - // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x867 = x296 * x88; - // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x868 = x862 + x864; - // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x869 = x868 + x865; - // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x870 = x869 + x866; - // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x871 = x870 + x867; - // loc(callsite(unknown at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :165:52) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x872 = x365 - x358; - // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x873 = x872 * x52; - // loc(callsite(unknown at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :160:50) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x874 = x365 - x357; - // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x875 = x874 * x53; - // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x876 = x357 * x86; - // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x877 = x873 + x875; - // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x878 = x877 + x876; - // loc(callsite(unknown at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :52:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x879 = arg0[99]; - // loc(callsite(unknown at callsite( AddU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :27:21) at callsite( CmpOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :80:12) at callsite( OpBEQ ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :157:9) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :51:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x880 = x879 + x460; - // loc(callsite(unknown at callsite( CondDenormed ( zirgen/circuit/rv32im/v2/dsl/u32.zir :101:8) at callsite( CmpOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :79:26) at callsite( OpBEQ ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :157:9) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :51:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x881 = x62 * x880; - // loc(callsite(unknown at callsite( CondDenormed ( zirgen/circuit/rv32im/v2/dsl/u32.zir :101:24) at callsite( CmpOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :79:26) at callsite( OpBEQ ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :157:9) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :51:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x882 = x29 - x62; - // loc(callsite(unknown at callsite( AddU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :27:21) at callsite( SimpleOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :74:20) at callsite( OpADD ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :87:12) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :31:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x883 = arg0[100]; - // loc(callsite(unknown at callsite( CondDenormed ( zirgen/circuit/rv32im/v2/dsl/u32.zir :101:32) at callsite( CmpOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :79:26) at callsite( OpBEQ ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :157:9) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :51:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x884 = x882 * x883; - // loc(callsite(unknown at callsite( CondDenormed ( zirgen/circuit/rv32im/v2/dsl/u32.zir :101:17) at callsite( CmpOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :79:26) at callsite( OpBEQ ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :157:9) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :51:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x885 = x881 + x884; - // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x886 = x885 * x44; - // loc(callsite(unknown at callsite( CondDenormed ( zirgen/circuit/rv32im/v2/dsl/u32.zir :101:8) at callsite( CmpOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :79:26) at callsite( OpBNE ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :163:9) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :52:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x887 = x882 * x880; - // loc(callsite(unknown at callsite( CondDenormed ( zirgen/circuit/rv32im/v2/dsl/u32.zir :101:24) at callsite( CmpOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :79:26) at callsite( OpBNE ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :163:9) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :52:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x888 = x29 - x882; - // loc(callsite(unknown at callsite( CondDenormed ( zirgen/circuit/rv32im/v2/dsl/u32.zir :101:32) at callsite( CmpOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :79:26) at callsite( OpBNE ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :163:9) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :52:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x889 = x888 * x883; - // loc(callsite(unknown at callsite( CondDenormed ( zirgen/circuit/rv32im/v2/dsl/u32.zir :101:17) at callsite( CmpOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :79:26) at callsite( OpBNE ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :163:9) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :52:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x890 = x887 + x889; - // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x891 = x890 * x45; - // loc(callsite(unknown at callsite( CondDenormed ( zirgen/circuit/rv32im/v2/dsl/u32.zir :101:8) at callsite( CmpOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :79:26) at callsite( OpBLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :169:9) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :53:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x892 = x66 * x880; - // loc(callsite(unknown at callsite( CondDenormed ( zirgen/circuit/rv32im/v2/dsl/u32.zir :101:24) at callsite( CmpOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :79:26) at callsite( OpBLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :169:9) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :53:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x893 = x29 - x66; - // loc(callsite(unknown at callsite( CondDenormed ( zirgen/circuit/rv32im/v2/dsl/u32.zir :101:32) at callsite( CmpOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :79:26) at callsite( OpBLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :169:9) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :53:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x894 = x893 * x883; - // loc(callsite(unknown at callsite( CondDenormed ( zirgen/circuit/rv32im/v2/dsl/u32.zir :101:17) at callsite( CmpOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :79:26) at callsite( OpBLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :169:9) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :53:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x895 = x892 + x894; - // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x896 = x895 * x49; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x897 = arg0[101]; - // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x898 = x897 + x886; - // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x899 = x898 + x891; - // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x900 = x899 + x896; - // loc(callsite(unknown at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :53:34) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x901 = arg0[102]; - // loc(callsite(unknown at callsite( AddU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :27:36) at callsite( CmpOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :80:12) at callsite( OpBEQ ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :157:9) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :51:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x902 = x901 + x364; - // loc(callsite(unknown at callsite( CondDenormed ( zirgen/circuit/rv32im/v2/dsl/u32.zir :102:8) at callsite( CmpOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :79:26) at callsite( OpBEQ ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :157:9) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :51:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x903 = x62 * x902; - // loc(callsite(unknown at callsite( CondDenormed ( zirgen/circuit/rv32im/v2/dsl/u32.zir :102:33) at callsite( CmpOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :79:26) at callsite( OpBEQ ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :157:9) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :51:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x904 = x882 * x901; - // loc(callsite(unknown at callsite( CondDenormed ( zirgen/circuit/rv32im/v2/dsl/u32.zir :102:17) at callsite( CmpOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :79:26) at callsite( OpBEQ ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :157:9) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :51:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x905 = x903 + x904; - // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x906 = x905 * x44; - // loc(callsite(unknown at callsite( CondDenormed ( zirgen/circuit/rv32im/v2/dsl/u32.zir :102:8) at callsite( CmpOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :79:26) at callsite( OpBNE ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :163:9) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :52:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x907 = x882 * x902; - // loc(callsite(unknown at callsite( CondDenormed ( zirgen/circuit/rv32im/v2/dsl/u32.zir :102:33) at callsite( CmpOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :79:26) at callsite( OpBNE ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :163:9) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :52:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x908 = x888 * x901; - // loc(callsite(unknown at callsite( CondDenormed ( zirgen/circuit/rv32im/v2/dsl/u32.zir :102:17) at callsite( CmpOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :79:26) at callsite( OpBNE ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :163:9) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :52:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x909 = x907 + x908; - // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x910 = x909 * x45; - // loc(callsite(unknown at callsite( CondDenormed ( zirgen/circuit/rv32im/v2/dsl/u32.zir :102:8) at callsite( CmpOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :79:26) at callsite( OpBLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :169:9) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :53:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x911 = x66 * x902; - // loc(callsite(unknown at callsite( CondDenormed ( zirgen/circuit/rv32im/v2/dsl/u32.zir :102:33) at callsite( CmpOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :79:26) at callsite( OpBLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :169:9) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :53:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x912 = x893 * x901; - // loc(callsite(unknown at callsite( CondDenormed ( zirgen/circuit/rv32im/v2/dsl/u32.zir :102:17) at callsite( CmpOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :79:26) at callsite( OpBLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :169:9) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :53:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x913 = x911 + x912; - // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x914 = x913 * x49; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x915 = arg0[103]; - // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x916 = x915 + x906; - // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x917 = x916 + x910; - // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x918 = x917 + x914; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :55:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x919 = x860 + x372 * poly_mix[300]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :45:28) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :55:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x920 = x919 + x375 * poly_mix[301]; - // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:10) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :55:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x921 = x871 - x378; - // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:10) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :55:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x922 = x920 + x921 * poly_mix[302]; - // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :48:14) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :55:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x923 = x878 + x122; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :55:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x924 = x922 + x382 * poly_mix[303]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :51:29) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :55:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x925 = x924 + x385 * poly_mix[304]; - // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:9) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :55:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x926 = x923 - x388; - // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:9) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :55:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x927 = x925 + x926 * poly_mix[305]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :55:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x928 = x927 + x391 * poly_mix[306]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :45:28) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :55:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x929 = x928 + x394 * poly_mix[307]; - // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:10) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :55:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x930 = x900 - x397; - // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:10) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :55:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x931 = x929 + x930 * poly_mix[308]; - // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :48:14) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :55:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x932 = x918 + x128; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :55:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x933 = x931 + x403 * poly_mix[309]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :51:29) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :55:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x934 = x933 + x406 * poly_mix[310]; - // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:9) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :55:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x935 = x932 - x409; - // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:9) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :55:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x936 = x934 + x935 * poly_mix[311]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :55:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x937 = x936 + x413 * poly_mix[312]; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :55:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x938 = x937 + x417 * poly_mix[313]; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:17) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :55:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x939 = x938 + x419 * poly_mix[314]; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:17) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :55:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x940 = x939 + x421 * poly_mix[315]; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:4) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x941 = arg0[104]; - // loc(callsite(unknown at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :40:26) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :55:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x942 = x412 * x941; - // loc(callsite(unknown at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :41:11) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :55:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x943 = x942 * x415; - // loc(callsite(unknown at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :42:90) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :55:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x944 = x29 - x942; - // loc(callsite(unknown at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :42:102) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :55:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x945 = x944 * x19; - // loc(callsite(unknown at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :42:85) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :55:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x946 = x428 + x945; - // loc(callsite(unknown at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :42:106) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :55:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x947 = x946 + x943; - // loc(callsite( Reg ( :5:7) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :42:21) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :55:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x948 = x947 - x135; - // loc(callsite( Reg ( :5:7) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :42:21) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :55:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x949 = x940 + x948 * poly_mix[316]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :55:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x950 = x949 + x433 * poly_mix[317]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :55:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x951 = x950 + x435 * poly_mix[318]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :55:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x952 = x951 + x8 * poly_mix[319]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :55:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x953 = x952 + x8 * poly_mix[320]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :55:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x954 = x953 + x439 * poly_mix[321]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :55:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x955 = x954 + x442 * poly_mix[322]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :55:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x956 = x955 + x444 * poly_mix[323]; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :55:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x957 = x956 + x446 * poly_mix[324]; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :55:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x958 = x957 + x448 * poly_mix[325]; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - FpExt x959 = x450 + x149 * x958 * poly_mix[327]; - // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x960 = x87 + x88; - // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x961 = x960 + x44; - // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x962 = x961 + x45; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x963 = arg0[105]; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x964 = arg0[106]; - // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x965 = x963 + x964; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x966 = arg0[107]; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x967 = arg0[108]; - // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x968 = x966 + x967; - // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x969 = x879 * x49; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :71:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :59:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x970 = x210 * x13; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :46:15) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x971 = arg0[109]; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :71:16) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :59:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x972 = x971 + x970; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :71:42) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :59:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x973 = x150 * x14; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :71:33) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :59:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x974 = x972 + x973; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :71:51) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :59:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x975 = x974 + x455; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :56:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x976 = arg0[110]; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :71:70) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :59:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x977 = x975 + x976; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :56:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x978 = arg0[111]; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :71:85) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :59:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x979 = x977 + x978; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :72:7) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :59:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x980 = x151 * x6; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :44:16) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x981 = arg0[112]; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :72:17) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :59:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x982 = x980 + x981; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :72:36) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :59:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x983 = x982 + x152; - // loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at callsite( OpBGE ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :173:18) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :61:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x984 = x210 - x5; - // loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at callsite( OpBGE ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :173:18) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :61:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x985 = x797 + x984 * poly_mix[1]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpBGE ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :174:22) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :61:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x986 = x985 + x215 * poly_mix[2]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :45:28) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpBGE ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :174:22) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :61:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x987 = x986 + x217 * poly_mix[3]; - // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:10) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpBGE ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :174:22) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :61:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x988 = x987 + x219 * poly_mix[4]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpBGE ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :174:22) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :61:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x989 = x988 + x221 * poly_mix[5]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :51:29) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpBGE ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :174:22) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :61:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x990 = x989 + x223 * poly_mix[6]; - // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:9) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpBGE ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :174:22) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :61:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x991 = x990 + x164 * poly_mix[7]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :125:24) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :134:20) at callsite( OpBGE ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :174:22) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :61:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x992 = x991 + x166 * poly_mix[8]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :126:34) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :134:20) at callsite( OpBGE ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :174:22) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :61:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x993 = x992 + x168 * poly_mix[9]; - // loc(callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :127:11) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :134:20) at callsite( OpBGE ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :174:22) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :61:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x994 = x993 + x173 * poly_mix[10]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :125:24) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :135:20) at callsite( OpBGE ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :174:22) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :61:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x995 = x994 + x175 * poly_mix[11]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :126:34) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :135:20) at callsite( OpBGE ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :174:22) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :61:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x996 = x995 + x177 * poly_mix[12]; - // loc(callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :127:11) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :135:20) at callsite( OpBGE ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :174:22) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :61:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x997 = x996 + x182 * poly_mix[13]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :125:24) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :136:20) at callsite( OpBGE ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :174:22) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :61:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x998 = x997 + x184 * poly_mix[14]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :126:34) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :136:20) at callsite( OpBGE ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :174:22) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :61:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x999 = x998 + x186 * poly_mix[15]; - // loc(callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :127:11) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :136:20) at callsite( OpBGE ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :174:22) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :61:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1000 = x999 + x191 * poly_mix[16]; - // loc(callsite( Reg ( :5:7) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :138:19) at callsite( OpBGE ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :174:22) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :61:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1001 = x1000 + x201 * poly_mix[17]; - // loc(callsite( Reg ( :5:7) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :140:30) at callsite( OpBGE ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :174:22) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :61:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1002 = x1001 + x207 * poly_mix[18]; - // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1003 = arg6 + x52 * x1002 * poly_mix[59]; - // loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at callsite( OpBLTU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :179:18) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :62:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x1004 = x797 + x602 * poly_mix[1]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( CmpLessThanUnsigned ( zirgen/circuit/rv32im/v2/dsl/u32.zir :119:24) at callsite( OpBLTU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :180:30) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :62:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1005 = x1004 + x215 * poly_mix[2]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :45:28) at callsite( CmpLessThanUnsigned ( zirgen/circuit/rv32im/v2/dsl/u32.zir :119:24) at callsite( OpBLTU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :180:30) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :62:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1006 = x1005 + x217 * poly_mix[3]; - // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:10) at callsite( CmpLessThanUnsigned ( zirgen/circuit/rv32im/v2/dsl/u32.zir :119:24) at callsite( OpBLTU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :180:30) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :62:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1007 = x1006 + x219 * poly_mix[4]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( CmpLessThanUnsigned ( zirgen/circuit/rv32im/v2/dsl/u32.zir :119:24) at callsite( OpBLTU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :180:30) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :62:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1008 = x1007 + x221 * poly_mix[5]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :51:29) at callsite( CmpLessThanUnsigned ( zirgen/circuit/rv32im/v2/dsl/u32.zir :119:24) at callsite( OpBLTU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :180:30) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :62:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1009 = x1008 + x223 * poly_mix[6]; - // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:9) at callsite( CmpLessThanUnsigned ( zirgen/circuit/rv32im/v2/dsl/u32.zir :119:24) at callsite( OpBLTU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :180:30) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :62:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1010 = x1009 + x164 * poly_mix[7]; - // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1011 = x1010 + x30 * poly_mix[8]; - // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1012 = x1011 + x34 * poly_mix[9]; - // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1013 = x1012 + x38 * poly_mix[10]; - // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1014 = x1003 + x53 * x1013 * poly_mix[78]; - // loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at callsite( OpBGEU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :185:18) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :63:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x1015 = x797 + x678 * poly_mix[1]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( CmpLessThanUnsigned ( zirgen/circuit/rv32im/v2/dsl/u32.zir :119:24) at callsite( OpBGEU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :186:30) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :63:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1016 = x1015 + x215 * poly_mix[2]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :45:28) at callsite( CmpLessThanUnsigned ( zirgen/circuit/rv32im/v2/dsl/u32.zir :119:24) at callsite( OpBGEU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :186:30) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :63:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1017 = x1016 + x217 * poly_mix[3]; - // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:10) at callsite( CmpLessThanUnsigned ( zirgen/circuit/rv32im/v2/dsl/u32.zir :119:24) at callsite( OpBGEU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :186:30) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :63:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1018 = x1017 + x219 * poly_mix[4]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( CmpLessThanUnsigned ( zirgen/circuit/rv32im/v2/dsl/u32.zir :119:24) at callsite( OpBGEU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :186:30) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :63:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1019 = x1018 + x221 * poly_mix[5]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :51:29) at callsite( CmpLessThanUnsigned ( zirgen/circuit/rv32im/v2/dsl/u32.zir :119:24) at callsite( OpBGEU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :186:30) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :63:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1020 = x1019 + x223 * poly_mix[6]; - // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:9) at callsite( CmpLessThanUnsigned ( zirgen/circuit/rv32im/v2/dsl/u32.zir :119:24) at callsite( OpBGEU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :186:30) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :63:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1021 = x1020 + x164 * poly_mix[7]; - // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1022 = x1021 + x30 * poly_mix[8]; - // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1023 = x1022 + x34 * poly_mix[9]; - // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1024 = x1023 + x38 * poly_mix[10]; - // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1025 = x1014 + x86 * x1024 * poly_mix[89]; - // loc(callsite( VerifyOpcode ( zirgen/circuit/rv32im/v2/dsl/inst.zir :53:19) at callsite( OpJAL ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :191:16) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :64:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x1026 = x46 - x4; - // loc(callsite( VerifyOpcode ( zirgen/circuit/rv32im/v2/dsl/inst.zir :53:19) at callsite( OpJAL ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :191:16) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :64:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x1027 = arg4 + x1026 * poly_mix[0]; - // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1028 = x1027 + x47 * poly_mix[1]; - // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1029 = x1028 + x48 * poly_mix[2]; - // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1030 = x1029 + x30 * poly_mix[3]; - // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1031 = x1030 + x34 * poly_mix[4]; - // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1032 = x1031 + x38 * poly_mix[5]; - // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1033 = x1025 + x87 * x1032 * poly_mix[100]; - // loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :57:19) at callsite( OpJALR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :198:18) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :65:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x1034 = x46 - x3; - // loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :57:19) at callsite( OpJALR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :198:18) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :65:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x1035 = arg4 + x1034 * poly_mix[0]; - // loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at callsite( OpJALR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :198:18) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :65:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x1036 = x1035 + x210 * poly_mix[1]; - // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1037 = x1036 + x47 * poly_mix[2]; - // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1038 = x1037 + x48 * poly_mix[3]; - // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1039 = x1038 + x30 * poly_mix[4]; - // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1040 = x1039 + x34 * poly_mix[5]; - // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1041 = x1040 + x38 * poly_mix[6]; - // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1042 = x1033 + x88 * x1041 * poly_mix[106]; - // loc(callsite( VerifyOpcode ( zirgen/circuit/rv32im/v2/dsl/inst.zir :53:19) at callsite( OpLUI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :205:16) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :66:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x1043 = x46 - x2; - // loc(callsite( VerifyOpcode ( zirgen/circuit/rv32im/v2/dsl/inst.zir :53:19) at callsite( OpLUI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :205:16) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :66:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x1044 = arg4 + x1043 * poly_mix[0]; - // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1045 = x1044 + x47 * poly_mix[1]; - // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1046 = x1045 + x48 * poly_mix[2]; - // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1047 = x1046 + x30 * poly_mix[3]; - // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1048 = x1047 + x34 * poly_mix[4]; - // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1049 = x1048 + x38 * poly_mix[5]; - // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1050 = x1042 + x44 * x1049 * poly_mix[113]; - // loc(callsite( VerifyOpcode ( zirgen/circuit/rv32im/v2/dsl/inst.zir :53:19) at callsite( OpAUIPC ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :210:16) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :67:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x1051 = x46 - x1; - // loc(callsite( VerifyOpcode ( zirgen/circuit/rv32im/v2/dsl/inst.zir :53:19) at callsite( OpAUIPC ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :210:16) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :67:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x1052 = arg4 + x1051 * poly_mix[0]; - // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1053 = x1052 + x47 * poly_mix[1]; - // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1054 = x1053 + x48 * poly_mix[2]; - // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1055 = x1054 + x30 * poly_mix[3]; - // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1056 = x1055 + x34 * poly_mix[4]; - // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1057 = x1056 + x38 * poly_mix[5]; - // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1058 = x1050 + x45 * x1057 * poly_mix[119]; - // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :62:19) at callsite( OpECALL ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :216:20) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :68:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x1059 = x46 - x0; - // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :62:19) at callsite( OpECALL ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :216:20) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :68:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x1060 = arg4 + x1059 * poly_mix[0]; - // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at callsite( OpECALL ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :216:20) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :68:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x1061 = x1060 + x210 * poly_mix[1]; - // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at callsite( OpECALL ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :216:20) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :68:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x1062 = x1061 + x213 * poly_mix[2]; - // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1063 = x1062 + x47 * poly_mix[3]; - // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1064 = x1063 + x48 * poly_mix[4]; - // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1065 = x1064 + x30 * poly_mix[5]; - // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1066 = x1065 + x34 * poly_mix[6]; - // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1067 = x1066 + x38 * poly_mix[7]; - // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1068 = x1058 + x49 * x1067 * poly_mix[125]; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :47:24) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1069 = arg0[113]; - // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x1070 = x1069 * x44; - // loc(callsite(unknown at callsite( AddU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :27:21) at callsite( OpAUIPC ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :211:26) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :67:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1071 = x879 + x1069; - // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x1072 = x1071 * x45; - // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x1073 = x965 + x1070; - // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x1074 = x1073 + x1072; - // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x1075 = x153 * x44; - // loc(callsite(unknown at callsite( AddU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :27:36) at callsite( OpAUIPC ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :211:26) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :67:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1076 = x901 + x153; - // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x1077 = x1076 * x45; - // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x1078 = x968 + x1075; - // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x1079 = x1078 + x1077; - // loc(callsite(unknown at callsite( CondDenormed ( zirgen/circuit/rv32im/v2/dsl/u32.zir :101:8) at callsite( CmpOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :79:26) at callsite( OpBGE ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :175:9) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :61:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1080 = x893 * x880; - // loc(callsite(unknown at callsite( CondDenormed ( zirgen/circuit/rv32im/v2/dsl/u32.zir :101:24) at callsite( CmpOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :79:26) at callsite( OpBGE ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :175:9) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :61:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1081 = x29 - x893; - // loc(callsite(unknown at callsite( CondDenormed ( zirgen/circuit/rv32im/v2/dsl/u32.zir :101:32) at callsite( CmpOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :79:26) at callsite( OpBGE ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :175:9) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :61:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1082 = x1081 * x883; - // loc(callsite(unknown at callsite( CondDenormed ( zirgen/circuit/rv32im/v2/dsl/u32.zir :101:17) at callsite( CmpOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :79:26) at callsite( OpBGE ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :175:9) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :61:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1083 = x1080 + x1082; - // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x1084 = x1083 * x52; - // loc(callsite(unknown at callsite( CondDenormed ( zirgen/circuit/rv32im/v2/dsl/u32.zir :101:8) at callsite( CmpOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :79:26) at callsite( OpBLTU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :181:9) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :62:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1085 = x296 * x880; - // loc(callsite(unknown at callsite( CondDenormed ( zirgen/circuit/rv32im/v2/dsl/u32.zir :101:24) at callsite( CmpOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :79:26) at callsite( OpBLTU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :181:9) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :62:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1086 = x29 - x296; - // loc(callsite(unknown at callsite( CondDenormed ( zirgen/circuit/rv32im/v2/dsl/u32.zir :101:32) at callsite( CmpOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :79:26) at callsite( OpBLTU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :181:9) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :62:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1087 = x1086 * x883; - // loc(callsite(unknown at callsite( CondDenormed ( zirgen/circuit/rv32im/v2/dsl/u32.zir :101:17) at callsite( CmpOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :79:26) at callsite( OpBLTU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :181:9) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :62:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1088 = x1085 + x1087; - // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x1089 = x1088 * x53; - // loc(callsite(unknown at callsite( CondDenormed ( zirgen/circuit/rv32im/v2/dsl/u32.zir :101:8) at callsite( CmpOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :79:26) at callsite( OpBGEU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :187:9) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :63:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1090 = x1086 * x880; - // loc(callsite(unknown at callsite( CondDenormed ( zirgen/circuit/rv32im/v2/dsl/u32.zir :101:24) at callsite( CmpOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :79:26) at callsite( OpBGEU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :187:9) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :63:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1091 = x29 - x1086; - // loc(callsite(unknown at callsite( CondDenormed ( zirgen/circuit/rv32im/v2/dsl/u32.zir :101:32) at callsite( CmpOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :79:26) at callsite( OpBGEU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :187:9) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :63:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1092 = x1091 * x883; - // loc(callsite(unknown at callsite( CondDenormed ( zirgen/circuit/rv32im/v2/dsl/u32.zir :101:17) at callsite( CmpOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :79:26) at callsite( OpBGEU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :187:9) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :63:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1093 = x1090 + x1092; - // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x1094 = x1093 * x86; - // loc(callsite(unknown at callsite( AddU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :27:21) at callsite( OpJAL ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :194:12) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :64:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1095 = x879 + x979; - // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x1096 = x1095 * x87; - // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x1097 = x299 * x88; - // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x1098 = x1084 + x1089; - // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x1099 = x1098 + x1094; - // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x1100 = x1099 + x1096; - // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x1101 = x1100 + x1097; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x1102 = arg0[114]; - // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x1103 = x1101 + x1102; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x1104 = arg0[115]; - // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x1105 = x1103 + x1104; - // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x1106 = x1105 + x969; - // loc(callsite(unknown at callsite( CondDenormed ( zirgen/circuit/rv32im/v2/dsl/u32.zir :102:8) at callsite( CmpOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :79:26) at callsite( OpBGE ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :175:9) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :61:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1107 = x893 * x902; - // loc(callsite(unknown at callsite( CondDenormed ( zirgen/circuit/rv32im/v2/dsl/u32.zir :102:33) at callsite( CmpOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :79:26) at callsite( OpBGE ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :175:9) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :61:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1108 = x1081 * x901; - // loc(callsite(unknown at callsite( CondDenormed ( zirgen/circuit/rv32im/v2/dsl/u32.zir :102:17) at callsite( CmpOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :79:26) at callsite( OpBGE ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :175:9) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :61:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1109 = x1107 + x1108; - // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x1110 = x1109 * x52; - // loc(callsite(unknown at callsite( CondDenormed ( zirgen/circuit/rv32im/v2/dsl/u32.zir :102:8) at callsite( CmpOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :79:26) at callsite( OpBLTU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :181:9) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :62:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1111 = x296 * x902; - // loc(callsite(unknown at callsite( CondDenormed ( zirgen/circuit/rv32im/v2/dsl/u32.zir :102:33) at callsite( CmpOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :79:26) at callsite( OpBLTU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :181:9) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :62:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1112 = x1086 * x901; - // loc(callsite(unknown at callsite( CondDenormed ( zirgen/circuit/rv32im/v2/dsl/u32.zir :102:17) at callsite( CmpOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :79:26) at callsite( OpBLTU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :181:9) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :62:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1113 = x1111 + x1112; - // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x1114 = x1113 * x53; - // loc(callsite(unknown at callsite( CondDenormed ( zirgen/circuit/rv32im/v2/dsl/u32.zir :102:8) at callsite( CmpOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :79:26) at callsite( OpBGEU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :187:9) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :63:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1115 = x1086 * x902; - // loc(callsite(unknown at callsite( CondDenormed ( zirgen/circuit/rv32im/v2/dsl/u32.zir :102:33) at callsite( CmpOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :79:26) at callsite( OpBGEU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :187:9) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :63:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1116 = x1091 * x901; - // loc(callsite(unknown at callsite( CondDenormed ( zirgen/circuit/rv32im/v2/dsl/u32.zir :102:17) at callsite( CmpOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :79:26) at callsite( OpBGEU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :187:9) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :63:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1117 = x1115 + x1116; - // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x1118 = x1117 * x86; - // loc(callsite(unknown at callsite( AddU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :27:36) at callsite( OpJAL ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :194:12) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :64:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1119 = x901 + x983; - // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x1120 = x1119 * x87; - // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x1121 = x365 * x88; - // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x1122 = x1110 + x1114; - // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x1123 = x1122 + x1118; - // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x1124 = x1123 + x1120; - // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x1125 = x1124 + x1121; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x1126 = arg0[116]; - // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x1127 = x1125 + x1126; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x1128 = arg0[117]; - // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x1129 = x1127 + x1128; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x1130 = arg0[118]; - // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x1131 = x1129 + x1130; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :70:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1132 = x1068 + x372 * poly_mix[133]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :45:28) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :70:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1133 = x1132 + x375 * poly_mix[134]; - // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:10) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :70:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x1134 = x1074 - x378; - // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:10) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :70:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x1135 = x1133 + x1134 * poly_mix[135]; - // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :48:14) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :70:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1136 = x1079 + x122; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :70:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1137 = x1135 + x382 * poly_mix[136]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :51:29) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :70:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1138 = x1137 + x385 * poly_mix[137]; - // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:9) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :70:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x1139 = x1136 - x388; - // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:9) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :70:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x1140 = x1138 + x1139 * poly_mix[138]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :70:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1141 = x1140 + x391 * poly_mix[139]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :45:28) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :70:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1142 = x1141 + x394 * poly_mix[140]; - // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:10) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :70:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x1143 = x1106 - x397; - // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:10) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :70:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x1144 = x1142 + x1143 * poly_mix[141]; - // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :48:14) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :70:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1145 = x1131 + x128; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :70:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1146 = x1144 + x403 * poly_mix[142]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :51:29) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :70:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1147 = x1146 + x406 * poly_mix[143]; - // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:9) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :70:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x1148 = x1145 - x409; - // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:9) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :70:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x1149 = x1147 + x1148 * poly_mix[144]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :70:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1150 = x1149 + x413 * poly_mix[145]; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :70:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1151 = x1150 + x417 * poly_mix[146]; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:17) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :70:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1152 = x1151 + x419 * poly_mix[147]; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:17) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :70:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1153 = x1152 + x421 * poly_mix[148]; - // loc(callsite(unknown at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :40:26) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :70:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1154 = x412 * x962; - // loc(callsite(unknown at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :41:11) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :70:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1155 = x1154 * x415; - // loc(callsite(unknown at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :42:90) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :70:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1156 = x29 - x1154; - // loc(callsite(unknown at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :42:102) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :70:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1157 = x1156 * x19; - // loc(callsite(unknown at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :42:85) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :70:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1158 = x428 + x1157; - // loc(callsite(unknown at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :42:106) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :70:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1159 = x1158 + x1155; - // loc(callsite( Reg ( :5:7) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :42:21) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :70:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1160 = x1159 - x135; - // loc(callsite( Reg ( :5:7) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :42:21) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :70:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1161 = x1153 + x1160 * poly_mix[149]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :70:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1162 = x1161 + x433 * poly_mix[150]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :70:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1163 = x1162 + x435 * poly_mix[151]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :70:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1164 = x1163 + x8 * poly_mix[152]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :70:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1165 = x1164 + x8 * poly_mix[153]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :70:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1166 = x1165 + x439 * poly_mix[154]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :70:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1167 = x1166 + x442 * poly_mix[155]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :70:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1168 = x1167 + x444 * poly_mix[156]; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :70:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1169 = x1168 + x446 * poly_mix[157]; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :70:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1170 = x1169 + x448 * poly_mix[158]; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - FpExt x1171 = x959 + x154 * x1170 * poly_mix[380]; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:23) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :63:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1172 = x26 - x155; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1173 = arg0[119]; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:18) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :63:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1174 = x1173 * x1172; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:35) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :63:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1175 = x25 - x155; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :63:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1176 = x1174 * x1175; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :63:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - arg0[158] = x1176; - // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :63:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1177 = arg7 + x1176 * poly_mix[2]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :65:23) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1178 = x156 - x29; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :65:23) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1179 = x1177 + x1178 * poly_mix[3]; - // loc(callsite(unknown at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :65:53) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1180 = arg0[120]; - // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :65:23) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1181 = x157 - x1180; - // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :65:23) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1182 = x1179 + x1181 * poly_mix[4]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1183 = x29 - x158; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - arg0[215] = x1183; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1184 = x158 * x1183; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - arg0[159] = x1184; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1185 = x1182 + x1184 * poly_mix[5]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:4) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1186 = x901 * x159; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1187 = x1186 - x1183; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1188 = x1185 + x1187 * poly_mix[6]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:4) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1189 = x158 * x901; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:17) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1190 = x1188 + x1189 * poly_mix[7]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:4) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1191 = x158 * x159; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:17) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1192 = x1190 + x1191 * poly_mix[8]; - // loc(callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:19) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1193 = x1192 + x158 * poly_mix[9]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :69:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1194 = x160 - x29; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :69:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg0[332] = x1194; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :69:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1195 = x1193 + x1194 * poly_mix[10]; - // loc(callsite(unknown at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :71:4) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1196 = x161 * x23; - // loc(callsite(unknown at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :71:12) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1197 = x1196 + x155; - // loc(callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :71:21) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1198 = x1197 - x879; - // loc(callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :71:21) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1199 = x1195 + x1198 * poly_mix[11]; - // loc(callsite(unknown at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :73:12) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1200 = arg0[121]; - // loc(callsite(unknown at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :73:23) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1201 = x1200 + x161; - // loc(callsite(unknown at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :73:23) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg0[123] = x1201; - // loc(unknown) - auto x1202 = rv32im_v2_11(cycle, steps, poly_mix, x1199, arg0, arg4, x1171, arg7, arg8, arg9, arg10, arg11, arg12, arg13); - return x1202; -} -FpExt rv32im_v2_8(size_t cycle, size_t steps, FpExt* poly_mix, Fp* arg0, FpExt arg1, FpExt arg2, FpExt arg3, FpExt arg4, FpExt arg5, FpExt arg6, FpExt arg7, FpExt* arg8, FpExt arg9, Fp* arg10, Fp* arg11, Fp* arg12, Fp* arg13) { - size_t mask = steps - 1; - // loc(unknown) - constexpr Fp x0(1073725483); - // loc(unknown) - constexpr Fp x1(1073725482); - // loc(unknown) - constexpr Fp x2(1073725457); - // loc(unknown) - constexpr Fp x3(256); - // loc(unknown) - constexpr Fp x4(16); - // loc(unknown) - constexpr Fp x5(15); - // loc(unknown) - constexpr Fp x6(14); - // loc(unknown) - constexpr Fp x7(13); - // loc(unknown) - constexpr Fp x8(12); - // loc(unknown) - constexpr Fp x9(11); - // loc(unknown) - constexpr Fp x10(10); - // loc(unknown) - constexpr Fp x11(9); - // loc(unknown) - constexpr Fp x12(8); - // loc(unknown) - constexpr Fp x13(7); - // loc(unknown) - constexpr Fp x14(6); - // loc(unknown) - constexpr Fp x15(5); - // loc(unknown) - constexpr Fp x16(3); - // loc(unknown) - constexpr Fp x17(1797558858); - // loc(unknown) - constexpr Fp x18(32); - // loc(unknown) - constexpr Fp x19(1073725591); - // loc(unknown) - constexpr Fp x20(1073725590); - // loc(unknown) - constexpr Fp x21(1073725589); - // loc(unknown) - constexpr Fp x22(1073725588); - // loc(unknown) - constexpr Fp x23(1073725587); - // loc(unknown) - constexpr Fp x24(1073725586); - // loc(unknown) - constexpr Fp x25(1073725585); - // loc(unknown) - constexpr Fp x26(1073725584); - // loc(unknown) - constexpr Fp x27(65536); - // loc(unknown) - constexpr Fp x28(12320); - // loc(unknown) - constexpr Fp x29(1073725568); - // loc(unknown) - constexpr Fp x30(1073726464); - // loc(unknown) - constexpr Fp x31(128); - // loc(unknown) - constexpr Fp x32(1073725489); - // loc(unknown) - constexpr Fp x33(115); - // loc(unknown) - constexpr Fp x34(4); - // loc(unknown) - constexpr Fp x35(49151); - // loc(unknown) - constexpr Fp x36(65535); - // loc(unknown) - constexpr Fp x37(2); - // loc(unknown) - constexpr Fp x38(1); - // loc(unknown) - constexpr Fp x39(1073725599); - // loc(unknown) - constexpr Fp x40(1073725598); - // loc(unknown) - constexpr Fp x41(0); - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :26:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x42 = arg10[73 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :40:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x43 = arg13[10]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :27:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x44 = arg10[74 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :40:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x45 = arg13[11]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :29:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x46 = arg10[76 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :48:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x47 = arg10[0 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :34:30) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x48 = arg10[77 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( CycleArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :54:29) at callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :60:19) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x49 = arg10[104 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :65:23) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x50 = arg10[81 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :40:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x51 = arg13[12]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :8:23) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x52 = arg10[82 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :40:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x53 = arg13[13]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :28:29) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :69:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x54 = arg10[84 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :69:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x55 = arg10[85 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( CycleArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :55:29) at callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :60:19) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x56 = arg10[105 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :34:15) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x57 = arg10[106 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x58 = arg10[89 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :40:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x59 = arg13[14]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x60 = arg10[90 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :40:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x61 = arg13[15]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :26:28) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x62 = arg10[107 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :27:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x63 = arg10[109 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x64 = arg10[111 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x65 = arg10[113 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( CycleArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :54:29) at callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :60:19) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x66 = arg10[115 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :34:15) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x67 = arg10[117 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x68 = arg10[119 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x69 = arg10[121 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x70 = arg10[123 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x71 = arg10[125 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x72 = arg10[127 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x73 = arg10[129 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x74 = arg10[131 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x75 = arg10[133 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x76 = arg10[135 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x77 = arg10[137 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x78 = arg10[139 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x79 = arg10[141 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x80 = arg10[143 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x81 = arg10[145 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x82 = arg10[147 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x83 = arg10[149 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x84 = arg10[151 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x85 = arg10[153 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x86 = arg10[155 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x87 = arg10[157 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x88 = arg10[159 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x89 = arg10[161 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x90 = arg10[163 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x91 = arg10[165 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x92 = arg10[167 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x93 = arg10[169 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x94 = arg10[20 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x95 = arg10[171 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x96 = arg10[173 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x97 = arg10[172 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :25:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x98 = arg10[108 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x99 = arg10[175 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x100 = arg10[174 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x101 = arg10[110 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x102 = arg10[28 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :126:34) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :135:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x103 = arg10[34 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x104 = arg10[33 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :126:34) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :136:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x105 = arg10[36 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :51:29) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x106 = arg10[42 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x107 = arg10[41 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :25:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x108 = arg10[112 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x109 = arg10[44 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :26:28) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x110 = arg10[52 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :25:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x111 = arg10[57 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x112 = arg10[58 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x113 = arg10[59 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :17:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x114 = arg10[64 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :20:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x115 = arg10[67 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :25:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x116 = arg10[72 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x117 = arg10[75 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :28:29) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :65:23) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x118 = arg10[80 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :11:20) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x119 = arg10[83 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :27:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x120 = arg10[88 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x121 = arg10[99 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :25:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x122 = arg10[101 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x123 = arg10[103 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x124 = arg10[21 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x125 = arg10[176 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x126 = arg10[177 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x127 = arg10[114 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :28:29) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x128 = arg10[43 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :51:29) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x129 = arg10[48 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :42:21) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x130 = arg10[51 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU8 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :9:27) at callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :15:16) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :53:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x131 = arg10[56 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( CycleArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :55:29) at callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :60:19) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x132 = arg10[95 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :25:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x133 = arg10[97 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x134 = arg10[22 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( CycleArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :54:29) at callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :60:19) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x135 = arg10[60 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :21:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x136 = arg10[68 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x137 = arg13[17]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x138 = arg13[18]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x139 = arg13[19]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x140 = arg13[20]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :8:23) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x141 = arg10[49 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x142 = arg13[21]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :11:20) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x143 = arg10[50 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x144 = arg13[22]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x145 = arg13[23]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x146 = arg13[24]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :18:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x147 = arg10[65 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x148 = arg13[25]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :19:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x149 = arg10[66 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x150 = arg13[26]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x151 = arg13[27]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x152 = arg13[28]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x153 = arg13[29]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x154 = arg13[30]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x155 = arg13[31]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x156 = arg13[32]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :86:24) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x157 = arg13[16]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :92:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x158 = arg13[70]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :93:26) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x159 = arg13[69]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :94:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x160 = arg13[72]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :95:26) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x161 = arg13[71]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x162 = arg10[23 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x163 = arg10[30 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x164 = arg13[53]; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x165 = arg10[31 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x166 = arg13[54]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x167 = arg10[38 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x168 = arg13[55]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :45:28) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x169 = arg10[39 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x170 = arg13[56]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :28:29) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x171 = arg10[46 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x172 = arg13[57]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x173 = arg10[47 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x174 = arg13[58]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :27:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x175 = arg10[54 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x176 = arg13[59]; - // loc(callsite(unknown at callsite( ArgU8 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :8:29) at callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :15:16) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :53:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x177 = arg10[55 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x178 = arg13[60]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :15:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x179 = arg10[62 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x180 = arg13[61]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :16:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x181 = arg10[63 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x182 = arg13[62]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :23:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x183 = arg10[70 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x184 = arg13[63]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :24:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x185 = arg10[71 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x186 = arg13[64]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x187 = arg10[78 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x188 = arg13[65]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :63:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x189 = arg10[79 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x190 = arg13[66]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :26:28) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x191 = arg10[86 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x192 = arg13[67]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :25:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x193 = arg10[87 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x194 = arg13[68]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x195 = arg10[24 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( CycleArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :55:29) at callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :60:19) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x196 = arg10[116 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x197 = arg10[118 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x198 = arg10[120 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x199 = arg10[122 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x200 = arg10[124 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x201 = arg10[126 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x202 = arg10[128 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x203 = arg10[130 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x204 = arg10[132 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x205 = arg10[134 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x206 = arg10[136 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x207 = arg10[138 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x208 = arg10[140 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x209 = arg10[142 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x210 = arg10[144 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x211 = arg10[146 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x212 = arg10[148 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x213 = arg10[150 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x214 = arg10[152 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x215 = arg10[154 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x216 = arg10[156 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x217 = arg10[158 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x218 = arg10[160 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x219 = arg10[162 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x220 = arg10[164 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x221 = arg10[166 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x222 = arg10[168 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x223 = arg10[170 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x224 = arg10[27 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :126:34) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :134:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x225 = arg10[32 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x226 = arg10[35 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :28:29) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x227 = arg10[40 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :25:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x228 = arg10[91 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x229 = arg10[93 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x230 = arg10[25 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x231 = arg10[26 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x232 = arg10[8 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :22:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x233 = arg10[69 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x234 = arg10[19 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x235 = arg0[244]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x236 = arg1 + x235 * poly_mix[51]; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x237 = x42 - x43; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x238 = x236 + x237 * poly_mix[52]; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x239 = x44 - x45; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x240 = x238 + x239 * poly_mix[53]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x241 = arg0[245]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x242 = x240 + x241 * poly_mix[54]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :65:23) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x243 = arg0[240]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x244 = x242 + x243 * poly_mix[55]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x245 = x244 + x41 * poly_mix[56]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x246 = x245 + x41 * poly_mix[57]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x247 = x46 - x40; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x248 = x246 + x247 * poly_mix[58]; - // loc(callsite(unknown at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:22) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x249 = x47 - x48; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x250 = arg0[230]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x251 = x248 + x250 * poly_mix[59]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x252 = x49 - x249; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x253 = x251 + x252 * poly_mix[60]; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x254 = x50 - x51; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x255 = x253 + x254 * poly_mix[61]; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x256 = x52 - x53; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x257 = x255 + x256 * poly_mix[62]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x258 = arg0[246]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x259 = x257 + x258 * poly_mix[63]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :22:25) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x260 = arg0[247]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x261 = x259 + x260 * poly_mix[64]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x262 = x261 + x41 * poly_mix[65]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x263 = x262 + x41 * poly_mix[66]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x264 = x54 - x39; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x265 = x263 + x264 * poly_mix[67]; - // loc(callsite(unknown at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:22) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x266 = x47 - x55; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x267 = x56 - x38; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x268 = x265 + x267 * poly_mix[68]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x269 = x57 - x266; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x270 = x268 + x269 * poly_mix[69]; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x271 = x58 - x59; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x272 = x270 + x271 * poly_mix[70]; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x273 = x60 - x61; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x274 = x272 + x273 * poly_mix[71]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x275 = arg0[241]; - // loc(callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :34:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x276 = arg2 + x275 * x274 * poly_mix[41]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x277 = x276 + x62 * poly_mix[113]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x278 = x277 + x63 * poly_mix[114]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x279 = x278 + x64 * poly_mix[115]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x280 = x279 + x65 * poly_mix[116]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x281 = x280 + x66 * poly_mix[117]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x282 = x281 + x67 * poly_mix[118]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x283 = x282 + x68 * poly_mix[119]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x284 = x283 + x69 * poly_mix[120]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x285 = x284 + x70 * poly_mix[121]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x286 = x285 + x71 * poly_mix[122]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x287 = x286 + x72 * poly_mix[123]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x288 = x287 + x73 * poly_mix[124]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x289 = x288 + x74 * poly_mix[125]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x290 = x289 + x75 * poly_mix[126]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x291 = x290 + x76 * poly_mix[127]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x292 = x291 + x77 * poly_mix[128]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x293 = x292 + x78 * poly_mix[129]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x294 = x293 + x79 * poly_mix[130]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x295 = x294 + x80 * poly_mix[131]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x296 = x295 + x81 * poly_mix[132]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x297 = x296 + x82 * poly_mix[133]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x298 = x297 + x83 * poly_mix[134]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x299 = x298 + x84 * poly_mix[135]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x300 = x299 + x85 * poly_mix[136]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x301 = x300 + x86 * poly_mix[137]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x302 = x301 + x87 * poly_mix[138]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x303 = x302 + x88 * poly_mix[139]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x304 = x303 + x89 * poly_mix[140]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x305 = x304 + x90 * poly_mix[141]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x306 = x305 + x91 * poly_mix[142]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x307 = x306 + x92 * poly_mix[143]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x308 = x307 + x93 * poly_mix[144]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x309 = arg3 + x94 * x308 * poly_mix[114]; - // loc(callsite(unknown at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :58:61) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x310 = arg0[238]; - // loc(callsite( Reg ( :5:7) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :50:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x311 = x310 - x95; - // loc(callsite( Reg ( :5:7) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :50:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x312 = arg4 + x311 * poly_mix[0]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x313 = arg0[81]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :81:31) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :51:32) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x314 = x312 + x313 * poly_mix[1]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x315 = arg0[82]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :82:31) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :51:32) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x316 = x314 + x315 * poly_mix[2]; - // loc(callsite(unknown at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :83:19) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :51:32) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x317 = x96 * x37; - // loc(callsite(unknown at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :83:26) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :51:32) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x318 = x317 + x97; - // loc(callsite(unknown at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :85:24) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :51:32) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x319 = x95 * x36; - // loc(callsite(unknown at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :85:49) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :51:32) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x320 = x275 * x35; - // loc(callsite(unknown at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :85:31) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :51:32) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x321 = x319 + x320; - // loc(callsite(unknown at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :53:34) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x322 = arg0[102]; - // loc(callsite(unknown at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :85:53) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :51:32) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x323 = x321 - x322; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :11:25) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x324 = arg0[248]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :85:23) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :51:32) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x325 = x316 + x324 * poly_mix[3]; - // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :85:23) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :51:32) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x326 = x98 - x323; - // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :85:23) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :51:32) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x327 = x325 + x326 * poly_mix[4]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x328 = arg0[83]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :87:10) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :51:32) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x329 = x327 + x328 * poly_mix[5]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:4) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :87:10) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :51:32) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x330 = x322 * x99; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x331 = arg0[249]; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :87:10) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :51:32) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x332 = x330 - x331; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :87:10) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :51:32) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x333 = x329 + x332 * poly_mix[6]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:4) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :87:10) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :51:32) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x334 = x100 * x322; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:17) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :87:10) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :51:32) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x335 = x333 + x334 * poly_mix[7]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:4) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :87:10) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :51:32) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x336 = x100 * x99; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:17) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :87:10) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :51:32) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x337 = x335 + x336 * poly_mix[8]; - // loc(callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :87:19) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :51:32) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x338 = x337 + x100 * poly_mix[9]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :89:25) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :51:32) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x339 = x63 - x38; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :89:25) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :51:32) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x340 = x338 + x339 * poly_mix[10]; - // loc(callsite(unknown at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :91:4) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :51:32) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x341 = x101 * x34; - // loc(callsite(unknown at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :91:12) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :51:32) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x342 = x341 + x318; - // loc(callsite(unknown at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :52:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x343 = arg0[99]; - // loc(callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :91:21) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :51:32) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x344 = x342 - x343; - // loc(callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :91:21) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :51:32) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x345 = x340 + x344 * poly_mix[11]; - // loc(callsite(unknown at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :73:12) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x346 = arg0[121]; - // loc(callsite(unknown at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :93:30) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :51:32) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x347 = x346 + x101; - // loc(callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :52:17) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x348 = x345 + x318 * poly_mix[12]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x349 = arg0[250]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :53:27) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x350 = x348 + x349 * poly_mix[13]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x351 = arg0[251]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :53:27) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x352 = x350 + x351 * poly_mix[14]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :53:27) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x353 = x352 + x41 * poly_mix[15]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :53:27) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x354 = x353 + x41 * poly_mix[16]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :53:27) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x355 = x102 - x347; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :53:27) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x356 = x354 + x355 * poly_mix[17]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x357 = arg0[252]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :53:27) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x358 = x356 + x357 * poly_mix[18]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x359 = arg0[253]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :53:27) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x360 = x358 + x359 * poly_mix[19]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x361 = arg0[229]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :53:27) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x362 = x360 + x361 * poly_mix[20]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :36:22) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x363 = arg0[254]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :53:27) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x364 = x362 + x363 * poly_mix[21]; - // loc(callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :54:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x365 = x364 + x103 * poly_mix[22]; - // loc(callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :55:18) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x366 = x104 - x33; - // loc(callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :55:18) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x367 = x365 + x366 * poly_mix[23]; - // loc(callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :7:21) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x368 = arg0[255]; - // loc(callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :56:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x369 = x367 + x368 * poly_mix[24]; - // loc(callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :57:15) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x370 = x369 + x310 * poly_mix[25]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x371 = arg0[256]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :58:30) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x372 = x370 + x371 * poly_mix[26]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x373 = arg0[239]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :58:30) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x374 = x372 + x373 * poly_mix[27]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :58:30) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x375 = x374 + x41 * poly_mix[28]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :58:30) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x376 = x375 + x41 * poly_mix[29]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :58:30) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x377 = x105 - x32; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :58:30) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x378 = x376 + x377 * poly_mix[30]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x379 = arg0[257]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :58:30) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x380 = x378 + x379 * poly_mix[31]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x381 = arg0[258]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :58:30) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x382 = x380 + x381 * poly_mix[32]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :69:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x383 = arg0[242]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :58:30) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x384 = x382 + x383 * poly_mix[33]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :37:24) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x385 = arg0[259]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :58:30) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x386 = x384 + x385 * poly_mix[34]; - // loc(callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :59:22) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x387 = x386 + x106 * poly_mix[35]; - // loc(callsite(unknown at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :60:24) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x388 = x107 * x31; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :60:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x389 = arg0[260]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :60:10) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x390 = x387 + x389 * poly_mix[36]; - // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :60:10) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x391 = x108 - x388; - // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :60:10) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x392 = x390 + x391 * poly_mix[37]; - // loc(callsite(unknown at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :61:55) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x393 = x107 + x30; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x394 = arg0[261]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :61:29) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x395 = x392 + x394 * poly_mix[38]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x396 = arg0[262]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :61:29) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x397 = x395 + x396 * poly_mix[39]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :61:29) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x398 = x397 + x41 * poly_mix[40]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :61:29) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x399 = x398 + x41 * poly_mix[41]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :61:29) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x400 = x109 - x393; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :61:29) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x401 = x399 + x400 * poly_mix[42]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x402 = arg0[263]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :61:29) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x403 = x401 + x402 * poly_mix[43]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x404 = arg0[264]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :61:29) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x405 = x403 + x404 * poly_mix[44]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x406 = arg0[265]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :61:29) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x407 = x405 + x406 * poly_mix[45]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x408 = arg0[266]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :61:29) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x409 = x407 + x408 * poly_mix[46]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x410 = arg0[267]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :62:15) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x411 = x409 + x410 * poly_mix[47]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x412 = arg0[268]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :62:15) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x413 = x411 + x412 * poly_mix[48]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :62:15) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x414 = x413 + x41 * poly_mix[49]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :62:15) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x415 = x414 + x41 * poly_mix[50]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :62:15) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x416 = x110 - x29; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :62:15) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x417 = x415 + x416 * poly_mix[51]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x418 = arg0[213]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :62:15) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x419 = x417 + x418 * poly_mix[52]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x420 = arg0[269]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :62:15) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x421 = x419 + x420 * poly_mix[53]; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :62:15) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x422 = x111 - x343; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :62:15) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x423 = x421 + x422 * poly_mix[54]; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :62:15) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x424 = x112 - x322; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :62:15) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x425 = x423 + x424 * poly_mix[55]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x426 = x425 + x113 * poly_mix[56]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x427 = x426 + x114 * poly_mix[57]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x428 = x427 + x115 * poly_mix[58]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x429 = x428 + x116 * poly_mix[59]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x430 = x429 + x117 * poly_mix[60]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x431 = x430 + x118 * poly_mix[61]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x432 = x431 + x119 * poly_mix[62]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x433 = x432 + x120 * poly_mix[63]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x434 = x433 + x121 * poly_mix[64]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x435 = x434 + x122 * poly_mix[65]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x436 = x435 + x123 * poly_mix[66]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x437 = x436 + x56 * poly_mix[67]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x438 = x437 + x65 * poly_mix[68]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x439 = x438 + x66 * poly_mix[69]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x440 = x439 + x67 * poly_mix[70]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x441 = x440 + x68 * poly_mix[71]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x442 = x441 + x69 * poly_mix[72]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x443 = x442 + x70 * poly_mix[73]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x444 = x443 + x71 * poly_mix[74]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x445 = x444 + x72 * poly_mix[75]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x446 = x445 + x73 * poly_mix[76]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x447 = x446 + x74 * poly_mix[77]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x448 = x447 + x75 * poly_mix[78]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x449 = x448 + x76 * poly_mix[79]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x450 = x449 + x77 * poly_mix[80]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x451 = x450 + x78 * poly_mix[81]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x452 = x451 + x79 * poly_mix[82]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x453 = x452 + x80 * poly_mix[83]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x454 = x453 + x81 * poly_mix[84]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x455 = x454 + x82 * poly_mix[85]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x456 = x455 + x83 * poly_mix[86]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x457 = x456 + x84 * poly_mix[87]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x458 = x457 + x85 * poly_mix[88]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x459 = x458 + x86 * poly_mix[89]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x460 = x459 + x87 * poly_mix[90]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x461 = x460 + x88 * poly_mix[91]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x462 = x461 + x89 * poly_mix[92]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x463 = x462 + x90 * poly_mix[93]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x464 = x463 + x91 * poly_mix[94]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x465 = x464 + x92 * poly_mix[95]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x466 = x465 + x93 * poly_mix[96]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x467 = x309 + x124 * x466 * poly_mix[234]; - // loc(callsite( ControlMRET ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :71:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :180:17) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x468 = x103 - x28; - // loc(callsite( ControlMRET ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :71:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :180:17) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x469 = x364 + x468 * poly_mix[22]; - // loc(callsite( ControlMRET ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :72:18) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :180:17) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x470 = x469 + x366 * poly_mix[23]; - // loc(callsite( ControlMRET ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :73:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :180:17) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x471 = x470 + x368 * poly_mix[24]; - // loc(callsite( ControlMRET ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :74:15) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :180:17) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x472 = arg0[270]; - // loc(callsite( ControlMRET ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :74:15) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :180:17) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x473 = x471 + x472 * poly_mix[25]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlMRET ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :75:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :180:17) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x474 = x473 + x371 * poly_mix[26]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlMRET ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :75:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :180:17) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x475 = x474 + x373 * poly_mix[27]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlMRET ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :75:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :180:17) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x476 = x475 + x41 * poly_mix[28]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlMRET ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :75:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :180:17) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x477 = x476 + x41 * poly_mix[29]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlMRET ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :75:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :180:17) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x478 = x105 - x29; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlMRET ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :75:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :180:17) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x479 = x477 + x478 * poly_mix[30]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ControlMRET ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :75:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :180:17) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x480 = x479 + x379 * poly_mix[31]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ControlMRET ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :75:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :180:17) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x481 = x480 + x381 * poly_mix[32]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ControlMRET ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :75:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :180:17) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x482 = x481 + x383 * poly_mix[33]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ControlMRET ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :75:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :180:17) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x483 = x482 + x385 * poly_mix[34]; - // loc(callsite(unknown at callsite( AddU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :27:21) at callsite( ControlMRET ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :76:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :180:17) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x484 = x107 + x34; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( ControlMRET ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :76:26) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :180:17) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x485 = x483 + x389 * poly_mix[35]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x486 = arg0[85]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :45:28) at callsite( ControlMRET ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :76:26) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :180:17) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x487 = x485 + x486 * poly_mix[36]; - // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:12) at callsite( ControlMRET ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :76:26) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :180:17) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x488 = x125 * x27; - // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:23) at callsite( ControlMRET ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :76:26) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :180:17) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x489 = x488 + x108; - // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:10) at callsite( ControlMRET ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :76:26) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :180:17) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x490 = x484 - x489; - // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:10) at callsite( ControlMRET ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :76:26) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :180:17) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x491 = x487 + x490 * poly_mix[37]; - // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :48:14) at callsite( ControlMRET ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :76:26) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :180:17) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x492 = x106 + x125; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :11:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x493 = arg0[235]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( ControlMRET ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :76:26) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :180:17) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x494 = x491 + x493 * poly_mix[38]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x495 = arg0[86]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :51:29) at callsite( ControlMRET ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :76:26) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :180:17) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x496 = x494 + x495 * poly_mix[39]; - // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:11) at callsite( ControlMRET ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :76:26) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :180:17) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x497 = x126 * x27; - // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:23) at callsite( ControlMRET ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :76:26) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :180:17) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x498 = x497 + x127; - // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:9) at callsite( ControlMRET ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :76:26) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :180:17) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x499 = x492 - x498; - // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:9) at callsite( ControlMRET ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :76:26) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :180:17) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x500 = x496 + x499 * poly_mix[40]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x501 = x500 + x128 * poly_mix[41]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x502 = x501 + x129 * poly_mix[42]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x503 = x502 + x130 * poly_mix[43]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x504 = x503 + x131 * poly_mix[44]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x505 = x504 + x113 * poly_mix[45]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x506 = x505 + x114 * poly_mix[46]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x507 = x506 + x115 * poly_mix[47]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x508 = x507 + x116 * poly_mix[48]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x509 = x508 + x117 * poly_mix[49]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x510 = x509 + x118 * poly_mix[50]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x511 = x510 + x119 * poly_mix[51]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x512 = x511 + x120 * poly_mix[52]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x513 = x512 + x132 * poly_mix[53]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x514 = x513 + x133 * poly_mix[54]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x515 = x514 + x121 * poly_mix[55]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x516 = x515 + x122 * poly_mix[56]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x517 = x516 + x123 * poly_mix[57]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x518 = x517 + x56 * poly_mix[58]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x519 = x518 + x66 * poly_mix[59]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x520 = x519 + x67 * poly_mix[60]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x521 = x520 + x68 * poly_mix[61]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x522 = x521 + x69 * poly_mix[62]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x523 = x522 + x70 * poly_mix[63]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x524 = x523 + x71 * poly_mix[64]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x525 = x524 + x72 * poly_mix[65]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x526 = x525 + x73 * poly_mix[66]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x527 = x526 + x74 * poly_mix[67]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x528 = x527 + x75 * poly_mix[68]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x529 = x528 + x76 * poly_mix[69]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x530 = x529 + x77 * poly_mix[70]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x531 = x530 + x78 * poly_mix[71]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x532 = x531 + x79 * poly_mix[72]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x533 = x532 + x80 * poly_mix[73]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x534 = x533 + x81 * poly_mix[74]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x535 = x534 + x82 * poly_mix[75]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x536 = x535 + x83 * poly_mix[76]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x537 = x536 + x84 * poly_mix[77]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x538 = x537 + x85 * poly_mix[78]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x539 = x538 + x86 * poly_mix[79]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x540 = x539 + x87 * poly_mix[80]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x541 = x540 + x88 * poly_mix[81]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x542 = x541 + x89 * poly_mix[82]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x543 = x542 + x90 * poly_mix[83]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x544 = x543 + x91 * poly_mix[84]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x545 = x544 + x92 * poly_mix[85]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x546 = x545 + x93 * poly_mix[86]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x547 = x467 + x134 * x546 * poly_mix[291]; - // loc(callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :81:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x548 = arg0[271]; - // loc(callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :81:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x549 = arg4 + x548 * poly_mix[0]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :83:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x550 = x549 + x313 * poly_mix[1]; - // loc(callsite(unknown at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :33:31) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x551 = arg0[272]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:4) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :83:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x552 = x551 * x96; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x553 = arg0[273]; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :83:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x554 = x552 - x553; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :83:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x555 = x550 + x554 * poly_mix[2]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:4) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :33:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x556 = arg0[274]; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:17) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :83:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x557 = x555 + x556 * poly_mix[3]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:4) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :83:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x558 = x97 * x96; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:17) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :83:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x559 = x557 + x558 * poly_mix[4]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x560 = x102 - x26; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x561 = arg5 + x560 * poly_mix[4]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x562 = x561 + x357 * poly_mix[5]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x563 = x562 + x359 * poly_mix[6]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x564 = x563 + x361 * poly_mix[7]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x565 = x564 + x363 * poly_mix[8]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x566 = x565 + x371 * poly_mix[9]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x567 = x566 + x373 * poly_mix[10]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x568 = x567 + x41 * poly_mix[11]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x569 = x568 + x41 * poly_mix[12]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x570 = x105 - x25; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x571 = x569 + x570 * poly_mix[13]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x572 = x571 + x379 * poly_mix[14]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x573 = x572 + x381 * poly_mix[15]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x574 = x573 + x383 * poly_mix[16]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x575 = x574 + x385 * poly_mix[17]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x576 = x575 + x394 * poly_mix[18]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x577 = x576 + x396 * poly_mix[19]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x578 = x577 + x41 * poly_mix[20]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x579 = x578 + x41 * poly_mix[21]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x580 = x109 - x24; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x581 = x579 + x580 * poly_mix[22]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x582 = x581 + x402 * poly_mix[23]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x583 = x582 + x404 * poly_mix[24]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x584 = x583 + x406 * poly_mix[25]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x585 = x584 + x408 * poly_mix[26]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x586 = x585 + x410 * poly_mix[27]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x587 = x586 + x412 * poly_mix[28]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x588 = x587 + x41 * poly_mix[29]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x589 = x588 + x41 * poly_mix[30]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x590 = x110 - x23; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x591 = x589 + x590 * poly_mix[31]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x592 = arg0[275]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x593 = x591 + x592 * poly_mix[32]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x594 = arg0[276]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x595 = x593 + x594 * poly_mix[33]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x596 = x595 + x418 * poly_mix[34]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x597 = x596 + x420 * poly_mix[35]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x598 = arg0[277]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x599 = x597 + x598 * poly_mix[36]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x600 = arg0[278]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x601 = x599 + x600 * poly_mix[37]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x602 = x601 + x41 * poly_mix[38]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x603 = x602 + x41 * poly_mix[39]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x604 = x135 - x22; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x605 = x603 + x604 * poly_mix[40]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x606 = arg0[279]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x607 = x605 + x606 * poly_mix[41]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x608 = arg0[280]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x609 = x607 + x608 * poly_mix[42]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :85:23) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :24:36) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x610 = arg0[281]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x611 = x609 + x610 * poly_mix[43]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x612 = arg0[282]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x613 = x611 + x612 * poly_mix[44]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x614 = arg0[283]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x615 = x613 + x614 * poly_mix[45]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :11:25) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x616 = arg0[284]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x617 = x615 + x616 * poly_mix[46]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x618 = x617 + x41 * poly_mix[47]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x619 = x618 + x41 * poly_mix[48]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x620 = x136 - x21; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x621 = x619 + x620 * poly_mix[49]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :11:25) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x622 = arg0[285]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x623 = x621 + x622 * poly_mix[50]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :11:25) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x624 = arg0[286]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x625 = x623 + x624 * poly_mix[51]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x626 = arg0[243]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x627 = x625 + x626 * poly_mix[52]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x628 = x627 + x235 * poly_mix[53]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x629 = x628 + x241 * poly_mix[54]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x630 = x629 + x243 * poly_mix[55]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x631 = x630 + x41 * poly_mix[56]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x632 = x631 + x41 * poly_mix[57]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x633 = x46 - x20; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x634 = x632 + x633 * poly_mix[58]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x635 = arg0[287]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x636 = x634 + x635 * poly_mix[59]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x637 = arg0[288]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x638 = x636 + x637 * poly_mix[60]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x639 = x638 + x250 * poly_mix[61]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x640 = x639 + x252 * poly_mix[62]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x641 = x640 + x258 * poly_mix[63]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x642 = x641 + x260 * poly_mix[64]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x643 = x642 + x41 * poly_mix[65]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x644 = x643 + x41 * poly_mix[66]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x645 = x54 - x19; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x646 = x644 + x645 * poly_mix[67]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x647 = arg0[289]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x648 = x646 + x647 * poly_mix[68]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x649 = arg0[290]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x650 = x648 + x649 * poly_mix[69]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x651 = x650 + x267 * poly_mix[70]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x652 = x651 + x269 * poly_mix[71]; - // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x653 = x104 - x137; - // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x654 = x652 + x653 * poly_mix[72]; - // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x655 = x103 - x138; - // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x656 = x654 + x655 * poly_mix[73]; - // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x657 = x107 - x139; - // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x658 = x656 + x657 * poly_mix[74]; - // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x659 = x106 - x140; - // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x660 = x658 + x659 * poly_mix[75]; - // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x661 = x141 - x142; - // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x662 = x660 + x661 * poly_mix[76]; - // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x663 = x143 - x144; - // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x664 = x662 + x663 * poly_mix[77]; - // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x665 = x111 - x145; - // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x666 = x664 + x665 * poly_mix[78]; - // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x667 = x112 - x146; - // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x668 = x666 + x667 * poly_mix[79]; - // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x669 = x147 - x148; - // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x670 = x668 + x669 * poly_mix[80]; - // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x671 = x149 - x150; - // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x672 = x670 + x671 * poly_mix[81]; - // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x673 = x42 - x151; - // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x674 = x672 + x673 * poly_mix[82]; - // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x675 = x44 - x152; - // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x676 = x674 + x675 * poly_mix[83]; - // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x677 = x50 - x153; - // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x678 = x676 + x677 * poly_mix[84]; - // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x679 = x52 - x154; - // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x680 = x678 + x679 * poly_mix[85]; - // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x681 = x58 - x155; - // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x682 = x680 + x681 * poly_mix[86]; - // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x683 = x60 - x156; - // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x684 = x682 + x683 * poly_mix[87]; - // loc(callsite(unknown at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :91:10) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x685 = x38 - x157; - // loc(callsite( Reg ( :5:7) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :92:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x686 = x41 - x158; - // loc(callsite( Reg ( :5:7) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :92:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x687 = arg4 + x686 * poly_mix[0]; - // loc(callsite( Reg ( :5:7) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :93:26) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x688 = x41 - x159; - // loc(callsite( Reg ( :5:7) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :93:26) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x689 = x687 + x688 * poly_mix[1]; - // loc(callsite( Reg ( :5:7) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :94:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x690 = x41 - x160; - // loc(callsite( Reg ( :5:7) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :94:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x691 = x689 + x690 * poly_mix[2]; - // loc(callsite( Reg ( :5:7) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :95:26) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x692 = x41 - x161; - // loc(callsite( Reg ( :5:7) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :95:26) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x693 = x691 + x692 * poly_mix[3]; - // loc(callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :91:6) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x694 = x684 + x685 * x693 * poly_mix[88]; - // loc(callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :84:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x695 = x559 + x97 * x694 * poly_mix[5]; - // loc(callsite(unknown at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :56:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x696 = arg0[237]; - // loc(callsite( Reg ( :5:7) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :107:18) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x697 = x696 - x95; - // loc(callsite( Reg ( :5:7) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :107:18) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x698 = arg4 + x697 * poly_mix[0]; - // loc(callsite(unknown at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :108:7) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x699 = x95 - x18; - // loc(callsite(unknown at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :108:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x700 = x95 - x34; - // loc(callsite(unknown at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :108:28) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x701 = x699 * x700; - // loc(callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :108:57) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x702 = x698 + x701 * poly_mix[1]; - // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :111:54) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x703 = x699 * x17; - // loc(callsite( Reg ( :5:7) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :111:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x704 = x703 - x157; - // loc(callsite( Reg ( :5:7) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :111:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x705 = x702 + x704 * poly_mix[2]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :113:17) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x706 = x705 + x349 * poly_mix[3]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :113:17) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x707 = x706 + x351 * poly_mix[4]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :113:17) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x708 = x707 + x41 * poly_mix[5]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :113:17) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x709 = x708 + x41 * poly_mix[6]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :36:22) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x710 = arg0[291]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :113:17) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x711 = x709 + x710 * poly_mix[7]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :113:17) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x712 = x711 + x361 * poly_mix[8]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :113:17) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x713 = x712 + x363 * poly_mix[9]; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :113:17) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x714 = x104 - x343; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :113:17) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x715 = x713 + x714 * poly_mix[10]; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :113:17) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x716 = x103 - x322; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :113:17) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x717 = x715 + x716 * poly_mix[11]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :114:17) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x718 = x717 + x371 * poly_mix[12]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :114:17) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x719 = x718 + x373 * poly_mix[13]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :114:17) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x720 = x719 + x41 * poly_mix[14]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :114:17) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x721 = x720 + x41 * poly_mix[15]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :37:24) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x722 = arg0[292]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :114:17) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x723 = x721 + x722 * poly_mix[16]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :114:17) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x724 = x723 + x383 * poly_mix[17]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :114:17) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x725 = x724 + x385 * poly_mix[18]; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :114:17) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x726 = x107 - x310; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :114:17) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x727 = x725 + x726 * poly_mix[19]; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :114:17) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x728 = x727 + x106 * poly_mix[20]; - // loc(callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :84:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x729 = x728 + x128 * poly_mix[21]; - // loc(callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :84:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x730 = x729 + x129 * poly_mix[22]; - // loc(callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :84:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x731 = x730 + x130 * poly_mix[23]; - // loc(callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :84:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x732 = x731 + x131 * poly_mix[24]; - // loc(callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :84:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x733 = x732 + x113 * poly_mix[25]; - // loc(callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :84:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x734 = x733 + x114 * poly_mix[26]; - // loc(callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :84:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x735 = x734 + x115 * poly_mix[27]; - // loc(callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :84:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x736 = x735 + x116 * poly_mix[28]; - // loc(callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :84:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x737 = x736 + x117 * poly_mix[29]; - // loc(callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :84:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x738 = x737 + x118 * poly_mix[30]; - // loc(callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :84:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x739 = x738 + x119 * poly_mix[31]; - // loc(callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :84:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x740 = x739 + x120 * poly_mix[32]; - // loc(callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :84:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x741 = x740 + x132 * poly_mix[33]; - // loc(callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :84:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x742 = x741 + x133 * poly_mix[34]; - // loc(callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :84:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x743 = x742 + x121 * poly_mix[35]; - // loc(callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :84:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x744 = x743 + x122 * poly_mix[36]; - // loc(callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :84:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x745 = x744 + x123 * poly_mix[37]; - // loc(callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :84:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x746 = x745 + x56 * poly_mix[38]; - // loc(callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :84:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x747 = x695 + x553 * x746 * poly_mix[97]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x748 = x747 + x62 * poly_mix[136]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x749 = x748 + x63 * poly_mix[137]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x750 = x749 + x64 * poly_mix[138]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x751 = x750 + x65 * poly_mix[139]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x752 = x751 + x66 * poly_mix[140]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x753 = x752 + x67 * poly_mix[141]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x754 = x753 + x68 * poly_mix[142]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x755 = x754 + x69 * poly_mix[143]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x756 = x755 + x70 * poly_mix[144]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x757 = x756 + x71 * poly_mix[145]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x758 = x757 + x72 * poly_mix[146]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x759 = x758 + x73 * poly_mix[147]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x760 = x759 + x74 * poly_mix[148]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x761 = x760 + x75 * poly_mix[149]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x762 = x761 + x76 * poly_mix[150]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x763 = x762 + x77 * poly_mix[151]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x764 = x763 + x78 * poly_mix[152]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x765 = x764 + x79 * poly_mix[153]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x766 = x765 + x80 * poly_mix[154]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x767 = x766 + x81 * poly_mix[155]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x768 = x767 + x82 * poly_mix[156]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x769 = x768 + x83 * poly_mix[157]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x770 = x769 + x84 * poly_mix[158]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x771 = x770 + x85 * poly_mix[159]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x772 = x771 + x86 * poly_mix[160]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x773 = x772 + x87 * poly_mix[161]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x774 = x773 + x88 * poly_mix[162]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x775 = x774 + x89 * poly_mix[163]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x776 = x775 + x90 * poly_mix[164]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x777 = x776 + x91 * poly_mix[165]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x778 = x777 + x92 * poly_mix[166]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x779 = x778 + x93 * poly_mix[167]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x780 = x547 + x162 * x779 * poly_mix[338]; - // loc(callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :121:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x781 = arg0[293]; - // loc(callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :121:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x782 = arg4 + x781 * poly_mix[0]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x783 = x782 + x349 * poly_mix[1]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x784 = x783 + x351 * poly_mix[2]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x785 = x784 + x41 * poly_mix[3]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x786 = x785 + x41 * poly_mix[4]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x787 = arg0[294]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x788 = x786 + x787 * poly_mix[5]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :121:13) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x789 = x788 + x361 * poly_mix[6]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :121:13) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x790 = x789 + x363 * poly_mix[7]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x791 = x790 + x371 * poly_mix[8]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x792 = x791 + x373 * poly_mix[9]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x793 = x792 + x41 * poly_mix[10]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x794 = x793 + x41 * poly_mix[11]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x795 = arg0[295]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x796 = x794 + x795 * poly_mix[12]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :121:13) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x797 = x796 + x383 * poly_mix[13]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :121:13) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x798 = x797 + x385 * poly_mix[14]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x799 = x798 + x394 * poly_mix[15]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x800 = x799 + x396 * poly_mix[16]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x801 = x800 + x41 * poly_mix[17]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x802 = x801 + x41 * poly_mix[18]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x803 = arg0[296]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x804 = x802 + x803 * poly_mix[19]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :121:13) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x805 = x804 + x406 * poly_mix[20]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :121:13) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x806 = x805 + x408 * poly_mix[21]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x807 = x806 + x410 * poly_mix[22]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x808 = x807 + x412 * poly_mix[23]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x809 = x808 + x41 * poly_mix[24]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x810 = x809 + x41 * poly_mix[25]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x811 = arg0[297]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x812 = x810 + x811 * poly_mix[26]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :121:13) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x813 = x812 + x418 * poly_mix[27]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :121:13) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x814 = x813 + x420 * poly_mix[28]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x815 = x814 + x598 * poly_mix[29]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x816 = x815 + x600 * poly_mix[30]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x817 = x816 + x41 * poly_mix[31]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x818 = x817 + x41 * poly_mix[32]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x819 = arg0[298]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x820 = x818 + x819 * poly_mix[33]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :121:13) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x821 = x820 + x610 * poly_mix[34]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :121:13) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x822 = x821 + x612 * poly_mix[35]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x823 = x822 + x614 * poly_mix[36]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x824 = x823 + x616 * poly_mix[37]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x825 = x824 + x41 * poly_mix[38]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x826 = x825 + x41 * poly_mix[39]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x827 = arg0[299]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x828 = x826 + x827 * poly_mix[40]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :121:13) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x829 = x828 + x626 * poly_mix[41]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :121:13) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x830 = x829 + x235 * poly_mix[42]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x831 = x830 + x241 * poly_mix[43]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x832 = x831 + x243 * poly_mix[44]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x833 = x832 + x41 * poly_mix[45]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x834 = x833 + x41 * poly_mix[46]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x835 = arg0[300]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x836 = x834 + x835 * poly_mix[47]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :121:13) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x837 = x836 + x250 * poly_mix[48]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :121:13) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x838 = x837 + x252 * poly_mix[49]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x839 = x838 + x258 * poly_mix[50]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x840 = x839 + x260 * poly_mix[51]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x841 = x840 + x41 * poly_mix[52]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x842 = x841 + x41 * poly_mix[53]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x843 = arg0[301]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x844 = x842 + x843 * poly_mix[54]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :121:13) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x845 = x844 + x267 * poly_mix[55]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :121:13) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x846 = x845 + x269 * poly_mix[56]; - // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x847 = x163 - x164; - // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x848 = x846 + x847 * poly_mix[57]; - // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x849 = x165 - x166; - // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x850 = x848 + x849 * poly_mix[58]; - // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x851 = x167 - x168; - // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x852 = x850 + x851 * poly_mix[59]; - // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x853 = x169 - x170; - // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x854 = x852 + x853 * poly_mix[60]; - // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x855 = x171 - x172; - // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x856 = x854 + x855 * poly_mix[61]; - // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x857 = x173 - x174; - // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x858 = x856 + x857 * poly_mix[62]; - // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x859 = x175 - x176; - // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x860 = x858 + x859 * poly_mix[63]; - // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x861 = x177 - x178; - // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x862 = x860 + x861 * poly_mix[64]; - // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x863 = x179 - x180; - // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x864 = x862 + x863 * poly_mix[65]; - // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x865 = x181 - x182; - // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x866 = x864 + x865 * poly_mix[66]; - // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x867 = x183 - x184; - // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x868 = x866 + x867 * poly_mix[67]; - // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x869 = x185 - x186; - // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x870 = x868 + x869 * poly_mix[68]; - // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x871 = x187 - x188; - // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x872 = x870 + x871 * poly_mix[69]; - // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x873 = x189 - x190; - // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x874 = x872 + x873 * poly_mix[70]; - // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x875 = x191 - x192; - // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x876 = x874 + x875 * poly_mix[71]; - // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x877 = x193 - x194; - // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x878 = x876 + x877 * poly_mix[72]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x879 = x878 + x62 * poly_mix[73]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x880 = x879 + x63 * poly_mix[74]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x881 = x880 + x64 * poly_mix[75]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x882 = x881 + x65 * poly_mix[76]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x883 = x882 + x66 * poly_mix[77]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x884 = x883 + x67 * poly_mix[78]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x885 = x884 + x68 * poly_mix[79]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x886 = x885 + x69 * poly_mix[80]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x887 = x886 + x70 * poly_mix[81]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x888 = x887 + x71 * poly_mix[82]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x889 = x888 + x72 * poly_mix[83]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x890 = x889 + x73 * poly_mix[84]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x891 = x890 + x74 * poly_mix[85]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x892 = x891 + x75 * poly_mix[86]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x893 = x892 + x76 * poly_mix[87]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x894 = x893 + x77 * poly_mix[88]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x895 = x894 + x78 * poly_mix[89]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x896 = x895 + x79 * poly_mix[90]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x897 = x896 + x80 * poly_mix[91]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x898 = x897 + x81 * poly_mix[92]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x899 = x898 + x82 * poly_mix[93]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x900 = x899 + x83 * poly_mix[94]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x901 = x900 + x84 * poly_mix[95]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x902 = x901 + x85 * poly_mix[96]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x903 = x902 + x86 * poly_mix[97]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x904 = x903 + x87 * poly_mix[98]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x905 = x904 + x88 * poly_mix[99]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x906 = x905 + x89 * poly_mix[100]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x907 = x906 + x90 * poly_mix[101]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x908 = x907 + x91 * poly_mix[102]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x909 = x908 + x92 * poly_mix[103]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x910 = x909 + x93 * poly_mix[104]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x911 = x780 + x195 * x910 * poly_mix[361]; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :131:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x912 = arg0[302]; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :131:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x913 = arg4 + x912 * poly_mix[0]; - // loc(callsite( Reg ( :5:7) at callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :132:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x914 = x343 - x96; - // loc(callsite( Reg ( :5:7) at callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :132:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x915 = x913 + x914 * poly_mix[1]; - // loc(callsite( Reg ( :5:7) at callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :133:15) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x916 = x310 - x100; - // loc(callsite( Reg ( :5:7) at callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :133:15) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x917 = x915 + x916 * poly_mix[2]; - // loc(callsite(unknown at callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :138:15) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x918 = x96 + x38; - // loc(callsite(unknown at callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :138:15) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x919 = x96 + x37; - // loc(callsite(unknown at callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :138:15) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x920 = x96 + x16; - // loc(callsite(unknown at callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :138:15) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x921 = x96 + x34; - // loc(callsite(unknown at callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :138:15) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x922 = x96 + x15; - // loc(callsite(unknown at callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :138:15) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x923 = x96 + x14; - // loc(callsite(unknown at callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :138:15) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x924 = x96 + x13; - // loc(callsite(unknown at callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :138:15) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x925 = x96 + x12; - // loc(callsite(unknown at callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :138:15) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x926 = x96 + x11; - // loc(callsite(unknown at callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :138:15) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x927 = x96 + x10; - // loc(callsite(unknown at callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :138:15) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x928 = x96 + x9; - // loc(callsite(unknown at callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :138:15) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x929 = x96 + x8; - // loc(callsite(unknown at callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :138:15) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x930 = x96 + x7; - // loc(callsite(unknown at callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :138:15) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x931 = x96 + x6; - // loc(callsite(unknown at callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :138:15) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x932 = x96 + x5; - // loc(callsite(unknown at callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :142:14) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x933 = x96 + x4; - // loc(callsite(unknown at callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :143:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x934 = x933 - x27; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :140:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x935 = x98 - x96; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :140:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x936 = arg4 + x935 * poly_mix[0]; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :140:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x937 = x101 - x918; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :140:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x938 = x936 + x937 * poly_mix[1]; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :140:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x939 = x108 - x919; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :140:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x940 = x938 + x939 * poly_mix[2]; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :140:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x941 = x127 - x920; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :140:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x942 = x940 + x941 * poly_mix[3]; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :140:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x943 = x196 - x921; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :140:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x944 = x942 + x943 * poly_mix[4]; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :140:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x945 = x197 - x922; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :140:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x946 = x944 + x945 * poly_mix[5]; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :140:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x947 = x198 - x923; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :140:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x948 = x946 + x947 * poly_mix[6]; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :140:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x949 = x199 - x924; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :140:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x950 = x948 + x949 * poly_mix[7]; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :140:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x951 = x200 - x925; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :140:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x952 = x950 + x951 * poly_mix[8]; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :140:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x953 = x201 - x926; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :140:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x954 = x952 + x953 * poly_mix[9]; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :140:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x955 = x202 - x927; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :140:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x956 = x954 + x955 * poly_mix[10]; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :140:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x957 = x203 - x928; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :140:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x958 = x956 + x957 * poly_mix[11]; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :140:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x959 = x204 - x929; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :140:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x960 = x958 + x959 * poly_mix[12]; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :140:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x961 = x205 - x930; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :140:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x962 = x960 + x961 * poly_mix[13]; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :140:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x963 = x206 - x931; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :140:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x964 = x962 + x963 * poly_mix[14]; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :140:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x965 = x207 - x932; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :140:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x966 = x964 + x965 * poly_mix[15]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x967 = arg0[80]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :143:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x968 = x966 + x967 * poly_mix[16]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:4) at callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :143:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x969 = x934 * x97; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :143:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x970 = x969 - x275; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :143:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x971 = x968 + x970 * poly_mix[17]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:4) at callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :143:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x972 = x95 * x934; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:17) at callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :143:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x973 = x971 + x972 * poly_mix[18]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:4) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :33:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x974 = arg0[303]; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:17) at callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :143:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x975 = x973 + x974 * poly_mix[19]; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :135:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x976 = x975 + x78 * poly_mix[20]; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :135:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x977 = x976 + x79 * poly_mix[21]; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :135:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x978 = x977 + x80 * poly_mix[22]; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :135:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x979 = x978 + x81 * poly_mix[23]; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :135:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x980 = x979 + x82 * poly_mix[24]; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :135:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x981 = x980 + x83 * poly_mix[25]; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :135:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x982 = x981 + x84 * poly_mix[26]; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :135:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x983 = x982 + x85 * poly_mix[27]; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :135:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x984 = x983 + x86 * poly_mix[28]; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :135:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x985 = x984 + x87 * poly_mix[29]; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :135:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x986 = x985 + x88 * poly_mix[30]; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :135:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x987 = x986 + x89 * poly_mix[31]; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :135:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x988 = x987 + x90 * poly_mix[32]; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :135:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x989 = x988 + x91 * poly_mix[33]; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :135:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x990 = x989 + x92 * poly_mix[34]; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :135:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x991 = x990 + x93 * poly_mix[35]; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :135:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x992 = x917 + x100 * x991 * poly_mix[3]; - // loc(callsite(unknown at callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :157:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x993 = x933 - x3; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :154:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x994 = x208 - x96; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :154:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x995 = arg4 + x994 * poly_mix[0]; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :154:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x996 = x209 - x918; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :154:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x997 = x995 + x996 * poly_mix[1]; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :154:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x998 = x210 - x919; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :154:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x999 = x997 + x998 * poly_mix[2]; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :154:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x1000 = x211 - x920; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :154:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x1001 = x999 + x1000 * poly_mix[3]; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :154:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x1002 = x212 - x921; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :154:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x1003 = x1001 + x1002 * poly_mix[4]; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :154:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x1004 = x213 - x922; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :154:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x1005 = x1003 + x1004 * poly_mix[5]; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :154:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x1006 = x214 - x923; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :154:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x1007 = x1005 + x1006 * poly_mix[6]; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :154:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x1008 = x215 - x924; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :154:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x1009 = x1007 + x1008 * poly_mix[7]; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :154:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x1010 = x216 - x925; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :154:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x1011 = x1009 + x1010 * poly_mix[8]; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :154:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x1012 = x217 - x926; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :154:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x1013 = x1011 + x1012 * poly_mix[9]; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :154:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x1014 = x218 - x927; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :154:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x1015 = x1013 + x1014 * poly_mix[10]; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :154:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x1016 = x219 - x928; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :154:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x1017 = x1015 + x1016 * poly_mix[11]; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :154:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x1018 = x220 - x929; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :154:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x1019 = x1017 + x1018 * poly_mix[12]; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :154:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x1020 = x221 - x930; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :154:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x1021 = x1019 + x1020 * poly_mix[13]; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :154:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x1022 = x222 - x931; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :154:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x1023 = x1021 + x1022 * poly_mix[14]; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :154:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x1024 = x223 - x932; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :154:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x1025 = x1023 + x1024 * poly_mix[15]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :157:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1026 = x1025 + x967 * poly_mix[16]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:4) at callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :157:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1027 = x993 * x97; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :157:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x1028 = x1027 - x275; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :157:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x1029 = x1026 + x1028 * poly_mix[17]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:4) at callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :157:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1030 = x95 * x993; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:17) at callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :157:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x1031 = x1029 + x1030 * poly_mix[18]; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:17) at callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :157:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x1032 = x1031 + x974 * poly_mix[19]; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :135:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x1033 = x1032 + x62 * poly_mix[20]; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :135:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x1034 = x1033 + x63 * poly_mix[21]; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :135:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x1035 = x1034 + x64 * poly_mix[22]; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :135:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x1036 = x1035 + x65 * poly_mix[23]; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :135:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x1037 = x1036 + x66 * poly_mix[24]; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :135:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x1038 = x1037 + x67 * poly_mix[25]; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :135:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x1039 = x1038 + x68 * poly_mix[26]; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :135:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x1040 = x1039 + x69 * poly_mix[27]; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :135:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x1041 = x1040 + x70 * poly_mix[28]; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :135:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x1042 = x1041 + x71 * poly_mix[29]; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :135:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x1043 = x1042 + x72 * poly_mix[30]; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :135:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x1044 = x1043 + x73 * poly_mix[31]; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :135:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x1045 = x1044 + x74 * poly_mix[32]; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :135:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x1046 = x1045 + x75 * poly_mix[33]; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :135:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x1047 = x1046 + x76 * poly_mix[34]; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :135:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x1048 = x1047 + x77 * poly_mix[35]; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :135:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x1049 = x992 + x331 * x1048 * poly_mix[39]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1050 = x1049 + x224 * poly_mix[75]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1051 = x1050 + x225 * poly_mix[76]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1052 = x1051 + x226 * poly_mix[77]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1053 = x1052 + x227 * poly_mix[78]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1054 = x1053 + x128 * poly_mix[79]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1055 = x1054 + x129 * poly_mix[80]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1056 = x1055 + x130 * poly_mix[81]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1057 = x1056 + x131 * poly_mix[82]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1058 = x1057 + x113 * poly_mix[83]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1059 = x1058 + x114 * poly_mix[84]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1060 = x1059 + x115 * poly_mix[85]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1061 = x1060 + x116 * poly_mix[86]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1062 = x1061 + x117 * poly_mix[87]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1063 = x1062 + x118 * poly_mix[88]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1064 = x1063 + x119 * poly_mix[89]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1065 = x1064 + x120 * poly_mix[90]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1066 = x1065 + x228 * poly_mix[91]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1067 = x1066 + x229 * poly_mix[92]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1068 = x1067 + x132 * poly_mix[93]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1069 = x1068 + x133 * poly_mix[94]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1070 = x1069 + x121 * poly_mix[95]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1071 = x1070 + x122 * poly_mix[96]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1072 = x1071 + x123 * poly_mix[97]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1073 = x1072 + x56 * poly_mix[98]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1074 = x911 + x230 * x1073 * poly_mix[374]; - // loc(callsite( ControlDone ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :167:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :184:17) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x1075 = arg0[304]; - // loc(callsite( ControlDone ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :167:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :184:17) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x1076 = arg4 + x1075 * poly_mix[0]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1077 = x1076 + x224 * poly_mix[1]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1078 = x1077 + x225 * poly_mix[2]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1079 = x1078 + x226 * poly_mix[3]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1080 = x1079 + x227 * poly_mix[4]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1081 = x1080 + x128 * poly_mix[5]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1082 = x1081 + x129 * poly_mix[6]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1083 = x1082 + x130 * poly_mix[7]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1084 = x1083 + x131 * poly_mix[8]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1085 = x1084 + x113 * poly_mix[9]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1086 = x1085 + x114 * poly_mix[10]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1087 = x1086 + x115 * poly_mix[11]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1088 = x1087 + x116 * poly_mix[12]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1089 = x1088 + x117 * poly_mix[13]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1090 = x1089 + x118 * poly_mix[14]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1091 = x1090 + x119 * poly_mix[15]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1092 = x1091 + x120 * poly_mix[16]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1093 = x1092 + x228 * poly_mix[17]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1094 = x1093 + x229 * poly_mix[18]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1095 = x1094 + x132 * poly_mix[19]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1096 = x1095 + x133 * poly_mix[20]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1097 = x1096 + x121 * poly_mix[21]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1098 = x1097 + x122 * poly_mix[22]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1099 = x1098 + x123 * poly_mix[23]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1100 = x1099 + x56 * poly_mix[24]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1101 = x1100 + x62 * poly_mix[25]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1102 = x1101 + x63 * poly_mix[26]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1103 = x1102 + x64 * poly_mix[27]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1104 = x1103 + x65 * poly_mix[28]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1105 = x1104 + x66 * poly_mix[29]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1106 = x1105 + x67 * poly_mix[30]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1107 = x1106 + x68 * poly_mix[31]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1108 = x1107 + x69 * poly_mix[32]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1109 = x1108 + x70 * poly_mix[33]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1110 = x1109 + x71 * poly_mix[34]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1111 = x1110 + x72 * poly_mix[35]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1112 = x1111 + x73 * poly_mix[36]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1113 = x1112 + x74 * poly_mix[37]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1114 = x1113 + x75 * poly_mix[38]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1115 = x1114 + x76 * poly_mix[39]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1116 = x1115 + x77 * poly_mix[40]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1117 = x1116 + x78 * poly_mix[41]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1118 = x1117 + x79 * poly_mix[42]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1119 = x1118 + x80 * poly_mix[43]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1120 = x1119 + x81 * poly_mix[44]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1121 = x1120 + x82 * poly_mix[45]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1122 = x1121 + x83 * poly_mix[46]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1123 = x1122 + x84 * poly_mix[47]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1124 = x1123 + x85 * poly_mix[48]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1125 = x1124 + x86 * poly_mix[49]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1126 = x1125 + x87 * poly_mix[50]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1127 = x1126 + x88 * poly_mix[51]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1128 = x1127 + x89 * poly_mix[52]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1129 = x1128 + x90 * poly_mix[53]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1130 = x1129 + x91 * poly_mix[54]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1131 = x1130 + x92 * poly_mix[55]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1132 = x1131 + x93 * poly_mix[56]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1133 = x1074 + x231 * x1132 * poly_mix[381]; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - FpExt x1134 = arg6 + x232 * x1133 * poly_mix[392]; - // loc(callsite( ECallTerminate ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :44:16) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :160:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x1135 = x696 - x11; - // loc(callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :67:16) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x1136 = x696 - x10; - // loc(callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :67:16) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - arg0[311] = x1136; - // loc(callsite( ECallHostWrite ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :102:16) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :162:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x1137 = x696 - x9; - // loc(callsite( ECallHostWrite ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :102:16) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :162:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - arg0[325] = x1137; - // loc(callsite( ECallHostReadBytes ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :121:16) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :163:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x1138 = x696 - x8; - // loc(callsite( ECallHostReadBytes ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :121:16) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :163:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - arg0[326] = x1138; - // loc(callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :127:16) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x1139 = x696 - x7; - // loc(callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :127:16) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - arg0[327] = x1139; - // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x1140 = x94 * x34; - // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - arg0[328] = x1140; - // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x1141 = x134 * x18; - // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - arg0[329] = x1141; - // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x1142 = x162 * x4; - // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - arg0[330] = x1142; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:4) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :27:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1143 = arg0[133]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :81:31) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :156:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1144 = arg4 + x1143 * poly_mix[0]; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:4) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1145 = arg0[134]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :82:31) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :156:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1146 = x1144 + x1145 * poly_mix[1]; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :57:30) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1147 = arg0[27]; - // loc(callsite(unknown at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :83:26) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :156:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x1148 = x1147 + x44; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :85:23) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :156:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1149 = x46 - x38; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :85:23) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :156:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1150 = x1146 + x1149 * poly_mix[2]; - // loc(callsite(unknown at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :65:53) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1151 = arg0[120]; - // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :85:23) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :156:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x1152 = x48 - x1151; - // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :85:23) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :156:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x1153 = x1150 + x1152 * poly_mix[3]; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:4) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1154 = arg0[305]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :87:10) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :156:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1155 = x1153 + x1154 * poly_mix[4]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:4) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :87:10) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :156:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1156 = x322 * x189; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:11) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1157 = arg0[306]; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :87:10) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :156:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x1158 = x1156 - x1157; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :87:10) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :156:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x1159 = x1155 + x1158 * poly_mix[5]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:4) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :87:10) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :156:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1160 = x187 * x322; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:17) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :87:10) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :156:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x1161 = x1159 + x1160 * poly_mix[6]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:4) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :87:10) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :156:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1162 = x187 * x189; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:17) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :87:10) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :156:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x1163 = x1161 + x1162 * poly_mix[7]; - // loc(callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :87:19) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :156:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x1164 = x1163 + x187 * poly_mix[8]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :89:25) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :156:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x1165 = x1164 + x243 * poly_mix[9]; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :60:20) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1166 = arg0[307]; - // loc(callsite(unknown at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :91:12) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :156:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x1167 = x1166 + x1148; - // loc(callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :91:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :156:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x1168 = x1167 - x343; - // loc(callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :91:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :156:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x1169 = x1165 + x1168 * poly_mix[10]; - // loc(callsite(unknown at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :93:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :156:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x1170 = x346 + x50; - // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :157:17) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1171 = x1169 + x1148 * poly_mix[11]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :26:27) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1172 = x102 - x1170; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :26:27) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1173 = arg5 + x1172 * poly_mix[4]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :26:27) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1174 = x1173 + x357 * poly_mix[5]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :26:27) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1175 = x1174 + x359 * poly_mix[6]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1176 = arg0[173]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :26:27) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1177 = x1175 + x1176 * poly_mix[7]; - // loc(callsite(unknown at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :36:22) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1178 = arg0[308]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :26:27) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1179 = x135 - x1178; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :26:27) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg0[312] = x1179; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :26:27) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1180 = x1177 + x1179 * poly_mix[8]; - // loc(callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :27:16) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x1181 = x1180 + x368 * poly_mix[9]; - // loc(callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :28:19) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x1182 = x1181 + x103 * poly_mix[10]; - // loc(callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :29:18) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x1183 = x1182 + x366 * poly_mix[11]; - // loc(callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :30:15) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x1184 = x1183 + x472 * poly_mix[12]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :31:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1185 = x1184 + x371 * poly_mix[13]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :31:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1186 = x1185 + x373 * poly_mix[14]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :31:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1187 = x1186 + x41 * poly_mix[15]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :31:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1188 = x1187 + x41 * poly_mix[16]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :31:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1189 = x105 - x2; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :31:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1190 = x1188 + x1189 * poly_mix[17]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :31:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1191 = x1190 + x379 * poly_mix[18]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :31:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1192 = x1191 + x381 * poly_mix[19]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1193 = arg0[174]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :31:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1194 = x1192 + x1193 * poly_mix[20]; - // loc(callsite(unknown at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :37:24) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1195 = arg0[309]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :31:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1196 = x179 - x1195; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :31:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg0[313] = x1196; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :31:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1197 = x1194 + x1196 * poly_mix[21]; - // loc(callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :32:22) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x1198 = x1197 + x106 * poly_mix[22]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1199 = arg0[119]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :33:25) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1200 = x1198 + x1199 * poly_mix[23]; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:4) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :27:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1201 = arg0[208]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :33:25) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1202 = x1200 + x1201 * poly_mix[24]; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:4) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1203 = arg0[209]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :33:25) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1204 = x1202 + x1203 * poly_mix[25]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1205 = arg0[159]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :33:25) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1206 = x1204 + x1205 * poly_mix[26]; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:4) at callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :33:25) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1207 = x52 + x119; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:4) at callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :33:25) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1208 = x1207 + x54; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:4) at callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :33:25) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1209 = x1208 + x55; - // loc(callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:32) at callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :33:25) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x1210 = x1209 - x38; - // loc(callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:32) at callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :33:25) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x1211 = x1206 + x1210 * poly_mix[27]; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:32) at callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :33:25) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1212 = x55 * x16; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :57:30) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1213 = arg0[310]; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:4) at callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :33:25) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1214 = x119 + x1213; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:4) at callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :33:25) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1215 = x1214 + x1212; - // loc(callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:56) at callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :33:25) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x1216 = x1215 - x107; - // loc(callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:56) at callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :33:25) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x1217 = x1211 + x1216 * poly_mix[28]; - // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1218 = x1217 + x128 * poly_mix[29]; - // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1219 = x1218 + x129 * poly_mix[30]; - // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1220 = x1219 + x130 * poly_mix[31]; - // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1221 = x1220 + x131 * poly_mix[32]; - // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1222 = x1221 + x181 * poly_mix[33]; - // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1223 = x1222 + x147 * poly_mix[34]; - // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1224 = x1223 + x115 * poly_mix[35]; - // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1225 = x1224 + x233 * poly_mix[36]; - // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1226 = x1171 + x234 * x1225 * poly_mix[12]; - // loc(callsite( ECallTerminate ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :44:16) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :160:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x1227 = arg4 + x1135 * poly_mix[0]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ECallTerminate ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :45:20) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :160:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1228 = x1227 + x349 * poly_mix[1]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ECallTerminate ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :45:20) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :160:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1229 = x1228 + x351 * poly_mix[2]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ECallTerminate ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :45:20) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :160:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1230 = x1229 + x41 * poly_mix[3]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ECallTerminate ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :45:20) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :160:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1231 = x1230 + x41 * poly_mix[4]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ECallTerminate ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :45:20) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :160:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1232 = x102 - x1; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ECallTerminate ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :45:20) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :160:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1233 = x1231 + x1232 * poly_mix[5]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ECallTerminate ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :45:20) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :160:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1234 = x1233 + x357 * poly_mix[6]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ECallTerminate ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :45:20) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :160:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1235 = x1234 + x359 * poly_mix[7]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ECallTerminate ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :45:20) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :160:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1236 = x1235 + x1176 * poly_mix[8]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ECallTerminate ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :45:20) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :160:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1237 = x1236 + x1179 * poly_mix[9]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ECallTerminate ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :46:20) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :160:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1238 = x1237 + x371 * poly_mix[10]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ECallTerminate ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :46:20) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :160:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1239 = x1238 + x373 * poly_mix[11]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ECallTerminate ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :46:20) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :160:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1240 = x1239 + x41 * poly_mix[12]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ECallTerminate ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :46:20) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :160:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1241 = x1240 + x41 * poly_mix[13]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ECallTerminate ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :46:20) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :160:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1242 = x105 - x0; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ECallTerminate ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :46:20) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :160:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1243 = x1241 + x1242 * poly_mix[14]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ECallTerminate ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :46:20) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :160:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1244 = x1243 + x379 * poly_mix[15]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ECallTerminate ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :46:20) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :160:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1245 = x1244 + x381 * poly_mix[16]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ECallTerminate ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :46:20) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :160:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1246 = x1245 + x1193 * poly_mix[17]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ECallTerminate ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :46:20) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :160:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1247 = x1246 + x1196 * poly_mix[18]; - // loc(callsite( Reg ( :5:7) at callsite( ECallTerminate ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :47:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :160:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x1248 = x104 - x158; - // loc(callsite( Reg ( :5:7) at callsite( ECallTerminate ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :47:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :160:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x1249 = x1247 + x1248 * poly_mix[19]; - // loc(unknown) - auto x1250 = rv32im_v2_7(cycle, steps, poly_mix, x1249, x1226, arg0, arg4, arg7, x1134, arg8, arg9, arg10, arg11, arg12, arg13); - return x1250; -} -FpExt rv32im_v2_4(size_t cycle, size_t steps, FpExt* poly_mix, Fp* arg0, FpExt arg1, FpExt* arg2, FpExt arg3, FpExt arg4, FpExt arg5, Fp* arg6, Fp* arg7, Fp* arg8) { - size_t mask = steps - 1; - // loc(unknown) - constexpr Fp x0(1052077299); - // loc(unknown) - constexpr Fp x1(1930103076); - // loc(unknown) - constexpr Fp x2(918610824); - // loc(unknown) - constexpr Fp x3(13683276); - // loc(unknown) - constexpr Fp x4(606789471); - // loc(unknown) - constexpr Fp x5(1974912880); - // loc(unknown) - constexpr Fp x6(65998480); - // loc(unknown) - constexpr Fp x7(1461037801); - // loc(unknown) - constexpr Fp x8(1997365680); - // loc(unknown) - constexpr Fp x9(801504236); - // loc(unknown) - constexpr Fp x10(1792686146); - // loc(unknown) - constexpr Fp x11(1001081699); - // loc(unknown) - constexpr Fp x12(98371040); - // loc(unknown) - constexpr Fp x13(1389833583); - // loc(unknown) - constexpr Fp x14(106789798); - // loc(unknown) - constexpr Fp x15(1188752902); - // loc(unknown) - constexpr Fp x16(20525701); - // loc(unknown) - constexpr Fp x17(1558116381); - // loc(unknown) - constexpr Fp x18(1942928017); - // loc(unknown) - constexpr Fp x19(1928969209); - // loc(unknown) - constexpr Fp x20(51866717); - // loc(unknown) - constexpr Fp x21(658182609); - // loc(unknown) - constexpr Fp x22(1867716110); - // loc(unknown) - constexpr Fp x23(111593398); - // loc(unknown) - constexpr Fp x24(375892129); - // loc(unknown) - constexpr Fp x25(1083257840); - // loc(unknown) - constexpr Fp x26(497520322); - // loc(unknown) - constexpr Fp x27(4); - // loc(unknown) - constexpr Fp x28(2); - // loc(unknown) - constexpr Fp x29(1380248020); - // loc(unknown) - constexpr Fp x30(1608891156); - // loc(unknown) - constexpr Fp x31(1672219447); - // loc(unknown) - constexpr Fp x32(1262312258); - // loc(unknown) - constexpr Fp x33(162506101); - // loc(unknown) - constexpr Fp x34(809508074); - // loc(unknown) - constexpr Fp x35(1303271640); - // loc(unknown) - constexpr Fp x36(1393671120); - // loc(unknown) - constexpr Fp x37(641665156); - // loc(unknown) - constexpr Fp x38(1090783436); - // loc(unknown) - constexpr Fp x39(1111203133); - // loc(unknown) - constexpr Fp x40(1296144415); - // loc(unknown) - constexpr Fp x41(202271745); - // loc(unknown) - constexpr Fp x42(459826664); - // loc(unknown) - constexpr Fp x43(781141772); - // loc(unknown) - constexpr Fp x44(1832911930); - // loc(unknown) - constexpr Fp x45(228520958); - // loc(unknown) - constexpr Fp x46(813674331); - // loc(unknown) - constexpr Fp x47(1889898); - // loc(unknown) - constexpr Fp x48(1124078057); - // loc(unknown) - constexpr Fp x49(738091882); - // loc(unknown) - constexpr Fp x50(1003792297); - // loc(unknown) - constexpr Fp x51(1896271507); - // loc(unknown) - constexpr Fp x52(1206940496); - // loc(unknown) - constexpr Fp x53(1827572010); - // loc(unknown) - constexpr Fp x54(1507649755); - // loc(unknown) - constexpr Fp x55(1042892522); - // loc(unknown) - constexpr Fp x56(760115692); - // loc(unknown) - constexpr Fp x57(1841795381); - // loc(unknown) - constexpr Fp x58(457372011); - // loc(unknown) - constexpr Fp x59(1748789933); - // loc(unknown) - constexpr Fp x60(1478577620); - // loc(unknown) - constexpr Fp x61(76770019); - // loc(unknown) - constexpr Fp x62(1293938517); - // loc(unknown) - constexpr Fp x63(1150410028); - // loc(unknown) - constexpr Fp x64(1065075039); - // loc(unknown) - constexpr Fp x65(1198261138); - // loc(unknown) - constexpr Fp x66(59510015); - // loc(unknown) - constexpr Fp x67(1402624179); - // loc(unknown) - constexpr Fp x68(158646617); - // loc(unknown) - constexpr Fp x69(890243564); - // loc(unknown) - constexpr Fp x70(1463323727); - // loc(unknown) - constexpr Fp x71(1080533265); - // loc(unknown) - constexpr Fp x72(192082241); - // loc(unknown) - constexpr Fp x73(1891637550); - // loc(unknown) - constexpr Fp x74(1950429111); - // loc(unknown) - constexpr Fp x75(1663353317); - // loc(unknown) - constexpr Fp x76(1567618575); - // loc(unknown) - constexpr Fp x77(150307788); - // loc(unknown) - constexpr Fp x78(755691969); - // loc(unknown) - constexpr Fp x79(1715719711); - // loc(unknown) - constexpr Fp x80(1545325389); - // loc(unknown) - constexpr Fp x81(989618631); - // loc(unknown) - constexpr Fp x82(1401020792); - // loc(unknown) - constexpr Fp x83(930036496); - // loc(unknown) - constexpr Fp x84(238616145); - // loc(unknown) - constexpr Fp x85(1006235079); - // loc(unknown) - constexpr Fp x86(942439428); - // loc(unknown) - constexpr Fp x87(1649953458); - // loc(unknown) - constexpr Fp x88(1647665372); - // loc(unknown) - constexpr Fp x89(708123747); - // loc(unknown) - constexpr Fp x90(925018226); - // loc(unknown) - constexpr Fp x91(78845751); - // loc(unknown) - constexpr Fp x92(1889603648); - // loc(unknown) - constexpr Fp x93(993455846); - // loc(unknown) - constexpr Fp x94(140621810); - // loc(unknown) - constexpr Fp x95(117294666); - // loc(unknown) - constexpr Fp x96(790726260); - // loc(unknown) - constexpr Fp x97(1213686459); - // loc(unknown) - constexpr Fp x98(390340387); - // loc(unknown) - constexpr Fp x99(714957516); - // loc(unknown) - constexpr Fp x100(1209164052); - // loc(unknown) - constexpr Fp x101(1040977421); - // loc(unknown) - constexpr Fp x102(1792450386); - // loc(unknown) - constexpr Fp x103(1470845646); - // loc(unknown) - constexpr Fp x104(1363837384); - // loc(unknown) - constexpr Fp x105(1878280202); - // loc(unknown) - constexpr Fp x106(434078361); - // loc(unknown) - constexpr Fp x107(1946596189); - // loc(unknown) - constexpr Fp x108(875839332); - // loc(unknown) - constexpr Fp x109(463976218); - // loc(unknown) - constexpr Fp x110(976057819); - // loc(unknown) - constexpr Fp x111(48375137); - // loc(unknown) - constexpr Fp x112(1549779579); - // loc(unknown) - constexpr Fp x113(1679178250); - // loc(unknown) - constexpr Fp x114(530151394); - // loc(unknown) - constexpr Fp x115(1629316321); - // loc(unknown) - constexpr Fp x116(1854174607); - // loc(unknown) - constexpr Fp x117(720724951); - // loc(unknown) - constexpr Fp x118(14387587); - // loc(unknown) - constexpr Fp x119(1883820770); - // loc(unknown) - constexpr Fp x120(205609311); - // loc(unknown) - constexpr Fp x121(1136469704); - // loc(unknown) - constexpr Fp x122(1439947916); - // loc(unknown) - constexpr Fp x123(723038058); - // loc(unknown) - constexpr Fp x124(53041581); - // loc(unknown) - constexpr Fp x125(1291790245); - // loc(unknown) - constexpr Fp x126(1781980094); - // loc(unknown) - constexpr Fp x127(273790406); - // loc(unknown) - constexpr Fp x128(1239734761); - // loc(unknown) - constexpr Fp x129(1221257987); - // loc(unknown) - constexpr Fp x130(51256176); - // loc(unknown) - constexpr Fp x131(172614232); - // loc(unknown) - constexpr Fp x132(306391314); - // loc(unknown) - constexpr Fp x133(1647670797); - // loc(unknown) - constexpr Fp x134(53007114); - // loc(unknown) - constexpr Fp x135(1269493554); - // loc(unknown) - constexpr Fp x136(1338899225); - // loc(unknown) - constexpr Fp x137(1740472809); - // loc(unknown) - constexpr Fp x138(1454563174); - // loc(unknown) - constexpr Fp x139(204228775); - // loc(unknown) - constexpr Fp x140(588764636); - // loc(unknown) - constexpr Fp x141(1718628547); - // loc(unknown) - constexpr Fp x142(427731030); - // loc(unknown) - constexpr Fp x143(825405577); - // loc(unknown) - constexpr Fp x144(342857858); - // loc(unknown) - constexpr Fp x145(1290028279); - // loc(unknown) - constexpr Fp x146(608401422); - // loc(unknown) - constexpr Fp x147(1587822577); - // loc(unknown) - constexpr Fp x148(128479034); - // loc(unknown) - constexpr Fp x149(862495875); - // loc(unknown) - constexpr Fp x150(447555988); - // loc(unknown) - constexpr Fp x151(1910423126); - // loc(unknown) - constexpr Fp x152(1099252725); - // loc(unknown) - constexpr Fp x153(1584033957); - // loc(unknown) - constexpr Fp x154(1079030649); - // loc(unknown) - constexpr Fp x155(1622328571); - // loc(unknown) - constexpr Fp x156(1908416316); - // loc(unknown) - constexpr Fp x157(1549062383); - // loc(unknown) - constexpr Fp x158(623051854); - // loc(unknown) - constexpr Fp x159(162510541); - // loc(unknown) - constexpr Fp x160(1608853840); - // loc(unknown) - constexpr Fp x161(538103555); - // loc(unknown) - constexpr Fp x162(1424297384); - // loc(unknown) - constexpr Fp x163(552696906); - // loc(unknown) - constexpr Fp x164(946500736); - // loc(unknown) - constexpr Fp x165(1215259350); - // loc(unknown) - constexpr Fp x166(855276054); - // loc(unknown) - constexpr Fp x167(1664590951); - // loc(unknown) - constexpr Fp x168(217046702); - // loc(unknown) - constexpr Fp x169(142102402); - // loc(unknown) - constexpr Fp x170(1257820264); - // loc(unknown) - constexpr Fp x171(27129487); - // loc(unknown) - constexpr Fp x172(1147522062); - // loc(unknown) - constexpr Fp x173(989176635); - // loc(unknown) - constexpr Fp x174(241306552); - // loc(unknown) - constexpr Fp x175(1507936940); - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x176 = arg6[121 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x177 = arg6[122 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x178 = arg6[123 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x179 = arg6[124 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x180 = arg6[125 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x181 = arg6[126 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x182 = arg6[127 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x183 = arg6[38 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :26:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x184 = arg6[73 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :25:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x185 = arg6[72 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x186 = arg6[39 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x187 = arg6[75 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :27:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x188 = arg6[74 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x189 = arg6[40 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :34:30) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x190 = arg6[77 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :29:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x191 = arg6[76 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x192 = arg6[41 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :63:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x193 = arg6[79 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x194 = arg6[78 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x195 = arg6[42 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :65:23) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x196 = arg6[81 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :28:29) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :65:23) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x197 = arg6[80 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x198 = arg6[43 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :11:20) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x199 = arg6[83 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :8:23) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x200 = arg6[82 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x201 = arg6[44 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :69:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x202 = arg6[85 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :28:29) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :69:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x203 = arg6[84 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x204 = arg6[45 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :25:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x205 = arg6[87 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :26:28) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x206 = arg6[86 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x207 = arg6[46 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x208 = arg6[89 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :27:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x209 = arg6[88 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x210 = arg6[47 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :25:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x211 = arg6[91 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x212 = arg6[90 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x213 = arg6[48 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x214 = arg6[93 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x215 = arg6[92 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x216 = arg6[49 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( CycleArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :55:29) at callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :60:19) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x217 = arg6[95 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( CycleArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :54:29) at callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :60:19) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x218 = arg6[94 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x219 = arg6[50 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :25:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x220 = arg6[97 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :26:28) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x221 = arg6[96 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x222 = arg6[51 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x223 = arg6[99 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :27:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x224 = arg6[98 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x225 = arg6[52 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :25:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x226 = arg6[101 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x227 = arg6[100 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x228 = arg6[53 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x229 = arg6[103 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x230 = arg6[102 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x231 = arg6[54 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( CycleArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :55:29) at callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :60:19) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x232 = arg6[105 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( CycleArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :54:29) at callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :60:19) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x233 = arg6[104 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x234 = arg6[55 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :26:28) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x235 = arg6[107 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :34:15) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x236 = arg6[106 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x237 = arg6[56 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :27:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x238 = arg6[109 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :25:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x239 = arg6[108 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x240 = arg6[57 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x241 = arg6[111 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x242 = arg6[110 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x243 = arg6[58 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x244 = arg6[113 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :25:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x245 = arg6[112 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x246 = arg6[59 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( CycleArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :54:29) at callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :60:19) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x247 = arg6[115 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x248 = arg6[114 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x249 = arg6[60 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :34:15) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x250 = arg6[117 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( CycleArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :55:29) at callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :60:19) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x251 = arg6[116 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x252 = arg6[61 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x253 = arg6[119 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x254 = arg6[118 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x255 = arg6[33 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :126:34) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :135:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x256 = arg6[34 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :126:34) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :136:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x257 = arg6[36 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x258 = arg6[38 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :45:28) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x259 = arg6[39 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :28:29) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x260 = arg6[40 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x261 = arg6[41 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :51:29) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x262 = arg6[42 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :28:29) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x263 = arg6[43 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x264 = arg6[44 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :45:28) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x265 = arg6[45 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :28:29) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x266 = arg6[46 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x267 = arg6[47 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :51:29) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x268 = arg6[48 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :8:23) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x269 = arg6[49 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :11:20) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x270 = arg6[50 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :42:21) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x271 = arg6[51 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :26:28) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x272 = arg6[52 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :25:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x273 = arg6[53 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :27:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x274 = arg6[54 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU8 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :8:29) at callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :15:16) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :53:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x275 = arg6[55 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU8 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :9:27) at callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :15:16) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :53:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x276 = arg6[56 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :25:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x277 = arg6[57 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x278 = arg6[58 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x279 = arg6[59 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( CycleArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :54:29) at callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :60:19) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x280 = arg6[60 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( CycleArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :55:29) at callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :60:19) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x281 = arg6[61 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x282 = arg6[19 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :20:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x283 = arg6[67 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :19:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x284 = arg6[66 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :22:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x285 = arg6[69 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :21:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x286 = arg6[68 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :24:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x287 = arg6[71 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :23:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x288 = arg6[70 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x289 = x176 * x175; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x290 = x176 * x174; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x291 = x176 * x173; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x292 = x177 * x172; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x293 = x177 * x171; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x294 = x177 * x170; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x295 = x177 * x169; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x296 = x177 * x168; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x297 = x177 * x167; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x298 = x177 * x166; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x299 = x177 * x165; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x300 = x177 * x164; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x301 = x177 * x163; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x302 = x177 * x162; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x303 = x177 * x161; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x304 = x177 * x160; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x305 = x177 * x159; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x306 = x177 * x158; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x307 = x177 * x157; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x308 = x177 * x156; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x309 = x177 * x155; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x310 = x177 * x154; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x311 = x177 * x153; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x312 = x177 * x152; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x313 = x177 * x151; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x314 = x177 * x150; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x315 = x177 * x149; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x316 = x178 * x148; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x317 = x178 * x147; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x318 = x178 * x146; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x319 = x178 * x145; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x320 = x178 * x144; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x321 = x178 * x143; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x322 = x178 * x142; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x323 = x178 * x141; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x324 = x178 * x140; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x325 = x178 * x139; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x326 = x178 * x138; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x327 = x178 * x137; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x328 = x178 * x136; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x329 = x178 * x135; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x330 = x178 * x134; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x331 = x178 * x133; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x332 = x178 * x132; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x333 = x178 * x131; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x334 = x178 * x130; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x335 = x178 * x129; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x336 = x178 * x128; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x337 = x178 * x127; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x338 = x178 * x126; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x339 = x178 * x125; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x340 = x179 * x124; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x341 = x179 * x123; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x342 = x179 * x122; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x343 = x179 * x121; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x344 = x179 * x120; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x345 = x179 * x119; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x346 = x179 * x118; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x347 = x179 * x117; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x348 = x179 * x116; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x349 = x179 * x115; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x350 = x179 * x114; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x351 = x179 * x113; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x352 = x179 * x112; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x353 = x179 * x111; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x354 = x179 * x110; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x355 = x179 * x109; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x356 = x179 * x108; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x357 = x179 * x107; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x358 = x179 * x106; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x359 = x179 * x105; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x360 = x179 * x104; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x361 = x179 * x103; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x362 = x179 * x102; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x363 = x179 * x101; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x364 = x180 * x100; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x365 = x180 * x99; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x366 = x180 * x98; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x367 = x180 * x97; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x368 = x180 * x96; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x369 = x180 * x95; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x370 = x180 * x94; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x371 = x180 * x93; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x372 = x180 * x92; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x373 = x180 * x91; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x374 = x180 * x90; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x375 = x180 * x89; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x376 = x180 * x88; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x377 = x180 * x87; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x378 = x180 * x86; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x379 = x180 * x85; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x380 = x180 * x84; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x381 = x180 * x83; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x382 = x180 * x82; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x383 = x180 * x81; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x384 = x180 * x80; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x385 = x180 * x79; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x386 = x180 * x78; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x387 = x180 * x77; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x388 = x181 * x76; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x389 = x181 * x75; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x390 = x181 * x74; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x391 = x181 * x73; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x392 = x181 * x72; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x393 = x181 * x71; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x394 = x181 * x70; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x395 = x181 * x69; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x396 = x181 * x68; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x397 = x181 * x67; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x398 = x181 * x66; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x399 = x181 * x65; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x400 = x181 * x64; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x401 = x181 * x63; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x402 = x181 * x62; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x403 = x181 * x61; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x404 = x181 * x60; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x405 = x181 * x59; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x406 = x181 * x58; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x407 = x181 * x57; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x408 = x181 * x56; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x409 = x181 * x55; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x410 = x181 * x54; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x411 = x181 * x53; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x412 = x182 * x52; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x413 = x182 * x51; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x414 = x182 * x50; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x415 = x182 * x49; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x416 = x182 * x48; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x417 = x182 * x47; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x418 = x182 * x46; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x419 = x182 * x45; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x420 = x182 * x44; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x421 = x182 * x43; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x422 = x182 * x42; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x423 = x182 * x41; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x424 = x182 * x40; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x425 = x182 * x39; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x426 = x182 * x38; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x427 = x182 * x37; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x428 = x182 * x36; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x429 = x182 * x35; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x430 = x182 * x34; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x431 = x182 * x33; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x432 = x182 * x32; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x433 = x182 * x31; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x434 = x182 * x30; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x435 = x182 * x29; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x436 = arg0[487]; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x437 = arg0[488]; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x438 = x436 + x437; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x439 = arg0[489]; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x440 = arg0[490]; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x441 = x439 + x440; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x442 = arg0[491]; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x443 = arg0[492]; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x444 = x442 + x443; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x445 = arg0[493]; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x446 = arg0[494]; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x447 = x445 + x446; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x448 = arg0[495]; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x449 = arg0[496]; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x450 = x448 + x449; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x451 = arg0[497]; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x452 = arg0[498]; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x453 = x451 + x452; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x454 = arg0[499]; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x455 = arg0[500]; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x456 = x454 + x455; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x457 = arg0[501]; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x458 = arg0[502]; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x459 = x457 + x458; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x460 = arg0[503]; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x461 = arg0[504]; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x462 = x460 + x461; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x463 = arg0[505]; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x464 = arg0[506]; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x465 = x463 + x464; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x466 = arg0[507]; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x467 = arg0[508]; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x468 = x466 + x467; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x469 = arg0[509]; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x470 = arg0[510]; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x471 = x469 + x470; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x472 = arg0[511]; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x473 = arg0[512]; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x474 = x472 + x473; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x475 = arg0[513]; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x476 = arg0[514]; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x477 = x475 + x476; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x478 = arg0[515]; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x479 = arg0[516]; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x480 = x478 + x479; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x481 = arg0[517]; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x482 = arg0[518]; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x483 = x481 + x482; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x484 = arg0[519]; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x485 = arg0[520]; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x486 = x484 + x485; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x487 = arg0[521]; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x488 = arg0[522]; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x489 = x487 + x488; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x490 = arg0[523]; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x491 = arg0[524]; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x492 = x490 + x491; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x493 = arg0[525]; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x494 = arg0[526]; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x495 = x493 + x494; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x496 = arg0[527]; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x497 = arg0[528]; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x498 = x496 + x497; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x499 = arg0[529]; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x500 = x499 + x289; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x501 = arg0[530]; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x502 = x501 + x290; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x503 = arg0[531]; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x504 = x503 + x291; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x505 = x438 + x292; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x506 = x441 + x293; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x507 = x444 + x294; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x508 = x447 + x295; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x509 = x450 + x296; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x510 = x453 + x297; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x511 = x456 + x298; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x512 = x459 + x299; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x513 = x462 + x300; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x514 = x465 + x301; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x515 = x468 + x302; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x516 = x471 + x303; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x517 = x474 + x304; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x518 = x477 + x305; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x519 = x480 + x306; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x520 = x483 + x307; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x521 = x486 + x308; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x522 = x489 + x309; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x523 = x492 + x310; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x524 = x495 + x311; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x525 = x498 + x312; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x526 = x500 + x313; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x527 = x502 + x314; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x528 = x504 + x315; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x529 = x505 + x316; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x530 = x506 + x317; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x531 = x507 + x318; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x532 = x508 + x319; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x533 = x509 + x320; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x534 = x510 + x321; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x535 = x511 + x322; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x536 = x512 + x323; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x537 = x513 + x324; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x538 = x514 + x325; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x539 = x515 + x326; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x540 = x516 + x327; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x541 = x517 + x328; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x542 = x518 + x329; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x543 = x519 + x330; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x544 = x520 + x331; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x545 = x521 + x332; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x546 = x522 + x333; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x547 = x523 + x334; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x548 = x524 + x335; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x549 = x525 + x336; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x550 = x526 + x337; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x551 = x527 + x338; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x552 = x528 + x339; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x553 = x529 + x340; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x554 = x530 + x341; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x555 = x531 + x342; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x556 = x532 + x343; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x557 = x533 + x344; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x558 = x534 + x345; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x559 = x535 + x346; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x560 = x536 + x347; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x561 = x537 + x348; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x562 = x538 + x349; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x563 = x539 + x350; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x564 = x540 + x351; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x565 = x541 + x352; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x566 = x542 + x353; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x567 = x543 + x354; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x568 = x544 + x355; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x569 = x545 + x356; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x570 = x546 + x357; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x571 = x547 + x358; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x572 = x548 + x359; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x573 = x549 + x360; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x574 = x550 + x361; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x575 = x551 + x362; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x576 = x552 + x363; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x577 = x553 + x364; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x578 = x554 + x365; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x579 = x555 + x366; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x580 = x556 + x367; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x581 = x557 + x368; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x582 = x558 + x369; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x583 = x559 + x370; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x584 = x560 + x371; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x585 = x561 + x372; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x586 = x562 + x373; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x587 = x563 + x374; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x588 = x564 + x375; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x589 = x565 + x376; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x590 = x566 + x377; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x591 = x567 + x378; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x592 = x568 + x379; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x593 = x569 + x380; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x594 = x570 + x381; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x595 = x571 + x382; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x596 = x572 + x383; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x597 = x573 + x384; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x598 = x574 + x385; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x599 = x575 + x386; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x600 = x576 + x387; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x601 = x577 + x388; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x602 = x578 + x389; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x603 = x579 + x390; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x604 = x580 + x391; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x605 = x581 + x392; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x606 = x582 + x393; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x607 = x583 + x394; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x608 = x584 + x395; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x609 = x585 + x396; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x610 = x586 + x397; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x611 = x587 + x398; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x612 = x588 + x399; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x613 = x589 + x400; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x614 = x590 + x401; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x615 = x591 + x402; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x616 = x592 + x403; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x617 = x593 + x404; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x618 = x594 + x405; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x619 = x595 + x406; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x620 = x596 + x407; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x621 = x597 + x408; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x622 = x598 + x409; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x623 = x599 + x410; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x624 = x600 + x411; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x625 = x601 + x412; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x626 = x602 + x413; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x627 = x603 + x414; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x628 = x604 + x415; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x629 = x605 + x416; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x630 = x606 + x417; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x631 = x607 + x418; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x632 = x608 + x419; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x633 = x609 + x420; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x634 = x610 + x421; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x635 = x611 + x422; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x636 = x612 + x423; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x637 = x613 + x424; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x638 = x614 + x425; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x639 = x615 + x426; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x640 = x616 + x427; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x641 = x617 + x428; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x642 = x618 + x429; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x643 = x619 + x430; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x644 = x620 + x431; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x645 = x621 + x432; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x646 = x622 + x433; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x647 = x623 + x434; - // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x648 = x624 + x435; - // loc(callsite(unknown at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:44) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x649 = x183 + x625; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:17) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x650 = x649 * x649; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:22) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x651 = x650 * x649; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x652 = x651 - x184; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x653 = arg1 + x652 * poly_mix[22]; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:15) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x654 = x184 * x184; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:15) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg0[557] = x654; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:23) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x655 = x654 * x649; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x656 = x655 - x185; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x657 = x653 + x656 * poly_mix[23]; - // loc(callsite(unknown at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:44) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x658 = x186 + x626; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:17) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x659 = x658 * x658; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:22) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x660 = x659 * x658; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x661 = x660 - x187; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x662 = x657 + x661 * poly_mix[24]; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:15) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x663 = x187 * x187; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:15) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg0[565] = x663; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:23) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x664 = x663 * x658; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x665 = x664 - x188; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x666 = x662 + x665 * poly_mix[25]; - // loc(callsite(unknown at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:44) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x667 = x189 + x627; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:17) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x668 = x667 * x667; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:22) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x669 = x668 * x667; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x670 = x669 - x190; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x671 = x666 + x670 * poly_mix[26]; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:15) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x672 = x190 * x190; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:15) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg0[566] = x672; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:23) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x673 = x672 * x667; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x674 = x673 - x191; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x675 = x671 + x674 * poly_mix[27]; - // loc(callsite(unknown at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:44) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x676 = x192 + x628; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:17) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x677 = x676 * x676; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:22) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x678 = x677 * x676; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x679 = x678 - x193; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x680 = x675 + x679 * poly_mix[28]; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:15) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x681 = x193 * x193; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:15) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg0[567] = x681; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:23) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x682 = x681 * x676; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x683 = x682 - x194; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x684 = x680 + x683 * poly_mix[29]; - // loc(callsite(unknown at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:44) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x685 = x195 + x629; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:17) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x686 = x685 * x685; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:22) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x687 = x686 * x685; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x688 = x687 - x196; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x689 = x684 + x688 * poly_mix[30]; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:15) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x690 = x196 * x196; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:15) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg0[568] = x690; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:23) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x691 = x690 * x685; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x692 = x691 - x197; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x693 = x689 + x692 * poly_mix[31]; - // loc(callsite(unknown at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:44) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x694 = x198 + x630; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:17) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x695 = x694 * x694; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:22) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x696 = x695 * x694; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x697 = x696 - x199; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x698 = x693 + x697 * poly_mix[32]; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:15) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x699 = x199 * x199; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:15) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg0[569] = x699; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:23) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x700 = x699 * x694; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x701 = x700 - x200; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x702 = x698 + x701 * poly_mix[33]; - // loc(callsite(unknown at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:44) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x703 = x201 + x631; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:17) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x704 = x703 * x703; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:22) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x705 = x704 * x703; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x706 = x705 - x202; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x707 = x702 + x706 * poly_mix[34]; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:15) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x708 = x202 * x202; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:15) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg0[570] = x708; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:23) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x709 = x708 * x703; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x710 = x709 - x203; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x711 = x707 + x710 * poly_mix[35]; - // loc(callsite(unknown at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:44) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x712 = x204 + x632; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:17) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x713 = x712 * x712; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:22) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x714 = x713 * x712; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x715 = x714 - x205; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x716 = x711 + x715 * poly_mix[36]; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:15) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x717 = x205 * x205; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:15) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg0[571] = x717; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:23) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x718 = x717 * x712; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x719 = x718 - x206; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x720 = x716 + x719 * poly_mix[37]; - // loc(callsite(unknown at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:44) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x721 = x207 + x633; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:17) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x722 = x721 * x721; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:22) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x723 = x722 * x721; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x724 = x723 - x208; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x725 = x720 + x724 * poly_mix[38]; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:15) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x726 = x208 * x208; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:15) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg0[572] = x726; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:23) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x727 = x726 * x721; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x728 = x727 - x209; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x729 = x725 + x728 * poly_mix[39]; - // loc(callsite(unknown at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:44) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x730 = x210 + x634; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:17) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x731 = x730 * x730; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:22) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x732 = x731 * x730; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x733 = x732 - x211; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x734 = x729 + x733 * poly_mix[40]; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:15) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x735 = x211 * x211; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:15) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg0[573] = x735; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:23) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x736 = x735 * x730; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x737 = x736 - x212; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x738 = x734 + x737 * poly_mix[41]; - // loc(callsite(unknown at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:44) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x739 = x213 + x635; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:17) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x740 = x739 * x739; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:22) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x741 = x740 * x739; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x742 = x741 - x214; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x743 = x738 + x742 * poly_mix[42]; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:15) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x744 = x214 * x214; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:15) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg0[574] = x744; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:23) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x745 = x744 * x739; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x746 = x745 - x215; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x747 = x743 + x746 * poly_mix[43]; - // loc(callsite(unknown at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:44) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x748 = x216 + x636; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:17) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x749 = x748 * x748; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:22) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x750 = x749 * x748; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x751 = x750 - x217; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x752 = x747 + x751 * poly_mix[44]; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:15) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x753 = x217 * x217; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:15) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg0[575] = x753; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:23) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x754 = x753 * x748; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x755 = x754 - x218; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x756 = x752 + x755 * poly_mix[45]; - // loc(callsite(unknown at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:44) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x757 = x219 + x637; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:17) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x758 = x757 * x757; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:22) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x759 = x758 * x757; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x760 = x759 - x220; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x761 = x756 + x760 * poly_mix[46]; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:15) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x762 = x220 * x220; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:15) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg0[600] = x762; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:23) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x763 = x762 * x757; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x764 = x763 - x221; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x765 = x761 + x764 * poly_mix[47]; - // loc(callsite(unknown at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:44) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x766 = x222 + x638; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:17) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x767 = x766 * x766; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:22) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x768 = x767 * x766; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x769 = x768 - x223; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x770 = x765 + x769 * poly_mix[48]; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:15) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x771 = x223 * x223; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:15) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg0[601] = x771; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:23) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x772 = x771 * x766; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x773 = x772 - x224; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x774 = x770 + x773 * poly_mix[49]; - // loc(callsite(unknown at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:44) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x775 = x225 + x639; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:17) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x776 = x775 * x775; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:22) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x777 = x776 * x775; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x778 = x777 - x226; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x779 = x774 + x778 * poly_mix[50]; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:15) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x780 = x226 * x226; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:15) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg0[602] = x780; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:23) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x781 = x780 * x775; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x782 = x781 - x227; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x783 = x779 + x782 * poly_mix[51]; - // loc(callsite(unknown at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:44) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x784 = x228 + x640; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:17) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x785 = x784 * x784; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:22) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x786 = x785 * x784; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x787 = x786 - x229; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x788 = x783 + x787 * poly_mix[52]; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:15) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x789 = x229 * x229; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:15) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg0[603] = x789; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:23) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x790 = x789 * x784; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x791 = x790 - x230; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x792 = x788 + x791 * poly_mix[53]; - // loc(callsite(unknown at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:44) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x793 = x231 + x641; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:17) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x794 = x793 * x793; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:22) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x795 = x794 * x793; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x796 = x795 - x232; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x797 = x792 + x796 * poly_mix[54]; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:15) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x798 = x232 * x232; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:15) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg0[604] = x798; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:23) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x799 = x798 * x793; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x800 = x799 - x233; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x801 = x797 + x800 * poly_mix[55]; - // loc(callsite(unknown at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:44) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x802 = x234 + x642; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:17) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x803 = x802 * x802; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:22) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x804 = x803 * x802; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x805 = x804 - x235; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x806 = x801 + x805 * poly_mix[56]; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:15) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x807 = x235 * x235; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:15) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg0[605] = x807; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:23) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x808 = x807 * x802; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x809 = x808 - x236; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x810 = x806 + x809 * poly_mix[57]; - // loc(callsite(unknown at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:44) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x811 = x237 + x643; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:17) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x812 = x811 * x811; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:22) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x813 = x812 * x811; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x814 = x813 - x238; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x815 = x810 + x814 * poly_mix[58]; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:15) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x816 = x238 * x238; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:23) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x817 = x816 * x811; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x818 = x817 - x239; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x819 = x815 + x818 * poly_mix[59]; - // loc(callsite(unknown at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:44) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x820 = x240 + x644; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:17) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x821 = x820 * x820; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:22) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x822 = x821 * x820; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x823 = x822 - x241; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x824 = x819 + x823 * poly_mix[60]; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:15) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x825 = x241 * x241; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:23) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x826 = x825 * x820; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x827 = x826 - x242; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x828 = x824 + x827 * poly_mix[61]; - // loc(callsite(unknown at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:44) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x829 = x243 + x645; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:17) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x830 = x829 * x829; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:22) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x831 = x830 * x829; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x832 = x831 - x244; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x833 = x828 + x832 * poly_mix[62]; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:15) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x834 = x244 * x244; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:23) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x835 = x834 * x829; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x836 = x835 - x245; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x837 = x833 + x836 * poly_mix[63]; - // loc(callsite(unknown at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:44) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x838 = x246 + x646; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:17) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x839 = x838 * x838; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:22) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x840 = x839 * x838; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x841 = x840 - x247; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x842 = x837 + x841 * poly_mix[64]; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:15) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x843 = x247 * x247; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:23) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x844 = x843 * x838; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x845 = x844 - x248; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x846 = x842 + x845 * poly_mix[65]; - // loc(callsite(unknown at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:44) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x847 = x249 + x647; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:17) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x848 = x847 * x847; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:22) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x849 = x848 * x847; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x850 = x849 - x250; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x851 = x846 + x850 * poly_mix[66]; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:15) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x852 = x250 * x250; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:23) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x853 = x852 * x847; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x854 = x853 - x251; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x855 = x851 + x854 * poly_mix[67]; - // loc(callsite(unknown at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:44) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x856 = x252 + x648; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:17) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x857 = x856 * x856; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:22) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x858 = x857 * x856; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x859 = x858 - x253; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x860 = x855 + x859 * poly_mix[68]; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:15) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x861 = x253 * x253; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:23) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x862 = x861 * x856; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x863 = x862 - x254; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x864 = x860 + x863 * poly_mix[69]; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :42:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x865 = x185 + x188; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :43:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x866 = x191 + x194; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :44:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x867 = x188 * x28; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :44:19) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x868 = x867 + x866; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :57:30) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x869 = arg0[532]; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :45:19) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x870 = x869 + x865; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :46:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x871 = x866 * x27; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :46:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x872 = x871 + x870; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :47:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x873 = x865 * x27; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :47:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x874 = x873 + x868; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :48:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x875 = x870 + x874; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :49:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x876 = x868 + x872; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :42:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x877 = x197 + x200; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :43:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x878 = x203 + x206; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :44:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x879 = x200 * x28; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :44:19) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x880 = x879 + x878; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:32) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :83:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x881 = arg0[533]; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :45:19) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x882 = x881 + x877; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :46:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x883 = x878 * x27; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :46:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x884 = x883 + x882; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :47:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x885 = x877 * x27; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :47:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x886 = x885 + x880; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :48:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x887 = x882 + x886; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :49:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x888 = x880 + x884; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :42:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x889 = x209 + x212; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :43:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x890 = x215 + x218; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :44:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x891 = x212 * x28; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :44:19) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x892 = x891 + x890; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :45:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x893 = x218 * x28; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :45:19) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x894 = x893 + x889; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :46:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x895 = x890 * x27; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :46:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x896 = x895 + x894; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :47:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x897 = x889 * x27; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :47:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x898 = x897 + x892; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :48:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x899 = x894 + x898; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :49:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x900 = x892 + x896; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :42:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x901 = x221 + x224; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :43:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x902 = x227 + x230; - // loc(callsite(unknown at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :83:19) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :24:36) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x903 = arg0[534]; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :44:19) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x904 = x903 + x902; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :45:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x905 = x230 * x28; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :45:19) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x906 = x905 + x901; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :46:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x907 = x902 * x27; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :46:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x908 = x907 + x906; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :47:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x909 = x901 * x27; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :47:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x910 = x909 + x904; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :48:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x911 = x906 + x910; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :49:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x912 = x904 + x908; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :42:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x913 = x233 + x236; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :43:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x914 = x239 + x242; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :44:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x915 = x236 * x28; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :44:19) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x916 = x915 + x914; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :45:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x917 = x242 * x28; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :45:19) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x918 = x917 + x913; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :46:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x919 = x914 * x27; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :46:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x920 = x919 + x918; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :47:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x921 = x913 * x27; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :47:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x922 = x921 + x916; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :48:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x923 = x918 + x922; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :49:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x924 = x916 + x920; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :42:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x925 = x245 + x248; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :43:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x926 = x251 + x254; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :44:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x927 = x248 * x28; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :44:19) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x928 = x927 + x926; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :45:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x929 = x254 * x28; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :45:19) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x930 = x929 + x925; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :46:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x931 = x926 * x27; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :46:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x932 = x931 + x930; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :47:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x933 = x925 * x27; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :47:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x934 = x933 + x928; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :48:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x935 = x930 + x934; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :49:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x936 = x928 + x932; - // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x937 = x875 + x887; - // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x938 = x874 + x886; - // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x939 = x876 + x888; - // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x940 = x872 + x884; - // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x941 = x937 + x899; - // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x942 = x938 + x898; - // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x943 = x939 + x900; - // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x944 = x940 + x896; - // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x945 = x941 + x911; - // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x946 = x942 + x910; - // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x947 = x943 + x912; - // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x948 = x944 + x908; - // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x949 = x945 + x923; - // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x950 = x946 + x922; - // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x951 = x947 + x924; - // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x952 = x948 + x920; - // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x953 = x949 + x935; - // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x954 = x950 + x934; - // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x955 = x951 + x936; - // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x956 = x952 + x932; - // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x957 = x875 + x953; - // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x958 = x874 + x954; - // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x959 = x876 + x955; - // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x960 = x872 + x956; - // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x961 = x887 + x953; - // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x962 = x886 + x954; - // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x963 = x888 + x955; - // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x964 = x884 + x956; - // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x965 = x899 + x953; - // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x966 = x898 + x954; - // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x967 = x900 + x955; - // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x968 = x896 + x956; - // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x969 = x911 + x953; - // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x970 = x910 + x954; - // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x971 = x912 + x955; - // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x972 = x908 + x956; - // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x973 = x923 + x953; - // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x974 = x922 + x954; - // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x975 = x924 + x955; - // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x976 = x920 + x956; - // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x977 = x935 + x953; - // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x978 = x934 + x954; - // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x979 = x936 + x955; - // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x980 = x932 + x956; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :34:26) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x981 = arg0[376]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :34:26) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x982 = x864 + x981 * poly_mix[70]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :35:27) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x983 = arg0[377]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :35:27) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x984 = x982 + x983 * poly_mix[71]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :36:28) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x985 = arg0[378]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :36:28) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x986 = x984 + x985 * poly_mix[72]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :37:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x987 = arg0[379]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :37:24) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x988 = x986 + x987 * poly_mix[73]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :38:26) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x989 = arg0[380]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :38:26) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x990 = x988 + x989 * poly_mix[74]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :39:28) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x991 = arg0[381]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :39:28) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x992 = x990 + x991 * poly_mix[75]; - // loc(callsite(unknown at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :249:55) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x993 = arg0[535]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :41:27) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x994 = x993 - x255; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :41:27) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x995 = x992 + x994 * poly_mix[76]; - // loc(callsite(unknown at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :251:44) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x996 = arg0[536]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :42:26) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x997 = x996 - x256; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :42:26) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x998 = x995 + x997 * poly_mix[77]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :43:27) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x999 = arg0[537]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :43:27) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1000 = x998 + x999 * poly_mix[78]; - // loc(callsite(unknown at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :245:21) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x1001 = arg0[538]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :44:23) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1002 = x1001 - x257; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :44:23) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1003 = x1000 + x1002 * poly_mix[79]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :45:22) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1004 = arg0[384]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :45:22) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1005 = x1003 + x1004 * poly_mix[80]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1006 = x957 - x258; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1007 = x1005 + x1006 * poly_mix[81]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1008 = x958 - x259; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1009 = x1007 + x1008 * poly_mix[82]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1010 = x959 - x260; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1011 = x1009 + x1010 * poly_mix[83]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1012 = x960 - x261; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1013 = x1011 + x1012 * poly_mix[84]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1014 = x961 - x262; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1015 = x1013 + x1014 * poly_mix[85]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1016 = x962 - x263; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1017 = x1015 + x1016 * poly_mix[86]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1018 = x963 - x264; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1019 = x1017 + x1018 * poly_mix[87]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1020 = x964 - x265; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1021 = x1019 + x1020 * poly_mix[88]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1022 = x965 - x266; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1023 = x1021 + x1022 * poly_mix[89]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1024 = x966 - x267; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1025 = x1023 + x1024 * poly_mix[90]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1026 = x967 - x268; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1027 = x1025 + x1026 * poly_mix[91]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1028 = x968 - x269; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1029 = x1027 + x1028 * poly_mix[92]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1030 = x969 - x270; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1031 = x1029 + x1030 * poly_mix[93]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1032 = x970 - x271; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1033 = x1031 + x1032 * poly_mix[94]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1034 = x971 - x272; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1035 = x1033 + x1034 * poly_mix[95]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1036 = x972 - x273; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1037 = x1035 + x1036 * poly_mix[96]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1038 = x973 - x274; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1039 = x1037 + x1038 * poly_mix[97]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1040 = x974 - x275; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1041 = x1039 + x1040 * poly_mix[98]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1042 = x975 - x276; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1043 = x1041 + x1042 * poly_mix[99]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1044 = x976 - x277; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1045 = x1043 + x1044 * poly_mix[100]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1046 = x977 - x278; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1047 = x1045 + x1046 * poly_mix[101]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1048 = x978 - x279; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1049 = x1047 + x1048 * poly_mix[102]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1050 = x979 - x280; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1051 = x1049 + x1050 * poly_mix[103]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1052 = x980 - x281; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1053 = x1051 + x1052 * poly_mix[104]; - // loc(callsite(unknown at callsite( ExtReg ( :10:24) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :48:27) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1054 = arg2[1]; - // loc(callsite(unknown at callsite( ExtReg ( :10:24) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :48:27) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1055 = arg2[0]; - // loc(callsite(unknown at callsite( ExtReg ( :11:18) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :48:27) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1056 = x1054 - x1055; - // loc(callsite(unknown at callsite( ExtReg ( :11:18) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :48:27) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg2[3] = x1056; - // loc(callsite(unknown at callsite( ExtReg ( :11:11) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :48:27) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1057 = x1053 + x1056 * poly_mix[105]; - // loc(callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :467:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1058 = arg3 + x282 * x1057 * poly_mix[0]; - // loc(callsite(unknown at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :31:13) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1059 = x183 + x26; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:17) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1060 = x1059 * x1059; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:22) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1061 = x1060 * x1059; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1062 = x1061 - x283; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1063 = arg3 + x1062 * poly_mix[0]; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:15) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1064 = x283 * x283; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:23) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1065 = x1064 * x1059; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1066 = x1065 - x284; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1067 = x1063 + x1066 * poly_mix[1]; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1068 = x284 + x186; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1069 = x1068 + x189; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1070 = x1069 + x192; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1071 = x1070 + x195; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1072 = x1071 + x198; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1073 = x1072 + x201; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1074 = x1073 + x204; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1075 = x1074 + x207; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1076 = x1075 + x210; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1077 = x1076 + x213; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1078 = x1077 + x216; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1079 = x1078 + x219; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1080 = x1079 + x222; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1081 = x1080 + x225; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1082 = x1081 + x228; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1083 = x1082 + x231; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1084 = x1083 + x234; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1085 = x1084 + x237; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1086 = x1085 + x240; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1087 = x1086 + x243; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1088 = x1087 + x246; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1089 = x1088 + x249; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1090 = x1089 + x252; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1091 = x284 * x25; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1092 = x1090 + x1091; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1093 = x186 * x24; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1094 = x1090 + x1093; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1095 = x189 * x23; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1096 = x1090 + x1095; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1097 = x192 * x22; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1098 = x1090 + x1097; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1099 = x195 * x21; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1100 = x1090 + x1099; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1101 = x198 * x20; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1102 = x1090 + x1101; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1103 = x201 * x19; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1104 = x1090 + x1103; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1105 = x204 * x18; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1106 = x1090 + x1105; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1107 = x207 * x17; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1108 = x1090 + x1107; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1109 = x210 * x16; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1110 = x1090 + x1109; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1111 = x213 * x15; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1112 = x1090 + x1111; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1113 = x216 * x14; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1114 = x1090 + x1113; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1115 = x219 * x13; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1116 = x1090 + x1115; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1117 = x222 * x12; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1118 = x1090 + x1117; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1119 = x225 * x11; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1120 = x1090 + x1119; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1121 = x228 * x10; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1122 = x1090 + x1121; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1123 = x231 * x9; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1124 = x1090 + x1123; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1125 = x234 * x8; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1126 = x1090 + x1125; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1127 = x237 * x7; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1128 = x1090 + x1127; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1129 = x240 * x6; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1130 = x1090 + x1129; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1131 = x243 * x5; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1132 = x1090 + x1131; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1133 = x246 * x4; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1134 = x1090 + x1133; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1135 = x249 * x3; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1136 = x1090 + x1135; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1137 = x252 * x2; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1138 = x1090 + x1137; - // loc(callsite(unknown at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :31:13) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1139 = x1092 + x1; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:17) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1140 = x1139 * x1139; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:22) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1141 = x1140 * x1139; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1142 = x1141 - x285; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1143 = x1067 + x1142 * poly_mix[2]; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:15) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1144 = x285 * x285; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:23) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1145 = x1144 * x1139; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1146 = x1145 - x286; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1147 = x1143 + x1146 * poly_mix[3]; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1148 = x286 + x1094; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1149 = x1148 + x1096; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1150 = x1149 + x1098; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1151 = x1150 + x1100; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1152 = x1151 + x1102; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1153 = x1152 + x1104; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1154 = x1153 + x1106; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1155 = x1154 + x1108; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1156 = x1155 + x1110; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1157 = x1156 + x1112; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1158 = x1157 + x1114; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1159 = x1158 + x1116; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1160 = x1159 + x1118; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1161 = x1160 + x1120; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1162 = x1161 + x1122; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1163 = x1162 + x1124; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1164 = x1163 + x1126; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1165 = x1164 + x1128; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1166 = x1165 + x1130; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1167 = x1166 + x1132; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1168 = x1167 + x1134; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1169 = x1168 + x1136; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1170 = x1169 + x1138; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1171 = x286 * x25; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1172 = x1170 + x1171; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1173 = x1094 * x24; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1174 = x1170 + x1173; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1175 = x1096 * x23; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1176 = x1170 + x1175; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1177 = x1098 * x22; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1178 = x1170 + x1177; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1179 = x1100 * x21; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1180 = x1170 + x1179; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1181 = x1102 * x20; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1182 = x1170 + x1181; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1183 = x1104 * x19; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1184 = x1170 + x1183; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1185 = x1106 * x18; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1186 = x1170 + x1185; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1187 = x1108 * x17; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1188 = x1170 + x1187; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1189 = x1110 * x16; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1190 = x1170 + x1189; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg0[541] = x1190; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1191 = x1112 * x15; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1192 = x1170 + x1191; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg0[542] = x1192; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1193 = x1114 * x14; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1194 = x1170 + x1193; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg0[543] = x1194; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1195 = x1116 * x13; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1196 = x1170 + x1195; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg0[544] = x1196; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1197 = x1118 * x12; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1198 = x1170 + x1197; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg0[545] = x1198; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1199 = x1120 * x11; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1200 = x1170 + x1199; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg0[546] = x1200; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1201 = x1122 * x10; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1202 = x1170 + x1201; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg0[547] = x1202; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1203 = x1124 * x9; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1204 = x1170 + x1203; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg0[548] = x1204; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1205 = x1126 * x8; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1206 = x1170 + x1205; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg0[549] = x1206; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1207 = x1128 * x7; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1208 = x1170 + x1207; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg0[550] = x1208; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1209 = x1130 * x6; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1210 = x1170 + x1209; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg0[551] = x1210; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1211 = x1132 * x5; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1212 = x1170 + x1211; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg0[552] = x1212; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1213 = x1134 * x4; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1214 = x1170 + x1213; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg0[553] = x1214; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1215 = x1136 * x3; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1216 = x1170 + x1215; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg0[554] = x1216; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1217 = x1138 * x2; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1218 = x1170 + x1217; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg0[555] = x1218; - // loc(callsite(unknown at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :31:13) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1219 = x1172 + x0; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:17) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1220 = x1219 * x1219; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:22) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1221 = x1220 * x1219; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1222 = x1221 - x287; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1223 = x1147 + x1222 * poly_mix[4]; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:15) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1224 = x287 * x287; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:23) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1225 = x1224 * x1219; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1226 = x1225 - x288; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1227 = x1223 + x1226 * poly_mix[5]; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1228 = x288 + x1174; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1229 = x1228 + x1176; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1230 = x1229 + x1178; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1231 = x1230 + x1180; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1232 = x1231 + x1182; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1233 = x1232 + x1184; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1234 = x1233 + x1186; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1235 = x1234 + x1188; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1236 = x1235 + x1190; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1237 = x1236 + x1192; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1238 = x1237 + x1194; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1239 = x1238 + x1196; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1240 = x1239 + x1198; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1241 = x1240 + x1200; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1242 = x1241 + x1202; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1243 = x1242 + x1204; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1244 = x1243 + x1206; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1245 = x1244 + x1208; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1246 = x1245 + x1210; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1247 = x1246 + x1212; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1248 = x1247 + x1214; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1249 = x1248 + x1216; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1250 = x1249 + x1218; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg0[539] = x1250; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1251 = x288 * x25; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1252 = x1250 + x1251; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg0[556] = x1252; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1253 = x1174 * x24; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1254 = x1250 + x1253; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg0[558] = x1254; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1255 = x1176 * x23; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1256 = x1250 + x1255; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg0[559] = x1256; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1257 = x1178 * x22; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1258 = x1250 + x1257; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg0[560] = x1258; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1259 = x1180 * x21; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1260 = x1250 + x1259; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg0[561] = x1260; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1261 = x1182 * x20; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1262 = x1250 + x1261; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg0[562] = x1262; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1263 = x1184 * x19; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1264 = x1250 + x1263; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg0[563] = x1264; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1265 = x1186 * x18; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1266 = x1250 + x1265; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg0[564] = x1266; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1267 = x1188 * x17; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg0[540] = x1267; - // loc(unknown) - auto x1268 = rv32im_v2_3(cycle, steps, poly_mix, arg0, x1227, arg2, x1058, arg4, arg5, arg3, arg6, arg7, arg8); - return x1268; -} -FpExt rv32im_v2_0(size_t cycle, size_t steps, FpExt* poly_mix, FpExt* arg0, FpExt arg1, FpExt arg2, FpExt arg3, Fp* arg4, Fp* arg5) { - size_t mask = steps - 1; - // loc(unknown) - constexpr FpExt x0(0,1,0,0); - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x1 = arg4[27 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x2 = arg4[113 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x3 = arg4[29 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :126:34) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :135:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x4 = arg4[34 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x5 = arg4[33 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x6 = arg4[31 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( CycleArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :54:29) at callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :60:19) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x7 = arg4[115 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :34:15) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x8 = arg4[117 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x9 = arg4[118 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x10 = arg4[119 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( CycleArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :55:29) at callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :60:19) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x11 = arg4[116 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x12 = arg4[121 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x13 = arg4[122 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x14 = arg4[124 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x15 = arg4[123 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x16 = arg4[120 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x17 = arg4[126 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x18 = arg4[125 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x19 = arg4[129 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x20 = arg4[128 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x21 = arg4[7 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x22 = arg4[28 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x23 = arg4[30 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x24 = arg4[178 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :126:34) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :134:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x25 = arg4[32 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :126:34) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :136:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x26 = arg4[36 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :28:29) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x27 = arg4[37 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x28 = arg4[38 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :45:28) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x29 = arg4[39 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x30 = arg4[41 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :51:29) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x31 = arg4[42 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :28:29) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x32 = arg4[40 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x33 = arg4[35 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x34 = arg4[44 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :45:28) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x35 = arg4[45 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :28:29) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x36 = arg4[46 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x37 = arg4[47 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :28:29) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x38 = arg4[43 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :8:23) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x39 = arg4[49 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :11:20) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x40 = arg4[50 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :25:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x41 = arg4[53 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :27:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x42 = arg4[54 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU8 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :8:29) at callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :15:16) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :53:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x43 = arg4[55 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :42:21) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x44 = arg4[51 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :51:29) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x45 = arg4[48 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :25:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x46 = arg4[57 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x47 = arg4[58 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU8 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :9:27) at callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :15:16) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :53:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x48 = arg4[56 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( CycleArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :54:29) at callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :60:19) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x49 = arg4[60 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :17:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x50 = arg4[64 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x51 = arg4[59 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :21:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x52 = arg4[68 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :20:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x53 = arg4[67 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :29:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x54 = arg4[76 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :34:30) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x55 = arg4[77 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x56 = arg4[78 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :63:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x57 = arg4[79 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x58 = arg4[75 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :25:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x59 = arg4[72 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :65:23) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x60 = arg4[81 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :8:23) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x61 = arg4[82 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :28:29) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :65:23) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x62 = arg4[80 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :28:29) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :69:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x63 = arg4[84 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :69:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x64 = arg4[85 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :27:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x65 = arg4[88 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :11:20) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x66 = arg4[83 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x67 = arg4[92 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :25:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x68 = arg4[91 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( CycleArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :54:29) at callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :60:19) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x69 = arg4[94 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :26:28) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x70 = arg4[96 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( CycleArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :55:29) at callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :60:19) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x71 = arg4[95 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x72 = arg4[93 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :25:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x73 = arg4[97 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x74 = arg4[100 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x75 = arg4[102 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :25:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x76 = arg4[101 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x77 = arg4[99 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x78 = arg4[103 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :34:15) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x79 = arg4[106 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :25:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x80 = arg4[108 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :26:28) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x81 = arg4[107 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( CycleArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :55:29) at callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :60:19) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x82 = arg4[105 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x83 = arg4[110 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :27:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x84 = arg4[109 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :25:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x85 = arg4[112 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x86 = arg4[114 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x87 = arg4[111 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x88 = arg4[127 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x89 = arg4[130 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x90 = arg4[132 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x91 = arg4[131 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x92 = arg4[134 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x93 = arg4[133 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x94 = arg4[136 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x95 = arg4[138 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x96 = arg4[137 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x97 = arg4[135 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x98 = arg4[140 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x99 = arg4[139 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x100 = arg5[55 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x101 = arg5[54 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x102 = arg5[53 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x103 = arg5[52 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x104 = arg4[142 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x105 = arg4[144 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x106 = arg4[143 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x107 = arg4[141 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x108 = arg4[146 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x109 = arg4[145 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x110 = arg5[59 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x111 = arg5[58 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x112 = arg5[57 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x113 = arg5[56 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x114 = arg4[148 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x115 = arg4[150 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x116 = arg4[149 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x117 = arg4[147 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x118 = arg4[152 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x119 = arg4[151 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x120 = arg5[63 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x121 = arg5[62 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x122 = arg5[61 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x123 = arg5[60 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x124 = arg4[154 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x125 = arg4[156 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x126 = arg4[155 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x127 = arg4[153 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x128 = arg4[158 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x129 = arg4[157 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x130 = arg5[67 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x131 = arg5[66 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x132 = arg5[65 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x133 = arg5[64 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x134 = arg4[160 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x135 = arg4[162 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x136 = arg4[161 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x137 = arg4[159 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x138 = arg4[164 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x139 = arg4[163 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x140 = arg5[71 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x141 = arg5[70 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x142 = arg5[69 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x143 = arg5[68 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x144 = arg4[166 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x145 = arg4[168 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x146 = arg4[167 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x147 = arg4[165 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x148 = arg4[170 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x149 = arg4[169 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x150 = arg4[8 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :15:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x151 = arg4[62 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( CycleArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :55:29) at callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :60:19) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x152 = arg4[61 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :18:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x153 = arg4[65 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :16:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x154 = arg4[63 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :23:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x155 = arg4[70 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :22:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x156 = arg4[69 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x157 = arg4[9 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :24:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x158 = arg4[71 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :19:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x159 = arg4[66 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :27:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x160 = arg4[74 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :26:28) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x161 = arg4[86 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x162 = arg4[89 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :25:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x163 = arg4[87 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x164 = arg4[90 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :27:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x165 = arg4[98 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( CycleArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :54:29) at callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :60:19) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x166 = arg4[104 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x167 = arg4[171 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x168 = arg4[173 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x169 = arg4[172 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x170 = arg4[175 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x171 = arg4[174 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x172 = arg4[177 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x173 = arg4[179 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x174 = arg4[176 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x175 = arg4[181 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x176 = arg4[180 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :236:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x177 = arg4[191 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x178 = arg4[10 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x179 = arg4[11 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x180 = arg0[26]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x181 = arg0[27]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x182 = x180 * x181; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :177:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x183 = arg0[28]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x184 = arg0[29]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x185 = x183 * x184; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x186 = arg0[30]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x187 = x185 - x186; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x188 = x187 - x182; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x189 = arg0[31]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x190 = x188 - x189; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x191 = arg1 + x190 * poly_mix[5]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x192 = arg0[32]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x193 = arg0[33]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x194 = x192 * x193; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x195 = x192 * x1; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x196 = x2 * x193; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x197 = arg0[34]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x198 = x194 * x197; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x199 = x194 * x3; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x200 = x196 * x197; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x201 = x195 * x197; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :177:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x202 = arg0[35]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x203 = x202 * x198; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x204 = x203 - x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x205 = x204 - x201; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x206 = x205 - x199; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x207 = x191 + x206 * poly_mix[6]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x208 = arg0[36]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x209 = x208 * x4; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :84:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x210 = arg0[11]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x211 = x209 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x212 = arg0[37]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x213 = x212 * x211; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x214 = x212 * x5; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x215 = x6 * x211; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x216 = arg0[12]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x217 = x216 * x7; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x218 = arg0[13]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x219 = x218 * x8; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x220 = x217 + x219; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x221 = arg0[14]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x222 = x221 * x9; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x223 = x220 + x222; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x224 = arg0[15]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x225 = x224 * x10; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x226 = x223 + x225; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x227 = x226 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x228 = x213 * x227; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x229 = x213 * x11; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x230 = x215 * x227; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x231 = x214 * x227; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :177:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x232 = arg0[38]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x233 = x232 * x228; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x234 = x233 - x230; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x235 = x234 - x231; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x236 = x235 - x229; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x237 = x207 + x236 * poly_mix[7]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x238 = arg0[16]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x239 = x217 + x238; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x240 = x221 * x12; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x241 = x239 + x240; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x242 = x224 * x13; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x243 = x241 + x242; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x244 = x243 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x245 = arg0[10]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x246 = x245 * x14; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x247 = x246 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x248 = x244 * x247; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x249 = x244 * x15; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x250 = x16 * x247; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x251 = arg0[17]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x252 = x251 * x17; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x253 = x252 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x254 = x248 * x253; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x255 = x248 * x18; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x256 = x250 * x253; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x257 = x249 * x253; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :177:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x258 = arg0[39]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x259 = x258 * x254; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x260 = x259 - x256; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x261 = x260 - x257; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x262 = x261 - x255; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x263 = x237 + x262 * poly_mix[8]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x264 = x251 * x19; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x265 = x264 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :177:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x266 = arg0[40]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x267 = x266 * x265; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x268 = x267 - x20; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x269 = x263 + x268 * poly_mix[9]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :123:43 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x270 = arg0[41]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x271 = arg0[42]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :124:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x272 = x270 - x271; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :125:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x273 = x269 + x272 * poly_mix[10]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :590:9 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x274 = arg2 + x21 * x273 * poly_mix[406]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x275 = x216 * x22; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x276 = x218 * x3; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x277 = x275 + x276; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x278 = x221 * x23; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x279 = x277 + x278; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x280 = x224 * x6; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x281 = x279 + x280; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x282 = x281 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x283 = arg0[18]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x284 = x283 * x282; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x285 = x283 * x1; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x286 = x24 * x282; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x287 = x275 + x238; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x288 = x221 * x5; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x289 = x287 + x288; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x290 = x224 * x4; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x291 = x289 + x290; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x292 = x291 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x293 = x284 * x292; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x294 = x284 * x25; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x295 = x286 * x292; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x296 = x285 * x292; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :177:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x297 = arg0[19]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x298 = x297 * x293; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x299 = x298 - x295; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x300 = x299 - x296; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x301 = x300 - x294; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x302 = arg3 + x301 * poly_mix[0]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x303 = x216 * x26; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x304 = x218 * x27; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x305 = x303 + x304; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x306 = x221 * x28; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x307 = x305 + x306; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x308 = x224 * x29; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x309 = x307 + x308; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x310 = x309 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x311 = x303 + x238; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x312 = x221 * x30; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x313 = x311 + x312; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x314 = x224 * x31; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x315 = x313 + x314; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x316 = x315 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x317 = x310 * x316; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x318 = x310 * x32; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x319 = x33 * x316; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x320 = x216 * x34; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x321 = x218 * x35; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x322 = x320 + x321; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x323 = x221 * x36; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x324 = x322 + x323; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x325 = x224 * x37; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x326 = x324 + x325; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x327 = x326 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x328 = x317 * x327; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x329 = x317 * x38; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x330 = x319 * x327; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x331 = x318 * x327; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :177:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x332 = arg0[22]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x333 = x332 * x328; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x334 = x333 - x330; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x335 = x334 - x331; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x336 = x335 - x329; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x337 = x302 + x336 * poly_mix[1]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x338 = x320 + x238; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x339 = x221 * x39; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x340 = x338 + x339; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x341 = x224 * x40; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x342 = x340 + x341; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x343 = x342 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x344 = x218 * x41; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x345 = arg0[43]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x346 = x345 + x344; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x347 = x221 * x42; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x348 = x346 + x347; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x349 = x224 * x43; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x350 = x348 + x349; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x351 = x350 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x352 = x343 * x351; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x353 = x343 * x44; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x354 = x45 * x351; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x355 = x221 * x46; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x356 = arg0[44]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x357 = x356 + x355; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x358 = x224 * x47; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x359 = x357 + x358; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x360 = x359 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x361 = x352 * x360; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x362 = x352 * x48; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x363 = x354 * x360; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x364 = x353 * x360; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :177:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x365 = arg0[23]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x366 = x365 * x361; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x367 = x366 - x363; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x368 = x367 - x364; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x369 = x368 - x362; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x370 = x337 + x369 * poly_mix[2]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x371 = x216 * x49; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x372 = arg0[45]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x373 = x371 + x372; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x374 = arg0[46]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x375 = x373 + x374; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x376 = arg0[47]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x377 = x375 + x376; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x378 = x377 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x379 = x371 + x238; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x380 = arg0[48]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x381 = x379 + x380; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x382 = arg0[49]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x383 = x381 + x382; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x384 = x383 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x385 = x378 * x384; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x386 = x378 * x50; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x387 = x51 * x384; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x388 = x216 * x52; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x389 = arg0[50]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x390 = x388 + x389; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x391 = arg0[51]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x392 = x390 + x391; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x393 = arg0[52]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x394 = x392 + x393; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x395 = x394 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x396 = x385 * x395; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x397 = x385 * x53; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x398 = x387 * x395; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x399 = x386 * x395; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :177:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x400 = arg0[53]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x401 = x400 * x396; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x402 = x401 - x398; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x403 = x402 - x399; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x404 = x403 - x397; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x405 = x370 + x404 * poly_mix[3]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x406 = x388 + x238; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x407 = arg0[54]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x408 = x406 + x407; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x409 = arg0[55]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x410 = x408 + x409; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x411 = x410 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x412 = x216 * x54; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x413 = x218 * x55; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x414 = x412 + x413; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x415 = x221 * x56; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x416 = x414 + x415; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x417 = x224 * x57; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x418 = x416 + x417; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x419 = x418 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x420 = x411 * x419; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x421 = x411 * x58; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x422 = x59 * x419; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x423 = x412 + x238; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x424 = x221 * x60; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x425 = x423 + x424; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x426 = x224 * x61; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x427 = x425 + x426; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x428 = x427 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x429 = x420 * x428; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x430 = x420 * x62; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x431 = x422 * x428; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x432 = x421 * x428; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :177:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x433 = arg0[56]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x434 = x433 * x429; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x435 = x434 - x431; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x436 = x435 - x432; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x437 = x436 - x430; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x438 = x405 + x437 * poly_mix[4]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x439 = x216 * x63; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x440 = x218 * x64; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x441 = x439 + x440; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x442 = arg0[57]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x443 = x441 + x442; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x444 = arg0[58]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x445 = x443 + x444; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x446 = x445 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x447 = x439 + x238; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x448 = arg0[59]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x449 = x447 + x448; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x450 = arg0[60]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x451 = x449 + x450; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x452 = x451 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x453 = x446 * x452; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x454 = x446 * x65; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x455 = x66 * x452; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x456 = x245 * x67; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x457 = x456 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x458 = x453 * x457; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x459 = x453 * x68; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x460 = x455 * x457; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x461 = x454 * x457; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x462 = x183 * x458; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x463 = x462 - x460; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x464 = x463 - x461; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x465 = x464 - x459; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x466 = x438 + x465 * poly_mix[5]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x467 = x245 * x69; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x468 = x467 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x469 = x245 * x70; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x470 = x469 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x471 = x468 * x470; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x472 = x468 * x71; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x473 = x72 * x470; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x474 = arg0[61]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x475 = x471 * x474; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x476 = x471 * x73; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x477 = x473 * x474; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x478 = x472 * x474; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x479 = x202 * x475; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x480 = x479 - x477; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x481 = x480 - x478; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x482 = x481 - x476; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x483 = x466 + x482 * poly_mix[6]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x484 = x245 * x74; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x485 = x484 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x486 = x245 * x75; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x487 = x486 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x488 = x485 * x487; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x489 = x485 * x76; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x490 = x77 * x487; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x491 = arg0[62]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x492 = x488 * x491; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x493 = x488 * x78; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x494 = x490 * x491; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x495 = x489 * x491; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x496 = x232 * x492; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x497 = x496 - x494; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x498 = x497 - x495; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x499 = x498 - x493; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x500 = x483 + x499 * poly_mix[7]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x501 = x245 * x79; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x502 = x501 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x503 = x251 * x80; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x504 = x503 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x505 = x502 * x504; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x506 = x502 * x81; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x507 = x82 * x504; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x508 = x251 * x83; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x509 = x508 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x510 = x505 * x509; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x511 = x505 * x84; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x512 = x507 * x509; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x513 = x506 * x509; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x514 = x258 * x510; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x515 = x514 - x512; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x516 = x515 - x513; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x517 = x516 - x511; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x518 = x500 + x517 * poly_mix[8]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x519 = x251 * x85; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x520 = x519 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x521 = x251 * x86; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x522 = x521 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x523 = x520 * x522; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x524 = x520 * x2; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x525 = x87 * x522; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x526 = x251 * x11; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x527 = x526 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x528 = x523 * x527; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x529 = x523 * x7; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x530 = x525 * x527; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x531 = x524 * x527; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x532 = x266 * x528; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x533 = x532 - x530; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x534 = x533 - x531; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x535 = x534 - x529; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x536 = x518 + x535 * poly_mix[9]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x537 = x251 * x9; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x538 = x537 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x539 = arg0[63]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x540 = x538 * x539; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x541 = x538 * x10; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x542 = x8 * x539; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x543 = x251 * x13; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x544 = x543 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x545 = x540 * x544; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x546 = x540 * x12; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x547 = x542 * x544; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x548 = x541 * x544; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :177:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x549 = arg0[64]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x550 = x549 * x545; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x551 = x550 - x547; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x552 = x551 - x548; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x553 = x552 - x546; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x554 = x536 + x553 * poly_mix[10]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x555 = x251 * x14; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x556 = x555 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x557 = x556 * x253; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x558 = x556 * x18; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x559 = x15 * x253; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x560 = x251 * x20; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x561 = x560 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x562 = x557 * x561; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x563 = x557 * x88; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x564 = x559 * x561; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x565 = x558 * x561; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :177:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x566 = arg0[65]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x567 = x566 * x562; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x568 = x567 - x564; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x569 = x568 - x565; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x570 = x569 - x563; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x571 = x554 + x570 * poly_mix[11]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x572 = x251 * x89; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x573 = x572 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x574 = x251 * x90; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x575 = x574 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x576 = x573 * x575; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x577 = x573 * x91; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x578 = x19 * x575; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x579 = x251 * x92; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x580 = x579 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x581 = x576 * x580; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x582 = x576 * x93; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x583 = x578 * x580; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x584 = x577 * x580; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :177:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x585 = arg0[66]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x586 = x585 * x581; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x587 = x586 - x583; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x588 = x587 - x584; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x589 = x588 - x582; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x590 = x571 + x589 * poly_mix[12]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x591 = x251 * x94; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x592 = x591 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x593 = x251 * x95; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x594 = x593 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x595 = x592 * x594; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x596 = x592 * x96; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x597 = x97 * x594; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x598 = x208 * x98; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x599 = x598 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x600 = x595 * x599; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x601 = x595 * x99; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x602 = x597 * x599; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x603 = x596 * x599; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x604 = x100 * x0; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x605 = x101 + x604; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x606 = x605 * x0; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x607 = x102 + x606; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x608 = x607 * x0; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x609 = x103 + x608; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x610 = arg0[67]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :177:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x611 = x609 - x610; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x612 = x611 * x600; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x613 = x612 - x602; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x614 = x613 - x603; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x615 = x614 - x601; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x616 = x590 + x615 * poly_mix[13]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x617 = x208 * x104; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x618 = x617 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x619 = x208 * x105; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x620 = x619 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x621 = x618 * x620; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x622 = x618 * x106; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x623 = x107 * x620; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x624 = x208 * x108; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x625 = x624 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x626 = x621 * x625; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x627 = x621 * x109; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x628 = x623 * x625; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x629 = x622 * x625; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x630 = x110 * x0; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x631 = x111 + x630; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x632 = x631 * x0; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x633 = x112 + x632; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x634 = x633 * x0; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x635 = x113 + x634; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :177:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x636 = x635 - x609; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x637 = x636 * x626; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x638 = x637 - x628; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x639 = x638 - x629; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x640 = x639 - x627; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x641 = x616 + x640 * poly_mix[14]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x642 = x208 * x114; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x643 = x642 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x644 = x208 * x115; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x645 = x644 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x646 = x643 * x645; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x647 = x643 * x116; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x648 = x117 * x645; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x649 = x208 * x118; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x650 = x649 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x651 = x646 * x650; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x652 = x646 * x119; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x653 = x648 * x650; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x654 = x647 * x650; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x655 = x120 * x0; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x656 = x121 + x655; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x657 = x656 * x0; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x658 = x122 + x657; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x659 = x658 * x0; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x660 = x123 + x659; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :177:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x661 = x660 - x635; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x662 = x661 * x651; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x663 = x662 - x653; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x664 = x663 - x654; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x665 = x664 - x652; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x666 = x641 + x665 * poly_mix[15]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x667 = x208 * x124; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x668 = x667 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x669 = x208 * x125; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x670 = x669 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x671 = x668 * x670; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x672 = x668 * x126; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x673 = x127 * x670; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x674 = x208 * x128; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x675 = x674 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x676 = x671 * x675; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x677 = x671 * x129; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x678 = x673 * x675; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x679 = x672 * x675; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x680 = x130 * x0; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x681 = x131 + x680; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x682 = x681 * x0; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x683 = x132 + x682; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x684 = x683 * x0; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x685 = x133 + x684; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :177:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x686 = x685 - x660; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x687 = x686 * x676; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x688 = x687 - x678; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x689 = x688 - x679; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x690 = x689 - x677; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x691 = x666 + x690 * poly_mix[16]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x692 = x208 * x134; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x693 = x692 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x694 = x208 * x135; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x695 = x694 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x696 = x693 * x695; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x697 = x693 * x136; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x698 = x137 * x695; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x699 = x208 * x138; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x700 = x699 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x701 = x696 * x700; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x702 = x696 * x139; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x703 = x698 * x700; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x704 = x697 * x700; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x705 = x140 * x0; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x706 = x141 + x705; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x707 = x706 * x0; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x708 = x142 + x707; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x709 = x708 * x0; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x710 = x143 + x709; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :177:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x711 = x710 - x685; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x712 = x711 * x701; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x713 = x712 - x703; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x714 = x713 - x704; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x715 = x714 - x702; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x716 = x691 + x715 * poly_mix[17]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x717 = x208 * x144; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x718 = x717 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x719 = x208 * x145; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x720 = x719 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x721 = x718 * x720; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x722 = x718 * x146; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x723 = x147 * x720; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x724 = x208 * x148; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x725 = x724 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x726 = x721 * x725; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x727 = x721 * x149; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x728 = x723 * x725; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x729 = x722 * x725; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :177:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x730 = x270 - x710; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x731 = x730 * x726; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x732 = x731 - x728; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x733 = x732 - x729; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x734 = x733 - x727; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x735 = x716 + x734 * poly_mix[18]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :590:9 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x736 = x274 + x150 * x735 * poly_mix[407]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x737 = x251 * x55; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x738 = x737 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x739 = arg0[68]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x740 = x738 * x739; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x741 = x738 * x62; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x742 = x54 * x739; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x743 = x740 * x282; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x744 = x740 * x1; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x745 = x742 * x282; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x746 = x741 * x282; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x747 = x297 * x743; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x748 = x747 - x745; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x749 = x748 - x746; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x750 = x749 - x744; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x751 = arg3 + x750 * poly_mix[0]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x752 = x292 * x310; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x753 = x292 * x33; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x754 = x25 * x310; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x755 = x752 * x316; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x756 = x752 * x32; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x757 = x754 * x316; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x758 = x753 * x316; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x759 = x332 * x755; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x760 = x759 - x757; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x761 = x760 - x758; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x762 = x761 - x756; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x763 = x751 + x762 * poly_mix[1]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x764 = x327 * x343; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x765 = x327 * x45; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x766 = x38 * x343; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x767 = x764 * x351; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x768 = x764 * x44; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x769 = x766 * x351; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x770 = x765 * x351; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x771 = x365 * x767; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x772 = x771 - x769; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x773 = x772 - x770; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x774 = x773 - x768; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x775 = x763 + x774 * poly_mix[2]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x776 = x245 * x49; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x777 = x776 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x778 = x360 * x777; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x779 = x360 * x51; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x780 = x48 * x777; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x781 = x245 * x151; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x782 = x781 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x783 = x778 * x782; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x784 = x778 * x152; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x785 = x780 * x782; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x786 = x779 * x782; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x787 = x400 * x783; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x788 = x787 - x785; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x789 = x788 - x786; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x790 = x789 - x784; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x791 = x775 + x790 * poly_mix[3]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x792 = x245 * x50; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x793 = x792 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x794 = arg0[69]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x795 = x793 * x794; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x796 = x793 * x153; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x797 = x154 * x794; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x798 = x251 * x52; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x799 = x798 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x800 = x795 * x799; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x801 = x795 * x53; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x802 = x797 * x799; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x803 = x796 * x799; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x804 = x433 * x800; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x805 = x804 - x802; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x806 = x805 - x803; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x807 = x806 - x801; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x808 = x791 + x807 * poly_mix[4]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x809 = x251 * x155; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x810 = x809 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x811 = x251 * x87; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x812 = x811 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x813 = x810 * x812; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x814 = x810 * x83; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x815 = x156 * x812; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x816 = x813 * x522; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x817 = x813 * x2; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x818 = x815 * x522; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x819 = x814 * x522; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x820 = x183 * x816; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x821 = x820 - x818; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x822 = x821 - x819; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x823 = x822 - x817; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x824 = x808 + x823 * poly_mix[5]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x825 = x202 * x283; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x826 = x825 - x11; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x827 = x824 + x826 * poly_mix[6]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x828 = arg0[70]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :124:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x829 = x270 - x828; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :125:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x830 = x827 + x829 * poly_mix[7]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :590:9 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x831 = x736 + x157 * x830 * poly_mix[408]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x832 = x218 * x52; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x833 = arg0[71]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x834 = x833 + x832; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x835 = x221 * x156; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x836 = x834 + x835; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x837 = x224 * x155; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x838 = x836 + x837; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x839 = x838 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x840 = arg0[72]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x841 = arg0[73]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x842 = x840 + x841; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x843 = arg0[74]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x844 = x842 + x843; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x845 = x844 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x846 = x839 * x845; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x847 = x839 * x158; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x848 = x159 * x845; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x849 = x216 * x58; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x850 = x218 * x54; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x851 = x849 + x850; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x852 = x221 * x55; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x853 = x851 + x852; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x854 = x224 * x56; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x855 = x853 + x854; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x856 = x855 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x857 = x846 * x856; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x858 = x846 * x160; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x859 = x848 * x856; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x860 = x847 * x856; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x861 = x297 * x857; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x862 = x861 - x859; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x863 = x862 - x860; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x864 = x863 - x858; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x865 = arg3 + x864 * poly_mix[0]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x866 = x849 + x238; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x867 = x221 * x62; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x868 = x866 + x867; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x869 = x224 * x60; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x870 = x868 + x869; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x871 = x870 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x872 = x216 * x66; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x873 = x218 * x63; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x874 = x872 + x873; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x875 = x221 * x64; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x876 = x874 + x875; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x877 = x224 * x161; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x878 = x876 + x877; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x879 = x878 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x880 = x871 * x879; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x881 = x871 * x61; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x882 = x57 * x879; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x883 = x872 + x238; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x884 = x221 * x65; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x885 = x883 + x884; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x886 = x224 * x162; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x887 = x885 + x886; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x888 = x887 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x889 = x880 * x888; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x890 = x880 * x163; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x891 = x882 * x888; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x892 = x881 * x888; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x893 = x332 * x889; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x894 = x893 - x891; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x895 = x894 - x892; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x896 = x895 - x890; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x897 = x865 + x896 * poly_mix[1]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x898 = x216 * x68; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x899 = x218 * x67; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x900 = x898 + x899; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x901 = x221 * x72; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x902 = x900 + x901; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x903 = x224 * x69; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x904 = x902 + x903; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x905 = x904 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x906 = x898 + x238; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x907 = x221 * x70; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x908 = x906 + x907; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x909 = x224 * x73; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x910 = x908 + x909; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x911 = x910 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x912 = x905 * x911; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x913 = x905 * x71; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x914 = x164 * x911; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x915 = x218 * x74; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x916 = arg0[75]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x917 = x916 + x915; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x918 = arg0[76]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x919 = x917 + x918; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x920 = arg0[77]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x921 = x919 + x920; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x922 = x921 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x923 = x912 * x922; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x924 = x912 * x165; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x925 = x914 * x922; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x926 = x913 * x922; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x927 = x365 * x923; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x928 = x927 - x925; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x929 = x928 - x926; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x930 = x929 - x924; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x931 = x897 + x930 * poly_mix[2]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x932 = x221 * x166; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x933 = arg0[78]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x934 = x933 + x932; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x935 = x224 * x82; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x936 = x934 + x935; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x937 = x936 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x938 = arg0[79]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x939 = arg0[80]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x940 = x938 + x939; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x941 = arg0[81]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x942 = x940 + x941; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x943 = arg0[82]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x944 = x942 + x943; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x945 = x944 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x946 = x937 * x945; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x947 = x937 * x79; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x948 = x78 * x945; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x949 = arg0[83]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x950 = arg0[84]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x951 = x949 + x950; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x952 = arg0[85]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x953 = x951 + x952; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x954 = x953 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x955 = x946 * x954; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x956 = x946 * x87; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x957 = x948 * x954; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x958 = x947 * x954; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x959 = x400 * x955; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x960 = x959 - x957; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x961 = x960 - x958; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x962 = x961 - x956; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x963 = x931 + x962 * poly_mix[3]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x964 = x218 * x11; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x965 = x217 + x964; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x966 = x221 * x8; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x967 = x965 + x966; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x968 = x224 * x9; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x969 = x967 + x968; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x970 = x969 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x971 = x221 * x16; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x972 = x239 + x971; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x973 = x224 * x12; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x974 = x972 + x973; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x975 = x974 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x976 = x970 * x975; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x977 = x970 * x10; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x978 = x86 * x975; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x979 = x216 * x15; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x980 = x218 * x14; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x981 = x979 + x980; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x982 = x221 * x18; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x983 = x981 + x982; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x984 = x224 * x17; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x985 = x983 + x984; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x986 = x985 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x987 = x976 * x986; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x988 = x976 * x13; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x989 = x978 * x986; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x990 = x977 * x986; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x991 = x433 * x987; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x992 = x991 - x989; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x993 = x992 - x990; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x994 = x993 - x988; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x995 = x963 + x994 * poly_mix[4]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x996 = x979 + x238; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x997 = x221 * x20; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x998 = x996 + x997; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x999 = x224 * x19; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1000 = x998 + x999; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1001 = x1000 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1002 = x245 * x91; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1003 = x1002 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1004 = x1001 * x1003; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1005 = x1001 * x89; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1006 = x88 * x1003; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1007 = x245 * x93; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1008 = x1007 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1009 = x1004 * x1008; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1010 = x1004 * x90; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1011 = x1006 * x1008; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1012 = x1005 * x1008; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1013 = x183 * x1009; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1014 = x1013 - x1011; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1015 = x1014 - x1012; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1016 = x1015 - x1010; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x1017 = x995 + x1016 * poly_mix[5]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1018 = x245 * x97; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1019 = x1018 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1020 = x245 * x96; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1021 = x1020 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1022 = x1019 * x1021; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1023 = x1019 * x94; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1024 = x92 * x1021; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1025 = x245 * x99; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1026 = x1025 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1027 = x1022 * x1026; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1028 = x1022 * x95; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1029 = x1024 * x1026; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1030 = x1023 * x1026; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1031 = x202 * x1027; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1032 = x1031 - x1029; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1033 = x1032 - x1030; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1034 = x1033 - x1028; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x1035 = x1017 + x1034 * poly_mix[6]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1036 = x245 * x107; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1037 = x1036 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1038 = x245 * x106; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1039 = x1038 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1040 = x1037 * x1039; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1041 = x1037 * x104; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1042 = x98 * x1039; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1043 = x245 * x109; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1044 = x1043 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1045 = x1040 * x1044; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1046 = x1040 * x105; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1047 = x1042 * x1044; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1048 = x1041 * x1044; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1049 = x232 * x1045; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1050 = x1049 - x1047; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1051 = x1050 - x1048; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1052 = x1051 - x1046; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x1053 = x1035 + x1052 * poly_mix[7]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1054 = x251 * x117; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1055 = x1054 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1056 = x251 * x116; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1057 = x1056 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1058 = x1055 * x1057; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1059 = x1055 * x114; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1060 = x108 * x1057; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1061 = x251 * x119; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1062 = x1061 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1063 = x1058 * x1062; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1064 = x1058 * x115; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1065 = x1060 * x1062; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1066 = x1059 * x1062; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1067 = x258 * x1063; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1068 = x1067 - x1065; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1069 = x1068 - x1066; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1070 = x1069 - x1064; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x1071 = x1053 + x1070 * poly_mix[8]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1072 = x251 * x127; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1073 = x1072 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1074 = x251 * x126; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1075 = x1074 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1076 = x1073 * x1075; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1077 = x1073 * x124; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1078 = x118 * x1075; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1079 = arg0[86]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1080 = x1076 * x1079; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1081 = x1076 * x125; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1082 = x1078 * x1079; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1083 = x1077 * x1079; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1084 = x266 * x1080; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1085 = x1084 - x1082; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1086 = x1085 - x1083; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1087 = x1086 - x1081; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x1088 = x1071 + x1087 * poly_mix[9]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1089 = x251 * x137; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1090 = x1089 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1091 = x251 * x136; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1092 = x1091 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1093 = x1090 * x1092; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1094 = x1090 * x134; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1095 = x128 * x1092; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1096 = x251 * x139; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1097 = x1096 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1098 = x1093 * x1097; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1099 = x1093 * x135; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1100 = x1095 * x1097; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1101 = x1094 * x1097; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1102 = x549 * x1098; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1103 = x1102 - x1100; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1104 = x1103 - x1101; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1105 = x1104 - x1099; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x1106 = x1088 + x1105 * poly_mix[10]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1107 = x251 * x147; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1108 = x1107 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1109 = arg0[87]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1110 = x1108 * x1109; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1111 = x1108 * x144; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1112 = x138 * x1109; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1113 = x251 * x149; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1114 = x1113 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1115 = x1110 * x1114; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1116 = x1110 * x145; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1117 = x1112 * x1114; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1118 = x1111 * x1114; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1119 = x566 * x1115; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1120 = x1119 - x1117; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1121 = x1120 - x1118; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1122 = x1121 - x1116; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x1123 = x1106 + x1122 * poly_mix[11]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1124 = x251 * x167; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1125 = x1124 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1126 = x251 * x168; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1127 = x1126 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1128 = x1125 * x1127; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1129 = x1125 * x169; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1130 = x148 * x1127; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1131 = x251 * x170; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1132 = x1131 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1133 = x1128 * x1132; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1134 = x1128 * x171; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1135 = x1130 * x1132; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1136 = x1129 * x1132; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1137 = x585 * x1133; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1138 = x1137 - x1135; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1139 = x1138 - x1136; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1140 = x1139 - x1134; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x1141 = x1123 + x1140 * poly_mix[12]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1142 = x251 * x172; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1143 = x1142 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1144 = x208 * x173; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1145 = x1144 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1146 = x1143 * x1145; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1147 = x1143 * x24; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1148 = x174 * x1145; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1149 = x208 * x175; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1150 = x1149 + x210; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1151 = x1146 * x1150; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1152 = x1146 * x176; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1153 = x1148 * x1150; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1154 = x1147 * x1150; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1155 = x611 * x1151; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1156 = x1155 - x1153; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1157 = x1156 - x1154; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1158 = x1157 - x1152; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x1159 = x1141 + x1158 * poly_mix[13]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1160 = x636 * x283; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1161 = x1160 - x177; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x1162 = x1159 + x1161 * poly_mix[14]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :124:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1163 = x270 - x635; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :125:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x1164 = x1162 + x1163 * poly_mix[15]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :590:9 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x1165 = x831 + x178 * x1164 * poly_mix[409]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1166 = x297 * x283; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1167 = x1166 - x20; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x1168 = arg3 + x1167 * poly_mix[0]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1169 = arg0[88]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :124:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1170 = x270 - x1169; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :125:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x1171 = x1168 + x1170 * poly_mix[1]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :590:9 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x1172 = x1165 + x179 * x1171 * poly_mix[410]; - return x1172; -} - -} // namespace risc0::circuit::rv32im_v2 -// clang-format on diff --git a/risc0/circuit/rv32im-v2-sys/kernels/cxx/rust_poly_fp_1.cpp b/risc0/circuit/rv32im-v2-sys/kernels/cxx/rust_poly_fp_1.cpp deleted file mode 100644 index 04875508..00000000 --- a/risc0/circuit/rv32im-v2-sys/kernels/cxx/rust_poly_fp_1.cpp +++ /dev/null @@ -1,9764 +0,0 @@ -// Copyright 2024 RISC Zero, Inc. -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -// This code is automatically generated - -#include "fp.h" -#include "fpext.h" - -#include - -constexpr size_t kInvRate = 4; - -// clang-format off -namespace risc0::circuit::rv32im_v2 { - -FpExt rv32im_v2_12(size_t cycle, size_t steps, FpExt* poly_mix, Fp* arg0, FpExt arg1, FpExt arg2, FpExt arg3, FpExt arg4, FpExt arg5, FpExt arg6, FpExt arg7, FpExt arg8, FpExt* arg9, Fp* arg10, Fp* arg11, Fp* arg12, Fp* arg13); -FpExt rv32im_v2_11(size_t cycle, size_t steps, FpExt* poly_mix, FpExt arg0, Fp* arg1, FpExt arg2, FpExt arg3, FpExt arg4, FpExt arg5, FpExt* arg6, Fp* arg7, Fp* arg8, Fp* arg9, Fp* arg10); -FpExt rv32im_v2_10(size_t cycle, size_t steps, FpExt* poly_mix, Fp* arg0, FpExt arg1, FpExt arg2, FpExt arg3, FpExt arg4, FpExt arg5, FpExt arg6, FpExt arg7, FpExt arg8, FpExt arg9, FpExt arg10, FpExt arg11, FpExt* arg12, FpExt arg13, Fp* arg14, Fp* arg15, Fp* arg16, Fp* arg17); -FpExt rv32im_v2_9(size_t cycle, size_t steps, FpExt* poly_mix, FpExt arg0, Fp* arg1, FpExt arg2, FpExt arg3, FpExt arg4, FpExt arg5, FpExt arg6, FpExt arg7, FpExt arg8, FpExt* arg9, FpExt arg10, Fp* arg11, Fp* arg12, Fp* arg13, Fp* arg14); -FpExt rv32im_v2_8(size_t cycle, size_t steps, FpExt* poly_mix, Fp* arg0, FpExt arg1, FpExt arg2, FpExt arg3, FpExt arg4, FpExt arg5, FpExt arg6, FpExt arg7, FpExt* arg8, FpExt arg9, Fp* arg10, Fp* arg11, Fp* arg12, Fp* arg13); -FpExt rv32im_v2_7(size_t cycle, size_t steps, FpExt* poly_mix, FpExt arg0, FpExt arg1, Fp* arg2, FpExt arg3, FpExt arg4, FpExt arg5, FpExt* arg6, FpExt arg7, Fp* arg8, Fp* arg9, Fp* arg10, Fp* arg11); -FpExt rv32im_v2_6(size_t cycle, size_t steps, FpExt* poly_mix, Fp* arg0, FpExt arg1, FpExt arg2, FpExt* arg3, FpExt arg4, FpExt arg5, FpExt arg6, FpExt arg7, FpExt arg8, Fp* arg9, Fp* arg10, Fp* arg11, Fp* arg12); -FpExt rv32im_v2_5(size_t cycle, size_t steps, FpExt* poly_mix, Fp* arg0, FpExt arg1, FpExt* arg2, FpExt arg3, FpExt arg4, FpExt arg5, FpExt arg6, FpExt arg7, Fp* arg8, Fp* arg9, Fp* arg10); -FpExt rv32im_v2_4(size_t cycle, size_t steps, FpExt* poly_mix, Fp* arg0, FpExt arg1, FpExt* arg2, FpExt arg3, FpExt arg4, FpExt arg5, Fp* arg6, Fp* arg7, Fp* arg8); -FpExt rv32im_v2_3(size_t cycle, size_t steps, FpExt* poly_mix, Fp* arg0, FpExt arg1, FpExt* arg2, FpExt arg3, FpExt arg4, FpExt arg5, FpExt arg6, Fp* arg7, Fp* arg8, Fp* arg9); -FpExt rv32im_v2_2(size_t cycle, size_t steps, FpExt* poly_mix, Fp* arg0, FpExt arg1, FpExt* arg2, FpExt arg3, FpExt arg4, FpExt arg5, FpExt arg6, Fp* arg7, Fp* arg8, Fp* arg9); -FpExt rv32im_v2_1(size_t cycle, size_t steps, FpExt* poly_mix, FpExt* arg0, FpExt arg1, FpExt arg2, FpExt arg3, Fp* arg4, Fp* arg5, Fp* arg6); -FpExt rv32im_v2_0(size_t cycle, size_t steps, FpExt* poly_mix, FpExt* arg0, FpExt arg1, FpExt arg2, FpExt arg3, Fp* arg4, Fp* arg5); -FpExt poly_fp(size_t cycle, size_t steps, FpExt* poly_mix, Fp** args); - -FpExt rv32im_v2_11(size_t cycle, size_t steps, FpExt* poly_mix, FpExt arg0, Fp* arg1, FpExt arg2, FpExt arg3, FpExt arg4, FpExt arg5, FpExt* arg6, Fp* arg7, Fp* arg8, Fp* arg9, Fp* arg10) { - size_t mask = steps - 1; - // loc(unknown) - constexpr Fp x0(5); - // loc(unknown) - constexpr Fp x1(19); - // loc(unknown) - constexpr Fp x2(2013235201); - // loc(unknown) - constexpr Fp x3(131070); - // loc(unknown) - constexpr Fp x4(131072); - // loc(unknown) - constexpr Fp x5(65536); - // loc(unknown) - constexpr Fp x6(16777216); - // loc(unknown) - constexpr Fp x7(1006632961); - // loc(unknown) - constexpr Fp x8(51); - // loc(unknown) - constexpr Fp x9(64); - // loc(unknown) - constexpr Fp x10(4); - // loc(unknown) - constexpr Fp x11(8); - // loc(unknown) - constexpr Fp x12(256); - // loc(unknown) - constexpr Fp x13(1024); - // loc(unknown) - constexpr Fp x14(4096); - // loc(unknown) - constexpr Fp x15(16384); - // loc(unknown) - constexpr Fp x16(16); - // loc(unknown) - constexpr Fp x17(32); - // loc(unknown) - constexpr Fp x18(128); - // loc(unknown) - constexpr Fp x19(512); - // loc(unknown) - constexpr Fp x20(2048); - // loc(unknown) - constexpr Fp x21(8192); - // loc(unknown) - constexpr Fp x22(32768); - // loc(unknown) - constexpr Fp x23(3); - // loc(unknown) - constexpr Fp x24(2); - // loc(unknown) - constexpr Fp x25(1); - // loc(unknown) - constexpr Fp x26(0); - // loc(unknown) - constexpr Fp x27(2013265920); - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :8:23) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x28 = arg7[82 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x29 = arg7[90 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x30 = arg7[89 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x31 = arg7[92 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( CycleArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :55:29) at callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :60:19) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x32 = arg7[95 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x33 = arg7[93 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :26:28) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x34 = arg7[96 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :48:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x35 = arg7[0 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :25:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x36 = arg7[91 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :25:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x37 = arg7[97 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :27:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x38 = arg7[98 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :21:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x39 = arg7[68 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :25:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x40 = arg7[72 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :34:30) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x41 = arg7[77 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x42 = arg7[78 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :18:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x43 = arg7[65 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :19:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x44 = arg7[66 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :20:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x45 = arg7[67 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :22:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x46 = arg7[69 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :23:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x47 = arg7[70 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :24:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x48 = arg7[71 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :26:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x49 = arg7[73 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :27:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x50 = arg7[74 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x51 = arg7[75 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :29:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x52 = arg7[76 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :63:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x53 = arg7[79 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :28:29) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :65:23) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x54 = arg7[80 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :27:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x55 = arg7[109 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x56 = arg7[100 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x57 = arg7[99 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x58 = arg7[102 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( CycleArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :55:29) at callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :60:19) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x59 = arg7[105 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x60 = arg7[103 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :34:15) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x61 = arg7[106 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :25:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x62 = arg7[101 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :26:28) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x63 = arg7[107 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :25:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x64 = arg7[108 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x65 = arg7[120 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x66 = arg7[111 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x67 = arg7[110 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x68 = arg7[113 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( CycleArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :55:29) at callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :60:19) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x69 = arg7[116 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x70 = arg7[114 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :34:15) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x71 = arg7[117 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :25:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x72 = arg7[112 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x73 = arg7[118 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x74 = arg7[119 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x75 = arg7[122 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x76 = arg7[123 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x77 = arg7[124 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x78 = arg7[125 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x79 = arg7[121 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x80 = arg7[28 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x81 = arg7[126 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x82 = arg7[127 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x83 = arg7[128 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :45:28) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x84 = arg7[39 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x85 = arg7[41 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :45:28) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x86 = arg7[45 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x87 = arg7[47 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :51:29) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x88 = arg7[42 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :28:29) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x89 = arg7[40 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :51:29) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x90 = arg7[48 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x91 = arg7[44 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x92 = arg7[129 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :28:29) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x93 = arg7[46 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :8:23) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x94 = arg7[49 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :42:21) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x95 = arg7[51 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :25:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x96 = arg7[53 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU8 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :8:29) at callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :15:16) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :53:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x97 = arg7[55 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :26:28) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x98 = arg7[52 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :11:20) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x99 = arg7[50 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x100 = arg7[58 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :27:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x101 = arg7[54 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x102 = arg7[130 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU8 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :9:27) at callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :15:16) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :53:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x103 = arg7[56 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x104 = arg7[131 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x105 = arg7[30 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x106 = arg7[59 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x107 = arg7[133 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x108 = arg7[132 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( CycleArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :54:29) at callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :60:19) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x109 = arg7[60 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :126:34) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :134:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x110 = arg7[32 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( CycleArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :55:29) at callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :60:19) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x111 = arg7[61 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :15:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x112 = arg7[62 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :126:34) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :135:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x113 = arg7[34 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :16:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x114 = arg7[63 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x115 = arg7[137 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x116 = arg7[136 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :17:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x117 = arg7[64 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :126:34) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :136:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x118 = arg7[36 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x119 = arg7[38 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x120 = arg7[139 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x121 = arg7[138 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x122 = arg7[19 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x123 = arg7[20 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :28:29) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x124 = arg7[37 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x125 = arg7[21 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x126 = arg7[22 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x127 = arg7[23 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x128 = arg7[24 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x129 = arg7[27 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x130 = arg7[29 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x131 = arg7[31 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x132 = arg7[33 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x133 = arg7[35 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :28:29) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x134 = arg7[43 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :25:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x135 = arg7[57 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x136 = arg7[25 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x137 = arg7[26 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :97:30) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x138 = arg7[32 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :97:30) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x139 = arg7[30 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :97:30) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x140 = arg7[34 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :150:25) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x141 = arg7[36 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x142 = arg7[141 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x143 = arg7[140 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x144 = arg7[142 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x145 = arg7[144 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x146 = arg7[148 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x147 = arg7[143 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x148 = arg7[145 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x149 = arg7[151 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x150 = arg7[152 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x151 = arg7[149 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x152 = arg7[150 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x153 = arg7[153 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x154 = arg7[155 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x155 = arg7[154 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x156 = arg7[156 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x157 = arg7[158 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x158 = arg7[157 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x159 = arg7[4 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :27:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x160 = arg7[88 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( CycleArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :54:29) at callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :60:19) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x161 = arg7[94 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( CycleArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :54:29) at callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :60:19) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x162 = arg7[104 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :65:23) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x163 = arg7[81 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :11:20) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x164 = arg7[83 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :28:29) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :69:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x165 = arg7[84 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :69:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x166 = arg7[85 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :26:28) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x167 = arg7[86 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( CycleArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :54:29) at callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :60:19) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x168 = arg7[115 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :26:17) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x169 = arg0 + x28 * poly_mix[12]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x170 = x29 - x27; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg1[333] = x170; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x171 = x169 + x170 * poly_mix[13]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x172 = arg1[122]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x173 = x171 + x172 * poly_mix[14]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x174 = x173 + x26 * poly_mix[15]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x175 = x174 + x26 * poly_mix[16]; - // loc(callsite(unknown at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :73:23) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x176 = arg1[123]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x177 = x30 - x176; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x178 = x175 + x177 * poly_mix[17]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x179 = x31 - x32; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x180 = x178 + x179 * poly_mix[18]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x181 = x33 - x34; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg1[334] = x181; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x182 = x180 + x181 * poly_mix[19]; - // loc(callsite(unknown at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x183 = x35 - x36; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x184 = x37 - x25; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg1[213] = x184; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x185 = x182 + x184 * poly_mix[20]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x186 = x38 - x183; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x187 = x185 + x186 * poly_mix[21]; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:4) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :18:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x188 = arg1[124]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :15:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x189 = x187 + x188 * poly_mix[22]; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :19:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x190 = arg1[125]; - // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :16:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x191 = x189 + x190 * poly_mix[23]; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :20:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x192 = arg1[126]; - // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :17:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x193 = x191 + x192 * poly_mix[24]; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:23) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :18:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x194 = x24 - x39; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :21:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x195 = arg1[127]; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:18) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :18:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x196 = x195 * x194; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:35) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :18:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x197 = x23 - x39; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :18:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x198 = x196 * x197; - // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :18:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x199 = x193 + x198 * poly_mix[25]; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :22:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x200 = arg1[128]; - // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :19:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x201 = x199 + x200 * poly_mix[26]; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :23:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x202 = arg1[129]; - // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :20:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x203 = x201 + x202 * poly_mix[27]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :24:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x204 = arg1[130]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :21:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x205 = x203 + x204 * poly_mix[28]; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:23) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :22:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x206 = x24 - x40; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :25:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x207 = arg1[131]; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:18) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :22:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x208 = x207 * x206; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:35) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :22:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x209 = x23 - x40; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :22:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x210 = x208 * x209; - // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :22:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x211 = x205 + x210 * poly_mix[29]; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :26:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x212 = arg1[132]; - // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :23:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x213 = x211 + x212 * poly_mix[30]; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:4) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :27:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x214 = arg1[133]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :24:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x215 = x213 + x214 * poly_mix[31]; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:4) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x216 = arg1[134]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :25:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x217 = x215 + x216 * poly_mix[32]; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :29:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x218 = arg1[135]; - // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :26:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x219 = x217 + x218 * poly_mix[33]; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:11) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :27:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x220 = x25 - x41; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:4) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :27:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x221 = x41 * x220; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:23) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :27:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x222 = x24 - x41; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:18) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :27:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x223 = x221 * x222; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:35) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :27:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x224 = x23 - x41; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :27:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x225 = x223 * x224; - // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :27:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x226 = x219 + x225 * poly_mix[34]; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:11) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x227 = x25 - x42; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:11) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - arg1[306] = x227; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:4) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x228 = x42 * x227; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:4) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - arg1[305] = x228; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:23) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x229 = x24 - x42; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:18) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x230 = x228 * x229; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:35) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x231 = x23 - x42; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x232 = x230 * x231; - // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x233 = x226 + x232 * poly_mix[35]; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :63:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x234 = arg1[136]; - // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :29:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x235 = x233 + x234 * poly_mix[36]; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :37:16) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x236 = x43 * x22; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :38:16) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x237 = x44 * x21; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :37:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x238 = x236 + x237; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :39:16) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x239 = x45 * x20; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :38:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x240 = x238 + x239; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :40:16) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x241 = x39 * x19; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :39:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x242 = x240 + x241; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :41:16) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x243 = x46 * x18; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :40:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x244 = x242 + x243; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :42:16) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x245 = x47 * x17; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :41:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x246 = x244 + x245; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :43:16) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x247 = x48 * x16; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :42:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x248 = x246 + x247; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :60:20) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x249 = arg1[137]; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :43:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x250 = x248 + x249; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :44:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x251 = x250 + x49; - // loc(callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :37:14) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x252 = x34 - x251; - // loc(callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :37:14) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x253 = x235 + x252 * poly_mix[37]; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :46:15) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x254 = x50 * x22; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :47:15) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x255 = x51 * x15; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :46:24) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x256 = x254 + x255; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :48:15) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x257 = x52 * x14; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :47:24) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x258 = x256 + x257; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :49:15) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x259 = x41 * x13; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :48:24) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x260 = x258 + x259; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :50:15) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x261 = x42 * x12; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :49:24) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x262 = x260 + x261; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :51:15) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x263 = x53 * x18; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :50:24) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x264 = x262 + x263; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :51:24) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x265 = x264 + x54; - // loc(callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :46:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x266 = x32 - x265; - // loc(callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :46:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x267 = x253 + x266 * poly_mix[38]; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :55:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x268 = x40 * x11; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :55:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x269 = x49 * x24; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :55:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x270 = x268 + x269; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :55:42) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x271 = x270 + x50; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :57:17) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x272 = x41 * x11; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :57:30) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x273 = x42 * x24; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :57:30) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg1[532] = x273; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :57:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x274 = x272 + x273; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :57:39) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x275 = x274 + x53; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :58:23) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x276 = x44 * x16; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :58:38) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x277 = x45 * x10; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :58:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x278 = x276 + x277; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :58:47) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x279 = x278 + x39; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :59:20) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x280 = x43 * x9; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :59:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x281 = x280 + x279; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :60:20) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x282 = x51 * x10; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :60:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x283 = x282 + x52; - // loc(callsite(unknown at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :34:44) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x284 = arg1[23]; - // loc(callsite(unknown at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :34:79) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :11:25) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x285 = x284 + x271; - // loc(callsite( Reg ( :5:7) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :34:15) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :11:25) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x286 = x285 - x55; - // loc(callsite( Reg ( :5:7) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :34:15) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :11:25) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x287 = x267 + x286 * poly_mix[39]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :11:25) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x288 = x56 - x27; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :11:25) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x289 = x287 + x288 * poly_mix[40]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x290 = arg1[138]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :11:25) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x291 = x289 + x290 * poly_mix[41]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :11:25) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x292 = x291 + x26 * poly_mix[42]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :11:25) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x293 = x292 + x26 * poly_mix[43]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :11:25) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x294 = x57 - x55; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :11:25) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x295 = x293 + x294 * poly_mix[44]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :11:25) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x296 = x58 - x59; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :11:25) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg1[335] = x296; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :11:25) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x297 = x295 + x296 * poly_mix[45]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :11:25) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x298 = x60 - x61; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :11:25) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x299 = x297 + x298 * poly_mix[46]; - // loc(callsite(unknown at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :11:25) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x300 = x35 - x62; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :11:25) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x301 = x63 - x25; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :11:25) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg1[248] = x301; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :11:25) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x302 = x299 + x301 * poly_mix[47]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :11:25) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x303 = x64 - x300; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :11:25) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x304 = x302 + x303 * poly_mix[48]; - // loc(callsite(unknown at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :34:79) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x305 = arg1[139]; - // loc(callsite( Reg ( :5:7) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :34:15) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :12:25) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x306 = x305 - x65; - // loc(callsite( Reg ( :5:7) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :34:15) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :12:25) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x307 = x304 + x306 * poly_mix[49]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :12:25) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x308 = x66 - x27; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :12:25) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x309 = x307 + x308 * poly_mix[50]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x310 = arg1[140]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :12:25) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x311 = x309 + x310 * poly_mix[51]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :12:25) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x312 = x311 + x26 * poly_mix[52]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :12:25) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x313 = x312 + x26 * poly_mix[53]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :12:25) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x314 = x67 - x65; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :12:25) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x315 = x313 + x314 * poly_mix[54]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :12:25) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x316 = x68 - x69; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :12:25) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x317 = x315 + x316 * poly_mix[55]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :12:25) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x318 = x70 - x71; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :12:25) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x319 = x317 + x318 * poly_mix[56]; - // loc(callsite(unknown at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :12:25) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x320 = x35 - x72; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :12:25) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x321 = x73 - x25; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :12:25) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x322 = x319 + x321 * poly_mix[57]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :12:25) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x323 = x74 - x320; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :12:25) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x324 = x322 + x323 * poly_mix[58]; - // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :62:19) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :46:20) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x325 = x54 - x8; - // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :46:20) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x326 = x283 - x25; - // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :62:19) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :46:20) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x327 = arg2 + x325 * poly_mix[0]; - // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :46:20) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x328 = x327 + x326 * poly_mix[1]; - // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :46:20) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x329 = x328 + x281 * poly_mix[2]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x330 = arg1[3]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :44:21) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :47:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x331 = x329 + x330 * poly_mix[3]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x332 = arg1[4]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :44:21) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :47:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x333 = x331 + x332 * poly_mix[4]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x334 = arg1[29]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :44:21) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :47:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x335 = x333 + x334 * poly_mix[5]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x336 = arg1[30]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :44:21) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :47:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x337 = x335 + x336 * poly_mix[6]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x338 = arg1[31]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :44:21) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :47:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x339 = x337 + x338 * poly_mix[7]; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :45:27) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :47:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x340 = x75 * x24; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :45:27) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :47:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x341 = x76 * x10; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :45:27) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :47:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x342 = x77 * x11; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :45:27) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :47:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x343 = x78 * x16; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :45:27) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :47:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x344 = x79 + x340; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :45:27) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :47:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg1[486] = x344; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :45:27) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :47:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x345 = x344 + x341; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :45:27) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :47:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x346 = x345 + x342; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :45:27) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :47:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x347 = x346 + x343; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x348 = arg1[10]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :46:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :47:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x349 = x339 + x348 * poly_mix[8]; - // loc(callsite(unknown at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :47:4) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :47:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x350 = x80 * x17; - // loc(callsite(unknown at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :47:4) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :47:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - arg1[160] = x350; - // loc(callsite(unknown at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :47:16) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :47:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x351 = x350 + x347; - // loc(callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :47:30) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :47:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x352 = x351 - x69; - // loc(callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :47:30) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :47:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x353 = x349 + x352 * poly_mix[9]; - // loc(callsite(unknown at callsite( CondMul ( zirgen/circuit/rv32im/v2/dsl/po2.zir :39:11) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :48:17) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :47:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x354 = x79 * x24; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x355 = arg1[5]; - // loc(callsite(unknown at callsite( CondMul ( zirgen/circuit/rv32im/v2/dsl/po2.zir :39:16) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :48:17) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :47:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x356 = x354 + x355; - // loc(callsite(unknown at callsite( CondMul ( zirgen/circuit/rv32im/v2/dsl/po2.zir :39:4) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :49:17) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :47:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x357 = x75 * x356; - // loc(callsite(unknown at callsite( CondMul ( zirgen/circuit/rv32im/v2/dsl/po2.zir :39:11) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :49:17) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :47:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x358 = x357 * x10; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x359 = arg1[6]; - // loc(callsite(unknown at callsite( CondMul ( zirgen/circuit/rv32im/v2/dsl/po2.zir :39:31) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :49:17) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :47:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x360 = x359 * x356; - // loc(callsite(unknown at callsite( CondMul ( zirgen/circuit/rv32im/v2/dsl/po2.zir :39:16) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :49:17) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :47:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x361 = x358 + x360; - // loc(callsite(unknown at callsite( CondMul ( zirgen/circuit/rv32im/v2/dsl/po2.zir :39:4) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :50:21) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :47:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x362 = x76 * x361; - // loc(callsite(unknown at callsite( CondMul ( zirgen/circuit/rv32im/v2/dsl/po2.zir :39:11) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :50:21) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :47:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x363 = x362 * x16; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x364 = arg1[141]; - // loc(callsite(unknown at callsite( CondMul ( zirgen/circuit/rv32im/v2/dsl/po2.zir :39:31) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :50:21) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :47:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x365 = x364 * x361; - // loc(callsite(unknown at callsite( CondMul ( zirgen/circuit/rv32im/v2/dsl/po2.zir :39:16) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :50:21) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :47:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x366 = x363 + x365; - // loc(callsite( Reg ( :5:7) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :50:13) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :47:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x367 = x366 - x81; - // loc(callsite( Reg ( :5:7) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :50:13) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :47:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x368 = x353 + x367 * poly_mix[10]; - // loc(callsite(unknown at callsite( CondMul ( zirgen/circuit/rv32im/v2/dsl/po2.zir :39:4) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :51:17) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :47:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x369 = x77 * x81; - // loc(callsite(unknown at callsite( CondMul ( zirgen/circuit/rv32im/v2/dsl/po2.zir :39:11) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :51:17) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :47:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x370 = x369 * x12; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x371 = arg1[142]; - // loc(callsite(unknown at callsite( CondMul ( zirgen/circuit/rv32im/v2/dsl/po2.zir :39:31) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :51:17) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :47:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x372 = x371 * x81; - // loc(callsite(unknown at callsite( CondMul ( zirgen/circuit/rv32im/v2/dsl/po2.zir :39:16) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :51:17) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :47:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x373 = x370 + x372; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x374 = arg1[143]; - // loc(callsite(unknown at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :52:27) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :47:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x375 = x374 * x373; - // loc(callsite( Reg ( :5:7) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :52:14) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :47:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x376 = x375 - x82; - // loc(callsite( Reg ( :5:7) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :52:14) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :47:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x377 = x368 + x376 * poly_mix[11]; - // loc(callsite(unknown at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :53:22) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :47:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x378 = x78 * x373; - // loc(callsite( Reg ( :5:7) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :53:15) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :47:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x379 = x378 - x83; - // loc(callsite( Reg ( :5:7) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :53:15) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :47:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x380 = x377 + x379 * poly_mix[12]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :50:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x381 = x84 - x25; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :50:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg1[178] = x381; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :50:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x382 = x380 + x381 * poly_mix[13]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :51:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x383 = x85 - x25; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :51:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg1[179] = x383; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :51:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x384 = x382 + x383 * poly_mix[14]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x385 = arg1[144]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :52:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x386 = x384 + x385 * poly_mix[15]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :53:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x387 = x86 - x25; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :53:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg1[167] = x387; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :53:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x388 = x386 + x387 * poly_mix[16]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :59:31) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x389 = x87 - x25; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :59:31) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg1[168] = x389; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :59:31) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x390 = x388 + x389 * poly_mix[17]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x391 = arg1[35]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :60:26) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x392 = x390 + x391 * poly_mix[18]; - // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :62:17) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x393 = x88 * x12; - // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :62:12) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x394 = x89 + x393; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :62:10) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x395 = x59 - x394; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :62:10) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x396 = x392 + x395 * poly_mix[19]; - // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:18) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x397 = x90 * x18; - // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:13) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x398 = x91 + x397; - // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:40) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x399 = x92 * x22; - // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:40) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg1[187] = x399; - // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:33) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x400 = x398 + x399; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:11) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x401 = x61 - x400; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:11) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x402 = x396 + x401 * poly_mix[20]; - // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:9) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x403 = x90 * x7; - // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x404 = x92 * x18; - // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg1[188] = x404; - // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:24) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x405 = x403 + x404; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:7) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x406 = x93 - x405; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:7) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x407 = x402 + x406 * poly_mix[21]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :50:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x408 = x94 - x25; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :50:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg1[169] = x408; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :50:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x409 = x407 + x408 * poly_mix[22]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :51:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x410 = x95 - x25; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :51:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg1[170] = x410; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :51:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x411 = x409 + x410 * poly_mix[23]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :52:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x412 = x96 - x25; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :52:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg1[171] = x412; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :52:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x413 = x411 + x412 * poly_mix[24]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :53:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x414 = x97 - x25; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :53:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg1[172] = x414; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :53:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x415 = x413 + x414 * poly_mix[25]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x416 = arg1[145]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :59:31) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x417 = x415 + x416 * poly_mix[26]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x418 = arg1[36]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :60:26) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x419 = x417 + x418 * poly_mix[27]; - // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :62:17) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x420 = x98 * x12; - // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :62:12) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x421 = x99 + x420; - // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :62:12) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg1[199] = x421; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :62:10) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x422 = x82 - x421; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :62:10) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x423 = x419 + x422 * poly_mix[28]; - // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:18) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x424 = x100 * x18; - // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:13) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x425 = x101 + x424; - // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:40) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x426 = x102 * x22; - // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:40) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg1[189] = x426; - // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:33) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x427 = x425 + x426; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:11) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x428 = x83 - x427; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:11) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x429 = x423 + x428 * poly_mix[29]; - // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:9) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x430 = x100 * x7; - // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x431 = x102 * x18; - // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg1[190] = x431; - // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:24) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x432 = x430 + x431; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:7) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x433 = x103 - x432; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:7) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x434 = x429 + x433 * poly_mix[30]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x435 = arg1[37]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :118:25) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x436 = x434 + x435 * poly_mix[31]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x437 = arg1[13]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :119:31) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x438 = x436 + x437 * poly_mix[32]; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :120:13) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x439 = x104 * x22; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :120:13) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg1[191] = x439; - // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :120:30) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x440 = x105 * x7; - // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :120:30) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg1[181] = x440; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :120:21) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x441 = x439 + x440; - // loc(callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :120:11) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x442 = x26 - x441; - // loc(callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :120:11) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x443 = x438 + x442 * poly_mix[33]; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :124:11) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x444 = x89 * x99; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :125:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x445 = x89 * x98; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :125:36) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x446 = x88 * x99; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :125:28) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x447 = x445 + x446; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :125:8) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x448 = x447 * x12; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :124:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x449 = x444 + x448; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :126:34) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :134:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x450 = arg1[146]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :97:30) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x451 = x443 + x450 * poly_mix[34]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x452 = x106 - x25; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg1[173] = x452; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x453 = x451 + x452 * poly_mix[35]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x454 = arg1[38]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x455 = x453 + x454 * poly_mix[36]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x456 = arg1[39]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x457 = x455 + x456 * poly_mix[37]; - // loc(callsite(unknown at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :57:4) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x458 = x107 * x24; - // loc(callsite(unknown at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :57:11) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x459 = x458 + x108; - // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:8) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x460 = x459 * x6; - // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:8) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg1[193] = x460; - // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:33) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x461 = x109 * x5; - // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:21) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x462 = x460 + x461; - // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:45) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x463 = x462 + x110; - // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x464 = x449 - x463; - // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x465 = x457 + x464 * poly_mix[38]; - // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :101:20) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x466 = x459 * x12; - // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :101:20) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg1[194] = x466; - // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :101:33) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x467 = x466 + x109; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :131:11) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x468 = x89 * x101; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :130:11) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x469 = x467 + x468; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :131:27) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x470 = x88 * x98; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :131:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x471 = x469 + x470; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :131:43) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x472 = x91 * x99; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :131:35) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x473 = x471 + x472; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :132:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x474 = x89 * x103; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :132:36) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x475 = x88 * x101; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :132:28) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x476 = x474 + x475; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :132:52) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x477 = x91 * x98; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :132:44) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x478 = x476 + x477; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :132:68) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x479 = x93 * x99; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :132:60) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x480 = x478 + x479; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :132:8) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x481 = x480 * x12; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :131:51) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x482 = x473 + x481; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :126:34) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :135:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x483 = arg1[147]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :97:30) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x484 = x465 + x483 * poly_mix[39]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x485 = x111 - x25; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg1[174] = x485; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x486 = x484 + x485 * poly_mix[40]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x487 = arg1[41]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x488 = x486 + x487 * poly_mix[41]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x489 = arg1[42]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x490 = x488 + x489 * poly_mix[42]; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x491 = arg1[148]; - // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:8) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x492 = x491 * x6; - // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:8) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg1[195] = x492; - // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:33) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x493 = x112 * x5; - // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:21) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x494 = x492 + x493; - // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:45) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x495 = x494 + x113; - // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x496 = x482 - x495; - // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x497 = x490 + x496 * poly_mix[43]; - // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :101:20) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x498 = x491 * x12; - // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :101:20) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg1[196] = x498; - // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :101:33) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x499 = x498 + x112; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :138:42) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x500 = x499 + x4; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :140:11) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x501 = x88 * x103; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :139:82) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x502 = x500 + x501; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :140:27) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x503 = x91 * x101; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :140:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x504 = x502 + x503; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :140:43) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x505 = x93 * x98; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :140:35) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x506 = x504 + x505; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :141:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x507 = x91 * x103; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :141:36) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x508 = x93 * x101; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :141:28) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x509 = x507 + x508; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :141:8) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x510 = x509 * x12; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :140:51) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x511 = x506 + x510; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :126:34) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :136:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x512 = arg1[149]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :97:30) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x513 = x497 + x512 * poly_mix[44]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x514 = x114 - x25; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg1[175] = x514; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x515 = x513 + x514 * poly_mix[45]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x516 = arg1[43]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x517 = x515 + x516 * poly_mix[46]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x518 = arg1[44]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x519 = x517 + x518 * poly_mix[47]; - // loc(callsite(unknown at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :57:4) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x520 = x115 * x24; - // loc(callsite(unknown at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :57:11) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x521 = x520 + x116; - // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:8) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x522 = x521 * x6; - // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:8) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg1[197] = x522; - // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:33) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x523 = x117 * x5; - // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:21) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x524 = x522 + x523; - // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:45) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x525 = x524 + x118; - // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x526 = x511 - x525; - // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x527 = x519 + x526 * poly_mix[48]; - // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :101:20) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x528 = x521 * x12; - // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :101:20) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg1[198] = x528; - // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :101:33) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x529 = x528 + x117; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :147:42) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x530 = x529 + x3; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :149:11) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x531 = x93 * x103; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :149:11) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg1[177] = x531; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :148:82) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x532 = x530 + x531; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x533 = arg1[150]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :150:25) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x534 = x527 + x533 * poly_mix[49]; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:28) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x535 = x532 - x119; - // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:41) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x536 = x535 * x2; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x537 = arg1[45]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :67:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x538 = x534 + x537 * poly_mix[50]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x539 = arg1[46]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :67:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x540 = x538 + x539 * poly_mix[51]; - // loc(callsite(unknown at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :57:4) at callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :67:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x541 = x120 * x24; - // loc(callsite(unknown at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :57:11) at callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :67:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x542 = x541 + x121; - // loc(callsite(unknown at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :57:11) at callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :67:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - arg1[200] = x542; - // loc(callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :68:8) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x543 = x536 - x542; - // loc(callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :68:8) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x544 = x540 + x543 * poly_mix[52]; - // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x545 = x324 + x122 * x544 * poly_mix[59]; - // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :62:19) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :52:20) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x546 = x54 - x1; - // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :62:19) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :52:20) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x547 = arg2 + x546 * poly_mix[0]; - // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :52:20) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x548 = x547 + x326 * poly_mix[1]; - // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :52:20) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x549 = x548 + x281 * poly_mix[2]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :44:21) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :53:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x550 = x549 + x330 * poly_mix[3]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :44:21) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :53:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x551 = x550 + x332 * poly_mix[4]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :44:21) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :53:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x552 = x551 + x334 * poly_mix[5]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :44:21) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :53:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x553 = x552 + x336 * poly_mix[6]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :44:21) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :53:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x554 = x553 + x338 * poly_mix[7]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :46:29) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :53:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x555 = x554 + x348 * poly_mix[8]; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :55:42) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x556 = arg1[151]; - // loc(callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :47:30) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :53:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x557 = x351 - x556; - // loc(callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :47:30) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :53:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x558 = x555 + x557 * poly_mix[9]; - // loc(callsite( Reg ( :5:7) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :50:13) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :53:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x559 = x558 + x367 * poly_mix[10]; - // loc(callsite( Reg ( :5:7) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :52:14) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :53:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x560 = x559 + x376 * poly_mix[11]; - // loc(callsite( Reg ( :5:7) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :53:15) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :53:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x561 = x560 + x379 * poly_mix[12]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :50:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :54:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x562 = x561 + x381 * poly_mix[13]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :51:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :54:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x563 = x562 + x383 * poly_mix[14]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :52:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :54:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x564 = x563 + x385 * poly_mix[15]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :53:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :54:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x565 = x564 + x387 * poly_mix[16]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :59:31) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :54:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x566 = x565 + x389 * poly_mix[17]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :60:26) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :54:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x567 = x566 + x391 * poly_mix[18]; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :62:10) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :54:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x568 = x567 + x395 * poly_mix[19]; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:11) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :54:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x569 = x568 + x401 * poly_mix[20]; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:7) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :54:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x570 = x569 + x406 * poly_mix[21]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :50:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :54:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x571 = x570 + x408 * poly_mix[22]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :51:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :54:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x572 = x571 + x410 * poly_mix[23]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :52:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :54:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x573 = x572 + x412 * poly_mix[24]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :53:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :54:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x574 = x573 + x414 * poly_mix[25]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :59:31) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :54:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x575 = x574 + x416 * poly_mix[26]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :60:26) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :54:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x576 = x575 + x418 * poly_mix[27]; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :62:10) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :54:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x577 = x576 + x422 * poly_mix[28]; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:11) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :54:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x578 = x577 + x428 * poly_mix[29]; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:7) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :54:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x579 = x578 + x433 * poly_mix[30]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :118:25) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :54:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x580 = x579 + x435 * poly_mix[31]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :119:31) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :54:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x581 = x580 + x437 * poly_mix[32]; - // loc(callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :120:11) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :54:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x582 = x581 + x442 * poly_mix[33]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :97:30) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :54:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x583 = x582 + x450 * poly_mix[34]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :54:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x584 = x583 + x452 * poly_mix[35]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :54:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x585 = x584 + x454 * poly_mix[36]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :54:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x586 = x585 + x456 * poly_mix[37]; - // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :54:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x587 = x586 + x464 * poly_mix[38]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :97:30) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :54:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x588 = x587 + x483 * poly_mix[39]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :54:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x589 = x588 + x485 * poly_mix[40]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :54:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x590 = x589 + x487 * poly_mix[41]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :54:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x591 = x590 + x489 * poly_mix[42]; - // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :54:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x592 = x591 + x496 * poly_mix[43]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :97:30) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :54:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x593 = x592 + x512 * poly_mix[44]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :54:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x594 = x593 + x514 * poly_mix[45]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :54:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x595 = x594 + x516 * poly_mix[46]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :54:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x596 = x595 + x518 * poly_mix[47]; - // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :54:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x597 = x596 + x526 * poly_mix[48]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :150:25) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :54:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x598 = x597 + x533 * poly_mix[49]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :67:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :54:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x599 = x598 + x537 * poly_mix[50]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :67:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :54:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x600 = x599 + x539 * poly_mix[51]; - // loc(callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :68:8) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :54:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x601 = x600 + x543 * poly_mix[52]; - // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x602 = x545 + x123 * x601 * poly_mix[112]; - // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :58:20) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x603 = x281 - x25; - // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :58:20) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x604 = x327 + x283 * poly_mix[1]; - // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :58:20) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x605 = x604 + x603 * poly_mix[2]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :50:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x606 = x605 + x381 * poly_mix[3]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :51:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x607 = x606 + x383 * poly_mix[4]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :52:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x608 = x607 + x385 * poly_mix[5]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :53:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x609 = x608 + x387 * poly_mix[6]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :59:31) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x610 = x609 + x389 * poly_mix[7]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :60:26) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x611 = x610 + x330 * poly_mix[8]; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :62:10) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x612 = x611 + x395 * poly_mix[9]; - // loc(callsite(unknown at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :127:13) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :135:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x613 = arg1[152]; - // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:33) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x614 = x398 + x613; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:11) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x615 = x61 - x614; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:11) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x616 = x612 + x615 * poly_mix[10]; - // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x617 = x79 * x18; - // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:24) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x618 = x403 + x617; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:7) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x619 = x93 - x618; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:7) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x620 = x616 + x619 * poly_mix[11]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :50:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x621 = x620 + x408 * poly_mix[12]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :51:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x622 = x621 + x410 * poly_mix[13]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :52:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x623 = x622 + x412 * poly_mix[14]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :53:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x624 = x623 + x414 * poly_mix[15]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :59:31) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x625 = x624 + x416 * poly_mix[16]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :60:26) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x626 = x625 + x332 * poly_mix[17]; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :62:10) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x627 = x69 - x421; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :62:10) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x628 = x626 + x627 * poly_mix[18]; - // loc(callsite(unknown at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :127:13) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :136:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x629 = arg1[153]; - // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:33) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x630 = x425 + x629; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:11) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x631 = x71 - x630; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:11) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x632 = x628 + x631 * poly_mix[19]; - // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x633 = x75 * x18; - // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:24) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x634 = x430 + x633; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:7) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x635 = x103 - x634; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:7) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x636 = x632 + x635 * poly_mix[20]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :118:25) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x637 = x636 + x334 * poly_mix[21]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :119:31) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x638 = x637 + x348 * poly_mix[22]; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :120:13) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x639 = x76 * x22; - // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :120:30) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x640 = x80 * x7; - // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :120:30) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg1[217] = x640; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :120:21) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x641 = x639 + x640; - // loc(callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :120:11) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x642 = x26 - x641; - // loc(callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :120:11) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x643 = x638 + x642 * poly_mix[23]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :97:30) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x644 = x643 + x437 * poly_mix[24]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x645 = x644 + x452 * poly_mix[25]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x646 = x645 + x336 * poly_mix[26]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x647 = x646 + x338 * poly_mix[27]; - // loc(callsite(unknown at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :57:4) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x648 = x78 * x24; - // loc(callsite(unknown at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :57:11) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x649 = x648 + x77; - // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:8) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x650 = x649 * x6; - // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:21) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x651 = x650 + x461; - // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:45) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x652 = x651 + x105; - // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x653 = x449 - x652; - // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x654 = x647 + x653 * poly_mix[28]; - // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :101:20) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x655 = x649 * x12; - // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :101:33) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x656 = x655 + x109; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :130:11) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x657 = x656 + x468; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :131:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x658 = x657 + x470; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :131:35) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x659 = x658 + x472; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :131:51) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x660 = x659 + x481; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :97:30) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x661 = x654 + x450 * poly_mix[29]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x662 = x661 + x485 * poly_mix[30]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x663 = arg1[32]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x664 = x662 + x663 * poly_mix[31]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x665 = arg1[33]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x666 = x664 + x665 * poly_mix[32]; - // loc(callsite(unknown at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :57:4) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x667 = x82 * x24; - // loc(callsite(unknown at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :57:4) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - arg1[161] = x667; - // loc(callsite(unknown at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :57:11) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x668 = x667 + x81; - // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:8) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x669 = x668 * x6; - // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:21) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x670 = x669 + x493; - // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:45) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x671 = x670 + x110; - // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x672 = x660 - x671; - // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x673 = x666 + x672 * poly_mix[33]; - // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :101:20) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x674 = x668 * x12; - // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :101:33) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x675 = x674 + x112; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :138:42) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x676 = x675 + x4; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :139:82) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x677 = x676 + x501; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :140:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x678 = x677 + x503; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :140:35) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x679 = x678 + x505; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :140:51) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x680 = x679 + x510; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :97:30) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x681 = x673 + x483 * poly_mix[34]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x682 = x681 + x514 * poly_mix[35]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x683 = arg1[34]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x684 = x682 + x683 * poly_mix[36]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x685 = x684 + x391 * poly_mix[37]; - // loc(callsite(unknown at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :57:4) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x686 = x92 * x24; - // loc(callsite(unknown at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :57:11) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x687 = x686 + x83; - // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:8) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x688 = x687 * x6; - // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:21) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x689 = x688 + x523; - // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:45) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x690 = x689 + x113; - // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x691 = x680 - x690; - // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x692 = x685 + x691 * poly_mix[38]; - // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :101:20) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x693 = x687 * x12; - // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :101:33) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x694 = x693 + x117; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :147:42) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x695 = x694 + x3; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :148:82) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x696 = x695 + x531; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :150:25) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x697 = x692 + x512 * poly_mix[39]; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:28) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x698 = x696 - x118; - // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:41) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x699 = x698 * x2; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :67:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x700 = x697 + x418 * poly_mix[40]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :67:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x701 = x700 + x435 * poly_mix[41]; - // loc(callsite(unknown at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :57:4) at callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :67:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x702 = x104 * x24; - // loc(callsite(unknown at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :57:11) at callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :67:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x703 = x702 + x102; - // loc(callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :68:8) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x704 = x699 - x703; - // loc(callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :68:8) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x705 = x701 + x704 * poly_mix[42]; - // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x706 = x705 + x124 * poly_mix[43]; - // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x707 = x602 + x125 * x706 * poly_mix[165]; - // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :63:20) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x708 = x328 + x603 * poly_mix[2]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :50:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x709 = x708 + x381 * poly_mix[3]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :51:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x710 = x709 + x383 * poly_mix[4]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :52:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x711 = x710 + x385 * poly_mix[5]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :53:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x712 = x711 + x387 * poly_mix[6]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :59:31) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x713 = x712 + x389 * poly_mix[7]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :60:26) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x714 = x713 + x330 * poly_mix[8]; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :62:10) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x715 = x714 + x395 * poly_mix[9]; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:11) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x716 = x715 + x615 * poly_mix[10]; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:7) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x717 = x716 + x619 * poly_mix[11]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :50:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x718 = x717 + x408 * poly_mix[12]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :51:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x719 = x718 + x410 * poly_mix[13]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :52:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x720 = x719 + x412 * poly_mix[14]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :53:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x721 = x720 + x414 * poly_mix[15]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :59:31) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x722 = x721 + x416 * poly_mix[16]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :60:26) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x723 = x722 + x332 * poly_mix[17]; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :62:10) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x724 = x723 + x627 * poly_mix[18]; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:11) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x725 = x724 + x631 * poly_mix[19]; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:7) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x726 = x725 + x635 * poly_mix[20]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :118:25) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x727 = x726 + x334 * poly_mix[21]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :119:31) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x728 = x727 + x348 * poly_mix[22]; - // loc(callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :120:11) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x729 = x728 + x642 * poly_mix[23]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :97:30) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x730 = x729 + x437 * poly_mix[24]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x731 = x730 + x452 * poly_mix[25]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x732 = x731 + x336 * poly_mix[26]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x733 = x732 + x338 * poly_mix[27]; - // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x734 = x733 + x653 * poly_mix[28]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :97:30) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x735 = x734 + x450 * poly_mix[29]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x736 = x735 + x485 * poly_mix[30]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x737 = x736 + x663 * poly_mix[31]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x738 = x737 + x665 * poly_mix[32]; - // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x739 = x738 + x672 * poly_mix[33]; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :139:40) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x740 = x394 * x75; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :139:8) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x741 = x676 - x740; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :139:75) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x742 = x421 * x79; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :139:47) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x743 = x741 - x742; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :139:82) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x744 = x743 + x501; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :140:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x745 = x744 + x503; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :140:35) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x746 = x745 + x505; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :140:51) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x747 = x746 + x510; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :97:30) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x748 = x739 + x483 * poly_mix[34]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x749 = x748 + x514 * poly_mix[35]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x750 = x749 + x683 * poly_mix[36]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x751 = x750 + x391 * poly_mix[37]; - // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x752 = x747 - x690; - // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x753 = x751 + x752 * poly_mix[38]; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :148:30) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x754 = x93 * x12; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :148:30) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg1[206] = x754; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :148:22) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x755 = x91 + x754; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :148:40) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x756 = x755 * x75; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :148:8) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x757 = x695 - x756; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :148:65) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x758 = x103 * x12; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :148:57) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x759 = x101 + x758; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :148:75) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x760 = x759 * x79; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :148:47) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x761 = x757 - x760; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :148:82) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x762 = x761 + x531; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :150:25) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x763 = x753 + x512 * poly_mix[39]; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:28) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x764 = x762 - x118; - // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:41) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x765 = x764 * x2; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :67:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x766 = x763 + x418 * poly_mix[40]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :67:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x767 = x766 + x435 * poly_mix[41]; - // loc(callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :68:8) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x768 = x765 - x703; - // loc(callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :68:8) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x769 = x767 + x768 * poly_mix[42]; - // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x770 = x769 + x124 * poly_mix[43]; - // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x771 = x707 + x126 * x770 * poly_mix[186]; - // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :68:20) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x772 = x283 - x24; - // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :68:20) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x773 = x327 + x772 * poly_mix[1]; - // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :68:20) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x774 = x773 + x603 * poly_mix[2]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :50:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x775 = x774 + x381 * poly_mix[3]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :51:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x776 = x775 + x383 * poly_mix[4]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :52:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x777 = x776 + x385 * poly_mix[5]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :53:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x778 = x777 + x387 * poly_mix[6]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :59:31) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x779 = x778 + x389 * poly_mix[7]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :60:26) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x780 = x779 + x330 * poly_mix[8]; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :62:10) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x781 = x780 + x395 * poly_mix[9]; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:11) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x782 = x781 + x615 * poly_mix[10]; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:7) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x783 = x782 + x619 * poly_mix[11]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :50:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x784 = x783 + x408 * poly_mix[12]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :51:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x785 = x784 + x410 * poly_mix[13]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :52:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x786 = x785 + x412 * poly_mix[14]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :53:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x787 = x786 + x414 * poly_mix[15]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :59:31) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x788 = x787 + x416 * poly_mix[16]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :60:26) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x789 = x788 + x332 * poly_mix[17]; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :62:10) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x790 = x789 + x627 * poly_mix[18]; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:11) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x791 = x790 + x631 * poly_mix[19]; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:7) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x792 = x791 + x635 * poly_mix[20]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :118:25) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x793 = x792 + x334 * poly_mix[21]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :119:31) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x794 = x793 + x348 * poly_mix[22]; - // loc(callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :120:11) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x795 = x794 + x642 * poly_mix[23]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :97:30) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x796 = x795 + x437 * poly_mix[24]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x797 = x796 + x452 * poly_mix[25]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x798 = x797 + x336 * poly_mix[26]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x799 = x798 + x338 * poly_mix[27]; - // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x800 = x799 + x653 * poly_mix[28]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :97:30) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x801 = x800 + x450 * poly_mix[29]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x802 = x801 + x485 * poly_mix[30]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x803 = x802 + x663 * poly_mix[31]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x804 = x803 + x665 * poly_mix[32]; - // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x805 = x804 + x672 * poly_mix[33]; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :139:47) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x806 = x676 - x742; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :139:82) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x807 = x806 + x501; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :140:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x808 = x807 + x503; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :140:35) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x809 = x808 + x505; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :140:51) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x810 = x809 + x510; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :97:30) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x811 = x805 + x483 * poly_mix[34]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x812 = x811 + x514 * poly_mix[35]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x813 = x812 + x683 * poly_mix[36]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x814 = x813 + x391 * poly_mix[37]; - // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x815 = x810 - x690; - // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x816 = x814 + x815 * poly_mix[38]; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :148:47) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x817 = x695 - x760; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :148:82) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x818 = x817 + x531; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :150:25) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x819 = x816 + x512 * poly_mix[39]; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:28) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x820 = x818 - x118; - // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:41) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x821 = x820 * x2; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :67:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x822 = x819 + x418 * poly_mix[40]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :67:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x823 = x822 + x435 * poly_mix[41]; - // loc(callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :68:8) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x824 = x821 - x703; - // loc(callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :68:8) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x825 = x823 + x824 * poly_mix[42]; - // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x826 = x825 + x124 * poly_mix[43]; - // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x827 = x771 + x127 * x826 * poly_mix[228]; - // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at callsite( OpMULHU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :73:20) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :29:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x828 = x283 - x23; - // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at callsite( OpMULHU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :73:20) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :29:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x829 = x327 + x828 * poly_mix[1]; - // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at callsite( OpMULHU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :73:20) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :29:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x830 = x829 + x603 * poly_mix[2]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :50:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :74:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :29:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x831 = x830 + x381 * poly_mix[3]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :51:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :74:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :29:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x832 = x831 + x383 * poly_mix[4]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :52:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :74:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :29:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x833 = x832 + x385 * poly_mix[5]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :53:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :74:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :29:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x834 = x833 + x387 * poly_mix[6]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :59:31) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :74:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :29:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x835 = x834 + x389 * poly_mix[7]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :60:26) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :74:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :29:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x836 = x835 + x330 * poly_mix[8]; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :62:10) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :74:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :29:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x837 = x836 + x395 * poly_mix[9]; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:11) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :74:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :29:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x838 = x837 + x615 * poly_mix[10]; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:7) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :74:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :29:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x839 = x838 + x619 * poly_mix[11]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :50:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :74:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :29:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x840 = x839 + x408 * poly_mix[12]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :51:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :74:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :29:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x841 = x840 + x410 * poly_mix[13]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :52:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :74:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :29:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x842 = x841 + x412 * poly_mix[14]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :53:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :74:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :29:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x843 = x842 + x414 * poly_mix[15]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :59:31) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :74:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :29:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x844 = x843 + x416 * poly_mix[16]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :60:26) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :74:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :29:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x845 = x844 + x332 * poly_mix[17]; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :62:10) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :74:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :29:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x846 = x845 + x627 * poly_mix[18]; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:11) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :74:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :29:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x847 = x846 + x631 * poly_mix[19]; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:7) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :74:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :29:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x848 = x847 + x635 * poly_mix[20]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :118:25) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :74:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :29:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x849 = x848 + x334 * poly_mix[21]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :119:31) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :74:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :29:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x850 = x849 + x348 * poly_mix[22]; - // loc(callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :120:11) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :74:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :29:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x851 = x850 + x642 * poly_mix[23]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :97:30) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :74:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :29:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x852 = x851 + x437 * poly_mix[24]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :74:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :29:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x853 = x852 + x452 * poly_mix[25]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :74:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :29:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x854 = x853 + x336 * poly_mix[26]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :74:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :29:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x855 = x854 + x338 * poly_mix[27]; - // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :74:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :29:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x856 = x855 + x653 * poly_mix[28]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :97:30) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :74:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :29:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x857 = x856 + x450 * poly_mix[29]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :74:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :29:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x858 = x857 + x485 * poly_mix[30]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :74:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :29:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x859 = x858 + x663 * poly_mix[31]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :74:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :29:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x860 = x859 + x665 * poly_mix[32]; - // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :74:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :29:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x861 = x860 + x672 * poly_mix[33]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :97:30) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :74:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :29:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x862 = x861 + x483 * poly_mix[34]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :74:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :29:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x863 = x862 + x514 * poly_mix[35]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :74:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :29:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x864 = x863 + x683 * poly_mix[36]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :74:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :29:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x865 = x864 + x391 * poly_mix[37]; - // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :74:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :29:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x866 = x865 + x691 * poly_mix[38]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :150:25) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :74:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :29:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x867 = x866 + x512 * poly_mix[39]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :67:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :74:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :29:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x868 = x867 + x418 * poly_mix[40]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :67:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :74:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :29:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x869 = x868 + x435 * poly_mix[41]; - // loc(callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :68:8) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :74:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :29:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x870 = x869 + x704 * poly_mix[42]; - // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x871 = x870 + x124 * poly_mix[43]; - // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x872 = x827 + x128 * x871 * poly_mix[255]; - // loc(callsite( IllegalMulOp ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :17:6) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :30:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x873 = arg2 + x27 * poly_mix[0]; - // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x874 = x873 + x129 * poly_mix[1]; - // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x875 = x874 + x130 * poly_mix[2]; - // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x876 = x875 + x131 * poly_mix[3]; - // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x877 = x876 + x132 * poly_mix[4]; - // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x878 = x877 + x133 * poly_mix[5]; - // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x879 = x878 + x124 * poly_mix[6]; - // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x880 = x879 + x84 * poly_mix[7]; - // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x881 = x880 + x85 * poly_mix[8]; - // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x882 = x881 + x134 * poly_mix[9]; - // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x883 = x882 + x86 * poly_mix[10]; - // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x884 = x883 + x87 * poly_mix[11]; - // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x885 = x884 + x94 * poly_mix[12]; - // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x886 = x885 + x95 * poly_mix[13]; - // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x887 = x886 + x96 * poly_mix[14]; - // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x888 = x887 + x97 * poly_mix[15]; - // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x889 = x888 + x135 * poly_mix[16]; - // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x890 = x889 + x106 * poly_mix[17]; - // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x891 = x890 + x111 * poly_mix[18]; - // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x892 = x891 + x114 * poly_mix[19]; - // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x893 = x872 + x136 * x892 * poly_mix[276]; - // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x894 = x893 + x137 * x892 * poly_mix[296]; - // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x895 = x138 * x122; - // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x896 = x138 * x123; - // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x897 = x139 * x125; - // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x898 = x140 * x126; - // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x899 = x140 * x127; - // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x900 = x140 * x128; - // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x901 = x895 + x896; - // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x902 = x901 + x897; - // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x903 = x902 + x898; - // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x904 = x903 + x899; - // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x905 = x904 + x900; - // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x906 = x140 * x122; - // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x907 = x140 * x123; - // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x908 = x138 * x125; - // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x909 = x141 * x126; - // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x910 = x141 * x127; - // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x911 = x141 * x128; - // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x912 = x906 + x907; - // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x913 = x912 + x908; - // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x914 = x913 + x909; - // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x915 = x914 + x910; - // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x916 = x915 + x911; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x917 = arg1[47]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x918 = x894 + x917 * poly_mix[316]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:4) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x919 = x275 * x142; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x920 = arg1[154]; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x921 = x919 - x920; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x922 = x918 + x921 * poly_mix[317]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:4) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x923 = x143 * x275; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:17) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x924 = x922 + x923 * poly_mix[318]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:4) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x925 = x143 * x142; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:17) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x926 = x924 + x925 * poly_mix[319]; - // loc(callsite(unknown at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :41:11) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x927 = x920 * x275; - // loc(callsite(unknown at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :42:90) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x928 = x25 - x920; - // loc(callsite(unknown at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :42:102) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x929 = x928 * x9; - // loc(callsite(unknown at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :42:85) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x930 = x284 + x929; - // loc(callsite(unknown at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :42:106) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x931 = x930 + x927; - // loc(callsite( Reg ( :5:7) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :42:21) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x932 = x931 - x144; - // loc(callsite( Reg ( :5:7) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :42:21) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x933 = x926 + x932 * poly_mix[320]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x934 = x145 - x27; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x935 = x933 + x934 * poly_mix[321]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x936 = x146 - x25; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - arg1[446] = x936; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x937 = x935 + x936 * poly_mix[322]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x938 = x937 + x26 * poly_mix[323]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x939 = x938 + x26 * poly_mix[324]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x940 = x147 - x144; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x941 = x939 + x940 * poly_mix[325]; - // loc(callsite(unknown at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:22) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x942 = x35 - x148; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x943 = x149 - x25; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x944 = x941 + x943 * poly_mix[326]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x945 = x150 - x942; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x946 = x944 + x945 * poly_mix[327]; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x947 = x151 - x905; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x948 = x946 + x947 * poly_mix[328]; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x949 = x152 - x916; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x950 = x948 + x949 * poly_mix[329]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :34:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x951 = x153 - x25; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :34:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x952 = x950 + x951 * poly_mix[330]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x953 = arg1[63]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :45:28) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :34:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x954 = x952 + x953 * poly_mix[331]; - // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:12) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :34:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x955 = x154 * x5; - // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :34:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x956 = x955 + x155; - // loc(callsite(unknown at callsite( AddU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :27:21) at callsite( SimpleOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :74:20) at callsite( OpADD ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :87:12) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :31:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x957 = arg1[100]; - // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:10) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :34:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x958 = x957 - x956; - // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:10) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :34:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x959 = x954 + x958 * poly_mix[332]; - // loc(callsite(unknown at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :53:34) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x960 = arg1[102]; - // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :48:14) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :34:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x961 = x960 + x154; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :34:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x962 = x156 - x25; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :34:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - arg1[451] = x962; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :34:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x963 = x959 + x962 * poly_mix[333]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x964 = arg1[66]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :51:29) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :34:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x965 = x963 + x964 * poly_mix[334]; - // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:11) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :34:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x966 = x157 * x5; - // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :34:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x967 = x966 + x158; - // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :34:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x968 = x961 - x967; - // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :34:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x969 = x965 + x968 * poly_mix[335]; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - FpExt x970 = arg3 + x159 * x969 * poly_mix[382]; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:11) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :63:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x971 = x25 - x160; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:11) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :63:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - arg1[212] = x971; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:4) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :63:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x972 = x160 * x971; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:4) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :63:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - arg1[211] = x972; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:23) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :63:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x973 = x24 - x160; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:18) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :63:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x974 = x972 * x973; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:35) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :63:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x975 = x23 - x160; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :63:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x976 = x974 * x975; - // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :63:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x977 = arg4 + x976 * poly_mix[2]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :65:23) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x978 = x30 - x25; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :65:23) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x979 = x977 + x978 * poly_mix[3]; - // loc(callsite(unknown at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :65:53) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x980 = arg1[120]; - // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :65:23) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x981 = x29 - x980; - // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :65:23) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x982 = x979 + x981 * poly_mix[4]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x983 = x25 - x36; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x984 = x36 * x983; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x985 = x982 + x984 * poly_mix[5]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:4) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x986 = x960 * x31; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x987 = x986 - x983; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x988 = x985 + x987 * poly_mix[6]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:4) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x989 = x36 * x960; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:17) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x990 = x988 + x989 * poly_mix[7]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:4) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x991 = x36 * x31; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:17) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x992 = x990 + x991 * poly_mix[8]; - // loc(callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:19) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x993 = x992 + x36 * poly_mix[9]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :69:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x994 = x33 - x25; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :69:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg1[242] = x994; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :69:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x995 = x993 + x994 * poly_mix[10]; - // loc(callsite(unknown at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :71:4) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x996 = x161 * x10; - // loc(callsite(unknown at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :71:12) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x997 = x996 + x160; - // loc(callsite(unknown at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :52:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x998 = arg1[99]; - // loc(callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :71:21) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x999 = x997 - x998; - // loc(callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :71:21) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1000 = x995 + x999 * poly_mix[11]; - // loc(callsite(unknown at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :73:12) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1001 = arg1[121]; - // loc(callsite(unknown at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :73:23) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1002 = x1001 + x161; - // loc(callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :26:17) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x1003 = x1000 + x160 * poly_mix[12]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1004 = x34 - x27; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1005 = x1003 + x1004 * poly_mix[13]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1006 = x56 - x25; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg1[214] = x1006; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1007 = x1005 + x1006 * poly_mix[14]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1008 = x1007 + x26 * poly_mix[15]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1009 = x1008 + x26 * poly_mix[16]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1010 = x32 - x1002; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1011 = x1009 + x1010 * poly_mix[17]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1012 = x38 - x62; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1013 = x1011 + x1012 * poly_mix[18]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1014 = arg1[155]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1015 = x1013 + x1014 * poly_mix[19]; - // loc(callsite(unknown at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1016 = x35 - x37; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1017 = x60 - x25; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg1[230] = x1017; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1018 = x1015 + x1017 * poly_mix[20]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1019 = x162 - x1016; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1020 = x1018 + x1019 * poly_mix[21]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :15:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1021 = x1020 + x204 * poly_mix[22]; - // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :16:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1022 = x1021 + x210 * poly_mix[23]; - // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :17:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1023 = x1022 + x212 * poly_mix[24]; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :27:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1024 = arg1[156]; - // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :18:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1025 = x1023 + x1024 * poly_mix[25]; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1026 = arg1[157]; - // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :19:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1027 = x1025 + x1026 * poly_mix[26]; - // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :20:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1028 = x1027 + x218 * poly_mix[27]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :21:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1029 = x1028 + x221 * poly_mix[28]; - // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :22:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1030 = x1029 + x232 * poly_mix[29]; - // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :23:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1031 = x1030 + x234 * poly_mix[30]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :24:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1032 = x25 - x54; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :24:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1033 = x54 * x1032; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :24:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - arg1[207] = x1033; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :24:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1034 = x1031 + x1033 * poly_mix[31]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :25:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1035 = x25 - x163; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :25:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1036 = x163 * x1035; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :25:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1037 = x1034 + x1036 * poly_mix[32]; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :63:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1038 = arg1[158]; - // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :26:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1039 = x1037 + x1038 * poly_mix[33]; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:11) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :27:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1040 = x25 - x164; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:4) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :27:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1041 = x164 * x1040; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:4) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :27:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - arg1[208] = x1041; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:23) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :27:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1042 = x24 - x164; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:18) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :27:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1043 = x1041 * x1042; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:35) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :27:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1044 = x23 - x164; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :27:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1045 = x1043 * x1044; - // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :27:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1046 = x1039 + x1045 * poly_mix[34]; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:11) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1047 = x25 - x165; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:11) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - arg1[216] = x1047; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:4) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1048 = x165 * x1047; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:4) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - arg1[209] = x1048; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:23) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1049 = x24 - x165; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:18) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1050 = x1048 * x1049; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:35) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1051 = x23 - x165; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1052 = x1050 * x1051; - // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1053 = x1046 + x1052 * poly_mix[35]; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:23) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :29:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1054 = x24 - x166; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1055 = arg1[159]; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:18) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :29:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1056 = x1055 * x1054; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:35) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :29:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1057 = x23 - x166; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :29:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1058 = x1056 * x1057; - // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :29:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1059 = x1053 + x1058 * poly_mix[36]; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :38:16) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1060 = x40 * x21; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :46:15) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1061 = arg1[109]; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :37:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1062 = x1061 + x1060; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :39:16) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1063 = x49 * x20; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :38:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1064 = x1062 + x1063; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :40:16) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1065 = x50 * x19; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :39:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1066 = x1064 + x1065; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :41:16) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1067 = x51 * x18; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :40:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1068 = x1066 + x1067; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :42:16) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1069 = x52 * x17; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :41:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1070 = x1068 + x1069; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :43:16) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1071 = x41 * x16; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :42:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1072 = x1070 + x1071; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :44:16) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1073 = x42 * x10; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :43:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1074 = x1072 + x1073; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :44:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1075 = x1074 + x53; - // loc(callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :37:14) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1076 = x58 - x1075; - // loc(callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :37:14) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1077 = x1059 + x1076 * poly_mix[37]; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :46:15) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1078 = x54 * x22; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :47:15) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1079 = x163 * x15; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :47:15) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg1[331] = x1079; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :46:24) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1080 = x1078 + x1079; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :48:15) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1081 = x28 * x14; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :47:24) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1082 = x1080 + x1081; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :49:15) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1083 = x164 * x13; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :48:24) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1084 = x1082 + x1083; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :50:15) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1085 = x165 * x12; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :49:24) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1086 = x1084 + x1085; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :51:15) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1087 = x166 * x18; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :50:24) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1088 = x1086 + x1087; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :51:24) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1089 = x1088 + x167; - // loc(callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :46:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1090 = x62 - x1089; - // loc(callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :46:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1091 = x1077 + x1090 * poly_mix[38]; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :55:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1092 = x42 * x11; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :55:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1093 = x53 * x24; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :55:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1094 = x1092 + x1093; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :55:42) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1095 = x1094 + x54; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :56:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1096 = x51 * x11; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :56:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1097 = x52 * x24; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :56:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1098 = x1096 + x1097; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :56:42) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1099 = x1098 + x41; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :56:42) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg1[185] = x1099; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :57:17) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1100 = x164 * x11; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :57:30) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1101 = x165 * x24; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :57:30) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg1[310] = x1101; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :57:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1102 = x1100 + x1101; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :57:39) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1103 = x1102 + x166; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :57:39) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg1[201] = x1103; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :58:23) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1104 = x40 * x16; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :58:38) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1105 = x49 * x10; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :58:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1106 = x1104 + x1105; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :58:47) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1107 = x1106 + x50; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :59:20) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1108 = x48 * x9; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :59:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1109 = x1108 + x1107; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :59:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg1[180] = x1109; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :60:20) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1110 = x163 * x10; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :60:20) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg1[307] = x1110; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :60:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1111 = x1110 + x28; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :60:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg1[186] = x1111; - // loc(callsite(unknown at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :34:79) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :11:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1112 = x284 + x1095; - // loc(callsite( Reg ( :5:7) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :34:15) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :11:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1113 = x1112 - x168; - // loc(callsite( Reg ( :5:7) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :34:15) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :11:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1114 = x1091 + x1113 * poly_mix[39]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :11:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1115 = x61 - x27; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :11:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg1[231] = x1115; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :11:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1116 = x1114 + x1115 * poly_mix[40]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :11:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1117 = x67 - x25; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :11:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg1[232] = x1117; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :11:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1118 = x1116 + x1117 * poly_mix[41]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :11:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1119 = x1118 + x26 * poly_mix[42]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :11:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1120 = x1119 + x26 * poly_mix[43]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :11:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1121 = x59 - x168; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :11:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1122 = x1120 + x1121 * poly_mix[44]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :11:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1123 = x64 - x66; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :11:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg1[233] = x1123; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :11:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1124 = x1122 + x1123 * poly_mix[45]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :11:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1125 = x55 - x72; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :11:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg1[234] = x1125; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :11:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1126 = x1124 + x1125 * poly_mix[46]; - // loc(callsite(unknown at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :11:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1127 = x35 - x63; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :11:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1128 = x68 - x25; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :11:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg1[235] = x1128; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :11:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1129 = x1126 + x1128 * poly_mix[47]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :11:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1130 = x70 - x1127; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :11:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg1[236] = x1130; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :11:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1131 = x1129 + x1130 * poly_mix[48]; - // loc(callsite(unknown at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :34:79) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :12:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1132 = x284 + x1099; - // loc(callsite( Reg ( :5:7) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :34:15) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :12:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1133 = x1132 - x81; - // loc(callsite( Reg ( :5:7) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :34:15) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :12:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1134 = x1131 + x1133 * poly_mix[49]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :12:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1135 = x71 - x27; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :12:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1136 = x1134 + x1135 * poly_mix[50]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :12:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1137 = x79 - x25; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :12:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1138 = x1136 + x1137 * poly_mix[51]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :12:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1139 = x1138 + x26 * poly_mix[52]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :12:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1140 = x1139 + x26 * poly_mix[53]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :12:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1141 = x69 - x81; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :12:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1142 = x1140 + x1141 * poly_mix[54]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :12:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1143 = x74 - x75; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :12:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1144 = x1142 + x1143 * poly_mix[55]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :12:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1145 = x65 - x76; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :12:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1146 = x1144 + x1145 * poly_mix[56]; - // loc(callsite(unknown at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :12:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1147 = x35 - x73; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :12:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1148 = x77 - x25; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :12:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1149 = x1146 + x1148 * poly_mix[57]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :12:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1150 = x78 - x1147; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :12:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1151 = x1149 + x1150 * poly_mix[58]; - // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :62:19) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :85:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x1152 = x167 - x8; - // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :85:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x1153 = x1111 - x0; - // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :85:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - arg1[184] = x1153; - // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :62:19) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :85:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x1154 = arg2 + x1152 * poly_mix[0]; - // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :85:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x1155 = x1154 + x1153 * poly_mix[1]; - // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :85:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x1156 = x1155 + x1109 * poly_mix[2]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :44:21) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :86:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1157 = x1156 + x665 * poly_mix[3]; - // loc(unknown) - auto x1158 = rv32im_v2_10(cycle, steps, poly_mix, arg1, x1157, x1151, x1155, arg2, x1154, x970, arg4, x876, x877, arg5, x874, arg6, x873, arg7, arg8, arg9, arg10); - return x1158; -} -FpExt rv32im_v2_7(size_t cycle, size_t steps, FpExt* poly_mix, FpExt arg0, FpExt arg1, Fp* arg2, FpExt arg3, FpExt arg4, FpExt arg5, FpExt* arg6, FpExt arg7, Fp* arg8, Fp* arg9, Fp* arg10, Fp* arg11) { - size_t mask = steps - 1; - // loc(unknown) - constexpr Fp x0(7); - // loc(unknown) - constexpr Fp x1(6); - // loc(unknown) - constexpr Fp x2(5); - // loc(unknown) - constexpr Fp x3(18); - // loc(unknown) - constexpr Fp x4(17); - // loc(unknown) - constexpr Fp x5(32768); - // loc(unknown) - constexpr Fp x6(1073725453); - // loc(unknown) - constexpr Fp x7(1509949441); - // loc(unknown) - constexpr FpExt x8(0,0,0,0); - // loc(unknown) - constexpr FpExt x9(0,1,0,0); - // loc(unknown) - constexpr Fp x10(22); - // loc(unknown) - constexpr Fp x11(1140850688); - // loc(unknown) - constexpr Fp x12(1073741824); - // loc(unknown) - constexpr Fp x13(1342177281); - // loc(unknown) - constexpr Fp x14(65536); - // loc(unknown) - constexpr Fp x15(16384); - // loc(unknown) - constexpr Fp x16(13); - // loc(unknown) - constexpr Fp x17(12); - // loc(unknown) - constexpr Fp x18(32); - // loc(unknown) - constexpr Fp x19(16); - // loc(unknown) - constexpr Fp x20(11); - // loc(unknown) - constexpr Fp x21(10); - // loc(unknown) - constexpr Fp x22(9); - // loc(unknown) - constexpr Fp x23(4); - // loc(unknown) - constexpr Fp x24(1073725504); - // loc(unknown) - constexpr Fp x25(2013265920); - // loc(unknown) - constexpr Fp x26(3); - // loc(unknown) - constexpr Fp x27(2); - // loc(unknown) - constexpr Fp x28(1); - // loc(unknown) - constexpr Fp x29(1073725452); - // loc(unknown) - constexpr Fp x30(1073725451); - // loc(unknown) - constexpr Fp x31(1073725450); - // loc(unknown) - constexpr Fp x32(0); - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :126:34) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :135:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x33 = arg8[34 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :93:26) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x34 = arg11[69]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x35 = arg8[41 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :94:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x36 = arg11[72]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :51:29) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x37 = arg8[42 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :95:26) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x38 = arg11[71]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :28:29) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x39 = arg8[43 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :51:29) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x40 = arg8[48 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :42:21) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x41 = arg8[51 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU8 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :9:27) at callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :15:16) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :53:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x42 = arg8[56 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :16:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x43 = arg8[63 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :18:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x44 = arg8[65 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :20:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x45 = arg8[67 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :22:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x46 = arg8[69 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x47 = arg8[20 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x48 = arg8[28 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :126:34) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :136:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x49 = arg8[36 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x50 = arg8[44 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :17:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x51 = arg8[64 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :11:20) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x52 = arg8[50 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :8:23) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x53 = arg8[49 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :21:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x54 = arg8[68 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :23:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x55 = arg8[70 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :26:28) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x56 = arg8[52 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :19:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x57 = arg8[66 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :25:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x58 = arg8[57 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x59 = arg8[58 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :26:28) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x60 = arg8[86 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :25:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x61 = arg8[87 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :28:29) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :69:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x62 = arg8[84 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :69:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x63 = arg8[85 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :11:20) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x64 = arg8[83 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :27:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x65 = arg8[88 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x66 = arg8[90 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( CycleArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :54:29) at callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :60:19) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x67 = arg8[94 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( CycleArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :55:29) at callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :60:19) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x68 = arg8[95 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x69 = arg8[93 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :26:28) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x70 = arg8[96 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x71 = arg8[92 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :25:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x72 = arg8[91 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :27:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x73 = arg8[98 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :25:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x74 = arg8[97 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x75 = arg8[99 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x76 = arg8[100 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :25:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x77 = arg8[101 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x78 = arg8[21 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x79 = arg8[22 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x80 = arg8[27 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :126:34) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :134:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x81 = arg8[32 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x82 = arg8[35 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :28:29) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x83 = arg8[40 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x84 = arg8[59 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( CycleArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :55:29) at callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :60:19) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x85 = arg8[61 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x86 = arg8[23 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x87 = arg8[71 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x88 = arg8[102 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x89 = arg8[103 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:52) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x90 = arg8[73 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( CycleArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :54:29) at callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :60:19) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x91 = arg8[104 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( CycleArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :55:29) at callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :60:19) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x92 = arg8[105 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x93 = arg8[24 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x94 = arg8[25 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x95 = arg8[26 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :33:25) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x96 = arg8[82 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :33:25) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x97 = arg8[83 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :33:25) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x98 = arg8[84 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :33:25) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x99 = arg8[85 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x100 = arg8[19 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :61:24) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :85:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x101 = arg8[99 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :89:17) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x102 = arg8[101 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :128:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x103 = arg8[86 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :128:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x104 = arg8[87 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :8:23) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :141:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x105 = arg8[104 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :70:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x106 = arg8[42 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :129:32) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x107 = arg8[94 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :8:23) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :60:29) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :129:32) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x108 = arg8[97 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :129:32) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x109 = arg8[95 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :129:32) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x110 = arg8[96 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x111 = arg8[71 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :77:26) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x112 = arg8[68 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:52) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x113 = arg8[73 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :24:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x114 = arg8[71 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :25:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x115 = arg8[72 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :26:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x116 = arg8[73 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :34:15) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x117 = arg8[106 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :26:28) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x118 = arg8[107 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :25:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x119 = arg8[108 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :27:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x120 = arg8[109 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :25:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x121 = arg8[112 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x122 = arg8[111 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( CycleArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :54:29) at callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :60:19) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x123 = arg8[115 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x124 = arg8[114 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x125 = arg8[9 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :8:23) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :131:20) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x126 = arg8[188 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :11:20) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :131:20) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x127 = arg8[189 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x128 = arg8[29 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x129 = arg8[30 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x130 = arg8[31 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x131 = arg8[33 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :28:29) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x132 = arg8[37 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x133 = arg8[38 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :45:28) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x134 = arg8[39 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :45:28) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x135 = arg8[45 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :28:29) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x136 = arg8[46 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x137 = arg8[47 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :25:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x138 = arg8[53 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :27:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x139 = arg8[54 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU8 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :8:29) at callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :15:16) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :53:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x140 = arg8[55 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( CycleArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :54:29) at callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :60:19) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x141 = arg8[60 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :15:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x142 = arg8[62 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :27:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x143 = arg8[74 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :63:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x144 = arg8[79 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :8:23) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x145 = arg8[82 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x146 = arg8[130 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x147 = arg8[132 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x148 = arg8[134 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x149 = arg8[136 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :48:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x150 = arg8[0 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x151 = arg8[131 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x152 = arg8[75 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :34:30) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x153 = arg8[77 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :28:29) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :65:23) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x154 = arg8[80 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :29:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x155 = arg8[76 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x156 = arg8[133 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x157 = arg8[135 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x158 = arg8[89 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x159 = arg8[137 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :8:23) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :90:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x160 = arg8[182 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :11:20) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :90:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x161 = arg8[183 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :94:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x162 = arg8[184 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :95:28) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x163 = arg8[185 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :8:23) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :99:23) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x164 = arg8[186 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :11:20) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :99:23) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x165 = arg8[187 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x166 = arg8[119 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x167 = arg8[122 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x168 = arg8[127 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x169 = arg8[138 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x170 = arg8[140 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x171 = arg8[142 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x172 = arg8[144 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x173 = arg8[146 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x174 = arg8[148 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x175 = arg8[150 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x176 = arg8[152 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x177 = arg8[154 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x178 = arg8[156 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x179 = arg8[158 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x180 = arg8[160 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x181 = arg8[162 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x182 = arg8[164 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x183 = arg8[166 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x184 = arg8[168 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x185 = arg8[170 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x186 = arg8[172 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x187 = arg8[174 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x188 = arg8[176 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x189 = arg8[178 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x190 = arg8[180 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :35:27) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x191 = arg8[28 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :65:23) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x192 = arg8[81 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x193 = arg8[139 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x194 = arg8[141 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x195 = arg8[113 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :34:15) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x196 = arg8[117 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x197 = arg8[120 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x198 = arg8[118 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x199 = arg8[121 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( CycleArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :55:29) at callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :60:19) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x200 = arg8[116 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x201 = arg8[143 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x202 = arg8[123 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x203 = arg8[125 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x204 = arg8[128 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x205 = arg8[126 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x206 = arg8[129 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x207 = arg8[124 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x208 = arg8[145 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :34:26) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x209 = arg8[27 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :36:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x210 = arg8[29 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :37:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x211 = arg8[30 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :38:26) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x212 = arg8[31 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :39:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x213 = arg8[32 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :43:27) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x214 = arg8[35 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :44:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x215 = arg8[36 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :45:22) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x216 = arg8[37 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( ExtReg ( :10:24) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :48:27) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x217 = arg8[65 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( ExtReg ( :10:24) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :48:27) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x218 = arg8[64 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( ExtReg ( :10:24) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :48:27) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x219 = arg8[63 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( ExtReg ( :10:24) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :48:27) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x220 = arg8[62 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :42:26) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x221 = arg8[34 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite( Reg ( :5:7) at callsite( ECallTerminate ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :48:22) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :160:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x222 = x33 - x34; - // loc(callsite( Reg ( :5:7) at callsite( ECallTerminate ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :48:22) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :160:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x223 = arg0 + x222 * poly_mix[20]; - // loc(callsite( Reg ( :5:7) at callsite( ECallTerminate ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :49:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :160:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x224 = x35 - x36; - // loc(callsite( Reg ( :5:7) at callsite( ECallTerminate ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :49:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :160:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x225 = x223 + x224 * poly_mix[21]; - // loc(callsite( Reg ( :5:7) at callsite( ECallTerminate ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :50:22) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :160:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x226 = x37 - x38; - // loc(callsite( Reg ( :5:7) at callsite( ECallTerminate ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :50:22) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :160:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x227 = x225 + x226 * poly_mix[22]; - // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x228 = x227 + x39 * poly_mix[23]; - // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x229 = x228 + x40 * poly_mix[24]; - // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x230 = x229 + x41 * poly_mix[25]; - // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x231 = x230 + x42 * poly_mix[26]; - // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x232 = x231 + x43 * poly_mix[27]; - // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x233 = x232 + x44 * poly_mix[28]; - // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x234 = x233 + x45 * poly_mix[29]; - // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x235 = x234 + x46 * poly_mix[30]; - // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x236 = arg1 + x47 * x235 * poly_mix[49]; - // loc(callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :67:16) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x237 = arg2[311]; - // loc(callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :67:16) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x238 = arg3 + x237 * poly_mix[0]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x239 = arg2[250]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :69:20) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x240 = x238 + x239 * poly_mix[1]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x241 = arg2[251]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :69:20) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x242 = x240 + x241 * poly_mix[2]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :69:20) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x243 = x242 + x32 * poly_mix[3]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :69:20) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x244 = x243 + x32 * poly_mix[4]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :69:20) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x245 = x48 - x31; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :69:20) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x246 = x244 + x245 * poly_mix[5]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x247 = arg2[252]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :69:20) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x248 = x246 + x247 * poly_mix[6]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x249 = arg2[253]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :69:20) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x250 = x248 + x249 * poly_mix[7]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x251 = arg2[173]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :69:20) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x252 = x250 + x251 * poly_mix[8]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :26:27) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x253 = arg2[312]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :69:20) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x254 = x252 + x253 * poly_mix[9]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x255 = arg2[256]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :70:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x256 = x254 + x255 * poly_mix[10]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x257 = arg2[239]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :70:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x258 = x256 + x257 * poly_mix[11]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :70:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x259 = x258 + x32 * poly_mix[12]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :70:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x260 = x259 + x32 * poly_mix[13]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :70:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x261 = x49 - x30; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :70:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x262 = x260 + x261 * poly_mix[14]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x263 = arg2[257]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :70:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x264 = x262 + x263 * poly_mix[15]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x265 = arg2[258]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :70:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x266 = x264 + x265 * poly_mix[16]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x267 = arg2[174]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :70:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x268 = x266 + x267 * poly_mix[17]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :31:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x269 = arg2[313]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :70:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x270 = x268 + x269 * poly_mix[18]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x271 = arg2[261]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :71:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x272 = x270 + x271 * poly_mix[19]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x273 = arg2[262]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :71:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x274 = x272 + x273 * poly_mix[20]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :71:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x275 = x274 + x32 * poly_mix[21]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :71:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x276 = x275 + x32 * poly_mix[22]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :71:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x277 = x50 - x29; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :71:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x278 = x276 + x277 * poly_mix[23]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x279 = arg2[263]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :71:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x280 = x278 + x279 * poly_mix[24]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x281 = arg2[264]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :71:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x282 = x280 + x281 * poly_mix[25]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x283 = arg2[175]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :71:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x284 = x282 + x283 * poly_mix[26]; - // loc(callsite(unknown at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:22) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x285 = arg2[314]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :71:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x286 = x51 - x285; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :71:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x287 = x284 + x286 * poly_mix[27]; - // loc(callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :73:12) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x288 = x287 + x33 * poly_mix[28]; - // loc(callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :75:13) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x289 = x288 + x52 * poly_mix[29]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x290 = arg2[219]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :77:26) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x291 = x289 + x290 * poly_mix[30]; - // loc(callsite(unknown at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :79:23) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x292 = x53 - x54; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x293 = arg2[315]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :79:18) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x294 = x291 + x293 * poly_mix[31]; - // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :79:18) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x295 = x55 - x292; - // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :79:18) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x296 = x294 + x295 * poly_mix[32]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x297 = arg2[267]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :81:15) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x298 = x296 + x297 * poly_mix[33]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x299 = arg2[268]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :81:15) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x300 = x298 + x299 * poly_mix[34]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :81:15) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x301 = x300 + x32 * poly_mix[35]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :81:15) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x302 = x301 + x32 * poly_mix[36]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :81:15) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x303 = x56 - x31; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :81:15) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x304 = x302 + x303 * poly_mix[37]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x305 = arg2[316]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :81:15) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x306 = x304 + x305 * poly_mix[38]; - // loc(callsite(unknown at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:22) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x307 = arg2[317]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :81:15) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x308 = x57 - x307; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :81:15) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x309 = x306 + x308 * poly_mix[39]; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :81:15) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x310 = x58 - x54; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :81:15) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x311 = x309 + x310 * poly_mix[40]; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :81:15) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x312 = x311 + x59 * poly_mix[41]; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:4) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x313 = arg2[209]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :83:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x314 = x312 + x313 * poly_mix[42]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x315 = arg2[159]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :83:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x316 = x314 + x315 * poly_mix[43]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :83:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x317 = x28 - x60; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :83:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x318 = x60 * x317; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :83:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x319 = x316 + x318 * poly_mix[44]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :83:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x320 = x28 - x61; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :83:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x321 = x61 * x320; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :83:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x322 = x319 + x321 * poly_mix[45]; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:4) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :83:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x323 = x62 + x63; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:4) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :83:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x324 = x323 + x60; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:4) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :83:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x325 = x324 + x61; - // loc(callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:32) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :83:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x326 = x325 - x28; - // loc(callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:32) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :83:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x327 = x322 + x326 * poly_mix[46]; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:32) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :83:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x328 = x60 * x27; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:32) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :83:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg2[533] = x328; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:32) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :83:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x329 = x61 * x26; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:4) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :83:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x330 = x63 + x328; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:4) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :83:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x331 = x330 + x329; - // loc(callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:56) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :83:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x332 = x331 - x64; - // loc(callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:56) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :83:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x333 = x327 + x332 * poly_mix[47]; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:4) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :63:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x334 = arg2[211]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :60:29) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :83:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x335 = x333 + x334 * poly_mix[48]; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :87:10) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :13:36) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x336 = arg2[318]; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :60:29) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :83:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x337 = x335 + x336 * poly_mix[49]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:4) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :87:10) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :13:36) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x338 = arg2[319]; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:17) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :60:29) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :83:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x339 = x337 + x338 * poly_mix[50]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:4) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :87:10) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :13:36) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x340 = arg2[320]; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:17) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :60:29) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :83:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x341 = x339 + x340 * poly_mix[51]; - // loc(callsite(unknown at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :61:25) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :83:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x342 = x65 * x62; - // loc(callsite( Reg ( :5:7) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :61:24) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :83:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x343 = x342 - x66; - // loc(callsite( Reg ( :5:7) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :61:24) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :83:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x344 = x341 + x343 * poly_mix[52]; - // loc(callsite(unknown at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :63:35) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :83:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x345 = x63 + x60; - // loc(callsite(unknown at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :63:48) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :83:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x346 = x345 + x61; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :45:28) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :23:28) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x347 = arg2[321]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :85:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x348 = x344 + x347 * poly_mix[53]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :85:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x349 = x28 - x67; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :85:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x350 = x67 * x349; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :85:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x351 = x348 + x350 * poly_mix[54]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :85:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x352 = x28 - x68; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :85:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x353 = x68 * x352; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :85:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x354 = x351 + x353 * poly_mix[55]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :51:29) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :23:28) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x355 = arg2[322]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :85:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x356 = x354 + x355 * poly_mix[56]; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:4) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :85:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x357 = x69 + x67; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:4) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :85:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x358 = x357 + x68; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:4) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :85:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x359 = x358 + x70; - // loc(callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:32) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :85:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x360 = x359 - x28; - // loc(callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:32) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :85:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x361 = x356 + x360 * poly_mix[57]; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:32) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :85:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x362 = x68 * x27; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:32) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :85:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x363 = x70 * x26; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:4) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :85:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x364 = x67 + x362; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:4) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :85:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x365 = x364 + x363; - // loc(callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:56) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :85:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x366 = x365 - x71; - // loc(callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:56) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :85:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x367 = x361 + x366 * poly_mix[58]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :81:31) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :24:36) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x368 = arg2[323]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :60:29) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :85:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x369 = x367 + x368 * poly_mix[59]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:4) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :60:29) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :85:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x370 = x72 * x73; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :81:31) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :24:36) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x371 = arg2[324]; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :60:29) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :85:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x372 = x370 - x371; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :60:29) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :85:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x373 = x369 + x372 * poly_mix[60]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:4) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :60:29) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :85:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x374 = x74 * x72; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:17) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :60:29) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :85:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x375 = x373 + x374 * poly_mix[61]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:4) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :60:29) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :85:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x376 = x74 * x73; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:17) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :60:29) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :85:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x377 = x375 + x376 * poly_mix[62]; - // loc(callsite(unknown at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :61:25) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :85:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x378 = x74 * x69; - // loc(callsite( Reg ( :5:7) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :61:24) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :85:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x379 = x378 - x75; - // loc(callsite( Reg ( :5:7) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :61:24) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :85:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x380 = x377 + x379 * poly_mix[63]; - // loc(callsite(unknown at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :63:35) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :85:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x381 = x67 + x68; - // loc(callsite(unknown at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :63:48) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :85:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x382 = x381 + x70; - // loc(callsite(unknown at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :87:28) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x383 = x74 * x382; - // loc(callsite( Reg ( :5:7) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :87:17) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x384 = x383 - x76; - // loc(callsite( Reg ( :5:7) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :87:17) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x385 = x380 + x384 * poly_mix[64]; - // loc(callsite(unknown at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :89:18) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x386 = x76 * x346; - // loc(callsite( Reg ( :5:7) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :89:17) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x387 = x386 - x77; - // loc(callsite( Reg ( :5:7) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :89:17) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x388 = x385 + x387 * poly_mix[65]; - // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x389 = x236 + x78 * x388 * poly_mix[80]; - // loc(callsite( ECallHostWrite ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :102:16) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :162:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x390 = arg2[325]; - // loc(callsite( ECallHostWrite ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :102:16) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :162:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x391 = arg3 + x390 * poly_mix[0]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ECallHostWrite ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :104:20) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :162:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x392 = x391 + x239 * poly_mix[1]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ECallHostWrite ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :104:20) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :162:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x393 = x392 + x241 * poly_mix[2]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ECallHostWrite ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :104:20) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :162:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x394 = x393 + x32 * poly_mix[3]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ECallHostWrite ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :104:20) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :162:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x395 = x394 + x32 * poly_mix[4]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ECallHostWrite ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :104:20) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :162:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x396 = x395 + x245 * poly_mix[5]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ECallHostWrite ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :104:20) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :162:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x397 = x396 + x247 * poly_mix[6]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ECallHostWrite ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :104:20) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :162:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x398 = x397 + x249 * poly_mix[7]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ECallHostWrite ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :104:20) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :162:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x399 = x398 + x251 * poly_mix[8]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ECallHostWrite ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :104:20) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :162:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x400 = x399 + x253 * poly_mix[9]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ECallHostWrite ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :105:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :162:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x401 = x400 + x255 * poly_mix[10]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ECallHostWrite ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :105:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :162:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x402 = x401 + x257 * poly_mix[11]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ECallHostWrite ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :105:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :162:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x403 = x402 + x32 * poly_mix[12]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ECallHostWrite ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :105:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :162:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x404 = x403 + x32 * poly_mix[13]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ECallHostWrite ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :105:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :162:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x405 = x404 + x261 * poly_mix[14]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ECallHostWrite ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :105:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :162:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x406 = x405 + x263 * poly_mix[15]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ECallHostWrite ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :105:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :162:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x407 = x406 + x265 * poly_mix[16]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ECallHostWrite ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :105:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :162:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x408 = x407 + x267 * poly_mix[17]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ECallHostWrite ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :105:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :162:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x409 = x408 + x269 * poly_mix[18]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ECallHostWrite ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :106:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :162:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x410 = x409 + x271 * poly_mix[19]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ECallHostWrite ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :106:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :162:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x411 = x410 + x273 * poly_mix[20]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ECallHostWrite ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :106:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :162:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x412 = x411 + x32 * poly_mix[21]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ECallHostWrite ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :106:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :162:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x413 = x412 + x32 * poly_mix[22]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ECallHostWrite ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :106:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :162:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x414 = x413 + x277 * poly_mix[23]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ECallHostWrite ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :106:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :162:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x415 = x414 + x279 * poly_mix[24]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ECallHostWrite ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :106:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :162:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x416 = x415 + x281 * poly_mix[25]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ECallHostWrite ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :106:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :162:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x417 = x416 + x283 * poly_mix[26]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ECallHostWrite ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :106:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :162:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x418 = x417 + x286 * poly_mix[27]; - // loc(callsite( ECallHostWrite ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :107:12) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :162:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x419 = x418 + x33 * poly_mix[28]; - // loc(callsite( ECallHostWrite ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :108:13) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :162:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x420 = x419 + x52 * poly_mix[29]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( ECallHostWrite ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :110:26) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :162:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x421 = x420 + x290 * poly_mix[30]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( ECallHostWrite ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :112:18) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :162:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x422 = x421 + x293 * poly_mix[31]; - // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( ECallHostWrite ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :112:18) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :162:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x423 = x422 + x295 * poly_mix[32]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ECallHostWrite ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :114:15) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :162:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x424 = x423 + x297 * poly_mix[33]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ECallHostWrite ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :114:15) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :162:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x425 = x424 + x299 * poly_mix[34]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ECallHostWrite ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :114:15) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :162:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x426 = x425 + x32 * poly_mix[35]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ECallHostWrite ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :114:15) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :162:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x427 = x426 + x32 * poly_mix[36]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ECallHostWrite ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :114:15) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :162:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x428 = x427 + x303 * poly_mix[37]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ECallHostWrite ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :114:15) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :162:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x429 = x428 + x305 * poly_mix[38]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ECallHostWrite ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :114:15) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :162:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x430 = x429 + x308 * poly_mix[39]; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( ECallHostWrite ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :114:15) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :162:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x431 = x430 + x310 * poly_mix[40]; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( ECallHostWrite ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :114:15) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :162:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x432 = x431 + x59 * poly_mix[41]; - // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x433 = x389 + x79 * x432 * poly_mix[146]; - // loc(callsite( ECallHostReadBytes ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :121:16) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :163:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x434 = arg2[326]; - // loc(callsite( ECallHostReadBytes ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :121:16) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :163:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x435 = arg3 + x434 * poly_mix[0]; - // loc(callsite( ECallHostReadBytes ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :122:6) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :163:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x436 = x435 + x25 * poly_mix[1]; - // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x437 = x436 + x80 * poly_mix[2]; - // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x438 = x437 + x81 * poly_mix[3]; - // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x439 = x438 + x82 * poly_mix[4]; - // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x440 = x439 + x83 * poly_mix[5]; - // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x441 = x440 + x39 * poly_mix[6]; - // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x442 = x441 + x40 * poly_mix[7]; - // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x443 = x442 + x41 * poly_mix[8]; - // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x444 = x443 + x42 * poly_mix[9]; - // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x445 = x444 + x84 * poly_mix[10]; - // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x446 = x445 + x85 * poly_mix[11]; - // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x447 = x446 + x43 * poly_mix[12]; - // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x448 = x447 + x44 * poly_mix[13]; - // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x449 = x448 + x45 * poly_mix[14]; - // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x450 = x449 + x46 * poly_mix[15]; - // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x451 = x433 + x86 * x450 * poly_mix[172]; - // loc(callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :127:16) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x452 = arg2[327]; - // loc(callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :127:16) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x453 = arg3 + x452 * poly_mix[0]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :128:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x454 = x453 + x313 * poly_mix[1]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :128:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x455 = x454 + x315 * poly_mix[2]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :128:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x456 = x455 + x318 * poly_mix[3]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :128:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x457 = x456 + x321 * poly_mix[4]; - // loc(callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:32) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :128:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x458 = x457 + x326 * poly_mix[5]; - // loc(callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:56) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :128:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x459 = x458 + x332 * poly_mix[6]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :60:29) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :128:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x460 = x459 + x334 * poly_mix[7]; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :60:29) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :128:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x461 = x460 + x336 * poly_mix[8]; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:17) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :60:29) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :128:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x462 = x461 + x338 * poly_mix[9]; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:17) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :60:29) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :128:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x463 = x462 + x340 * poly_mix[10]; - // loc(callsite( Reg ( :5:7) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :61:24) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :128:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x464 = x463 + x343 * poly_mix[11]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :129:32) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x465 = x464 + x347 * poly_mix[12]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :129:32) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x466 = x465 + x350 * poly_mix[13]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :129:32) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x467 = x466 + x353 * poly_mix[14]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :129:32) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x468 = x467 + x355 * poly_mix[15]; - // loc(callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:32) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :129:32) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x469 = x468 + x360 * poly_mix[16]; - // loc(callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:56) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :129:32) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x470 = x469 + x366 * poly_mix[17]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :60:29) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :129:32) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x471 = x470 + x368 * poly_mix[18]; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :60:29) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :129:32) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x472 = x471 + x372 * poly_mix[19]; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:17) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :60:29) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :129:32) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x473 = x472 + x374 * poly_mix[20]; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:17) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :60:29) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :129:32) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x474 = x473 + x376 * poly_mix[21]; - // loc(callsite( Reg ( :5:7) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :61:24) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :129:32) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x475 = x474 + x379 * poly_mix[22]; - // loc(callsite(unknown at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :131:27) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x476 = x67 * x74; - // loc(callsite(unknown at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :132:27) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x477 = x68 * x74; - // loc(callsite(unknown at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :133:27) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x478 = x70 * x74; - // loc(callsite(unknown at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :136:13) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x479 = x476 + x477; - // loc(callsite(unknown at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :136:13) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x480 = x479 + x478; - // loc(callsite(unknown at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :136:13) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x481 = x480 + x371; - // loc(callsite(unknown at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :138:26) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x482 = x476 * x87; - // loc(callsite(unknown at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :138:47) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x483 = x28 - x476; - // loc(callsite(unknown at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :138:60) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x484 = x483 * x24; - // loc(callsite(unknown at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :138:42) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x485 = x482 + x484; - // loc(callsite( Reg ( :5:7) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :138:17) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x486 = x485 - x76; - // loc(callsite( Reg ( :5:7) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :138:17) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x487 = x475 + x486 * poly_mix[23]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryWriteUnconstrained ( zirgen/circuit/rv32im/v2/dsl/mem.zir :105:18) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :139:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x488 = x487 + x239 * poly_mix[24]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWriteUnconstrained ( zirgen/circuit/rv32im/v2/dsl/mem.zir :105:18) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :139:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x489 = x488 + x241 * poly_mix[25]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryWriteUnconstrained ( zirgen/circuit/rv32im/v2/dsl/mem.zir :105:18) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :139:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x490 = x489 + x32 * poly_mix[26]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryWriteUnconstrained ( zirgen/circuit/rv32im/v2/dsl/mem.zir :105:18) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :139:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x491 = x490 + x32 * poly_mix[27]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWriteUnconstrained ( zirgen/circuit/rv32im/v2/dsl/mem.zir :105:18) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :139:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x492 = x48 - x76; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWriteUnconstrained ( zirgen/circuit/rv32im/v2/dsl/mem.zir :105:18) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :139:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x493 = x491 + x492 * poly_mix[28]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWriteUnconstrained ( zirgen/circuit/rv32im/v2/dsl/mem.zir :106:13) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :139:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x494 = x493 + x251 * poly_mix[29]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWriteUnconstrained ( zirgen/circuit/rv32im/v2/dsl/mem.zir :106:13) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :139:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x495 = x494 + x253 * poly_mix[30]; - // loc(callsite(unknown at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :138:31) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x496 = x87 + x28; - // loc(callsite(unknown at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :138:26) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x497 = x477 * x496; - // loc(callsite(unknown at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :138:47) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x498 = x28 - x477; - // loc(callsite(unknown at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :138:60) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x499 = x498 * x24; - // loc(callsite(unknown at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :138:42) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x500 = x497 + x499; - // loc(callsite( Reg ( :5:7) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :138:17) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x501 = x500 - x77; - // loc(callsite( Reg ( :5:7) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :138:17) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x502 = x495 + x501 * poly_mix[31]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryWriteUnconstrained ( zirgen/circuit/rv32im/v2/dsl/mem.zir :105:18) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :139:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x503 = x502 + x255 * poly_mix[32]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWriteUnconstrained ( zirgen/circuit/rv32im/v2/dsl/mem.zir :105:18) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :139:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x504 = x503 + x257 * poly_mix[33]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryWriteUnconstrained ( zirgen/circuit/rv32im/v2/dsl/mem.zir :105:18) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :139:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x505 = x504 + x32 * poly_mix[34]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryWriteUnconstrained ( zirgen/circuit/rv32im/v2/dsl/mem.zir :105:18) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :139:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x506 = x505 + x32 * poly_mix[35]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWriteUnconstrained ( zirgen/circuit/rv32im/v2/dsl/mem.zir :105:18) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :139:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x507 = x49 - x77; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWriteUnconstrained ( zirgen/circuit/rv32im/v2/dsl/mem.zir :105:18) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :139:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x508 = x506 + x507 * poly_mix[36]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWriteUnconstrained ( zirgen/circuit/rv32im/v2/dsl/mem.zir :106:13) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :139:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x509 = x508 + x267 * poly_mix[37]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWriteUnconstrained ( zirgen/circuit/rv32im/v2/dsl/mem.zir :106:13) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :139:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x510 = x509 + x269 * poly_mix[38]; - // loc(callsite(unknown at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :138:31) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x511 = x87 + x27; - // loc(callsite(unknown at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :138:26) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x512 = x478 * x511; - // loc(callsite(unknown at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :138:47) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x513 = x28 - x478; - // loc(callsite(unknown at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :138:60) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x514 = x513 * x24; - // loc(callsite(unknown at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :138:42) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x515 = x512 + x514; - // loc(callsite( Reg ( :5:7) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :138:17) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x516 = x515 - x88; - // loc(callsite( Reg ( :5:7) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :138:17) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x517 = x510 + x516 * poly_mix[39]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryWriteUnconstrained ( zirgen/circuit/rv32im/v2/dsl/mem.zir :105:18) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :139:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x518 = x517 + x271 * poly_mix[40]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWriteUnconstrained ( zirgen/circuit/rv32im/v2/dsl/mem.zir :105:18) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :139:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x519 = x518 + x273 * poly_mix[41]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryWriteUnconstrained ( zirgen/circuit/rv32im/v2/dsl/mem.zir :105:18) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :139:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x520 = x519 + x32 * poly_mix[42]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryWriteUnconstrained ( zirgen/circuit/rv32im/v2/dsl/mem.zir :105:18) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :139:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x521 = x520 + x32 * poly_mix[43]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWriteUnconstrained ( zirgen/circuit/rv32im/v2/dsl/mem.zir :105:18) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :139:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x522 = x50 - x88; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWriteUnconstrained ( zirgen/circuit/rv32im/v2/dsl/mem.zir :105:18) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :139:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x523 = x521 + x522 * poly_mix[44]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWriteUnconstrained ( zirgen/circuit/rv32im/v2/dsl/mem.zir :106:13) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :139:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x524 = x523 + x283 * poly_mix[45]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWriteUnconstrained ( zirgen/circuit/rv32im/v2/dsl/mem.zir :106:13) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :139:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x525 = x524 + x286 * poly_mix[46]; - // loc(callsite(unknown at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :138:31) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x526 = x87 + x26; - // loc(callsite(unknown at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :138:26) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x527 = x371 * x526; - // loc(callsite(unknown at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :138:47) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x528 = x28 - x371; - // loc(callsite(unknown at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :138:60) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x529 = x528 * x24; - // loc(callsite(unknown at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :138:42) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x530 = x527 + x529; - // loc(callsite( Reg ( :5:7) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :138:17) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x531 = x530 - x89; - // loc(callsite( Reg ( :5:7) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :138:17) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x532 = x525 + x531 * poly_mix[47]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryWriteUnconstrained ( zirgen/circuit/rv32im/v2/dsl/mem.zir :105:18) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :139:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x533 = x532 + x297 * poly_mix[48]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWriteUnconstrained ( zirgen/circuit/rv32im/v2/dsl/mem.zir :105:18) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :139:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x534 = x533 + x299 * poly_mix[49]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryWriteUnconstrained ( zirgen/circuit/rv32im/v2/dsl/mem.zir :105:18) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :139:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x535 = x534 + x32 * poly_mix[50]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryWriteUnconstrained ( zirgen/circuit/rv32im/v2/dsl/mem.zir :105:18) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :139:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x536 = x535 + x32 * poly_mix[51]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWriteUnconstrained ( zirgen/circuit/rv32im/v2/dsl/mem.zir :105:18) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :139:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x537 = x56 - x89; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWriteUnconstrained ( zirgen/circuit/rv32im/v2/dsl/mem.zir :105:18) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :139:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x538 = x536 + x537 * poly_mix[52]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWriteUnconstrained ( zirgen/circuit/rv32im/v2/dsl/mem.zir :106:13) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :139:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x539 = x538 + x305 * poly_mix[53]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWriteUnconstrained ( zirgen/circuit/rv32im/v2/dsl/mem.zir :106:13) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :139:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x540 = x539 + x308 * poly_mix[54]; - // loc(callsite(unknown at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :141:28) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x541 = x481 * x23; - // loc(callsite(unknown at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :141:22) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x542 = x90 - x541; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :141:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x543 = x28 - x91; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :141:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x544 = x91 * x543; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :141:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x545 = x540 + x544 * poly_mix[55]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:4) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :141:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x546 = x542 * x92; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :141:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x547 = x546 - x543; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :141:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x548 = x545 + x547 * poly_mix[56]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:4) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :141:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x549 = x91 * x542; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:17) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :141:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x550 = x548 + x549 * poly_mix[57]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:4) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :141:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x551 = x91 * x92; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:17) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :141:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x552 = x550 + x551 * poly_mix[58]; - // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x553 = x552 + x45 * poly_mix[59]; - // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x554 = x553 + x46 * poly_mix[60]; - // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x555 = x451 + x93 * x554 * poly_mix[181]; - // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x556 = arg4 + x81 * poly_mix[2]; - // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x557 = x556 + x82 * poly_mix[3]; - // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x558 = x557 + x83 * poly_mix[4]; - // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x559 = x558 + x39 * poly_mix[5]; - // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x560 = x559 + x40 * poly_mix[6]; - // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x561 = x560 + x41 * poly_mix[7]; - // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x562 = x561 + x42 * poly_mix[8]; - // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x563 = x562 + x84 * poly_mix[9]; - // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x564 = x563 + x85 * poly_mix[10]; - // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x565 = x564 + x43 * poly_mix[11]; - // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x566 = x565 + x44 * poly_mix[12]; - // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x567 = x566 + x45 * poly_mix[13]; - // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x568 = x567 + x46 * poly_mix[14]; - // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x569 = x555 + x94 * x568 * poly_mix[240]; - // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x570 = x569 + x95 * x568 * poly_mix[250]; - // loc(callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :34:22) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x571 = x96 * x22; - // loc(callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :34:22) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x572 = x97 * x21; - // loc(callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :34:22) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x573 = x98 * x20; - // loc(callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :34:22) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x574 = x99 * x19; - // loc(callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :34:22) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x575 = x571 + x572; - // loc(callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :34:22) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x576 = x575 + x573; - // loc(callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :34:22) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x577 = x576 + x574; - // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x578 = x577 * x100; - // loc(callsite(unknown at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :93:16) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x579 = x101 * x18; - // loc(callsite(unknown at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :95:7) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x580 = x28 - x101; - // loc(callsite(unknown at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :95:27) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x581 = x580 * x102; - // loc(callsite(unknown at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :95:31) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x582 = x581 * x17; - // loc(callsite(unknown at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :93:37) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x583 = x579 + x582; - // loc(callsite(unknown at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :97:32) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x584 = x28 - x102; - // loc(callsite(unknown at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :97:27) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x585 = x580 * x584; - // loc(callsite(unknown at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :97:42) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x586 = x585 * x16; - // loc(callsite(unknown at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :95:59) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x587 = x583 + x586; - // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x588 = x587 * x78; - // loc(callsite(unknown at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :63:35) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :128:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x589 = x99 + x103; - // loc(callsite(unknown at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :63:48) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :128:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x590 = x589 + x104; - // loc(callsite(unknown at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :144:6) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x591 = x105 * x18; - // loc(callsite(unknown at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :146:7) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x592 = x28 - x105; - // loc(callsite(unknown at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :146:18) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x593 = x592 * x590; - // loc(callsite(unknown at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :146:44) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x594 = x593 * x17; - // loc(callsite(unknown at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :144:28) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x595 = x591 + x594; - // loc(callsite(unknown at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :148:23) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x596 = x28 - x590; - // loc(callsite(unknown at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :148:18) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x597 = x592 * x596; - // loc(callsite(unknown at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :148:48) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x598 = x597 * x16; - // loc(callsite(unknown at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :146:67) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x599 = x595 + x598; - // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x600 = x599 * x93; - // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x601 = arg2[328]; - // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x602 = x578 + x601; - // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x603 = x602 + x588; - // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x604 = arg2[329]; - // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x605 = x603 + x604; - // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x606 = arg2[330]; - // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x607 = x605 + x606; - // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x608 = x607 + x600; - // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - arg2[608] = x608; - // loc(callsite(unknown at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :84:19) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x609 = x106 * x15; - // loc(callsite(unknown at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :84:26) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x610 = x609 + x96; - // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x611 = x610 * x78; - // loc(callsite(unknown at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :131:27) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x612 = x107 * x108; - // loc(callsite(unknown at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :132:27) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x613 = x109 * x108; - // loc(callsite(unknown at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :133:27) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x614 = x110 * x108; - // loc(callsite(unknown at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :134:7) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x615 = x28 - x108; - // loc(callsite(unknown at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :136:13) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x616 = x612 + x613; - // loc(callsite(unknown at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :136:13) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x617 = x616 + x614; - // loc(callsite(unknown at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :136:13) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x618 = x617 + x615; - // loc(callsite(unknown at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :149:27) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x619 = x111 + x618; - // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x620 = x619 * x93; - // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x621 = x611 + x620; - // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x622 = x97 * x78; - // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x623 = x112 * x78; - // loc(callsite(unknown at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :149:53) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x624 = x618 * x23; - // loc(callsite(unknown at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :149:47) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x625 = x113 - x624; - // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x626 = x625 * x93; - // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x627 = x623 + x626; - // loc(callsite( Reg ( :5:7) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :168:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x628 = x621 - x114; - // loc(callsite( Reg ( :5:7) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :168:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x629 = x570 + x628 * poly_mix[253]; - // loc(callsite( Reg ( :5:7) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :169:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x630 = x622 - x115; - // loc(callsite( Reg ( :5:7) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :169:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x631 = x629 + x630 * poly_mix[254]; - // loc(callsite( Reg ( :5:7) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :170:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x632 = x627 - x116; - // loc(callsite( Reg ( :5:7) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :170:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x633 = x631 + x632 * poly_mix[255]; - // loc(callsite(unknown at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :171:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x634 = x608 - x18; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :171:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x635 = x28 - x117; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :171:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x636 = x117 * x635; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :171:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x637 = x633 + x636 * poly_mix[256]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:4) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :171:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x638 = x634 * x118; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :171:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x639 = x638 - x635; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :171:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x640 = x637 + x639 * poly_mix[257]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:4) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :171:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x641 = x117 * x634; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:17) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :171:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x642 = x640 + x641 * poly_mix[258]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:4) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :171:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x643 = x117 * x118; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:17) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :171:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x644 = x642 + x643 * poly_mix[259]; - // loc(callsite(unknown at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :172:31) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x645 = x608 - x19; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :172:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x646 = x28 - x119; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :172:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x647 = x119 * x646; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :172:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x648 = x644 + x647 * poly_mix[260]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:4) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :172:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x649 = x645 * x120; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :172:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x650 = x649 - x646; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :172:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x651 = x648 + x650 * poly_mix[261]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:4) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :172:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x652 = x119 * x645; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:17) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :172:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x653 = x651 + x652 * poly_mix[262]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:4) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :172:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x654 = x119 * x120; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:17) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :172:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x655 = x653 + x654 * poly_mix[263]; - // loc(callsite(unknown at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :173:60) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x656 = x117 + x119; - // loc(callsite(unknown at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :173:80) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x657 = x656 * x23; - // loc(callsite(unknown at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :52:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x658 = arg2[99]; - // loc(callsite(unknown at callsite( AddU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :27:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :173:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x659 = x658 + x657; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :11:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x660 = arg2[232]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :173:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x661 = x655 + x660 * poly_mix[264]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :45:28) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :173:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x662 = x28 - x121; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :45:28) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :173:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x663 = x121 * x662; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :45:28) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :173:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x664 = x661 + x663 * poly_mix[265]; - // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:12) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :173:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x665 = x121 * x14; - // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:23) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :173:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x666 = x665 + x122; - // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:10) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :173:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x667 = x659 - x666; - // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:10) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :173:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x668 = x664 + x667 * poly_mix[266]; - // loc(callsite(unknown at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :53:34) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x669 = arg2[102]; - // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :48:14) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :173:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x670 = x669 + x121; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :11:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x671 = arg2[235]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :173:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x672 = x668 + x671 * poly_mix[267]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :51:29) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :173:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x673 = x28 - x123; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :51:29) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :173:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x674 = x123 * x673; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :51:29) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :173:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x675 = x672 + x674 * poly_mix[268]; - // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:11) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :173:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x676 = x123 * x14; - // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:23) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :173:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x677 = x676 + x124; - // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:9) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :173:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x678 = x670 - x677; - // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:9) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :173:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x679 = x675 + x678 * poly_mix[269]; - // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :177:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x680 = x679 + x32 * poly_mix[270]; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - FpExt x681 = arg5 + x125 * x680 * poly_mix[393]; - // loc(callsite(unknown at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :58:61) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x682 = arg2[238]; - // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :110:15) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x683 = x682 * x13; - // loc(callsite(unknown at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :114:22) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x684 = x683 * x12; - // loc(callsite(unknown at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :114:46) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x685 = x28 - x683; - // loc(callsite(unknown at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :114:57) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x686 = x685 * x11; - // loc(callsite(unknown at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :114:32) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x687 = x684 + x686; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :131:20) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x688 = x28 - x126; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :131:20) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x689 = x126 * x688; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :131:20) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg2[461] = x689; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :131:20) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x690 = arg3 + x689 * poly_mix[0]; - // loc(callsite(unknown at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :33:31) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x691 = arg2[272]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:4) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :131:20) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x692 = x691 * x127; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :131:20) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x693 = x692 - x688; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :131:20) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x694 = x690 + x693 * poly_mix[1]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:4) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :131:20) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x695 = x126 * x691; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :131:20) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x696 = x694 + x695 * poly_mix[2]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:4) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :131:20) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x697 = x126 * x127; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :131:20) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x698 = x696 + x697 * poly_mix[3]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :34:26) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x699 = x32 - x80; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :34:26) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg2[387] = x699; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :34:26) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x700 = arg3 + x699 * poly_mix[0]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :35:27) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x701 = x32 - x48; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :35:27) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg2[388] = x701; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :35:27) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x702 = x700 + x701 * poly_mix[1]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :36:28) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x703 = x687 - x128; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :36:28) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x704 = x702 + x703 * poly_mix[2]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :37:24) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x705 = x28 - x129; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :37:24) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg2[462] = x705; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :37:24) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x706 = x704 + x705 * poly_mix[3]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :38:26) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x707 = x28 - x130; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :38:26) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg2[463] = x707; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :38:26) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x708 = x706 + x707 * poly_mix[4]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :39:28) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x709 = x28 - x81; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :39:28) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg2[464] = x709; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :39:28) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x710 = x708 + x709 * poly_mix[5]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :41:27) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x711 = x10 - x131; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :41:27) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x712 = x710 + x711 * poly_mix[6]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :42:26) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x713 = x32 - x33; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :42:26) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg2[382] = x713; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :42:26) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x714 = x712 + x713 * poly_mix[7]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :43:27) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x715 = x32 - x82; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :43:27) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg2[390] = x715; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :43:27) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x716 = x714 + x715 * poly_mix[8]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :44:23) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x717 = x32 - x49; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :44:23) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg2[391] = x717; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :44:23) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x718 = x716 + x717 * poly_mix[9]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :45:22) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x719 = x682 - x132; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :45:22) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x720 = x718 + x719 * poly_mix[10]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x721 = x32 - x133; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg2[392] = x721; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x722 = x720 + x721 * poly_mix[11]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x723 = x32 - x134; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg2[393] = x723; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x724 = x722 + x723 * poly_mix[12]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x725 = x32 - x83; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg2[394] = x725; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x726 = x724 + x725 * poly_mix[13]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x727 = x32 - x35; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg2[395] = x727; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x728 = x726 + x727 * poly_mix[14]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x729 = x32 - x37; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg2[396] = x729; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x730 = x728 + x729 * poly_mix[15]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x731 = x32 - x39; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg2[397] = x731; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x732 = x730 + x731 * poly_mix[16]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x733 = x32 - x50; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg2[398] = x733; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x734 = x732 + x733 * poly_mix[17]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x735 = x32 - x135; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg2[399] = x735; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x736 = x734 + x735 * poly_mix[18]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x737 = x32 - x136; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg2[400] = x737; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x738 = x736 + x737 * poly_mix[19]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x739 = x32 - x137; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg2[401] = x739; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x740 = x738 + x739 * poly_mix[20]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x741 = x32 - x40; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg2[402] = x741; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x742 = x740 + x741 * poly_mix[21]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x743 = x32 - x53; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg2[403] = x743; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x744 = x742 + x743 * poly_mix[22]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x745 = x32 - x52; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg2[404] = x745; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x746 = x744 + x745 * poly_mix[23]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x747 = x32 - x41; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg2[405] = x747; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x748 = x746 + x747 * poly_mix[24]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x749 = x32 - x56; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg2[406] = x749; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x750 = x748 + x749 * poly_mix[25]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x751 = x32 - x138; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg2[407] = x751; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x752 = x750 + x751 * poly_mix[26]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x753 = x32 - x139; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg2[408] = x753; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x754 = x752 + x753 * poly_mix[27]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x755 = x32 - x140; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg2[409] = x755; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x756 = x754 + x755 * poly_mix[28]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x757 = x32 - x42; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg2[410] = x757; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x758 = x756 + x757 * poly_mix[29]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x759 = x32 - x58; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg2[411] = x759; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x760 = x758 + x759 * poly_mix[30]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x761 = x32 - x59; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg2[412] = x761; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x762 = x760 + x761 * poly_mix[31]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x763 = x32 - x84; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg2[413] = x763; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x764 = x762 + x763 * poly_mix[32]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x765 = x32 - x141; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg2[414] = x765; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x766 = x764 + x765 * poly_mix[33]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x767 = x32 - x85; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg2[415] = x767; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x768 = x766 + x767 * poly_mix[34]; - // loc(callsite(unknown at callsite( ExtReg ( :10:24) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :48:27) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x769 = x44 * x9; - // loc(callsite(unknown at callsite( ExtReg ( :10:24) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :48:27) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x770 = x51 + x769; - // loc(callsite(unknown at callsite( ExtReg ( :10:24) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :48:27) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x771 = x770 * x9; - // loc(callsite(unknown at callsite( ExtReg ( :10:24) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :48:27) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x772 = x43 + x771; - // loc(callsite(unknown at callsite( ExtReg ( :10:24) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :48:27) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x773 = x772 * x9; - // loc(callsite(unknown at callsite( ExtReg ( :10:24) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :48:27) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x774 = x142 + x773; - // loc(callsite(unknown at callsite( ExtReg ( :10:24) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :48:27) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg6[1] = x774; - // loc(callsite(unknown at callsite( ExtReg ( :11:18) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :48:27) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x775 = x774 - x8; - // loc(callsite(unknown at callsite( ExtReg ( :11:18) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :48:27) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg6[2] = x775; - // loc(callsite(unknown at callsite( ExtReg ( :11:11) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :48:27) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x776 = x768 + x775 * poly_mix[35]; - // loc(callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :132:4) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x777 = x776 + x57 * poly_mix[36]; - // loc(callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :132:4) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x778 = x777 + x114 * poly_mix[37]; - // loc(callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :132:4) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x779 = x778 + x143 * poly_mix[38]; - // loc(callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :132:4) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x780 = x779 + x144 * poly_mix[39]; - // loc(callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :132:4) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x781 = x780 + x145 * poly_mix[40]; - // loc(callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :132:4) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x782 = x781 + x61 * poly_mix[41]; - // loc(callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :132:4) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x783 = x782 + x66 * poly_mix[42]; - // loc(callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :132:4) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x784 = x783 + x68 * poly_mix[43]; - // loc(callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :132:4) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x785 = x784 + x146 * poly_mix[44]; - // loc(callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :132:4) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x786 = x785 + x147 * poly_mix[45]; - // loc(callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :132:4) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x787 = x786 + x148 * poly_mix[46]; - // loc(callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :132:4) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x788 = x787 + x149 * poly_mix[47]; - // loc(callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :132:4) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x789 = x698 + x126 * x788 * poly_mix[4]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :84:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x790 = x57 - x25; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :84:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg2[447] = x790; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :84:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x791 = arg3 + x790 * poly_mix[0]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :84:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x792 = x114 - x28; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :84:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg2[448] = x792; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :84:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x793 = x791 + x792 * poly_mix[1]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :84:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x794 = x793 + x32 * poly_mix[2]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :84:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x795 = x794 + x32 * poly_mix[3]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :84:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x796 = x45 - x31; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :84:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x797 = x795 + x796 * poly_mix[4]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :84:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x798 = x46 - x115; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :84:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg2[342] = x798; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :84:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x799 = x797 + x798 * poly_mix[5]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :11:25) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x800 = arg2[285]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :84:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x801 = x799 + x800 * poly_mix[6]; - // loc(callsite(unknown at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :84:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x802 = x150 - x54; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :84:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x803 = x146 - x28; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :84:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - arg2[343] = x803; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :84:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x804 = x801 + x803 * poly_mix[7]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :84:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x805 = x151 - x802; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :84:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - arg2[344] = x805; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :84:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x806 = x804 + x805 * poly_mix[8]; - // loc(callsite(unknown at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :79:11) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :84:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x807 = x116 * x15; - // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :79:34) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :84:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x808 = x115 * x7; - // loc(callsite(unknown at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :79:18) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :84:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x809 = x807 + x808; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :85:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x810 = x143 - x25; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :85:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg2[345] = x810; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :85:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x811 = x806 + x810 * poly_mix[9]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :85:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x812 = x144 - x28; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :85:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg2[346] = x812; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :85:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x813 = x811 + x812 * poly_mix[10]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :85:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x814 = x813 + x32 * poly_mix[11]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :85:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x815 = x814 + x32 * poly_mix[12]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :85:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x816 = x152 - x30; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :85:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x817 = x815 + x816 * poly_mix[13]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :85:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x818 = x153 - x154; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :85:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg2[348] = x818; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :85:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x819 = x817 + x818 * poly_mix[14]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x820 = arg2[287]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :85:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x821 = x819 + x820 * poly_mix[15]; - // loc(callsite(unknown at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :85:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x822 = x150 - x155; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :85:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x823 = x147 - x28; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :85:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - arg2[349] = x823; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :85:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x824 = x821 + x823 * poly_mix[16]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :85:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x825 = x156 - x822; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :85:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - arg2[350] = x825; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :85:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x826 = x824 + x825 * poly_mix[17]; - // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :79:34) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :85:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x827 = x154 * x7; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :47:15) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x828 = arg2[331]; - // loc(callsite(unknown at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :79:18) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :85:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x829 = x828 + x827; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :86:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x830 = x145 - x25; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :86:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg2[351] = x830; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :86:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x831 = x826 + x830 * poly_mix[18]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :69:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x832 = arg2[332]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :86:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x833 = x831 + x832 * poly_mix[19]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :86:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x834 = x833 + x32 * poly_mix[20]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :86:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x835 = x834 + x32 * poly_mix[21]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :86:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x836 = x64 - x29; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :86:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x837 = x835 + x836 * poly_mix[22]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :86:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x838 = x63 - x65; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :86:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg2[353] = x838; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :86:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x839 = x837 + x838 * poly_mix[23]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x840 = arg2[289]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :86:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x841 = x839 + x840 * poly_mix[24]; - // loc(callsite(unknown at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :86:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x842 = x150 - x62; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :86:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x843 = x148 - x28; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :86:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - arg2[354] = x843; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :86:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x844 = x841 + x843 * poly_mix[25]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :86:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x845 = x157 - x842; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :86:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - arg2[355] = x845; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :86:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x846 = x844 + x845 * poly_mix[26]; - // loc(callsite(unknown at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :79:11) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :86:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x847 = x158 * x15; - // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :79:34) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :86:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x848 = x65 * x7; - // loc(callsite(unknown at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :79:18) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :86:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x849 = x847 + x848; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x850 = arg2[333]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :87:30) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x851 = x846 + x850 * poly_mix[27]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x852 = arg2[265]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :87:30) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x853 = x851 + x852 * poly_mix[28]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :87:30) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x854 = x853 + x32 * poly_mix[29]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :87:30) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x855 = x854 + x32 * poly_mix[30]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :87:30) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x856 = x72 - x6; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :87:30) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x857 = x855 + x856 * poly_mix[31]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x858 = arg2[334]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :87:30) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x859 = x857 + x858 * poly_mix[32]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :87:30) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x860 = x67 - x74; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :87:30) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg2[356] = x860; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :87:30) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x861 = x859 + x860 * poly_mix[33]; - // loc(callsite(unknown at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :87:30) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x862 = x150 - x71; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :87:30) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x863 = x149 - x28; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :87:30) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg2[357] = x863; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :87:30) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x864 = x861 + x863 * poly_mix[34]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :87:30) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x865 = x159 - x862; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :87:30) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg2[358] = x865; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :87:30) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x866 = x864 + x865 * poly_mix[35]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :90:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x867 = x28 - x160; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :90:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg2[426] = x867; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :90:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x868 = x160 * x867; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :90:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg2[340] = x868; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :90:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x869 = x866 + x868 * poly_mix[36]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:4) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :90:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x870 = x809 * x161; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :90:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x871 = x870 - x867; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :90:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x872 = x869 + x871 * poly_mix[37]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:4) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :90:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x873 = x160 * x809; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:17) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :90:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x874 = x872 + x873 * poly_mix[38]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:4) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :90:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x875 = x160 * x161; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:4) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :90:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg2[427] = x875; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:17) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :90:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x876 = x874 + x875 * poly_mix[39]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :94:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x877 = x28 - x162; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :94:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x878 = x162 * x877; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :94:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg2[341] = x878; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :94:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x879 = x876 + x878 * poly_mix[40]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :95:28) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x880 = x28 - x163; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :95:28) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x881 = x163 * x880; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :95:28) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg2[458] = x881; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :95:28) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x882 = x879 + x881 * poly_mix[41]; - // loc(callsite(unknown at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :96:24) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x883 = x162 * x5; - // loc(callsite(unknown at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :96:42) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x884 = x163 * x15; - // loc(callsite(unknown at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :96:33) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x885 = x883 + x884; - // loc(callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :96:22) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x886 = x74 - x885; - // loc(callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :96:22) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x887 = x882 + x886 * poly_mix[42]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :99:23) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x888 = x28 - x164; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :99:23) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x889 = x164 * x888; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :99:23) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg2[459] = x889; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :99:23) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x890 = x887 + x889 * poly_mix[43]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:4) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :99:23) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x891 = x70 * x165; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :99:23) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x892 = x891 - x888; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :99:23) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x893 = x890 + x892 * poly_mix[44]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:4) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :99:23) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x894 = x164 * x70; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:17) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :99:23) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x895 = x893 + x894 * poly_mix[45]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:4) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :99:23) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x896 = x164 * x165; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:17) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :99:23) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x897 = x895 + x896 * poly_mix[46]; - // loc(callsite(unknown at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :101:6) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x898 = x164 * x18; - // loc(callsite(unknown at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :102:20) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x899 = x888 * x867; - // loc(callsite(unknown at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :102:24) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x900 = x899 * x4; - // loc(callsite(unknown at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :101:30) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x901 = x898 + x900; - // loc(callsite(unknown at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :103:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x902 = x28 - x867; - // loc(callsite(unknown at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :103:20) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x903 = x888 * x902; - // loc(callsite(unknown at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :103:37) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x904 = x903 * x3; - // loc(callsite(unknown at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :102:58) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x905 = x901 + x904; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :34:26) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :105:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x906 = x867 - x80; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :34:26) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :105:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x907 = x897 + x906 * poly_mix[47]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :35:27) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :105:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x908 = x809 - x48; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :35:27) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :105:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x909 = x907 + x908 * poly_mix[48]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :36:28) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :105:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x910 = x849 - x128; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :36:28) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :105:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x911 = x909 + x910 * poly_mix[49]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :37:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :105:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x912 = x162 - x129; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :37:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :105:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x913 = x911 + x912 * poly_mix[50]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :38:26) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :105:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x914 = x163 - x130; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :38:26) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :105:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x915 = x913 + x914 * poly_mix[51]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :39:28) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :105:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x916 = x32 - x81; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :39:28) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :105:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg2[389] = x916; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :39:28) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :105:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x917 = x915 + x916 * poly_mix[52]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :41:27) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :105:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x918 = x905 - x131; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :41:27) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :105:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x919 = x917 + x918 * poly_mix[53]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :42:26) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :105:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x920 = x919 + x713 * poly_mix[54]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :43:27) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :105:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x921 = x829 - x82; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :43:27) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :105:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x922 = x920 + x921 * poly_mix[55]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :44:23) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :105:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x923 = x70 - x49; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :44:23) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :105:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x924 = x922 + x923 * poly_mix[56]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :45:22) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :105:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x925 = x924 + x719 * poly_mix[57]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :105:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x926 = x925 + x721 * poly_mix[58]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :105:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x927 = x926 + x723 * poly_mix[59]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :105:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x928 = x927 + x725 * poly_mix[60]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :105:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x929 = x928 + x727 * poly_mix[61]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :105:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x930 = x929 + x729 * poly_mix[62]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :105:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x931 = x930 + x731 * poly_mix[63]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :105:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x932 = x931 + x733 * poly_mix[64]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :105:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x933 = x932 + x735 * poly_mix[65]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :105:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x934 = x933 + x737 * poly_mix[66]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :105:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x935 = x934 + x739 * poly_mix[67]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :105:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x936 = x935 + x741 * poly_mix[68]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :105:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x937 = x936 + x743 * poly_mix[69]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :105:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x938 = x937 + x745 * poly_mix[70]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :105:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x939 = x938 + x747 * poly_mix[71]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :105:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x940 = x939 + x749 * poly_mix[72]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :105:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x941 = x940 + x751 * poly_mix[73]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :105:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x942 = x941 + x753 * poly_mix[74]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :105:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x943 = x942 + x755 * poly_mix[75]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :105:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x944 = x943 + x757 * poly_mix[76]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :105:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x945 = x944 + x759 * poly_mix[77]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :105:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x946 = x945 + x761 * poly_mix[78]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :105:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x947 = x946 + x763 * poly_mix[79]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :105:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x948 = x947 + x765 * poly_mix[80]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :105:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x949 = x948 + x767 * poly_mix[81]; - // loc(callsite(unknown at callsite( ExtReg ( :11:11) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :48:27) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :105:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x950 = x949 + x775 * poly_mix[82]; - // loc(callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :132:4) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x951 = x789 + x688 * x950 * poly_mix[52]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x952 = x951 + x73 * poly_mix[135]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x953 = x952 + x89 * poly_mix[136]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x954 = x953 + x117 * poly_mix[137]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x955 = x954 + x122 * poly_mix[138]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x956 = x955 + x124 * poly_mix[139]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x957 = x956 + x166 * poly_mix[140]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x958 = x957 + x167 * poly_mix[141]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x959 = x958 + x168 * poly_mix[142]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x960 = x959 + x169 * poly_mix[143]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x961 = x960 + x170 * poly_mix[144]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x962 = x961 + x171 * poly_mix[145]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x963 = x962 + x172 * poly_mix[146]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x964 = x963 + x173 * poly_mix[147]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x965 = x964 + x174 * poly_mix[148]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x966 = x965 + x175 * poly_mix[149]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x967 = x966 + x176 * poly_mix[150]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x968 = x967 + x177 * poly_mix[151]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x969 = x968 + x178 * poly_mix[152]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x970 = x969 + x179 * poly_mix[153]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x971 = x970 + x180 * poly_mix[154]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x972 = x971 + x181 * poly_mix[155]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x973 = x972 + x182 * poly_mix[156]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x974 = x973 + x183 * poly_mix[157]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x975 = x974 + x184 * poly_mix[158]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x976 = x975 + x185 * poly_mix[159]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x977 = x976 + x186 * poly_mix[160]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x978 = x977 + x187 * poly_mix[161]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x979 = x978 + x188 * poly_mix[162]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x980 = x979 + x189 * poly_mix[163]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x981 = x980 + x190 * poly_mix[164]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x982 = arg3 + x100 * x981 * poly_mix[0]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x983 = x45 - x191; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg2[473] = x983; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x984 = x795 + x983 * poly_mix[4]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x985 = x984 + x798 * poly_mix[5]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x986 = x985 + x800 * poly_mix[6]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x987 = x986 + x803 * poly_mix[7]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x988 = x987 + x805 * poly_mix[8]; - // loc(callsite(unknown at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :141:11) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x989 = x116 * x14; - // loc(callsite(unknown at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :141:18) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x990 = x989 + x115; - // loc(callsite(unknown at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :141:18) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - arg2[416] = x990; - // loc(callsite(unknown at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:27) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x991 = x191 + x28; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x992 = x988 + x810 * poly_mix[9]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x993 = x992 + x812 * poly_mix[10]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x994 = x993 + x32 * poly_mix[11]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x995 = x994 + x32 * poly_mix[12]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x996 = x152 - x991; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg2[474] = x996; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x997 = x995 + x996 * poly_mix[13]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x998 = x997 + x818 * poly_mix[14]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x999 = x998 + x820 * poly_mix[15]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1000 = x999 + x823 * poly_mix[16]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1001 = x1000 + x825 * poly_mix[17]; - // loc(callsite(unknown at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :141:11) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1002 = x192 * x14; - // loc(callsite(unknown at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :141:18) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1003 = x1002 + x154; - // loc(callsite(unknown at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :141:18) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - arg2[417] = x1003; - // loc(callsite(unknown at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:27) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x1004 = x191 + x27; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1005 = x1001 + x830 * poly_mix[18]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1006 = x1005 + x832 * poly_mix[19]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1007 = x1006 + x32 * poly_mix[20]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1008 = x1007 + x32 * poly_mix[21]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1009 = x64 - x1004; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg2[475] = x1009; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1010 = x1008 + x1009 * poly_mix[22]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1011 = x1010 + x838 * poly_mix[23]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1012 = x1011 + x840 * poly_mix[24]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1013 = x1012 + x843 * poly_mix[25]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1014 = x1013 + x845 * poly_mix[26]; - // loc(callsite(unknown at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :141:11) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1015 = x158 * x14; - // loc(callsite(unknown at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :141:18) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1016 = x1015 + x65; - // loc(callsite(unknown at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :141:18) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - arg2[418] = x1016; - // loc(callsite(unknown at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:27) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x1017 = x191 + x26; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1018 = x1014 + x850 * poly_mix[27]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1019 = x1018 + x852 * poly_mix[28]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1020 = x1019 + x32 * poly_mix[29]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1021 = x1020 + x32 * poly_mix[30]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1022 = x72 - x1017; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg2[476] = x1022; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1023 = x1021 + x1022 * poly_mix[31]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1024 = x1023 + x858 * poly_mix[32]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1025 = x1024 + x860 * poly_mix[33]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1026 = x1025 + x863 * poly_mix[34]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1027 = x1026 + x865 * poly_mix[35]; - // loc(callsite(unknown at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :141:11) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1028 = x74 * x14; - // loc(callsite(unknown at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :141:18) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1029 = x1028 + x70; - // loc(callsite(unknown at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :141:18) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - arg2[419] = x1029; - // loc(callsite(unknown at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:27) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x1030 = x191 + x23; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1031 = x73 - x25; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg2[359] = x1031; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1032 = x1027 + x1031 * poly_mix[36]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1033 = arg2[230]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1034 = x1032 + x1033 * poly_mix[37]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1035 = x1034 + x32 * poly_mix[38]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1036 = x1035 + x32 * poly_mix[39]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1037 = x75 - x1030; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg2[477] = x1037; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1038 = x1036 + x1037 * poly_mix[40]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1039 = x77 - x91; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg2[360] = x1039; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1040 = x1038 + x1039 * poly_mix[41]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :11:25) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1041 = arg2[335]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1042 = x1040 + x1041 * poly_mix[42]; - // loc(callsite(unknown at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1043 = x150 - x76; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1044 = x169 - x28; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg2[361] = x1044; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1045 = x1042 + x1044 * poly_mix[43]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1046 = x193 - x1043; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg2[362] = x1046; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1047 = x1045 + x1046 * poly_mix[44]; - // loc(callsite(unknown at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :141:11) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1048 = x92 * x14; - // loc(callsite(unknown at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :141:18) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1049 = x1048 + x91; - // loc(callsite(unknown at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :141:18) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - arg2[420] = x1049; - // loc(callsite(unknown at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:27) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x1050 = x191 + x2; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :11:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1051 = arg2[231]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1052 = x1047 + x1051 * poly_mix[45]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :60:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1053 = arg2[260]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1054 = x1052 + x1053 * poly_mix[46]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1055 = x1054 + x32 * poly_mix[47]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1056 = x1055 + x32 * poly_mix[48]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1057 = x118 - x1050; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg2[478] = x1057; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1058 = x1056 + x1057 * poly_mix[49]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :11:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1059 = arg2[234]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1060 = x1058 + x1059 * poly_mix[50]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1061 = arg2[336]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1062 = x1060 + x1061 * poly_mix[51]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1063 = x170 - x28; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg2[363] = x1063; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1064 = x1062 + x1063 * poly_mix[52]; - // loc(callsite(unknown at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:22) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :60:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1065 = arg2[337]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1066 = x194 - x1065; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg2[364] = x1066; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1067 = x1064 + x1066 * poly_mix[53]; - // loc(callsite(unknown at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :141:11) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1068 = x195 * x14; - // loc(callsite(unknown at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :141:18) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1069 = x1068 + x121; - // loc(callsite(unknown at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :141:18) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - arg2[422] = x1069; - // loc(callsite(unknown at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:27) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x1070 = x191 + x1; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1071 = x124 - x25; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg2[365] = x1071; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1072 = x1067 + x1071 * poly_mix[54]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :61:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x1073 = arg2[338]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1074 = x1072 + x1073 * poly_mix[55]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1075 = x1074 + x32 * poly_mix[56]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1076 = x1075 + x32 * poly_mix[57]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1077 = x123 - x1070; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg2[479] = x1077; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1078 = x1076 + x1077 * poly_mix[58]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1079 = x196 - x197; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg2[366] = x1079; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1080 = x1078 + x1079 * poly_mix[59]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1081 = x198 - x199; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg2[367] = x1081; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1082 = x1080 + x1081 * poly_mix[60]; - // loc(callsite(unknown at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1083 = x150 - x200; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1084 = x171 - x28; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg2[368] = x1084; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1085 = x1082 + x1084 * poly_mix[61]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1086 = x201 - x1083; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg2[369] = x1086; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1087 = x1085 + x1086 * poly_mix[62]; - // loc(callsite(unknown at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:27) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x1088 = x191 + x0; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1089 = x167 - x25; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg2[370] = x1089; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1090 = x1087 + x1089 * poly_mix[63]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1091 = x168 - x28; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg2[371] = x1091; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1092 = x1090 + x1091 * poly_mix[64]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1093 = x1092 + x32 * poly_mix[65]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1094 = x1093 + x32 * poly_mix[66]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1095 = x202 - x1088; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg2[480] = x1095; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1096 = x1094 + x1095 * poly_mix[67]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1097 = x203 - x204; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg2[372] = x1097; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1098 = x1096 + x1097 * poly_mix[68]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1099 = x205 - x206; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg2[373] = x1099; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1100 = x1098 + x1099 * poly_mix[69]; - // loc(callsite(unknown at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1101 = x150 - x207; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1102 = x172 - x28; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg2[374] = x1102; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1103 = x1100 + x1102 * poly_mix[70]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1104 = x208 - x1101; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg2[375] = x1104; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1105 = x1103 + x1104 * poly_mix[71]; - // loc(callsite(unknown at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :141:11) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1106 = x206 * x14; - // loc(callsite(unknown at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :141:18) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1107 = x1106 + x204; - // loc(callsite(unknown at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :141:18) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - arg2[425] = x1107; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :34:26) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1108 = x209 - x80; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :34:26) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - arg2[376] = x1108; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :34:26) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1109 = x1105 + x1108 * poly_mix[72]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :35:27) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1110 = x191 - x48; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :35:27) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - arg2[377] = x1110; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :35:27) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1111 = x1109 + x1110 * poly_mix[73]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :36:28) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1112 = x210 - x128; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :36:28) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - arg2[378] = x1112; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :36:28) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1113 = x1111 + x1112 * poly_mix[74]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :37:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1114 = x211 - x129; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :37:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - arg2[379] = x1114; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :37:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1115 = x1113 + x1114 * poly_mix[75]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :38:26) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1116 = x212 - x130; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :38:26) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - arg2[380] = x1116; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :38:26) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1117 = x1115 + x1116 * poly_mix[76]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :39:28) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1118 = x213 - x81; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :39:28) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - arg2[381] = x1118; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :39:28) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1119 = x1117 + x1118 * poly_mix[77]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :41:27) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1120 = x3 - x131; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :41:27) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - arg2[385] = x1120; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :41:27) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1121 = x1119 + x1120 * poly_mix[78]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :42:26) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1122 = x1121 + x713 * poly_mix[79]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :43:27) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1123 = x214 - x82; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :43:27) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - arg2[537] = x1123; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :43:27) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1124 = x1122 + x1123 * poly_mix[80]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :44:23) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1125 = x215 - x49; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :44:23) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - arg2[383] = x1125; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :44:23) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1126 = x1124 + x1125 * poly_mix[81]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :45:22) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1127 = x216 - x132; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :45:22) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - arg2[384] = x1127; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :45:22) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1128 = x1126 + x1127 * poly_mix[82]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1129 = x1128 + x721 * poly_mix[83]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1130 = x1129 + x723 * poly_mix[84]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1131 = x1130 + x725 * poly_mix[85]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1132 = x1131 + x727 * poly_mix[86]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1133 = x1132 + x729 * poly_mix[87]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1134 = x1133 + x731 * poly_mix[88]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1135 = x1134 + x733 * poly_mix[89]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1136 = x1135 + x735 * poly_mix[90]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1137 = x1136 + x737 * poly_mix[91]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1138 = x1137 + x739 * poly_mix[92]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1139 = x1138 + x741 * poly_mix[93]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1140 = x1139 + x743 * poly_mix[94]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1141 = x1140 + x745 * poly_mix[95]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1142 = x1141 + x747 * poly_mix[96]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1143 = x1142 + x749 * poly_mix[97]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1144 = x1143 + x751 * poly_mix[98]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1145 = x990 - x139; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1146 = x1144 + x1145 * poly_mix[99]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1147 = x1003 - x140; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1148 = x1146 + x1147 * poly_mix[100]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1149 = x1016 - x42; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1150 = x1148 + x1149 * poly_mix[101]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1151 = x1029 - x58; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1152 = x1150 + x1151 * poly_mix[102]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1153 = x1049 - x59; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1154 = x1152 + x1153 * poly_mix[103]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1155 = x1069 - x84; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1156 = x1154 + x1155 * poly_mix[104]; - // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:23) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :61:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x1157 = arg2[339]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1158 = x1157 - x141; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1159 = x1156 + x1158 * poly_mix[105]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1160 = x1107 - x85; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1161 = x1159 + x1160 * poly_mix[106]; - // loc(callsite(unknown at callsite( ExtReg ( :11:11) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :48:27) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1162 = x1161 + x775 * poly_mix[107]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1163 = x1162 + x173 * poly_mix[108]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1164 = x1163 + x174 * poly_mix[109]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1165 = x1164 + x175 * poly_mix[110]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1166 = x1165 + x176 * poly_mix[111]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1167 = x1166 + x177 * poly_mix[112]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1168 = x1167 + x178 * poly_mix[113]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1169 = x1168 + x179 * poly_mix[114]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1170 = x1169 + x180 * poly_mix[115]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1171 = x1170 + x181 * poly_mix[116]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1172 = x1171 + x182 * poly_mix[117]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1173 = x1172 + x183 * poly_mix[118]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1174 = x1173 + x184 * poly_mix[119]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1175 = x1174 + x185 * poly_mix[120]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1176 = x1175 + x186 * poly_mix[121]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1177 = x1176 + x187 * poly_mix[122]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1178 = x1177 + x188 * poly_mix[123]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1179 = x1178 + x189 * poly_mix[124]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1180 = x1179 + x190 * poly_mix[125]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1181 = x982 + x47 * x1180 * poly_mix[165]; - // loc(callsite(unknown at callsite( ExtReg ( :10:24) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :48:27) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1182 = x217 * x9; - // loc(callsite(unknown at callsite( ExtReg ( :10:24) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :48:27) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1183 = x218 + x1182; - // loc(callsite(unknown at callsite( ExtReg ( :10:24) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :48:27) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1184 = x1183 * x9; - // loc(callsite(unknown at callsite( ExtReg ( :10:24) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :48:27) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1185 = x219 + x1184; - // loc(callsite(unknown at callsite( ExtReg ( :10:24) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :48:27) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1186 = x1185 * x9; - // loc(callsite(unknown at callsite( ExtReg ( :10:24) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :48:27) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1187 = x220 + x1186; - // loc(callsite(unknown at callsite( ExtReg ( :10:24) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :48:27) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - arg6[0] = x1187; - // loc(callsite(unknown at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :232:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x1188 = x211 + x221; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :233:13) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1189 = arg3 + x881 * poly_mix[0]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :233:13) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1190 = x1189 + x889 * poly_mix[1]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :233:13) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1191 = x28 - x165; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :233:13) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1192 = x165 * x1191; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :233:13) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg2[460] = x1192; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :233:13) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1193 = x1190 + x1192 * poly_mix[2]; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:4) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :233:13) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1194 = x163 + x164; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:4) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :233:13) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1195 = x1194 + x165; - // loc(callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:32) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :233:13) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x1196 = x1195 - x28; - // loc(callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:32) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :233:13) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x1197 = x1193 + x1196 * poly_mix[3]; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:32) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :233:13) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1198 = x165 * x27; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:4) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :233:13) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1199 = x164 + x1198; - // loc(callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:56) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :233:13) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x1200 = x1199 - x1188; - // loc(callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:56) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :233:13) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x1201 = x1197 + x1200 * poly_mix[4]; - // loc(callsite(unknown at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:28) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1202 = x214 + x28; - // loc(callsite(unknown at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:28) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - arg2[347] = x1202; - // loc(callsite(unknown at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:28) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1203 = x214 + x27; - // loc(callsite(unknown at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:28) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - arg2[352] = x1203; - // loc(unknown) - auto x1204 = rv32im_v2_6(cycle, steps, poly_mix, arg2, arg3, x795, arg6, x1201, x1181, arg7, x702, x681, arg8, arg9, arg10, arg11); - return x1204; -} -FpExt rv32im_v2_3(size_t cycle, size_t steps, FpExt* poly_mix, Fp* arg0, FpExt arg1, FpExt* arg2, FpExt arg3, FpExt arg4, FpExt arg5, FpExt arg6, Fp* arg7, Fp* arg8, Fp* arg9) { - size_t mask = steps - 1; - // loc(unknown) - constexpr Fp x0(1199068823); - // loc(unknown) - constexpr Fp x1(1240419708); - // loc(unknown) - constexpr Fp x2(1708681573); - // loc(unknown) - constexpr Fp x3(308575117); - // loc(unknown) - constexpr Fp x4(1111544260); - // loc(unknown) - constexpr Fp x5(822033215); - // loc(unknown) - constexpr Fp x6(1891545577); - // loc(unknown) - constexpr Fp x7(440300254); - // loc(unknown) - constexpr Fp x8(1726563304); - // loc(unknown) - constexpr Fp x9(1365519753); - // loc(unknown) - constexpr Fp x10(924863639); - // loc(unknown) - constexpr Fp x11(1558116381); - // loc(unknown) - constexpr Fp x12(1942928017); - // loc(unknown) - constexpr Fp x13(1928969209); - // loc(unknown) - constexpr Fp x14(51866717); - // loc(unknown) - constexpr Fp x15(658182609); - // loc(unknown) - constexpr Fp x16(1867716110); - // loc(unknown) - constexpr Fp x17(111593398); - // loc(unknown) - constexpr Fp x18(375892129); - // loc(unknown) - constexpr Fp x19(1083257840); - // loc(unknown) - constexpr Fp x20(20525701); - // loc(unknown) - constexpr Fp x21(1188752902); - // loc(unknown) - constexpr Fp x22(106789798); - // loc(unknown) - constexpr Fp x23(1389833583); - // loc(unknown) - constexpr Fp x24(98371040); - // loc(unknown) - constexpr Fp x25(1001081699); - // loc(unknown) - constexpr Fp x26(1792686146); - // loc(unknown) - constexpr Fp x27(801504236); - // loc(unknown) - constexpr Fp x28(1997365680); - // loc(unknown) - constexpr Fp x29(1461037801); - // loc(unknown) - constexpr Fp x30(65998480); - // loc(unknown) - constexpr Fp x31(1974912880); - // loc(unknown) - constexpr Fp x32(606789471); - // loc(unknown) - constexpr Fp x33(13683276); - // loc(unknown) - constexpr Fp x34(918610824); - // loc(unknown) - constexpr Fp x35(1540960371); - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :26:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x36 = arg7[73 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :25:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x37 = arg7[72 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x38 = arg7[75 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :27:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x39 = arg7[74 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :34:30) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x40 = arg7[77 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :29:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x41 = arg7[76 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :63:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x42 = arg7[79 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x43 = arg7[78 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :65:23) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x44 = arg7[81 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :28:29) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :65:23) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x45 = arg7[80 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :11:20) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x46 = arg7[83 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :8:23) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x47 = arg7[82 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :69:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x48 = arg7[85 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :28:29) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :69:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x49 = arg7[84 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :25:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x50 = arg7[87 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :26:28) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x51 = arg7[86 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x52 = arg7[89 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :27:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x53 = arg7[88 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :25:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x54 = arg7[91 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x55 = arg7[90 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x56 = arg7[93 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x57 = arg7[92 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( CycleArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :55:29) at callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :60:19) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x58 = arg7[95 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( CycleArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :54:29) at callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :60:19) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x59 = arg7[94 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x60 = arg0[539]; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x61 = arg0[540]; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x62 = x60 + x61; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x63 = arg0[541]; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x64 = x63 * x20; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x65 = x60 + x64; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x66 = arg0[542]; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x67 = x66 * x21; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x68 = x60 + x67; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x69 = arg0[543]; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x70 = x69 * x22; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x71 = x60 + x70; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x72 = arg0[544]; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x73 = x72 * x23; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x74 = x60 + x73; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x75 = arg0[545]; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x76 = x75 * x24; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x77 = x60 + x76; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x78 = arg0[546]; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x79 = x78 * x25; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x80 = x60 + x79; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x81 = arg0[547]; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x82 = x81 * x26; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x83 = x60 + x82; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x84 = arg0[548]; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x85 = x84 * x27; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x86 = x60 + x85; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x87 = arg0[549]; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x88 = x87 * x28; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x89 = x60 + x88; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x90 = arg0[550]; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x91 = x90 * x29; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x92 = x60 + x91; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x93 = arg0[551]; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x94 = x93 * x30; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x95 = x60 + x94; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x96 = arg0[552]; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x97 = x96 * x31; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x98 = x60 + x97; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x99 = arg0[553]; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x100 = x99 * x32; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x101 = x60 + x100; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x102 = arg0[554]; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x103 = x102 * x33; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x104 = x60 + x103; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x105 = arg0[555]; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x106 = x105 * x34; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x107 = x60 + x106; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x108 = arg0[556]; - // loc(callsite(unknown at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :31:13) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x109 = x108 + x35; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:17) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x110 = x109 * x109; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:22) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x111 = x110 * x109; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x112 = x111 - x36; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x113 = arg1 + x112 * poly_mix[6]; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:15) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x114 = arg0[557]; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:23) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x115 = x114 * x109; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x116 = x115 - x37; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x117 = x113 + x116 * poly_mix[7]; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x118 = arg0[558]; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x119 = x37 + x118; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x120 = arg0[559]; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x121 = x119 + x120; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x122 = arg0[560]; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x123 = x121 + x122; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x124 = arg0[561]; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x125 = x123 + x124; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x126 = arg0[562]; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x127 = x125 + x126; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x128 = arg0[563]; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x129 = x127 + x128; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x130 = arg0[564]; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x131 = x129 + x130; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x132 = x131 + x62; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x133 = x132 + x65; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x134 = x133 + x68; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x135 = x134 + x71; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x136 = x135 + x74; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x137 = x136 + x77; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x138 = x137 + x80; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x139 = x138 + x83; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x140 = x139 + x86; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x141 = x140 + x89; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x142 = x141 + x92; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x143 = x142 + x95; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x144 = x143 + x98; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x145 = x144 + x101; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x146 = x145 + x104; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x147 = x146 + x107; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x148 = x37 * x19; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x149 = x147 + x148; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x150 = x118 * x18; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x151 = x147 + x150; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x152 = x120 * x17; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x153 = x147 + x152; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x154 = x122 * x16; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x155 = x147 + x154; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x156 = x124 * x15; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x157 = x147 + x156; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x158 = x126 * x14; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x159 = x147 + x158; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x160 = x128 * x13; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x161 = x147 + x160; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x162 = x130 * x12; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x163 = x147 + x162; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x164 = x62 * x11; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x165 = x147 + x164; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x166 = x65 * x20; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x167 = x147 + x166; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x168 = x68 * x21; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x169 = x147 + x168; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x170 = x71 * x22; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x171 = x147 + x170; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x172 = x74 * x23; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x173 = x147 + x172; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x174 = x77 * x24; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x175 = x147 + x174; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x176 = x80 * x25; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x177 = x147 + x176; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x178 = x83 * x26; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x179 = x147 + x178; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x180 = x86 * x27; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x181 = x147 + x180; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x182 = x89 * x28; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x183 = x147 + x182; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x184 = x92 * x29; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x185 = x147 + x184; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x186 = x95 * x30; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x187 = x147 + x186; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x188 = x98 * x31; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x189 = x147 + x188; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x190 = x101 * x32; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x191 = x147 + x190; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x192 = x104 * x33; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x193 = x147 + x192; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x194 = x107 * x34; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x195 = x147 + x194; - // loc(callsite(unknown at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :31:13) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x196 = x149 + x10; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:17) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x197 = x196 * x196; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:22) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x198 = x197 * x196; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x199 = x198 - x38; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x200 = x117 + x199 * poly_mix[8]; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:15) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x201 = arg0[565]; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:23) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x202 = x201 * x196; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x203 = x202 - x39; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x204 = x200 + x203 * poly_mix[9]; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x205 = x39 + x151; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x206 = x205 + x153; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x207 = x206 + x155; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x208 = x207 + x157; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x209 = x208 + x159; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x210 = x209 + x161; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x211 = x210 + x163; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x212 = x211 + x165; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x213 = x212 + x167; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x214 = x213 + x169; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x215 = x214 + x171; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x216 = x215 + x173; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x217 = x216 + x175; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x218 = x217 + x177; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x219 = x218 + x179; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x220 = x219 + x181; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x221 = x220 + x183; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x222 = x221 + x185; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x223 = x222 + x187; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x224 = x223 + x189; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x225 = x224 + x191; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x226 = x225 + x193; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x227 = x226 + x195; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x228 = x39 * x19; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x229 = x227 + x228; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x230 = x151 * x18; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x231 = x227 + x230; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x232 = x153 * x17; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x233 = x227 + x232; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x234 = x155 * x16; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x235 = x227 + x234; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x236 = x157 * x15; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x237 = x227 + x236; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x238 = x159 * x14; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x239 = x227 + x238; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x240 = x161 * x13; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x241 = x227 + x240; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x242 = x163 * x12; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x243 = x227 + x242; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x244 = x165 * x11; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x245 = x227 + x244; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x246 = x167 * x20; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x247 = x227 + x246; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x248 = x169 * x21; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x249 = x227 + x248; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x250 = x171 * x22; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x251 = x227 + x250; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x252 = x173 * x23; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x253 = x227 + x252; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x254 = x175 * x24; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x255 = x227 + x254; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x256 = x177 * x25; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x257 = x227 + x256; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x258 = x179 * x26; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x259 = x227 + x258; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x260 = x181 * x27; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x261 = x227 + x260; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x262 = x183 * x28; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x263 = x227 + x262; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x264 = x185 * x29; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x265 = x227 + x264; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x266 = x187 * x30; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x267 = x227 + x266; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x268 = x189 * x31; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x269 = x227 + x268; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x270 = x191 * x32; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x271 = x227 + x270; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x272 = x193 * x33; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x273 = x227 + x272; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x274 = x195 * x34; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x275 = x227 + x274; - // loc(callsite(unknown at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :31:13) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x276 = x229 + x9; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:17) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x277 = x276 * x276; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:22) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x278 = x277 * x276; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x279 = x278 - x40; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x280 = x204 + x279 * poly_mix[10]; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:15) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x281 = arg0[566]; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:23) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x282 = x281 * x276; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x283 = x282 - x41; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x284 = x280 + x283 * poly_mix[11]; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x285 = x41 + x231; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x286 = x285 + x233; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x287 = x286 + x235; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x288 = x287 + x237; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x289 = x288 + x239; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x290 = x289 + x241; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x291 = x290 + x243; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x292 = x291 + x245; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x293 = x292 + x247; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x294 = x293 + x249; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x295 = x294 + x251; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x296 = x295 + x253; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x297 = x296 + x255; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x298 = x297 + x257; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x299 = x298 + x259; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x300 = x299 + x261; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x301 = x300 + x263; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x302 = x301 + x265; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x303 = x302 + x267; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x304 = x303 + x269; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x305 = x304 + x271; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x306 = x305 + x273; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x307 = x306 + x275; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x308 = x41 * x19; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x309 = x307 + x308; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x310 = x231 * x18; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x311 = x307 + x310; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x312 = x233 * x17; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x313 = x307 + x312; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x314 = x235 * x16; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x315 = x307 + x314; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x316 = x237 * x15; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x317 = x307 + x316; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x318 = x239 * x14; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x319 = x307 + x318; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x320 = x241 * x13; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x321 = x307 + x320; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x322 = x243 * x12; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x323 = x307 + x322; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x324 = x245 * x11; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x325 = x307 + x324; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x326 = x247 * x20; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x327 = x307 + x326; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x328 = x249 * x21; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x329 = x307 + x328; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x330 = x251 * x22; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x331 = x307 + x330; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x332 = x253 * x23; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x333 = x307 + x332; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x334 = x255 * x24; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x335 = x307 + x334; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x336 = x257 * x25; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x337 = x307 + x336; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x338 = x259 * x26; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x339 = x307 + x338; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x340 = x261 * x27; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x341 = x307 + x340; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x342 = x263 * x28; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x343 = x307 + x342; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x344 = x265 * x29; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x345 = x307 + x344; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x346 = x267 * x30; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x347 = x307 + x346; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x348 = x269 * x31; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x349 = x307 + x348; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x350 = x271 * x32; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x351 = x307 + x350; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x352 = x273 * x33; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x353 = x307 + x352; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x354 = x275 * x34; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x355 = x307 + x354; - // loc(callsite(unknown at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :31:13) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x356 = x309 + x8; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:17) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x357 = x356 * x356; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:22) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x358 = x357 * x356; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x359 = x358 - x42; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x360 = x284 + x359 * poly_mix[12]; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:15) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x361 = arg0[567]; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:23) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x362 = x361 * x356; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x363 = x362 - x43; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x364 = x360 + x363 * poly_mix[13]; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x365 = x43 + x311; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x366 = x365 + x313; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x367 = x366 + x315; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x368 = x367 + x317; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x369 = x368 + x319; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x370 = x369 + x321; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x371 = x370 + x323; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x372 = x371 + x325; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x373 = x372 + x327; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x374 = x373 + x329; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x375 = x374 + x331; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x376 = x375 + x333; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x377 = x376 + x335; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x378 = x377 + x337; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x379 = x378 + x339; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x380 = x379 + x341; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x381 = x380 + x343; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x382 = x381 + x345; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x383 = x382 + x347; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x384 = x383 + x349; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x385 = x384 + x351; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x386 = x385 + x353; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x387 = x386 + x355; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x388 = x43 * x19; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x389 = x387 + x388; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x390 = x311 * x18; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x391 = x387 + x390; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x392 = x313 * x17; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x393 = x387 + x392; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x394 = x315 * x16; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x395 = x387 + x394; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x396 = x317 * x15; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x397 = x387 + x396; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x398 = x319 * x14; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x399 = x387 + x398; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x400 = x321 * x13; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x401 = x387 + x400; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x402 = x323 * x12; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x403 = x387 + x402; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x404 = x325 * x11; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x405 = x387 + x404; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x406 = x327 * x20; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x407 = x387 + x406; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x408 = x329 * x21; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x409 = x387 + x408; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x410 = x331 * x22; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x411 = x387 + x410; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x412 = x333 * x23; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x413 = x387 + x412; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x414 = x335 * x24; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x415 = x387 + x414; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x416 = x337 * x25; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x417 = x387 + x416; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x418 = x339 * x26; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x419 = x387 + x418; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x420 = x341 * x27; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x421 = x387 + x420; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x422 = x343 * x28; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x423 = x387 + x422; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x424 = x345 * x29; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x425 = x387 + x424; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x426 = x347 * x30; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x427 = x387 + x426; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x428 = x349 * x31; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x429 = x387 + x428; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x430 = x351 * x32; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x431 = x387 + x430; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x432 = x353 * x33; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x433 = x387 + x432; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x434 = x355 * x34; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x435 = x387 + x434; - // loc(callsite(unknown at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :31:13) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x436 = x389 + x7; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:17) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x437 = x436 * x436; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:22) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x438 = x437 * x436; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x439 = x438 - x44; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x440 = x364 + x439 * poly_mix[14]; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:15) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x441 = arg0[568]; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:23) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x442 = x441 * x436; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x443 = x442 - x45; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x444 = x440 + x443 * poly_mix[15]; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x445 = x45 + x391; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x446 = x445 + x393; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x447 = x446 + x395; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x448 = x447 + x397; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x449 = x448 + x399; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x450 = x449 + x401; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x451 = x450 + x403; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x452 = x451 + x405; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x453 = x452 + x407; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x454 = x453 + x409; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x455 = x454 + x411; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x456 = x455 + x413; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x457 = x456 + x415; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x458 = x457 + x417; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x459 = x458 + x419; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x460 = x459 + x421; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x461 = x460 + x423; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x462 = x461 + x425; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x463 = x462 + x427; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x464 = x463 + x429; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x465 = x464 + x431; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x466 = x465 + x433; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x467 = x466 + x435; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x468 = x45 * x19; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x469 = x467 + x468; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x470 = x391 * x18; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x471 = x467 + x470; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x472 = x393 * x17; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x473 = x467 + x472; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x474 = x395 * x16; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x475 = x467 + x474; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x476 = x397 * x15; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x477 = x467 + x476; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x478 = x399 * x14; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x479 = x467 + x478; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x480 = x401 * x13; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x481 = x467 + x480; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x482 = x403 * x12; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x483 = x467 + x482; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x484 = x405 * x11; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x485 = x467 + x484; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x486 = x407 * x20; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x487 = x467 + x486; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x488 = x409 * x21; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x489 = x467 + x488; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x490 = x411 * x22; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x491 = x467 + x490; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x492 = x413 * x23; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x493 = x467 + x492; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x494 = x415 * x24; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x495 = x467 + x494; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x496 = x417 * x25; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x497 = x467 + x496; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x498 = x419 * x26; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x499 = x467 + x498; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x500 = x421 * x27; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x501 = x467 + x500; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x502 = x423 * x28; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x503 = x467 + x502; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x504 = x425 * x29; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x505 = x467 + x504; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x506 = x427 * x30; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x507 = x467 + x506; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x508 = x429 * x31; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x509 = x467 + x508; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x510 = x431 * x32; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x511 = x467 + x510; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x512 = x433 * x33; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x513 = x467 + x512; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x514 = x435 * x34; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x515 = x467 + x514; - // loc(callsite(unknown at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :31:13) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x516 = x469 + x6; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:17) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x517 = x516 * x516; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:22) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x518 = x517 * x516; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x519 = x518 - x46; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x520 = x444 + x519 * poly_mix[16]; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:15) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x521 = arg0[569]; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:23) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x522 = x521 * x516; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x523 = x522 - x47; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x524 = x520 + x523 * poly_mix[17]; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x525 = x47 + x471; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x526 = x525 + x473; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x527 = x526 + x475; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x528 = x527 + x477; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x529 = x528 + x479; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x530 = x529 + x481; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x531 = x530 + x483; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x532 = x531 + x485; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x533 = x532 + x487; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x534 = x533 + x489; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x535 = x534 + x491; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x536 = x535 + x493; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x537 = x536 + x495; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x538 = x537 + x497; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x539 = x538 + x499; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x540 = x539 + x501; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x541 = x540 + x503; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x542 = x541 + x505; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x543 = x542 + x507; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x544 = x543 + x509; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x545 = x544 + x511; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x546 = x545 + x513; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x547 = x546 + x515; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x548 = x47 * x19; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x549 = x547 + x548; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x550 = x471 * x18; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x551 = x547 + x550; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x552 = x473 * x17; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x553 = x547 + x552; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x554 = x475 * x16; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x555 = x547 + x554; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x556 = x477 * x15; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x557 = x547 + x556; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x558 = x479 * x14; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x559 = x547 + x558; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x560 = x481 * x13; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x561 = x547 + x560; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x562 = x483 * x12; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x563 = x547 + x562; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x564 = x485 * x11; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x565 = x547 + x564; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x566 = x487 * x20; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x567 = x547 + x566; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x568 = x489 * x21; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x569 = x547 + x568; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x570 = x491 * x22; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x571 = x547 + x570; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x572 = x493 * x23; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x573 = x547 + x572; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x574 = x495 * x24; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x575 = x547 + x574; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x576 = x497 * x25; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x577 = x547 + x576; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x578 = x499 * x26; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x579 = x547 + x578; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x580 = x501 * x27; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x581 = x547 + x580; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x582 = x503 * x28; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x583 = x547 + x582; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x584 = x505 * x29; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x585 = x547 + x584; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x586 = x507 * x30; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x587 = x547 + x586; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x588 = x509 * x31; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x589 = x547 + x588; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x590 = x511 * x32; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x591 = x547 + x590; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x592 = x513 * x33; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x593 = x547 + x592; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x594 = x515 * x34; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x595 = x547 + x594; - // loc(callsite(unknown at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :31:13) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x596 = x549 + x5; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:17) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x597 = x596 * x596; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:22) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x598 = x597 * x596; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x599 = x598 - x48; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x600 = x524 + x599 * poly_mix[18]; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:15) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x601 = arg0[570]; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:23) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x602 = x601 * x596; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x603 = x602 - x49; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x604 = x600 + x603 * poly_mix[19]; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x605 = x49 + x551; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x606 = x605 + x553; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x607 = x606 + x555; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x608 = x607 + x557; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x609 = x608 + x559; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x610 = x609 + x561; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x611 = x610 + x563; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x612 = x611 + x565; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x613 = x612 + x567; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x614 = x613 + x569; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x615 = x614 + x571; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x616 = x615 + x573; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x617 = x616 + x575; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x618 = x617 + x577; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x619 = x618 + x579; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x620 = x619 + x581; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x621 = x620 + x583; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x622 = x621 + x585; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x623 = x622 + x587; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x624 = x623 + x589; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x625 = x624 + x591; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x626 = x625 + x593; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x627 = x626 + x595; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x628 = x49 * x19; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x629 = x627 + x628; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x630 = x551 * x18; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x631 = x627 + x630; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x632 = x553 * x17; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x633 = x627 + x632; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x634 = x555 * x16; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x635 = x627 + x634; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x636 = x557 * x15; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x637 = x627 + x636; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x638 = x559 * x14; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x639 = x627 + x638; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x640 = x561 * x13; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x641 = x627 + x640; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x642 = x563 * x12; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x643 = x627 + x642; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x644 = x565 * x11; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x645 = x627 + x644; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x646 = x567 * x20; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x647 = x627 + x646; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x648 = x569 * x21; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x649 = x627 + x648; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x650 = x571 * x22; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x651 = x627 + x650; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x652 = x573 * x23; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x653 = x627 + x652; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x654 = x575 * x24; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x655 = x627 + x654; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x656 = x577 * x25; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x657 = x627 + x656; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x658 = x579 * x26; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x659 = x627 + x658; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x660 = x581 * x27; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x661 = x627 + x660; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x662 = x583 * x28; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x663 = x627 + x662; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x664 = x585 * x29; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x665 = x627 + x664; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x666 = x587 * x30; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x667 = x627 + x666; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x668 = x589 * x31; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x669 = x627 + x668; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x670 = x591 * x32; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x671 = x627 + x670; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x672 = x593 * x33; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x673 = x627 + x672; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x674 = x595 * x34; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x675 = x627 + x674; - // loc(callsite(unknown at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :31:13) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x676 = x629 + x4; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:17) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x677 = x676 * x676; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:22) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x678 = x677 * x676; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x679 = x678 - x50; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x680 = x604 + x679 * poly_mix[20]; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:15) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x681 = arg0[571]; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:23) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x682 = x681 * x676; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x683 = x682 - x51; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x684 = x680 + x683 * poly_mix[21]; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x685 = x51 + x631; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x686 = x685 + x633; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x687 = x686 + x635; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x688 = x687 + x637; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x689 = x688 + x639; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x690 = x689 + x641; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x691 = x690 + x643; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x692 = x691 + x645; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x693 = x692 + x647; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x694 = x693 + x649; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x695 = x694 + x651; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x696 = x695 + x653; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x697 = x696 + x655; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x698 = x697 + x657; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x699 = x698 + x659; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x700 = x699 + x661; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x701 = x700 + x663; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x702 = x701 + x665; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x703 = x702 + x667; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x704 = x703 + x669; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x705 = x704 + x671; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x706 = x705 + x673; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x707 = x706 + x675; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x708 = x51 * x19; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x709 = x707 + x708; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x710 = x631 * x18; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x711 = x707 + x710; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x712 = x633 * x17; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x713 = x707 + x712; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x714 = x635 * x16; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x715 = x707 + x714; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x716 = x637 * x15; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x717 = x707 + x716; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x718 = x639 * x14; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x719 = x707 + x718; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x720 = x641 * x13; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x721 = x707 + x720; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x722 = x643 * x12; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x723 = x707 + x722; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x724 = x645 * x11; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x725 = x707 + x724; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x726 = x647 * x20; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x727 = x707 + x726; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x728 = x649 * x21; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x729 = x707 + x728; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x730 = x651 * x22; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x731 = x707 + x730; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x732 = x653 * x23; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x733 = x707 + x732; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x734 = x655 * x24; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x735 = x707 + x734; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x736 = x657 * x25; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x737 = x707 + x736; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x738 = x659 * x26; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x739 = x707 + x738; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x740 = x661 * x27; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x741 = x707 + x740; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x742 = x663 * x28; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x743 = x707 + x742; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x744 = x665 * x29; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x745 = x707 + x744; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x746 = x667 * x30; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x747 = x707 + x746; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x748 = x669 * x31; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x749 = x707 + x748; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x750 = x671 * x32; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x751 = x707 + x750; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x752 = x673 * x33; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x753 = x707 + x752; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x754 = x675 * x34; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x755 = x707 + x754; - // loc(callsite(unknown at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :31:13) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x756 = x709 + x3; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:17) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x757 = x756 * x756; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:22) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x758 = x757 * x756; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x759 = x758 - x52; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x760 = x684 + x759 * poly_mix[22]; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:15) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x761 = arg0[572]; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:23) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x762 = x761 * x756; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x763 = x762 - x53; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x764 = x760 + x763 * poly_mix[23]; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x765 = x53 + x711; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x766 = x765 + x713; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x767 = x766 + x715; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x768 = x767 + x717; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x769 = x768 + x719; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x770 = x769 + x721; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x771 = x770 + x723; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x772 = x771 + x725; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x773 = x772 + x727; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x774 = x773 + x729; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x775 = x774 + x731; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x776 = x775 + x733; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x777 = x776 + x735; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x778 = x777 + x737; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x779 = x778 + x739; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x780 = x779 + x741; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x781 = x780 + x743; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x782 = x781 + x745; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x783 = x782 + x747; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x784 = x783 + x749; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x785 = x784 + x751; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x786 = x785 + x753; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x787 = x786 + x755; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x788 = x53 * x19; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x789 = x787 + x788; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x790 = x711 * x18; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x791 = x787 + x790; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x792 = x713 * x17; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x793 = x787 + x792; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x794 = x715 * x16; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x795 = x787 + x794; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x796 = x717 * x15; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x797 = x787 + x796; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x798 = x719 * x14; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x799 = x787 + x798; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x800 = x721 * x13; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x801 = x787 + x800; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x802 = x723 * x12; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x803 = x787 + x802; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x804 = x725 * x11; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x805 = x787 + x804; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x806 = x727 * x20; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x807 = x787 + x806; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x808 = x729 * x21; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x809 = x787 + x808; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x810 = x731 * x22; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x811 = x787 + x810; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x812 = x733 * x23; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x813 = x787 + x812; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x814 = x735 * x24; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x815 = x787 + x814; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x816 = x737 * x25; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x817 = x787 + x816; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x818 = x739 * x26; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x819 = x787 + x818; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x820 = x741 * x27; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x821 = x787 + x820; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x822 = x743 * x28; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x823 = x787 + x822; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x824 = x745 * x29; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x825 = x787 + x824; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x826 = x747 * x30; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x827 = x787 + x826; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x828 = x749 * x31; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x829 = x787 + x828; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x830 = x751 * x32; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x831 = x787 + x830; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x832 = x753 * x33; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x833 = x787 + x832; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x834 = x755 * x34; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x835 = x787 + x834; - // loc(callsite(unknown at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :31:13) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x836 = x789 + x2; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:17) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x837 = x836 * x836; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:22) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x838 = x837 * x836; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x839 = x838 - x54; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x840 = x764 + x839 * poly_mix[24]; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:15) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x841 = arg0[573]; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:23) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x842 = x841 * x836; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x843 = x842 - x55; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x844 = x840 + x843 * poly_mix[25]; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x845 = x55 + x791; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x846 = x845 + x793; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x847 = x846 + x795; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x848 = x847 + x797; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x849 = x848 + x799; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x850 = x849 + x801; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x851 = x850 + x803; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x852 = x851 + x805; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x853 = x852 + x807; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x854 = x853 + x809; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x855 = x854 + x811; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x856 = x855 + x813; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x857 = x856 + x815; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x858 = x857 + x817; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x859 = x858 + x819; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x860 = x859 + x821; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x861 = x860 + x823; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x862 = x861 + x825; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x863 = x862 + x827; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x864 = x863 + x829; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x865 = x864 + x831; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x866 = x865 + x833; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x867 = x866 + x835; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x868 = x55 * x19; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x869 = x867 + x868; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x870 = x791 * x18; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x871 = x867 + x870; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x872 = x793 * x17; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x873 = x867 + x872; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x874 = x795 * x16; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x875 = x867 + x874; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x876 = x797 * x15; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x877 = x867 + x876; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x878 = x799 * x14; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x879 = x867 + x878; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x880 = x801 * x13; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x881 = x867 + x880; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x882 = x803 * x12; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x883 = x867 + x882; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x884 = x805 * x11; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x885 = x867 + x884; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x886 = x807 * x20; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x887 = x867 + x886; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x888 = x809 * x21; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x889 = x867 + x888; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x890 = x811 * x22; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x891 = x867 + x890; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x892 = x813 * x23; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x893 = x867 + x892; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x894 = x815 * x24; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x895 = x867 + x894; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x896 = x817 * x25; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x897 = x867 + x896; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x898 = x819 * x26; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x899 = x867 + x898; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x900 = x821 * x27; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x901 = x867 + x900; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x902 = x823 * x28; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x903 = x867 + x902; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x904 = x825 * x29; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x905 = x867 + x904; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x906 = x827 * x30; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x907 = x867 + x906; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x908 = x829 * x31; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x909 = x867 + x908; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x910 = x831 * x32; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x911 = x867 + x910; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x912 = x833 * x33; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x913 = x867 + x912; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x914 = x835 * x34; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x915 = x867 + x914; - // loc(callsite(unknown at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :31:13) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x916 = x869 + x1; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:17) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x917 = x916 * x916; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:22) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x918 = x917 * x916; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x919 = x918 - x56; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x920 = x844 + x919 * poly_mix[26]; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:15) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x921 = arg0[574]; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:23) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x922 = x921 * x916; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x923 = x922 - x57; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x924 = x920 + x923 * poly_mix[27]; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x925 = x57 + x871; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x926 = x925 + x873; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x927 = x926 + x875; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x928 = x927 + x877; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x929 = x928 + x879; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x930 = x929 + x881; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x931 = x930 + x883; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x932 = x931 + x885; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x933 = x932 + x887; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x934 = x933 + x889; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x935 = x934 + x891; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x936 = x935 + x893; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x937 = x936 + x895; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x938 = x937 + x897; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x939 = x938 + x899; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x940 = x939 + x901; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x941 = x940 + x903; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x942 = x941 + x905; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x943 = x942 + x907; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x944 = x943 + x909; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x945 = x944 + x911; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x946 = x945 + x913; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x947 = x946 + x915; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x948 = x57 * x19; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x949 = x947 + x948; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x950 = x871 * x18; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x951 = x947 + x950; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg0[591] = x951; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x952 = x873 * x17; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x953 = x947 + x952; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg0[592] = x953; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x954 = x875 * x16; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x955 = x947 + x954; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg0[593] = x955; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x956 = x877 * x15; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x957 = x947 + x956; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg0[594] = x957; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x958 = x879 * x14; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x959 = x947 + x958; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg0[595] = x959; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x960 = x881 * x13; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x961 = x947 + x960; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg0[596] = x961; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x962 = x883 * x12; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x963 = x947 + x962; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg0[597] = x963; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x964 = x885 * x11; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x965 = x947 + x964; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg0[598] = x965; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x966 = x887 * x20; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x967 = x947 + x966; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg0[599] = x967; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x968 = x889 * x21; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x969 = x947 + x968; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg0[577] = x969; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x970 = x891 * x22; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x971 = x947 + x970; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg0[578] = x971; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x972 = x893 * x23; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x973 = x947 + x972; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg0[579] = x973; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x974 = x895 * x24; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x975 = x947 + x974; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg0[580] = x975; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x976 = x897 * x25; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x977 = x947 + x976; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg0[581] = x977; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x978 = x899 * x26; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x979 = x947 + x978; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg0[582] = x979; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x980 = x901 * x27; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x981 = x947 + x980; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg0[583] = x981; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x982 = x903 * x28; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x983 = x947 + x982; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg0[584] = x983; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x984 = x905 * x29; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x985 = x947 + x984; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg0[585] = x985; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x986 = x907 * x30; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x987 = x947 + x986; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg0[586] = x987; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x988 = x909 * x31; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x989 = x947 + x988; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg0[587] = x989; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x990 = x911 * x32; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x991 = x947 + x990; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg0[588] = x991; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x992 = x913 * x33; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x993 = x947 + x992; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg0[589] = x993; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x994 = x915 * x34; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x995 = x947 + x994; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg0[590] = x995; - // loc(callsite(unknown at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :31:13) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x996 = x949 + x0; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:17) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x997 = x996 * x996; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:22) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x998 = x997 * x996; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x999 = x998 - x58; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1000 = x924 + x999 * poly_mix[28]; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:15) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1001 = arg0[575]; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:23) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1002 = x1001 * x996; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1003 = x1002 - x59; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1004 = x1000 + x1003 * poly_mix[29]; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1005 = x59 + x951; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1006 = x1005 + x953; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1007 = x1006 + x955; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1008 = x1007 + x957; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1009 = x1008 + x959; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1010 = x1009 + x961; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1011 = x1010 + x963; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1012 = x1011 + x965; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1013 = x1012 + x967; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg0[576] = x1013; - // loc(unknown) - auto x1014 = rv32im_v2_2(cycle, steps, poly_mix, arg0, x1004, arg2, arg3, arg4, arg5, arg6, arg7, arg8, arg9); - return x1014; -} -FpExt poly_fp(size_t cycle, size_t steps, FpExt* poly_mix, Fp** args) { - size_t mask = steps - 1; - // loc(unknown) - constexpr Fp x0(65536); - // loc(unknown) - constexpr Fp x1(51); - // loc(unknown) - constexpr Fp x2(1073725472); - // loc(unknown) - constexpr Fp x3(1073725440); - // loc(unknown) - constexpr Fp x4(32768); - // loc(unknown) - constexpr Fp x5(8192); - // loc(unknown) - constexpr Fp x6(2048); - // loc(unknown) - constexpr Fp x7(512); - // loc(unknown) - constexpr Fp x8(128); - // loc(unknown) - constexpr Fp x9(16); - // loc(unknown) - constexpr Fp x10(4096); - // loc(unknown) - constexpr Fp x11(1024); - // loc(unknown) - constexpr Fp x12(256); - // loc(unknown) - constexpr Fp x13(64); - // loc(unknown) - constexpr Fp x14(61440); - // loc(unknown) - constexpr Fp x15(2013265920); - // loc(unknown) - constexpr Fp x16(65535); - // loc(unknown) - constexpr Fp x17(49151); - // loc(unknown) - constexpr Fp x18(16384); - // loc(unknown) - constexpr Fp x19(32); - // loc(unknown) - constexpr Fp x20(8); - // loc(unknown) - constexpr Fp x21(9); - // loc(unknown) - constexpr Fp x22(10); - // loc(unknown) - constexpr Fp x23(0); - // loc(unknown) - constexpr Fp x24(2); - // loc(unknown) - constexpr Fp x25(3); - // loc(unknown) - constexpr Fp x26(4); - // loc(unknown) - constexpr Fp x27(5); - // loc(unknown) - constexpr Fp x28(6); - // loc(unknown) - constexpr Fp x29(7); - // loc(unknown) - constexpr Fp x30(1); - // loc(unknown) - Fp x31[609]; - // loc(unknown) - FpExt x32[89]; - // loc(callsite(unknown at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :47:31) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x33 = /*data=*/args[1][16 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :48:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x34 = /*data=*/args[1][0 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :52:48) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x35 = /*data=*/args[1][12 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :53:50) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x36 = /*data=*/args[1][13 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :56:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x37 = /*data=*/args[1][14 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :58:60) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x38 = /*data=*/args[1][15 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :62:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x39 = /*data=*/args[1][17 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :63:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x40 = /*data=*/args[1][18 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x41 = /*data=*/args[1][19 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x42 = /*data=*/args[1][20 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x43 = /*data=*/args[1][21 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x44 = /*data=*/args[1][22 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x45 = /*data=*/args[1][23 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x46 = /*data=*/args[1][24 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x47 = /*data=*/args[1][25 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x48 = /*data=*/args[1][26 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x49 = /*data=*/args[1][1 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x50 = /*data=*/args[1][2 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x51 = /*data=*/args[1][3 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x52 = /*data=*/args[1][4 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x53 = /*data=*/args[1][5 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x54 = /*data=*/args[1][6 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x55 = /*data=*/args[1][7 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x56 = /*data=*/args[1][8 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x57 = /*data=*/args[1][9 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x58 = /*data=*/args[1][10 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x59 = /*data=*/args[1][11 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :63:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x60 = /*data=*/args[1][79 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :28:29) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :65:23) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x61 = /*data=*/args[1][80 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :65:23) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x62 = /*data=*/args[1][81 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :8:23) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x63 = /*data=*/args[1][82 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :11:20) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x64 = /*data=*/args[1][83 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :28:29) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :69:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x65 = /*data=*/args[1][84 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :69:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x66 = /*data=*/args[1][85 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :25:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x67 = /*data=*/args[1][87 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :26:28) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x68 = /*data=*/args[1][86 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :27:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x69 = /*data=*/args[1][88 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x70 = /*data=*/args[1][89 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x71 = /*data=*/args[1][90 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :25:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x72 = /*data=*/args[1][91 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x73 = /*data=*/args[1][92 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x74 = /*data=*/args[1][93 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( CycleArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :54:29) at callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :60:19) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x75 = /*data=*/args[1][94 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( CycleArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :55:29) at callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :60:19) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x76 = /*data=*/args[1][95 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :15:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x77 = /*data=*/args[1][62 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :16:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x78 = /*data=*/args[1][63 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :17:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x79 = /*data=*/args[1][64 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :18:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x80 = /*data=*/args[1][65 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :19:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x81 = /*data=*/args[1][66 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :20:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x82 = /*data=*/args[1][67 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :21:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x83 = /*data=*/args[1][68 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :22:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x84 = /*data=*/args[1][69 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :23:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x85 = /*data=*/args[1][70 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :24:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x86 = /*data=*/args[1][71 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :25:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x87 = /*data=*/args[1][72 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :26:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x88 = /*data=*/args[1][73 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :27:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x89 = /*data=*/args[1][74 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x90 = /*data=*/args[1][75 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :29:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x91 = /*data=*/args[1][76 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :34:30) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x92 = /*data=*/args[1][77 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :34:15) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x93 = /*data=*/args[1][106 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :25:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x94 = /*data=*/args[1][97 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :26:28) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x95 = /*data=*/args[1][96 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :27:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x96 = /*data=*/args[1][98 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x97 = /*data=*/args[1][99 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x98 = /*data=*/args[1][100 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :25:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x99 = /*data=*/args[1][101 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x100 = /*data=*/args[1][102 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x101 = /*data=*/args[1][103 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( CycleArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :54:29) at callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :60:19) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x102 = /*data=*/args[1][104 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( CycleArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :55:29) at callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :60:19) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x103 = /*data=*/args[1][105 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :34:15) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x104 = /*data=*/args[1][117 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :25:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x105 = /*data=*/args[1][108 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :26:28) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x106 = /*data=*/args[1][107 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :27:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x107 = /*data=*/args[1][109 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x108 = /*data=*/args[1][110 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x109 = /*data=*/args[1][111 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :25:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x110 = /*data=*/args[1][112 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x111 = /*data=*/args[1][113 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x112 = /*data=*/args[1][114 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( CycleArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :54:29) at callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :60:19) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x113 = /*data=*/args[1][115 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( CycleArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :55:29) at callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :60:19) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x114 = /*data=*/args[1][116 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x115 = /*data=*/args[1][27 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x116 = /*data=*/args[1][29 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x117 = /*data=*/args[1][31 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x118 = /*data=*/args[1][33 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x119 = /*data=*/args[1][35 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x120 = /*data=*/args[1][118 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x121 = /*data=*/args[1][119 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x122 = /*data=*/args[1][120 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x123 = /*data=*/args[1][121 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x124 = /*data=*/args[1][122 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x125 = /*data=*/args[1][123 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x126 = /*data=*/args[1][124 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x127 = /*data=*/args[1][125 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x128 = /*data=*/args[1][126 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x129 = /*data=*/args[1][127 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x130 = /*data=*/args[1][128 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x131 = /*data=*/args[1][129 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x132 = /*data=*/args[1][130 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x133 = /*data=*/args[1][131 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x134 = /*data=*/args[1][132 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x135 = /*data=*/args[1][133 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x136 = /*data=*/args[1][134 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x137 = /*data=*/args[1][135 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x138 = /*data=*/args[1][136 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x139 = /*data=*/args[1][137 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x140 = /*data=*/args[1][138 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x141 = /*data=*/args[1][139 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x142 = /*data=*/args[1][140 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x143 = /*data=*/args[1][141 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x144 = /*data=*/args[1][142 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x145 = /*data=*/args[1][143 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x146 = /*data=*/args[1][144 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x147 = /*data=*/args[1][145 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x148 = /*data=*/args[1][146 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x149 = /*data=*/args[1][147 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x150 = /*data=*/args[1][148 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x151 = /*data=*/args[1][149 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x152 = /*data=*/args[1][150 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x153 = /*data=*/args[1][151 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x154 = /*data=*/args[1][152 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x155 = /*data=*/args[1][153 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x156 = /*data=*/args[1][154 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x157 = /*data=*/args[1][155 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x158 = /*data=*/args[1][156 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x159 = /*data=*/args[1][157 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x160 = /*data=*/args[1][158 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x161 = /*data=*/args[1][159 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x162 = /*data=*/args[1][160 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x163 = /*data=*/args[1][161 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x164 = /*data=*/args[1][162 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x165 = /*data=*/args[1][163 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x166 = /*data=*/args[1][164 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x167 = /*data=*/args[1][165 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x168 = /*data=*/args[1][166 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x169 = /*data=*/args[1][167 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x170 = /*data=*/args[1][168 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x171 = /*data=*/args[1][169 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x172 = /*data=*/args[1][170 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x173 = /*data=*/args[1][171 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x174 = /*data=*/args[1][172 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x175 = /*data=*/args[1][173 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x176 = /*data=*/args[1][174 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x177 = /*data=*/args[1][175 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x178 = /*data=*/args[1][176 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x179 = /*data=*/args[1][177 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x180 = /*data=*/args[1][178 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x181 = /*data=*/args[1][179 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x182 = /*data=*/args[1][180 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x183 = /*data=*/args[1][181 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x184 = /*data=*/args[1][28 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x185 = /*data=*/args[1][30 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - FpExt x186 = FpExt(0); - // loc(callsite( Reg ( :5:7) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :49:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x187 = x186 + x23 * poly_mix[0]; - // loc(callsite(unknown at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :52:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x188 = x30 - x33; - // loc(callsite(unknown at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :52:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x189 = x188 * x35; - // loc(callsite(unknown at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :52:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - x31[99] = x189; - // loc(callsite(unknown at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :53:34) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x190 = x188 * x36; - // loc(callsite(unknown at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :53:34) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - x31[102] = x190; - // loc(callsite(unknown at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :56:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x191 = x188 * x37; - // loc(callsite(unknown at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :56:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - x31[237] = x191; - // loc(callsite(unknown at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :58:39) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x192 = x188 * x38; - // loc(callsite(unknown at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :58:61) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x193 = x192 + x33; - // loc(callsite(unknown at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :58:61) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - x31[238] = x193; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x194 = x30 - x41; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x195 = x41 * x194; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x196 = x187 + x195 * poly_mix[1]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x197 = x30 - x42; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x198 = x42 * x197; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x199 = x196 + x198 * poly_mix[2]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x200 = x30 - x43; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x201 = x43 * x200; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x202 = x199 + x201 * poly_mix[3]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x203 = x30 - x44; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x204 = x44 * x203; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x205 = x202 + x204 * poly_mix[4]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x206 = x30 - x45; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x207 = x45 * x206; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x208 = x205 + x207 * poly_mix[5]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x209 = x30 - x46; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x210 = x46 * x209; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x211 = x208 + x210 * poly_mix[6]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x212 = x30 - x47; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x213 = x47 * x212; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x214 = x211 + x213 * poly_mix[7]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x215 = x30 - x48; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x216 = x48 * x215; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x217 = x214 + x216 * poly_mix[8]; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:4) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x218 = x41 + x42; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:4) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x219 = x218 + x43; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:4) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x220 = x219 + x44; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:4) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x221 = x220 + x45; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:4) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - x31[104] = x221; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:4) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x222 = x221 + x46; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:4) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x223 = x222 + x47; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:4) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x224 = x223 + x48; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:4) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - x31[22] = x224; - // loc(callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:32) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x225 = x224 - x30; - // loc(callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:32) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x226 = x217 + x225 * poly_mix[9]; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:32) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x227 = x43 * x24; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:32) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x228 = x44 * x25; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:32) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x229 = x45 * x26; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:32) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x230 = x46 * x27; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:32) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x231 = x47 * x28; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:32) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x232 = x48 * x29; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:32) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - x31[607] = x232; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:4) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x233 = x42 + x227; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:4) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x234 = x233 + x228; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:4) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x235 = x234 + x229; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:4) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x236 = x235 + x230; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:4) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x237 = x236 + x231; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:4) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x238 = x237 + x232; - // loc(callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:56) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x239 = x238 - x40; - // loc(callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:56) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x240 = x226 + x239 * poly_mix[10]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x241 = x30 - x49; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x242 = x49 * x241; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x243 = x240 + x242 * poly_mix[11]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x244 = x30 - x50; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x245 = x50 * x244; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x246 = x243 + x245 * poly_mix[12]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x247 = x30 - x51; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x248 = x51 * x247; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x249 = x246 + x248 * poly_mix[13]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x250 = x30 - x52; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x251 = x52 * x250; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x252 = x249 + x251 * poly_mix[14]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x253 = x30 - x53; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x254 = x53 * x253; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x255 = x252 + x254 * poly_mix[15]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x256 = x30 - x54; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x257 = x54 * x256; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x258 = x255 + x257 * poly_mix[16]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x259 = x30 - x55; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x260 = x55 * x259; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x261 = x258 + x260 * poly_mix[17]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x262 = x30 - x56; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x263 = x56 * x262; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x264 = x261 + x263 * poly_mix[18]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x265 = x30 - x57; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x266 = x57 * x265; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x267 = x264 + x266 * poly_mix[19]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x268 = x30 - x58; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x269 = x58 * x268; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x270 = x267 + x269 * poly_mix[20]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x271 = x30 - x59; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x272 = x59 * x271; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x273 = x270 + x272 * poly_mix[21]; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:4) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x274 = x49 + x50; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:4) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x275 = x274 + x51; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:4) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x276 = x275 + x52; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:4) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x277 = x276 + x53; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:4) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x278 = x277 + x54; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:4) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x279 = x278 + x55; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:4) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x280 = x279 + x56; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:4) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x281 = x280 + x57; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:4) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x282 = x281 + x58; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:4) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x283 = x282 + x59; - // loc(callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x284 = x283 - x30; - // loc(callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x285 = x273 + x284 * poly_mix[22]; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x286 = x51 * x24; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x287 = x52 * x25; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x288 = x53 * x26; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x289 = x54 * x27; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x290 = x55 * x28; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x291 = x56 * x29; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x292 = x57 * x20; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x293 = x58 * x21; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x294 = x59 * x22; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:4) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x295 = x50 + x286; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:4) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x296 = x295 + x287; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:4) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x297 = x296 + x288; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:4) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x298 = x297 + x289; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:4) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x299 = x298 + x290; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:4) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x300 = x299 + x291; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:4) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x301 = x300 + x292; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:4) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x302 = x301 + x293; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:4) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x303 = x302 + x294; - // loc(callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:56) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x304 = x303 - x39; - // loc(callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:56) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x305 = x285 + x304 * poly_mix[23]; - // loc(callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :7:21) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x306 = x191 - x19; - // loc(callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :7:21) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - x31[255] = x306; - // loc(callsite(unknown at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :65:24) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x307 = x193 * x16; - // loc(callsite(unknown at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :65:41) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x308 = x30 - x193; - // loc(callsite(unknown at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :65:49) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x309 = x308 * x17; - // loc(callsite(unknown at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :65:31) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x310 = x307 + x309; - // loc(callsite(unknown at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :65:31) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - x31[210] = x310; - // loc(callsite(unknown at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :65:53) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x311 = x310 - x190; - // loc(callsite(unknown at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :65:53) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - x31[120] = x311; - // loc(callsite(unknown at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :73:12) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x312 = x190 * x18; - // loc(callsite(unknown at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :73:12) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - x31[121] = x312; - // loc(callsite(unknown at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :34:22) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x313 = x193 * x3; - // loc(callsite(unknown at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :34:63) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x314 = x308 * x2; - // loc(callsite(unknown at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :34:44) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x315 = x313 + x314; - // loc(callsite(unknown at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :34:44) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - x31[23] = x315; - // loc(callsite(unknown at callsite( AddU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :27:21) at callsite( SimpleOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :74:20) at callsite( OpADD ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :87:12) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :31:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x316 = x189 + x26; - // loc(callsite(unknown at callsite( AddU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :27:21) at callsite( SimpleOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :74:20) at callsite( OpADD ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :87:12) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :31:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - x31[100] = x316; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x317 = x316 * x41; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x318 = x316 * x42; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x319 = x316 * x43; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x320 = x316 * x44; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - x31[105] = x320; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x321 = x316 * x45; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - x31[106] = x321; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x322 = x316 * x46; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - x31[114] = x322; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x323 = x316 * x47; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - x31[115] = x323; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x324 = x316 * x48; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x325 = x317 + x318; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x326 = x325 + x319; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x327 = x326 + x320; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x328 = x327 + x321; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - x31[101] = x328; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x329 = x328 + x322; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x330 = x329 + x323; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x331 = x330 + x324; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - x31[19] = x331; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x332 = x190 * x41; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x333 = x190 * x42; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x334 = x190 * x43; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x335 = x190 * x44; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - x31[107] = x335; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x336 = x190 * x45; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - x31[108] = x336; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x337 = x190 * x46; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - x31[116] = x337; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x338 = x190 * x47; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - x31[117] = x338; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x339 = x190 * x48; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - x31[118] = x339; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x340 = x332 + x333; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x341 = x340 + x334; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x342 = x341 + x335; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x343 = x342 + x336; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - x31[103] = x343; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x344 = x343 + x337; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x345 = x344 + x338; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x346 = x345 + x339; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - x31[20] = x346; - // loc(callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :7:21) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x347 = x186 + x306 * poly_mix[0]; - // loc(callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :22:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x348 = x347 + x23 * poly_mix[1]; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:11) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :63:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x349 = x30 - x60; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:4) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :63:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x350 = x60 * x349; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:23) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :63:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x351 = x24 - x60; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:18) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :63:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x352 = x350 * x351; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:35) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :63:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x353 = x25 - x60; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :63:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x354 = x352 * x353; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :63:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - x31[136] = x354; - // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :63:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x355 = x348 + x354 * poly_mix[2]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :65:23) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x356 = x61 - x30; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :65:23) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - x31[240] = x356; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :65:23) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x357 = x355 + x356 * poly_mix[3]; - // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :65:23) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x358 = x62 - x311; - // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :65:23) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x359 = x357 + x358 * poly_mix[4]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x360 = x30 - x63; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x361 = x63 * x360; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - x31[119] = x361; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x362 = x359 + x361 * poly_mix[5]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:4) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x363 = x190 * x64; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x364 = x363 - x360; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x365 = x362 + x364 * poly_mix[6]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:4) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x366 = x63 * x190; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:17) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x367 = x365 + x366 * poly_mix[7]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:4) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x368 = x63 * x64; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:17) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x369 = x367 + x368 * poly_mix[8]; - // loc(callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:19) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x370 = x369 + x63 * poly_mix[9]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :69:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x371 = x65 - x30; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :69:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x372 = x370 + x371 * poly_mix[10]; - // loc(callsite(unknown at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :71:4) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x373 = x66 * x26; - // loc(callsite(unknown at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :71:12) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x374 = x373 + x60; - // loc(callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :71:21) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x375 = x374 - x189; - // loc(callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :71:21) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x376 = x372 + x375 * poly_mix[11]; - // loc(callsite(unknown at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :73:23) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x377 = x312 + x66; - // loc(callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :26:17) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x378 = x376 + x60 * poly_mix[12]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x379 = x67 - x15; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x380 = x378 + x379 * poly_mix[13]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x381 = x72 - x30; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - x31[229] = x381; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x382 = x380 + x381 * poly_mix[14]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x383 = x382 + x23 * poly_mix[15]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x384 = x383 + x23 * poly_mix[16]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x385 = x68 - x377; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x386 = x384 + x385 * poly_mix[17]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x387 = x70 - x73; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x388 = x386 + x387 * poly_mix[18]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x389 = x71 - x74; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x390 = x388 + x389 * poly_mix[19]; - // loc(callsite(unknown at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x391 = x34 - x69; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x392 = x75 - x30; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - x31[122] = x392; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x393 = x390 + x392 * poly_mix[20]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x394 = x76 - x391; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x395 = x393 + x394 * poly_mix[21]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :15:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x396 = x30 - x77; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :15:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x397 = x77 * x396; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :15:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x398 = x395 + x397 * poly_mix[22]; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:11) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :16:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x399 = x30 - x78; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:4) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :16:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x400 = x78 * x399; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:23) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :16:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x401 = x24 - x78; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:18) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :16:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x402 = x400 * x401; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:35) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :16:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x403 = x25 - x78; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :16:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x404 = x402 * x403; - // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :16:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x405 = x398 + x404 * poly_mix[23]; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:11) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :17:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x406 = x30 - x79; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:4) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :17:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x407 = x79 * x406; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:23) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :17:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x408 = x24 - x79; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:18) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :17:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x409 = x407 * x408; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:35) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :17:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x410 = x25 - x79; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :17:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x411 = x409 * x410; - // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :17:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x412 = x405 + x411 * poly_mix[24]; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:11) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :18:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x413 = x30 - x80; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:4) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :18:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x414 = x80 * x413; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:4) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :18:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - x31[124] = x414; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:23) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :18:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x415 = x24 - x80; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:18) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :18:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x416 = x414 * x415; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:35) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :18:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x417 = x25 - x80; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :18:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x418 = x416 * x417; - // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :18:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x419 = x412 + x418 * poly_mix[25]; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:11) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :19:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x420 = x30 - x81; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:11) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :19:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - x31[482] = x420; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:4) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :19:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x421 = x81 * x420; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:4) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :19:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - x31[481] = x421; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:23) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :19:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x422 = x24 - x81; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:18) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :19:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x423 = x421 * x422; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:35) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :19:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x424 = x25 - x81; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :19:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x425 = x423 * x424; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :19:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - x31[125] = x425; - // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :19:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x426 = x419 + x425 * poly_mix[26]; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:11) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :20:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x427 = x30 - x82; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:4) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :20:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x428 = x82 * x427; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:23) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :20:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x429 = x24 - x82; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:18) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :20:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x430 = x428 * x429; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:35) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :20:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x431 = x25 - x82; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :20:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x432 = x430 * x431; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :20:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - x31[126] = x432; - // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :20:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x433 = x426 + x432 * poly_mix[27]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :21:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x434 = x30 - x83; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :21:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - x31[483] = x434; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :21:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x435 = x83 * x434; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :21:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - x31[127] = x435; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :21:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x436 = x433 + x435 * poly_mix[28]; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:11) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :22:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x437 = x30 - x84; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:4) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :22:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x438 = x84 * x437; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:23) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :22:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x439 = x24 - x84; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:18) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :22:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x440 = x438 * x439; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:35) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :22:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x441 = x25 - x84; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :22:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x442 = x440 * x441; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :22:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - x31[128] = x442; - // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :22:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x443 = x436 + x442 * poly_mix[29]; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:11) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :23:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x444 = x30 - x85; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:11) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :23:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - x31[485] = x444; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:4) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :23:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x445 = x85 * x444; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:4) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :23:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - x31[484] = x445; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:23) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :23:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x446 = x24 - x85; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:18) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :23:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x447 = x445 * x446; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:35) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :23:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x448 = x25 - x85; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :23:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x449 = x447 * x448; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :23:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - x31[129] = x449; - // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :23:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x450 = x443 + x449 * poly_mix[30]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :24:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x451 = x30 - x86; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :24:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x452 = x86 * x451; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :24:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - x31[130] = x452; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :24:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x453 = x450 + x452 * poly_mix[31]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :25:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x454 = x30 - x87; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :25:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x455 = x87 * x454; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :25:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - x31[131] = x455; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :25:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x456 = x453 + x455 * poly_mix[32]; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:11) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :26:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x457 = x30 - x88; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:4) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :26:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x458 = x88 * x457; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:23) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :26:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x459 = x24 - x88; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:18) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :26:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x460 = x458 * x459; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:35) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :26:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x461 = x25 - x88; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :26:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x462 = x460 * x461; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :26:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - x31[132] = x462; - // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :26:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x463 = x456 + x462 * poly_mix[33]; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:11) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :27:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x464 = x30 - x89; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:4) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :27:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x465 = x89 * x464; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:4) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :27:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - x31[133] = x465; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:23) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :27:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x466 = x24 - x89; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:18) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :27:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x467 = x465 * x466; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:35) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :27:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x468 = x25 - x89; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :27:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x469 = x467 * x468; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :27:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - x31[156] = x469; - // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :27:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x470 = x463 + x469 * poly_mix[34]; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:11) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x471 = x30 - x90; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:4) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x472 = x90 * x471; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:4) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - x31[134] = x472; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:23) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x473 = x24 - x90; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:18) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x474 = x472 * x473; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:35) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x475 = x25 - x90; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x476 = x474 * x475; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - x31[157] = x476; - // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x477 = x470 + x476 * poly_mix[35]; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:11) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :29:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x478 = x30 - x91; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:4) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :29:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x479 = x91 * x478; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:23) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :29:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x480 = x24 - x91; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:18) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :29:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x481 = x479 * x480; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:35) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :29:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x482 = x25 - x91; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :29:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x483 = x481 * x482; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :29:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - x31[135] = x483; - // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :29:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x484 = x477 + x483 * poly_mix[36]; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :37:16) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x485 = x77 * x4; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :38:16) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x486 = x78 * x5; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :37:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x487 = x485 + x486; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :39:16) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x488 = x79 * x6; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :38:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x489 = x487 + x488; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :40:16) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x490 = x80 * x7; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :39:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x491 = x489 + x490; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :41:16) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x492 = x81 * x8; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :40:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x493 = x491 + x492; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :42:16) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x494 = x82 * x19; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :41:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x495 = x493 + x494; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :43:16) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x496 = x83 * x9; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :42:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x497 = x495 + x496; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :44:16) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x498 = x84 * x26; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :44:16) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - x31[112] = x498; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :43:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x499 = x497 + x498; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :44:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x500 = x499 + x85; - // loc(callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :37:14) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x501 = x74 - x500; - // loc(callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :37:14) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x502 = x484 + x501 * poly_mix[37]; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :46:15) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x503 = x86 * x4; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :46:15) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - x31[109] = x503; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :47:15) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x504 = x87 * x18; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :46:24) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x505 = x503 + x504; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :48:15) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x506 = x88 * x10; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :47:24) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x507 = x505 + x506; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :47:24) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - x31[113] = x507; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :49:15) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x508 = x89 * x11; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :48:24) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x509 = x507 + x508; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :50:15) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x510 = x90 * x12; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :49:24) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x511 = x509 + x510; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :51:15) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x512 = x91 * x8; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :50:24) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x513 = x511 + x512; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :51:24) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x514 = x513 + x92; - // loc(callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :46:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x515 = x73 - x514; - // loc(callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :46:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x516 = x502 + x515 * poly_mix[38]; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :55:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x517 = x84 * x20; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :55:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x518 = x85 * x24; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :55:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x519 = x517 + x518; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :55:42) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x520 = x519 + x86; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :55:42) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - x31[151] = x520; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :56:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x521 = x81 * x20; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :56:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - x31[110] = x521; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :56:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x522 = x82 * x24; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :56:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - x31[111] = x522; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :56:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x523 = x521 + x522; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :56:42) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x524 = x523 + x83; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :57:17) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x525 = x89 * x20; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :57:17) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - x31[26] = x525; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :57:30) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x526 = x90 * x24; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :57:30) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - x31[27] = x526; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :57:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x527 = x525 + x526; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :57:39) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x528 = x527 + x91; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :57:39) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - x31[21] = x528; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :58:23) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x529 = x78 * x9; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :58:38) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x530 = x79 * x26; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :58:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x531 = x529 + x530; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :58:47) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x532 = x531 + x80; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :58:47) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - x31[25] = x532; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :59:20) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x533 = x77 * x13; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :59:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x534 = x533 + x532; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :59:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - x31[9] = x534; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :60:20) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x535 = x87 * x26; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :60:20) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - x31[137] = x535; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :60:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x536 = x535 + x88; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :60:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - x31[8] = x536; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :66:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x537 = x77 * x14; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :66:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - x31[24] = x537; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :66:45) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x538 = x534 * x19; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :66:36) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x539 = x537 + x538; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :66:53) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x540 = x539 + x524; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :66:53) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - x31[16] = x540; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :66:63) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x541 = x77 * x16; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :66:63) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - x31[18] = x541; - // loc(callsite(unknown at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :34:79) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x542 = x315 + x520; - // loc(callsite(unknown at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :34:79) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - x31[139] = x542; - // loc(callsite( Reg ( :5:7) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :34:15) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x543 = x542 - x93; - // loc(callsite( Reg ( :5:7) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :34:15) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x544 = x516 + x543 * poly_mix[39]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x545 = x94 - x15; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x546 = x544 + x545 * poly_mix[40]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x547 = x99 - x30; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - x31[243] = x547; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x548 = x546 + x547 * poly_mix[41]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x549 = x548 + x23 * poly_mix[42]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x550 = x549 + x23 * poly_mix[43]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x551 = x95 - x93; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x552 = x550 + x551 * poly_mix[44]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x553 = x97 - x100; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - x31[155] = x553; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x554 = x552 + x553 * poly_mix[45]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x555 = x98 - x101; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x556 = x554 + x555 * poly_mix[46]; - // loc(callsite(unknown at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x557 = x34 - x96; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x558 = x102 - x30; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - x31[138] = x558; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x559 = x556 + x558 * poly_mix[47]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x560 = x103 - x557; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x561 = x559 + x560 * poly_mix[48]; - // loc(callsite(unknown at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :34:79) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x562 = x315 + x524; - // loc(callsite( Reg ( :5:7) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :34:15) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x563 = x562 - x104; - // loc(callsite( Reg ( :5:7) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :34:15) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x564 = x561 + x563 * poly_mix[49]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x565 = x105 - x15; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x566 = x564 + x565 * poly_mix[50]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x567 = x110 - x30; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x568 = x566 + x567 * poly_mix[51]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x569 = x568 + x23 * poly_mix[52]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x570 = x569 + x23 * poly_mix[53]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x571 = x106 - x104; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x572 = x570 + x571 * poly_mix[54]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x573 = x108 - x111; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - x31[336] = x573; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x574 = x572 + x573 * poly_mix[55]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x575 = x109 - x112; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x576 = x574 + x575 * poly_mix[56]; - // loc(callsite(unknown at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x577 = x34 - x107; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x578 = x113 - x30; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - x31[140] = x578; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x579 = x576 + x578 * poly_mix[57]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x580 = x114 - x577; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x581 = x579 + x580 * poly_mix[58]; - // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :62:19) at callsite( OpADD ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :86:20) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :31:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x582 = x92 - x1; - // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :62:19) at callsite( OpADD ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :86:20) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :31:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x583 = x186 + x582 * poly_mix[0]; - // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at callsite( OpADD ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :86:20) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :31:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x584 = x583 + x536 * poly_mix[1]; - // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at callsite( OpADD ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :86:20) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :31:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x585 = x584 + x534 * poly_mix[2]; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x586 = x585 + x115 * poly_mix[3]; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x587 = x586 + x116 * poly_mix[4]; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x588 = x587 + x117 * poly_mix[5]; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x589 = x588 + x118 * poly_mix[6]; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x590 = x589 + x119 * poly_mix[7]; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x591 = x581 + x41 * x590 * poly_mix[59]; - // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at callsite( OpSUB ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :91:20) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :32:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x592 = x534 - x19; - // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at callsite( OpSUB ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :91:20) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :32:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x593 = x584 + x592 * poly_mix[2]; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x594 = x593 + x115 * poly_mix[3]; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x595 = x594 + x116 * poly_mix[4]; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x596 = x595 + x117 * poly_mix[5]; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x597 = x596 + x118 * poly_mix[6]; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x598 = x597 + x119 * poly_mix[7]; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x599 = x591 + x42 * x598 * poly_mix[67]; - // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :96:20) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x600 = x536 - x26; - // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :96:20) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - x31[28] = x600; - // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :96:20) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x601 = x583 + x600 * poly_mix[1]; - // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :96:20) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x602 = x601 + x534 * poly_mix[2]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x603 = x30 - x120; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - x31[98] = x603; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x604 = x120 * x603; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - x31[11] = x604; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x605 = x602 + x604 * poly_mix[3]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x606 = x30 - x121; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x607 = x121 * x606; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - x31[14] = x607; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x608 = x605 + x607 * poly_mix[4]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x609 = x30 - x122; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - x31[7] = x609; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x610 = x122 * x609; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - x31[2] = x610; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x611 = x608 + x610 * poly_mix[5]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x612 = x30 - x123; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - x31[5] = x612; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x613 = x123 * x612; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - x31[3] = x613; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x614 = x611 + x613 * poly_mix[6]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x615 = x30 - x124; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - x31[6] = x615; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x616 = x124 * x615; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - x31[4] = x616; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x617 = x614 + x616 * poly_mix[7]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x618 = x30 - x125; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - x31[141] = x618; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x619 = x125 * x618; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - x31[29] = x619; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x620 = x617 + x619 * poly_mix[8]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x621 = x30 - x126; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - x31[142] = x621; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x622 = x126 * x621; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - x31[30] = x622; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x623 = x620 + x622 * poly_mix[9]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x624 = x30 - x127; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - x31[143] = x624; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x625 = x127 * x624; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - x31[31] = x625; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x626 = x623 + x625 * poly_mix[10]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x627 = x30 - x128; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x628 = x128 * x627; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - x31[32] = x628; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x629 = x626 + x628 * poly_mix[11]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x630 = x30 - x129; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - x31[162] = x630; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x631 = x129 * x630; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - x31[33] = x631; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x632 = x629 + x631 * poly_mix[12]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x633 = x30 - x130; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - x31[163] = x633; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x634 = x130 * x633; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - x31[34] = x634; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x635 = x632 + x634 * poly_mix[13]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x636 = x30 - x131; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - x31[164] = x636; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x637 = x131 * x636; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - x31[35] = x637; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x638 = x635 + x637 * poly_mix[14]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x639 = x30 - x132; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - x31[165] = x639; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x640 = x132 * x639; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - x31[36] = x640; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x641 = x638 + x640 * poly_mix[15]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x642 = x30 - x133; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - x31[166] = x642; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x643 = x133 * x642; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - x31[37] = x643; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x644 = x641 + x643 * poly_mix[16]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x645 = x30 - x134; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x646 = x134 * x645; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - x31[38] = x646; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x647 = x644 + x646 * poly_mix[17]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x648 = x30 - x135; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x649 = x135 * x648; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - x31[39] = x649; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x650 = x647 + x649 * poly_mix[18]; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x651 = x121 * x24; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x652 = x122 * x26; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x653 = x123 * x20; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x654 = x124 * x9; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x655 = x125 * x19; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x656 = x126 * x13; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x657 = x127 * x8; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x658 = x128 * x12; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x659 = x129 * x7; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x660 = x130 * x11; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x661 = x131 * x6; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x662 = x132 * x10; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x663 = x133 * x5; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x664 = x134 * x18; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x665 = x135 * x4; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x666 = x120 + x651; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x667 = x666 + x652; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x668 = x667 + x653; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x669 = x668 + x654; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x670 = x669 + x655; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x671 = x670 + x656; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x672 = x671 + x657; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x673 = x672 + x658; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x674 = x673 + x659; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x675 = x674 + x660; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x676 = x675 + x661; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x677 = x676 + x662; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x678 = x677 + x663; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x679 = x678 + x664; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x680 = x679 + x665; - // loc(callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:6) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x681 = x100 - x680; - // loc(callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:6) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - x31[40] = x681; - // loc(callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:6) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x682 = x650 + x681 * poly_mix[19]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x683 = x30 - x136; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x684 = x136 * x683; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - x31[41] = x684; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x685 = x682 + x684 * poly_mix[20]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x686 = x30 - x137; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - x31[182] = x686; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x687 = x137 * x686; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - x31[42] = x687; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x688 = x685 + x687 * poly_mix[21]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x689 = x30 - x138; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x690 = x138 * x689; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - x31[43] = x690; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x691 = x688 + x690 * poly_mix[22]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x692 = x30 - x139; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x693 = x139 * x692; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - x31[44] = x693; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x694 = x691 + x693 * poly_mix[23]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x695 = x30 - x140; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x696 = x140 * x695; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - x31[45] = x696; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x697 = x694 + x696 * poly_mix[24]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x698 = x30 - x141; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x699 = x141 * x698; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - x31[46] = x699; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x700 = x697 + x699 * poly_mix[25]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x701 = x30 - x142; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - x31[154] = x701; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x702 = x142 * x701; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - x31[47] = x702; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x703 = x700 + x702 * poly_mix[26]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x704 = x30 - x143; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x705 = x143 * x704; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - x31[48] = x705; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x706 = x703 + x705 * poly_mix[27]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x707 = x30 - x144; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x708 = x144 * x707; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - x31[49] = x708; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x709 = x706 + x708 * poly_mix[28]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x710 = x30 - x145; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x711 = x145 * x710; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - x31[50] = x711; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x712 = x709 + x711 * poly_mix[29]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x713 = x30 - x146; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x714 = x146 * x713; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - x31[51] = x714; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x715 = x712 + x714 * poly_mix[30]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x716 = x30 - x147; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x717 = x147 * x716; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - x31[52] = x717; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x718 = x715 + x717 * poly_mix[31]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x719 = x30 - x148; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x720 = x148 * x719; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - x31[53] = x720; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x721 = x718 + x720 * poly_mix[32]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x722 = x30 - x149; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x723 = x149 * x722; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - x31[54] = x723; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x724 = x721 + x723 * poly_mix[33]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x725 = x30 - x150; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x726 = x150 * x725; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - x31[55] = x726; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x727 = x724 + x726 * poly_mix[34]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x728 = x30 - x151; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x729 = x151 * x728; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - x31[56] = x729; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x730 = x727 + x729 * poly_mix[35]; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x731 = x137 * x24; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x732 = x138 * x26; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x733 = x139 * x20; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x734 = x140 * x9; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x735 = x141 * x19; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x736 = x142 * x13; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x737 = x143 * x8; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x738 = x144 * x12; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x739 = x145 * x7; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x740 = x146 * x11; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x741 = x147 * x6; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x742 = x148 * x10; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x743 = x149 * x5; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x744 = x150 * x18; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x745 = x151 * x4; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x746 = x136 + x731; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - x31[148] = x746; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x747 = x746 + x732; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x748 = x747 + x733; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x749 = x748 + x734; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x750 = x749 + x735; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x751 = x750 + x736; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x752 = x751 + x737; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x753 = x752 + x738; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x754 = x753 + x739; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x755 = x754 + x740; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x756 = x755 + x741; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x757 = x756 + x742; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x758 = x757 + x743; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x759 = x758 + x744; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x760 = x759 + x745; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - x31[57] = x760; - // loc(callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:6) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x761 = x111 - x760; - // loc(callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:6) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x762 = x730 + x761 * poly_mix[36]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x763 = x30 - x152; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - x31[202] = x763; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x764 = x152 * x763; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - x31[58] = x764; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x765 = x762 + x764 * poly_mix[37]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x766 = x30 - x153; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x767 = x153 * x766; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - x31[59] = x767; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x768 = x765 + x767 * poly_mix[38]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x769 = x30 - x154; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x770 = x154 * x769; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - x31[60] = x770; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x771 = x768 + x770 * poly_mix[39]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x772 = x30 - x155; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x773 = x155 * x772; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - x31[61] = x773; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x774 = x771 + x773 * poly_mix[40]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x775 = x30 - x156; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x776 = x156 * x775; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - x31[62] = x776; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x777 = x774 + x776 * poly_mix[41]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x778 = x30 - x157; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x779 = x157 * x778; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - x31[63] = x779; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x780 = x777 + x779 * poly_mix[42]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x781 = x30 - x158; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x782 = x158 * x781; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - x31[64] = x782; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x783 = x780 + x782 * poly_mix[43]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x784 = x30 - x159; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x785 = x159 * x784; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - x31[65] = x785; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x786 = x783 + x785 * poly_mix[44]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x787 = x30 - x160; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x788 = x160 * x787; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - x31[66] = x788; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x789 = x786 + x788 * poly_mix[45]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x790 = x30 - x161; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x791 = x161 * x790; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - x31[67] = x791; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x792 = x789 + x791 * poly_mix[46]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x793 = x30 - x162; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x794 = x162 * x793; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - x31[68] = x794; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x795 = x792 + x794 * poly_mix[47]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x796 = x30 - x163; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x797 = x163 * x796; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - x31[69] = x797; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x798 = x795 + x797 * poly_mix[48]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x799 = x30 - x164; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x800 = x164 * x799; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - x31[70] = x800; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x801 = x798 + x800 * poly_mix[49]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x802 = x30 - x165; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x803 = x165 * x802; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - x31[71] = x803; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x804 = x801 + x803 * poly_mix[50]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x805 = x30 - x166; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x806 = x166 * x805; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - x31[72] = x806; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x807 = x804 + x806 * poly_mix[51]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x808 = x30 - x167; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x809 = x167 * x808; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - x31[73] = x809; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x810 = x807 + x809 * poly_mix[52]; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x811 = x153 * x24; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x812 = x154 * x26; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x813 = x155 * x20; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x814 = x156 * x9; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x815 = x157 * x19; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x816 = x158 * x13; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x817 = x159 * x8; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x818 = x160 * x12; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x819 = x161 * x7; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x820 = x162 * x11; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x821 = x163 * x6; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x822 = x164 * x10; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x823 = x165 * x5; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x824 = x166 * x18; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x825 = x167 * x4; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x826 = x152 + x811; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x827 = x826 + x812; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x828 = x827 + x813; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x829 = x828 + x814; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x830 = x829 + x815; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x831 = x830 + x816; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x832 = x831 + x817; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x833 = x832 + x818; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x834 = x833 + x819; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x835 = x834 + x820; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x836 = x835 + x821; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x837 = x836 + x822; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x838 = x837 + x823; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x839 = x838 + x824; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x840 = x839 + x825; - // loc(callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:6) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x841 = x101 - x840; - // loc(callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:6) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - x31[74] = x841; - // loc(callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:6) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x842 = x810 + x841 * poly_mix[53]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x843 = x30 - x168; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x844 = x168 * x843; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - x31[75] = x844; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x845 = x842 + x844 * poly_mix[54]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x846 = x30 - x169; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x847 = x169 * x846; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - x31[76] = x847; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x848 = x845 + x847 * poly_mix[55]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x849 = x30 - x170; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x850 = x170 * x849; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - x31[77] = x850; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x851 = x848 + x850 * poly_mix[56]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x852 = x30 - x171; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x853 = x171 * x852; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - x31[78] = x853; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x854 = x851 + x853 * poly_mix[57]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x855 = x30 - x172; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x856 = x172 * x855; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - x31[79] = x856; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x857 = x854 + x856 * poly_mix[58]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x858 = x30 - x173; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - x31[241] = x858; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x859 = x173 * x858; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - x31[80] = x859; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x860 = x857 + x859 * poly_mix[59]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x861 = x30 - x174; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - x31[273] = x861; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x862 = x174 * x861; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - x31[81] = x862; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x863 = x860 + x862 * poly_mix[60]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x864 = x30 - x175; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x865 = x175 * x864; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - x31[82] = x865; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x866 = x863 + x865 * poly_mix[61]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x867 = x30 - x176; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - x31[249] = x867; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x868 = x176 * x867; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - x31[83] = x868; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x869 = x866 + x868 * poly_mix[62]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x870 = x30 - x177; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x871 = x177 * x870; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - x31[84] = x871; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x872 = x869 + x871 * poly_mix[63]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x873 = x30 - x178; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x874 = x178 * x873; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - x31[85] = x874; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x875 = x872 + x874 * poly_mix[64]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x876 = x30 - x179; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x877 = x179 * x876; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - x31[86] = x877; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x878 = x875 + x877 * poly_mix[65]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x879 = x30 - x180; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x880 = x180 * x879; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - x31[87] = x880; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x881 = x878 + x880 * poly_mix[66]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x882 = x30 - x181; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x883 = x181 * x882; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - x31[88] = x883; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x884 = x881 + x883 * poly_mix[67]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x885 = x30 - x182; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x886 = x182 * x885; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - x31[89] = x886; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x887 = x884 + x886 * poly_mix[68]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x888 = x30 - x183; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x889 = x183 * x888; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - x31[90] = x889; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x890 = x887 + x889 * poly_mix[69]; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x891 = x169 * x24; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x892 = x170 * x26; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x893 = x171 * x20; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x894 = x172 * x9; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x895 = x173 * x19; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x896 = x174 * x13; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x897 = x175 * x8; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x898 = x176 * x12; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x899 = x177 * x7; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x900 = x178 * x11; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x901 = x179 * x6; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x902 = x180 * x10; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x903 = x181 * x5; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x904 = x182 * x18; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x905 = x183 * x4; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x906 = x168 + x891; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x907 = x906 + x892; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x908 = x907 + x893; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x909 = x908 + x894; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x910 = x909 + x895; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x911 = x910 + x896; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x912 = x911 + x897; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x913 = x912 + x898; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x914 = x913 + x899; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x915 = x914 + x900; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x916 = x915 + x901; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x917 = x916 + x902; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x918 = x917 + x903; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x919 = x918 + x904; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x920 = x919 + x905; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - x31[91] = x920; - // loc(callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:6) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x921 = x112 - x920; - // loc(callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:6) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x922 = x890 + x921 * poly_mix[70]; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x923 = x922 + x115 * poly_mix[71]; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x924 = x923 + x116 * poly_mix[72]; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x925 = x924 + x117 * poly_mix[73]; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x926 = x925 + x118 * poly_mix[74]; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x927 = x926 + x119 * poly_mix[75]; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x928 = x599 + x43 * x927 * poly_mix[75]; - // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :101:20) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x929 = x536 - x28; - // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :101:20) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - x31[92] = x929; - // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :101:20) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x930 = x583 + x929 * poly_mix[1]; - // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :101:20) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x931 = x930 + x534 * poly_mix[2]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x932 = x931 + x604 * poly_mix[3]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x933 = x932 + x607 * poly_mix[4]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x934 = x933 + x610 * poly_mix[5]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x935 = x934 + x613 * poly_mix[6]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x936 = x935 + x616 * poly_mix[7]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x937 = x936 + x619 * poly_mix[8]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x938 = x937 + x622 * poly_mix[9]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x939 = x938 + x625 * poly_mix[10]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x940 = x939 + x628 * poly_mix[11]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x941 = x940 + x631 * poly_mix[12]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x942 = x941 + x634 * poly_mix[13]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x943 = x942 + x637 * poly_mix[14]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x944 = x943 + x640 * poly_mix[15]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x945 = x944 + x643 * poly_mix[16]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x946 = x945 + x646 * poly_mix[17]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x947 = x946 + x649 * poly_mix[18]; - // loc(callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:6) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x948 = x947 + x681 * poly_mix[19]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x949 = x948 + x684 * poly_mix[20]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x950 = x949 + x687 * poly_mix[21]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x951 = x950 + x690 * poly_mix[22]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x952 = x951 + x693 * poly_mix[23]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x953 = x952 + x696 * poly_mix[24]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x954 = x953 + x699 * poly_mix[25]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x955 = x954 + x702 * poly_mix[26]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x956 = x955 + x705 * poly_mix[27]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x957 = x956 + x708 * poly_mix[28]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x958 = x957 + x711 * poly_mix[29]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x959 = x958 + x714 * poly_mix[30]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x960 = x959 + x717 * poly_mix[31]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x961 = x960 + x720 * poly_mix[32]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x962 = x961 + x723 * poly_mix[33]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x963 = x962 + x726 * poly_mix[34]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x964 = x963 + x729 * poly_mix[35]; - // loc(callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:6) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x965 = x964 + x761 * poly_mix[36]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x966 = x965 + x764 * poly_mix[37]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x967 = x966 + x767 * poly_mix[38]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x968 = x967 + x770 * poly_mix[39]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x969 = x968 + x773 * poly_mix[40]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x970 = x969 + x776 * poly_mix[41]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x971 = x970 + x779 * poly_mix[42]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x972 = x971 + x782 * poly_mix[43]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x973 = x972 + x785 * poly_mix[44]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x974 = x973 + x788 * poly_mix[45]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x975 = x974 + x791 * poly_mix[46]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x976 = x975 + x794 * poly_mix[47]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x977 = x976 + x797 * poly_mix[48]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x978 = x977 + x800 * poly_mix[49]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x979 = x978 + x803 * poly_mix[50]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x980 = x979 + x806 * poly_mix[51]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x981 = x980 + x809 * poly_mix[52]; - // loc(callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:6) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x982 = x981 + x841 * poly_mix[53]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x983 = x982 + x844 * poly_mix[54]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x984 = x983 + x847 * poly_mix[55]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x985 = x984 + x850 * poly_mix[56]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x986 = x985 + x853 * poly_mix[57]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x987 = x986 + x856 * poly_mix[58]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x988 = x987 + x859 * poly_mix[59]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x989 = x988 + x862 * poly_mix[60]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x990 = x989 + x865 * poly_mix[61]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x991 = x990 + x868 * poly_mix[62]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x992 = x991 + x871 * poly_mix[63]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x993 = x992 + x874 * poly_mix[64]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x994 = x993 + x877 * poly_mix[65]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x995 = x994 + x880 * poly_mix[66]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x996 = x995 + x883 * poly_mix[67]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x997 = x996 + x886 * poly_mix[68]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x998 = x997 + x889 * poly_mix[69]; - // loc(callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:6) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x999 = x998 + x921 * poly_mix[70]; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1000 = x999 + x115 * poly_mix[71]; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1001 = x1000 + x116 * poly_mix[72]; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1002 = x1001 + x117 * poly_mix[73]; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1003 = x1002 + x118 * poly_mix[74]; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1004 = x1003 + x119 * poly_mix[75]; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1005 = x928 + x44 * x1004 * poly_mix[151]; - // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :106:20) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x1006 = x536 - x29; - // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :106:20) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - x31[93] = x1006; - // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :106:20) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x1007 = x583 + x1006 * poly_mix[1]; - // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :106:20) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x1008 = x1007 + x534 * poly_mix[2]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x1009 = x1008 + x604 * poly_mix[3]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x1010 = x1009 + x607 * poly_mix[4]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x1011 = x1010 + x610 * poly_mix[5]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x1012 = x1011 + x613 * poly_mix[6]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x1013 = x1012 + x616 * poly_mix[7]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x1014 = x1013 + x619 * poly_mix[8]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x1015 = x1014 + x622 * poly_mix[9]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x1016 = x1015 + x625 * poly_mix[10]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x1017 = x1016 + x628 * poly_mix[11]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x1018 = x1017 + x631 * poly_mix[12]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x1019 = x1018 + x634 * poly_mix[13]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x1020 = x1019 + x637 * poly_mix[14]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x1021 = x1020 + x640 * poly_mix[15]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x1022 = x1021 + x643 * poly_mix[16]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x1023 = x1022 + x646 * poly_mix[17]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x1024 = x1023 + x649 * poly_mix[18]; - // loc(callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:6) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1025 = x1024 + x681 * poly_mix[19]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x1026 = x1025 + x684 * poly_mix[20]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x1027 = x1026 + x687 * poly_mix[21]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x1028 = x1027 + x690 * poly_mix[22]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x1029 = x1028 + x693 * poly_mix[23]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x1030 = x1029 + x696 * poly_mix[24]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x1031 = x1030 + x699 * poly_mix[25]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x1032 = x1031 + x702 * poly_mix[26]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x1033 = x1032 + x705 * poly_mix[27]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x1034 = x1033 + x708 * poly_mix[28]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x1035 = x1034 + x711 * poly_mix[29]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x1036 = x1035 + x714 * poly_mix[30]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x1037 = x1036 + x717 * poly_mix[31]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x1038 = x1037 + x720 * poly_mix[32]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x1039 = x1038 + x723 * poly_mix[33]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x1040 = x1039 + x726 * poly_mix[34]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x1041 = x1040 + x729 * poly_mix[35]; - // loc(callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:6) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1042 = x1041 + x761 * poly_mix[36]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x1043 = x1042 + x764 * poly_mix[37]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x1044 = x1043 + x767 * poly_mix[38]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x1045 = x1044 + x770 * poly_mix[39]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x1046 = x1045 + x773 * poly_mix[40]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x1047 = x1046 + x776 * poly_mix[41]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x1048 = x1047 + x779 * poly_mix[42]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x1049 = x1048 + x782 * poly_mix[43]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x1050 = x1049 + x785 * poly_mix[44]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x1051 = x1050 + x788 * poly_mix[45]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x1052 = x1051 + x791 * poly_mix[46]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x1053 = x1052 + x794 * poly_mix[47]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x1054 = x1053 + x797 * poly_mix[48]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x1055 = x1054 + x800 * poly_mix[49]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x1056 = x1055 + x803 * poly_mix[50]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x1057 = x1056 + x806 * poly_mix[51]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x1058 = x1057 + x809 * poly_mix[52]; - // loc(callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:6) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1059 = x1058 + x841 * poly_mix[53]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x1060 = x1059 + x844 * poly_mix[54]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x1061 = x1060 + x847 * poly_mix[55]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x1062 = x1061 + x850 * poly_mix[56]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x1063 = x1062 + x853 * poly_mix[57]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x1064 = x1063 + x856 * poly_mix[58]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x1065 = x1064 + x859 * poly_mix[59]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x1066 = x1065 + x862 * poly_mix[60]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x1067 = x1066 + x865 * poly_mix[61]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x1068 = x1067 + x868 * poly_mix[62]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x1069 = x1068 + x871 * poly_mix[63]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x1070 = x1069 + x874 * poly_mix[64]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x1071 = x1070 + x877 * poly_mix[65]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x1072 = x1071 + x880 * poly_mix[66]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x1073 = x1072 + x883 * poly_mix[67]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x1074 = x1073 + x886 * poly_mix[68]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x1075 = x1074 + x889 * poly_mix[69]; - // loc(callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:6) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1076 = x1075 + x921 * poly_mix[70]; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1077 = x1076 + x115 * poly_mix[71]; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1078 = x1077 + x116 * poly_mix[72]; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1079 = x1078 + x117 * poly_mix[73]; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1080 = x1079 + x118 * poly_mix[74]; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1081 = x1080 + x119 * poly_mix[75]; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1082 = x1005 + x45 * x1081 * poly_mix[204]; - // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :111:20) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x1083 = x536 - x24; - // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :111:20) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - x31[96] = x1083; - // loc(callsite(unknown at callsite( SubU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :33:19) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:31) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1084 = x100 + x0; - // loc(callsite(unknown at callsite( SubU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :33:19) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:31) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - x31[94] = x1084; - // loc(callsite(unknown at callsite( SubU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :33:31) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:31) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1085 = x1084 - x111; - // loc(callsite(unknown at callsite( SubU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :33:31) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:31) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - x31[15] = x1085; - // loc(callsite(unknown at callsite( SubU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :33:44) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:31) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1086 = x101 + x16; - // loc(callsite(unknown at callsite( SubU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :33:44) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:31) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - x31[95] = x1086; - // loc(callsite(unknown at callsite( SubU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :33:55) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:31) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1087 = x1086 - x112; - // loc(callsite(unknown at callsite( SubU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :33:55) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:31) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - x31[17] = x1087; - // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :111:20) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x1088 = x583 + x1083 * poly_mix[1]; - // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :111:20) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x1089 = x1088 + x534 * poly_mix[2]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1090 = x115 - x30; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - x31[10] = x1090; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1091 = x1089 + x1090 * poly_mix[3]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :45:28) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1092 = x1091 + x604 * poly_mix[4]; - // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:12) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1093 = x120 * x0; - // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:12) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - x31[218] = x1093; - // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:23) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1094 = x1093 + x184; - // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:23) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - x31[97] = x1094; - // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:10) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1095 = x1085 - x1094; - // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:10) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - x31[12] = x1095; - // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:10) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1096 = x1092 + x1095 * poly_mix[5]; - // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :48:14) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1097 = x1087 + x120; - // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :48:14) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - x31[0] = x1097; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1098 = x116 - x30; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - x31[13] = x1098; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1099 = x1096 + x1098 * poly_mix[6]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :51:29) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1100 = x1099 + x607 * poly_mix[7]; - // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:11) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1101 = x121 * x0; - // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:23) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1102 = x1101 + x185; - // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:23) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - x31[1] = x1102; - // loc(unknown) - auto x1103 = rv32im_v2_12(cycle, steps, poly_mix, x31, x1100, x1082, x583, x186, x305, x581, x348, x187, x32, /*data=*/args[1], /*accum=*/args[0], /*mix=*/args[3], /*global=*/args[2]); - return x1103; -} - -} // namespace risc0::circuit::rv32im_v2 -// clang-format on diff --git a/risc0/circuit/rv32im-v2-sys/kernels/cxx/rust_poly_fp_2.cpp b/risc0/circuit/rv32im-v2-sys/kernels/cxx/rust_poly_fp_2.cpp deleted file mode 100644 index a89f94e3..00000000 --- a/risc0/circuit/rv32im-v2-sys/kernels/cxx/rust_poly_fp_2.cpp +++ /dev/null @@ -1,7136 +0,0 @@ -// Copyright 2024 RISC Zero, Inc. -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -// This code is automatically generated - -#include "fp.h" -#include "fpext.h" - -#include - -constexpr size_t kInvRate = 4; - -// clang-format off -namespace risc0::circuit::rv32im_v2 { - -FpExt rv32im_v2_12(size_t cycle, size_t steps, FpExt* poly_mix, Fp* arg0, FpExt arg1, FpExt arg2, FpExt arg3, FpExt arg4, FpExt arg5, FpExt arg6, FpExt arg7, FpExt arg8, FpExt* arg9, Fp* arg10, Fp* arg11, Fp* arg12, Fp* arg13); -FpExt rv32im_v2_11(size_t cycle, size_t steps, FpExt* poly_mix, FpExt arg0, Fp* arg1, FpExt arg2, FpExt arg3, FpExt arg4, FpExt arg5, FpExt* arg6, Fp* arg7, Fp* arg8, Fp* arg9, Fp* arg10); -FpExt rv32im_v2_10(size_t cycle, size_t steps, FpExt* poly_mix, Fp* arg0, FpExt arg1, FpExt arg2, FpExt arg3, FpExt arg4, FpExt arg5, FpExt arg6, FpExt arg7, FpExt arg8, FpExt arg9, FpExt arg10, FpExt arg11, FpExt* arg12, FpExt arg13, Fp* arg14, Fp* arg15, Fp* arg16, Fp* arg17); -FpExt rv32im_v2_9(size_t cycle, size_t steps, FpExt* poly_mix, FpExt arg0, Fp* arg1, FpExt arg2, FpExt arg3, FpExt arg4, FpExt arg5, FpExt arg6, FpExt arg7, FpExt arg8, FpExt* arg9, FpExt arg10, Fp* arg11, Fp* arg12, Fp* arg13, Fp* arg14); -FpExt rv32im_v2_8(size_t cycle, size_t steps, FpExt* poly_mix, Fp* arg0, FpExt arg1, FpExt arg2, FpExt arg3, FpExt arg4, FpExt arg5, FpExt arg6, FpExt arg7, FpExt* arg8, FpExt arg9, Fp* arg10, Fp* arg11, Fp* arg12, Fp* arg13); -FpExt rv32im_v2_7(size_t cycle, size_t steps, FpExt* poly_mix, FpExt arg0, FpExt arg1, Fp* arg2, FpExt arg3, FpExt arg4, FpExt arg5, FpExt* arg6, FpExt arg7, Fp* arg8, Fp* arg9, Fp* arg10, Fp* arg11); -FpExt rv32im_v2_6(size_t cycle, size_t steps, FpExt* poly_mix, Fp* arg0, FpExt arg1, FpExt arg2, FpExt* arg3, FpExt arg4, FpExt arg5, FpExt arg6, FpExt arg7, FpExt arg8, Fp* arg9, Fp* arg10, Fp* arg11, Fp* arg12); -FpExt rv32im_v2_5(size_t cycle, size_t steps, FpExt* poly_mix, Fp* arg0, FpExt arg1, FpExt* arg2, FpExt arg3, FpExt arg4, FpExt arg5, FpExt arg6, FpExt arg7, Fp* arg8, Fp* arg9, Fp* arg10); -FpExt rv32im_v2_4(size_t cycle, size_t steps, FpExt* poly_mix, Fp* arg0, FpExt arg1, FpExt* arg2, FpExt arg3, FpExt arg4, FpExt arg5, Fp* arg6, Fp* arg7, Fp* arg8); -FpExt rv32im_v2_3(size_t cycle, size_t steps, FpExt* poly_mix, Fp* arg0, FpExt arg1, FpExt* arg2, FpExt arg3, FpExt arg4, FpExt arg5, FpExt arg6, Fp* arg7, Fp* arg8, Fp* arg9); -FpExt rv32im_v2_2(size_t cycle, size_t steps, FpExt* poly_mix, Fp* arg0, FpExt arg1, FpExt* arg2, FpExt arg3, FpExt arg4, FpExt arg5, FpExt arg6, Fp* arg7, Fp* arg8, Fp* arg9); -FpExt rv32im_v2_1(size_t cycle, size_t steps, FpExt* poly_mix, FpExt* arg0, FpExt arg1, FpExt arg2, FpExt arg3, Fp* arg4, Fp* arg5, Fp* arg6); -FpExt rv32im_v2_0(size_t cycle, size_t steps, FpExt* poly_mix, FpExt* arg0, FpExt arg1, FpExt arg2, FpExt arg3, Fp* arg4, Fp* arg5); -FpExt poly_fp(size_t cycle, size_t steps, FpExt* poly_mix, Fp** args); - -FpExt rv32im_v2_10(size_t cycle, size_t steps, FpExt* poly_mix, Fp* arg0, FpExt arg1, FpExt arg2, FpExt arg3, FpExt arg4, FpExt arg5, FpExt arg6, FpExt arg7, FpExt arg8, FpExt arg9, FpExt arg10, FpExt arg11, FpExt* arg12, FpExt arg13, Fp* arg14, Fp* arg15, Fp* arg16, Fp* arg17) { - size_t mask = steps - 1; - // loc(unknown) - constexpr Fp x0(3); - // loc(unknown) - constexpr Fp x1(0); - // loc(unknown) - constexpr Fp x2(2013265920); - // loc(unknown) - constexpr Fp x3(64); - // loc(unknown) - constexpr Fp x4(7); - // loc(unknown) - constexpr Fp x5(6); - // loc(unknown) - constexpr Fp x6(19); - // loc(unknown) - constexpr Fp x7(32); - // loc(unknown) - constexpr Fp x8(65535); - // loc(unknown) - constexpr Fp x9(2013235201); - // loc(unknown) - constexpr Fp x10(131070); - // loc(unknown) - constexpr Fp x11(131072); - // loc(unknown) - constexpr Fp x12(65536); - // loc(unknown) - constexpr Fp x13(16777216); - // loc(unknown) - constexpr Fp x14(1); - // loc(unknown) - constexpr Fp x15(1006632961); - // loc(unknown) - constexpr Fp x16(32768); - // loc(unknown) - constexpr Fp x17(128); - // loc(unknown) - constexpr Fp x18(256); - // loc(unknown) - constexpr Fp x19(16); - // loc(unknown) - constexpr Fp x20(8); - // loc(unknown) - constexpr Fp x21(4); - // loc(unknown) - constexpr Fp x22(2); - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x23 = arg14[128 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x24 = arg14[129 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x25 = arg14[130 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x26 = arg14[131 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x27 = arg14[127 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x28 = arg14[122 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x29 = arg14[132 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x30 = arg14[133 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x31 = arg14[134 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :51:29) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x32 = arg14[48 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :28:29) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x33 = arg14[46 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x34 = arg14[135 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :27:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x35 = arg14[54 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :11:20) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x36 = arg14[50 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x37 = arg14[137 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x38 = arg14[136 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :26:28) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x39 = arg14[52 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x40 = arg14[58 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU8 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :9:27) at callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :15:16) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :53:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x41 = arg14[56 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :17:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x42 = arg14[64 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( CycleArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :54:29) at callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :60:19) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x43 = arg14[60 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x44 = arg14[138 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :15:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x45 = arg14[62 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x46 = arg14[139 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :126:34) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :134:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x47 = arg14[32 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x48 = arg14[30 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :18:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x49 = arg14[65 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x50 = arg14[141 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x51 = arg14[140 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :19:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x52 = arg14[66 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :126:34) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :136:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x53 = arg14[36 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :20:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x54 = arg14[67 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x55 = arg14[143 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x56 = arg14[142 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :21:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x57 = arg14[68 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x58 = arg14[38 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :22:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x59 = arg14[69 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x60 = arg14[145 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x61 = arg14[144 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :23:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x62 = arg14[70 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :28:29) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x63 = arg14[40 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :51:29) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x64 = arg14[42 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x65 = arg14[147 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x66 = arg14[146 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x67 = arg14[111 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :25:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x68 = arg14[112 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x69 = arg14[148 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :28:29) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x70 = arg14[43 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x71 = arg14[19 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :126:34) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :135:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x72 = arg14[34 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x73 = arg14[44 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x74 = arg14[149 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x75 = arg14[20 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :26:28) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x76 = arg14[86 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x77 = arg14[21 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x78 = arg14[22 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x79 = arg14[123 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x80 = arg14[28 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x81 = arg14[41 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x82 = arg14[23 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x83 = arg14[24 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x84 = arg14[25 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x85 = arg14[26 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x86 = arg14[135 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x87 = arg14[136 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x88 = arg14[127 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :54:27) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x89 = arg14[28 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x90 = arg14[137 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x91 = arg14[128 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :97:30) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x92 = arg14[30 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x93 = arg14[151 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x94 = arg14[150 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x95 = arg14[152 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x96 = arg14[154 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x97 = arg14[158 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x98 = arg14[153 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :48:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x99 = arg14[0 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x100 = arg14[155 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x101 = arg14[161 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x102 = arg14[162 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x103 = arg14[159 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x104 = arg14[160 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x105 = arg14[163 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x106 = arg14[165 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x107 = arg14[164 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x108 = arg14[166 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x109 = arg14[168 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x110 = arg14[167 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x111 = arg14[5 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :25:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x112 = arg14[53 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :25:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x113 = arg14[57 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :16:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x114 = arg14[63 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( CycleArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :55:29) at callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :60:19) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x115 = arg14[61 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x116 = arg14[59 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x117 = arg14[33 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x118 = arg14[35 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :28:29) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x119 = arg14[37 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x120 = arg0[34]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :44:21) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :86:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x121 = arg1 + x120 * poly_mix[4]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x122 = arg0[35]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :44:21) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :86:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x123 = x121 + x122 * poly_mix[5]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x124 = arg0[36]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :44:21) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :86:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x125 = x123 + x124 * poly_mix[6]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x126 = arg0[37]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :44:21) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :86:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x127 = x125 + x126 * poly_mix[7]; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :45:27) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :86:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x128 = x23 * x22; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :45:27) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :86:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x129 = x24 * x21; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :45:27) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :86:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x130 = x25 * x20; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :45:27) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :86:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x131 = x26 * x19; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :45:27) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :86:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x132 = x27 + x128; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :45:27) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :86:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x133 = x132 + x129; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :45:27) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :86:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x134 = x133 + x130; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :45:27) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :86:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x135 = x134 + x131; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x136 = arg0[10]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :46:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :86:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x137 = x127 + x136 * poly_mix[8]; - // loc(callsite(unknown at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :47:4) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :47:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x138 = arg0[160]; - // loc(callsite(unknown at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :47:16) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :86:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x139 = x138 + x135; - // loc(callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :47:30) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :86:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x140 = x139 - x28; - // loc(callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :47:30) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :86:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x141 = x137 + x140 * poly_mix[9]; - // loc(callsite(unknown at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :57:4) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x142 = arg0[161]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x143 = arg0[162]; - // loc(callsite(unknown at callsite( CondMul ( zirgen/circuit/rv32im/v2/dsl/po2.zir :39:16) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :48:17) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :86:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x144 = x142 + x143; - // loc(callsite(unknown at callsite( CondMul ( zirgen/circuit/rv32im/v2/dsl/po2.zir :39:4) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :49:17) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :86:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x145 = x23 * x144; - // loc(callsite(unknown at callsite( CondMul ( zirgen/circuit/rv32im/v2/dsl/po2.zir :39:11) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :49:17) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :86:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x146 = x145 * x21; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x147 = arg0[163]; - // loc(callsite(unknown at callsite( CondMul ( zirgen/circuit/rv32im/v2/dsl/po2.zir :39:31) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :49:17) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :86:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x148 = x147 * x144; - // loc(callsite(unknown at callsite( CondMul ( zirgen/circuit/rv32im/v2/dsl/po2.zir :39:16) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :49:17) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :86:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x149 = x146 + x148; - // loc(callsite(unknown at callsite( CondMul ( zirgen/circuit/rv32im/v2/dsl/po2.zir :39:4) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :50:21) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :86:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x150 = x24 * x149; - // loc(callsite(unknown at callsite( CondMul ( zirgen/circuit/rv32im/v2/dsl/po2.zir :39:11) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :50:21) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :86:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x151 = x150 * x19; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x152 = arg0[164]; - // loc(callsite(unknown at callsite( CondMul ( zirgen/circuit/rv32im/v2/dsl/po2.zir :39:31) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :50:21) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :86:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x153 = x152 * x149; - // loc(callsite(unknown at callsite( CondMul ( zirgen/circuit/rv32im/v2/dsl/po2.zir :39:16) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :50:21) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :86:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x154 = x151 + x153; - // loc(callsite( Reg ( :5:7) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :50:13) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :86:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x155 = x154 - x29; - // loc(callsite( Reg ( :5:7) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :50:13) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :86:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x156 = x141 + x155 * poly_mix[10]; - // loc(callsite(unknown at callsite( CondMul ( zirgen/circuit/rv32im/v2/dsl/po2.zir :39:4) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :51:17) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :86:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x157 = x25 * x29; - // loc(callsite(unknown at callsite( CondMul ( zirgen/circuit/rv32im/v2/dsl/po2.zir :39:11) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :51:17) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :86:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x158 = x157 * x18; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x159 = arg0[165]; - // loc(callsite(unknown at callsite( CondMul ( zirgen/circuit/rv32im/v2/dsl/po2.zir :39:31) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :51:17) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :86:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x160 = x159 * x29; - // loc(callsite(unknown at callsite( CondMul ( zirgen/circuit/rv32im/v2/dsl/po2.zir :39:16) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :51:17) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :86:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x161 = x158 + x160; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x162 = arg0[166]; - // loc(callsite(unknown at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :52:27) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :86:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x163 = x162 * x161; - // loc(callsite( Reg ( :5:7) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :52:14) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :86:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x164 = x163 - x30; - // loc(callsite( Reg ( :5:7) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :52:14) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :86:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x165 = x156 + x164 * poly_mix[11]; - // loc(callsite(unknown at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :53:22) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :86:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x166 = x26 * x161; - // loc(callsite( Reg ( :5:7) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :53:15) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :86:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x167 = x166 - x31; - // loc(callsite( Reg ( :5:7) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :53:15) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :86:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x168 = x165 + x167 * poly_mix[12]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x169 = arg0[13]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :54:27) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x170 = x168 + x169 * poly_mix[13]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :126:34) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :134:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x171 = arg0[146]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :55:27) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x172 = x170 + x171 * poly_mix[14]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :53:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x173 = arg0[167]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :50:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x174 = x172 + x173 * poly_mix[15]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :59:31) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x175 = arg0[168]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :51:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x176 = x174 + x175 * poly_mix[16]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :50:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x177 = arg0[169]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :52:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x178 = x176 + x177 * poly_mix[17]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :51:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x179 = arg0[170]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :53:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x180 = x178 + x179 * poly_mix[18]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :52:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x181 = arg0[171]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :59:31) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x182 = x180 + x181 * poly_mix[19]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x183 = arg0[44]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :60:26) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x184 = x182 + x183 * poly_mix[20]; - // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :62:17) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x185 = x32 * x18; - // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :62:17) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg0[228] = x185; - // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :62:12) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x186 = x33 + x185; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :62:10) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x187 = x34 - x186; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :62:10) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x188 = x184 + x187 * poly_mix[21]; - // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:18) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x189 = x35 * x17; - // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:13) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x190 = x36 + x189; - // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:40) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x191 = x37 * x16; - // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:33) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x192 = x190 + x191; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:11) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x193 = x38 - x192; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:11) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x194 = x188 + x193 * poly_mix[22]; - // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:9) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x195 = x35 * x15; - // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x196 = x37 * x17; - // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:24) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x197 = x195 + x196; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:7) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x198 = x39 - x197; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:7) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x199 = x194 + x198 * poly_mix[23]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :53:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x200 = arg0[172]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :50:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x201 = x199 + x200 * poly_mix[24]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x202 = arg0[145]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :51:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x203 = x201 + x202 * poly_mix[25]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x204 = arg0[173]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :52:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x205 = x203 + x204 * poly_mix[26]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x206 = arg0[174]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :53:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x207 = x205 + x206 * poly_mix[27]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x208 = arg0[175]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :59:31) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x209 = x207 + x208 * poly_mix[28]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x210 = arg0[45]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :60:26) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x211 = x209 + x210 * poly_mix[29]; - // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :62:17) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x212 = x40 * x18; - // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :62:12) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x213 = x41 + x212; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :62:10) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x214 = x30 - x213; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :62:10) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x215 = x211 + x214 * poly_mix[30]; - // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:18) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x216 = x42 * x17; - // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:13) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x217 = x43 + x216; - // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:40) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x218 = x44 * x16; - // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:33) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x219 = x217 + x218; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:11) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x220 = x31 - x219; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:11) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x221 = x215 + x220 * poly_mix[31]; - // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:9) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x222 = x42 * x15; - // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x223 = x44 * x17; - // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:24) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x224 = x222 + x223; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:7) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x225 = x45 - x224; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:7) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x226 = x221 + x225 * poly_mix[32]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x227 = arg0[46]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :118:25) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x228 = x226 + x227 * poly_mix[33]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :126:34) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :135:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x229 = arg0[147]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :119:31) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x230 = x228 + x229 * poly_mix[34]; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :120:13) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x231 = x46 * x16; - // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :127:29) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :135:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x232 = arg0[176]; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :120:21) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x233 = x231 + x232; - // loc(callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :120:11) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x234 = x47 - x233; - // loc(callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :120:11) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x235 = x230 + x234 * poly_mix[35]; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :149:11) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x236 = arg0[177]; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :123:10) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x237 = x48 + x236; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :125:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x238 = x33 * x40; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :125:36) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x239 = x32 * x41; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :125:28) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x240 = x238 + x239; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :125:8) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x241 = x240 * x18; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :124:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x242 = x237 + x241; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :126:34) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :136:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x243 = arg0[149]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :97:30) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x244 = x235 + x243 * poly_mix[36]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x245 = x49 - x14; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg0[316] = x245; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x246 = x244 + x245 * poly_mix[37]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x247 = arg0[47]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x248 = x246 + x247 * poly_mix[38]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x249 = arg0[48]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x250 = x248 + x249 * poly_mix[39]; - // loc(callsite(unknown at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :57:4) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x251 = x50 * x22; - // loc(callsite(unknown at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :57:11) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x252 = x251 + x51; - // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:8) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x253 = x252 * x13; - // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:33) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x254 = x52 * x12; - // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:21) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x255 = x253 + x254; - // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:45) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x256 = x255 + x53; - // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x257 = x242 - x256; - // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x258 = x250 + x257 * poly_mix[40]; - // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :101:20) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x259 = x252 * x18; - // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :101:33) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x260 = x259 + x52; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :129:10) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x261 = x47 + x260; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :131:11) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x262 = x33 * x43; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :130:11) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x263 = x261 + x262; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :131:27) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x264 = x32 * x40; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :131:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x265 = x263 + x264; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :131:43) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x266 = x36 * x41; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :131:35) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x267 = x265 + x266; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :132:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x268 = x33 * x45; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :132:36) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x269 = x32 * x43; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :132:28) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x270 = x268 + x269; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :132:52) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x271 = x36 * x40; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :132:44) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x272 = x270 + x271; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :132:68) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x273 = x39 * x41; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :132:60) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x274 = x272 + x273; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :132:8) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x275 = x274 * x18; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :131:51) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x276 = x267 + x275; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x277 = arg0[150]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :97:30) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x278 = x258 + x277 * poly_mix[41]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x279 = x54 - x14; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg0[219] = x279; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x280 = x278 + x279 * poly_mix[42]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x281 = arg0[49]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x282 = x280 + x281 * poly_mix[43]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x283 = arg0[50]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x284 = x282 + x283 * poly_mix[44]; - // loc(callsite(unknown at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :57:4) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x285 = x55 * x22; - // loc(callsite(unknown at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :57:11) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x286 = x285 + x56; - // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:8) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x287 = x286 * x13; - // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:33) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x288 = x57 * x12; - // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:21) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x289 = x287 + x288; - // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:45) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x290 = x289 + x58; - // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x291 = x276 - x290; - // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x292 = x284 + x291 * poly_mix[45]; - // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :101:20) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x293 = x286 * x18; - // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :101:33) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x294 = x293 + x57; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :138:42) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x295 = x294 + x11; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :140:11) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x296 = x32 * x45; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :139:82) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x297 = x295 + x296; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :140:27) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x298 = x36 * x43; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :140:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x299 = x297 + x298; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :140:43) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x300 = x39 * x40; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :140:35) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x301 = x299 + x300; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :141:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x302 = x36 * x45; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :141:36) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x303 = x39 * x43; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :141:28) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x304 = x302 + x303; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :141:8) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x305 = x304 * x18; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :140:51) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x306 = x301 + x305; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :50:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x307 = arg0[178]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :97:30) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x308 = x292 + x307 * poly_mix[46]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x309 = x59 - x14; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg0[315] = x309; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x310 = x308 + x309 * poly_mix[47]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x311 = arg0[51]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x312 = x310 + x311 * poly_mix[48]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x313 = arg0[52]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x314 = x312 + x313 * poly_mix[49]; - // loc(callsite(unknown at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :57:4) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x315 = x60 * x22; - // loc(callsite(unknown at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :57:11) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x316 = x315 + x61; - // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:8) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x317 = x316 * x13; - // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:33) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x318 = x62 * x12; - // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:21) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x319 = x317 + x318; - // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:45) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x320 = x319 + x63; - // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x321 = x306 - x320; - // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x322 = x314 + x321 * poly_mix[50]; - // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :101:20) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x323 = x316 * x18; - // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :101:33) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x324 = x323 + x62; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :147:42) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x325 = x324 + x10; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :149:11) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x326 = x39 * x45; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :148:82) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x327 = x325 + x326; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :51:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x328 = arg0[179]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :150:25) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x329 = x322 + x328 * poly_mix[51]; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:28) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x330 = x327 - x64; - // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:41) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x331 = x330 * x9; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x332 = arg0[53]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :67:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x333 = x329 + x332 * poly_mix[52]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x334 = arg0[54]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :67:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x335 = x333 + x334 * poly_mix[53]; - // loc(callsite(unknown at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :57:4) at callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :67:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x336 = x65 * x22; - // loc(callsite(unknown at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :57:11) at callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :67:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x337 = x336 + x66; - // loc(callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :68:8) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x338 = x331 - x337; - // loc(callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :68:8) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x339 = x335 + x338 * poly_mix[54]; - // loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :106:10) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :62:15) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x340 = x53 - x67; - // loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :106:10) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :62:15) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x341 = x339 + x340 * poly_mix[55]; - // loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :107:11) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :62:15) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x342 = x58 - x68; - // loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :107:11) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :62:15) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x343 = x341 + x342 * poly_mix[56]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x344 = arg0[55]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :64:30) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x345 = x343 + x344 * poly_mix[57]; - // loc(callsite(unknown at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :65:36) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x346 = x69 * x8; - // loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :106:10) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :65:15) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x347 = x63 - x346; - // loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :106:10) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :65:15) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x348 = x345 + x347 * poly_mix[58]; - // loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :107:11) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :65:15) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x349 = x64 - x346; - // loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :107:11) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :65:15) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x350 = x348 + x349 * poly_mix[59]; - // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x351 = x350 + x70 * poly_mix[60]; - // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x352 = arg2 + x71 * x351 * poly_mix[59]; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :59:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x353 = arg0[180]; - // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :91:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x354 = x353 - x7; - // loc(callsite(unknown at callsite( FlipU16 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :77:14) at callsite( FlipU32 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :81:18) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:28) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x355 = x8 - x67; - // loc(callsite(unknown at callsite( FlipU16 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :77:14) at callsite( FlipU32 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :81:42) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:28) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x356 = x8 - x68; - // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :91:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x357 = arg3 + x354 * poly_mix[2]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x358 = arg0[33]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :44:21) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :92:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x359 = x357 + x358 * poly_mix[3]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :44:21) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :92:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x360 = x359 + x120 * poly_mix[4]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :44:21) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :92:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x361 = x360 + x122 * poly_mix[5]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :44:21) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :92:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x362 = x361 + x124 * poly_mix[6]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :44:21) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :92:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x363 = x362 + x126 * poly_mix[7]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :46:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :92:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x364 = x363 + x136 * poly_mix[8]; - // loc(callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :47:30) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :92:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x365 = x364 + x140 * poly_mix[9]; - // loc(callsite( Reg ( :5:7) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :50:13) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :92:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x366 = x365 + x155 * poly_mix[10]; - // loc(callsite( Reg ( :5:7) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :52:14) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :92:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x367 = x366 + x164 * poly_mix[11]; - // loc(callsite( Reg ( :5:7) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :53:15) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :92:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x368 = x367 + x167 * poly_mix[12]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x369 = arg0[42]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( TopBit ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :70:26) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :93:18) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x370 = x368 + x369 * poly_mix[13]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( TopBit ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :71:24) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :93:18) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x371 = x370 + x169 * poly_mix[14]; - // loc(callsite(unknown at callsite( TopBit ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :72:24) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :93:18) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x372 = x34 * x16; - // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :120:30) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x373 = arg0[181]; - // loc(callsite(unknown at callsite( TopBit ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :72:20) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :93:18) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x374 = x373 + x372; - // loc(callsite( TopBit ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :72:11) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :93:18) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x375 = x68 - x374; - // loc(callsite( TopBit ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :72:11) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :93:18) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x376 = x371 + x375 * poly_mix[15]; - // loc(callsite(unknown at callsite( FlipU16 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :77:4) at callsite( FlipU32 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :81:18) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:28) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x377 = x34 * x355; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x378 = arg0[182]; - // loc(callsite(unknown at callsite( FlipU16 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :77:39) at callsite( FlipU32 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :81:18) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:28) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x379 = x378 * x67; - // loc(callsite(unknown at callsite( FlipU16 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :77:24) at callsite( FlipU32 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :81:18) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:28) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x380 = x377 + x379; - // loc(callsite(unknown at callsite( FlipU16 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :77:4) at callsite( FlipU32 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :81:42) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:28) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x381 = x34 * x356; - // loc(callsite(unknown at callsite( FlipU16 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :77:39) at callsite( FlipU32 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :81:42) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:28) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x382 = x378 * x68; - // loc(callsite(unknown at callsite( FlipU16 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :77:24) at callsite( FlipU32 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :81:42) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:28) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x383 = x381 + x382; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :54:27) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x384 = x376 + x171 * poly_mix[16]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :55:27) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x385 = x384 + x229 * poly_mix[17]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :50:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x386 = x385 + x173 * poly_mix[18]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :51:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x387 = x386 + x175 * poly_mix[19]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :52:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x388 = x387 + x177 * poly_mix[20]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :53:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x389 = x388 + x179 * poly_mix[21]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :59:31) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x390 = x389 + x181 * poly_mix[22]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :60:26) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x391 = x390 + x210 * poly_mix[23]; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :62:10) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x392 = x38 - x186; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :62:10) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x393 = x391 + x392 * poly_mix[24]; - // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:33) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x394 = x190 + x218; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:11) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x395 = x37 - x394; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:11) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x396 = x393 + x395 * poly_mix[25]; - // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:24) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x397 = x195 + x223; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:7) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x398 = x39 - x397; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:7) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x399 = x396 + x398 * poly_mix[26]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :50:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x400 = x399 + x200 * poly_mix[27]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :51:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x401 = x400 + x202 * poly_mix[28]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :52:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x402 = x401 + x204 * poly_mix[29]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :53:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x403 = x402 + x206 * poly_mix[30]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :59:31) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x404 = x403 + x208 * poly_mix[31]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :60:26) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x405 = x404 + x227 * poly_mix[32]; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :62:10) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x406 = x405 + x214 * poly_mix[33]; - // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:33) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x407 = x217 + x231; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:11) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x408 = x31 - x407; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:11) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x409 = x406 + x408 * poly_mix[34]; - // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x410 = x46 * x17; - // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:24) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x411 = x222 + x410; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:7) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x412 = x45 - x411; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:7) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x413 = x409 + x412 * poly_mix[35]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :118:25) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x414 = x413 + x247 * poly_mix[36]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :119:31) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x415 = x414 + x243 * poly_mix[37]; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :120:13) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x416 = x51 * x16; - // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :127:29) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :136:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x417 = arg0[183]; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :120:21) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x418 = x416 + x417; - // loc(callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :120:11) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x419 = x72 - x418; - // loc(callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :120:11) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x420 = x415 + x419 * poly_mix[38]; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :123:10) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x421 = x47 + x236; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :124:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x422 = x421 + x241; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :97:30) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x423 = x420 + x277 * poly_mix[39]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x424 = x423 + x245 * poly_mix[40]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x425 = x424 + x249 * poly_mix[41]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x426 = x425 + x281 * poly_mix[42]; - // loc(callsite(unknown at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :57:4) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x427 = x56 * x22; - // loc(callsite(unknown at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :57:11) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x428 = x427 + x50; - // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:8) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x429 = x428 * x13; - // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:21) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x430 = x429 + x254; - // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:45) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x431 = x430 + x58; - // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x432 = x422 - x431; - // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x433 = x426 + x432 * poly_mix[43]; - // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :101:20) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x434 = x428 * x18; - // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :101:33) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x435 = x434 + x52; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :129:10) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x436 = x72 + x435; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :130:11) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x437 = x436 + x262; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :131:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x438 = x437 + x264; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :131:35) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x439 = x438 + x266; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :131:51) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x440 = x439 + x275; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :97:30) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x441 = x433 + x307 * poly_mix[44]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x442 = x441 + x279 * poly_mix[45]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x443 = x442 + x283 * poly_mix[46]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x444 = x443 + x311 * poly_mix[47]; - // loc(callsite(unknown at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :57:4) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x445 = x61 * x22; - // loc(callsite(unknown at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :57:11) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x446 = x445 + x55; - // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:8) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x447 = x446 * x13; - // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:21) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x448 = x447 + x288; - // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:45) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x449 = x448 + x63; - // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x450 = x440 - x449; - // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x451 = x444 + x450 * poly_mix[48]; - // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :101:20) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x452 = x446 * x18; - // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :101:33) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x453 = x452 + x57; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :138:42) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x454 = x453 + x11; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :139:82) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x455 = x454 + x296; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :140:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x456 = x455 + x298; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :140:35) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x457 = x456 + x300; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :140:51) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x458 = x457 + x305; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :97:30) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x459 = x451 + x328 * poly_mix[49]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x460 = x459 + x309 * poly_mix[50]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x461 = x460 + x313 * poly_mix[51]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x462 = x461 + x332 * poly_mix[52]; - // loc(callsite(unknown at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :57:4) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x463 = x66 * x22; - // loc(callsite(unknown at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :57:11) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x464 = x463 + x60; - // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:8) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x465 = x464 * x13; - // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:21) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x466 = x465 + x318; - // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:45) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x467 = x466 + x64; - // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x468 = x458 - x467; - // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x469 = x462 + x468 * poly_mix[53]; - // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :101:20) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x470 = x464 * x18; - // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :101:33) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x471 = x470 + x62; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :147:42) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x472 = x471 + x10; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :148:82) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x473 = x472 + x326; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x474 = arg0[144]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :150:25) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x475 = x469 + x474 * poly_mix[54]; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:28) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x476 = x473 - x73; - // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:41) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x477 = x476 * x9; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :67:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x478 = x475 + x334 * poly_mix[55]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :67:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x479 = x478 + x344 * poly_mix[56]; - // loc(callsite(unknown at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :57:4) at callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :67:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x480 = x69 * x22; - // loc(callsite(unknown at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :57:11) at callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :67:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x481 = x480 + x65; - // loc(callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :68:8) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x482 = x477 - x481; - // loc(callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :68:8) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x483 = x479 + x482 * poly_mix[57]; - // loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :106:10) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :62:15) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x484 = x58 - x380; - // loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :106:10) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :62:15) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x485 = x483 + x484 * poly_mix[58]; - // loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :107:11) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :62:15) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x486 = x63 - x383; - // loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :107:11) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :62:15) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x487 = x485 + x486 * poly_mix[59]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x488 = arg0[56]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :64:30) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x489 = x487 + x488 * poly_mix[60]; - // loc(callsite(unknown at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :65:36) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x490 = x74 * x8; - // loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :106:10) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :65:15) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x491 = x64 - x490; - // loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :106:10) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :65:15) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x492 = x489 + x491 * poly_mix[61]; - // loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :107:11) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :65:15) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x493 = x73 - x490; - // loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :107:11) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :65:15) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x494 = x492 + x493 * poly_mix[62]; - // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x495 = x352 + x75 * x494 * poly_mix[120]; - // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :62:19) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :99:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x496 = x76 - x6; - // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :62:19) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :99:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x497 = arg4 + x496 * poly_mix[0]; - // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :85:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x498 = arg0[184]; - // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :99:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x499 = x497 + x498 * poly_mix[1]; - // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :99:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x500 = x499 + x353 * poly_mix[2]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :44:21) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :100:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x501 = x500 + x358 * poly_mix[3]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :44:21) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :100:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x502 = x501 + x120 * poly_mix[4]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :44:21) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :100:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x503 = x502 + x122 * poly_mix[5]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :44:21) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :100:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x504 = x503 + x124 * poly_mix[6]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :44:21) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :100:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x505 = x504 + x126 * poly_mix[7]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :46:29) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :100:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x506 = x505 + x136 * poly_mix[8]; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :56:42) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x507 = arg0[185]; - // loc(callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :47:30) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :100:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x508 = x139 - x507; - // loc(callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :47:30) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :100:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x509 = x506 + x508 * poly_mix[9]; - // loc(callsite( Reg ( :5:7) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :50:13) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :100:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x510 = x509 + x155 * poly_mix[10]; - // loc(callsite( Reg ( :5:7) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :52:14) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :100:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x511 = x510 + x164 * poly_mix[11]; - // loc(callsite( Reg ( :5:7) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :53:15) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :100:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x512 = x511 + x167 * poly_mix[12]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :54:27) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :101:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x513 = x512 + x169 * poly_mix[13]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :55:27) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :101:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x514 = x513 + x171 * poly_mix[14]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :50:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :101:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x515 = x514 + x173 * poly_mix[15]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :51:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :101:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x516 = x515 + x175 * poly_mix[16]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :52:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :101:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x517 = x516 + x177 * poly_mix[17]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :53:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :101:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x518 = x517 + x179 * poly_mix[18]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :59:31) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :101:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x519 = x518 + x181 * poly_mix[19]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :60:26) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :101:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x520 = x519 + x183 * poly_mix[20]; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :62:10) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :101:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x521 = x520 + x187 * poly_mix[21]; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:11) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :101:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x522 = x521 + x193 * poly_mix[22]; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:7) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :101:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x523 = x522 + x198 * poly_mix[23]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :50:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :101:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x524 = x523 + x200 * poly_mix[24]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :51:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :101:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x525 = x524 + x202 * poly_mix[25]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :52:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :101:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x526 = x525 + x204 * poly_mix[26]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :53:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :101:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x527 = x526 + x206 * poly_mix[27]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :59:31) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :101:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x528 = x527 + x208 * poly_mix[28]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :60:26) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :101:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x529 = x528 + x210 * poly_mix[29]; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :62:10) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :101:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x530 = x529 + x214 * poly_mix[30]; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:11) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :101:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x531 = x530 + x220 * poly_mix[31]; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:7) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :101:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x532 = x531 + x225 * poly_mix[32]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :118:25) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :101:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x533 = x532 + x227 * poly_mix[33]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :119:31) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :101:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x534 = x533 + x229 * poly_mix[34]; - // loc(callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :120:11) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :101:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x535 = x534 + x234 * poly_mix[35]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :97:30) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :101:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x536 = x535 + x243 * poly_mix[36]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :101:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x537 = x536 + x245 * poly_mix[37]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :101:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x538 = x537 + x247 * poly_mix[38]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :101:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x539 = x538 + x249 * poly_mix[39]; - // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :101:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x540 = x539 + x257 * poly_mix[40]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :97:30) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :101:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x541 = x540 + x277 * poly_mix[41]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :101:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x542 = x541 + x279 * poly_mix[42]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :101:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x543 = x542 + x281 * poly_mix[43]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :101:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x544 = x543 + x283 * poly_mix[44]; - // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :101:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x545 = x544 + x291 * poly_mix[45]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :97:30) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :101:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x546 = x545 + x307 * poly_mix[46]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :101:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x547 = x546 + x309 * poly_mix[47]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :101:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x548 = x547 + x311 * poly_mix[48]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :101:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x549 = x548 + x313 * poly_mix[49]; - // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :101:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x550 = x549 + x321 * poly_mix[50]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :150:25) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :101:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x551 = x550 + x328 * poly_mix[51]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :67:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :101:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x552 = x551 + x332 * poly_mix[52]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :67:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :101:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x553 = x552 + x334 * poly_mix[53]; - // loc(callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :68:8) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :101:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x554 = x553 + x338 * poly_mix[54]; - // loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :106:10) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :62:15) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :101:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x555 = x554 + x340 * poly_mix[55]; - // loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :107:11) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :62:15) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :101:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x556 = x555 + x342 * poly_mix[56]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :64:30) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :101:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x557 = x556 + x344 * poly_mix[57]; - // loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :106:10) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :65:15) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :101:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x558 = x557 + x347 * poly_mix[58]; - // loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :107:11) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :65:15) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :101:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x559 = x558 + x349 * poly_mix[59]; - // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x560 = x559 + x70 * poly_mix[60]; - // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x561 = x495 + x77 * x560 * poly_mix[170]; - // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :105:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x562 = x499 + x354 * poly_mix[2]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :44:21) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :106:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x563 = x562 + x358 * poly_mix[3]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :44:21) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :106:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x564 = x563 + x120 * poly_mix[4]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :44:21) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :106:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x565 = x564 + x122 * poly_mix[5]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :44:21) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :106:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x566 = x565 + x124 * poly_mix[6]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :44:21) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :106:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x567 = x566 + x126 * poly_mix[7]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :46:29) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :106:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x568 = x567 + x136 * poly_mix[8]; - // loc(callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :47:30) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :106:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x569 = x568 + x508 * poly_mix[9]; - // loc(callsite( Reg ( :5:7) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :50:13) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :106:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x570 = x569 + x155 * poly_mix[10]; - // loc(callsite( Reg ( :5:7) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :52:14) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :106:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x571 = x570 + x164 * poly_mix[11]; - // loc(callsite( Reg ( :5:7) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :53:15) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :106:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x572 = x571 + x167 * poly_mix[12]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( TopBit ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :70:26) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :107:18) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x573 = x572 + x369 * poly_mix[13]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( TopBit ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :71:24) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :107:18) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x574 = x573 + x169 * poly_mix[14]; - // loc(callsite( TopBit ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :72:11) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :107:18) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x575 = x574 + x375 * poly_mix[15]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :54:27) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :108:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x576 = x575 + x171 * poly_mix[16]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :55:27) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :108:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x577 = x576 + x229 * poly_mix[17]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :50:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :108:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x578 = x577 + x173 * poly_mix[18]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :51:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :108:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x579 = x578 + x175 * poly_mix[19]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :52:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :108:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x580 = x579 + x177 * poly_mix[20]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :53:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :108:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x581 = x580 + x179 * poly_mix[21]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :59:31) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :108:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x582 = x581 + x181 * poly_mix[22]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :60:26) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :108:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x583 = x582 + x210 * poly_mix[23]; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :62:10) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :108:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x584 = x583 + x392 * poly_mix[24]; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:11) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :108:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x585 = x584 + x395 * poly_mix[25]; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:7) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :108:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x586 = x585 + x398 * poly_mix[26]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :50:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :108:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x587 = x586 + x200 * poly_mix[27]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :51:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :108:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x588 = x587 + x202 * poly_mix[28]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :52:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :108:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x589 = x588 + x204 * poly_mix[29]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :53:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :108:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x590 = x589 + x206 * poly_mix[30]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :59:31) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :108:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x591 = x590 + x208 * poly_mix[31]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :60:26) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :108:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x592 = x591 + x227 * poly_mix[32]; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :62:10) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :108:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x593 = x592 + x214 * poly_mix[33]; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:11) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :108:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x594 = x593 + x408 * poly_mix[34]; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:7) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :108:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x595 = x594 + x412 * poly_mix[35]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :118:25) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :108:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x596 = x595 + x247 * poly_mix[36]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :119:31) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :108:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x597 = x596 + x243 * poly_mix[37]; - // loc(callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :120:11) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :108:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x598 = x597 + x419 * poly_mix[38]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :97:30) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :108:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x599 = x598 + x277 * poly_mix[39]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :108:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x600 = x599 + x245 * poly_mix[40]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :108:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x601 = x600 + x249 * poly_mix[41]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :108:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x602 = x601 + x281 * poly_mix[42]; - // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :108:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x603 = x602 + x432 * poly_mix[43]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :97:30) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :108:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x604 = x603 + x307 * poly_mix[44]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :108:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x605 = x604 + x279 * poly_mix[45]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :108:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x606 = x605 + x283 * poly_mix[46]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :108:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x607 = x606 + x311 * poly_mix[47]; - // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :108:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x608 = x607 + x450 * poly_mix[48]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :97:30) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :108:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x609 = x608 + x328 * poly_mix[49]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :108:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x610 = x609 + x309 * poly_mix[50]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :108:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x611 = x610 + x313 * poly_mix[51]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :108:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x612 = x611 + x332 * poly_mix[52]; - // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :108:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x613 = x612 + x468 * poly_mix[53]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :150:25) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :108:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x614 = x613 + x474 * poly_mix[54]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :67:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :108:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x615 = x614 + x334 * poly_mix[55]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :67:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :108:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x616 = x615 + x344 * poly_mix[56]; - // loc(callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :68:8) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :108:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x617 = x616 + x482 * poly_mix[57]; - // loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :106:10) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :62:15) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :108:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x618 = x617 + x484 * poly_mix[58]; - // loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :107:11) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :62:15) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :108:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x619 = x618 + x486 * poly_mix[59]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :64:30) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :108:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x620 = x619 + x488 * poly_mix[60]; - // loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :106:10) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :65:15) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :108:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x621 = x620 + x491 * poly_mix[61]; - // loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :107:11) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :65:15) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :108:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x622 = x621 + x493 * poly_mix[62]; - // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x623 = x561 + x78 * x622 * poly_mix[219]; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :60:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x624 = arg0[186]; - // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :113:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x625 = x624 - x21; - // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :113:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x626 = x353 - x14; - // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :113:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x627 = arg5 + x625 * poly_mix[1]; - // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :113:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x628 = x627 + x626 * poly_mix[2]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :54:27) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x629 = x628 + x136 * poly_mix[3]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :55:27) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x630 = x629 + x169 * poly_mix[4]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :50:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x631 = x630 + x173 * poly_mix[5]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :51:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x632 = x631 + x175 * poly_mix[6]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :52:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x633 = x632 + x177 * poly_mix[7]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :53:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x634 = x633 + x179 * poly_mix[8]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :59:31) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x635 = x634 + x181 * poly_mix[9]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :60:26) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x636 = x635 + x122 * poly_mix[10]; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :62:10) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x637 = x27 - x186; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :62:10) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x638 = x636 + x637 * poly_mix[11]; - // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:40) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x639 = arg0[187]; - // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:33) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x640 = x190 + x639; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:11) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x641 = x23 - x640; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:11) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x642 = x638 + x641 * poly_mix[12]; - // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x643 = arg0[188]; - // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:24) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x644 = x195 + x643; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:7) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x645 = x39 - x644; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:7) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x646 = x642 + x645 * poly_mix[13]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :50:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x647 = x646 + x200 * poly_mix[14]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :51:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x648 = x647 + x202 * poly_mix[15]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :52:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x649 = x648 + x204 * poly_mix[16]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :53:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x650 = x649 + x206 * poly_mix[17]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :59:31) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x651 = x650 + x208 * poly_mix[18]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :60:26) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x652 = x651 + x124 * poly_mix[19]; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :62:10) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x653 = x28 - x213; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :62:10) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x654 = x652 + x653 * poly_mix[20]; - // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:40) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x655 = arg0[189]; - // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:33) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x656 = x217 + x655; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:11) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x657 = x79 - x656; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:11) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x658 = x654 + x657 * poly_mix[21]; - // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x659 = arg0[190]; - // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:24) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x660 = x222 + x659; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:7) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x661 = x45 - x660; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:7) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x662 = x658 + x661 * poly_mix[22]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :118:25) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x663 = x662 + x126 * poly_mix[23]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :119:31) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x664 = x663 + x171 * poly_mix[24]; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :120:13) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x665 = arg0[191]; - // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :127:29) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :134:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x666 = arg0[192]; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :120:21) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x667 = x665 + x666; - // loc(callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :120:11) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x668 = x48 - x667; - // loc(callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :120:11) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x669 = x664 + x668 * poly_mix[25]; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :123:10) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x670 = x80 + x236; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :124:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x671 = x670 + x241; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :97:30) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x672 = x669 + x229 * poly_mix[26]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x673 = x672 + x245 * poly_mix[27]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x674 = arg0[38]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x675 = x673 + x674 * poly_mix[28]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x676 = arg0[39]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x677 = x675 + x676 * poly_mix[29]; - // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:8) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x678 = arg0[193]; - // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:21) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x679 = x678 + x254; - // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:45) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x680 = x679 + x72; - // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x681 = x671 - x680; - // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x682 = x677 + x681 * poly_mix[30]; - // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :101:20) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x683 = arg0[194]; - // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :101:33) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x684 = x683 + x52; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :129:10) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x685 = x48 + x684; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :130:11) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x686 = x685 + x262; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :131:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x687 = x686 + x264; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :131:35) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x688 = x687 + x266; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :131:51) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x689 = x688 + x275; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :97:30) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x690 = x682 + x243 * poly_mix[31]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x691 = x690 + x279 * poly_mix[32]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x692 = arg0[41]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x693 = x691 + x692 * poly_mix[33]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x694 = x693 + x369 * poly_mix[34]; - // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:8) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x695 = arg0[195]; - // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:21) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x696 = x695 + x288; - // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:45) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x697 = x696 + x53; - // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x698 = x689 - x697; - // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x699 = x694 + x698 * poly_mix[35]; - // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :101:20) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x700 = arg0[196]; - // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :101:33) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x701 = x700 + x57; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :138:9) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x702 = x26 * x8; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :137:11) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x703 = x701 + x702; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :138:42) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x704 = x703 + x11; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :139:40) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x705 = x186 * x25; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :139:8) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x706 = x704 - x705; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :139:75) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x707 = x213 * x24; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :139:47) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x708 = x706 - x707; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :139:82) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x709 = x708 + x296; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :140:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x710 = x709 + x298; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :140:35) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x711 = x710 + x300; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :140:51) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x712 = x711 + x305; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :97:30) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x713 = x699 + x277 * poly_mix[36]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x714 = x713 + x309 * poly_mix[37]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x715 = arg0[43]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x716 = x714 + x715 * poly_mix[38]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x717 = x716 + x183 * poly_mix[39]; - // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:8) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x718 = arg0[197]; - // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:21) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x719 = x718 + x318; - // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:45) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x720 = x719 + x58; - // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x721 = x712 - x720; - // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x722 = x717 + x721 * poly_mix[40]; - // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :101:20) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x723 = arg0[198]; - // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :101:33) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x724 = x723 + x62; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :146:16) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x725 = x724 + x702; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :147:42) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x726 = x725 + x10; - // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :62:12) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x727 = arg0[199]; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :148:40) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x728 = x727 * x25; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :148:8) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x729 = x726 - x728; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :148:65) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x730 = x45 * x18; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :148:57) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x731 = x43 + x730; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :148:75) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x732 = x731 * x24; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :148:47) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x733 = x729 - x732; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :148:82) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x734 = x733 + x326; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :150:25) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x735 = x722 + x307 * poly_mix[41]; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:28) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x736 = x734 - x63; - // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:41) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x737 = x736 * x9; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :67:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x738 = x735 + x210 * poly_mix[42]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :67:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x739 = x738 + x227 * poly_mix[43]; - // loc(callsite(unknown at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :57:11) at callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :67:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x740 = arg0[200]; - // loc(callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :68:8) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x741 = x737 - x740; - // loc(callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :68:8) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x742 = x739 + x741 * poly_mix[44]; - // loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :106:10) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :62:15) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x743 = x72 - x67; - // loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :106:10) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :62:15) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x744 = x742 + x743 * poly_mix[45]; - // loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :107:11) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :62:15) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x745 = x53 - x68; - // loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :107:11) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :62:15) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x746 = x744 + x745 * poly_mix[46]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :64:30) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x747 = x746 + x247 * poly_mix[47]; - // loc(callsite(unknown at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :65:36) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x748 = x51 * x8; - // loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :106:10) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :65:15) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x749 = x58 - x748; - // loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :106:10) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :65:15) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x750 = x747 + x749 * poly_mix[48]; - // loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :107:11) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :65:15) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x751 = x63 - x748; - // loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :107:11) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :65:15) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x752 = x750 + x751 * poly_mix[49]; - // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x753 = x752 + x81 * poly_mix[50]; - // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x754 = x753 + x70 * poly_mix[51]; - // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x755 = x623 + x82 * x754 * poly_mix[265]; - // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :118:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x756 = arg3 + x626 * poly_mix[2]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :54:27) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x757 = x756 + x136 * poly_mix[3]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :55:27) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x758 = x757 + x169 * poly_mix[4]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :50:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x759 = x758 + x173 * poly_mix[5]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :51:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x760 = x759 + x175 * poly_mix[6]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :52:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x761 = x760 + x177 * poly_mix[7]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :53:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x762 = x761 + x179 * poly_mix[8]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :59:31) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x763 = x762 + x181 * poly_mix[9]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :60:26) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x764 = x763 + x122 * poly_mix[10]; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :62:10) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x765 = x764 + x637 * poly_mix[11]; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:11) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x766 = x765 + x641 * poly_mix[12]; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:7) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x767 = x766 + x645 * poly_mix[13]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :50:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x768 = x767 + x200 * poly_mix[14]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :51:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x769 = x768 + x202 * poly_mix[15]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :52:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x770 = x769 + x204 * poly_mix[16]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :53:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x771 = x770 + x206 * poly_mix[17]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :59:31) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x772 = x771 + x208 * poly_mix[18]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :60:26) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x773 = x772 + x124 * poly_mix[19]; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :62:10) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x774 = x773 + x653 * poly_mix[20]; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:11) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x775 = x774 + x657 * poly_mix[21]; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:7) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x776 = x775 + x661 * poly_mix[22]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :118:25) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x777 = x776 + x126 * poly_mix[23]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :119:31) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x778 = x777 + x171 * poly_mix[24]; - // loc(callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :120:11) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x779 = x778 + x668 * poly_mix[25]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :97:30) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x780 = x779 + x229 * poly_mix[26]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x781 = x780 + x245 * poly_mix[27]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x782 = x781 + x674 * poly_mix[28]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x783 = x782 + x676 * poly_mix[29]; - // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x784 = x783 + x681 * poly_mix[30]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :97:30) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x785 = x784 + x243 * poly_mix[31]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x786 = x785 + x279 * poly_mix[32]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x787 = x786 + x692 * poly_mix[33]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x788 = x787 + x369 * poly_mix[34]; - // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x789 = x788 + x698 * poly_mix[35]; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :138:42) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x790 = x701 + x11; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :139:82) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x791 = x790 + x296; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :140:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x792 = x791 + x298; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :140:35) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x793 = x792 + x300; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :140:51) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x794 = x793 + x305; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :97:30) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x795 = x789 + x277 * poly_mix[36]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x796 = x795 + x309 * poly_mix[37]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x797 = x796 + x715 * poly_mix[38]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x798 = x797 + x183 * poly_mix[39]; - // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x799 = x794 - x720; - // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x800 = x798 + x799 * poly_mix[40]; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :147:42) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x801 = x724 + x10; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :148:82) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x802 = x801 + x326; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :150:25) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x803 = x800 + x307 * poly_mix[41]; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:28) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x804 = x802 - x63; - // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:41) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x805 = x804 * x9; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :67:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x806 = x803 + x210 * poly_mix[42]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :67:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x807 = x806 + x227 * poly_mix[43]; - // loc(callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :68:8) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x808 = x805 - x740; - // loc(callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :68:8) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x809 = x807 + x808 * poly_mix[44]; - // loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :106:10) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :62:15) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x810 = x809 + x743 * poly_mix[45]; - // loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :107:11) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :62:15) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x811 = x810 + x745 * poly_mix[46]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :64:30) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x812 = x811 + x247 * poly_mix[47]; - // loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :106:10) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :65:15) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x813 = x812 + x749 * poly_mix[48]; - // loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :107:11) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :65:15) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x814 = x813 + x751 * poly_mix[49]; - // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x815 = x814 + x81 * poly_mix[50]; - // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x816 = x815 + x70 * poly_mix[51]; - // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x817 = x755 + x83 * x816 * poly_mix[294]; - // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :123:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x818 = x624 - x5; - // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :123:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x819 = arg5 + x818 * poly_mix[1]; - // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :123:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x820 = x819 + x626 * poly_mix[2]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :54:27) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x821 = x820 + x136 * poly_mix[3]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :55:27) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x822 = x821 + x169 * poly_mix[4]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :50:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x823 = x822 + x173 * poly_mix[5]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :51:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x824 = x823 + x175 * poly_mix[6]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :52:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x825 = x824 + x177 * poly_mix[7]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :53:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x826 = x825 + x179 * poly_mix[8]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :59:31) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x827 = x826 + x181 * poly_mix[9]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :60:26) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x828 = x827 + x122 * poly_mix[10]; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :62:10) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x829 = x828 + x637 * poly_mix[11]; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:11) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x830 = x829 + x641 * poly_mix[12]; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:7) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x831 = x830 + x645 * poly_mix[13]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :50:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x832 = x831 + x200 * poly_mix[14]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :51:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x833 = x832 + x202 * poly_mix[15]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :52:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x834 = x833 + x204 * poly_mix[16]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :53:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x835 = x834 + x206 * poly_mix[17]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :59:31) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x836 = x835 + x208 * poly_mix[18]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :60:26) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x837 = x836 + x124 * poly_mix[19]; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :62:10) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x838 = x837 + x653 * poly_mix[20]; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:11) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x839 = x838 + x657 * poly_mix[21]; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:7) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x840 = x839 + x661 * poly_mix[22]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :118:25) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x841 = x840 + x126 * poly_mix[23]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :119:31) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x842 = x841 + x171 * poly_mix[24]; - // loc(callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :120:11) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x843 = x842 + x668 * poly_mix[25]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :97:30) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x844 = x843 + x229 * poly_mix[26]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x845 = x844 + x245 * poly_mix[27]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x846 = x845 + x674 * poly_mix[28]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x847 = x846 + x676 * poly_mix[29]; - // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x848 = x847 + x681 * poly_mix[30]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :97:30) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x849 = x848 + x243 * poly_mix[31]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x850 = x849 + x279 * poly_mix[32]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x851 = x850 + x692 * poly_mix[33]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x852 = x851 + x369 * poly_mix[34]; - // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x853 = x852 + x698 * poly_mix[35]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :97:30) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x854 = x853 + x277 * poly_mix[36]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x855 = x854 + x309 * poly_mix[37]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x856 = x855 + x715 * poly_mix[38]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x857 = x856 + x183 * poly_mix[39]; - // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x858 = x857 + x721 * poly_mix[40]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :150:25) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x859 = x858 + x307 * poly_mix[41]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :67:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x860 = x859 + x210 * poly_mix[42]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :67:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x861 = x860 + x227 * poly_mix[43]; - // loc(callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :68:8) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x862 = x861 + x741 * poly_mix[44]; - // loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :106:10) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :62:15) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x863 = x862 + x743 * poly_mix[45]; - // loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :107:11) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :62:15) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x864 = x863 + x745 * poly_mix[46]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :64:30) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x865 = x864 + x247 * poly_mix[47]; - // loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :106:10) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :65:15) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x866 = x865 + x749 * poly_mix[48]; - // loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :107:11) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :65:15) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x867 = x866 + x751 * poly_mix[49]; - // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x868 = x867 + x81 * poly_mix[50]; - // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x869 = x868 + x70 * poly_mix[51]; - // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x870 = x817 + x84 * x869 * poly_mix[337]; - // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :128:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x871 = x624 - x4; - // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :128:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x872 = arg5 + x871 * poly_mix[1]; - // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :128:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x873 = x872 + x626 * poly_mix[2]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :54:27) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :129:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x874 = x873 + x136 * poly_mix[3]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :55:27) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :129:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x875 = x874 + x169 * poly_mix[4]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :50:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :129:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x876 = x875 + x173 * poly_mix[5]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :51:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :129:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x877 = x876 + x175 * poly_mix[6]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :52:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :129:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x878 = x877 + x177 * poly_mix[7]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :53:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :129:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x879 = x878 + x179 * poly_mix[8]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :59:31) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :129:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x880 = x879 + x181 * poly_mix[9]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :60:26) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :129:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x881 = x880 + x122 * poly_mix[10]; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :62:10) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :129:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x882 = x881 + x637 * poly_mix[11]; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:11) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :129:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x883 = x882 + x641 * poly_mix[12]; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:7) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :129:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x884 = x883 + x645 * poly_mix[13]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :50:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :129:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x885 = x884 + x200 * poly_mix[14]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :51:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :129:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x886 = x885 + x202 * poly_mix[15]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :52:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :129:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x887 = x886 + x204 * poly_mix[16]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :53:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :129:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x888 = x887 + x206 * poly_mix[17]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :59:31) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :129:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x889 = x888 + x208 * poly_mix[18]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :60:26) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :129:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x890 = x889 + x124 * poly_mix[19]; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :62:10) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :129:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x891 = x890 + x653 * poly_mix[20]; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:11) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :129:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x892 = x891 + x657 * poly_mix[21]; - // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:7) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :129:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x893 = x892 + x661 * poly_mix[22]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :118:25) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :129:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x894 = x893 + x126 * poly_mix[23]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :119:31) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :129:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x895 = x894 + x171 * poly_mix[24]; - // loc(callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :120:11) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :129:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x896 = x895 + x668 * poly_mix[25]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :97:30) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :129:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x897 = x896 + x229 * poly_mix[26]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :129:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x898 = x897 + x245 * poly_mix[27]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :129:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x899 = x898 + x674 * poly_mix[28]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :129:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x900 = x899 + x676 * poly_mix[29]; - // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :129:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x901 = x900 + x681 * poly_mix[30]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :97:30) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :129:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x902 = x901 + x243 * poly_mix[31]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :129:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x903 = x902 + x279 * poly_mix[32]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :129:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x904 = x903 + x692 * poly_mix[33]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :129:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x905 = x904 + x369 * poly_mix[34]; - // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :129:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x906 = x905 + x698 * poly_mix[35]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :97:30) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :129:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x907 = x906 + x277 * poly_mix[36]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :129:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x908 = x907 + x309 * poly_mix[37]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :129:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x909 = x908 + x715 * poly_mix[38]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :129:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x910 = x909 + x183 * poly_mix[39]; - // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :129:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x911 = x910 + x799 * poly_mix[40]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :150:25) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :129:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x912 = x911 + x307 * poly_mix[41]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :67:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :129:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x913 = x912 + x210 * poly_mix[42]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :67:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :129:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - FpExt x914 = x913 + x227 * poly_mix[43]; - // loc(callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :68:8) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :129:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x915 = x914 + x808 * poly_mix[44]; - // loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :106:10) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :62:15) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :129:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x916 = x915 + x743 * poly_mix[45]; - // loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :107:11) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :62:15) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :129:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x917 = x916 + x745 * poly_mix[46]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :64:30) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :129:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x918 = x917 + x247 * poly_mix[47]; - // loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :106:10) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :65:15) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :129:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x919 = x918 + x749 * poly_mix[48]; - // loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :107:11) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :65:15) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :129:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x920 = x919 + x751 * poly_mix[49]; - // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x921 = x920 + x81 * poly_mix[50]; - // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x922 = x921 + x70 * poly_mix[51]; - // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x923 = x870 + x85 * x922 * poly_mix[339]; - // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x924 = x86 * x71; - // loc(callsite(unknown at callsite( FlipU16 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :77:14) at callsite( FlipU32 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :81:18) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :95:11) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x925 = x8 - x87; - // loc(callsite(unknown at callsite( FlipU16 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :77:4) at callsite( FlipU32 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :81:18) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :95:11) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x926 = x86 * x925; - // loc(callsite(unknown at callsite( FlipU16 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :77:29) at callsite( FlipU32 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :81:18) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :95:11) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x927 = x14 - x86; - // loc(callsite(unknown at callsite( FlipU16 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :77:39) at callsite( FlipU32 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :81:18) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :95:11) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x928 = x927 * x87; - // loc(callsite(unknown at callsite( FlipU16 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :77:24) at callsite( FlipU32 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :81:18) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :95:11) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x929 = x926 + x928; - // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x930 = x929 * x75; - // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x931 = x86 * x77; - // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x932 = x929 * x78; - // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x933 = x88 * x82; - // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x934 = x88 * x83; - // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x935 = x89 * x84; - // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x936 = x89 * x85; - // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x937 = x924 + x930; - // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x938 = x937 + x931; - // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x939 = x938 + x932; - // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x940 = x939 + x933; - // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x941 = x940 + x934; - // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x942 = x941 + x935; - // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x943 = x942 + x936; - // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x944 = x87 * x71; - // loc(callsite(unknown at callsite( FlipU16 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :77:14) at callsite( FlipU32 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :81:42) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :95:11) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x945 = x8 - x90; - // loc(callsite(unknown at callsite( FlipU16 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :77:4) at callsite( FlipU32 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :81:42) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :95:11) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x946 = x86 * x945; - // loc(callsite(unknown at callsite( FlipU16 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :77:39) at callsite( FlipU32 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :81:42) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :95:11) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x947 = x927 * x90; - // loc(callsite(unknown at callsite( FlipU16 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :77:24) at callsite( FlipU32 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :81:42) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :95:11) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x948 = x946 + x947; - // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x949 = x948 * x75; - // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x950 = x87 * x77; - // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x951 = x948 * x78; - // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x952 = x91 * x82; - // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x953 = x91 * x83; - // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x954 = x92 * x84; - // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x955 = x92 * x85; - // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x956 = x944 + x949; - // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x957 = x956 + x950; - // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x958 = x957 + x951; - // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x959 = x958 + x952; - // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x960 = x959 + x953; - // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x961 = x960 + x954; - // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x962 = x961 + x955; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x963 = arg0[58]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x964 = x923 + x963 * poly_mix[341]; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :57:39) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x965 = arg0[201]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:4) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x966 = x965 * x93; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x967 = arg0[202]; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x968 = x966 - x967; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x969 = x964 + x968 * poly_mix[342]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:4) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x970 = x94 * x965; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:17) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x971 = x969 + x970 * poly_mix[343]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:4) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x972 = x94 * x93; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:17) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x973 = x971 + x972 * poly_mix[344]; - // loc(callsite(unknown at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :41:11) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x974 = x967 * x965; - // loc(callsite(unknown at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :42:90) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x975 = x14 - x967; - // loc(callsite(unknown at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :42:102) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x976 = x975 * x3; - // loc(callsite(unknown at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :34:44) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x977 = arg0[23]; - // loc(callsite(unknown at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :42:85) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x978 = x977 + x976; - // loc(callsite(unknown at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :42:106) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x979 = x978 + x974; - // loc(callsite( Reg ( :5:7) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :42:21) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x980 = x979 - x95; - // loc(callsite( Reg ( :5:7) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :42:21) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x981 = x973 + x980 * poly_mix[345]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x982 = x96 - x2; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x983 = x981 + x982 * poly_mix[346]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x984 = x97 - x14; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - arg0[453] = x984; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x985 = x983 + x984 * poly_mix[347]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x986 = x985 + x1 * poly_mix[348]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x987 = x986 + x1 * poly_mix[349]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x988 = x98 - x95; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x989 = x987 + x988 * poly_mix[350]; - // loc(callsite(unknown at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:22) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x990 = x99 - x100; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x991 = x101 - x14; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x992 = x989 + x991 * poly_mix[351]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x993 = x102 - x990; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x994 = x992 + x993 * poly_mix[352]; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x995 = x103 - x943; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x996 = x994 + x995 * poly_mix[353]; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x997 = x104 - x962; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x998 = x996 + x997 * poly_mix[354]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :34:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x999 = x105 - x14; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :34:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x1000 = x998 + x999 * poly_mix[355]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x1001 = arg0[73]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :45:28) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :34:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1002 = x1000 + x1001 * poly_mix[356]; - // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:12) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :34:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x1003 = x106 * x12; - // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :34:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x1004 = x1003 + x107; - // loc(callsite(unknown at callsite( AddU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :27:21) at callsite( SimpleOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :74:20) at callsite( OpADD ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :87:12) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :31:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1005 = arg0[100]; - // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:10) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :34:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x1006 = x1005 - x1004; - // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:10) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :34:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x1007 = x1002 + x1006 * poly_mix[357]; - // loc(callsite(unknown at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :53:34) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x1008 = arg0[102]; - // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :48:14) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :34:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x1009 = x1008 + x106; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :34:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x1010 = x108 - x14; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :34:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - arg0[456] = x1010; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :34:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x1011 = x1007 + x1010 * poly_mix[358]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x1012 = arg0[77]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :51:29) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :34:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1013 = x1011 + x1012 * poly_mix[359]; - // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:11) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :34:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x1014 = x109 * x12; - // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :34:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x1015 = x1014 + x110; - // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :34:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x1016 = x1009 - x1015; - // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :34:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x1017 = x1013 + x1016 * poly_mix[360]; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - FpExt x1018 = arg6 + x111 * x1017 * poly_mix[386]; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:11) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :63:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1019 = x14 - x36; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:4) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :63:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1020 = x36 * x1019; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:23) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :63:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1021 = x22 - x36; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:18) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :63:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1022 = x1020 * x1021; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:35) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :63:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1023 = x0 - x36; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :63:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1024 = x1022 * x1023; - // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :63:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1025 = arg7 + x1024 * poly_mix[2]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :65:23) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1026 = x1025 + x179 * poly_mix[3]; - // loc(callsite(unknown at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :65:53) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1027 = arg0[120]; - // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :65:23) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1028 = x39 - x1027; - // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :65:23) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1029 = x1026 + x1028 * poly_mix[4]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1030 = x14 - x112; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1031 = x112 * x1030; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1032 = x1029 + x1031 * poly_mix[5]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:4) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1033 = x1008 * x35; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1034 = x1033 - x1030; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1035 = x1032 + x1034 * poly_mix[6]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:4) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1036 = x112 * x1008; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:17) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1037 = x1035 + x1036 * poly_mix[7]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:4) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1038 = x112 * x35; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:17) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1039 = x1037 + x1038 * poly_mix[8]; - // loc(callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:19) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1040 = x1039 + x112 * poly_mix[9]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :69:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1041 = x1040 + x200 * poly_mix[10]; - // loc(callsite(unknown at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :71:4) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1042 = x41 * x21; - // loc(callsite(unknown at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :71:12) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1043 = x1042 + x36; - // loc(callsite(unknown at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :52:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x1044 = arg0[99]; - // loc(callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :71:21) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1045 = x1043 - x1044; - // loc(callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :71:21) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1046 = x1041 + x1045 * poly_mix[11]; - // loc(callsite(unknown at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :73:12) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1047 = arg0[121]; - // loc(callsite(unknown at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :73:23) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1048 = x1047 + x41; - // loc(callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :26:17) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x1049 = x1046 + x36 * poly_mix[12]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1050 = x40 - x2; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1051 = x1049 + x1050 * poly_mix[13]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1052 = x45 - x14; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1053 = x1051 + x1052 * poly_mix[14]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1054 = x1053 + x1 * poly_mix[15]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1055 = x1054 + x1 * poly_mix[16]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1056 = x113 - x1048; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1057 = x1055 + x1056 * poly_mix[17]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1058 = x43 - x114; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1059 = x1057 + x1058 * poly_mix[18]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1060 = x115 - x42; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1061 = x1059 + x1060 * poly_mix[19]; - // loc(callsite(unknown at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1062 = x99 - x116; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1063 = x1061 + x245 * poly_mix[20]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1064 = x52 - x1062; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1065 = x1063 + x1064 * poly_mix[21]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :15:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1066 = x14 - x117; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :15:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - arg0[470] = x1066; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :15:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1067 = x117 * x1066; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :15:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1068 = x1065 + x1067 * poly_mix[22]; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:11) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :16:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1069 = x14 - x72; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:11) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :16:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - arg0[386] = x1069; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:4) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :16:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1070 = x72 * x1069; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:23) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :16:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1071 = x22 - x72; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:18) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :16:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1072 = x1070 * x1071; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:35) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :16:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1073 = x0 - x72; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :16:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1074 = x1072 * x1073; - // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :16:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1075 = x1068 + x1074 * poly_mix[23]; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:11) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :17:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1076 = x14 - x118; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:4) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :17:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1077 = x118 * x1076; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:4) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :17:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - arg0[220] = x1077; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:23) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :17:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1078 = x22 - x118; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:18) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :17:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1079 = x1077 * x1078; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:35) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :17:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1080 = x0 - x118; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :17:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1081 = x1079 * x1080; - // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :17:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1082 = x1075 + x1081 * poly_mix[24]; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:11) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :18:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1083 = x14 - x53; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:11) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :18:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - arg0[465] = x1083; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:4) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :18:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1084 = x53 * x1083; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:23) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :18:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1085 = x22 - x53; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:18) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :18:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1086 = x1084 * x1085; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:35) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :18:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1087 = x0 - x53; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :18:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1088 = x1086 * x1087; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :18:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - arg0[221] = x1088; - // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :18:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1089 = x1082 + x1088 * poly_mix[25]; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:11) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :19:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1090 = x14 - x119; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:11) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :19:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - arg0[468] = x1090; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:4) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :19:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1091 = x119 * x1090; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:23) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :19:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1092 = x22 - x119; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:23) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :19:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - arg0[471] = x1092; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:18) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :19:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1093 = x1091 * x1092; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:35) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :19:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1094 = x0 - x119; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:35) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :19:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - arg0[472] = x1094; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :19:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1095 = x1093 * x1094; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :19:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - arg0[222] = x1095; - // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :19:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1096 = x1089 + x1095 * poly_mix[26]; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:11) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :20:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1097 = x14 - x58; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:4) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :20:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1098 = x58 * x1097; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:23) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :20:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1099 = x22 - x58; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:18) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :20:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1100 = x1098 * x1099; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:35) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :20:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1101 = x0 - x58; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :20:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1102 = x1100 * x1101; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :20:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - arg0[223] = x1102; - // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :20:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1103 = x1096 + x1102 * poly_mix[27]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :45:28) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1104 = arg0[203]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :21:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1105 = x1103 + x1104 * poly_mix[28]; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:11) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :22:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1106 = x14 - x63; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:4) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :22:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1107 = x63 * x1106; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:23) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :22:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1108 = x22 - x63; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:18) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :22:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1109 = x1107 * x1108; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:35) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :22:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1110 = x0 - x63; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :22:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1111 = x1109 * x1110; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :22:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - arg0[224] = x1111; - // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :22:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1112 = x1105 + x1111 * poly_mix[29]; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:11) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :23:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1113 = x14 - x81; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:4) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :23:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1114 = x81 * x1113; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:4) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :23:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - arg0[225] = x1114; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:23) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :23:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1115 = x22 - x81; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:18) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :23:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1116 = x1114 * x1115; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:35) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :23:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1117 = x0 - x81; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :23:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1118 = x1116 * x1117; - // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :23:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1119 = x1112 + x1118 * poly_mix[30]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :51:29) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1120 = arg0[204]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :24:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1121 = x1119 + x1120 * poly_mix[31]; - // loc(unknown) - auto x1122 = rv32im_v2_9(cycle, steps, poly_mix, x1121, arg0, arg4, arg8, x1018, arg7, arg9, arg10, arg11, arg12, arg13, arg14, arg15, arg16, arg17); - return x1122; -} -FpExt rv32im_v2_6(size_t cycle, size_t steps, FpExt* poly_mix, Fp* arg0, FpExt arg1, FpExt arg2, FpExt* arg3, FpExt arg4, FpExt arg5, FpExt arg6, FpExt arg7, FpExt arg8, Fp* arg9, Fp* arg10, Fp* arg11, Fp* arg12) { - size_t mask = steps - 1; - // loc(unknown) - constexpr Fp x0(23); - // loc(unknown) - constexpr Fp x1(65536); - // loc(unknown) - constexpr Fp x2(24); - // loc(unknown) - constexpr FpExt x3(0,0,0,0); - // loc(unknown) - constexpr FpExt x4(1,0,0,0); - // loc(unknown) - constexpr FpExt x5(0,1,0,0); - // loc(unknown) - constexpr Fp x6(0); - // loc(unknown) - constexpr Fp x7(1); - // loc(unknown) - constexpr Fp x8(2); - // loc(unknown) - constexpr Fp x9(8); - // loc(unknown) - constexpr Fp x10(7); - // loc(unknown) - constexpr Fp x11(6); - // loc(unknown) - constexpr Fp x12(5); - // loc(unknown) - constexpr Fp x13(4); - // loc(unknown) - constexpr Fp x14(3); - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :43:27) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x15 = arg9[35 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x16 = arg9[54 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x17 = arg9[55 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x18 = arg9[56 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x19 = arg9[57 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x20 = arg9[58 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x21 = arg9[59 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x22 = arg9[60 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x23 = arg9[61 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :11:20) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :90:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x24 = arg9[183 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :8:23) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :90:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x25 = arg9[182 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :94:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x26 = arg9[184 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :39:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x27 = arg9[32 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :20:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x28 = arg9[67 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x29 = arg9[130 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x30 = arg9[72 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :131:19) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x31 = arg9[69 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x32 = arg9[73 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :131:19) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x33 = arg9[70 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :27:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :130:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x34 = arg9[0 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :77:26) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x35 = arg9[68 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x36 = arg9[75 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x37 = arg9[132 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x38 = arg9[80 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :131:19) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x39 = arg9[77 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x40 = arg9[81 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :131:19) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x41 = arg9[78 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :27:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :130:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x42 = arg9[76 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :11:20) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x43 = arg9[83 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x44 = arg9[134 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x45 = arg9[88 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :33:25) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x46 = arg9[85 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x47 = arg9[89 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :128:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x48 = arg9[86 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :33:25) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x49 = arg9[84 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :25:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x50 = arg9[91 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x51 = arg9[136 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :129:32) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x52 = arg9[96 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :131:19) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x53 = arg9[93 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :8:23) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :60:29) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :129:32) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x54 = arg9[97 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :129:32) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x55 = arg9[94 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :27:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :130:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x56 = arg9[92 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x57 = arg9[99 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x58 = arg9[138 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :8:23) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :141:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x59 = arg9[104 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :89:17) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x60 = arg9[101 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x61 = arg9[105 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OpLB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :87:27) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :51:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x62 = arg9[102 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :27:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :130:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x63 = arg9[100 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :26:28) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x64 = arg9[107 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x65 = arg9[140 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x66 = arg9[112 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :131:19) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x67 = arg9[109 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x68 = arg9[113 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :131:19) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x69 = arg9[110 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :27:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :130:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x70 = arg9[108 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( CycleArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :54:29) at callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :60:19) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x71 = arg9[115 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x72 = arg9[142 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x73 = arg9[120 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :131:19) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x74 = arg9[117 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x75 = arg9[121 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x76 = arg9[118 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :27:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :130:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x77 = arg9[116 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x78 = arg9[123 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x79 = arg9[144 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x80 = arg9[128 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x81 = arg9[125 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x82 = arg9[129 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x83 = arg9[126 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x84 = arg9[124 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ExtReg ( :10:24) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :160:14) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x85 = arg12[36]; - // loc(callsite(unknown at callsite( ExtReg ( :10:24) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :160:14) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x86 = arg12[35]; - // loc(callsite(unknown at callsite( ExtReg ( :10:24) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :160:14) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x87 = arg12[34]; - // loc(callsite(unknown at callsite( ExtReg ( :10:24) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :160:14) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x88 = arg12[33]; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x89 = arg9[33 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x90 = arg9[35 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x91 = arg9[38 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :45:28) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x92 = arg9[39 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :28:29) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x93 = arg9[40 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x94 = arg9[41 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :51:29) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x95 = arg9[42 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :28:29) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x96 = arg9[43 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x97 = arg9[44 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :45:28) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x98 = arg9[45 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :28:29) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x99 = arg9[46 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x100 = arg9[47 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :51:29) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x101 = arg9[48 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :8:23) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x102 = arg9[49 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :11:20) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x103 = arg9[50 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :42:21) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x104 = arg9[51 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :26:28) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x105 = arg9[52 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :25:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x106 = arg9[53 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :27:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x107 = arg9[54 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU8 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :8:29) at callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :15:16) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :53:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x108 = arg9[55 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU8 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :9:27) at callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :15:16) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :53:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x109 = arg9[56 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :25:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x110 = arg9[57 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x111 = arg9[58 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x112 = arg9[59 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( CycleArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :54:29) at callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :60:19) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x113 = arg9[60 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( CycleArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :55:29) at callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :60:19) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x114 = arg9[61 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :95:28) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x115 = arg9[185 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x116 = arg9[46 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x117 = arg9[47 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x118 = arg9[48 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x119 = arg9[49 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x120 = arg9[50 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x121 = arg9[51 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x122 = arg9[52 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x123 = arg9[53 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :8:23) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :99:23) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x124 = arg9[186 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x125 = arg9[38 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x126 = arg9[39 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x127 = arg9[40 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x128 = arg9[41 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x129 = arg9[42 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x130 = arg9[43 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x131 = arg9[44 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x132 = arg9[45 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :11:20) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :99:23) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x133 = arg9[187 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x134 = arg9[146 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x135 = arg9[148 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x136 = arg9[150 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x137 = arg9[152 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x138 = arg9[154 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x139 = arg9[156 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x140 = arg9[158 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x141 = arg9[160 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x142 = arg9[162 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x143 = arg9[164 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x144 = arg9[166 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x145 = arg9[168 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x146 = arg9[170 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x147 = arg9[172 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x148 = arg9[174 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x149 = arg9[176 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x150 = arg9[178 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x151 = arg9[180 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x152 = arg9[21 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x153 = arg9[29 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x154 = arg9[30 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x155 = arg9[31 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :28:29) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x156 = arg9[37 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :19:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x157 = arg9[66 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :24:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x158 = arg9[71 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :27:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x159 = arg9[74 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :63:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x160 = arg9[79 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :8:23) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x161 = arg9[82 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :25:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x162 = arg9[87 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x163 = arg9[90 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( CycleArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :55:29) at callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :60:19) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x164 = arg9[95 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :27:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x165 = arg9[98 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x166 = arg9[103 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :34:15) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x167 = arg9[106 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x168 = arg9[111 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x169 = arg9[114 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x170 = arg9[119 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x171 = arg9[122 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x172 = arg9[127 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x173 = arg9[22 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x174 = arg9[23 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :38:26) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x175 = arg9[31 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :36:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x176 = arg9[29 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :34:26) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x177 = arg9[27 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:28) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x178 = x15 + x14; - // loc(callsite(unknown at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:28) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x179 = x15 + x13; - // loc(callsite(unknown at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:28) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x180 = x15 + x12; - // loc(callsite(unknown at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:28) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x181 = x15 + x11; - // loc(callsite(unknown at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:28) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x182 = x15 + x10; - // loc(callsite(unknown at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:65) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x183 = x15 + x9; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :42:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x184 = x16 + x17; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :43:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x185 = x18 + x19; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :44:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x186 = x17 * x8; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :44:19) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x187 = x186 + x185; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :45:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x188 = x19 * x8; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :45:19) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x189 = x188 + x184; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :46:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x190 = x185 * x13; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :46:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x191 = x190 + x189; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :47:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x192 = x184 * x13; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :47:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x193 = x192 + x187; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :48:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x194 = x189 + x193; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :49:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x195 = x187 + x191; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :42:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x196 = x20 + x21; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :43:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x197 = x22 + x23; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :44:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x198 = x21 * x8; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :44:19) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x199 = x198 + x197; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :45:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x200 = x23 * x8; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :45:19) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x201 = x200 + x196; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :46:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x202 = x197 * x13; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :46:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x203 = x202 + x201; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :47:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x204 = x196 * x13; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :47:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x205 = x204 + x199; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :48:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x206 = x201 + x205; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :49:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x207 = x199 + x203; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :90:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x208 = arg0[340]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :176:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x209 = arg1 + x208 * poly_mix[0]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :176:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x210 = x7 - x24; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :176:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x211 = x24 * x210; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :176:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x212 = x209 + x211 * poly_mix[1]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :94:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x213 = arg0[341]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :176:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x214 = x212 + x213 * poly_mix[2]; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:4) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :176:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x215 = x25 + x24; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:4) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :176:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x216 = x215 + x26; - // loc(callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:32) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :176:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x217 = x216 - x7; - // loc(callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:32) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :176:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x218 = x214 + x217 * poly_mix[3]; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:32) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :176:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x219 = x26 * x8; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:4) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :176:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x220 = x24 + x219; - // loc(callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:56) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :176:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x221 = x220 - x27; - // loc(callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:56) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :176:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x222 = x218 + x221 * poly_mix[4]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x223 = x28 - x15; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x224 = arg2 + x223 * poly_mix[4]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :84:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x225 = arg0[342]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x226 = x224 + x225 * poly_mix[5]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :11:25) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x227 = arg0[285]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x228 = x226 + x227 * poly_mix[6]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :84:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x229 = arg0[343]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x230 = x228 + x229 * poly_mix[7]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :84:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x231 = arg0[344]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x232 = x230 + x231 * poly_mix[8]; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x233 = x222 + x25 * x232 * poly_mix[5]; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x234 = x228 + x29 * poly_mix[7]; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x235 = x233 + x24 * x234 * poly_mix[14]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :121:13) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :131:19) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x236 = x224 + x229 * poly_mix[5]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :121:13) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :131:19) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x237 = x236 + x231 * poly_mix[6]; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x238 = x235 + x26 * x237 * poly_mix[22]; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x239 = x30 * x25; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x240 = x30 * x24; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x241 = x31 * x26; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x242 = x239 + x240; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x243 = x242 + x241; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x244 = x32 * x25; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x245 = x32 * x24; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x246 = x33 * x26; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x247 = x244 + x245; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x248 = x247 + x246; - // loc(callsite(unknown at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :122:33) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :131:19) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x249 = x30 - x31; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x250 = x249 * x26; - // loc(callsite(unknown at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :114:36) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :130:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x251 = x34 - x35; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x252 = x251 * x24; - // loc(callsite(unknown at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :123:16) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :131:19) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x253 = x32 - x33; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x254 = x253 * x26; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x255 = x25 + x252; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x256 = x255 + x254; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :85:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x257 = arg0[345]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x258 = arg1 + x257 * poly_mix[0]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :85:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x259 = arg0[346]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x260 = x258 + x259 * poly_mix[1]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x261 = x260 + x6 * poly_mix[2]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x262 = x261 + x6 * poly_mix[3]; - // loc(callsite(unknown at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:28) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x263 = arg0[347]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x264 = x36 - x263; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x265 = x262 + x264 * poly_mix[4]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :85:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x266 = arg0[348]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x267 = x265 + x266 * poly_mix[5]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x268 = arg0[287]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x269 = x267 + x268 * poly_mix[6]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :85:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x270 = arg0[349]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x271 = x269 + x270 * poly_mix[7]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :85:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x272 = arg0[350]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x273 = x271 + x272 * poly_mix[8]; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x274 = x238 + x25 * x273 * poly_mix[29]; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x275 = x269 + x37 * poly_mix[7]; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x276 = x274 + x24 * x275 * poly_mix[38]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :121:13) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :131:19) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x277 = x265 + x270 * poly_mix[5]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :121:13) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :131:19) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x278 = x277 + x272 * poly_mix[6]; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x279 = x276 + x26 * x278 * poly_mix[46]; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x280 = x38 * x25; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x281 = x38 * x24; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x282 = x39 * x26; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x283 = x280 + x281; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x284 = x283 + x282; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x285 = x40 * x25; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x286 = x40 * x24; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x287 = x41 * x26; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x288 = x285 + x286; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x289 = x288 + x287; - // loc(callsite(unknown at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :122:33) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :131:19) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x290 = x38 - x39; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x291 = x290 * x26; - // loc(callsite(unknown at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :114:36) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :130:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x292 = x34 - x42; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x293 = x292 * x24; - // loc(callsite(unknown at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :123:16) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :131:19) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x294 = x40 - x41; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x295 = x294 * x26; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x296 = x25 + x293; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x297 = x296 + x295; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :86:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x298 = arg0[351]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x299 = arg1 + x298 * poly_mix[0]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :69:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x300 = arg0[332]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x301 = x299 + x300 * poly_mix[1]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x302 = x301 + x6 * poly_mix[2]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x303 = x302 + x6 * poly_mix[3]; - // loc(callsite(unknown at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:28) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x304 = arg0[352]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x305 = x43 - x304; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x306 = x303 + x305 * poly_mix[4]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :86:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x307 = arg0[353]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x308 = x306 + x307 * poly_mix[5]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x309 = arg0[289]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x310 = x308 + x309 * poly_mix[6]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :86:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x311 = arg0[354]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x312 = x310 + x311 * poly_mix[7]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :86:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x313 = arg0[355]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x314 = x312 + x313 * poly_mix[8]; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x315 = x279 + x25 * x314 * poly_mix[53]; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x316 = x310 + x44 * poly_mix[7]; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x317 = x315 + x24 * x316 * poly_mix[62]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :121:13) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :131:19) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x318 = x306 + x311 * poly_mix[5]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :121:13) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :131:19) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x319 = x318 + x313 * poly_mix[6]; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x320 = x317 + x26 * x319 * poly_mix[70]; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x321 = x45 * x25; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x322 = x45 * x24; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x323 = x46 * x26; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x324 = x321 + x322; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x325 = x324 + x323; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x326 = x47 * x25; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x327 = x47 * x24; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x328 = x48 * x26; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x329 = x326 + x327; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x330 = x329 + x328; - // loc(callsite(unknown at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :122:33) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :131:19) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x331 = x45 - x46; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x332 = x331 * x26; - // loc(callsite(unknown at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :114:36) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :130:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x333 = x34 - x49; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x334 = x333 * x24; - // loc(callsite(unknown at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :123:16) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :131:19) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x335 = x47 - x48; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x336 = x335 * x26; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x337 = x25 + x334; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x338 = x337 + x336; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x339 = arg0[333]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x340 = arg1 + x339 * poly_mix[0]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x341 = arg0[265]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x342 = x340 + x341 * poly_mix[1]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x343 = x342 + x6 * poly_mix[2]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x344 = x343 + x6 * poly_mix[3]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x345 = x50 - x178; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x346 = x344 + x345 * poly_mix[4]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x347 = arg0[334]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x348 = x346 + x347 * poly_mix[5]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :87:30) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x349 = arg0[356]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x350 = x348 + x349 * poly_mix[6]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :87:30) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x351 = arg0[357]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x352 = x350 + x351 * poly_mix[7]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :87:30) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x353 = arg0[358]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x354 = x352 + x353 * poly_mix[8]; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x355 = x320 + x25 * x354 * poly_mix[77]; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x356 = x350 + x51 * poly_mix[7]; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x357 = x355 + x24 * x356 * poly_mix[86]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :121:13) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :131:19) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x358 = x346 + x351 * poly_mix[5]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :121:13) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :131:19) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x359 = x358 + x353 * poly_mix[6]; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x360 = x357 + x26 * x359 * poly_mix[94]; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x361 = x52 * x25; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x362 = x52 * x24; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x363 = x53 * x26; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x364 = x361 + x362; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x365 = x364 + x363; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x366 = x54 * x25; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x367 = x54 * x24; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x368 = x55 * x26; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x369 = x366 + x367; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x370 = x369 + x368; - // loc(callsite(unknown at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :122:33) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :131:19) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x371 = x52 - x53; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x372 = x371 * x26; - // loc(callsite(unknown at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :114:36) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :130:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x373 = x34 - x56; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x374 = x373 * x24; - // loc(callsite(unknown at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :123:16) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :131:19) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x375 = x54 - x55; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x376 = x375 * x26; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x377 = x25 + x374; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x378 = x377 + x376; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x379 = arg0[359]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x380 = arg1 + x379 * poly_mix[0]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x381 = arg0[230]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x382 = x380 + x381 * poly_mix[1]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x383 = x382 + x6 * poly_mix[2]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x384 = x383 + x6 * poly_mix[3]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x385 = x57 - x179; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x386 = x384 + x385 * poly_mix[4]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x387 = arg0[360]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x388 = x386 + x387 * poly_mix[5]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :11:25) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x389 = arg0[335]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x390 = x388 + x389 * poly_mix[6]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x391 = arg0[361]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x392 = x390 + x391 * poly_mix[7]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x393 = arg0[362]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x394 = x392 + x393 * poly_mix[8]; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x395 = x360 + x25 * x394 * poly_mix[101]; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x396 = x390 + x58 * poly_mix[7]; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x397 = x395 + x24 * x396 * poly_mix[110]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :121:13) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :131:19) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x398 = x386 + x391 * poly_mix[5]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :121:13) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :131:19) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x399 = x398 + x393 * poly_mix[6]; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x400 = x397 + x26 * x399 * poly_mix[118]; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x401 = x59 * x25; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x402 = x59 * x24; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x403 = x60 * x26; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x404 = x401 + x402; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x405 = x404 + x403; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x406 = x61 * x25; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x407 = x61 * x24; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x408 = x62 * x26; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x409 = x406 + x407; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x410 = x409 + x408; - // loc(callsite(unknown at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :122:33) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :131:19) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x411 = x59 - x60; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x412 = x411 * x26; - // loc(callsite(unknown at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :114:36) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :130:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x413 = x34 - x63; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x414 = x413 * x24; - // loc(callsite(unknown at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :123:16) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :131:19) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x415 = x61 - x62; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x416 = x415 * x26; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x417 = x25 + x414; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x418 = x417 + x416; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :11:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x419 = arg0[231]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x420 = arg1 + x419 * poly_mix[0]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :60:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x421 = arg0[260]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x422 = x420 + x421 * poly_mix[1]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x423 = x422 + x6 * poly_mix[2]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x424 = x423 + x6 * poly_mix[3]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x425 = x64 - x180; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x426 = x424 + x425 * poly_mix[4]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :11:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x427 = arg0[234]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x428 = x426 + x427 * poly_mix[5]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x429 = arg0[336]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x430 = x428 + x429 * poly_mix[6]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x431 = arg0[363]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x432 = x430 + x431 * poly_mix[7]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x433 = arg0[364]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x434 = x432 + x433 * poly_mix[8]; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x435 = x400 + x25 * x434 * poly_mix[125]; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x436 = x430 + x65 * poly_mix[7]; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x437 = x435 + x24 * x436 * poly_mix[134]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :121:13) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :131:19) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x438 = x426 + x431 * poly_mix[5]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :121:13) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :131:19) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x439 = x438 + x433 * poly_mix[6]; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x440 = x437 + x26 * x439 * poly_mix[142]; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x441 = x66 * x25; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x442 = x66 * x24; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x443 = x67 * x26; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x444 = x441 + x442; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x445 = x444 + x443; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x446 = x68 * x25; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x447 = x68 * x24; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x448 = x69 * x26; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x449 = x446 + x447; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x450 = x449 + x448; - // loc(callsite(unknown at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :122:33) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :131:19) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x451 = x66 - x67; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x452 = x451 * x26; - // loc(callsite(unknown at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :114:36) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :130:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x453 = x34 - x70; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x454 = x453 * x24; - // loc(callsite(unknown at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :123:16) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :131:19) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x455 = x68 - x69; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x456 = x455 * x26; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x457 = x25 + x454; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x458 = x457 + x456; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x459 = arg0[365]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x460 = arg1 + x459 * poly_mix[0]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :61:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x461 = arg0[338]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x462 = x460 + x461 * poly_mix[1]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x463 = x462 + x6 * poly_mix[2]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x464 = x463 + x6 * poly_mix[3]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x465 = x71 - x181; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x466 = x464 + x465 * poly_mix[4]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x467 = arg0[366]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x468 = x466 + x467 * poly_mix[5]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x469 = arg0[367]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x470 = x468 + x469 * poly_mix[6]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x471 = arg0[368]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x472 = x470 + x471 * poly_mix[7]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x473 = arg0[369]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x474 = x472 + x473 * poly_mix[8]; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x475 = x440 + x25 * x474 * poly_mix[149]; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x476 = x470 + x72 * poly_mix[7]; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x477 = x475 + x24 * x476 * poly_mix[158]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :121:13) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :131:19) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x478 = x466 + x471 * poly_mix[5]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :121:13) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :131:19) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x479 = x478 + x473 * poly_mix[6]; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x480 = x477 + x26 * x479 * poly_mix[166]; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x481 = x73 * x25; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x482 = x73 * x24; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x483 = x74 * x26; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x484 = x481 + x482; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x485 = x484 + x483; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x486 = x75 * x25; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x487 = x75 * x24; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x488 = x76 * x26; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x489 = x486 + x487; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x490 = x489 + x488; - // loc(callsite(unknown at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :122:33) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :131:19) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x491 = x73 - x74; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x492 = x491 * x26; - // loc(callsite(unknown at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :114:36) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :130:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x493 = x34 - x77; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x494 = x493 * x24; - // loc(callsite(unknown at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :123:16) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :131:19) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x495 = x75 - x76; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x496 = x495 * x26; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x497 = x25 + x494; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x498 = x497 + x496; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x499 = arg0[370]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x500 = arg1 + x499 * poly_mix[0]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x501 = arg0[371]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x502 = x500 + x501 * poly_mix[1]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x503 = x502 + x6 * poly_mix[2]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x504 = x503 + x6 * poly_mix[3]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x505 = x78 - x182; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x506 = x504 + x505 * poly_mix[4]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x507 = arg0[372]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x508 = x506 + x507 * poly_mix[5]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x509 = arg0[373]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x510 = x508 + x509 * poly_mix[6]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x511 = arg0[374]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x512 = x510 + x511 * poly_mix[7]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x513 = arg0[375]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x514 = x512 + x513 * poly_mix[8]; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x515 = x480 + x25 * x514 * poly_mix[168]; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x516 = x510 + x79 * poly_mix[7]; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x517 = x515 + x24 * x516 * poly_mix[169]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :121:13) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :131:19) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x518 = x506 + x511 * poly_mix[5]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :121:13) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :131:19) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x519 = x518 + x513 * poly_mix[6]; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x520 = x517 + x26 * x519 * poly_mix[173]; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x521 = x80 * x25; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x522 = x80 * x24; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x523 = x81 * x26; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x524 = x521 + x522; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x525 = x524 + x523; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x526 = x82 * x25; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x527 = x82 * x24; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x528 = x83 * x26; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x529 = x526 + x527; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x530 = x529 + x528; - // loc(callsite(unknown at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :122:33) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :131:19) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x531 = x80 - x81; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x532 = x531 * x26; - // loc(callsite(unknown at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :114:36) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :130:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x533 = x34 - x84; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x534 = x533 * x24; - // loc(callsite(unknown at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :123:16) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :131:19) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x535 = x82 - x83; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x536 = x535 * x26; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x537 = x25 + x534; - // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x538 = x537 + x536; - // loc(callsite(unknown at callsite( ExtReg ( :10:24) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :160:14) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x539 = x85 * x5; - // loc(callsite(unknown at callsite( ExtReg ( :10:24) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :160:14) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x540 = x86 + x539; - // loc(callsite(unknown at callsite( ExtReg ( :10:24) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :160:14) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x541 = x540 * x5; - // loc(callsite(unknown at callsite( ExtReg ( :10:24) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :160:14) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x542 = x87 + x541; - // loc(callsite(unknown at callsite( ExtReg ( :10:24) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :160:14) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x543 = x542 * x5; - // loc(callsite(unknown at callsite( ExtReg ( :10:24) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :160:14) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x544 = x88 + x543; - // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:30) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x545 = x544 * x4; - // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:81) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x546 = x250 + x3; - // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:73) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x547 = x546 * x4; - // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:55) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x548 = x547 + x3; - // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:30) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x549 = x545 * x544; - // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:81) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x550 = x256 + x3; - // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:73) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x551 = x550 * x545; - // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:55) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x552 = x548 + x551; - // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:30) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x553 = x549 * x544; - // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:81) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x554 = x291 + x3; - // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:73) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x555 = x554 * x549; - // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:55) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x556 = x552 + x555; - // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:30) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x557 = x553 * x544; - // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:81) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x558 = x297 + x3; - // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:73) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x559 = x558 * x553; - // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:55) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x560 = x556 + x559; - // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:30) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x561 = x557 * x544; - // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:81) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x562 = x332 + x3; - // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:73) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x563 = x562 * x557; - // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:55) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x564 = x560 + x563; - // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:30) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x565 = x561 * x544; - // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:81) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x566 = x338 + x3; - // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:73) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x567 = x566 * x561; - // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:55) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x568 = x564 + x567; - // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:30) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x569 = x565 * x544; - // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:81) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x570 = x372 + x3; - // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:73) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x571 = x570 * x565; - // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:55) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x572 = x568 + x571; - // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:30) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x573 = x569 * x544; - // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:81) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x574 = x378 + x3; - // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:73) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x575 = x574 * x569; - // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:55) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x576 = x572 + x575; - // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:30) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x577 = x573 * x544; - // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:81) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x578 = x412 + x3; - // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:73) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x579 = x578 * x573; - // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:55) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x580 = x576 + x579; - // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:30) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x581 = x577 * x544; - // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:81) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x582 = x418 + x3; - // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:73) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x583 = x582 * x577; - // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:55) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x584 = x580 + x583; - // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:30) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x585 = x581 * x544; - // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:81) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x586 = x452 + x3; - // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:73) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x587 = x586 * x581; - // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:55) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x588 = x584 + x587; - // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:30) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x589 = x585 * x544; - // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:81) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x590 = x458 + x3; - // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:73) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x591 = x590 * x585; - // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:55) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x592 = x588 + x591; - // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:30) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x593 = x589 * x544; - // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:81) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x594 = x492 + x3; - // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:73) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x595 = x594 * x589; - // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:55) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x596 = x592 + x595; - // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:30) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x597 = x593 * x544; - // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:81) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x598 = x498 + x3; - // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:73) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x599 = x598 * x593; - // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:55) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x600 = x596 + x599; - // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:30) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x601 = x597 * x544; - // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:81) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x602 = x532 + x3; - // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:73) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x603 = x602 * x597; - // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:55) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x604 = x600 + x603; - // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:81) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x605 = x538 + x3; - // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:73) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x606 = x605 * x601; - // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:55) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x607 = x604 + x606; - // loc(callsite(unknown at callsite( Pow ( zirgen/circuit/rv32im/v2/dsl/poly.zir :10:4) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :171:29) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x608 = x601 * x544; - // loc(callsite(unknown at callsite( ExtReg ( :10:24) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :48:27) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x609 = arg3[0]; - // loc(callsite(unknown at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :171:17) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x610 = x609 * x608; - // loc(callsite(unknown at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :171:10) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x611 = x610 + x607; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :42:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x612 = x243 + x248; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :43:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x613 = x284 + x289; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :44:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x614 = x248 * x8; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :44:19) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x615 = x614 + x613; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :45:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x616 = x289 * x8; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :45:19) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x617 = x616 + x612; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :46:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x618 = x613 * x13; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :46:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x619 = x618 + x617; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :47:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x620 = x612 * x13; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :47:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x621 = x620 + x615; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :48:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x622 = x617 + x621; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :49:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x623 = x615 + x619; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :42:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x624 = x325 + x330; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :43:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x625 = x365 + x370; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :44:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x626 = x330 * x8; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :44:19) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x627 = x626 + x625; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :45:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x628 = x370 * x8; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :45:19) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x629 = x628 + x624; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :46:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x630 = x625 * x13; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :46:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x631 = x630 + x629; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :47:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x632 = x624 * x13; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :47:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x633 = x632 + x627; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :48:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x634 = x629 + x633; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :49:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x635 = x627 + x631; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :42:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x636 = x405 + x410; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :43:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x637 = x445 + x450; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :44:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x638 = x410 * x8; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :44:19) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x639 = x638 + x637; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :45:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x640 = x450 * x8; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :45:19) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x641 = x640 + x636; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :46:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x642 = x637 * x13; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :46:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x643 = x642 + x641; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :47:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x644 = x636 * x13; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :47:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x645 = x644 + x639; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :48:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x646 = x641 + x645; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :49:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x647 = x639 + x643; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :42:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x648 = x485 + x490; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :43:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x649 = x525 + x530; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :44:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x650 = x490 * x8; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :44:19) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x651 = x650 + x649; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :45:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x652 = x530 * x8; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :45:19) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x653 = x652 + x648; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :46:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x654 = x649 * x13; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :46:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x655 = x654 + x653; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :47:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x656 = x648 * x13; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :47:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x657 = x656 + x651; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :48:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x658 = x653 + x657; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :49:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x659 = x651 + x655; - // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x660 = x622 + x634; - // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x661 = x621 + x633; - // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x662 = x623 + x635; - // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x663 = x619 + x631; - // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x664 = x660 + x646; - // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x665 = x661 + x645; - // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x666 = x662 + x647; - // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x667 = x663 + x643; - // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x668 = x664 + x658; - // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x669 = x665 + x657; - // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x670 = x666 + x659; - // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x671 = x667 + x655; - // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x672 = x668 + x194; - // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x673 = x669 + x193; - // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x674 = x670 + x195; - // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x675 = x671 + x191; - // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x676 = x672 + x206; - // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x677 = x673 + x205; - // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x678 = x674 + x207; - // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x679 = x675 + x203; - // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x680 = x622 + x676; - // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x681 = x621 + x677; - // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x682 = x623 + x678; - // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x683 = x619 + x679; - // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x684 = x634 + x676; - // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x685 = x633 + x677; - // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x686 = x635 + x678; - // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x687 = x631 + x679; - // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x688 = x646 + x676; - // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x689 = x645 + x677; - // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x690 = x647 + x678; - // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x691 = x643 + x679; - // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x692 = x658 + x676; - // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x693 = x657 + x677; - // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x694 = x659 + x678; - // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x695 = x655 + x679; - // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x696 = x194 + x676; - // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x697 = x193 + x677; - // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x698 = x195 + x678; - // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x699 = x191 + x679; - // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x700 = x206 + x676; - // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x701 = x205 + x677; - // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x702 = x207 + x678; - // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x703 = x203 + x679; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :34:26) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x704 = arg0[376]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :34:26) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x705 = x520 + x704 * poly_mix[174]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :35:27) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x706 = arg0[377]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :35:27) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x707 = x705 + x706 * poly_mix[175]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :36:28) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x708 = arg0[378]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :36:28) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x709 = x707 + x708 * poly_mix[176]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :37:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x710 = arg0[379]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :37:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x711 = x709 + x710 * poly_mix[177]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :38:26) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x712 = arg0[380]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :38:26) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x713 = x711 + x712 * poly_mix[178]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :39:28) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x714 = arg0[381]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :39:28) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x715 = x713 + x714 * poly_mix[179]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :41:27) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x716 = x2 - x89; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :41:27) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg0[606] = x716; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :41:27) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x717 = x715 + x716 * poly_mix[180]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :42:26) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x718 = arg0[382]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :42:26) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x719 = x717 + x718 * poly_mix[181]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :43:27) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x720 = x183 - x90; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :43:27) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x721 = x719 + x720 * poly_mix[182]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :44:23) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x722 = arg0[383]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :44:23) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x723 = x721 + x722 * poly_mix[183]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :45:22) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x724 = arg0[384]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :45:22) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x725 = x723 + x724 * poly_mix[184]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x726 = x680 - x91; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x727 = x725 + x726 * poly_mix[185]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x728 = x681 - x92; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x729 = x727 + x728 * poly_mix[186]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x730 = x682 - x93; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x731 = x729 + x730 * poly_mix[187]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x732 = x683 - x94; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x733 = x731 + x732 * poly_mix[188]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x734 = x684 - x95; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x735 = x733 + x734 * poly_mix[189]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x736 = x685 - x96; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x737 = x735 + x736 * poly_mix[190]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x738 = x686 - x97; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x739 = x737 + x738 * poly_mix[191]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x740 = x687 - x98; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x741 = x739 + x740 * poly_mix[192]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x742 = x688 - x99; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x743 = x741 + x742 * poly_mix[193]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x744 = x689 - x100; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x745 = x743 + x744 * poly_mix[194]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x746 = x690 - x101; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x747 = x745 + x746 * poly_mix[195]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x748 = x691 - x102; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x749 = x747 + x748 * poly_mix[196]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x750 = x692 - x103; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x751 = x749 + x750 * poly_mix[197]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x752 = x693 - x104; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x753 = x751 + x752 * poly_mix[198]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x754 = x694 - x105; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x755 = x753 + x754 * poly_mix[199]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x756 = x695 - x106; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x757 = x755 + x756 * poly_mix[200]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x758 = x696 - x107; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x759 = x757 + x758 * poly_mix[201]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x760 = x697 - x108; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x761 = x759 + x760 * poly_mix[202]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x762 = x698 - x109; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x763 = x761 + x762 * poly_mix[203]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x764 = x699 - x110; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x765 = x763 + x764 * poly_mix[204]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x766 = x700 - x111; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x767 = x765 + x766 * poly_mix[205]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x768 = x701 - x112; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x769 = x767 + x768 * poly_mix[206]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x770 = x702 - x113; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x771 = x769 + x770 * poly_mix[207]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x772 = x703 - x114; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x773 = x771 + x772 * poly_mix[208]; - // loc(callsite(unknown at callsite( ExtReg ( :10:24) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :48:27) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x774 = arg3[1]; - // loc(callsite(unknown at callsite( ExtReg ( :11:18) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :48:27) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x775 = x774 - x611; - // loc(callsite(unknown at callsite( ExtReg ( :11:11) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :48:27) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x776 = x773 + x775 * poly_mix[209]; - // loc(callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :233:22) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x777 = arg4 + x115 * x776 * poly_mix[5]; - // loc(callsite(unknown at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :206:8) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x778 = x248 * x1; - // loc(callsite(unknown at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :206:30) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x779 = x778 + x243; - // loc(callsite(unknown at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :206:8) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x780 = x289 * x1; - // loc(callsite(unknown at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :206:30) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x781 = x780 + x284; - // loc(callsite(unknown at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :206:8) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x782 = x330 * x1; - // loc(callsite(unknown at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :206:30) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x783 = x782 + x325; - // loc(callsite(unknown at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :206:8) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x784 = x370 * x1; - // loc(callsite(unknown at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :206:30) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x785 = x784 + x365; - // loc(callsite(unknown at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :206:8) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x786 = x410 * x1; - // loc(callsite(unknown at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :206:30) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x787 = x786 + x405; - // loc(callsite(unknown at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :206:8) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x788 = x450 * x1; - // loc(callsite(unknown at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :206:30) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x789 = x788 + x445; - // loc(callsite(unknown at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :206:8) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x790 = x490 * x1; - // loc(callsite(unknown at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :206:30) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x791 = x790 + x485; - // loc(callsite(unknown at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :206:8) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x792 = x530 * x1; - // loc(callsite(unknown at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :206:30) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x793 = x792 + x525; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :41:27) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x794 = arg0[385]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :41:27) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x795 = x715 + x794 * poly_mix[180]; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:11) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :16:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x796 = arg0[386]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :42:26) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x797 = x795 + x796 * poly_mix[181]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :43:27) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x798 = x797 + x720 * poly_mix[182]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :44:23) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x799 = x798 + x722 * poly_mix[183]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :45:22) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x800 = x799 + x724 * poly_mix[184]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x801 = x779 - x91; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x802 = x800 + x801 * poly_mix[185]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x803 = x781 - x92; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x804 = x802 + x803 * poly_mix[186]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x805 = x783 - x93; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x806 = x804 + x805 * poly_mix[187]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x807 = x785 - x94; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x808 = x806 + x807 * poly_mix[188]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x809 = x787 - x95; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x810 = x808 + x809 * poly_mix[189]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x811 = x789 - x96; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x812 = x810 + x811 * poly_mix[190]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x813 = x791 - x97; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x814 = x812 + x813 * poly_mix[191]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x815 = x793 - x98; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x816 = x814 + x815 * poly_mix[192]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x817 = x116 - x99; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg0[430] = x817; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x818 = x816 + x817 * poly_mix[193]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x819 = x117 - x100; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg0[431] = x819; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x820 = x818 + x819 * poly_mix[194]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x821 = x118 - x101; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg0[432] = x821; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x822 = x820 + x821 * poly_mix[195]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x823 = x119 - x102; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg0[433] = x823; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x824 = x822 + x823 * poly_mix[196]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x825 = x120 - x103; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg0[434] = x825; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x826 = x824 + x825 * poly_mix[197]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x827 = x121 - x104; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg0[435] = x827; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x828 = x826 + x827 * poly_mix[198]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x829 = x122 - x105; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg0[436] = x829; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x830 = x828 + x829 * poly_mix[199]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x831 = x123 - x106; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg0[437] = x831; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x832 = x830 + x831 * poly_mix[200]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x833 = x16 - x107; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg0[438] = x833; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x834 = x832 + x833 * poly_mix[201]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x835 = x17 - x108; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg0[439] = x835; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x836 = x834 + x835 * poly_mix[202]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x837 = x18 - x109; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg0[440] = x837; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x838 = x836 + x837 * poly_mix[203]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x839 = x19 - x110; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg0[441] = x839; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x840 = x838 + x839 * poly_mix[204]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x841 = x20 - x111; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg0[442] = x841; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x842 = x840 + x841 * poly_mix[205]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x843 = x21 - x112; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg0[443] = x843; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x844 = x842 + x843 * poly_mix[206]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x845 = x22 - x113; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg0[444] = x845; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x846 = x844 + x845 * poly_mix[207]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x847 = x23 - x114; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg0[445] = x847; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x848 = x846 + x847 * poly_mix[208]; - // loc(callsite(unknown at callsite( ExtReg ( :11:11) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :48:27) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x849 = x848 + x775 * poly_mix[209]; - // loc(callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :233:22) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x850 = x777 + x124 * x849 * poly_mix[213]; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :42:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x851 = x125 + x126; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :43:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x852 = x127 + x128; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :44:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x853 = x126 * x8; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :44:19) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x854 = x853 + x852; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :45:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x855 = x128 * x8; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :45:19) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x856 = x855 + x851; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :46:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x857 = x852 * x13; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :46:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x858 = x857 + x856; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :47:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x859 = x851 * x13; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :47:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x860 = x859 + x854; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :48:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x861 = x856 + x860; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :49:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x862 = x854 + x858; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :42:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x863 = x129 + x130; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :43:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x864 = x131 + x132; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :44:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x865 = x130 * x8; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :44:19) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x866 = x865 + x864; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :45:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x867 = x132 * x8; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :45:19) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x868 = x867 + x863; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :46:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x869 = x864 * x13; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :46:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x870 = x869 + x868; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :47:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x871 = x863 * x13; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :47:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x872 = x871 + x866; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :48:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x873 = x868 + x872; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :49:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x874 = x866 + x870; - // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x875 = x861 + x873; - // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x876 = x860 + x872; - // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x877 = x862 + x874; - // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x878 = x858 + x870; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :42:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x879 = x779 + x781; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :43:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x880 = x783 + x785; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :44:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x881 = x781 * x8; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :44:19) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x882 = x881 + x880; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :45:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x883 = x785 * x8; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :45:19) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x884 = x883 + x879; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :46:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x885 = x880 * x13; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :46:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x886 = x885 + x884; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :47:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x887 = x879 * x13; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :47:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x888 = x887 + x882; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :48:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x889 = x884 + x888; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :49:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x890 = x882 + x886; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :42:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x891 = x787 + x789; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :43:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x892 = x791 + x793; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :44:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x893 = x789 * x8; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :44:19) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x894 = x893 + x892; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :45:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x895 = x793 * x8; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :45:19) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x896 = x895 + x891; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :46:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x897 = x892 * x13; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :46:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x898 = x897 + x896; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :47:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x899 = x891 * x13; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :47:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x900 = x899 + x894; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :48:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x901 = x896 + x900; - // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :49:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x902 = x894 + x898; - // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x903 = x875 + x889; - // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x904 = x876 + x888; - // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x905 = x877 + x890; - // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x906 = x878 + x886; - // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x907 = x903 + x901; - // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x908 = x904 + x900; - // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x909 = x905 + x902; - // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x910 = x906 + x898; - // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x911 = x907 + x194; - // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x912 = x908 + x193; - // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x913 = x909 + x195; - // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x914 = x910 + x191; - // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x915 = x911 + x206; - // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x916 = x912 + x205; - // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x917 = x913 + x207; - // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x918 = x914 + x203; - // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x919 = x861 + x915; - // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x920 = x860 + x916; - // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x921 = x862 + x917; - // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x922 = x858 + x918; - // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x923 = x873 + x915; - // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x924 = x872 + x916; - // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x925 = x874 + x917; - // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x926 = x870 + x918; - // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x927 = x889 + x915; - // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x928 = x888 + x916; - // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x929 = x890 + x917; - // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x930 = x886 + x918; - // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x931 = x901 + x915; - // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x932 = x900 + x916; - // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x933 = x902 + x917; - // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x934 = x898 + x918; - // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x935 = x194 + x915; - // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x936 = x193 + x916; - // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x937 = x195 + x917; - // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x938 = x191 + x918; - // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x939 = x206 + x915; - // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x940 = x205 + x916; - // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x941 = x207 + x917; - // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x942 = x203 + x918; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x943 = x919 - x91; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x944 = x725 + x943 * poly_mix[185]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x945 = x920 - x92; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x946 = x944 + x945 * poly_mix[186]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x947 = x921 - x93; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x948 = x946 + x947 * poly_mix[187]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x949 = x922 - x94; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x950 = x948 + x949 * poly_mix[188]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x951 = x923 - x95; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x952 = x950 + x951 * poly_mix[189]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x953 = x924 - x96; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x954 = x952 + x953 * poly_mix[190]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x955 = x925 - x97; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x956 = x954 + x955 * poly_mix[191]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x957 = x926 - x98; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x958 = x956 + x957 * poly_mix[192]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x959 = x927 - x99; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x960 = x958 + x959 * poly_mix[193]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x961 = x928 - x100; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x962 = x960 + x961 * poly_mix[194]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x963 = x929 - x101; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x964 = x962 + x963 * poly_mix[195]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x965 = x930 - x102; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x966 = x964 + x965 * poly_mix[196]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x967 = x931 - x103; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x968 = x966 + x967 * poly_mix[197]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x969 = x932 - x104; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x970 = x968 + x969 * poly_mix[198]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x971 = x933 - x105; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x972 = x970 + x971 * poly_mix[199]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x973 = x934 - x106; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x974 = x972 + x973 * poly_mix[200]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x975 = x935 - x107; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x976 = x974 + x975 * poly_mix[201]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x977 = x936 - x108; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x978 = x976 + x977 * poly_mix[202]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x979 = x937 - x109; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x980 = x978 + x979 * poly_mix[203]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x981 = x938 - x110; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x982 = x980 + x981 * poly_mix[204]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x983 = x939 - x111; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x984 = x982 + x983 * poly_mix[205]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x985 = x940 - x112; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x986 = x984 + x985 * poly_mix[206]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x987 = x941 - x113; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x988 = x986 + x987 * poly_mix[207]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x989 = x942 - x114; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x990 = x988 + x989 * poly_mix[208]; - // loc(callsite(unknown at callsite( ExtReg ( :11:11) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :48:27) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x991 = x990 + x775 * poly_mix[209]; - // loc(callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :233:22) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x992 = x850 + x133 * x991 * poly_mix[340]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x993 = x992 + x134 * poly_mix[362]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x994 = x993 + x135 * poly_mix[363]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x995 = x994 + x136 * poly_mix[364]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x996 = x995 + x137 * poly_mix[365]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x997 = x996 + x138 * poly_mix[366]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x998 = x997 + x139 * poly_mix[367]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x999 = x998 + x140 * poly_mix[368]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1000 = x999 + x141 * poly_mix[369]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1001 = x1000 + x142 * poly_mix[370]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1002 = x1001 + x143 * poly_mix[371]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1003 = x1002 + x144 * poly_mix[372]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1004 = x1003 + x145 * poly_mix[373]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1005 = x1004 + x146 * poly_mix[374]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1006 = x1005 + x147 * poly_mix[375]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1007 = x1006 + x148 * poly_mix[376]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1008 = x1007 + x149 * poly_mix[377]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1009 = x1008 + x150 * poly_mix[378]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1010 = x1009 + x151 * poly_mix[379]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1011 = arg5 + x152 * x1010 * poly_mix[252]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :34:26) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1012 = arg0[387]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :34:26) at callsite( PoseidonInvalid ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :61:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :452:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1013 = arg6 + x1012 * poly_mix[1]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :35:27) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1014 = arg0[388]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :35:27) at callsite( PoseidonInvalid ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :61:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :452:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1015 = x1013 + x1014 * poly_mix[2]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :36:28) at callsite( PoseidonInvalid ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :61:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :452:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1016 = x6 - x153; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :36:28) at callsite( PoseidonInvalid ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :61:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :452:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1017 = x1015 + x1016 * poly_mix[3]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :37:24) at callsite( PoseidonInvalid ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :61:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :452:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1018 = x6 - x154; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :37:24) at callsite( PoseidonInvalid ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :61:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :452:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - arg0[467] = x1018; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :37:24) at callsite( PoseidonInvalid ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :61:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :452:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1019 = x1017 + x1018 * poly_mix[4]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :38:26) at callsite( PoseidonInvalid ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :61:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :452:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1020 = x6 - x155; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :38:26) at callsite( PoseidonInvalid ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :61:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :452:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - arg0[469] = x1020; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :38:26) at callsite( PoseidonInvalid ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :61:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :452:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1021 = x1019 + x1020 * poly_mix[5]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :39:28) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :105:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1022 = arg0[389]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :39:28) at callsite( PoseidonInvalid ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :61:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :452:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1023 = x1021 + x1022 * poly_mix[6]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :41:27) at callsite( PoseidonInvalid ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :61:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :452:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1024 = x6 - x89; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :41:27) at callsite( PoseidonInvalid ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :61:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :452:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1025 = x1023 + x1024 * poly_mix[7]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :42:26) at callsite( PoseidonInvalid ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :61:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :452:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1026 = x1025 + x718 * poly_mix[8]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :43:27) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1027 = arg0[390]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :43:27) at callsite( PoseidonInvalid ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :61:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :452:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1028 = x1026 + x1027 * poly_mix[9]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :44:23) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1029 = arg0[391]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :44:23) at callsite( PoseidonInvalid ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :61:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :452:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1030 = x1028 + x1029 * poly_mix[10]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :45:22) at callsite( PoseidonInvalid ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :61:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :452:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1031 = x6 - x156; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :45:22) at callsite( PoseidonInvalid ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :61:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :452:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - arg0[466] = x1031; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :45:22) at callsite( PoseidonInvalid ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :61:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :452:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1032 = x1030 + x1031 * poly_mix[11]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1033 = arg0[392]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonInvalid ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :61:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :452:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1034 = x1032 + x1033 * poly_mix[12]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1035 = arg0[393]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonInvalid ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :61:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :452:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1036 = x1034 + x1035 * poly_mix[13]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1037 = arg0[394]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonInvalid ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :61:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :452:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1038 = x1036 + x1037 * poly_mix[14]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1039 = arg0[395]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonInvalid ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :61:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :452:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1040 = x1038 + x1039 * poly_mix[15]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1041 = arg0[396]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonInvalid ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :61:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :452:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1042 = x1040 + x1041 * poly_mix[16]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1043 = arg0[397]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonInvalid ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :61:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :452:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1044 = x1042 + x1043 * poly_mix[17]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1045 = arg0[398]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonInvalid ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :61:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :452:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1046 = x1044 + x1045 * poly_mix[18]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1047 = arg0[399]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonInvalid ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :61:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :452:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1048 = x1046 + x1047 * poly_mix[19]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1049 = arg0[400]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonInvalid ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :61:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :452:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1050 = x1048 + x1049 * poly_mix[20]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1051 = arg0[401]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonInvalid ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :61:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :452:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1052 = x1050 + x1051 * poly_mix[21]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1053 = arg0[402]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonInvalid ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :61:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :452:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1054 = x1052 + x1053 * poly_mix[22]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1055 = arg0[403]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonInvalid ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :61:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :452:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1056 = x1054 + x1055 * poly_mix[23]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1057 = arg0[404]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonInvalid ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :61:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :452:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1058 = x1056 + x1057 * poly_mix[24]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1059 = arg0[405]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonInvalid ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :61:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :452:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1060 = x1058 + x1059 * poly_mix[25]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1061 = arg0[406]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonInvalid ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :61:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :452:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1062 = x1060 + x1061 * poly_mix[26]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1063 = arg0[407]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonInvalid ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :61:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :452:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1064 = x1062 + x1063 * poly_mix[27]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1065 = arg0[408]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonInvalid ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :61:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :452:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1066 = x1064 + x1065 * poly_mix[28]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1067 = arg0[409]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonInvalid ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :61:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :452:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1068 = x1066 + x1067 * poly_mix[29]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1069 = arg0[410]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonInvalid ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :61:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :452:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1070 = x1068 + x1069 * poly_mix[30]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1071 = arg0[411]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonInvalid ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :61:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :452:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1072 = x1070 + x1071 * poly_mix[31]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1073 = arg0[412]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonInvalid ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :61:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :452:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1074 = x1072 + x1073 * poly_mix[32]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1075 = arg0[413]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonInvalid ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :61:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :452:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1076 = x1074 + x1075 * poly_mix[33]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1077 = arg0[414]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonInvalid ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :61:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :452:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1078 = x1076 + x1077 * poly_mix[34]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1079 = arg0[415]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonInvalid ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :61:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :452:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1080 = x1078 + x1079 * poly_mix[35]; - // loc(callsite(unknown at callsite( ExtReg ( :11:18) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :48:27) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1081 = arg3[2]; - // loc(callsite(unknown at callsite( ExtReg ( :11:11) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :48:27) at callsite( PoseidonInvalid ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :61:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :452:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1082 = x1080 + x1081 * poly_mix[36]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1083 = x1082 + x157 * poly_mix[37]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1084 = x1083 + x158 * poly_mix[38]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1085 = x1084 + x159 * poly_mix[39]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1086 = x1085 + x160 * poly_mix[40]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1087 = x1086 + x161 * poly_mix[41]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1088 = x1087 + x162 * poly_mix[42]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1089 = x1088 + x163 * poly_mix[43]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1090 = x1089 + x164 * poly_mix[44]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1091 = x1090 + x165 * poly_mix[45]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1092 = x1091 + x166 * poly_mix[46]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1093 = x1092 + x167 * poly_mix[47]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1094 = x1093 + x168 * poly_mix[48]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1095 = x1094 + x169 * poly_mix[49]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1096 = x1095 + x170 * poly_mix[50]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1097 = x1096 + x171 * poly_mix[51]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1098 = x1097 + x172 * poly_mix[52]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1099 = x1098 + x29 * poly_mix[53]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1100 = x1099 + x37 * poly_mix[54]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1101 = x1100 + x44 * poly_mix[55]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1102 = x1101 + x51 * poly_mix[56]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1103 = x1102 + x58 * poly_mix[57]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1104 = x1103 + x65 * poly_mix[58]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1105 = x1104 + x72 * poly_mix[59]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1106 = x1105 + x79 * poly_mix[60]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1107 = x1106 + x134 * poly_mix[61]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1108 = x1107 + x135 * poly_mix[62]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1109 = x1108 + x136 * poly_mix[63]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1110 = x1109 + x137 * poly_mix[64]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1111 = x1110 + x138 * poly_mix[65]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1112 = x1111 + x139 * poly_mix[66]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1113 = x1112 + x140 * poly_mix[67]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1114 = x1113 + x141 * poly_mix[68]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1115 = x1114 + x142 * poly_mix[69]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1116 = x1115 + x143 * poly_mix[70]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1117 = x1116 + x144 * poly_mix[71]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1118 = x1117 + x145 * poly_mix[72]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1119 = x1118 + x146 * poly_mix[73]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1120 = x1119 + x147 * poly_mix[74]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1121 = x1120 + x148 * poly_mix[75]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1122 = x1121 + x149 * poly_mix[76]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1123 = x1122 + x150 * poly_mix[77]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1124 = x1123 + x151 * poly_mix[78]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1125 = x1011 + x173 * x1124 * poly_mix[383]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1126 = x1125 + x174 * x1124 * poly_mix[384]; - // loc(callsite(unknown at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:4) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x1127 = x7 - x175; - // loc(callsite(unknown at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:4) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - arg0[457] = x1127; - // loc(callsite(unknown at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:35) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1128 = x176 + x7; - // loc(callsite(unknown at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:35) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1129 = x176 + x8; - // loc(callsite(unknown at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:35) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1130 = x176 + x14; - // loc(callsite(unknown at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:35) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1131 = x176 + x13; - // loc(callsite(unknown at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:35) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1132 = x176 + x12; - // loc(callsite(unknown at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:35) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - arg0[421] = x1132; - // loc(callsite(unknown at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:35) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1133 = x176 + x11; - // loc(callsite(unknown at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:35) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - arg0[423] = x1133; - // loc(callsite(unknown at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:35) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1134 = x176 + x10; - // loc(callsite(unknown at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:35) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - arg0[424] = x1134; - // loc(callsite(unknown at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :269:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1135 = x177 * x0; - // loc(callsite(unknown at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :269:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - arg0[429] = x1135; - // loc(callsite(unknown at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :269:62) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1136 = x7 - x177; - // loc(callsite(unknown at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :269:62) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - arg0[428] = x1136; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1137 = x28 - x176; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg0[449] = x1137; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1138 = arg2 + x1137 * poly_mix[4]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1139 = x1138 + x225 * poly_mix[5]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1140 = x1139 + x227 * poly_mix[6]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x1141 = x1140 + x229 * poly_mix[7]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x1142 = x1141 + x231 * poly_mix[8]; - // loc(callsite(unknown at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :141:18) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1143 = arg0[416]; - // loc(callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :265:11) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x1144 = x1143 - x125; - // loc(callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :265:11) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x1145 = x1142 + x1144 * poly_mix[9]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1146 = x1145 + x257 * poly_mix[10]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1147 = x1146 + x259 * poly_mix[11]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1148 = x1147 + x6 * poly_mix[12]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1149 = x1148 + x6 * poly_mix[13]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1150 = x36 - x1128; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg0[450] = x1150; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1151 = x1149 + x1150 * poly_mix[14]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1152 = x1151 + x266 * poly_mix[15]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1153 = x1152 + x268 * poly_mix[16]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x1154 = x1153 + x270 * poly_mix[17]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x1155 = x1154 + x272 * poly_mix[18]; - // loc(callsite(unknown at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :141:18) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1156 = arg0[417]; - // loc(callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :265:11) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x1157 = x1156 - x126; - // loc(callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :265:11) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x1158 = x1155 + x1157 * poly_mix[19]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1159 = x1158 + x298 * poly_mix[20]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1160 = x1159 + x300 * poly_mix[21]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1161 = x1160 + x6 * poly_mix[22]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1162 = x1161 + x6 * poly_mix[23]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1163 = x43 - x1129; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg0[452] = x1163; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1164 = x1162 + x1163 * poly_mix[24]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1165 = x1164 + x307 * poly_mix[25]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1166 = x1165 + x309 * poly_mix[26]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x1167 = x1166 + x311 * poly_mix[27]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x1168 = x1167 + x313 * poly_mix[28]; - // loc(callsite(unknown at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :141:18) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1169 = arg0[418]; - // loc(callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :265:11) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x1170 = x1169 - x127; - // loc(callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :265:11) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x1171 = x1168 + x1170 * poly_mix[29]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1172 = x1171 + x339 * poly_mix[30]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1173 = x1172 + x341 * poly_mix[31]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1174 = x1173 + x6 * poly_mix[32]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1175 = x1174 + x6 * poly_mix[33]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1176 = x50 - x1130; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg0[454] = x1176; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1177 = x1175 + x1176 * poly_mix[34]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1178 = x1177 + x347 * poly_mix[35]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1179 = x1178 + x349 * poly_mix[36]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x1180 = x1179 + x351 * poly_mix[37]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x1181 = x1180 + x353 * poly_mix[38]; - // loc(callsite(unknown at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :141:18) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1182 = arg0[419]; - // loc(callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :265:11) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x1183 = x1182 - x128; - // loc(callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :265:11) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x1184 = x1181 + x1183 * poly_mix[39]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1185 = x1184 + x379 * poly_mix[40]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1186 = x1185 + x381 * poly_mix[41]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1187 = x1186 + x6 * poly_mix[42]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1188 = x1187 + x6 * poly_mix[43]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x1189 = x57 - x1131; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg0[455] = x1189; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1190 = x1188 + x1189 * poly_mix[44]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1191 = x1190 + x387 * poly_mix[45]; - // loc(unknown) - auto x1192 = rv32im_v2_5(cycle, steps, poly_mix, arg0, x1191, arg3, arg1, x1126, arg7, arg8, x1082, arg9, arg10, arg11); - return x1192; -} -FpExt rv32im_v2_2(size_t cycle, size_t steps, FpExt* poly_mix, Fp* arg0, FpExt arg1, FpExt* arg2, FpExt arg3, FpExt arg4, FpExt arg5, FpExt arg6, Fp* arg7, Fp* arg8, Fp* arg9) { - size_t mask = steps - 1; - // loc(unknown) - constexpr FpExt x0(0,1,0,0); - // loc(unknown) - constexpr Fp x1(3); - // loc(unknown) - constexpr Fp x2(7); - // loc(unknown) - constexpr Fp x3(6); - // loc(unknown) - constexpr Fp x4(32); - // loc(unknown) - constexpr Fp x5(16); - // loc(unknown) - constexpr Fp x6(1); - // loc(unknown) - constexpr Fp x7(0); - // loc(unknown) - constexpr Fp x8(4); - // loc(unknown) - constexpr Fp x9(1810596765); - // loc(unknown) - constexpr Fp x10(1210751726); - // loc(unknown) - constexpr Fp x11(1327682690); - // loc(unknown) - constexpr Fp x12(1886977120); - // loc(unknown) - constexpr Fp x13(1551596046); - // loc(unknown) - constexpr Fp x14(1186174623); - // loc(unknown) - constexpr Fp x15(918610824); - // loc(unknown) - constexpr Fp x16(13683276); - // loc(unknown) - constexpr Fp x17(606789471); - // loc(unknown) - constexpr Fp x18(1974912880); - // loc(unknown) - constexpr Fp x19(65998480); - // loc(unknown) - constexpr Fp x20(1461037801); - // loc(unknown) - constexpr Fp x21(1997365680); - // loc(unknown) - constexpr Fp x22(801504236); - // loc(unknown) - constexpr Fp x23(1792686146); - // loc(unknown) - constexpr Fp x24(1001081699); - // loc(unknown) - constexpr Fp x25(98371040); - // loc(unknown) - constexpr Fp x26(1389833583); - // loc(unknown) - constexpr Fp x27(106789798); - // loc(unknown) - constexpr Fp x28(1188752902); - // loc(unknown) - constexpr Fp x29(20525701); - // loc(unknown) - constexpr Fp x30(1558116381); - // loc(unknown) - constexpr Fp x31(1942928017); - // loc(unknown) - constexpr Fp x32(1928969209); - // loc(unknown) - constexpr Fp x33(51866717); - // loc(unknown) - constexpr Fp x34(658182609); - // loc(unknown) - constexpr Fp x35(1867716110); - // loc(unknown) - constexpr Fp x36(111593398); - // loc(unknown) - constexpr Fp x37(375892129); - // loc(unknown) - constexpr Fp x38(1083257840); - // loc(callsite(unknown at callsite( CycleArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :54:29) at callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :60:19) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x39 = arg7[94 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :25:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x40 = arg7[97 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :26:28) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x41 = arg7[96 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x42 = arg7[99 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :27:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x43 = arg7[98 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :25:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x44 = arg7[101 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x45 = arg7[100 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x46 = arg7[103 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x47 = arg7[102 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( CycleArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :55:29) at callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :60:19) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x48 = arg7[105 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( CycleArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :54:29) at callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :60:19) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x49 = arg7[104 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :26:28) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x50 = arg7[107 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :34:15) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x51 = arg7[106 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :126:34) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :135:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x52 = arg7[34 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x53 = arg7[38 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :45:28) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x54 = arg7[39 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :28:29) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x55 = arg7[40 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x56 = arg7[41 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :51:29) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x57 = arg7[42 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :28:29) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x58 = arg7[43 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x59 = arg7[44 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :45:28) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x60 = arg7[45 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :28:29) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x61 = arg7[46 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x62 = arg7[47 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :51:29) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x63 = arg7[48 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :8:23) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x64 = arg7[49 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :11:20) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x65 = arg7[50 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :42:21) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x66 = arg7[51 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :26:28) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x67 = arg7[52 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :25:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x68 = arg7[53 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :27:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x69 = arg7[54 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU8 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :8:29) at callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :15:16) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :53:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x70 = arg7[55 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU8 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :9:27) at callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :15:16) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :53:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x71 = arg7[56 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :25:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x72 = arg7[57 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x73 = arg7[58 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x74 = arg7[59 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( CycleArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :54:29) at callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :60:19) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x75 = arg7[60 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( CycleArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :55:29) at callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :60:19) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x76 = arg7[61 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x77 = arg7[20 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x78 = arg7[21 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x79 = arg7[22 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x80 = arg7[23 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x81 = arg7[24 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x82 = arg7[25 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x83 = arg7[26 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x84 = arg7[11 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x85 = arg7[44 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x86 = arg7[1 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x87 = arg7[2 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x88 = arg7[3 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x89 = arg7[154 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x90 = arg7[4 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x91 = arg7[164 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x92 = arg7[5 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :131:19) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x93 = arg7[117 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x94 = arg7[6 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x95 = arg7[126 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x96 = arg7[7 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x97 = arg7[171 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :36:22) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x98 = arg7[33 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :61:29) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x99 = arg7[49 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x100 = arg7[112 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x101 = arg7[174 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x102 = arg7[173 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x103 = arg7[8 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :173:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x104 = arg7[111 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x105 = arg7[9 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x106 = arg7[10 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x107 = arg7[47 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x108 = arg7[157 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x109 = arg7[167 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x110 = arg7[120 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x111 = arg7[129 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :97:30) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x112 = arg7[34 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :61:29) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x113 = arg7[50 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( ControlMRET ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :76:26) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :180:17) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x114 = arg7[114 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x115 = arg7[19 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x116 = arg7[172 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :37:24) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x117 = arg7[41 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :45:22) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x118 = arg7[37 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :85:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x119 = arg7[12 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :86:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x120 = arg7[13 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :87:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x121 = arg7[14 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :88:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x122 = arg7[15 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x123 = arg9[7]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x124 = arg9[6]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x125 = arg9[5]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x126 = arg9[4]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x127 = arg9[11]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x128 = arg9[10]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x129 = arg9[9]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x130 = arg9[8]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x131 = arg9[15]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x132 = arg9[14]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x133 = arg9[13]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x134 = arg9[12]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x135 = arg9[19]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x136 = arg9[18]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x137 = arg9[17]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x138 = arg9[16]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x139 = arg9[23]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x140 = arg9[22]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x141 = arg9[21]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x142 = arg9[20]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x143 = arg9[27]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x144 = arg9[26]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x145 = arg9[25]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x146 = arg9[24]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :84:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x147 = arg9[31]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :84:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x148 = arg9[30]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :84:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x149 = arg9[29]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :84:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x150 = arg9[28]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :93:55 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x151 = arg8[75 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :93:55 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x152 = arg8[74 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :93:55 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x153 = arg8[73 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :93:55 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x154 = arg8[72 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :28:29) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x155 = arg7[37 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x156 = arg8[3 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x157 = arg8[2 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x158 = arg8[1 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x159 = arg8[0 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :48:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x160 = arg7[0 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x161 = arg8[7 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x162 = arg8[6 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x163 = arg8[5 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x164 = arg8[4 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x165 = arg7[78 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :65:23) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x166 = arg7[81 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :28:29) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :65:23) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x167 = arg7[80 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x168 = arg8[11 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x169 = arg8[10 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x170 = arg8[9 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x171 = arg8[8 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :69:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x172 = arg7[85 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :26:28) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x173 = arg7[86 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :27:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x174 = arg7[88 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x175 = arg7[89 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x176 = arg7[90 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :25:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x177 = arg7[87 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :28:29) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :69:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x178 = arg7[84 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x179 = arg7[92 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x180 = arg7[93 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x181 = arg0[576]; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x182 = arg0[577]; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x183 = x181 + x182; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x184 = arg0[578]; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x185 = x183 + x184; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x186 = arg0[579]; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x187 = x185 + x186; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x188 = arg0[580]; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x189 = x187 + x188; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x190 = arg0[581]; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x191 = x189 + x190; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x192 = arg0[582]; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x193 = x191 + x192; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x194 = arg0[583]; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x195 = x193 + x194; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x196 = arg0[584]; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x197 = x195 + x196; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x198 = arg0[585]; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x199 = x197 + x198; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x200 = arg0[586]; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x201 = x199 + x200; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x202 = arg0[587]; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x203 = x201 + x202; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x204 = arg0[588]; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x205 = x203 + x204; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x206 = arg0[589]; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x207 = x205 + x206; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x208 = arg0[590]; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x209 = x207 + x208; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x210 = x39 * x38; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x211 = x209 + x210; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x212 = arg0[591]; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x213 = x212 * x37; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x214 = x209 + x213; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x215 = arg0[592]; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x216 = x215 * x36; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x217 = x209 + x216; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x218 = arg0[593]; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x219 = x218 * x35; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x220 = x209 + x219; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x221 = arg0[594]; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x222 = x221 * x34; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x223 = x209 + x222; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x224 = arg0[595]; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x225 = x224 * x33; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x226 = x209 + x225; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x227 = arg0[596]; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x228 = x227 * x32; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x229 = x209 + x228; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x230 = arg0[597]; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x231 = x230 * x31; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x232 = x209 + x231; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x233 = arg0[598]; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x234 = x233 * x30; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x235 = x209 + x234; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x236 = arg0[599]; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x237 = x236 * x29; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x238 = x209 + x237; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x239 = x182 * x28; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x240 = x209 + x239; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x241 = x184 * x27; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x242 = x209 + x241; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x243 = x186 * x26; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x244 = x209 + x243; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x245 = x188 * x25; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x246 = x209 + x245; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x247 = x190 * x24; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x248 = x209 + x247; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x249 = x192 * x23; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x250 = x209 + x249; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x251 = x194 * x22; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x252 = x209 + x251; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x253 = x196 * x21; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x254 = x209 + x253; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x255 = x198 * x20; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x256 = x209 + x255; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x257 = x200 * x19; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x258 = x209 + x257; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x259 = x202 * x18; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x260 = x209 + x259; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x261 = x204 * x17; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x262 = x209 + x261; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x263 = x206 * x16; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x264 = x209 + x263; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x265 = x208 * x15; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x266 = x209 + x265; - // loc(callsite(unknown at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :31:13) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x267 = x211 + x14; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:17) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x268 = x267 * x267; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:22) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x269 = x268 * x267; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x270 = x269 - x40; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x271 = arg1 + x270 * poly_mix[30]; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:15) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x272 = arg0[600]; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:23) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x273 = x272 * x267; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x274 = x273 - x41; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x275 = x271 + x274 * poly_mix[31]; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x276 = x41 + x214; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x277 = x276 + x217; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x278 = x277 + x220; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x279 = x278 + x223; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x280 = x279 + x226; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x281 = x280 + x229; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x282 = x281 + x232; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x283 = x282 + x235; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x284 = x283 + x238; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x285 = x284 + x240; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x286 = x285 + x242; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x287 = x286 + x244; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x288 = x287 + x246; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x289 = x288 + x248; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x290 = x289 + x250; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x291 = x290 + x252; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x292 = x291 + x254; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x293 = x292 + x256; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x294 = x293 + x258; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x295 = x294 + x260; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x296 = x295 + x262; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x297 = x296 + x264; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x298 = x297 + x266; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x299 = x41 * x38; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x300 = x298 + x299; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x301 = x214 * x37; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x302 = x298 + x301; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x303 = x217 * x36; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x304 = x298 + x303; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x305 = x220 * x35; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x306 = x298 + x305; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x307 = x223 * x34; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x308 = x298 + x307; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x309 = x226 * x33; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x310 = x298 + x309; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x311 = x229 * x32; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x312 = x298 + x311; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x313 = x232 * x31; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x314 = x298 + x313; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x315 = x235 * x30; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x316 = x298 + x315; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x317 = x238 * x29; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x318 = x298 + x317; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x319 = x240 * x28; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x320 = x298 + x319; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x321 = x242 * x27; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x322 = x298 + x321; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x323 = x244 * x26; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x324 = x298 + x323; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x325 = x246 * x25; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x326 = x298 + x325; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x327 = x248 * x24; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x328 = x298 + x327; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x329 = x250 * x23; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x330 = x298 + x329; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x331 = x252 * x22; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x332 = x298 + x331; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x333 = x254 * x21; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x334 = x298 + x333; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x335 = x256 * x20; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x336 = x298 + x335; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x337 = x258 * x19; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x338 = x298 + x337; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x339 = x260 * x18; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x340 = x298 + x339; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x341 = x262 * x17; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x342 = x298 + x341; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x343 = x264 * x16; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x344 = x298 + x343; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x345 = x266 * x15; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x346 = x298 + x345; - // loc(callsite(unknown at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :31:13) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x347 = x300 + x13; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:17) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x348 = x347 * x347; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:22) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x349 = x348 * x347; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x350 = x349 - x42; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x351 = x275 + x350 * poly_mix[32]; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:15) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x352 = arg0[601]; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:23) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x353 = x352 * x347; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x354 = x353 - x43; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x355 = x351 + x354 * poly_mix[33]; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x356 = x43 + x302; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x357 = x356 + x304; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x358 = x357 + x306; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x359 = x358 + x308; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x360 = x359 + x310; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x361 = x360 + x312; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x362 = x361 + x314; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x363 = x362 + x316; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x364 = x363 + x318; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x365 = x364 + x320; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x366 = x365 + x322; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x367 = x366 + x324; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x368 = x367 + x326; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x369 = x368 + x328; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x370 = x369 + x330; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x371 = x370 + x332; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x372 = x371 + x334; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x373 = x372 + x336; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x374 = x373 + x338; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x375 = x374 + x340; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x376 = x375 + x342; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x377 = x376 + x344; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x378 = x377 + x346; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x379 = x43 * x38; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x380 = x378 + x379; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x381 = x302 * x37; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x382 = x378 + x381; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x383 = x304 * x36; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x384 = x378 + x383; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x385 = x306 * x35; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x386 = x378 + x385; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x387 = x308 * x34; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x388 = x378 + x387; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x389 = x310 * x33; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x390 = x378 + x389; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x391 = x312 * x32; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x392 = x378 + x391; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x393 = x314 * x31; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x394 = x378 + x393; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x395 = x316 * x30; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x396 = x378 + x395; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x397 = x318 * x29; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x398 = x378 + x397; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x399 = x320 * x28; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x400 = x378 + x399; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x401 = x322 * x27; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x402 = x378 + x401; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x403 = x324 * x26; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x404 = x378 + x403; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x405 = x326 * x25; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x406 = x378 + x405; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x407 = x328 * x24; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x408 = x378 + x407; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x409 = x330 * x23; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x410 = x378 + x409; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x411 = x332 * x22; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x412 = x378 + x411; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x413 = x334 * x21; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x414 = x378 + x413; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x415 = x336 * x20; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x416 = x378 + x415; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x417 = x338 * x19; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x418 = x378 + x417; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x419 = x340 * x18; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x420 = x378 + x419; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x421 = x342 * x17; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x422 = x378 + x421; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x423 = x344 * x16; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x424 = x378 + x423; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x425 = x346 * x15; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x426 = x378 + x425; - // loc(callsite(unknown at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :31:13) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x427 = x380 + x12; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:17) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x428 = x427 * x427; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:22) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x429 = x428 * x427; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x430 = x429 - x44; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x431 = x355 + x430 * poly_mix[34]; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:15) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x432 = arg0[602]; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:23) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x433 = x432 * x427; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x434 = x433 - x45; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x435 = x431 + x434 * poly_mix[35]; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x436 = x45 + x382; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x437 = x436 + x384; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x438 = x437 + x386; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x439 = x438 + x388; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x440 = x439 + x390; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x441 = x440 + x392; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x442 = x441 + x394; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x443 = x442 + x396; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x444 = x443 + x398; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x445 = x444 + x400; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x446 = x445 + x402; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x447 = x446 + x404; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x448 = x447 + x406; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x449 = x448 + x408; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x450 = x449 + x410; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x451 = x450 + x412; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x452 = x451 + x414; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x453 = x452 + x416; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x454 = x453 + x418; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x455 = x454 + x420; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x456 = x455 + x422; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x457 = x456 + x424; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x458 = x457 + x426; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x459 = x45 * x38; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x460 = x458 + x459; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x461 = x382 * x37; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x462 = x458 + x461; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x463 = x384 * x36; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x464 = x458 + x463; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x465 = x386 * x35; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x466 = x458 + x465; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x467 = x388 * x34; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x468 = x458 + x467; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x469 = x390 * x33; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x470 = x458 + x469; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x471 = x392 * x32; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x472 = x458 + x471; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x473 = x394 * x31; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x474 = x458 + x473; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x475 = x396 * x30; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x476 = x458 + x475; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x477 = x398 * x29; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x478 = x458 + x477; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x479 = x400 * x28; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x480 = x458 + x479; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x481 = x402 * x27; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x482 = x458 + x481; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x483 = x404 * x26; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x484 = x458 + x483; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x485 = x406 * x25; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x486 = x458 + x485; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x487 = x408 * x24; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x488 = x458 + x487; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x489 = x410 * x23; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x490 = x458 + x489; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x491 = x412 * x22; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x492 = x458 + x491; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x493 = x414 * x21; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x494 = x458 + x493; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x495 = x416 * x20; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x496 = x458 + x495; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x497 = x418 * x19; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x498 = x458 + x497; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x499 = x420 * x18; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x500 = x458 + x499; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x501 = x422 * x17; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x502 = x458 + x501; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x503 = x424 * x16; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x504 = x458 + x503; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x505 = x426 * x15; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x506 = x458 + x505; - // loc(callsite(unknown at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :31:13) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x507 = x460 + x11; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:17) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x508 = x507 * x507; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:22) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x509 = x508 * x507; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x510 = x509 - x46; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x511 = x435 + x510 * poly_mix[36]; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:15) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x512 = arg0[603]; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:23) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x513 = x512 * x507; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x514 = x513 - x47; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x515 = x511 + x514 * poly_mix[37]; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x516 = x47 + x462; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x517 = x516 + x464; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x518 = x517 + x466; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x519 = x518 + x468; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x520 = x519 + x470; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x521 = x520 + x472; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x522 = x521 + x474; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x523 = x522 + x476; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x524 = x523 + x478; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x525 = x524 + x480; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x526 = x525 + x482; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x527 = x526 + x484; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x528 = x527 + x486; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x529 = x528 + x488; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x530 = x529 + x490; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x531 = x530 + x492; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x532 = x531 + x494; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x533 = x532 + x496; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x534 = x533 + x498; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x535 = x534 + x500; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x536 = x535 + x502; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x537 = x536 + x504; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x538 = x537 + x506; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x539 = x47 * x38; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x540 = x538 + x539; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x541 = x462 * x37; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x542 = x538 + x541; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x543 = x464 * x36; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x544 = x538 + x543; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x545 = x466 * x35; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x546 = x538 + x545; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x547 = x468 * x34; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x548 = x538 + x547; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x549 = x470 * x33; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x550 = x538 + x549; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x551 = x472 * x32; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x552 = x538 + x551; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x553 = x474 * x31; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x554 = x538 + x553; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x555 = x476 * x30; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x556 = x538 + x555; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x557 = x478 * x29; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x558 = x538 + x557; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x559 = x480 * x28; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x560 = x538 + x559; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x561 = x482 * x27; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x562 = x538 + x561; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x563 = x484 * x26; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x564 = x538 + x563; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x565 = x486 * x25; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x566 = x538 + x565; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x567 = x488 * x24; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x568 = x538 + x567; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x569 = x490 * x23; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x570 = x538 + x569; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x571 = x492 * x22; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x572 = x538 + x571; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x573 = x494 * x21; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x574 = x538 + x573; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x575 = x496 * x20; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x576 = x538 + x575; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x577 = x498 * x19; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x578 = x538 + x577; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x579 = x500 * x18; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x580 = x538 + x579; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x581 = x502 * x17; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x582 = x538 + x581; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x583 = x504 * x16; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x584 = x538 + x583; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x585 = x506 * x15; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x586 = x538 + x585; - // loc(callsite(unknown at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :31:13) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x587 = x540 + x10; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:17) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x588 = x587 * x587; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:22) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x589 = x588 * x587; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x590 = x589 - x48; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x591 = x515 + x590 * poly_mix[38]; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:15) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x592 = arg0[604]; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:23) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x593 = x592 * x587; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x594 = x593 - x49; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x595 = x591 + x594 * poly_mix[39]; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x596 = x49 + x542; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x597 = x596 + x544; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x598 = x597 + x546; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x599 = x598 + x548; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x600 = x599 + x550; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x601 = x600 + x552; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x602 = x601 + x554; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x603 = x602 + x556; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x604 = x603 + x558; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x605 = x604 + x560; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x606 = x605 + x562; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x607 = x606 + x564; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x608 = x607 + x566; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x609 = x608 + x568; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x610 = x609 + x570; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x611 = x610 + x572; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x612 = x611 + x574; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x613 = x612 + x576; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x614 = x613 + x578; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x615 = x614 + x580; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x616 = x615 + x582; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x617 = x616 + x584; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x618 = x617 + x586; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x619 = x49 * x38; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x620 = x618 + x619; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x621 = x542 * x37; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x622 = x618 + x621; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x623 = x544 * x36; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x624 = x618 + x623; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x625 = x546 * x35; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x626 = x618 + x625; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x627 = x548 * x34; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x628 = x618 + x627; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x629 = x550 * x33; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x630 = x618 + x629; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x631 = x552 * x32; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x632 = x618 + x631; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x633 = x554 * x31; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x634 = x618 + x633; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x635 = x556 * x30; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x636 = x618 + x635; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x637 = x558 * x29; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x638 = x618 + x637; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x639 = x560 * x28; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x640 = x618 + x639; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x641 = x562 * x27; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x642 = x618 + x641; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x643 = x564 * x26; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x644 = x618 + x643; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x645 = x566 * x25; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x646 = x618 + x645; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x647 = x568 * x24; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x648 = x618 + x647; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x649 = x570 * x23; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x650 = x618 + x649; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x651 = x572 * x22; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x652 = x618 + x651; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x653 = x574 * x21; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x654 = x618 + x653; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x655 = x576 * x20; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x656 = x618 + x655; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x657 = x578 * x19; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x658 = x618 + x657; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x659 = x580 * x18; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x660 = x618 + x659; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x661 = x582 * x17; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x662 = x618 + x661; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x663 = x584 * x16; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x664 = x618 + x663; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x665 = x586 * x15; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x666 = x618 + x665; - // loc(callsite(unknown at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :31:13) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x667 = x620 + x9; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:17) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x668 = x667 * x667; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:22) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x669 = x668 * x667; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x670 = x669 - x50; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x671 = x595 + x670 * poly_mix[40]; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:15) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x672 = arg0[605]; - // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:23) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x673 = x672 * x667; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x674 = x673 - x51; - // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x675 = x671 + x674 * poly_mix[41]; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x676 = x51 + x622; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x677 = x676 + x624; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x678 = x677 + x626; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x679 = x678 + x628; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x680 = x679 + x630; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x681 = x680 + x632; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x682 = x681 + x634; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x683 = x682 + x636; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x684 = x683 + x638; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x685 = x684 + x640; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x686 = x685 + x642; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x687 = x686 + x644; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x688 = x687 + x646; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x689 = x688 + x648; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x690 = x689 + x650; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x691 = x690 + x652; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x692 = x691 + x654; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x693 = x692 + x656; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x694 = x693 + x658; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x695 = x694 + x660; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x696 = x695 + x662; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x697 = x696 + x664; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x698 = x697 + x666; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x699 = x51 * x38; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x700 = x698 + x699; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x701 = x622 * x37; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x702 = x698 + x701; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x703 = x624 * x36; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x704 = x698 + x703; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x705 = x626 * x35; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x706 = x698 + x705; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x707 = x628 * x34; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x708 = x698 + x707; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x709 = x630 * x33; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x710 = x698 + x709; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x711 = x632 * x32; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x712 = x698 + x711; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x713 = x634 * x31; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x714 = x698 + x713; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x715 = x636 * x30; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x716 = x698 + x715; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x717 = x638 * x29; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x718 = x698 + x717; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x719 = x640 * x28; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x720 = x698 + x719; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x721 = x642 * x27; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x722 = x698 + x721; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x723 = x644 * x26; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x724 = x698 + x723; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x725 = x646 * x25; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x726 = x698 + x725; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x727 = x648 * x24; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x728 = x698 + x727; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x729 = x650 * x23; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x730 = x698 + x729; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x731 = x652 * x22; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x732 = x698 + x731; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x733 = x654 * x21; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x734 = x698 + x733; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x735 = x656 * x20; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x736 = x698 + x735; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x737 = x658 * x19; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x738 = x698 + x737; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x739 = x660 * x18; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x740 = x698 + x739; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x741 = x662 * x17; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x742 = x698 + x741; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x743 = x664 * x16; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x744 = x698 + x743; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x745 = x666 * x15; - // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x746 = x698 + x745; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :34:26) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x747 = arg0[376]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :34:26) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x748 = x675 + x747 * poly_mix[42]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :35:27) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x749 = arg0[377]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :35:27) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x750 = x748 + x749 * poly_mix[43]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :36:28) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x751 = arg0[378]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :36:28) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x752 = x750 + x751 * poly_mix[44]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :37:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x753 = arg0[379]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :37:24) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x754 = x752 + x753 * poly_mix[45]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :38:26) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x755 = arg0[380]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :38:26) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x756 = x754 + x755 * poly_mix[46]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :39:28) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x757 = arg0[381]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :39:28) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x758 = x756 + x757 * poly_mix[47]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :41:27) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x759 = arg0[606]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :41:27) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x760 = x758 + x759 * poly_mix[48]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :42:26) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x761 = x8 - x52; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :42:26) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x762 = x760 + x761 * poly_mix[49]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :43:27) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x763 = arg0[537]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :43:27) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x764 = x762 + x763 * poly_mix[50]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :44:23) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x765 = arg0[383]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :44:23) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x766 = x764 + x765 * poly_mix[51]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :45:22) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x767 = arg0[384]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :45:22) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x768 = x766 + x767 * poly_mix[52]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x769 = x700 - x53; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x770 = x768 + x769 * poly_mix[53]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x771 = x702 - x54; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x772 = x770 + x771 * poly_mix[54]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x773 = x704 - x55; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x774 = x772 + x773 * poly_mix[55]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x775 = x706 - x56; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x776 = x774 + x775 * poly_mix[56]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x777 = x708 - x57; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x778 = x776 + x777 * poly_mix[57]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x779 = x710 - x58; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x780 = x778 + x779 * poly_mix[58]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x781 = x712 - x59; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x782 = x780 + x781 * poly_mix[59]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x783 = x714 - x60; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x784 = x782 + x783 * poly_mix[60]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x785 = x716 - x61; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x786 = x784 + x785 * poly_mix[61]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x787 = x718 - x62; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x788 = x786 + x787 * poly_mix[62]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x789 = x720 - x63; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x790 = x788 + x789 * poly_mix[63]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x791 = x722 - x64; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x792 = x790 + x791 * poly_mix[64]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x793 = x724 - x65; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x794 = x792 + x793 * poly_mix[65]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x795 = x726 - x66; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x796 = x794 + x795 * poly_mix[66]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x797 = x728 - x67; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x798 = x796 + x797 * poly_mix[67]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x799 = x730 - x68; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x800 = x798 + x799 * poly_mix[68]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x801 = x732 - x69; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x802 = x800 + x801 * poly_mix[69]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x803 = x734 - x70; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x804 = x802 + x803 * poly_mix[70]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x805 = x736 - x71; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x806 = x804 + x805 * poly_mix[71]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x807 = x738 - x72; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x808 = x806 + x807 * poly_mix[72]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x809 = x740 - x73; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x810 = x808 + x809 * poly_mix[73]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x811 = x742 - x74; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x812 = x810 + x811 * poly_mix[74]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x813 = x744 - x75; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x814 = x812 + x813 * poly_mix[75]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x815 = x746 - x76; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x816 = x814 + x815 * poly_mix[76]; - // loc(callsite(unknown at callsite( ExtReg ( :11:18) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :48:27) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x817 = arg2[3]; - // loc(callsite(unknown at callsite( ExtReg ( :11:11) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :48:27) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x818 = x816 + x817 * poly_mix[77]; - // loc(callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :467:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x819 = arg3 + x77 * x818 * poly_mix[106]; - // loc(callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :467:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x820 = x819 + x78 * arg4 * poly_mix[171]; - // loc(callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :467:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x821 = x820 + x79 * arg4 * poly_mix[198]; - // loc(callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :467:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x822 = x821 + x80 * arg4 * poly_mix[233]; - // loc(callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :467:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x823 = x822 + x81 * arg4 * poly_mix[253]; - // loc(callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :467:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x824 = x823 + x82 * arg4 * poly_mix[274]; - // loc(callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :467:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x825 = x824 + x83 * arg4 * poly_mix[304]; - // loc(callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :479:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x826 = x825 + x7 * poly_mix[336]; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - FpExt x827 = arg5 + x84 * x826 * poly_mix[395]; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - auto x828 = x85 * x86; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - auto x829 = x85 * x87; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - auto x830 = x85 * x88; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - auto x831 = x89 * x90; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - auto x832 = x91 * x92; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - auto x833 = x93 * x94; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - auto x834 = x95 * x96; - // loc(callsite(unknown at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :34:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x835 = x6 - x97; - // loc(callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :34:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x836 = x98 * x97; - // loc(callsite(unknown at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :52:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x837 = arg0[99]; - // loc(callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :34:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x838 = x837 * x835; - // loc(callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :34:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x839 = x836 + x838; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x840 = x839 * x77; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x841 = x99 * x78; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x842 = x100 * x79; - // loc(callsite(unknown at callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :135:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x843 = x6 - x101; - // loc(callsite(unknown at callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :142:14) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x844 = x102 + x5; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :144:6) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x845 = x844 * x835; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :135:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x846 = x845 * x101; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :135:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x847 = x845 * x843; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :135:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x848 = x846 + x847; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x849 = x848 * x82; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x850 = x840 + x841; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x851 = x850 + x842; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x852 = x851 + x849; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - auto x853 = x852 * x103; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - auto x854 = x104 * x105; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - auto x855 = x837 * x106; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - auto x856 = x837 * x84; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - auto x857 = x828 + x829; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - auto x858 = x857 + x830; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - auto x859 = x858 + x831; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - auto x860 = x859 + x832; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - auto x861 = x860 + x833; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - auto x862 = x861 + x834; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - auto x863 = x862 + x853; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - auto x864 = x863 + x854; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - auto x865 = x864 + x855; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - auto x866 = x865 + x856; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - auto x867 = x107 * x86; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - auto x868 = x107 * x87; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - auto x869 = x107 * x88; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - auto x870 = x108 * x90; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - auto x871 = x109 * x92; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - auto x872 = x110 * x94; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - auto x873 = x111 * x96; - // loc(callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :34:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x874 = x112 * x97; - // loc(callsite(unknown at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :53:34) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x875 = arg0[102]; - // loc(callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :34:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x876 = x875 * x835; - // loc(callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :34:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x877 = x874 + x876; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x878 = x877 * x77; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x879 = x113 * x78; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x880 = x114 * x79; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x881 = x878 + x879; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x882 = x881 + x880; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - auto x883 = x882 * x103; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - auto x884 = x114 * x105; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - auto x885 = x875 * x106; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - auto x886 = x875 * x84; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - auto x887 = x867 + x868; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - auto x888 = x887 + x869; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - auto x889 = x888 + x870; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - auto x890 = x889 + x871; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - auto x891 = x890 + x872; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - auto x892 = x891 + x873; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - auto x893 = x892 + x883; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - auto x894 = x893 + x884; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - auto x895 = x894 + x885; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - auto x896 = x895 + x886; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - auto x897 = x86 * x4; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - auto x898 = x87 * x4; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - auto x899 = x88 * x4; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - auto x900 = x90 * x4; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - auto x901 = x92 * x4; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - auto x902 = x94 * x4; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - auto x903 = x96 * x4; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x904 = x115 * x5; - // loc(callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :34:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x905 = x835 * x4; - // loc(callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :34:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x906 = x97 + x905; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x907 = x906 * x77; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x908 = x78 * x4; - // loc(callsite(unknown at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :84:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x909 = x6 - x116; - // loc(callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :84:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x910 = x116 * x5; - // loc(callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :84:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x911 = x909 * x8; - // loc(callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :84:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x912 = x910 + x911; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x913 = x912 * x80; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x914 = x81 * x3; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :144:6) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x915 = x97 * x2; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :144:6) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x916 = x835 * x3; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :144:6) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x917 = x915 + x916; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :135:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x918 = x917 * x101; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :158:6) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x919 = x97 * x3; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :158:6) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x920 = x919 + x916; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :135:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x921 = x920 * x843; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :135:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x922 = x918 + x921; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x923 = x922 * x82; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x924 = x904 + x907; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x925 = x924 + x908; - // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x926 = arg0[329]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x927 = x925 + x926; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x928 = x927 + x913; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x929 = x928 + x914; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x930 = x929 + x923; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:32) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x931 = arg0[607]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x932 = x930 + x931; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - auto x933 = x932 * x103; - // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x934 = arg0[608]; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - auto x935 = x934 * x105; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - auto x936 = x98 * x106; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - auto x937 = x98 * x84; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - auto x938 = x897 + x898; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - auto x939 = x938 + x899; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - auto x940 = x939 + x900; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - auto x941 = x940 + x901; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - auto x942 = x941 + x902; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - auto x943 = x942 + x903; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - auto x944 = x943 + x933; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - auto x945 = x944 + x935; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - auto x946 = x945 + x936; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - auto x947 = x946 + x937; - // loc(callsite(unknown at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :58:61) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x948 = arg0[238]; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - auto x949 = x948 * x86; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - auto x950 = x948 * x87; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - auto x951 = x948 * x88; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - auto x952 = x948 * x90; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - auto x953 = x948 * x92; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - auto x954 = x948 * x94; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - auto x955 = x948 * x96; - // loc(callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :34:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x956 = x117 * x97; - // loc(callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :34:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x957 = x948 * x835; - // loc(callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :34:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x958 = x956 + x957; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x959 = x958 * x77; - // loc(callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :84:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x960 = x116 * x1; - // loc(callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :84:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x961 = x948 * x909; - // loc(callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :84:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x962 = x960 + x961; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x963 = x962 * x80; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :135:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x964 = x835 * x101; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :135:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x965 = x97 * x843; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :135:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x966 = x964 + x965; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x967 = x966 * x82; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x968 = x959 + x78; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x969 = x968 + x963; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x970 = x969 + x967; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - auto x971 = x970 * x103; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - auto x972 = x118 * x106; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - auto x973 = x118 * x84; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - auto x974 = x949 + x950; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - auto x975 = x974 + x951; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - auto x976 = x975 + x952; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - auto x977 = x976 + x953; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - auto x978 = x977 + x954; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - auto x979 = x978 + x955; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - auto x980 = x979 + x971; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - auto x981 = x980 + x105; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - auto x982 = x981 + x972; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - auto x983 = x982 + x973; - // loc(callsite( Reg ( :5:7) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :85:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x984 = x866 - x119; - // loc(callsite( Reg ( :5:7) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :85:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x985 = x827 + x984 * poly_mix[396]; - // loc(callsite( Reg ( :5:7) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :86:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x986 = x896 - x120; - // loc(callsite( Reg ( :5:7) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :86:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x987 = x985 + x986 * poly_mix[397]; - // loc(callsite( Reg ( :5:7) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :87:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x988 = x947 - x121; - // loc(callsite( Reg ( :5:7) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :87:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x989 = x987 + x988 * poly_mix[398]; - // loc(callsite( Reg ( :5:7) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :88:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x990 = x983 - x122; - // loc(callsite( Reg ( :5:7) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :88:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x991 = x989 + x990 * poly_mix[399]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x992 = x123 * x0; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x993 = x124 + x992; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x994 = x993 * x0; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x995 = x125 + x994; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x996 = x995 * x0; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x997 = x126 + x996; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - arg2[17] = x997; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x998 = x127 * x0; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x999 = x128 + x998; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1000 = x999 * x0; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1001 = x129 + x1000; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1002 = x1001 * x0; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1003 = x130 + x1002; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - arg2[12] = x1003; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1004 = x131 * x0; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1005 = x132 + x1004; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1006 = x1005 * x0; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1007 = x133 + x1006; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1008 = x1007 * x0; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1009 = x134 + x1008; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - arg2[13] = x1009; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1010 = x135 * x0; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1011 = x136 + x1010; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1012 = x1011 * x0; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1013 = x137 + x1012; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1014 = x1013 * x0; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1015 = x138 + x1014; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - arg2[14] = x1015; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1016 = x139 * x0; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1017 = x140 + x1016; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1018 = x1017 * x0; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1019 = x141 + x1018; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1020 = x1019 * x0; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1021 = x142 + x1020; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - arg2[15] = x1021; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1022 = x143 * x0; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1023 = x144 + x1022; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1024 = x1023 * x0; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1025 = x145 + x1024; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1026 = x1025 * x0; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1027 = x146 + x1026; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - arg2[10] = x1027; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :84:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1028 = x147 * x0; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :84:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1029 = x148 + x1028; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :84:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1030 = x1029 * x0; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :84:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1031 = x149 + x1030; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :84:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1032 = x1031 * x0; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :84:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1033 = x150 + x1032; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :84:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - arg2[11] = x1033; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :93:55 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1034 = x151 * x0; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :93:55 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1035 = x152 + x1034; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :93:55 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1036 = x1035 * x0; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :93:55 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1037 = x153 + x1036; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :93:55 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1038 = x1037 * x0; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :93:55 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1039 = x154 + x1038; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1040 = x997 * x53; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1041 = x1040 + x1033; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - arg2[24] = x1041; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1042 = x997 * x56; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1043 = x1042 + x1033; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1044 = x1041 * x1043; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1045 = x1041 * x55; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1046 = x155 * x1043; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1047 = x997 * x59; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1048 = x1047 + x1033; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - arg2[25] = x1048; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1049 = x1044 * x1048; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1050 = x1044 * x58; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1051 = x1046 * x1048; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1052 = x1045 * x1048; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1053 = x156 * x0; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1054 = x157 + x1053; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1055 = x1054 * x0; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1056 = x158 + x1055; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1057 = x1056 * x0; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1058 = x159 + x1057; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - arg2[88] = x1058; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :177:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1059 = x1058 - x1039; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :177:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - arg2[19] = x1059; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1060 = x1059 * x1049; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1061 = x1060 - x1051; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1062 = x1061 - x1052; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1063 = x1062 - x1050; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x1064 = arg6 + x1063 * poly_mix[0]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1065 = x997 * x62; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1066 = x1065 + x1033; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1067 = x1003 * x67; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - arg2[43] = x1067; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1068 = x1009 * x69; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1069 = x1067 + x1068; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1070 = x1015 * x70; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1071 = x1069 + x1070; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1072 = x1021 * x71; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1073 = x1071 + x1072; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1074 = x1073 + x1033; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1075 = x1066 * x1074; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1076 = x1066 * x68; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1077 = x61 * x1074; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1078 = x1009 * x160; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - arg2[16] = x1078; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1079 = x1067 + x1078; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - arg2[44] = x1079; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1080 = x1015 * x73; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1081 = x1079 + x1080; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1082 = x1021 * x74; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1083 = x1081 + x1082; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1084 = x1083 + x1033; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1085 = x1075 * x1084; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1086 = x1075 * x72; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1087 = x1077 * x1084; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1088 = x1076 * x1084; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1089 = x161 * x0; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1090 = x162 + x1089; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1091 = x1090 * x0; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1092 = x163 + x1091; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1093 = x1092 * x0; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1094 = x164 + x1093; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :177:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1095 = x1094 - x1058; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :177:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - arg2[22] = x1095; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1096 = x1095 * x1085; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1097 = x1096 - x1087; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1098 = x1097 - x1088; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1099 = x1098 - x1086; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x1100 = x1064 + x1099 * poly_mix[1]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1101 = x1027 * x76; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1102 = x1101 + x1033; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1103 = x1027 * x160; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1104 = x1103 + x1033; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - arg2[18] = x1104; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1105 = x1102 * x1104; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1106 = x1102 * x165; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1107 = x75 * x1104; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1108 = x997 * x166; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1109 = x1108 + x1033; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - arg2[68] = x1109; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1110 = x1105 * x1109; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1111 = x1105 * x167; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1112 = x1107 * x1109; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1113 = x1106 * x1109; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1114 = x168 * x0; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1115 = x169 + x1114; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1116 = x1115 * x0; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1117 = x170 + x1116; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1118 = x1117 * x0; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1119 = x171 + x1118; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - arg2[8] = x1119; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :177:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1120 = x1119 - x1094; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :177:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - arg2[23] = x1120; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1121 = x1120 * x1110; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1122 = x1121 - x1112; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1123 = x1122 - x1113; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1124 = x1123 - x1111; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x1125 = x1100 + x1124 * poly_mix[2]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1126 = x997 * x172; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1127 = x1126 + x1033; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1128 = x1003 * x173; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1129 = x1009 * x174; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1130 = x1128 + x1129; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1131 = x1015 * x175; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - arg2[59] = x1131; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1132 = x1130 + x1131; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1133 = x1021 * x176; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - arg2[60] = x1133; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1134 = x1132 + x1133; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1135 = x1134 + x1033; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1136 = x1127 * x1135; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - arg2[4] = x1136; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1137 = x1127 * x177; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - arg2[7] = x1137; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1138 = x178 * x1135; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - arg2[5] = x1138; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1139 = x1128 + x1078; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1140 = x1015 * x179; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - arg2[20] = x1140; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1141 = x1139 + x1140; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1142 = x1021 * x180; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - arg2[21] = x1142; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1143 = x1141 + x1142; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1144 = x1143 + x1033; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - arg2[6] = x1144; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1145 = x1136 * x1144; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - arg2[9] = x1145; - // loc(unknown) - auto x1146 = rv32im_v2_1(cycle, steps, poly_mix, arg2, x1125, x991, arg6, arg7, arg8, arg9); - return x1146; -} - -} // namespace risc0::circuit::rv32im_v2 -// clang-format on diff --git a/risc0/circuit/rv32im-v2-sys/kernels/cxx/rust_poly_fp_3.cpp b/risc0/circuit/rv32im-v2-sys/kernels/cxx/rust_poly_fp_3.cpp deleted file mode 100644 index 4429c4bf..00000000 --- a/risc0/circuit/rv32im-v2-sys/kernels/cxx/rust_poly_fp_3.cpp +++ /dev/null @@ -1,7576 +0,0 @@ -// Copyright 2024 RISC Zero, Inc. -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -// This code is automatically generated - -#include "fp.h" -#include "fpext.h" - -#include - -constexpr size_t kInvRate = 4; - -// clang-format off -namespace risc0::circuit::rv32im_v2 { - -FpExt rv32im_v2_12(size_t cycle, size_t steps, FpExt* poly_mix, Fp* arg0, FpExt arg1, FpExt arg2, FpExt arg3, FpExt arg4, FpExt arg5, FpExt arg6, FpExt arg7, FpExt arg8, FpExt* arg9, Fp* arg10, Fp* arg11, Fp* arg12, Fp* arg13); -FpExt rv32im_v2_11(size_t cycle, size_t steps, FpExt* poly_mix, FpExt arg0, Fp* arg1, FpExt arg2, FpExt arg3, FpExt arg4, FpExt arg5, FpExt* arg6, Fp* arg7, Fp* arg8, Fp* arg9, Fp* arg10); -FpExt rv32im_v2_10(size_t cycle, size_t steps, FpExt* poly_mix, Fp* arg0, FpExt arg1, FpExt arg2, FpExt arg3, FpExt arg4, FpExt arg5, FpExt arg6, FpExt arg7, FpExt arg8, FpExt arg9, FpExt arg10, FpExt arg11, FpExt* arg12, FpExt arg13, Fp* arg14, Fp* arg15, Fp* arg16, Fp* arg17); -FpExt rv32im_v2_9(size_t cycle, size_t steps, FpExt* poly_mix, FpExt arg0, Fp* arg1, FpExt arg2, FpExt arg3, FpExt arg4, FpExt arg5, FpExt arg6, FpExt arg7, FpExt arg8, FpExt* arg9, FpExt arg10, Fp* arg11, Fp* arg12, Fp* arg13, Fp* arg14); -FpExt rv32im_v2_8(size_t cycle, size_t steps, FpExt* poly_mix, Fp* arg0, FpExt arg1, FpExt arg2, FpExt arg3, FpExt arg4, FpExt arg5, FpExt arg6, FpExt arg7, FpExt* arg8, FpExt arg9, Fp* arg10, Fp* arg11, Fp* arg12, Fp* arg13); -FpExt rv32im_v2_7(size_t cycle, size_t steps, FpExt* poly_mix, FpExt arg0, FpExt arg1, Fp* arg2, FpExt arg3, FpExt arg4, FpExt arg5, FpExt* arg6, FpExt arg7, Fp* arg8, Fp* arg9, Fp* arg10, Fp* arg11); -FpExt rv32im_v2_6(size_t cycle, size_t steps, FpExt* poly_mix, Fp* arg0, FpExt arg1, FpExt arg2, FpExt* arg3, FpExt arg4, FpExt arg5, FpExt arg6, FpExt arg7, FpExt arg8, Fp* arg9, Fp* arg10, Fp* arg11, Fp* arg12); -FpExt rv32im_v2_5(size_t cycle, size_t steps, FpExt* poly_mix, Fp* arg0, FpExt arg1, FpExt* arg2, FpExt arg3, FpExt arg4, FpExt arg5, FpExt arg6, FpExt arg7, Fp* arg8, Fp* arg9, Fp* arg10); -FpExt rv32im_v2_4(size_t cycle, size_t steps, FpExt* poly_mix, Fp* arg0, FpExt arg1, FpExt* arg2, FpExt arg3, FpExt arg4, FpExt arg5, Fp* arg6, Fp* arg7, Fp* arg8); -FpExt rv32im_v2_3(size_t cycle, size_t steps, FpExt* poly_mix, Fp* arg0, FpExt arg1, FpExt* arg2, FpExt arg3, FpExt arg4, FpExt arg5, FpExt arg6, Fp* arg7, Fp* arg8, Fp* arg9); -FpExt rv32im_v2_2(size_t cycle, size_t steps, FpExt* poly_mix, Fp* arg0, FpExt arg1, FpExt* arg2, FpExt arg3, FpExt arg4, FpExt arg5, FpExt arg6, Fp* arg7, Fp* arg8, Fp* arg9); -FpExt rv32im_v2_1(size_t cycle, size_t steps, FpExt* poly_mix, FpExt* arg0, FpExt arg1, FpExt arg2, FpExt arg3, Fp* arg4, Fp* arg5, Fp* arg6); -FpExt rv32im_v2_0(size_t cycle, size_t steps, FpExt* poly_mix, FpExt* arg0, FpExt arg1, FpExt arg2, FpExt arg3, Fp* arg4, Fp* arg5); -FpExt poly_fp(size_t cycle, size_t steps, FpExt* poly_mix, Fp** args); - -FpExt rv32im_v2_9(size_t cycle, size_t steps, FpExt* poly_mix, FpExt arg0, Fp* arg1, FpExt arg2, FpExt arg3, FpExt arg4, FpExt arg5, FpExt arg6, FpExt arg7, FpExt arg8, FpExt* arg9, FpExt arg10, Fp* arg11, Fp* arg12, Fp* arg13, Fp* arg14) { - size_t mask = steps - 1; - // loc(unknown) - constexpr Fp x0(1073725597); - // loc(unknown) - constexpr Fp x1(1073725596); - // loc(unknown) - constexpr Fp x2(1073725595); - // loc(unknown) - constexpr Fp x3(1073725594); - // loc(unknown) - constexpr Fp x4(1073725593); - // loc(unknown) - constexpr Fp x5(1073725592); - // loc(unknown) - constexpr Fp x6(1073725573); - // loc(unknown) - constexpr Fp x7(1073725572); - // loc(unknown) - constexpr Fp x8(1140850687); - // loc(unknown) - constexpr Fp x9(1140850686); - // loc(unknown) - constexpr Fp x10(1140850685); - // loc(unknown) - constexpr Fp x11(1140850684); - // loc(unknown) - constexpr Fp x12(1140850683); - // loc(unknown) - constexpr Fp x13(1140850682); - // loc(unknown) - constexpr Fp x14(1140850681); - // loc(unknown) - constexpr Fp x15(1140850680); - // loc(unknown) - constexpr Fp x16(7); - // loc(unknown) - constexpr Fp x17(6); - // loc(unknown) - constexpr Fp x18(35); - // loc(unknown) - constexpr Fp x19(65280); - // loc(unknown) - constexpr Fp x20(5); - // loc(unknown) - constexpr Fp x21(256); - // loc(unknown) - constexpr Fp x22(65536); - // loc(unknown) - constexpr Fp x23(0); - // loc(unknown) - constexpr Fp x24(2013265920); - // loc(unknown) - constexpr Fp x25(65535); - // loc(unknown) - constexpr Fp x26(61440); - // loc(unknown) - constexpr Fp x27(64); - // loc(unknown) - constexpr Fp x28(8); - // loc(unknown) - constexpr Fp x29(1024); - // loc(unknown) - constexpr Fp x30(4096); - // loc(unknown) - constexpr Fp x31(16384); - // loc(unknown) - constexpr Fp x32(4); - // loc(unknown) - constexpr Fp x33(16); - // loc(unknown) - constexpr Fp x34(32); - // loc(unknown) - constexpr Fp x35(128); - // loc(unknown) - constexpr Fp x36(512); - // loc(unknown) - constexpr Fp x37(2048); - // loc(unknown) - constexpr Fp x38(8192); - // loc(unknown) - constexpr Fp x39(32768); - // loc(unknown) - constexpr Fp x40(3); - // loc(unknown) - constexpr Fp x41(2); - // loc(unknown) - constexpr Fp x42(1); - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :28:29) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x43 = arg11[43 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x44 = arg11[44 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :45:28) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x45 = arg11[45 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :28:29) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x46 = arg11[46 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x47 = arg11[47 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x48 = arg11[33 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :126:34) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :135:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x49 = arg11[34 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x50 = arg11[35 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :126:34) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :136:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x51 = arg11[36 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :28:29) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x52 = arg11[37 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x53 = arg11[38 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :45:28) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x54 = arg11[39 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :28:29) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x55 = arg11[40 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x56 = arg11[41 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :17:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x57 = arg11[64 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :51:29) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x58 = arg11[42 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :51:29) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x59 = arg11[48 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :16:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x60 = arg11[63 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :34:30) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x61 = arg11[77 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :21:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x62 = arg11[68 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :25:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x63 = arg11[72 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :20:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x64 = arg11[67 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :23:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x65 = arg11[70 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :26:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x66 = arg11[73 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :24:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x67 = arg11[71 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :27:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x68 = arg11[74 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :48:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x69 = arg11[0 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :22:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x70 = arg11[69 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x71 = arg11[75 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :29:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x72 = arg11[76 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x73 = arg11[78 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :28:29) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :65:23) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x74 = arg11[80 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :63:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x75 = arg11[79 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :65:23) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x76 = arg11[81 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :11:20) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x77 = arg11[83 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :8:23) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x78 = arg11[82 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :69:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x79 = arg11[85 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :28:29) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :69:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x80 = arg11[84 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :26:28) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x81 = arg11[86 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :25:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x82 = arg11[87 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x83 = arg11[89 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :27:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x84 = arg11[88 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x85 = arg11[90 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :25:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x86 = arg11[91 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x87 = arg11[93 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x88 = arg11[92 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( CycleArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :55:29) at callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :60:19) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x89 = arg11[95 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :27:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x90 = arg11[98 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :26:28) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x91 = arg11[96 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x92 = arg11[99 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( CycleArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :54:29) at callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :60:19) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x93 = arg11[94 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :25:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x94 = arg11[101 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x95 = arg11[30 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x96 = arg11[28 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x97 = arg11[102 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x98 = arg11[19 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x99 = arg11[29 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x100 = arg11[31 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x101 = arg11[20 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x102 = arg11[27 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x103 = arg11[21 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x104 = arg11[22 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x105 = arg11[23 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x106 = arg11[24 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x107 = arg11[25 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x108 = arg11[26 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :97:30) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x109 = arg11[30 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :54:27) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x110 = arg11[28 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OpLB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :87:27) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :51:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x111 = arg11[102 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x112 = arg11[103 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( CycleArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :54:29) at callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :60:19) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x113 = arg11[104 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( CycleArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :55:29) at callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :60:19) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x114 = arg11[105 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :26:28) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x115 = arg11[107 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x116 = arg11[111 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :34:15) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x117 = arg11[106 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :25:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x118 = arg11[108 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x119 = arg11[114 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( CycleArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :54:29) at callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :60:19) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x120 = arg11[115 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :25:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x121 = arg11[112 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x122 = arg11[113 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( CycleArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :55:29) at callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :60:19) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x123 = arg11[116 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :34:15) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x124 = arg11[117 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x125 = arg11[118 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x126 = arg11[119 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x127 = arg11[121 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x128 = arg11[120 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x129 = arg11[6 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :26:28) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x130 = arg11[52 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :27:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x131 = arg11[54 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU8 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :8:29) at callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :15:16) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :53:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x132 = arg11[55 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU8 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :9:27) at callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :15:16) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :53:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x133 = arg11[56 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x134 = arg11[58 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( CycleArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :54:29) at callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :60:19) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x135 = arg11[60 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x136 = arg11[59 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :15:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x137 = arg11[62 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :18:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x138 = arg11[65 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :19:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x139 = arg11[66 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( CycleArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :55:29) at callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :60:19) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x140 = arg11[61 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :8:23) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x141 = arg11[49 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :11:20) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x142 = arg11[50 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :25:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x143 = arg11[97 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x144 = arg11[100 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :126:34) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :134:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x145 = arg11[32 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :97:30) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x146 = arg11[32 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x147 = arg11[123 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x148 = arg11[124 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x149 = arg11[122 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x150 = arg11[125 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x151 = arg11[127 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x152 = arg11[126 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x153 = arg11[128 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x154 = arg11[130 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x155 = arg11[129 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x156 = arg11[7 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :19:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x157 = arg14[37]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :19:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x158 = arg14[38]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :19:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x159 = arg14[39]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :19:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x160 = arg14[40]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :19:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x161 = arg14[41]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :19:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x162 = arg14[42]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :42:21) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x163 = arg11[51 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :25:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x164 = arg11[57 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :19:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x165 = arg14[43]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :19:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x166 = arg14[44]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :19:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x167 = arg14[45]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :19:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x168 = arg14[46]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :19:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x169 = arg14[47]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :19:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x170 = arg14[48]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :19:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x171 = arg14[49]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :19:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x172 = arg14[50]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :19:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x173 = arg14[51]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :19:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x174 = arg14[52]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :27:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x175 = arg11[109 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x176 = arg11[131 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x177 = arg11[133 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x178 = arg11[135 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x179 = arg11[137 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x180 = arg11[139 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x181 = arg11[141 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x182 = arg11[143 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x183 = arg11[145 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x184 = arg11[147 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x185 = arg11[149 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x186 = arg11[151 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x187 = arg11[153 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x188 = arg11[155 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x189 = arg11[157 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x190 = arg11[159 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x191 = arg11[161 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x192 = arg11[163 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x193 = arg11[165 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x194 = arg11[167 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x195 = arg11[169 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x196 = arg11[172 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x197 = arg11[171 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :40:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x198 = arg14[0]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :40:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x199 = arg14[1]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :40:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x200 = arg14[2]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :40:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x201 = arg14[3]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :40:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x202 = arg14[4]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :40:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x203 = arg14[5]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :25:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x204 = arg11[53 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :40:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x205 = arg14[6]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :40:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x206 = arg14[7]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :40:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x207 = arg14[8]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :40:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x208 = arg14[9]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :25:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x209 = x42 - x43; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :25:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x210 = x43 * x209; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :25:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x211 = arg0 + x210 * poly_mix[32]; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:11) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :26:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x212 = x42 - x44; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:4) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :26:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x213 = x44 * x212; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:23) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :26:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x214 = x41 - x44; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:18) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :26:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x215 = x213 * x214; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:35) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :26:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x216 = x40 - x44; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :26:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x217 = x215 * x216; - // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :26:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x218 = x211 + x217 * poly_mix[33]; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:23) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :27:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x219 = x41 - x45; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :45:28) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x220 = arg1[205]; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:18) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :27:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x221 = x220 * x219; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:35) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :27:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x222 = x40 - x45; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :27:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x223 = x221 * x222; - // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :27:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x224 = x218 + x223 * poly_mix[34]; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:11) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x225 = x42 - x46; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:4) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x226 = x46 * x225; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:23) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x227 = x41 - x46; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:18) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x228 = x226 * x227; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:35) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x229 = x40 - x46; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x230 = x228 * x229; - // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x231 = x224 + x230 * poly_mix[35]; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:11) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :29:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x232 = x42 - x47; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:4) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :29:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x233 = x47 * x232; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:23) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :29:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x234 = x41 - x47; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:18) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :29:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x235 = x233 * x234; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:35) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :29:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x236 = x40 - x47; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :29:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x237 = x235 * x236; - // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :29:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x238 = x231 + x237 * poly_mix[36]; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :37:16) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x239 = x48 * x39; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :38:16) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x240 = x49 * x38; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :37:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x241 = x239 + x240; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :39:16) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x242 = x50 * x37; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :38:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x243 = x241 + x242; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :40:16) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x244 = x51 * x36; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :39:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x245 = x243 + x244; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :41:16) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x246 = x52 * x35; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :40:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x247 = x245 + x246; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :42:16) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x248 = x53 * x34; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :41:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x249 = x247 + x248; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :43:16) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x250 = x54 * x33; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :42:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x251 = x249 + x250; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :44:16) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x252 = x55 * x32; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :43:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x253 = x251 + x252; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :44:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x254 = x253 + x56; - // loc(callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :37:14) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x255 = x57 - x254; - // loc(callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :37:14) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x256 = x238 + x255 * poly_mix[37]; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :46:15) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x257 = x58 * x39; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :47:15) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x258 = x43 * x31; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :46:24) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x259 = x257 + x258; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :48:15) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x260 = x44 * x30; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :47:24) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x261 = x259 + x260; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :49:15) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x262 = x45 * x29; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :48:24) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x263 = x261 + x262; - // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :148:30) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x264 = arg1[206]; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :49:24) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x265 = x263 + x264; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :51:15) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x266 = x47 * x35; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :50:24) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x267 = x265 + x266; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :51:24) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x268 = x267 + x59; - // loc(callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :46:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x269 = x60 - x268; - // loc(callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :46:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x270 = x256 + x269 * poly_mix[38]; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :55:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x271 = x55 * x28; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :55:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x272 = x56 * x41; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :55:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x273 = x271 + x272; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :55:42) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x274 = x273 + x58; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :56:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x275 = x52 * x28; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :56:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x276 = x53 * x41; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :56:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x277 = x275 + x276; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :56:42) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x278 = x277 + x54; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :57:17) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x279 = x45 * x28; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :57:30) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x280 = x46 * x41; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :57:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x281 = x279 + x280; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :57:39) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x282 = x281 + x47; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :58:23) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x283 = x49 * x33; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :58:38) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x284 = x50 * x32; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :58:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x285 = x283 + x284; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :58:47) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x286 = x285 + x51; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :59:20) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x287 = x48 * x27; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :59:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x288 = x287 + x286; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :60:20) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x289 = x43 * x32; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :60:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x290 = x289 + x44; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :66:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x291 = x48 * x26; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :66:45) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x292 = x288 * x34; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :66:36) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x293 = x291 + x292; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :66:53) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x294 = x293 + x278; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :66:63) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x295 = x48 * x25; - // loc(callsite(unknown at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :34:44) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x296 = arg1[23]; - // loc(callsite(unknown at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :34:79) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :11:25) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x297 = x296 + x274; - // loc(callsite( Reg ( :5:7) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :34:15) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :11:25) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x298 = x297 - x61; - // loc(callsite( Reg ( :5:7) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :34:15) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :11:25) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x299 = x270 + x298 * poly_mix[39]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :11:25) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x300 = x62 - x24; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :11:25) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x301 = x299 + x300 * poly_mix[40]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :11:25) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x302 = x63 - x42; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :11:25) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg1[284] = x302; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :11:25) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x303 = x301 + x302 * poly_mix[41]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :11:25) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x304 = x303 + x23 * poly_mix[42]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :11:25) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x305 = x304 + x23 * poly_mix[43]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :11:25) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x306 = x64 - x61; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :11:25) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x307 = x305 + x306 * poly_mix[44]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :11:25) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x308 = x65 - x66; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :11:25) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg1[285] = x308; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :11:25) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x309 = x307 + x308 * poly_mix[45]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :11:25) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x310 = x67 - x68; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :11:25) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg1[286] = x310; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :11:25) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x311 = x309 + x310 * poly_mix[46]; - // loc(callsite(unknown at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :11:25) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x312 = x69 - x70; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :11:25) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x313 = x71 - x42; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :11:25) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x314 = x311 + x313 * poly_mix[47]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :11:25) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x315 = x72 - x312; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :11:25) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x316 = x314 + x315 * poly_mix[48]; - // loc(callsite(unknown at callsite( AddU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :27:21) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :12:35) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x317 = x66 + x294; - // loc(callsite(unknown at callsite( AddU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :27:36) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :12:35) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x318 = x68 + x295; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :12:28) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x319 = x73 - x42; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :12:28) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x320 = x316 + x319 * poly_mix[49]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :24:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x321 = arg1[207]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :45:28) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :12:28) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x322 = x320 + x321 * poly_mix[50]; - // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:12) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :12:28) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x323 = x74 * x22; - // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:23) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :12:28) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x324 = x323 + x75; - // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:10) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :12:28) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x325 = x317 - x324; - // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:10) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :12:28) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x326 = x322 + x325 * poly_mix[51]; - // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :48:14) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :12:28) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x327 = x318 + x74; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :12:28) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x328 = x76 - x42; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :12:28) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x329 = x326 + x328 * poly_mix[52]; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:4) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :27:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x330 = arg1[208]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :51:29) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :12:28) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x331 = x329 + x330 * poly_mix[53]; - // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :12:28) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x332 = x77 * x22; - // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:23) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :12:28) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x333 = x332 + x78; - // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:9) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :12:28) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x334 = x327 - x333; - // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:9) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :12:28) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x335 = x331 + x334 * poly_mix[54]; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:4) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x336 = arg1[209]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :81:31) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :13:36) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x337 = x335 + x336 * poly_mix[55]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x338 = arg1[159]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :82:31) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :13:36) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x339 = x337 + x338 * poly_mix[56]; - // loc(callsite(unknown at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :83:19) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :13:36) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x340 = x79 * x41; - // loc(callsite(unknown at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :83:26) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :13:36) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x341 = x340 + x80; - // loc(callsite(unknown at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :65:31) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x342 = arg1[210]; - // loc(callsite(unknown at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :85:53) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :13:36) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x343 = x342 - x78; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :85:23) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :13:36) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x344 = x81 - x42; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :85:23) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :13:36) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x345 = x339 + x344 * poly_mix[57]; - // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :85:23) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :13:36) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x346 = x82 - x343; - // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :85:23) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :13:36) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x347 = x345 + x346 * poly_mix[58]; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:4) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :63:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x348 = arg1[211]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :87:10) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :13:36) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x349 = x347 + x348 * poly_mix[59]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:4) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :87:10) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :13:36) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x350 = x78 * x83; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:11) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :63:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x351 = arg1[212]; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :87:10) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :13:36) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x352 = x350 - x351; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :87:10) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :13:36) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - arg1[318] = x352; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :87:10) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :13:36) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x353 = x349 + x352 * poly_mix[60]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:4) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :87:10) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :13:36) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x354 = x84 * x78; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:4) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :87:10) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :13:36) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg1[319] = x354; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:17) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :87:10) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :13:36) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x355 = x353 + x354 * poly_mix[61]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:4) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :87:10) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :13:36) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x356 = x84 * x83; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:4) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :87:10) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :13:36) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg1[320] = x356; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:17) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :87:10) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :13:36) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x357 = x355 + x356 * poly_mix[62]; - // loc(callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :87:19) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :13:36) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x358 = x357 + x84 * poly_mix[63]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :89:25) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :13:36) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x359 = x85 - x42; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :89:25) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :13:36) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x360 = x358 + x359 * poly_mix[64]; - // loc(callsite(unknown at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :91:4) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :13:36) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x361 = x86 * x32; - // loc(callsite(unknown at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :91:12) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :13:36) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x362 = x361 + x341; - // loc(callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :91:21) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :13:36) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x363 = x362 - x75; - // loc(callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :91:21) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :13:36) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x364 = x360 + x363 * poly_mix[65]; - // loc(callsite(unknown at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :93:19) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :13:36) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x365 = x78 * x31; - // loc(callsite(unknown at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :93:30) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :13:36) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x366 = x365 + x86; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :14:29) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x367 = x87 - x24; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :14:29) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x368 = x364 + x367 * poly_mix[66]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x369 = arg1[213]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :14:29) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x370 = x368 + x369 * poly_mix[67]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :14:29) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x371 = x370 + x23 * poly_mix[68]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :14:29) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x372 = x371 + x23 * poly_mix[69]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :14:29) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x373 = x88 - x366; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :14:29) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x374 = x372 + x373 * poly_mix[70]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :14:29) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x375 = x89 - x90; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :14:29) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x376 = x374 + x375 * poly_mix[71]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :14:29) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x377 = x91 - x92; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :14:29) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x378 = x376 + x377 * poly_mix[72]; - // loc(callsite(unknown at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :14:29) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x379 = x69 - x93; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x380 = arg1[214]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :14:29) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x381 = x378 + x380 * poly_mix[73]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :14:29) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x382 = x94 - x379; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :14:29) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x383 = x381 + x382 * poly_mix[74]; - // loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :57:19) at callsite( OpLB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :83:18) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :51:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x384 = x59 - x40; - // loc(callsite(unknown at callsite( OpLB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :84:24) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :51:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x385 = x79 * x92; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x386 = arg1[215]; - // loc(callsite(unknown at callsite( OpLB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :84:69) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :51:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x387 = x386 * x90; - // loc(callsite(unknown at callsite( OpLB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :84:42) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :51:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x388 = x385 + x387; - // loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :57:19) at callsite( OpLB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :83:18) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :51:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x389 = arg2 + x384 * poly_mix[0]; - // loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at callsite( OpLB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :83:18) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :51:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x390 = x389 + x290 * poly_mix[1]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x391 = arg1[10]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitWord ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :33:31) at callsite( OpLB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :85:22) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :51:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x392 = x390 + x391 * poly_mix[2]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x393 = arg1[13]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitWord ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :34:31) at callsite( OpLB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :85:22) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :51:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x394 = x392 + x393 * poly_mix[3]; - // loc(callsite(unknown at callsite( SplitWord ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :35:11) at callsite( OpLB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :85:22) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :51:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x395 = x95 * x21; - // loc(callsite(unknown at callsite( SplitWord ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :35:19) at callsite( OpLB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :85:22) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :51:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x396 = x395 + x96; - // loc(callsite( SplitWord ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :35:9) at callsite( OpLB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :85:22) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :51:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x397 = x388 - x396; - // loc(callsite( SplitWord ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :35:9) at callsite( OpLB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :85:22) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :51:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x398 = x394 + x397 * poly_mix[4]; - // loc(callsite(unknown at callsite( OpLB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :86:23) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :51:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x399 = x80 * x95; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:11) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x400 = arg1[216]; - // loc(callsite(unknown at callsite( OpLB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :86:64) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :51:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x401 = x400 * x96; - // loc(callsite(unknown at callsite( OpLB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :86:36) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :51:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x402 = x399 + x401; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OpLB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :87:27) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :51:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x403 = x42 - x97; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OpLB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :87:27) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :51:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x404 = x97 * x403; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OpLB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :87:27) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :51:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x405 = x398 + x404 * poly_mix[5]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :126:34) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :134:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x406 = arg1[146]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( OpLB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :88:25) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :51:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x407 = x405 + x406 * poly_mix[6]; - // loc(callsite(unknown at callsite( OpLB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :89:11) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :51:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x408 = x97 * x35; - // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :127:29) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :134:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x409 = arg1[192]; - // loc(callsite(unknown at callsite( OpLB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :89:21) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :51:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x410 = x408 + x409; - // loc(callsite( OpLB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :89:9) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :51:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x411 = x402 - x410; - // loc(callsite( OpLB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :89:9) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :51:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x412 = x407 + x411 * poly_mix[7]; - // loc(callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :50:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x413 = x383 + x98 * x412 * poly_mix[75]; - // loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at callsite( OpLH ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :94:18) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :52:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x414 = x290 - x42; - // loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at callsite( OpLH ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :94:18) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :52:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x415 = x389 + x414 * poly_mix[1]; - // loc(callsite( OpLH ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :95:20) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :52:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x416 = x415 + x80 * poly_mix[2]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OpLH ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :97:27) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :52:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x417 = x416 + x404 * poly_mix[3]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( OpLH ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :98:26) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :52:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x418 = x417 + x391 * poly_mix[4]; - // loc(callsite(unknown at callsite( OpLH ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :99:12) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :52:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x419 = x97 * x39; - // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :120:30) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x420 = arg1[217]; - // loc(callsite(unknown at callsite( OpLH ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :99:22) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :52:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x421 = x419 + x420; - // loc(callsite( OpLH ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :99:10) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :52:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x422 = x388 - x421; - // loc(callsite( OpLH ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :99:10) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :52:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x423 = x418 + x422 * poly_mix[5]; - // loc(callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :50:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x424 = x423 + x99 * poly_mix[6]; - // loc(callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :50:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x425 = x424 + x100 * poly_mix[7]; - // loc(callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :50:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x426 = x413 + x101 * x425 * poly_mix[83]; - // loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at callsite( OpLW ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :104:18) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :53:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x427 = x290 - x41; - // loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at callsite( OpLW ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :104:18) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :53:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x428 = x389 + x427 * poly_mix[1]; - // loc(callsite( OpLW ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :105:20) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :53:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x429 = x428 + x80 * poly_mix[2]; - // loc(callsite( OpLW ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :106:20) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :53:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x430 = x429 + x79 * poly_mix[3]; - // loc(callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :50:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x431 = x430 + x102 * poly_mix[4]; - // loc(callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :50:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x432 = x431 + x99 * poly_mix[5]; - // loc(callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :50:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x433 = x432 + x100 * poly_mix[6]; - // loc(callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :50:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x434 = x426 + x103 * x433 * poly_mix[91]; - // loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at callsite( OpLBU ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :111:18) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :54:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x435 = x290 - x32; - // loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at callsite( OpLBU ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :111:18) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :54:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x436 = x389 + x435 * poly_mix[1]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitWord ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :33:31) at callsite( OpLBU ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :113:22) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :54:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x437 = x436 + x391 * poly_mix[2]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitWord ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :34:31) at callsite( OpLBU ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :113:22) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :54:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x438 = x437 + x393 * poly_mix[3]; - // loc(callsite( SplitWord ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :35:9) at callsite( OpLBU ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :113:22) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :54:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x439 = x438 + x397 * poly_mix[4]; - // loc(callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :50:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x440 = x439 + x100 * poly_mix[5]; - // loc(callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :50:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x441 = x434 + x104 * x440 * poly_mix[98]; - // loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at callsite( OpLHU ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :119:18) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :55:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x442 = x290 - x20; - // loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at callsite( OpLHU ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :119:18) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :55:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x443 = x389 + x442 * poly_mix[1]; - // loc(callsite( OpLHU ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :120:20) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :55:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x444 = x443 + x80 * poly_mix[2]; - // loc(callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :50:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x445 = x444 + x102 * poly_mix[3]; - // loc(callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :50:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x446 = x445 + x99 * poly_mix[4]; - // loc(callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :50:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x447 = x446 + x100 * poly_mix[5]; - // loc(callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :50:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x448 = x441 + x105 * x447 * poly_mix[104]; - // loc(callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :50:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x449 = x448 + x106 * arg3 * poly_mix[110]; - // loc(callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :50:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x450 = x449 + x107 * arg3 * poly_mix[114]; - // loc(callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :50:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x451 = x450 + x108 * arg3 * poly_mix[118]; - // loc(callsite(unknown at callsite( OpLB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :86:23) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :51:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x452 = x80 * x109; - // loc(callsite(unknown at callsite( OpLB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :86:64) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :51:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x453 = x400 * x110; - // loc(callsite(unknown at callsite( OpLB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :86:36) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :51:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x454 = x452 + x453; - // loc(callsite(unknown at callsite( OpLB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :90:18) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :51:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x455 = x111 * x19; - // loc(callsite(unknown at callsite( OpLB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :90:11) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :51:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x456 = x454 + x455; - // loc(callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :50:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x457 = x456 * x98; - // loc(callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :50:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x458 = x388 * x101; - // loc(callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :50:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x459 = x90 * x103; - // loc(callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :50:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x460 = x454 * x104; - // loc(callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :50:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x461 = x388 * x105; - // loc(callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :50:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x462 = x457 + x458; - // loc(callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :50:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x463 = x462 + x459; - // loc(callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :50:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x464 = x463 + x460; - // loc(callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :50:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x465 = x464 + x461; - // loc(callsite(unknown at callsite( OpLB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :90:36) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :51:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x466 = x111 * x25; - // loc(callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :50:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x467 = x466 * x98; - // loc(callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :50:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x468 = x466 * x101; - // loc(callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :50:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x469 = x92 * x103; - // loc(callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :50:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x470 = x467 + x468; - // loc(callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :50:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x471 = x470 + x469; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :60:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x472 = x42 - x112; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :60:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x473 = x112 * x472; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :60:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x474 = x451 + x473 * poly_mix[122]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:4) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :60:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x475 = x282 * x113; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :60:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x476 = x475 - x472; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :60:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x477 = x474 + x476 * poly_mix[123]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:4) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :60:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x478 = x112 * x282; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:17) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :60:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x479 = x477 + x478 * poly_mix[124]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:4) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :60:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x480 = x112 * x113; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:17) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :60:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x481 = x479 + x480 * poly_mix[125]; - // loc(callsite(unknown at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :41:11) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :60:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x482 = x472 * x282; - // loc(callsite(unknown at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :42:90) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :60:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x483 = x42 - x472; - // loc(callsite(unknown at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :42:102) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :60:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x484 = x483 * x27; - // loc(callsite(unknown at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :42:85) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :60:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x485 = x296 + x484; - // loc(callsite(unknown at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :42:106) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :60:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x486 = x485 + x482; - // loc(callsite( Reg ( :5:7) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :42:21) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :60:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x487 = x486 - x114; - // loc(callsite( Reg ( :5:7) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :42:21) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :60:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x488 = x481 + x487 * poly_mix[126]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :60:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x489 = x115 - x24; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :60:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x490 = x488 + x489 * poly_mix[127]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :60:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x491 = x116 - x42; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :60:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - arg1[260] = x491; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :60:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x492 = x490 + x491 * poly_mix[128]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :60:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x493 = x492 + x23 * poly_mix[129]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :60:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x494 = x493 + x23 * poly_mix[130]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :60:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x495 = x117 - x114; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :60:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x496 = x494 + x495 * poly_mix[131]; - // loc(callsite(unknown at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:22) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :60:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x497 = x69 - x118; - // loc(callsite(unknown at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:22) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :60:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg1[337] = x497; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :60:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x498 = x119 - x42; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :60:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x499 = x496 + x498 * poly_mix[132]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :60:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x500 = x120 - x497; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :60:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x501 = x499 + x500 * poly_mix[133]; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :60:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x502 = x121 - x465; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :60:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x503 = x501 + x502 * poly_mix[134]; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :60:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x504 = x122 - x471; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :60:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x505 = x503 + x504 * poly_mix[135]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :61:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x506 = x123 - x42; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :61:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x507 = x505 + x506 * poly_mix[136]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x508 = arg1[11]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :45:28) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :61:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x509 = x507 + x508 * poly_mix[137]; - // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:12) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x510 = arg1[218]; - // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:23) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :61:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x511 = x510 + x124; - // loc(callsite(unknown at callsite( AddU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :27:21) at callsite( SimpleOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :74:20) at callsite( OpADD ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :87:12) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :31:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x512 = arg1[100]; - // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:10) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :61:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x513 = x512 - x511; - // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:10) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :61:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x514 = x509 + x513 * poly_mix[138]; - // loc(callsite(unknown at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :53:34) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x515 = arg1[102]; - // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :48:14) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :61:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x516 = x515 + x125; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :61:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x517 = x126 - x42; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :61:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - arg1[338] = x517; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :61:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x518 = x514 + x517 * poly_mix[139]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x519 = arg1[3]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :51:29) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :61:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x520 = x518 + x519 * poly_mix[140]; - // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:11) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :61:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x521 = x127 * x22; - // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:23) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :61:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x522 = x521 + x128; - // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:23) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :61:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - arg1[339] = x522; - // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:9) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :61:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x523 = x516 - x522; - // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:9) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :61:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x524 = x520 + x523 * poly_mix[141]; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - FpExt x525 = arg4 + x129 * x524 * poly_mix[390]; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:11) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :63:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x526 = x42 - x130; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:4) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :63:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x527 = x130 * x526; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:23) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :63:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x528 = x41 - x130; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:18) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :63:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x529 = x527 * x528; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:35) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :63:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x530 = x40 - x130; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :63:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x531 = x529 * x530; - // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :63:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x532 = arg5 + x531 * poly_mix[2]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :52:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x533 = arg1[171]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :65:23) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x534 = x532 + x533 * poly_mix[3]; - // loc(callsite(unknown at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :65:53) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x535 = arg1[120]; - // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :65:23) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x536 = x131 - x535; - // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :65:23) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x537 = x534 + x536 * poly_mix[4]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x538 = x42 - x132; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x539 = x132 * x538; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x540 = x537 + x539 * poly_mix[5]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:4) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x541 = x515 * x133; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x542 = x541 - x538; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x543 = x540 + x542 * poly_mix[6]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:4) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x544 = x132 * x515; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:17) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x545 = x543 + x544 * poly_mix[7]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:4) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x546 = x132 * x133; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:17) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x547 = x545 + x546 * poly_mix[8]; - // loc(callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:19) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x548 = x547 + x132 * poly_mix[9]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x549 = arg1[145]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :69:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x550 = x548 + x549 * poly_mix[10]; - // loc(callsite(unknown at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :71:4) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x551 = x134 * x32; - // loc(callsite(unknown at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :71:12) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x552 = x551 + x130; - // loc(callsite(unknown at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :52:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x553 = arg1[99]; - // loc(callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :71:21) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x554 = x552 - x553; - // loc(callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :71:21) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x555 = x550 + x554 * poly_mix[11]; - // loc(callsite(unknown at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :73:12) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x556 = arg1[121]; - // loc(callsite(unknown at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :73:23) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x557 = x556 + x134; - // loc(callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :26:17) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x558 = x555 + x130 * poly_mix[12]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x559 = x135 - x24; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x560 = x558 + x559 * poly_mix[13]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x561 = x57 - x42; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg1[278] = x561; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x562 = x560 + x561 * poly_mix[14]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x563 = x562 + x23 * poly_mix[15]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x564 = x563 + x23 * poly_mix[16]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x565 = x136 - x557; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x566 = x564 + x565 * poly_mix[17]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x567 = x137 - x138; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg1[279] = x567; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x568 = x566 + x567 * poly_mix[18]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x569 = x60 - x139; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg1[280] = x569; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x570 = x568 + x569 * poly_mix[19]; - // loc(callsite(unknown at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x571 = x69 - x140; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x572 = arg1[219]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x573 = x570 + x572 * poly_mix[20]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x574 = x62 - x571; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x575 = x573 + x574 * poly_mix[21]; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:4) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :17:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x576 = arg1[220]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :15:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x577 = x575 + x576 * poly_mix[22]; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :18:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x578 = arg1[221]; - // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :16:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x579 = x577 + x578 * poly_mix[23]; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :19:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x580 = arg1[222]; - // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :17:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x581 = x579 + x580 * poly_mix[24]; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :20:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x582 = arg1[223]; - // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :18:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x583 = x581 + x582 * poly_mix[25]; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:23) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :19:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x584 = x41 - x54; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :45:28) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x585 = arg1[203]; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:18) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :19:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x586 = x585 * x584; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:35) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :19:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x587 = x40 - x54; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :19:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x588 = x586 * x587; - // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :19:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x589 = x583 + x588 * poly_mix[26]; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :22:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x590 = arg1[224]; - // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :20:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x591 = x589 + x590 * poly_mix[27]; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:4) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :23:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x592 = arg1[225]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :21:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x593 = x591 + x592 * poly_mix[28]; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:23) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :22:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x594 = x41 - x58; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :51:29) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x595 = arg1[204]; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:18) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :22:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x596 = x595 * x594; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:35) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :22:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x597 = x40 - x58; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :22:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x598 = x596 * x597; - // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :22:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x599 = x593 + x598 * poly_mix[29]; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:23) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :23:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x600 = x41 - x43; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:18) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :23:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x601 = x210 * x600; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:35) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :23:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x602 = x40 - x43; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :23:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x603 = x601 * x602; - // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :23:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x604 = x599 + x603 * poly_mix[30]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :24:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x605 = x604 + x213 * poly_mix[31]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :25:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x606 = x605 + x220 * poly_mix[32]; - // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :26:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x607 = x606 + x230 * poly_mix[33]; - // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :27:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x608 = x607 + x237 * poly_mix[34]; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:23) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x609 = x41 - x59; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :51:29) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x610 = arg1[226]; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:18) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x611 = x610 * x609; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:35) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x612 = x40 - x59; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x613 = x611 * x612; - // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x614 = x608 + x613 * poly_mix[35]; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:23) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :29:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x615 = x41 - x141; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x616 = arg1[227]; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:18) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :29:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x617 = x616 * x615; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:35) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :29:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x618 = x40 - x141; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :29:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x619 = x617 * x618; - // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :29:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x620 = x614 + x619 * poly_mix[36]; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :37:16) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x621 = x50 * x39; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :38:16) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x622 = x51 * x38; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :37:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x623 = x621 + x622; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :39:16) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x624 = x52 * x37; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :38:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x625 = x623 + x624; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :40:16) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x626 = x53 * x36; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :39:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x627 = x625 + x626; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :41:16) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x628 = x54 * x35; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :40:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x629 = x627 + x628; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :42:16) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x630 = x55 * x34; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :41:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x631 = x629 + x630; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :43:16) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x632 = x56 * x33; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :42:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x633 = x631 + x632; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :44:16) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x634 = x58 * x32; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :43:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x635 = x633 + x634; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :44:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x636 = x635 + x43; - // loc(callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :37:14) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x637 = x139 - x636; - // loc(callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :37:14) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x638 = x620 + x637 * poly_mix[37]; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :46:15) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x639 = x44 * x39; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :47:15) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x640 = x45 * x31; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :46:24) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x641 = x639 + x640; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :48:15) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x642 = x46 * x30; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :47:24) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x643 = x641 + x642; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :49:15) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x644 = x47 * x29; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :48:24) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x645 = x643 + x644; - // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :62:17) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x646 = arg1[228]; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :49:24) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x647 = x645 + x646; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :51:15) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x648 = x141 * x35; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :50:24) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x649 = x647 + x648; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :51:24) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x650 = x649 + x142; - // loc(callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :46:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x651 = x138 - x650; - // loc(callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :46:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x652 = x638 + x651 * poly_mix[38]; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :55:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x653 = x58 * x28; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :55:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x654 = x43 * x41; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :55:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x655 = x653 + x654; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :55:42) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x656 = x655 + x44; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :56:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x657 = x54 * x28; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :56:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x658 = x55 * x41; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :56:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x659 = x657 + x658; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :56:42) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x660 = x659 + x56; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :57:17) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x661 = x47 * x28; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :57:30) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x662 = x59 * x41; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :57:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x663 = x661 + x662; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :57:39) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x664 = x663 + x141; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :58:23) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x665 = x51 * x33; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :58:38) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x666 = x52 * x32; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :58:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x667 = x665 + x666; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :58:47) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x668 = x667 + x53; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :59:20) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x669 = x50 * x27; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :59:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x670 = x669 + x668; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :60:20) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x671 = x45 * x32; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :60:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x672 = x671 + x46; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :67:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x673 = x50 * x26; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :67:45) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x674 = x670 * x34; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :67:36) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x675 = x673 + x674; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :67:53) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x676 = x675 + x664; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :67:62) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x677 = x50 * x25; - // loc(callsite(unknown at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :34:79) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :21:25) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x678 = x296 + x656; - // loc(callsite( Reg ( :5:7) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :34:15) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :21:25) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x679 = x678 - x75; - // loc(callsite( Reg ( :5:7) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :34:15) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :21:25) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x680 = x652 + x679 * poly_mix[39]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :21:25) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x681 = x65 - x24; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :21:25) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x682 = x680 + x681 * poly_mix[40]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :21:25) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x683 = x68 - x42; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :21:25) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x684 = x682 + x683 * poly_mix[41]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :21:25) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x685 = x684 + x23 * poly_mix[42]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :21:25) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x686 = x685 + x23 * poly_mix[43]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :21:25) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x687 = x70 - x75; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :21:25) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x688 = x686 + x687 * poly_mix[44]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :21:25) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x689 = x63 - x71; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :21:25) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x690 = x688 + x689 * poly_mix[45]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :21:25) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x691 = x66 - x72; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :21:25) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x692 = x690 + x691 * poly_mix[46]; - // loc(callsite(unknown at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :21:25) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x693 = x69 - x67; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :21:25) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x694 = x61 - x42; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :21:25) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x695 = x692 + x694 * poly_mix[47]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :21:25) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x696 = x73 - x693; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :21:25) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x697 = x695 + x696 * poly_mix[48]; - // loc(callsite(unknown at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :34:79) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :22:25) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x698 = x296 + x660; - // loc(callsite( Reg ( :5:7) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :34:15) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :22:25) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x699 = x698 - x85; - // loc(callsite( Reg ( :5:7) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :34:15) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :22:25) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x700 = x697 + x699 * poly_mix[49]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :22:25) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x701 = x76 - x24; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :22:25) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x702 = x700 + x701 * poly_mix[50]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :22:25) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x703 = x79 - x42; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :22:25) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x704 = x702 + x703 * poly_mix[51]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :22:25) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x705 = x704 + x23 * poly_mix[52]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :22:25) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x706 = x705 + x23 * poly_mix[53]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :22:25) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x707 = x74 - x85; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :22:25) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x708 = x706 + x707 * poly_mix[54]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :22:25) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x709 = x77 - x81; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :22:25) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x710 = x708 + x709 * poly_mix[55]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :22:25) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x711 = x80 - x82; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :22:25) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x712 = x710 + x711 * poly_mix[56]; - // loc(callsite(unknown at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :22:25) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x713 = x69 - x78; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :22:25) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x714 = x84 - x42; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :22:25) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg1[247] = x714; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :22:25) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x715 = x712 + x714 * poly_mix[57]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :22:25) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x716 = x83 - x713; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :22:25) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x717 = x715 + x716 * poly_mix[58]; - // loc(callsite(unknown at callsite( AddU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :27:21) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :23:35) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x718 = x71 + x676; - // loc(callsite(unknown at callsite( AddU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :27:36) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :23:35) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x719 = x72 + x677; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x720 = arg1[229]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :23:28) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x721 = x717 + x720 * poly_mix[59]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :45:28) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :23:28) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x722 = x42 - x87; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :45:28) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :23:28) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x723 = x87 * x722; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :45:28) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :23:28) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg1[321] = x723; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :45:28) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :23:28) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x724 = x721 + x723 * poly_mix[60]; - // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:12) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :23:28) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x725 = x87 * x22; - // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:23) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :23:28) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x726 = x725 + x88; - // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:10) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :23:28) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x727 = x718 - x726; - // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:10) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :23:28) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x728 = x724 + x727 * poly_mix[61]; - // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :48:14) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :23:28) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x729 = x719 + x87; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x730 = arg1[122]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :23:28) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x731 = x728 + x730 * poly_mix[62]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :51:29) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :23:28) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x732 = x42 - x91; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :51:29) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :23:28) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x733 = x91 * x732; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :51:29) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :23:28) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg1[322] = x733; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :51:29) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :23:28) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x734 = x731 + x733 * poly_mix[63]; - // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :23:28) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x735 = x91 * x22; - // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:23) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :23:28) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x736 = x735 + x89; - // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:9) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :23:28) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x737 = x729 - x736; - // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:9) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :23:28) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x738 = x734 + x737 * poly_mix[64]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :81:31) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :24:36) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x739 = x42 - x143; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :81:31) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :24:36) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg1[324] = x739; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :81:31) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :24:36) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x740 = x143 * x739; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :81:31) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :24:36) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - arg1[323] = x740; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :81:31) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :24:36) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x741 = x738 + x740 * poly_mix[65]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :82:31) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :24:36) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x742 = x42 - x90; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :82:31) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :24:36) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x743 = x90 * x742; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :82:31) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :24:36) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x744 = x741 + x743 * poly_mix[66]; - // loc(callsite(unknown at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :83:19) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :24:36) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x745 = x90 * x41; - // loc(callsite(unknown at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :83:19) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :24:36) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - arg1[534] = x745; - // loc(callsite(unknown at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :83:26) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :24:36) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x746 = x745 + x143; - // loc(callsite(unknown at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :85:53) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :24:36) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x747 = x342 - x89; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :85:23) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :24:36) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x748 = x92 - x42; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :85:23) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :24:36) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg1[281] = x748; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :85:23) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :24:36) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x749 = x744 + x748 * poly_mix[67]; - // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :85:23) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :24:36) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x750 = x144 - x747; - // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :85:23) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :24:36) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x751 = x749 + x750 * poly_mix[68]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :87:10) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :24:36) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x752 = x42 - x94; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :87:10) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :24:36) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x753 = x94 * x752; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :87:10) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :24:36) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x754 = x751 + x753 * poly_mix[69]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:4) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :87:10) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :24:36) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x755 = x89 * x97; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :87:10) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :24:36) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x756 = x755 - x752; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :87:10) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :24:36) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x757 = x754 + x756 * poly_mix[70]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:4) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :87:10) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :24:36) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x758 = x94 * x89; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:17) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :87:10) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :24:36) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x759 = x757 + x758 * poly_mix[71]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:4) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :87:10) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :24:36) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x760 = x94 * x97; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:17) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :87:10) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :24:36) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x761 = x759 + x760 * poly_mix[72]; - // loc(callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :87:19) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :24:36) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x762 = x761 + x94 * poly_mix[73]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x763 = arg1[230]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :89:25) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :24:36) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x764 = x762 + x763 * poly_mix[74]; - // loc(callsite(unknown at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :91:4) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :24:36) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x765 = x113 * x32; - // loc(callsite(unknown at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :91:12) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :24:36) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x766 = x765 + x746; - // loc(callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :91:21) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :24:36) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x767 = x766 - x88; - // loc(callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :91:21) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :24:36) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x768 = x764 + x767 * poly_mix[75]; - // loc(callsite(unknown at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :93:19) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :24:36) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x769 = x89 * x31; - // loc(callsite(unknown at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :93:30) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :24:36) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x770 = x769 + x113; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :11:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x771 = arg1[231]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :25:29) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x772 = x768 + x771 * poly_mix[76]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :11:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x773 = arg1[232]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :25:29) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x774 = x772 + x773 * poly_mix[77]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :25:29) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x775 = x774 + x23 * poly_mix[78]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :25:29) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x776 = x775 + x23 * poly_mix[79]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :25:29) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x777 = x114 - x770; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :25:29) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x778 = x776 + x777 * poly_mix[80]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :11:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x779 = arg1[233]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :25:29) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x780 = x778 + x779 * poly_mix[81]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :11:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x781 = arg1[234]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :25:29) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x782 = x780 + x781 * poly_mix[82]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :11:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x783 = arg1[235]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :25:29) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x784 = x782 + x783 * poly_mix[83]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :11:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x785 = arg1[236]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :25:29) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x786 = x784 + x785 * poly_mix[84]; - // loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :57:19) at callsite( OpSB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :126:18) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :68:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x787 = x142 - x18; - // loc(callsite(unknown at callsite( OpSB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :127:24) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :68:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x788 = x90 * x121; - // loc(callsite(unknown at callsite( OpSB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :127:69) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :68:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x789 = x742 * x116; - // loc(callsite(unknown at callsite( OpSB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :127:42) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :68:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x790 = x788 + x789; - // loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :57:19) at callsite( OpSB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :126:18) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :68:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x791 = arg2 + x787 * poly_mix[0]; - // loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at callsite( OpSB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :126:18) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :68:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x792 = x791 + x672 * poly_mix[1]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitWord ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :33:31) at callsite( OpSB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :128:27) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :68:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x793 = x792 + x391 * poly_mix[2]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitWord ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :34:31) at callsite( OpSB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :128:27) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :68:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x794 = x793 + x393 * poly_mix[3]; - // loc(callsite( SplitWord ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :35:9) at callsite( OpSB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :128:27) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :68:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x795 = x790 - x396; - // loc(callsite( SplitWord ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :35:9) at callsite( OpSB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :128:27) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :68:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x796 = x794 + x795 * poly_mix[4]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitWord ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :33:31) at callsite( OpSB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :129:26) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :68:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x797 = x796 + x406 * poly_mix[5]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :126:34) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :135:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x798 = arg1[147]; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitWord ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :34:31) at callsite( OpSB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :129:26) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :68:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x799 = x797 + x798 * poly_mix[6]; - // loc(callsite(unknown at callsite( SplitWord ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :35:11) at callsite( OpSB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :129:26) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :68:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x800 = x49 * x21; - // loc(callsite(unknown at callsite( SplitWord ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :35:19) at callsite( OpSB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :129:26) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :68:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x801 = x800 + x145; - // loc(callsite( SplitWord ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :35:9) at callsite( OpSB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :129:26) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :68:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x802 = x81 - x801; - // loc(callsite( SplitWord ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :35:9) at callsite( OpSB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :129:26) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :68:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x803 = x799 + x802 * poly_mix[7]; - // loc(callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :67:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x804 = x786 + x98 * x803 * poly_mix[85]; - // loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at callsite( OpSH ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :144:18) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :69:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x805 = x672 - x42; - // loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at callsite( OpSH ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :144:18) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :69:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x806 = x791 + x805 * poly_mix[1]; - // loc(callsite( OpSH ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :145:20) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :69:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x807 = x806 + x143 * poly_mix[2]; - // loc(callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :67:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x808 = x807 + x102 * poly_mix[3]; - // loc(callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :67:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x809 = x808 + x99 * poly_mix[4]; - // loc(callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :67:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x810 = x809 + x100 * poly_mix[5]; - // loc(callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :67:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x811 = x810 + x48 * poly_mix[6]; - // loc(callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :67:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x812 = x804 + x101 * x811 * poly_mix[93]; - // loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at callsite( OpSW ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :156:18) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :70:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x813 = x672 - x41; - // loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at callsite( OpSW ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :156:18) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :70:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x814 = x791 + x813 * poly_mix[1]; - // loc(callsite( OpSW ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :157:20) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :70:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x815 = x814 + x143 * poly_mix[2]; - // loc(callsite( OpSW ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :158:20) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :70:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x816 = x815 + x90 * poly_mix[3]; - // loc(callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :67:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x817 = x816 + x102 * poly_mix[4]; - // loc(callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :67:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x818 = x817 + x99 * poly_mix[5]; - // loc(callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :67:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x819 = x818 + x100 * poly_mix[6]; - // loc(callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :67:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x820 = x819 + x48 * poly_mix[7]; - // loc(callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :67:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x821 = x812 + x103 * x820 * poly_mix[100]; - // loc(callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :67:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x822 = x821 + x104 * arg6 * poly_mix[108]; - // loc(callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :67:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x823 = x822 + x105 * arg6 * poly_mix[113]; - // loc(callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :67:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x824 = x823 + x106 * arg6 * poly_mix[118]; - // loc(callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :67:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x825 = x824 + x107 * arg6 * poly_mix[123]; - // loc(callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :67:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x826 = x825 + x108 * arg6 * poly_mix[128]; - // loc(callsite(unknown at callsite( OpSB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :134:6) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :68:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x827 = x143 * x110; - // loc(callsite(unknown at callsite( OpSB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :134:37) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :68:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x828 = x739 * x146; - // loc(callsite(unknown at callsite( OpSB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :134:22) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :68:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x829 = x827 + x828; - // loc(callsite(unknown at callsite( OpSB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :135:20) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :68:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x830 = x739 * x109; - // loc(callsite(unknown at callsite( OpSB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :135:44) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :68:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x831 = x143 * x146; - // loc(callsite(unknown at callsite( OpSB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :135:35) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :68:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x832 = x830 + x831; - // loc(callsite(unknown at callsite( OpSB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :135:6) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :68:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x833 = x832 * x21; - // loc(callsite(unknown at callsite( OpSB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :134:41) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :68:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x834 = x829 + x833; - // loc(callsite(unknown at callsite( OpSB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :138:6) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :68:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x835 = x90 * x116; - // loc(callsite(unknown at callsite( OpSB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :138:28) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :68:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x836 = x742 * x834; - // loc(callsite(unknown at callsite( OpSB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :138:15) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :68:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x837 = x835 + x836; - // loc(callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :67:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x838 = x837 * x98; - // loc(callsite(unknown at callsite( OpSH ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :150:28) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :69:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x839 = x742 * x81; - // loc(callsite(unknown at callsite( OpSH ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :150:15) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :69:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x840 = x835 + x839; - // loc(callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :67:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x841 = x840 * x101; - // loc(callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :67:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x842 = x81 * x103; - // loc(callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :67:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x843 = x838 + x841; - // loc(callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :67:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x844 = x843 + x842; - // loc(callsite(unknown at callsite( OpSB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :139:13) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :68:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x845 = x742 * x121; - // loc(callsite(unknown at callsite( OpSB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :139:28) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :68:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x846 = x90 * x834; - // loc(callsite(unknown at callsite( OpSB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :139:21) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :68:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x847 = x845 + x846; - // loc(callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :67:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x848 = x847 * x98; - // loc(callsite(unknown at callsite( OpSH ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :151:28) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :69:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x849 = x90 * x81; - // loc(callsite(unknown at callsite( OpSH ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :151:21) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :69:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x850 = x845 + x849; - // loc(callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :67:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x851 = x850 * x101; - // loc(callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :67:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x852 = x82 * x103; - // loc(callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :67:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x853 = x848 + x851; - // loc(callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :67:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x854 = x853 + x852; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( MemStoreFinalize ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :29:15) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :77:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x855 = x123 - x24; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( MemStoreFinalize ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :29:15) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :77:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x856 = x826 + x855 * poly_mix[133]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( MemStoreFinalize ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :29:15) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :77:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x857 = x128 - x42; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( MemStoreFinalize ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :29:15) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :77:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x858 = x856 + x857 * poly_mix[134]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( MemStoreFinalize ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :29:15) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :77:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x859 = x858 + x23 * poly_mix[135]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( MemStoreFinalize ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :29:15) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :77:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x860 = x859 + x23 * poly_mix[136]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( MemStoreFinalize ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :29:15) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :77:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x861 = x120 - x770; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( MemStoreFinalize ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :29:15) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :77:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x862 = x860 + x861 * poly_mix[137]; - // loc(callsite(unknown at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:22) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( MemStoreFinalize ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :29:15) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :77:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x863 = x69 - x124; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( MemStoreFinalize ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :29:15) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :77:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x864 = x147 - x42; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( MemStoreFinalize ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :29:15) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :77:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x865 = x862 + x864 * poly_mix[138]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( MemStoreFinalize ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :29:15) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :77:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x866 = x148 - x863; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( MemStoreFinalize ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :29:15) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :77:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x867 = x865 + x866 * poly_mix[139]; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( MemStoreFinalize ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :29:15) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :77:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x868 = x127 - x844; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( MemStoreFinalize ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :29:15) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :77:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x869 = x867 + x868 * poly_mix[140]; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( MemStoreFinalize ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :29:15) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :77:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x870 = x149 - x854; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( MemStoreFinalize ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :29:15) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :77:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x871 = x869 + x870 * poly_mix[141]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :78:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x872 = x150 - x42; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :78:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x873 = x871 + x872 * poly_mix[142]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x874 = arg1[33]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :45:28) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :78:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x875 = x873 + x874 * poly_mix[143]; - // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:12) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :78:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x876 = x151 * x22; - // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:23) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :78:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x877 = x876 + x152; - // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:10) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :78:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x878 = x512 - x877; - // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:10) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :78:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x879 = x875 + x878 * poly_mix[144]; - // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :48:14) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :78:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x880 = x515 + x151; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :78:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x881 = x153 - x42; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :78:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x882 = x879 + x881 * poly_mix[145]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x883 = arg1[36]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :51:29) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :78:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x884 = x882 + x883 * poly_mix[146]; - // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:11) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :78:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x885 = x154 * x22; - // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:23) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :78:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x886 = x885 + x155; - // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:9) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :78:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x887 = x880 - x886; - // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:9) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :78:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x888 = x884 + x887 * poly_mix[147]; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - FpExt x889 = x525 + x156 * x888 * poly_mix[391]; - // loc(callsite(unknown at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :56:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x890 = arg1[237]; - // loc(callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :31:13) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x891 = x890 - x42; - // loc(callsite(unknown at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :33:31) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x892 = x553 + x515; - // loc(callsite(unknown at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :33:31) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - arg1[272] = x892; - // loc(callsite(unknown at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :58:61) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x893 = arg1[238]; - // loc(callsite( ControlMRET ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :74:15) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :180:17) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x894 = x893 - x42; - // loc(callsite( ControlMRET ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :74:15) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :180:17) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - arg1[270] = x894; - // loc(callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :81:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x895 = x890 - x32; - // loc(callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :81:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - arg1[271] = x895; - // loc(callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :121:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x896 = x890 - x20; - // loc(callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :121:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - arg1[293] = x896; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :131:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x897 = x890 - x17; - // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :131:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - arg1[302] = x897; - // loc(callsite( ControlDone ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :167:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :184:17) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x898 = x890 - x16; - // loc(callsite( ControlDone ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :167:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :184:17) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - arg1[304] = x898; - // loc(callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :20:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x899 = arg2 + x890 * poly_mix[0]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x900 = x102 - x24; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - arg1[250] = x900; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x901 = x899 + x900 * poly_mix[1]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x902 = x145 - x42; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - arg1[251] = x902; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x903 = x901 + x902 * poly_mix[2]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x904 = x903 + x23 * poly_mix[3]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x905 = x904 + x23 * poly_mix[4]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x906 = x96 - x15; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - arg1[294] = x906; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x907 = x905 + x906 * poly_mix[5]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x908 = x95 - x48; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - arg1[252] = x908; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x909 = x907 + x908 * poly_mix[6]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x910 = x100 - x49; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - arg1[253] = x910; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x911 = x909 + x910 * poly_mix[7]; - // loc(callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :24:28) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x912 = x157 - x48; - // loc(callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :24:28) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x913 = x911 + x912 * poly_mix[8]; - // loc(callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :25:29) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x914 = x158 - x49; - // loc(callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :25:29) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x915 = x913 + x914 * poly_mix[9]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x916 = x50 - x24; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - arg1[256] = x916; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x917 = x915 + x916 * poly_mix[10]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x918 = arg1[239]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x919 = x917 + x918 * poly_mix[11]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x920 = x919 + x23 * poly_mix[12]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x921 = x920 + x23 * poly_mix[13]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x922 = x51 - x14; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - arg1[295] = x922; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x923 = x921 + x922 * poly_mix[14]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x924 = x53 - x56; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - arg1[257] = x924; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x925 = x923 + x924 * poly_mix[15]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x926 = x54 - x58; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - arg1[258] = x926; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x927 = x925 + x926 * poly_mix[16]; - // loc(callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :24:28) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x928 = x159 - x56; - // loc(callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :24:28) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x929 = x927 + x928 * poly_mix[17]; - // loc(callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :25:29) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x930 = x160 - x58; - // loc(callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :25:29) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x931 = x929 + x930 * poly_mix[18]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x932 = x43 - x24; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - arg1[261] = x932; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x933 = x931 + x932 * poly_mix[19]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x934 = x59 - x42; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - arg1[262] = x934; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x935 = x933 + x934 * poly_mix[20]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x936 = x935 + x23 * poly_mix[21]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x937 = x936 + x23 * poly_mix[22]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x938 = x44 - x13; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - arg1[296] = x938; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x939 = x937 + x938 * poly_mix[23]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x940 = x46 - x141; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - arg1[263] = x940; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x941 = x939 + x940 * poly_mix[24]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x942 = x47 - x142; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - arg1[264] = x942; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x943 = x941 + x942 * poly_mix[25]; - // loc(callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :24:28) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x944 = x161 - x141; - // loc(callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :24:28) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x945 = x943 + x944 * poly_mix[26]; - // loc(callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :25:29) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x946 = x162 - x142; - // loc(callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :25:29) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x947 = x945 + x946 * poly_mix[27]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x948 = x163 - x24; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - arg1[267] = x948; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x949 = x947 + x948 * poly_mix[28]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x950 = x133 - x42; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - arg1[268] = x950; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x951 = x949 + x950 * poly_mix[29]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x952 = x951 + x23 * poly_mix[30]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x953 = x952 + x23 * poly_mix[31]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x954 = x130 - x12; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - arg1[297] = x954; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x955 = x953 + x954 * poly_mix[32]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x956 = x131 - x164; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - arg1[275] = x956; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x957 = x955 + x956 * poly_mix[33]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x958 = x132 - x134; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - arg1[276] = x958; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x959 = x957 + x958 * poly_mix[34]; - // loc(callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :24:28) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x960 = x165 - x164; - // loc(callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :24:28) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x961 = x959 + x960 * poly_mix[35]; - // loc(callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :25:29) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x962 = x166 - x134; - // loc(callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :25:29) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x963 = x961 + x962 * poly_mix[36]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x964 = x136 - x24; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - arg1[277] = x964; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x965 = x963 + x964 * poly_mix[37]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x966 = x965 + x561 * poly_mix[38]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x967 = x966 + x23 * poly_mix[39]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x968 = x967 + x23 * poly_mix[40]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x969 = x135 - x11; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - arg1[298] = x969; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x970 = x968 + x969 * poly_mix[41]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x971 = x970 + x567 * poly_mix[42]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x972 = x971 + x569 * poly_mix[43]; - // loc(callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :24:28) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x973 = x167 - x138; - // loc(callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :24:28) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x974 = x972 + x973 * poly_mix[44]; - // loc(callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :25:29) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x975 = x168 - x139; - // loc(callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :25:29) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x976 = x974 + x975 * poly_mix[45]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x977 = x64 - x24; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - arg1[283] = x977; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x978 = x976 + x977 * poly_mix[46]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x979 = x978 + x302 * poly_mix[47]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x980 = x979 + x23 * poly_mix[48]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x981 = x980 + x23 * poly_mix[49]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x982 = x62 - x10; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - arg1[299] = x982; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x983 = x981 + x982 * poly_mix[50]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x984 = x983 + x308 * poly_mix[51]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x985 = x984 + x310 * poly_mix[52]; - // loc(callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :24:28) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x986 = x169 - x66; - // loc(callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :24:28) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x987 = x985 + x986 * poly_mix[53]; - // loc(callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :25:29) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x988 = x170 - x68; - // loc(callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :25:29) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x989 = x987 + x988 * poly_mix[54]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x990 = x71 - x24; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - arg1[245] = x990; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x991 = x989 + x990 * poly_mix[55]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :65:23) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x992 = arg1[240]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x993 = x991 + x992 * poly_mix[56]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x994 = x993 + x23 * poly_mix[57]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x995 = x994 + x23 * poly_mix[58]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x996 = x72 - x9; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - arg1[300] = x996; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x997 = x995 + x996 * poly_mix[59]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x998 = x73 - x76; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - arg1[287] = x998; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x999 = x997 + x998 * poly_mix[60]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1000 = x75 - x78; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - arg1[288] = x1000; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1001 = x999 + x1000 * poly_mix[61]; - // loc(callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :24:28) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x1002 = x171 - x76; - // loc(callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :24:28) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x1003 = x1001 + x1002 * poly_mix[62]; - // loc(callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :25:29) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x1004 = x172 - x78; - // loc(callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :25:29) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x1005 = x1003 + x1004 * poly_mix[63]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1006 = x77 - x24; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - arg1[246] = x1006; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1007 = x1005 + x1006 * poly_mix[64]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1008 = x1007 + x714 * poly_mix[65]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1009 = x1008 + x23 * poly_mix[66]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1010 = x1009 + x23 * poly_mix[67]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1011 = x80 - x8; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - arg1[301] = x1011; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1012 = x1010 + x1011 * poly_mix[68]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1013 = x81 - x83; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - arg1[289] = x1013; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1014 = x1012 + x1013 * poly_mix[69]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1015 = x82 - x85; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - arg1[290] = x1015; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1016 = x1014 + x1015 * poly_mix[70]; - // loc(callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :24:28) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x1017 = x173 - x83; - // loc(callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :24:28) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x1018 = x1016 + x1017 * poly_mix[71]; - // loc(callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :25:29) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - auto x1019 = x174 - x85; - // loc(callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :25:29) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x1020 = x1018 + x1019 * poly_mix[72]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1021 = x1020 + x86 * poly_mix[73]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1022 = x1021 + x87 * poly_mix[74]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1023 = x1022 + x89 * poly_mix[75]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1024 = x1023 + x143 * poly_mix[76]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1025 = x1024 + x92 * poly_mix[77]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1026 = x1025 + x94 * poly_mix[78]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1027 = x1026 + x112 * poly_mix[79]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1028 = x1027 + x114 * poly_mix[80]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1029 = x1028 + x115 * poly_mix[81]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1030 = x1029 + x175 * poly_mix[82]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1031 = x1030 + x116 * poly_mix[83]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1032 = x1031 + x122 * poly_mix[84]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1033 = x1032 + x120 * poly_mix[85]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1034 = x1033 + x124 * poly_mix[86]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1035 = x1034 + x126 * poly_mix[87]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1036 = x1035 + x127 * poly_mix[88]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1037 = x1036 + x147 * poly_mix[89]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1038 = x1037 + x150 * poly_mix[90]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1039 = x1038 + x151 * poly_mix[91]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1040 = x1039 + x155 * poly_mix[92]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1041 = x1040 + x176 * poly_mix[93]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1042 = x1041 + x177 * poly_mix[94]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1043 = x1042 + x178 * poly_mix[95]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1044 = x1043 + x179 * poly_mix[96]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1045 = x1044 + x180 * poly_mix[97]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1046 = x1045 + x181 * poly_mix[98]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1047 = x1046 + x182 * poly_mix[99]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1048 = x1047 + x183 * poly_mix[100]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1049 = x1048 + x184 * poly_mix[101]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1050 = x1049 + x185 * poly_mix[102]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1051 = x1050 + x186 * poly_mix[103]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1052 = x1051 + x187 * poly_mix[104]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1053 = x1052 + x188 * poly_mix[105]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1054 = x1053 + x189 * poly_mix[106]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1055 = x1054 + x190 * poly_mix[107]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1056 = x1055 + x191 * poly_mix[108]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1057 = x1056 + x192 * poly_mix[109]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1058 = x1057 + x193 * poly_mix[110]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1059 = x1058 + x194 * poly_mix[111]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1060 = x1059 + x195 * poly_mix[112]; - // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1061 = arg7 + x98 * x1060 * poly_mix[1]; - // loc(callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :31:13) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x1062 = arg2 + x891 * poly_mix[0]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x1063 = arg1[80]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :33:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1064 = x1062 + x1063 * poly_mix[1]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:4) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :33:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1065 = x892 * x196; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:4) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :33:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - arg1[274] = x1065; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x1066 = arg1[241]; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :33:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x1067 = x1065 - x1066; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :33:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x1068 = x1064 + x1067 * poly_mix[2]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:4) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :33:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1069 = x197 * x892; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:17) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :33:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x1070 = x1068 + x1069 * poly_mix[3]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:4) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :33:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1071 = x197 * x196; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:4) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :33:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - arg1[303] = x1071; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:17) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :33:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x1072 = x1070 + x1071 * poly_mix[4]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :36:22) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1073 = arg2 + x900 * poly_mix[0]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :36:22) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1074 = x1073 + x902 * poly_mix[1]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :36:22) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1075 = x1074 + x23 * poly_mix[2]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :36:22) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1076 = x1075 + x23 * poly_mix[3]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :36:22) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1077 = x96 - x7; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :36:22) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - arg1[291] = x1077; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :36:22) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1078 = x1076 + x1077 * poly_mix[4]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :36:22) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1079 = x1078 + x908 * poly_mix[5]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :36:22) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1080 = x1079 + x910 * poly_mix[6]; - // loc(callsite(unknown at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :36:22) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1081 = x69 - x99; - // loc(callsite(unknown at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :36:22) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg1[308] = x1081; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :36:22) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1082 = x1080 + x720 * poly_mix[7]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :36:22) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1083 = x88 - x1081; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :36:22) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg1[254] = x1083; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :36:22) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1084 = x1082 + x1083 * poly_mix[8]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :37:24) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1085 = x1084 + x916 * poly_mix[9]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :37:24) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1086 = x1085 + x918 * poly_mix[10]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :37:24) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1087 = x1086 + x23 * poly_mix[11]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :37:24) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1088 = x1087 + x23 * poly_mix[12]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :37:24) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1089 = x51 - x6; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :37:24) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - arg1[292] = x1089; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :37:24) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1090 = x1088 + x1089 * poly_mix[13]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :37:24) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1091 = x1090 + x924 * poly_mix[14]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :37:24) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1092 = x1091 + x926 * poly_mix[15]; - // loc(callsite(unknown at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :37:24) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1093 = x69 - x52; - // loc(callsite(unknown at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :37:24) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg1[309] = x1093; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :69:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1094 = arg1[242]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :37:24) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1095 = x1092 + x1094 * poly_mix[16]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :37:24) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1096 = x93 - x1093; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :37:24) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg1[259] = x1096; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :37:24) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1097 = x1095 + x1096 * poly_mix[17]; - // loc(callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :34:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x1098 = x1097 + x43 * poly_mix[18]; - // loc(callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :34:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x1099 = x1098 + x59 * poly_mix[19]; - // loc(callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :34:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x1100 = x1099 + x163 * poly_mix[20]; - // loc(callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :34:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x1101 = x1100 + x133 * poly_mix[21]; - // loc(callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :34:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x1102 = x1101 + x136 * poly_mix[22]; - // loc(callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :34:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x1103 = x1102 + x57 * poly_mix[23]; - // loc(callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :34:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x1104 = x1103 + x64 * poly_mix[24]; - // loc(callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :34:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x1105 = x1104 + x63 * poly_mix[25]; - // loc(callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :34:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x1106 = x1105 + x71 * poly_mix[26]; - // loc(callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :34:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x1107 = x1106 + x74 * poly_mix[27]; - // loc(callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :34:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x1108 = x1107 + x77 * poly_mix[28]; - // loc(callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :34:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x1109 = x1108 + x84 * poly_mix[29]; - // loc(callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :34:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x1110 = x1109 + x89 * poly_mix[30]; - // loc(callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :34:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x1111 = x1110 + x143 * poly_mix[31]; - // loc(callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :34:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x1112 = x1111 + x92 * poly_mix[32]; - // loc(callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :34:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x1113 = x1112 + x94 * poly_mix[33]; - // loc(callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :34:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x1114 = x1113 + x112 * poly_mix[34]; - // loc(callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :34:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x1115 = x1114 + x114 * poly_mix[35]; - // loc(callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :34:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x1116 = x1072 + x197 * x1115 * poly_mix[5]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1117 = x96 - x5; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1118 = x1076 + x1117 * poly_mix[4]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1119 = x1118 + x720 * poly_mix[5]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1120 = x1119 + x1083 * poly_mix[6]; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x1121 = x48 - x198; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x1122 = x1120 + x1121 * poly_mix[7]; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x1123 = x49 - x199; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x1124 = x1122 + x1123 * poly_mix[8]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1125 = x1124 + x916 * poly_mix[9]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1126 = x1125 + x918 * poly_mix[10]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1127 = x1126 + x23 * poly_mix[11]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1128 = x1127 + x23 * poly_mix[12]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1129 = x51 - x4; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1130 = x1128 + x1129 * poly_mix[13]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1131 = x1130 + x1094 * poly_mix[14]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1132 = x1131 + x1096 * poly_mix[15]; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x1133 = x56 - x200; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x1134 = x1132 + x1133 * poly_mix[16]; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x1135 = x58 - x201; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x1136 = x1134 + x1135 * poly_mix[17]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1137 = x1136 + x932 * poly_mix[18]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1138 = x1137 + x934 * poly_mix[19]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1139 = x1138 + x23 * poly_mix[20]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1140 = x1139 + x23 * poly_mix[21]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1141 = x44 - x3; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1142 = x1140 + x1141 * poly_mix[22]; - // loc(callsite(unknown at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:22) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1143 = x69 - x45; - // loc(callsite(unknown at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:22) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg1[314] = x1143; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1144 = x89 - x42; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg1[265] = x1144; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1145 = x1142 + x1144 * poly_mix[23]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1146 = x91 - x1143; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg1[266] = x1146; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1147 = x1145 + x1146 * poly_mix[24]; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x1148 = x141 - x202; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x1149 = x1147 + x1148 * poly_mix[25]; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x1150 = x142 - x203; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x1151 = x1149 + x1150 * poly_mix[26]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1152 = x1151 + x948 * poly_mix[27]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1153 = x1152 + x950 * poly_mix[28]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1154 = x1153 + x23 * poly_mix[29]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1155 = x1154 + x23 * poly_mix[30]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1156 = x130 - x2; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1157 = x1155 + x1156 * poly_mix[31]; - // loc(callsite(unknown at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:22) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1158 = x69 - x204; - // loc(callsite(unknown at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:22) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg1[317] = x1158; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1159 = x1157 + x369 * poly_mix[32]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1160 = x90 - x1158; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg1[269] = x1160; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1161 = x1159 + x1160 * poly_mix[33]; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x1162 = x164 - x205; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x1163 = x1161 + x1162 * poly_mix[34]; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x1164 = x134 - x206; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x1165 = x1163 + x1164 * poly_mix[35]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1166 = x1165 + x964 * poly_mix[36]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1167 = x1166 + x561 * poly_mix[37]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1168 = x1167 + x23 * poly_mix[38]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1169 = x1168 + x23 * poly_mix[39]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1170 = x135 - x1; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1171 = x1169 + x1170 * poly_mix[40]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1172 = x1171 + x748 * poly_mix[41]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1173 = x144 - x571; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg1[282] = x1173; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1174 = x1172 + x1173 * poly_mix[42]; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x1175 = x138 - x207; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x1176 = x1174 + x1175 * poly_mix[43]; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x1177 = x139 - x208; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x1178 = x1176 + x1177 * poly_mix[44]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1179 = x1178 + x977 * poly_mix[45]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1180 = x1179 + x302 * poly_mix[46]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1181 = x1180 + x23 * poly_mix[47]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1182 = x1181 + x23 * poly_mix[48]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1183 = x62 - x0; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1184 = x1182 + x1183 * poly_mix[49]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1185 = arg1[243]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1186 = x1184 + x1185 * poly_mix[50]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1187 = x97 - x312; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg1[244] = x1187; - // loc(unknown) - auto x1188 = rv32im_v2_8(cycle, steps, poly_mix, arg1, x1186, x1116, x1061, arg2, x1076, x889, arg8, arg9, arg10, arg11, arg12, arg13, arg14); - return x1188; -} -FpExt rv32im_v2_5(size_t cycle, size_t steps, FpExt* poly_mix, Fp* arg0, FpExt arg1, FpExt* arg2, FpExt arg3, FpExt arg4, FpExt arg5, FpExt arg6, FpExt arg7, Fp* arg8, Fp* arg9, Fp* arg10) { - size_t mask = steps - 1; - // loc(unknown) - constexpr Fp x0(1687379185); - // loc(unknown) - constexpr Fp x1(1150912935); - // loc(unknown) - constexpr Fp x2(1917549072); - // loc(unknown) - constexpr Fp x3(1201063290); - // loc(unknown) - constexpr Fp x4(395622276); - // loc(unknown) - constexpr Fp x5(1997503974); - // loc(unknown) - constexpr Fp x6(716894289); - // loc(unknown) - constexpr Fp x7(897025192); - // loc(unknown) - constexpr Fp x8(1282239129); - // loc(unknown) - constexpr Fp x9(1737016378); - // loc(unknown) - constexpr Fp x10(686842369); - // loc(unknown) - constexpr Fp x11(622609176); - // loc(unknown) - constexpr Fp x12(1339793538); - // loc(unknown) - constexpr Fp x13(1518763784); - // loc(unknown) - constexpr Fp x14(1989924532); - // loc(unknown) - constexpr Fp x15(1170029417); - // loc(unknown) - constexpr Fp x16(1917861751); - // loc(unknown) - constexpr Fp x17(1333667262); - // loc(unknown) - constexpr Fp x18(540703332); - // loc(unknown) - constexpr Fp x19(1845603984); - // loc(unknown) - constexpr Fp x20(695835963); - // loc(unknown) - constexpr Fp x21(831813382); - // loc(unknown) - constexpr Fp x22(1421525369); - // loc(unknown) - constexpr Fp x23(1751797115); - // loc(unknown) - constexpr Fp x24(1964135730); - // loc(unknown) - constexpr Fp x25(525458520); - // loc(unknown) - constexpr Fp x26(638242172); - // loc(unknown) - constexpr Fp x27(1307439985); - // loc(unknown) - constexpr Fp x28(343354132); - // loc(unknown) - constexpr Fp x29(1389166148); - // loc(unknown) - constexpr Fp x30(1660766320); - // loc(unknown) - constexpr Fp x31(1464793095); - // loc(unknown) - constexpr Fp x32(1180307149); - // loc(unknown) - constexpr Fp x33(1930780904); - // loc(unknown) - constexpr Fp x34(1066694495); - // loc(unknown) - constexpr Fp x35(1773108264); - // loc(unknown) - constexpr Fp x36(1004040026); - // loc(unknown) - constexpr Fp x37(815798990); - // loc(unknown) - constexpr Fp x38(454905424); - // loc(unknown) - constexpr Fp x39(118043943); - // loc(unknown) - constexpr Fp x40(157582794); - // loc(unknown) - constexpr Fp x41(246143118); - // loc(unknown) - constexpr Fp x42(314968988); - // loc(unknown) - constexpr Fp x43(127253399); - // loc(unknown) - constexpr Fp x44(262278199); - // loc(unknown) - constexpr Fp x45(6); - // loc(unknown) - constexpr Fp x46(21); - // loc(unknown) - constexpr Fp x47(18); - // loc(unknown) - constexpr Fp x48(24); - // loc(unknown) - constexpr Fp x49(25); - // loc(unknown) - constexpr Fp x50(7); - // loc(unknown) - constexpr Fp x51(1073741824); - // loc(unknown) - constexpr Fp x52(256); - // loc(unknown) - constexpr Fp x53(4194304); - // loc(unknown) - constexpr Fp x54(8); - // loc(unknown) - constexpr Fp x55(5); - // loc(unknown) - constexpr Fp x56(4); - // loc(unknown) - constexpr Fp x57(3); - // loc(unknown) - constexpr Fp x58(2); - // loc(unknown) - constexpr Fp x59(1761607681); - // loc(unknown) - constexpr Fp x60(1140850688); - // loc(unknown) - constexpr Fp x61(2013235201); - // loc(unknown) - constexpr Fp x62(1); - // loc(unknown) - constexpr FpExt x63(1,0,0,0); - // loc(unknown) - constexpr FpExt x64(0,1,0,0); - // loc(unknown) - constexpr Fp x65(22); - // loc(unknown) - constexpr Fp x66(32); - // loc(unknown) - constexpr Fp x67(0); - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x68 = arg8[42 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :26:28) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x69 = arg8[107 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x70 = arg8[43 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( CycleArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :54:29) at callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :60:19) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x71 = arg8[115 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x72 = arg8[44 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x73 = arg8[123 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x74 = arg8[45 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :39:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x75 = arg8[32 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :11:20) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :90:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x76 = arg8[183 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :8:23) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :90:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x77 = arg8[182 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :11:20) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :99:23) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x78 = arg8[187 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :8:23) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :99:23) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x79 = arg8[186 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :95:28) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x80 = arg8[185 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :94:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x81 = arg8[184 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x82 = arg8[33 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x83 = arg8[38 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x84 = arg8[38 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x85 = arg8[39 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :45:28) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x86 = arg8[39 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x87 = arg8[40 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :28:29) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x88 = arg8[40 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x89 = arg8[41 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x90 = arg8[41 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :51:29) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x91 = arg8[42 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :28:29) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x92 = arg8[43 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x93 = arg8[44 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :45:28) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x94 = arg8[45 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x95 = arg8[146 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x96 = arg8[148 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x97 = arg8[150 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x98 = arg8[152 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x99 = arg8[154 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x100 = arg8[156 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x101 = arg8[158 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x102 = arg8[160 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x103 = arg8[162 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x104 = arg8[164 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x105 = arg8[166 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x106 = arg8[168 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x107 = arg8[170 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x108 = arg8[172 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x109 = arg8[174 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x110 = arg8[176 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :38:26) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x111 = arg8[31 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x112 = arg8[147 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x113 = arg8[149 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :25:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x114 = arg8[72 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :26:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x115 = arg8[73 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x116 = arg8[151 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x117 = arg8[153 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :28:29) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :65:23) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x118 = arg8[80 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :65:23) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x119 = arg8[81 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x120 = arg8[155 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x121 = arg8[157 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :27:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x122 = arg8[88 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x123 = arg8[89 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x124 = arg8[159 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x125 = arg8[161 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :26:28) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x126 = arg8[96 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :25:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x127 = arg8[97 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x128 = arg8[163 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x129 = arg8[165 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( CycleArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :54:29) at callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :60:19) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x130 = arg8[104 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( CycleArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :55:29) at callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :60:19) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x131 = arg8[105 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x132 = arg8[167 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x133 = arg8[169 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :25:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x134 = arg8[112 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x135 = arg8[113 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x136 = arg8[171 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x137 = arg8[173 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x138 = arg8[120 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x139 = arg8[121 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x140 = arg8[175 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x141 = arg8[177 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x142 = arg8[128 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x143 = arg8[129 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x144 = arg8[178 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x145 = arg8[180 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x146 = arg8[24 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :36:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x147 = arg8[29 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :11:20) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :131:20) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x148 = arg8[189 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :8:23) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :131:20) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x149 = arg8[188 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x150 = arg8[179 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x151 = arg8[181 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( BitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :17:23) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :434:10) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x152 = arg8[190 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x153 = arg8[29 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x154 = arg8[35 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :126:34) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :136:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x155 = arg8[36 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :126:34) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :134:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x156 = arg8[32 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :28:29) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x157 = arg8[37 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :19:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x158 = arg8[66 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :24:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x159 = arg8[71 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :27:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x160 = arg8[74 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :63:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x161 = arg8[79 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :8:23) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x162 = arg8[82 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :25:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x163 = arg8[87 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x164 = arg8[90 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( CycleArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :55:29) at callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :60:19) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x165 = arg8[95 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :27:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x166 = arg8[98 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x167 = arg8[103 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :34:15) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x168 = arg8[106 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x169 = arg8[111 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x170 = arg8[114 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x171 = arg8[119 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x172 = arg8[122 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x173 = arg8[127 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x174 = arg8[130 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x175 = arg8[132 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x176 = arg8[134 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x177 = arg8[136 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x178 = arg8[138 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x179 = arg8[140 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x180 = arg8[142 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x181 = arg8[144 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x182 = arg8[25 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x183 = arg8[54 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x184 = arg8[55 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x185 = arg8[56 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x186 = arg8[57 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x187 = arg8[58 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x188 = arg8[59 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x189 = arg8[60 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x190 = arg8[61 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x191 = arg8[26 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x192 = arg8[10 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :42:26) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x193 = arg8[34 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :20:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x194 = arg8[67 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :22:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x195 = arg8[69 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :21:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x196 = arg8[68 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :44:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x197 = arg8[36 * steps + ((cycle - kInvRate * 1) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :23:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x198 = arg8[70 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x199 = arg8[124 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x200 = arg8[125 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x201 = arg8[126 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :11:25) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x202 = arg0[335]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x203 = arg1 + x202 * poly_mix[46]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x204 = arg0[361]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x205 = x203 + x204 * poly_mix[47]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x206 = arg0[362]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x207 = x205 + x206 * poly_mix[48]; - // loc(callsite(unknown at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :141:18) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x208 = arg0[420]; - // loc(callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :265:11) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x209 = x208 - x68; - // loc(callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :265:11) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x210 = x207 + x209 * poly_mix[49]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :11:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x211 = arg0[231]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x212 = x210 + x211 * poly_mix[50]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :60:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x213 = arg0[260]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x214 = x212 + x213 * poly_mix[51]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x215 = x214 + x67 * poly_mix[52]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x216 = x215 + x67 * poly_mix[53]; - // loc(callsite(unknown at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:35) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x217 = arg0[421]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x218 = x69 - x217; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x219 = x216 + x218 * poly_mix[54]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :11:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x220 = arg0[234]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x221 = x219 + x220 * poly_mix[55]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x222 = arg0[336]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x223 = x221 + x222 * poly_mix[56]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x224 = arg0[363]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x225 = x223 + x224 * poly_mix[57]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x226 = arg0[364]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x227 = x225 + x226 * poly_mix[58]; - // loc(callsite(unknown at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :141:18) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x228 = arg0[422]; - // loc(callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :265:11) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x229 = x228 - x70; - // loc(callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :265:11) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x230 = x227 + x229 * poly_mix[59]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x231 = arg0[365]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x232 = x230 + x231 * poly_mix[60]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :61:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x233 = arg0[338]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x234 = x232 + x233 * poly_mix[61]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x235 = x234 + x67 * poly_mix[62]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x236 = x235 + x67 * poly_mix[63]; - // loc(callsite(unknown at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:35) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x237 = arg0[423]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x238 = x71 - x237; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x239 = x236 + x238 * poly_mix[64]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x240 = arg0[366]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x241 = x239 + x240 * poly_mix[65]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x242 = arg0[367]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x243 = x241 + x242 * poly_mix[66]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x244 = arg0[368]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x245 = x243 + x244 * poly_mix[67]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x246 = arg0[369]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x247 = x245 + x246 * poly_mix[68]; - // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:23) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :61:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x248 = arg0[339]; - // loc(callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :265:11) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x249 = x248 - x72; - // loc(callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :265:11) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x250 = x247 + x249 * poly_mix[69]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x251 = arg0[370]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x252 = x250 + x251 * poly_mix[70]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x253 = arg0[371]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x254 = x252 + x253 * poly_mix[71]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x255 = x254 + x67 * poly_mix[72]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x256 = x255 + x67 * poly_mix[73]; - // loc(callsite(unknown at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:35) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x257 = arg0[424]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x258 = x73 - x257; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x259 = x256 + x258 * poly_mix[74]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x260 = arg0[372]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x261 = x259 + x260 * poly_mix[75]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x262 = arg0[373]; - // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x263 = x261 + x262 * poly_mix[76]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x264 = arg0[374]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x265 = x263 + x264 * poly_mix[77]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x266 = arg0[375]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - FpExt x267 = x265 + x266 * poly_mix[78]; - // loc(callsite(unknown at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :141:18) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x268 = arg0[425]; - // loc(callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :265:11) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x269 = x268 - x74; - // loc(callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :265:11) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x270 = x267 + x269 * poly_mix[79]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :90:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x271 = arg0[340]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :267:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x272 = x270 + x271 * poly_mix[80]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:4) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :267:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x273 = x75 * x76; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :90:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x274 = arg0[426]; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :267:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x275 = x273 - x274; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :267:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x276 = x272 + x275 * poly_mix[81]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:4) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :267:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x277 = x77 * x75; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:17) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :267:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x278 = x276 + x277 * poly_mix[82]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:4) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :90:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x279 = arg0[427]; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:17) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :267:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x280 = x278 + x279 * poly_mix[83]; - // loc(callsite(unknown at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :268:16) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x281 = x77 * x66; - // loc(callsite(unknown at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :268:56) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x282 = x274 * x65; - // loc(callsite(unknown at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :268:39) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x283 = x281 + x282; - // loc(callsite(unknown at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :269:62) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x284 = arg0[428]; - // loc(callsite(unknown at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :269:80) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x285 = x284 * x283; - // loc(callsite(unknown at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :269:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x286 = arg0[429]; - // loc(callsite(unknown at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :269:57) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x287 = x286 + x285; - // loc(callsite(unknown at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :274:26) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x288 = x78 * x64; - // loc(callsite(unknown at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :274:26) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x289 = x79 + x288; - // loc(callsite(unknown at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :274:26) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x290 = x289 * x64; - // loc(callsite(unknown at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :274:26) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x291 = x80 + x290; - // loc(callsite(unknown at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :274:26) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x292 = x291 * x64; - // loc(callsite(unknown at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :274:26) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x293 = x81 + x292; - // loc(callsite(unknown at callsite( ExtReg ( :10:24) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :48:27) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x294 = arg2[0]; - // loc(callsite(unknown at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :275:24) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x295 = x293 * x294; - // loc(callsite(unknown at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :275:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x296 = x295 - x63; - // loc(callsite(unknown at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :275:10) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x297 = x280 + x296 * poly_mix[84]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :34:26) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x298 = arg0[376]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :34:26) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :276:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x299 = x297 + x298 * poly_mix[85]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :35:27) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x300 = arg0[377]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :35:27) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :276:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x301 = x299 + x300 * poly_mix[86]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :36:28) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x302 = arg0[378]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :36:28) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :276:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x303 = x301 + x302 * poly_mix[87]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :37:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x304 = arg0[379]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :37:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :276:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x305 = x303 + x304 * poly_mix[88]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :38:26) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x306 = arg0[380]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :38:26) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :276:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x307 = x305 + x306 * poly_mix[89]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :39:28) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x308 = arg0[381]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :39:28) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :276:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x309 = x307 + x308 * poly_mix[90]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :41:27) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :276:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x310 = x287 - x82; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :41:27) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :276:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x311 = x309 + x310 * poly_mix[91]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :42:26) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x312 = arg0[382]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :42:26) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :276:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x313 = x311 + x312 * poly_mix[92]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :43:27) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x314 = arg0[390]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :43:27) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :276:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x315 = x313 + x314 * poly_mix[93]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :44:23) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x316 = arg0[391]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :44:23) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :276:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x317 = x315 + x316 * poly_mix[94]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :45:22) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x318 = arg0[384]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :45:22) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :276:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x319 = x317 + x318 * poly_mix[95]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :276:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x320 = x83 - x84; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :276:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x321 = x319 + x320 * poly_mix[96]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :276:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x322 = x85 - x86; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :276:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x323 = x321 + x322 * poly_mix[97]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :276:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x324 = x87 - x88; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :276:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x325 = x323 + x324 * poly_mix[98]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :276:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x326 = x89 - x90; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :276:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x327 = x325 + x326 * poly_mix[99]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :276:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x328 = x68 - x91; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :276:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x329 = x327 + x328 * poly_mix[100]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :276:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x330 = x70 - x92; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :276:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x331 = x329 + x330 * poly_mix[101]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :276:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x332 = x72 - x93; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :276:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x333 = x331 + x332 * poly_mix[102]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :276:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x334 = x74 - x94; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :276:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x335 = x333 + x334 * poly_mix[103]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x336 = arg0[430]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :276:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x337 = x335 + x336 * poly_mix[104]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x338 = arg0[431]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :276:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x339 = x337 + x338 * poly_mix[105]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x340 = arg0[432]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :276:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x341 = x339 + x340 * poly_mix[106]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x342 = arg0[433]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :276:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x343 = x341 + x342 * poly_mix[107]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x344 = arg0[434]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :276:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x345 = x343 + x344 * poly_mix[108]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x346 = arg0[435]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :276:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x347 = x345 + x346 * poly_mix[109]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x348 = arg0[436]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :276:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x349 = x347 + x348 * poly_mix[110]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x350 = arg0[437]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :276:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x351 = x349 + x350 * poly_mix[111]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x352 = arg0[438]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :276:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x353 = x351 + x352 * poly_mix[112]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x354 = arg0[439]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :276:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x355 = x353 + x354 * poly_mix[113]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x356 = arg0[440]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :276:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x357 = x355 + x356 * poly_mix[114]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x358 = arg0[441]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :276:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x359 = x357 + x358 * poly_mix[115]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x360 = arg0[442]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :276:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x361 = x359 + x360 * poly_mix[116]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x362 = arg0[443]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :276:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x363 = x361 + x362 * poly_mix[117]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x364 = arg0[444]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :276:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x365 = x363 + x364 * poly_mix[118]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x366 = arg0[445]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :276:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x367 = x365 + x366 * poly_mix[119]; - // loc(callsite(unknown at callsite( ExtReg ( :11:18) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :48:27) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x368 = arg2[2]; - // loc(callsite(unknown at callsite( ExtReg ( :11:11) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :48:27) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :276:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x369 = x367 + x368 * poly_mix[120]; - // loc(callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:4) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x370 = x369 + x95 * poly_mix[121]; - // loc(callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:4) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x371 = x370 + x96 * poly_mix[122]; - // loc(callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:4) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x372 = x371 + x97 * poly_mix[123]; - // loc(callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:4) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x373 = x372 + x98 * poly_mix[124]; - // loc(callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:4) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x374 = x373 + x99 * poly_mix[125]; - // loc(callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:4) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x375 = x374 + x100 * poly_mix[126]; - // loc(callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:4) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x376 = x375 + x101 * poly_mix[127]; - // loc(callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:4) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x377 = x376 + x102 * poly_mix[128]; - // loc(callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:4) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x378 = x377 + x103 * poly_mix[129]; - // loc(callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:4) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x379 = x378 + x104 * poly_mix[130]; - // loc(callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:4) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x380 = x379 + x105 * poly_mix[131]; - // loc(callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:4) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x381 = x380 + x106 * poly_mix[132]; - // loc(callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:4) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x382 = x381 + x107 * poly_mix[133]; - // loc(callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:4) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x383 = x382 + x108 * poly_mix[134]; - // loc(callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:4) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x384 = x383 + x109 * poly_mix[135]; - // loc(callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:4) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x385 = x384 + x110 * poly_mix[136]; - // loc(callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:4) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x386 = arg3 + x111 * x385 * poly_mix[0]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :282:25) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x387 = x95 - x62; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :282:25) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x388 = arg3 + x387 * poly_mix[0]; - // loc(callsite(unknown at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :283:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x389 = x83 - x112; - // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :283:31) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x390 = x389 * x61; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x391 = arg0[446]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :283:20) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x392 = x388 + x391 * poly_mix[1]; - // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :283:20) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x393 = x113 - x390; - // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :283:20) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x394 = x392 + x393 * poly_mix[2]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :84:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x395 = arg0[447]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x396 = x394 + x395 * poly_mix[3]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :84:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x397 = arg0[448]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x398 = x396 + x397 * poly_mix[4]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x399 = x398 + x67 * poly_mix[5]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x400 = x399 + x67 * poly_mix[6]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x401 = arg0[449]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x402 = x400 + x401 * poly_mix[7]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :84:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x403 = arg0[343]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x404 = x402 + x403 * poly_mix[8]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :84:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x405 = arg0[344]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x406 = x404 + x405 * poly_mix[9]; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x407 = x114 - x112; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x408 = x406 + x407 * poly_mix[10]; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x409 = x115 - x390; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x410 = x408 + x409 * poly_mix[11]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :282:25) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x411 = x97 - x62; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :282:25) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x412 = x410 + x411 * poly_mix[12]; - // loc(callsite(unknown at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :283:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x413 = x85 - x116; - // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :283:31) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x414 = x413 * x61; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :283:20) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x415 = x98 - x62; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :283:20) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x416 = x412 + x415 * poly_mix[13]; - // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :283:20) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x417 = x117 - x414; - // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :283:20) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x418 = x416 + x417 * poly_mix[14]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :85:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x419 = arg0[345]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x420 = x418 + x419 * poly_mix[15]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :85:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x421 = arg0[346]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x422 = x420 + x421 * poly_mix[16]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x423 = x422 + x67 * poly_mix[17]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x424 = x423 + x67 * poly_mix[18]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x425 = arg0[450]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x426 = x424 + x425 * poly_mix[19]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :85:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x427 = arg0[349]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x428 = x426 + x427 * poly_mix[20]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :85:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x429 = arg0[350]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x430 = x428 + x429 * poly_mix[21]; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x431 = x118 - x116; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x432 = x430 + x431 * poly_mix[22]; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x433 = x119 - x414; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x434 = x432 + x433 * poly_mix[23]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :282:25) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x435 = x99 - x62; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :282:25) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x436 = x434 + x435 * poly_mix[24]; - // loc(callsite(unknown at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :283:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x437 = x87 - x120; - // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :283:31) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x438 = x437 * x61; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :34:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x439 = arg0[451]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :283:20) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x440 = x436 + x439 * poly_mix[25]; - // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :283:20) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x441 = x121 - x438; - // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :283:20) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x442 = x440 + x441 * poly_mix[26]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :86:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x443 = arg0[351]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x444 = x442 + x443 * poly_mix[27]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :69:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x445 = arg0[332]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x446 = x444 + x445 * poly_mix[28]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x447 = x446 + x67 * poly_mix[29]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x448 = x447 + x67 * poly_mix[30]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x449 = arg0[452]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x450 = x448 + x449 * poly_mix[31]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :86:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x451 = arg0[354]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x452 = x450 + x451 * poly_mix[32]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :86:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x453 = arg0[355]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x454 = x452 + x453 * poly_mix[33]; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x455 = x122 - x120; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x456 = x454 + x455 * poly_mix[34]; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x457 = x123 - x438; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x458 = x456 + x457 * poly_mix[35]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x459 = arg0[453]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :282:25) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x460 = x458 + x459 * poly_mix[36]; - // loc(callsite(unknown at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :283:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x461 = x89 - x124; - // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :283:31) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x462 = x461 * x61; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :283:20) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x463 = x102 - x62; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :283:20) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x464 = x460 + x463 * poly_mix[37]; - // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :283:20) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x465 = x125 - x462; - // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :283:20) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x466 = x464 + x465 * poly_mix[38]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x467 = arg0[333]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x468 = x466 + x467 * poly_mix[39]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x469 = arg0[265]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x470 = x468 + x469 * poly_mix[40]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x471 = x470 + x67 * poly_mix[41]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x472 = x471 + x67 * poly_mix[42]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x473 = arg0[454]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x474 = x472 + x473 * poly_mix[43]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :87:30) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x475 = arg0[357]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x476 = x474 + x475 * poly_mix[44]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :87:30) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x477 = arg0[358]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x478 = x476 + x477 * poly_mix[45]; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x479 = x126 - x124; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x480 = x478 + x479 * poly_mix[46]; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x481 = x127 - x462; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x482 = x480 + x481 * poly_mix[47]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :282:25) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x483 = x103 - x62; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :282:25) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x484 = x482 + x483 * poly_mix[48]; - // loc(callsite(unknown at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :283:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x485 = x68 - x128; - // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :283:31) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x486 = x485 * x61; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :283:20) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x487 = x104 - x62; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :283:20) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x488 = x484 + x487 * poly_mix[49]; - // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :283:20) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x489 = x129 - x486; - // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :283:20) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x490 = x488 + x489 * poly_mix[50]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x491 = arg0[359]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x492 = x490 + x491 * poly_mix[51]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x493 = arg0[230]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x494 = x492 + x493 * poly_mix[52]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x495 = x494 + x67 * poly_mix[53]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x496 = x495 + x67 * poly_mix[54]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x497 = arg0[455]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x498 = x496 + x497 * poly_mix[55]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x499 = x498 + x204 * poly_mix[56]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x500 = x499 + x206 * poly_mix[57]; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x501 = x130 - x128; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x502 = x500 + x501 * poly_mix[58]; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x503 = x131 - x486; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x504 = x502 + x503 * poly_mix[59]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :34:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x505 = arg0[456]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :282:25) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x506 = x504 + x505 * poly_mix[60]; - // loc(callsite(unknown at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :283:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x507 = x70 - x132; - // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :283:31) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x508 = x507 * x61; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :283:20) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x509 = x106 - x62; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :283:20) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x510 = x506 + x509 * poly_mix[61]; - // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :283:20) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x511 = x133 - x508; - // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :283:20) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x512 = x510 + x511 * poly_mix[62]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x513 = x512 + x211 * poly_mix[63]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x514 = x513 + x213 * poly_mix[64]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x515 = x514 + x67 * poly_mix[65]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x516 = x515 + x67 * poly_mix[66]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x517 = x516 + x218 * poly_mix[67]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x518 = x517 + x224 * poly_mix[68]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x519 = x518 + x226 * poly_mix[69]; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x520 = x134 - x132; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x521 = x519 + x520 * poly_mix[70]; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x522 = x135 - x508; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x523 = x521 + x522 * poly_mix[71]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :282:25) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x524 = x107 - x62; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :282:25) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x525 = x523 + x524 * poly_mix[72]; - // loc(callsite(unknown at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :283:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x526 = x72 - x136; - // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :283:31) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x527 = x526 * x61; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :283:20) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x528 = x108 - x62; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :283:20) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x529 = x525 + x528 * poly_mix[73]; - // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :283:20) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x530 = x137 - x527; - // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :283:20) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x531 = x529 + x530 * poly_mix[74]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x532 = x531 + x231 * poly_mix[75]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x533 = x532 + x233 * poly_mix[76]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x534 = x533 + x67 * poly_mix[77]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x535 = x534 + x67 * poly_mix[78]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x536 = x535 + x238 * poly_mix[79]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x537 = x536 + x244 * poly_mix[80]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x538 = x537 + x246 * poly_mix[81]; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x539 = x138 - x136; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x540 = x538 + x539 * poly_mix[82]; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x541 = x139 - x527; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x542 = x540 + x541 * poly_mix[83]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :282:25) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x543 = x109 - x62; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :282:25) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x544 = x542 + x543 * poly_mix[84]; - // loc(callsite(unknown at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :283:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x545 = x74 - x140; - // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :283:31) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x546 = x545 * x61; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :283:20) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x547 = x110 - x62; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :283:20) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x548 = x544 + x547 * poly_mix[85]; - // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :283:20) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x549 = x141 - x546; - // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :283:20) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x550 = x548 + x549 * poly_mix[86]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x551 = x550 + x251 * poly_mix[87]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x552 = x551 + x253 * poly_mix[88]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x553 = x552 + x67 * poly_mix[89]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x554 = x553 + x67 * poly_mix[90]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x555 = x554 + x258 * poly_mix[91]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x556 = x555 + x264 * poly_mix[92]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x557 = x556 + x266 * poly_mix[93]; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x558 = x142 - x140; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x559 = x557 + x558 * poly_mix[94]; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x560 = x143 - x546; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x561 = x559 + x560 * poly_mix[95]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :286:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x562 = x561 + x271 * poly_mix[96]; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :286:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x563 = x562 + x275 * poly_mix[97]; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:17) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :286:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x564 = x563 + x277 * poly_mix[98]; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:17) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :286:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x565 = x564 + x279 * poly_mix[99]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :34:26) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :292:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x566 = x565 + x298 * poly_mix[100]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :35:27) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :292:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x567 = x566 + x300 * poly_mix[101]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :36:28) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :292:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x568 = x567 + x302 * poly_mix[102]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :37:24) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :292:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x569 = x568 + x304 * poly_mix[103]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :38:26) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :292:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x570 = x569 + x306 * poly_mix[104]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :39:28) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :292:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x571 = x570 + x308 * poly_mix[105]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :41:27) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :292:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x572 = x571 + x310 * poly_mix[106]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :42:26) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :292:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x573 = x572 + x312 * poly_mix[107]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :43:27) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :292:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x574 = x573 + x314 * poly_mix[108]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :44:23) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :292:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x575 = x574 + x316 * poly_mix[109]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :45:22) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :292:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x576 = x575 + x318 * poly_mix[110]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :292:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x577 = x576 + x320 * poly_mix[111]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :292:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x578 = x577 + x322 * poly_mix[112]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :292:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x579 = x578 + x324 * poly_mix[113]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :292:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x580 = x579 + x326 * poly_mix[114]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :292:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x581 = x580 + x328 * poly_mix[115]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :292:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x582 = x581 + x330 * poly_mix[116]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :292:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x583 = x582 + x332 * poly_mix[117]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :292:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x584 = x583 + x334 * poly_mix[118]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :292:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x585 = x584 + x336 * poly_mix[119]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :292:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x586 = x585 + x338 * poly_mix[120]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :292:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x587 = x586 + x340 * poly_mix[121]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :292:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x588 = x587 + x342 * poly_mix[122]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :292:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x589 = x588 + x344 * poly_mix[123]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :292:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x590 = x589 + x346 * poly_mix[124]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :292:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x591 = x590 + x348 * poly_mix[125]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :292:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x592 = x591 + x350 * poly_mix[126]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :292:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x593 = x592 + x352 * poly_mix[127]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :292:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x594 = x593 + x354 * poly_mix[128]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :292:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x595 = x594 + x356 * poly_mix[129]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :292:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x596 = x595 + x358 * poly_mix[130]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :292:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x597 = x596 + x360 * poly_mix[131]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :292:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x598 = x597 + x362 * poly_mix[132]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :292:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x599 = x598 + x364 * poly_mix[133]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :292:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x600 = x599 + x366 * poly_mix[134]; - // loc(callsite(unknown at callsite( ExtReg ( :11:11) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :48:27) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :292:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x601 = x600 + x368 * poly_mix[135]; - // loc(callsite(unknown at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:4) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x602 = arg0[457]; - // loc(callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:4) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x603 = x386 + x602 * x601 * poly_mix[137]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x604 = x603 + x144 * poly_mix[248]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x605 = x604 + x145 * poly_mix[249]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x606 = arg4 + x146 * x605 * poly_mix[385]; - // loc(callsite(unknown at callsite( NodeAddrToIdx ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :316:40) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :421:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x607 = x60 - x147; - // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( NodeAddrToIdx ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :316:57) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :421:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x608 = x607 * x59; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :94:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x609 = arg0[341]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :425:26) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x610 = arg3 + x609 * poly_mix[0]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :95:28) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x611 = arg0[458]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :425:26) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x612 = x610 + x611 * poly_mix[1]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :99:23) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x613 = arg0[459]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :425:26) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x614 = x612 + x613 * poly_mix[2]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :233:13) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x615 = arg0[460]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :425:26) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x616 = x614 + x615 * poly_mix[3]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :131:20) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x617 = arg0[461]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :425:26) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x618 = x616 + x617 * poly_mix[4]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :425:26) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x619 = x62 - x148; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :425:26) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x620 = x148 * x619; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :425:26) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x621 = x618 + x620 * poly_mix[5]; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:4) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :425:26) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x622 = x81 + x80; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:4) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :425:26) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x623 = x622 + x79; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:4) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :425:26) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x624 = x623 + x78; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:4) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :425:26) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x625 = x624 + x149; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:4) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :425:26) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x626 = x625 + x148; - // loc(callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:32) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :425:26) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x627 = x626 - x62; - // loc(callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:32) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :425:26) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x628 = x621 + x627 * poly_mix[6]; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:32) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :425:26) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x629 = x79 * x58; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:32) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :425:26) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x630 = x78 * x57; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:32) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :425:26) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x631 = x149 * x56; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:32) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :425:26) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x632 = x148 * x55; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:4) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :425:26) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x633 = x80 + x629; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:4) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :425:26) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x634 = x633 + x630; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:4) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :425:26) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x635 = x634 + x631; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:4) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :425:26) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x636 = x635 + x632; - // loc(callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:56) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :425:26) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x637 = x636 - x76; - // loc(callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:56) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :425:26) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x638 = x628 + x637 * poly_mix[7]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( IsU24 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :320:25) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :427:9) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x639 = x638 + x387 * poly_mix[8]; - // loc(callsite(unknown at callsite( IsU24 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :321:11) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :427:9) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x640 = x77 - x112; - // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( IsU24 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :321:20) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :427:9) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x641 = x640 * x61; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( U8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :22:22) at callsite( IsU24 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :321:9) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :427:9) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x642 = x144 - x62; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( U8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :22:22) at callsite( IsU24 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :321:9) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :427:9) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x643 = x639 + x642 * poly_mix[9]; - // loc(callsite( U8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :23:8) at callsite( IsU24 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :321:9) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :427:9) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x644 = x150 - x641; - // loc(callsite( U8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :23:8) at callsite( IsU24 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :321:9) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :427:9) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x645 = x643 + x644 * poly_mix[10]; - // loc(callsite(unknown at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :428:4) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x646 = x62 - x623; - // loc(callsite(unknown at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :429:22) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x647 = x608 + x62; - // loc(callsite(unknown at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :429:12) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x648 = x77 - x647; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( IsU24 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :320:25) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :429:11) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x649 = arg3 + x391 * poly_mix[0]; - // loc(callsite(unknown at callsite( IsU24 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :321:11) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :429:11) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x650 = x648 - x113; - // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( IsU24 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :321:20) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :429:11) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x651 = x650 * x61; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( U8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :22:22) at callsite( IsU24 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :321:9) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :429:11) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x652 = x145 - x62; - // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( U8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :22:22) at callsite( IsU24 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :321:9) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :429:11) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x653 = x649 + x652 * poly_mix[1]; - // loc(callsite( U8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :23:8) at callsite( IsU24 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :321:9) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :429:11) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x654 = x151 - x651; - // loc(callsite( U8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :23:8) at callsite( IsU24 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :321:9) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :429:11) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x655 = x653 + x654 * poly_mix[2]; - // loc(callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :428:4) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x656 = x645 + x623 * x655 * poly_mix[11]; - // loc(callsite(unknown at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :431:12) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x657 = x608 - x62; - // loc(callsite(unknown at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :431:22) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x658 = x657 - x77; - // loc(callsite(unknown at callsite( IsU24 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :321:11) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :431:11) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x659 = x658 - x113; - // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( IsU24 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :321:20) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :431:11) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x660 = x659 * x61; - // loc(callsite( U8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :23:8) at callsite( IsU24 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :321:9) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :431:11) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x661 = x151 - x660; - // loc(callsite( U8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :23:8) at callsite( IsU24 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :321:9) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :431:11) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x662 = x653 + x661 * poly_mix[2]; - // loc(callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :428:4) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x663 = x656 + x646 * x662 * poly_mix[14]; - // loc(callsite(unknown at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :58:61) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x664 = arg0[238]; - // loc(callsite(unknown at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :434:11) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x665 = x76 - x664; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( BitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :17:23) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :434:10) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x666 = x62 - x152; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( BitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :17:23) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :434:10) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x667 = x152 * x666; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( BitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :17:23) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :434:10) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x668 = x663 + x667 * poly_mix[17]; - // loc(callsite( BitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :18:8) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :434:10) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x669 = x665 - x152; - // loc(callsite( BitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :18:8) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :434:10) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x670 = x668 + x669 * poly_mix[18]; - // loc(callsite(unknown at callsite( NodeIdxToAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :317:51) at callsite( PoseidonPagingLoadNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :328:34) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :436:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x671 = x77 * x54; - // loc(callsite(unknown at callsite( NodeIdxToAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :317:38) at callsite( PoseidonPagingLoadNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :328:34) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :436:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x672 = x60 - x671; - // loc(callsite(unknown at callsite( PoseidonPagingLoadNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :337:34) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :436:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x673 = x77 * x58; - // loc(callsite(unknown at callsite( PoseidonPagingLoadNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :337:38) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :436:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x674 = x673 + x62; - // loc(callsite(unknown at callsite( NodeIdxToAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :317:51) at callsite( PoseidonPagingLoadNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :337:33) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :436:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x675 = x674 * x54; - // loc(callsite(unknown at callsite( NodeIdxToAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :317:38) at callsite( PoseidonPagingLoadNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :337:33) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :436:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x676 = x60 - x675; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :36:28) at callsite( PoseidonPagingLoadNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :333:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :436:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x677 = x672 - x153; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :36:28) at callsite( PoseidonPagingLoadNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :333:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :436:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x678 = arg5 + x677 * poly_mix[2]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :37:24) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x679 = arg0[462]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :37:24) at callsite( PoseidonPagingLoadNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :333:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :436:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x680 = x678 + x679 * poly_mix[3]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :38:26) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x681 = arg0[463]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :38:26) at callsite( PoseidonPagingLoadNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :333:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :436:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x682 = x680 + x681 * poly_mix[4]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :39:28) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x683 = arg0[464]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :39:28) at callsite( PoseidonPagingLoadNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :333:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :436:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x684 = x682 + x683 * poly_mix[5]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :41:27) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x685 = arg0[385]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :41:27) at callsite( PoseidonPagingLoadNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :333:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :436:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x686 = x684 + x685 * poly_mix[6]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :42:26) at callsite( PoseidonPagingLoadNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :333:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :436:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x687 = x686 + x312 * poly_mix[7]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :43:27) at callsite( PoseidonPagingLoadNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :333:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :436:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x688 = x676 - x154; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :43:27) at callsite( PoseidonPagingLoadNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :333:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :436:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x689 = x687 + x688 * poly_mix[8]; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:11) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :18:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x690 = arg0[465]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :44:23) at callsite( PoseidonPagingLoadNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :333:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :436:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x691 = x689 + x690 * poly_mix[9]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :45:22) at callsite( PoseidonInvalid ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :61:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :452:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x692 = arg0[466]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :45:22) at callsite( PoseidonPagingLoadNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :333:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :436:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x693 = x691 + x692 * poly_mix[10]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x694 = arg0[392]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :333:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :436:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x695 = x693 + x694 * poly_mix[11]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x696 = arg0[393]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :333:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :436:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x697 = x695 + x696 * poly_mix[12]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x698 = arg0[394]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :333:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :436:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x699 = x697 + x698 * poly_mix[13]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x700 = arg0[395]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :333:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :436:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x701 = x699 + x700 * poly_mix[14]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x702 = arg0[396]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :333:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :436:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x703 = x701 + x702 * poly_mix[15]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x704 = arg0[397]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :333:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :436:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x705 = x703 + x704 * poly_mix[16]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x706 = arg0[398]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :333:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :436:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x707 = x705 + x706 * poly_mix[17]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x708 = arg0[399]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :333:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :436:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x709 = x707 + x708 * poly_mix[18]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x710 = arg0[400]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :333:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :436:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x711 = x709 + x710 * poly_mix[19]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x712 = arg0[401]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :333:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :436:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x713 = x711 + x712 * poly_mix[20]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x714 = arg0[402]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :333:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :436:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x715 = x713 + x714 * poly_mix[21]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x716 = arg0[403]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :333:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :436:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x717 = x715 + x716 * poly_mix[22]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x718 = arg0[404]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :333:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :436:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x719 = x717 + x718 * poly_mix[23]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x720 = arg0[405]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :333:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :436:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x721 = x719 + x720 * poly_mix[24]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x722 = arg0[406]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :333:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :436:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x723 = x721 + x722 * poly_mix[25]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x724 = arg0[407]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :333:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :436:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x725 = x723 + x724 * poly_mix[26]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x726 = arg0[408]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :333:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :436:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x727 = x725 + x726 * poly_mix[27]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x728 = arg0[409]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :333:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :436:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x729 = x727 + x728 * poly_mix[28]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x730 = arg0[410]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :333:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :436:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x731 = x729 + x730 * poly_mix[29]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x732 = arg0[411]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :333:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :436:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x733 = x731 + x732 * poly_mix[30]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x734 = arg0[412]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :333:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :436:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x735 = x733 + x734 * poly_mix[31]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x736 = arg0[413]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :333:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :436:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x737 = x735 + x736 * poly_mix[32]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x738 = arg0[414]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :333:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :436:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x739 = x737 + x738 * poly_mix[33]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x740 = arg0[415]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :333:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :436:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x741 = x739 + x740 * poly_mix[34]; - // loc(callsite(unknown at callsite( ExtReg ( :11:11) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :48:27) at callsite( PoseidonPagingLoadNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :333:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :436:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x742 = x741 + x368 * poly_mix[35]; - // loc(callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :435:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x743 = x670 + x81 * x742 * poly_mix[19]; - // loc(callsite(unknown at callsite( PoseidonPagingLoadPage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :346:13) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :437:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x744 = x77 - x53; - // loc(callsite(unknown at callsite( PoseidonPagingLoadPage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :359:20) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :437:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x745 = x744 * x52; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :37:24) at callsite( PoseidonInvalid ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :61:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :452:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x746 = arg0[467]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :37:24) at callsite( PoseidonPagingLoadPage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :355:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :437:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x747 = x678 + x746 * poly_mix[3]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :38:26) at callsite( PoseidonPagingLoadPage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :355:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :437:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x748 = x747 + x681 * poly_mix[4]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :39:28) at callsite( PoseidonPagingLoadPage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :355:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :437:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x749 = x748 + x683 * poly_mix[5]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :41:27) at callsite( PoseidonPagingLoadPage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :355:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :437:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x750 = x749 + x685 * poly_mix[6]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :42:26) at callsite( PoseidonPagingLoadPage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :355:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :437:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x751 = x750 + x312 * poly_mix[7]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :43:27) at callsite( PoseidonPagingLoadPage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :355:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :437:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x752 = x745 - x154; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :43:27) at callsite( PoseidonPagingLoadPage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :355:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :437:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x753 = x751 + x752 * poly_mix[8]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :44:23) at callsite( PoseidonPagingLoadPage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :355:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :437:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x754 = x66 - x155; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :44:23) at callsite( PoseidonPagingLoadPage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :355:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :437:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x755 = x753 + x754 * poly_mix[9]; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:11) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :19:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x756 = arg0[468]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :45:22) at callsite( PoseidonPagingLoadPage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :355:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :437:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x757 = x755 + x756 * poly_mix[10]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadPage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :355:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :437:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x758 = x757 + x694 * poly_mix[11]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadPage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :355:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :437:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x759 = x758 + x696 * poly_mix[12]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadPage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :355:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :437:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x760 = x759 + x698 * poly_mix[13]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadPage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :355:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :437:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x761 = x760 + x700 * poly_mix[14]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadPage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :355:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :437:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x762 = x761 + x702 * poly_mix[15]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadPage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :355:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :437:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x763 = x762 + x704 * poly_mix[16]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadPage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :355:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :437:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x764 = x763 + x706 * poly_mix[17]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadPage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :355:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :437:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x765 = x764 + x708 * poly_mix[18]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadPage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :355:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :437:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x766 = x765 + x710 * poly_mix[19]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadPage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :355:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :437:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x767 = x766 + x712 * poly_mix[20]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadPage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :355:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :437:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x768 = x767 + x714 * poly_mix[21]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadPage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :355:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :437:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x769 = x768 + x716 * poly_mix[22]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadPage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :355:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :437:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x770 = x769 + x718 * poly_mix[23]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadPage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :355:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :437:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x771 = x770 + x720 * poly_mix[24]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadPage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :355:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :437:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x772 = x771 + x722 * poly_mix[25]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadPage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :355:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :437:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x773 = x772 + x724 * poly_mix[26]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadPage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :355:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :437:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x774 = x773 + x726 * poly_mix[27]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadPage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :355:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :437:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x775 = x774 + x728 * poly_mix[28]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadPage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :355:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :437:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x776 = x775 + x730 * poly_mix[29]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadPage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :355:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :437:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x777 = x776 + x732 * poly_mix[30]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadPage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :355:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :437:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x778 = x777 + x734 * poly_mix[31]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadPage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :355:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :437:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x779 = x778 + x736 * poly_mix[32]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadPage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :355:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :437:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x780 = x779 + x738 * poly_mix[33]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadPage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :355:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :437:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x781 = x780 + x740 * poly_mix[34]; - // loc(callsite(unknown at callsite( ExtReg ( :11:11) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :48:27) at callsite( PoseidonPagingLoadPage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :355:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :437:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x782 = x781 + x368 * poly_mix[35]; - // loc(callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :435:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x783 = x743 + x80 * x782 * poly_mix[55]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :36:28) at callsite( PoseidonPagingLoadDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :369:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :438:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x784 = x51 - x153; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :36:28) at callsite( PoseidonPagingLoadDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :369:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :438:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x785 = arg5 + x784 * poly_mix[2]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :37:24) at callsite( PoseidonPagingLoadDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :369:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :438:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x786 = x785 + x746 * poly_mix[3]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :38:26) at callsite( PoseidonInvalid ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :61:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :452:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x787 = arg0[469]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :38:26) at callsite( PoseidonPagingLoadDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :369:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :438:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x788 = x786 + x787 * poly_mix[4]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :39:28) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :105:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x789 = arg0[389]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :39:28) at callsite( PoseidonPagingLoadDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :369:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :438:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x790 = x788 + x789 * poly_mix[5]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :15:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x791 = arg0[470]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :41:27) at callsite( PoseidonPagingLoadDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :369:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :438:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x792 = x790 + x791 * poly_mix[6]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :42:26) at callsite( PoseidonPagingLoadDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :369:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :438:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x793 = x792 + x312 * poly_mix[7]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :43:27) at callsite( PoseidonPagingLoadDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :369:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :438:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x794 = x793 + x314 * poly_mix[8]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :44:23) at callsite( PoseidonPagingLoadDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :369:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :438:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x795 = x794 + x316 * poly_mix[9]; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:23) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :19:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x796 = arg0[471]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :45:22) at callsite( PoseidonPagingLoadDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :369:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :438:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x797 = x795 + x796 * poly_mix[10]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :369:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :438:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x798 = x797 + x694 * poly_mix[11]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :369:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :438:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x799 = x798 + x696 * poly_mix[12]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :369:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :438:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x800 = x799 + x698 * poly_mix[13]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :369:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :438:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x801 = x800 + x700 * poly_mix[14]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :369:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :438:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x802 = x801 + x702 * poly_mix[15]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :369:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :438:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x803 = x802 + x704 * poly_mix[16]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :369:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :438:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x804 = x803 + x706 * poly_mix[17]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :369:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :438:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x805 = x804 + x708 * poly_mix[18]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :369:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :438:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x806 = x805 + x710 * poly_mix[19]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :369:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :438:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x807 = x806 + x712 * poly_mix[20]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :369:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :438:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x808 = x807 + x714 * poly_mix[21]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :369:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :438:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x809 = x808 + x716 * poly_mix[22]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :369:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :438:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x810 = x809 + x718 * poly_mix[23]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :369:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :438:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x811 = x810 + x720 * poly_mix[24]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :369:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :438:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x812 = x811 + x722 * poly_mix[25]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :369:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :438:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x813 = x812 + x724 * poly_mix[26]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :369:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :438:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x814 = x813 + x726 * poly_mix[27]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :369:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :438:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x815 = x814 + x728 * poly_mix[28]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :369:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :438:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x816 = x815 + x730 * poly_mix[29]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :369:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :438:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x817 = x816 + x732 * poly_mix[30]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :369:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :438:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x818 = x817 + x734 * poly_mix[31]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :369:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :438:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x819 = x818 + x736 * poly_mix[32]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :369:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :438:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x820 = x819 + x738 * poly_mix[33]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :369:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :438:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x821 = x820 + x740 * poly_mix[34]; - // loc(callsite(unknown at callsite( ExtReg ( :11:11) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :48:27) at callsite( PoseidonPagingLoadDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :369:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :438:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x822 = x821 + x368 * poly_mix[35]; - // loc(callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :435:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x823 = x783 + x79 * x822 * poly_mix[91]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :38:26) at callsite( PoseidonPagingStorePage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :403:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :439:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x824 = x747 + x787 * poly_mix[4]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :39:28) at callsite( PoseidonPagingStorePage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :403:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :439:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x825 = x58 - x156; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :39:28) at callsite( PoseidonPagingStorePage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :403:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :439:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x826 = x824 + x825 * poly_mix[5]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :41:27) at callsite( PoseidonPagingStorePage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :403:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :439:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x827 = x826 + x685 * poly_mix[6]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :42:26) at callsite( PoseidonPagingStorePage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :403:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :439:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x828 = x827 + x312 * poly_mix[7]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :43:27) at callsite( PoseidonPagingStorePage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :403:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :439:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x829 = x828 + x752 * poly_mix[8]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :44:23) at callsite( PoseidonPagingStorePage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :403:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :439:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x830 = x829 + x754 * poly_mix[9]; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:35) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :19:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x831 = arg0[472]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :45:22) at callsite( PoseidonPagingStorePage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :403:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :439:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x832 = x830 + x831 * poly_mix[10]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStorePage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :403:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :439:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x833 = x832 + x694 * poly_mix[11]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStorePage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :403:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :439:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x834 = x833 + x696 * poly_mix[12]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStorePage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :403:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :439:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x835 = x834 + x698 * poly_mix[13]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStorePage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :403:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :439:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x836 = x835 + x700 * poly_mix[14]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStorePage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :403:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :439:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x837 = x836 + x702 * poly_mix[15]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStorePage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :403:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :439:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x838 = x837 + x704 * poly_mix[16]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStorePage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :403:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :439:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x839 = x838 + x706 * poly_mix[17]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStorePage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :403:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :439:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x840 = x839 + x708 * poly_mix[18]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStorePage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :403:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :439:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x841 = x840 + x710 * poly_mix[19]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStorePage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :403:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :439:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x842 = x841 + x712 * poly_mix[20]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStorePage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :403:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :439:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x843 = x842 + x714 * poly_mix[21]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStorePage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :403:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :439:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x844 = x843 + x716 * poly_mix[22]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStorePage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :403:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :439:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x845 = x844 + x718 * poly_mix[23]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStorePage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :403:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :439:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x846 = x845 + x720 * poly_mix[24]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStorePage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :403:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :439:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x847 = x846 + x722 * poly_mix[25]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStorePage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :403:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :439:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x848 = x847 + x724 * poly_mix[26]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStorePage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :403:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :439:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x849 = x848 + x726 * poly_mix[27]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStorePage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :403:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :439:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x850 = x849 + x728 * poly_mix[28]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStorePage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :403:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :439:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x851 = x850 + x730 * poly_mix[29]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStorePage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :403:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :439:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x852 = x851 + x732 * poly_mix[30]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStorePage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :403:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :439:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x853 = x852 + x734 * poly_mix[31]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStorePage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :403:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :439:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x854 = x853 + x736 * poly_mix[32]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStorePage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :403:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :439:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x855 = x854 + x738 * poly_mix[33]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStorePage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :403:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :439:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x856 = x855 + x740 * poly_mix[34]; - // loc(callsite(unknown at callsite( ExtReg ( :11:11) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :48:27) at callsite( PoseidonPagingStorePage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :403:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :439:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x857 = x856 + x368 * poly_mix[35]; - // loc(callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :435:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x858 = x823 + x78 * x857 * poly_mix[127]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :38:26) at callsite( PoseidonPagingStoreNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :381:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :440:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x859 = x680 + x787 * poly_mix[4]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :39:28) at callsite( PoseidonPagingStoreNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :381:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :440:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x860 = x859 + x825 * poly_mix[5]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :41:27) at callsite( PoseidonPagingStoreNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :381:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :440:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x861 = x860 + x685 * poly_mix[6]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :42:26) at callsite( PoseidonPagingStoreNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :381:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :440:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x862 = x861 + x312 * poly_mix[7]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :43:27) at callsite( PoseidonPagingStoreNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :381:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :440:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x863 = x862 + x688 * poly_mix[8]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :44:23) at callsite( PoseidonPagingStoreNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :381:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :440:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x864 = x863 + x690 * poly_mix[9]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :45:22) at callsite( PoseidonPagingStoreNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :381:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :440:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x865 = x56 - x157; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :45:22) at callsite( PoseidonPagingStoreNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :381:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :440:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x866 = x864 + x865 * poly_mix[10]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :381:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :440:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x867 = x866 + x694 * poly_mix[11]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :381:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :440:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x868 = x867 + x696 * poly_mix[12]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :381:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :440:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x869 = x868 + x698 * poly_mix[13]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :381:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :440:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x870 = x869 + x700 * poly_mix[14]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :381:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :440:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x871 = x870 + x702 * poly_mix[15]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :381:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :440:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x872 = x871 + x704 * poly_mix[16]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :381:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :440:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x873 = x872 + x706 * poly_mix[17]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :381:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :440:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x874 = x873 + x708 * poly_mix[18]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :381:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :440:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x875 = x874 + x710 * poly_mix[19]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :381:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :440:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x876 = x875 + x712 * poly_mix[20]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :381:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :440:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x877 = x876 + x714 * poly_mix[21]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :381:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :440:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x878 = x877 + x716 * poly_mix[22]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :381:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :440:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x879 = x878 + x718 * poly_mix[23]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :381:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :440:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x880 = x879 + x720 * poly_mix[24]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :381:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :440:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x881 = x880 + x722 * poly_mix[25]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :381:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :440:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x882 = x881 + x724 * poly_mix[26]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :381:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :440:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x883 = x882 + x726 * poly_mix[27]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :381:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :440:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x884 = x883 + x728 * poly_mix[28]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :381:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :440:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x885 = x884 + x730 * poly_mix[29]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :381:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :440:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x886 = x885 + x732 * poly_mix[30]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :381:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :440:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x887 = x886 + x734 * poly_mix[31]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :381:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :440:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x888 = x887 + x736 * poly_mix[32]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :381:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :440:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x889 = x888 + x738 * poly_mix[33]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :381:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :440:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x890 = x889 + x740 * poly_mix[34]; - // loc(callsite(unknown at callsite( ExtReg ( :11:11) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :48:27) at callsite( PoseidonPagingStoreNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :381:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :440:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x891 = x890 + x368 * poly_mix[35]; - // loc(callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :435:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x892 = x858 + x149 * x891 * poly_mix[163]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :36:28) at callsite( PoseidonPagingStoreDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :417:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :441:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x893 = x60 - x153; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :36:28) at callsite( PoseidonPagingStoreDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :417:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :441:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x894 = arg5 + x893 * poly_mix[2]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :37:24) at callsite( PoseidonPagingStoreDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :417:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :441:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x895 = x894 + x746 * poly_mix[3]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :38:26) at callsite( PoseidonPagingStoreDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :417:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :441:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x896 = x895 + x787 * poly_mix[4]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :39:28) at callsite( PoseidonPagingStoreDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :417:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :441:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x897 = x896 + x789 * poly_mix[5]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :41:27) at callsite( PoseidonPagingStoreDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :417:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :441:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x898 = x55 - x82; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :41:27) at callsite( PoseidonPagingStoreDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :417:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :441:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x899 = x897 + x898 * poly_mix[6]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :42:26) at callsite( PoseidonPagingStoreDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :417:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :441:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x900 = x899 + x312 * poly_mix[7]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :43:27) at callsite( PoseidonPagingStoreDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :417:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :441:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x901 = x900 + x314 * poly_mix[8]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :44:23) at callsite( PoseidonPagingStoreDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :417:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :441:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x902 = x901 + x316 * poly_mix[9]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :45:22) at callsite( PoseidonPagingStoreDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :417:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :441:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x903 = x55 - x157; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :45:22) at callsite( PoseidonPagingStoreDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :417:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :441:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x904 = x902 + x903 * poly_mix[10]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :417:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :441:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x905 = x904 + x694 * poly_mix[11]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :417:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :441:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x906 = x905 + x696 * poly_mix[12]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :417:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :441:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x907 = x906 + x698 * poly_mix[13]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :417:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :441:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x908 = x907 + x700 * poly_mix[14]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :417:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :441:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x909 = x908 + x702 * poly_mix[15]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :417:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :441:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x910 = x909 + x704 * poly_mix[16]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :417:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :441:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x911 = x910 + x706 * poly_mix[17]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :417:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :441:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x912 = x911 + x708 * poly_mix[18]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :417:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :441:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x913 = x912 + x710 * poly_mix[19]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :417:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :441:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x914 = x913 + x712 * poly_mix[20]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :417:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :441:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x915 = x914 + x714 * poly_mix[21]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :417:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :441:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x916 = x915 + x716 * poly_mix[22]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :417:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :441:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x917 = x916 + x718 * poly_mix[23]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :417:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :441:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x918 = x917 + x720 * poly_mix[24]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :417:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :441:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x919 = x918 + x722 * poly_mix[25]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :417:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :441:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x920 = x919 + x724 * poly_mix[26]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :417:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :441:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x921 = x920 + x726 * poly_mix[27]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :417:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :441:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x922 = x921 + x728 * poly_mix[28]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :417:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :441:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x923 = x922 + x730 * poly_mix[29]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :417:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :441:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x924 = x923 + x732 * poly_mix[30]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :417:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :441:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x925 = x924 + x734 * poly_mix[31]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :417:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :441:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x926 = x925 + x736 * poly_mix[32]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :417:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :441:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x927 = x926 + x738 * poly_mix[33]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :417:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :441:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x928 = x927 + x740 * poly_mix[34]; - // loc(callsite(unknown at callsite( ExtReg ( :11:11) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :48:27) at callsite( PoseidonPagingStoreDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :417:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :441:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x929 = x928 + x368 * poly_mix[35]; - // loc(callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :435:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) - FpExt x930 = x892 + x148 * x929 * poly_mix[176]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x931 = x930 + x158 * poly_mix[210]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x932 = x931 + x159 * poly_mix[211]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x933 = x932 + x160 * poly_mix[212]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x934 = x933 + x161 * poly_mix[213]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x935 = x934 + x162 * poly_mix[214]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x936 = x935 + x163 * poly_mix[215]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x937 = x936 + x164 * poly_mix[216]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x938 = x937 + x165 * poly_mix[217]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x939 = x938 + x166 * poly_mix[218]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x940 = x939 + x167 * poly_mix[219]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x941 = x940 + x168 * poly_mix[220]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x942 = x941 + x169 * poly_mix[221]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x943 = x942 + x170 * poly_mix[222]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x944 = x943 + x171 * poly_mix[223]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x945 = x944 + x172 * poly_mix[224]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x946 = x945 + x173 * poly_mix[225]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x947 = x946 + x174 * poly_mix[226]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x948 = x947 + x175 * poly_mix[227]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x949 = x948 + x176 * poly_mix[228]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x950 = x949 + x177 * poly_mix[229]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x951 = x950 + x178 * poly_mix[230]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x952 = x951 + x179 * poly_mix[231]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x953 = x952 + x180 * poly_mix[232]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x954 = x953 + x181 * poly_mix[233]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x955 = x954 + x97 * poly_mix[234]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x956 = x955 + x98 * poly_mix[235]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x957 = x956 + x99 * poly_mix[236]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x958 = x957 + x100 * poly_mix[237]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x959 = x958 + x101 * poly_mix[238]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x960 = x959 + x102 * poly_mix[239]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x961 = x960 + x103 * poly_mix[240]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x962 = x961 + x104 * poly_mix[241]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x963 = x962 + x105 * poly_mix[242]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x964 = x963 + x106 * poly_mix[243]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x965 = x964 + x107 * poly_mix[244]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x966 = x965 + x108 * poly_mix[245]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x967 = x966 + x109 * poly_mix[246]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x968 = x967 + x110 * poly_mix[247]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x969 = x606 + x182 * x968 * poly_mix[387]; - // loc(callsite(unknown at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :303:22) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x970 = x183 - x112; - // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :303:31) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x971 = x970 * x61; - // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :303:20) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x972 = x113 - x971; - // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :303:20) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x973 = x392 + x972 * poly_mix[2]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x974 = x973 + x395 * poly_mix[3]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x975 = x974 + x397 * poly_mix[4]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x976 = x975 + x67 * poly_mix[5]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x977 = x976 + x67 * poly_mix[6]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x978 = arg0[473]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x979 = x977 + x978 * poly_mix[7]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x980 = x979 + x403 * poly_mix[8]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x981 = x980 + x405 * poly_mix[9]; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x982 = x981 + x407 * poly_mix[10]; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x983 = x115 - x971; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x984 = x982 + x983 * poly_mix[11]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :302:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x985 = x984 + x411 * poly_mix[12]; - // loc(callsite(unknown at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :303:22) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x986 = x184 - x116; - // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :303:31) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x987 = x986 * x61; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :303:20) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x988 = x985 + x415 * poly_mix[13]; - // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :303:20) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x989 = x117 - x987; - // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :303:20) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x990 = x988 + x989 * poly_mix[14]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x991 = x990 + x419 * poly_mix[15]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x992 = x991 + x421 * poly_mix[16]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x993 = x992 + x67 * poly_mix[17]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x994 = x993 + x67 * poly_mix[18]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x995 = arg0[474]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x996 = x994 + x995 * poly_mix[19]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x997 = x996 + x427 * poly_mix[20]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x998 = x997 + x429 * poly_mix[21]; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x999 = x998 + x431 * poly_mix[22]; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x1000 = x119 - x987; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x1001 = x999 + x1000 * poly_mix[23]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :302:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x1002 = x1001 + x435 * poly_mix[24]; - // loc(callsite(unknown at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :303:22) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x1003 = x185 - x120; - // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :303:31) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1004 = x1003 * x61; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :303:20) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1005 = x1002 + x439 * poly_mix[25]; - // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :303:20) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x1006 = x121 - x1004; - // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :303:20) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x1007 = x1005 + x1006 * poly_mix[26]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1008 = x1007 + x443 * poly_mix[27]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1009 = x1008 + x445 * poly_mix[28]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1010 = x1009 + x67 * poly_mix[29]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1011 = x1010 + x67 * poly_mix[30]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1012 = arg0[475]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1013 = x1011 + x1012 * poly_mix[31]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1014 = x1013 + x451 * poly_mix[32]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1015 = x1014 + x453 * poly_mix[33]; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x1016 = x1015 + x455 * poly_mix[34]; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x1017 = x123 - x1004; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x1018 = x1016 + x1017 * poly_mix[35]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :302:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x1019 = x1018 + x459 * poly_mix[36]; - // loc(callsite(unknown at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :303:22) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x1020 = x186 - x124; - // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :303:31) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1021 = x1020 * x61; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :303:20) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1022 = x1019 + x463 * poly_mix[37]; - // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :303:20) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x1023 = x125 - x1021; - // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :303:20) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x1024 = x1022 + x1023 * poly_mix[38]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1025 = x1024 + x467 * poly_mix[39]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1026 = x1025 + x469 * poly_mix[40]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1027 = x1026 + x67 * poly_mix[41]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1028 = x1027 + x67 * poly_mix[42]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1029 = arg0[476]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1030 = x1028 + x1029 * poly_mix[43]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1031 = x1030 + x475 * poly_mix[44]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1032 = x1031 + x477 * poly_mix[45]; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x1033 = x1032 + x479 * poly_mix[46]; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x1034 = x127 - x1021; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x1035 = x1033 + x1034 * poly_mix[47]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :302:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x1036 = x1035 + x483 * poly_mix[48]; - // loc(callsite(unknown at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :303:22) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x1037 = x187 - x128; - // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :303:31) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1038 = x1037 * x61; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :303:20) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1039 = x1036 + x487 * poly_mix[49]; - // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :303:20) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x1040 = x129 - x1038; - // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :303:20) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x1041 = x1039 + x1040 * poly_mix[50]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1042 = x1041 + x491 * poly_mix[51]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1043 = x1042 + x493 * poly_mix[52]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1044 = x1043 + x67 * poly_mix[53]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1045 = x1044 + x67 * poly_mix[54]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1046 = arg0[477]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1047 = x1045 + x1046 * poly_mix[55]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1048 = x1047 + x204 * poly_mix[56]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1049 = x1048 + x206 * poly_mix[57]; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x1050 = x1049 + x501 * poly_mix[58]; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x1051 = x131 - x1038; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x1052 = x1050 + x1051 * poly_mix[59]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :302:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x1053 = x1052 + x505 * poly_mix[60]; - // loc(callsite(unknown at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :303:22) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x1054 = x188 - x132; - // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :303:31) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1055 = x1054 * x61; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :303:20) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1056 = x1053 + x509 * poly_mix[61]; - // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :303:20) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x1057 = x133 - x1055; - // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :303:20) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x1058 = x1056 + x1057 * poly_mix[62]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1059 = x1058 + x211 * poly_mix[63]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1060 = x1059 + x213 * poly_mix[64]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1061 = x1060 + x67 * poly_mix[65]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1062 = x1061 + x67 * poly_mix[66]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1063 = arg0[478]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1064 = x1062 + x1063 * poly_mix[67]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1065 = x1064 + x224 * poly_mix[68]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1066 = x1065 + x226 * poly_mix[69]; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x1067 = x1066 + x520 * poly_mix[70]; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x1068 = x135 - x1055; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x1069 = x1067 + x1068 * poly_mix[71]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :302:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x1070 = x1069 + x524 * poly_mix[72]; - // loc(callsite(unknown at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :303:22) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x1071 = x189 - x136; - // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :303:31) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1072 = x1071 * x61; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :303:20) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1073 = x1070 + x528 * poly_mix[73]; - // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :303:20) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x1074 = x137 - x1072; - // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :303:20) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x1075 = x1073 + x1074 * poly_mix[74]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1076 = x1075 + x231 * poly_mix[75]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1077 = x1076 + x233 * poly_mix[76]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1078 = x1077 + x67 * poly_mix[77]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1079 = x1078 + x67 * poly_mix[78]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1080 = arg0[479]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1081 = x1079 + x1080 * poly_mix[79]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1082 = x1081 + x244 * poly_mix[80]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1083 = x1082 + x246 * poly_mix[81]; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x1084 = x1083 + x539 * poly_mix[82]; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x1085 = x139 - x1072; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x1086 = x1084 + x1085 * poly_mix[83]; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :302:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x1087 = x1086 + x543 * poly_mix[84]; - // loc(callsite(unknown at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :303:22) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x1088 = x190 - x140; - // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :303:31) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1089 = x1088 * x61; - // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :303:20) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1090 = x1087 + x547 * poly_mix[85]; - // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :303:20) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x1091 = x141 - x1089; - // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :303:20) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x1092 = x1090 + x1091 * poly_mix[86]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1093 = x1092 + x251 * poly_mix[87]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1094 = x1093 + x253 * poly_mix[88]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1095 = x1094 + x67 * poly_mix[89]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1096 = x1095 + x67 * poly_mix[90]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1097 = arg0[480]; - // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1098 = x1096 + x1097 * poly_mix[91]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1099 = x1098 + x264 * poly_mix[92]; - // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1100 = x1099 + x266 * poly_mix[93]; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x1101 = x1100 + x558 * poly_mix[94]; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x1102 = x143 - x1089; - // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x1103 = x1101 + x1102 * poly_mix[95]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :34:26) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :306:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1104 = x1103 + x298 * poly_mix[96]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :35:27) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :306:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1105 = x1104 + x300 * poly_mix[97]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :36:28) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :306:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1106 = x1105 + x302 * poly_mix[98]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :37:24) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :306:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1107 = x1106 + x304 * poly_mix[99]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :38:26) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :306:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1108 = x1107 + x306 * poly_mix[100]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :39:28) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :306:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1109 = x1108 + x308 * poly_mix[101]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :41:27) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :306:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1110 = x66 - x82; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :41:27) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :306:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1111 = x1109 + x1110 * poly_mix[102]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :42:26) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :306:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1112 = x1111 + x312 * poly_mix[103]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :43:27) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :306:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1113 = x1112 + x314 * poly_mix[104]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :44:23) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :306:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1114 = x1113 + x316 * poly_mix[105]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :45:22) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :306:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1115 = x1114 + x318 * poly_mix[106]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :306:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1116 = x1115 + x320 * poly_mix[107]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :306:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1117 = x1116 + x322 * poly_mix[108]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :306:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1118 = x1117 + x324 * poly_mix[109]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :306:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1119 = x1118 + x326 * poly_mix[110]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :306:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1120 = x1119 + x328 * poly_mix[111]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :306:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1121 = x1120 + x330 * poly_mix[112]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :306:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1122 = x1121 + x332 * poly_mix[113]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :306:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1123 = x1122 + x334 * poly_mix[114]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :306:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1124 = x1123 + x336 * poly_mix[115]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :306:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1125 = x1124 + x338 * poly_mix[116]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :306:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1126 = x1125 + x340 * poly_mix[117]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :306:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1127 = x1126 + x342 * poly_mix[118]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :306:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1128 = x1127 + x344 * poly_mix[119]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :306:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1129 = x1128 + x346 * poly_mix[120]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :306:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1130 = x1129 + x348 * poly_mix[121]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :306:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1131 = x1130 + x350 * poly_mix[122]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :306:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1132 = x1131 + x352 * poly_mix[123]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :306:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1133 = x1132 + x354 * poly_mix[124]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :306:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1134 = x1133 + x356 * poly_mix[125]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :306:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1135 = x1134 + x358 * poly_mix[126]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :306:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1136 = x1135 + x360 * poly_mix[127]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :306:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1137 = x1136 + x362 * poly_mix[128]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :306:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1138 = x1137 + x364 * poly_mix[129]; - // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :306:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1139 = x1138 + x366 * poly_mix[130]; - // loc(callsite(unknown at callsite( ExtReg ( :11:11) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :48:27) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :306:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - FpExt x1140 = x1139 + x368 * poly_mix[131]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1141 = x1140 + x144 * poly_mix[132]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1142 = x1141 + x145 * poly_mix[133]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1143 = x969 + x191 * x1142 * poly_mix[388]; - // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :460:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - FpExt x1144 = x1143 + x67 * poly_mix[389]; - // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) - FpExt x1145 = arg6 + x192 * x1144 * poly_mix[394]; - // loc(callsite(unknown at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :241:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x1146 = x193 - x57; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:4) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :19:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1147 = arg0[481]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :241:22) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1148 = arg3 + x1147 * poly_mix[0]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:4) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :241:22) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1149 = x1146 * x194; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:11) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :19:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1150 = arg0[482]; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :241:22) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x1151 = x1149 - x1150; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :241:22) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x1152 = x1148 + x1151 * poly_mix[1]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:4) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :241:22) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1153 = x158 * x1146; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:17) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :241:22) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x1154 = x1152 + x1153 * poly_mix[2]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:4) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :241:22) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1155 = x158 * x194; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:17) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :241:22) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x1156 = x1154 + x1155 * poly_mix[3]; - // loc(callsite(unknown at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :242:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x1157 = x193 - x50; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :21:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1158 = arg0[127]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :242:22) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1159 = x1156 + x1158 * poly_mix[4]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:4) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :242:22) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1160 = x1157 * x195; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :21:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1161 = arg0[483]; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :242:22) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x1162 = x1160 - x1161; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :242:22) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x1163 = x1159 + x1162 * poly_mix[5]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:4) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :242:22) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1164 = x196 * x1157; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:17) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :242:22) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x1165 = x1163 + x1164 * poly_mix[6]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:4) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :242:22) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1166 = x196 * x195; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:17) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :242:22) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x1167 = x1165 + x1166 * poly_mix[7]; - // loc(callsite(unknown at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :243:21) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x1168 = x197 - x62; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:4) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :23:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1169 = arg0[484]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :244:23) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1170 = x1167 + x1169 * poly_mix[8]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:4) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :244:23) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1171 = x1168 * x159; - // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:11) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :23:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1172 = arg0[485]; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :244:23) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x1173 = x1171 - x1172; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :244:23) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x1174 = x1170 + x1173 * poly_mix[9]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:4) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :244:23) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1175 = x198 * x1168; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:17) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :244:23) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x1176 = x1174 + x1175 * poly_mix[10]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:4) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :244:23) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1177 = x198 * x159; - // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:17) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :244:23) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - FpExt x1178 = x1176 + x1177 * poly_mix[11]; - // loc(callsite(unknown at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :245:21) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x1179 = x197 - x196; - // loc(callsite(unknown at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :245:21) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - arg0[538] = x1179; - // loc(callsite(unknown at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :247:6) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x1180 = x158 * x49; - // loc(callsite(unknown at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :248:11) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x1181 = x1150 - x196; - // loc(callsite(unknown at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :248:30) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x1182 = x1181 * x48; - // loc(callsite(unknown at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :247:40) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x1183 = x1180 + x1182; - // loc(callsite(unknown at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :249:6) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x1184 = x196 * x1172; - // loc(callsite(unknown at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :249:31) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x1185 = x1184 * x47; - // loc(callsite(unknown at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :248:56) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x1186 = x1183 + x1185; - // loc(callsite(unknown at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :250:6) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x1187 = x196 * x198; - // loc(callsite(unknown at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :250:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x1188 = x1187 * x46; - // loc(callsite(unknown at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :249:55) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x1189 = x1186 + x1188; - // loc(callsite(unknown at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :249:55) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - arg0[535] = x1189; - // loc(callsite(unknown at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :251:54) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x1190 = x193 + x62; - // loc(callsite(unknown at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :251:44) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x1191 = x1181 * x1190; - // loc(callsite(unknown at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :251:44) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - arg0[536] = x1191; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x1192 = arg0[2]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :115:23) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1193 = x1178 + x1192 * poly_mix[12]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x1194 = arg0[3]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :115:23) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1195 = x1193 + x1194 * poly_mix[13]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x1196 = arg0[4]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :115:23) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1197 = x1195 + x1196 * poly_mix[14]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x1198 = arg0[29]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :115:23) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1199 = x1197 + x1198 * poly_mix[15]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x1200 = arg0[30]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :115:23) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1201 = x1199 + x1200 * poly_mix[16]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x1202 = arg0[31]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :115:23) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1203 = x1201 + x1202 * poly_mix[17]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x1204 = arg0[32]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :115:23) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1205 = x1203 + x1204 * poly_mix[18]; - // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) - auto x1206 = arg0[33]; - // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :115:23) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - FpExt x1207 = x1205 + x1206 * poly_mix[19]; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:4) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :115:23) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1208 = x138 + x139; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:4) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :115:23) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1209 = x1208 + x172; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:4) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :115:23) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1210 = x1209 + x73; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:4) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :115:23) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1211 = x1210 + x199; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:4) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :115:23) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1212 = x1211 + x200; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:4) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :115:23) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1213 = x1212 + x201; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:4) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :115:23) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1214 = x1213 + x173; - // loc(callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:32) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :115:23) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1215 = x1214 - x62; - // loc(callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:32) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :115:23) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1216 = x1207 + x1215 * poly_mix[20]; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:32) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :115:23) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1217 = x73 * x57; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:32) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :115:23) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1218 = x199 * x56; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:32) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :115:23) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1219 = x200 * x55; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:32) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :115:23) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1220 = x201 * x45; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:32) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :115:23) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1221 = x173 * x50; - // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :45:27) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :47:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1222 = arg0[486]; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:4) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :115:23) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1223 = x1222 + x1217; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:4) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :115:23) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1224 = x1223 + x1218; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:4) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :115:23) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1225 = x1224 + x1219; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:4) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :115:23) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1226 = x1225 + x1220; - // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:4) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :115:23) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1227 = x1226 + x1221; - // loc(callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:56) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :115:23) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - auto x1228 = x1227 - x193; - // loc(callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:56) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :115:23) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) - FpExt x1229 = x1216 + x1228 * poly_mix[21]; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1230 = x138 * x44; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg0[487] = x1230; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1231 = x138 * x43; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg0[489] = x1231; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1232 = x138 * x42; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg0[491] = x1232; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1233 = x138 * x41; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg0[493] = x1233; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1234 = x138 * x40; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg0[495] = x1234; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1235 = x138 * x39; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg0[497] = x1235; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1236 = x138 * x38; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg0[499] = x1236; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1237 = x138 * x37; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg0[501] = x1237; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1238 = x138 * x36; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg0[503] = x1238; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1239 = x138 * x35; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg0[505] = x1239; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1240 = x138 * x34; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg0[507] = x1240; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1241 = x138 * x33; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg0[509] = x1241; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1242 = x138 * x32; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg0[511] = x1242; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1243 = x138 * x31; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg0[513] = x1243; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1244 = x138 * x30; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg0[515] = x1244; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1245 = x138 * x29; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg0[517] = x1245; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1246 = x138 * x28; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg0[519] = x1246; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1247 = x138 * x27; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg0[521] = x1247; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1248 = x138 * x26; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg0[523] = x1248; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1249 = x138 * x25; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg0[525] = x1249; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1250 = x138 * x24; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg0[527] = x1250; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1251 = x138 * x23; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg0[529] = x1251; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1252 = x138 * x22; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg0[530] = x1252; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1253 = x138 * x21; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg0[531] = x1253; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1254 = x139 * x20; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg0[488] = x1254; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1255 = x139 * x19; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg0[490] = x1255; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1256 = x139 * x18; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg0[492] = x1256; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1257 = x139 * x17; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg0[494] = x1257; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1258 = x139 * x16; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg0[496] = x1258; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1259 = x139 * x15; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg0[498] = x1259; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1260 = x139 * x14; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg0[500] = x1260; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1261 = x139 * x13; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg0[502] = x1261; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1262 = x139 * x12; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg0[504] = x1262; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1263 = x139 * x11; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg0[506] = x1263; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1264 = x139 * x10; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg0[508] = x1264; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1265 = x139 * x9; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg0[510] = x1265; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1266 = x139 * x8; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg0[512] = x1266; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1267 = x139 * x7; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg0[514] = x1267; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1268 = x139 * x6; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg0[516] = x1268; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1269 = x139 * x5; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg0[518] = x1269; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1270 = x139 * x4; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg0[520] = x1270; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1271 = x139 * x3; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg0[522] = x1271; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1272 = x139 * x2; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg0[524] = x1272; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1273 = x139 * x1; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg0[526] = x1273; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x1274 = x139 * x0; - // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - arg0[528] = x1274; - // loc(unknown) - auto x1275 = rv32im_v2_4(cycle, steps, poly_mix, arg0, x1229, arg2, arg3, arg7, x1145, arg8, arg9, arg10); - return x1275; -} -FpExt rv32im_v2_1(size_t cycle, size_t steps, FpExt* poly_mix, FpExt* arg0, FpExt arg1, FpExt arg2, FpExt arg3, Fp* arg4, Fp* arg5, Fp* arg6) { - size_t mask = steps - 1; - // loc(unknown) - constexpr FpExt x0(0,1,0,0); - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :25:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x1 = arg4[91 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x2 = arg5[15 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x3 = arg5[14 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x4 = arg5[13 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x5 = arg5[12 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( CycleArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :55:29) at callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :60:19) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x6 = arg4[95 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :26:28) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x7 = arg4[96 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :27:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x8 = arg4[98 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x9 = arg4[99 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x10 = arg4[100 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :25:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x11 = arg4[97 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( CycleArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :54:29) at callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :60:19) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x12 = arg4[94 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x13 = arg4[102 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x14 = arg4[103 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :25:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x15 = arg4[101 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x16 = arg5[19 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x17 = arg5[18 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x18 = arg5[17 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x19 = arg5[16 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( CycleArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :55:29) at callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :60:19) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x20 = arg4[105 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :26:28) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x21 = arg4[107 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :27:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x22 = arg4[109 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x23 = arg4[110 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x24 = arg4[111 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :25:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x25 = arg4[108 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( CycleArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :54:29) at callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :60:19) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x26 = arg4[104 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x27 = arg4[113 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x28 = arg4[114 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :25:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x29 = arg4[112 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x30 = arg5[23 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x31 = arg5[22 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x32 = arg5[21 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x33 = arg5[20 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( CycleArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :55:29) at callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :60:19) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x34 = arg4[116 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x35 = arg4[28 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x36 = arg4[27 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( CycleArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :54:29) at callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :60:19) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x37 = arg4[115 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x38 = arg4[30 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x39 = arg4[29 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x40 = arg5[27 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x41 = arg5[26 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x42 = arg5[25 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x43 = arg5[24 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :126:34) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :134:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x44 = arg4[32 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :126:34) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :135:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x45 = arg4[34 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x46 = arg4[33 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x47 = arg4[31 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :126:34) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :136:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x48 = arg4[36 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) - auto x49 = arg4[35 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x50 = arg5[31 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x51 = arg5[30 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x52 = arg5[29 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x53 = arg5[28 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :123:43 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x54 = arg5[75 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :123:43 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x55 = arg5[74 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :123:43 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x56 = arg5[73 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :123:43 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x57 = arg5[72 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x58 = arg4[1 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x59 = arg4[2 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x60 = arg4[3 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x61 = arg6[3]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x62 = arg6[2]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x63 = arg6[1]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x64 = arg6[0]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :28:29) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :69:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x65 = arg4[84 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :11:20) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x66 = arg4[83 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :65:23) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x67 = arg4[81 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :27:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x68 = arg4[88 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :25:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x69 = arg4[87 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x70 = arg4[89 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x71 = arg4[90 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :34:15) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x72 = arg4[106 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :34:15) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x73 = arg4[117 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x74 = arg4[119 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x75 = arg4[118 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :28:29) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x76 = arg4[37 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :28:29) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x77 = arg4[40 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :51:29) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x78 = arg4[42 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x79 = arg4[41 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :45:28) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x80 = arg4[39 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x81 = arg4[44 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :28:29) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x82 = arg4[43 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :28:29) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x83 = arg4[46 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :51:29) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x84 = arg4[48 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x85 = arg4[47 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :45:28) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x86 = arg4[45 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :11:20) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x87 = arg4[50 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :8:23) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x88 = arg4[49 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :26:28) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x89 = arg4[52 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :27:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x90 = arg4[54 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :25:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x91 = arg4[53 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :42:21) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x92 = arg4[51 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU8 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :9:27) at callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :15:16) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :53:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x93 = arg4[56 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU8 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :8:29) at callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :15:16) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :53:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x94 = arg4[55 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x95 = arg5[35 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x96 = arg5[34 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x97 = arg5[33 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x98 = arg5[32 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x99 = arg4[58 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( CycleArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :54:29) at callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :60:19) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x100 = arg4[60 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x101 = arg4[59 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :25:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x102 = arg4[57 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :15:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x103 = arg4[62 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( CycleArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :55:29) at callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :60:19) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x104 = arg4[61 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x105 = arg5[39 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x106 = arg5[38 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x107 = arg5[37 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x108 = arg5[36 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :17:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x109 = arg4[64 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x110 = arg4[143 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x111 = arg4[145 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x112 = arg4[146 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x113 = arg4[147 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x114 = arg4[144 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :16:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x115 = arg4[63 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x116 = arg4[149 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x117 = arg4[150 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x118 = arg4[148 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x119 = arg5[43 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x120 = arg5[42 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x121 = arg5[41 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x122 = arg5[40 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x123 = arg4[152 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x124 = arg4[154 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x125 = arg4[153 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x126 = arg4[151 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x127 = arg4[157 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x128 = arg4[156 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x129 = arg5[47 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x130 = arg5[46 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x131 = arg5[45 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x132 = arg5[44 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x133 = arg4[4 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x134 = arg4[93 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x135 = arg4[120 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x136 = arg4[122 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x137 = arg4[123 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x138 = arg4[121 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x139 = arg4[125 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x140 = arg4[124 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :19:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x141 = arg4[66 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :18:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x142 = arg4[65 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :21:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x143 = arg4[68 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :20:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x144 = arg4[67 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :23:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x145 = arg4[70 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x146 = arg4[155 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :22:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x147 = arg4[69 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x148 = arg4[159 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x149 = arg4[160 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x150 = arg4[158 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x151 = arg4[162 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x152 = arg4[164 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x153 = arg4[163 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x154 = arg4[161 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x155 = arg4[167 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x156 = arg4[166 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x157 = arg5[51 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x158 = arg5[50 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x159 = arg5[49 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x160 = arg5[48 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x161 = arg4[5 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :24:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x162 = arg4[71 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :26:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x163 = arg4[73 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :27:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x164 = arg4[74 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :25:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x165 = arg4[72 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :29:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x166 = arg4[76 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x167 = arg4[75 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :63:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x168 = arg4[79 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :8:23) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x169 = arg4[82 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) - auto x170 = arg4[78 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :26:28) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x171 = arg4[86 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x172 = arg4[92 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) - auto x173 = arg4[6 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :34:30) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) - auto x174 = arg4[77 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :28:29) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :65:23) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) - auto x175 = arg4[80 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :69:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) - auto x176 = arg4[85 * steps + ((cycle - kInvRate * 0) & mask)]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x177 = arg0[4]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x178 = x177 * x1; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x179 = arg0[5]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x180 = arg0[6]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x181 = x179 * x180; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x182 = arg0[7]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x183 = x182 * x180; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x184 = x2 * x0; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x185 = x3 + x184; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x186 = x185 * x0; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x187 = x4 + x186; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x188 = x187 * x0; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x189 = x5 + x188; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x190 = arg0[8]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :177:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x191 = x189 - x190; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :177:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - arg0[53] = x191; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x192 = arg0[9]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x193 = x191 * x192; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x194 = x193 - x181; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x195 = x194 - x183; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x196 = x195 - x178; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x197 = arg1 + x196 * poly_mix[3]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x198 = arg0[10]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x199 = x198 * x6; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :84:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x200 = arg0[11]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x201 = x199 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x202 = arg0[12]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x203 = x202 * x7; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x204 = arg0[13]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x205 = x204 * x8; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x206 = x203 + x205; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x207 = arg0[14]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x208 = x207 * x9; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x209 = x206 + x208; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x210 = arg0[15]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x211 = x210 * x10; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x212 = x209 + x211; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x213 = x212 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x214 = x201 * x213; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x215 = x201 * x11; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x216 = x12 * x213; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x217 = arg0[16]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x218 = x203 + x217; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x219 = x207 * x13; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x220 = x218 + x219; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x221 = x210 * x14; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x222 = x220 + x221; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x223 = x222 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x224 = x214 * x223; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x225 = x214 * x15; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x226 = x216 * x223; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x227 = x215 * x223; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x228 = x16 * x0; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x229 = x17 + x228; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x230 = x229 * x0; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x231 = x18 + x230; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x232 = x231 * x0; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x233 = x19 + x232; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :177:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x234 = x233 - x189; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :177:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - arg0[56] = x234; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x235 = x234 * x224; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x236 = x235 - x226; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x237 = x236 - x227; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x238 = x237 - x225; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x239 = x197 + x238 * poly_mix[4]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x240 = x198 * x20; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x241 = x240 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x242 = x202 * x21; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - arg0[79] = x242; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x243 = x204 * x22; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x244 = x242 + x243; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x245 = x207 * x23; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x246 = x244 + x245; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x247 = x210 * x24; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x248 = x246 + x247; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x249 = x248 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x250 = x241 * x249; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x251 = x241 * x25; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x252 = x26 * x249; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x253 = x242 + x217; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - arg0[83] = x253; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x254 = x207 * x27; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x255 = x253 + x254; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x256 = x210 * x28; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x257 = x255 + x256; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x258 = x257 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x259 = x250 * x258; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x260 = x250 * x29; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x261 = x252 * x258; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x262 = x251 * x258; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x263 = x30 * x0; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x264 = x31 + x263; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x265 = x264 * x0; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x266 = x32 + x265; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x267 = x266 * x0; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x268 = x33 + x267; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :177:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x269 = x268 - x233; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :177:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - arg0[28] = x269; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x270 = x269 * x259; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x271 = x270 - x261; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x272 = x271 - x262; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x273 = x272 - x260; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x274 = x239 + x273 * poly_mix[5]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x275 = x198 * x34; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x276 = x275 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x277 = arg0[17]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x278 = x277 * x35; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x279 = x278 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x280 = x276 * x279; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x281 = x276 * x36; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x282 = x37 * x279; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x283 = x277 * x38; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x284 = x283 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x285 = x280 * x284; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x286 = x280 * x39; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x287 = x282 * x284; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x288 = x281 * x284; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x289 = x40 * x0; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x290 = x41 + x289; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x291 = x290 * x0; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x292 = x42 + x291; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x293 = x292 * x0; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x294 = x43 + x293; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - arg0[70] = x294; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :177:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x295 = x294 - x268; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :177:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - arg0[35] = x295; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x296 = x295 * x285; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x297 = x296 - x287; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x298 = x297 - x288; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x299 = x298 - x286; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x300 = x274 + x299 * poly_mix[6]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x301 = x277 * x44; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x302 = x301 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x303 = x277 * x45; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x304 = x303 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x305 = x302 * x304; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x306 = x302 * x46; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x307 = x47 * x304; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x308 = x277 * x48; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x309 = x308 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x310 = x305 * x309; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x311 = x305 * x49; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x312 = x307 * x309; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x313 = x306 * x309; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x314 = x50 * x0; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x315 = x51 + x314; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x316 = x315 * x0; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x317 = x52 + x316; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x318 = x317 * x0; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x319 = x53 + x318; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :177:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x320 = x319 - x294; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :177:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - arg0[38] = x320; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x321 = x320 * x310; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x322 = x321 - x312; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x323 = x322 - x313; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x324 = x323 - x311; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x325 = x300 + x324 * poly_mix[7]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :123:43 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x326 = x54 * x0; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :123:43 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x327 = x55 + x326; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :123:43 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x328 = x327 * x0; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :123:43 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x329 = x56 + x328; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :123:43 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x330 = x329 * x0; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :123:43 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x331 = x57 + x330; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :123:43 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - arg0[41] = x331; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :124:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x332 = x331 - x319; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :125:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x333 = x325 + x332 * poly_mix[8]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :590:9 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x334 = arg2 + x58 * x333 * poly_mix[400]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :590:9 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x335 = x334 + x59 * x333 * poly_mix[401]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :590:9 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x336 = x335 + x60 * x333 * poly_mix[402]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x337 = x61 * x0; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x338 = x62 + x337; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x339 = x338 * x0; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x340 = x63 + x339; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x341 = x340 * x0; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x342 = x64 + x341; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - arg0[36] = x342; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x343 = x277 * x65; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x344 = x343 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x345 = arg0[18]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x346 = x345 * x344; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x347 = x345 * x66; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x348 = x67 * x344; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x349 = x277 * x68; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x350 = x349 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x351 = x346 * x350; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x352 = x346 * x69; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x353 = x348 * x350; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x354 = x347 * x350; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :177:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x355 = arg0[19]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x356 = x355 * x351; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x357 = x356 - x353; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x358 = x357 - x354; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x359 = x358 - x352; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x360 = arg3 + x359 * poly_mix[0]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x361 = x202 * x70; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x362 = x204 * x1; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x363 = x361 + x362; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x364 = arg0[20]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x365 = x363 + x364; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x366 = arg0[21]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x367 = x365 + x366; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x368 = x367 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x369 = x361 + x217; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x370 = x207 * x6; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x371 = x369 + x370; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x372 = x210 * x7; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x373 = x371 + x372; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x374 = x373 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x375 = x368 * x374; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x376 = x368 * x12; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x377 = x71 * x374; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x378 = x198 * x8; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x379 = x378 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - arg0[61] = x379; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x380 = x375 * x379; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x381 = x375 * x11; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x382 = x377 * x379; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x383 = x376 * x379; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :177:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x384 = arg0[22]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x385 = x384 * x380; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x386 = x385 - x382; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x387 = x386 - x383; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x388 = x387 - x381; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x389 = x360 + x388 * poly_mix[1]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x390 = x202 * x9; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - arg0[75] = x390; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x391 = x204 * x15; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x392 = x390 + x391; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x393 = x392 + x219; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x394 = x393 + x221; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x395 = x394 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x396 = x390 + x217; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - arg0[78] = x396; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x397 = x207 * x20; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x398 = x396 + x397; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x399 = x210 * x72; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x400 = x398 + x399; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x401 = x400 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x402 = x395 * x401; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x403 = x395 * x26; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x404 = x10 * x401; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x405 = x198 * x25; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x406 = x405 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x407 = x402 * x406; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x408 = x402 * x21; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x409 = x404 * x406; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x410 = x403 * x406; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :177:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x411 = arg0[23]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x412 = x411 * x407; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x413 = x412 - x409; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x414 = x413 - x410; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x415 = x414 - x408; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x416 = x389 + x415 * poly_mix[2]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x417 = x202 * x23; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x418 = x204 * x29; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x419 = x417 + x418; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x420 = x419 + x254; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x421 = x420 + x256; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x422 = x421 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x423 = x417 + x217; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x424 = x207 * x34; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x425 = x423 + x424; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x426 = x210 * x73; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x427 = x425 + x426; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x428 = x427 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x429 = x422 * x428; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x430 = x422 * x37; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x431 = x24 * x428; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x432 = x198 * x74; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x433 = x432 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x434 = x429 * x433; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x435 = x429 * x75; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x436 = x431 * x433; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x437 = x430 * x433; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x438 = x191 * x434; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x439 = x438 - x436; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x440 = x439 - x437; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x441 = x440 - x435; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x442 = x416 + x441 * poly_mix[3]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x443 = x279 * x284; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x444 = x279 * x39; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x445 = x36 * x284; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x446 = x443 * x302; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x447 = x443 * x47; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x448 = x445 * x302; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x449 = x444 * x302; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x450 = x234 * x446; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x451 = x450 - x448; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x452 = x451 - x449; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x453 = x452 - x447; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x454 = x442 + x453 * poly_mix[4]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x455 = x304 * x309; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x456 = x304 * x49; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x457 = x46 * x309; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x458 = arg0[24]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x459 = x455 * x458; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x460 = x455 * x76; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x461 = x457 * x458; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x462 = x456 * x458; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x463 = x269 * x459; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x464 = x463 - x461; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x465 = x464 - x462; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x466 = x465 - x460; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x467 = x454 + x466 * poly_mix[5]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x468 = x342 * x77; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x469 = x468 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x470 = x342 * x78; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x471 = x470 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x472 = x469 * x471; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x473 = x469 * x79; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x474 = x80 * x471; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x475 = x342 * x81; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x476 = x475 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x477 = x472 * x476; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x478 = x472 * x82; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x479 = x474 * x476; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x480 = x473 * x476; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x481 = x295 * x477; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x482 = x481 - x479; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x483 = x482 - x480; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x484 = x483 - x478; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x485 = x467 + x484 * poly_mix[6]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x486 = x342 * x83; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x487 = x486 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x488 = x342 * x84; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x489 = x488 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x490 = x487 * x489; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x491 = x487 * x85; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x492 = x86 * x489; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x493 = x342 * x87; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x494 = x493 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x495 = x490 * x494; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x496 = x490 * x88; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x497 = x492 * x494; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x498 = x491 * x494; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x499 = x320 * x495; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x500 = x499 - x497; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x501 = x500 - x498; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x502 = x501 - x496; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x503 = x485 + x502 * poly_mix[7]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x504 = x342 * x89; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x505 = x504 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x506 = x342 * x90; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x507 = x506 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x508 = x505 * x507; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x509 = x505 * x91; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x510 = x92 * x507; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x511 = x342 * x93; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x512 = x511 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x513 = x508 * x512; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x514 = x508 * x94; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x515 = x510 * x512; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x516 = x509 * x512; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x517 = x95 * x0; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x518 = x96 + x517; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x519 = x518 * x0; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x520 = x97 + x519; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x521 = x520 * x0; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x522 = x98 + x521; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :177:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x523 = x522 - x319; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :177:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - arg0[39] = x523; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x524 = x523 * x513; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x525 = x524 - x515; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x526 = x525 - x516; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x527 = x526 - x514; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x528 = x503 + x527 * poly_mix[8]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x529 = x342 * x99; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x530 = x529 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x531 = x342 * x100; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x532 = x531 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x533 = x530 * x532; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x534 = x530 * x101; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x535 = x102 * x532; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x536 = x342 * x103; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x537 = x536 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x538 = x533 * x537; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x539 = x533 * x104; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x540 = x535 * x537; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x541 = x534 * x537; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x542 = x105 * x0; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x543 = x106 + x542; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x544 = x543 * x0; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x545 = x107 + x544; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x546 = x545 * x0; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x547 = x108 + x546; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - arg0[42] = x547; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :177:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x548 = x547 - x522; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :177:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - arg0[40] = x548; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x549 = x548 * x538; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x550 = x549 - x540; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x551 = x550 - x541; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x552 = x551 - x539; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x553 = x528 + x552 * poly_mix[9]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x554 = x342 * x109; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x555 = x554 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x556 = x202 * x110; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x557 = x204 * x111; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x558 = x556 + x557; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x559 = x207 * x112; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x560 = x558 + x559; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x561 = x210 * x113; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x562 = x560 + x561; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x563 = x562 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x564 = x555 * x563; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x565 = x555 * x114; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x566 = x115 * x563; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x567 = x556 + x217; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x568 = x207 * x116; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x569 = x567 + x568; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x570 = x210 * x117; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x571 = x569 + x570; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x572 = x571 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x573 = x564 * x572; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x574 = x564 * x118; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x575 = x566 * x572; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x576 = x565 * x572; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x577 = x119 * x0; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x578 = x120 + x577; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x579 = x578 * x0; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x580 = x121 + x579; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x581 = x580 * x0; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x582 = x122 + x581; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :177:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x583 = x582 - x547; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :177:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - arg0[64] = x583; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x584 = x583 * x573; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x585 = x584 - x575; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x586 = x585 - x576; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x587 = x586 - x574; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x588 = x553 + x587 * poly_mix[10]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x589 = x198 * x123; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x590 = x589 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x591 = x277 * x124; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x592 = x591 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x593 = x590 * x592; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x594 = x590 * x125; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x595 = x126 * x592; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x596 = x277 * x127; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x597 = x596 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - arg0[86] = x597; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x598 = x593 * x597; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x599 = x593 * x128; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x600 = x595 * x597; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x601 = x594 * x597; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x602 = x129 * x0; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x603 = x130 + x602; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x604 = x603 * x0; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x605 = x131 + x604; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x606 = x605 * x0; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x607 = x132 + x606; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :177:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x608 = x607 - x582; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :177:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - arg0[65] = x608; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x609 = x608 * x598; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x610 = x609 - x600; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x611 = x610 - x601; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x612 = x611 - x599; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x613 = x588 + x612 * poly_mix[11]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :124:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x614 = x331 - x607; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :125:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x615 = x613 + x614 * poly_mix[12]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :590:9 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x616 = x336 + x133 * x615 * poly_mix[403]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x617 = x277 * x71; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x618 = x617 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x619 = x345 * x618; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x620 = x345 * x70; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x621 = x69 * x618; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x622 = x277 * x12; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x623 = x622 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x624 = x619 * x623; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x625 = x619 * x134; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x626 = x621 * x623; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x627 = x620 * x623; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x628 = x355 * x624; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x629 = x628 - x626; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x630 = x629 - x627; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x631 = x630 - x625; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x632 = arg3 + x631 * poly_mix[0]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x633 = x202 * x6; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x634 = x204 * x11; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x635 = x633 + x634; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x636 = x207 * x8; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x637 = x635 + x636; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x638 = x210 * x9; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x639 = x637 + x638; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x640 = x639 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x641 = x633 + x217; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x642 = x207 * x15; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - arg0[76] = x642; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x643 = x641 + x642; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x644 = x210 * x13; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - arg0[77] = x644; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x645 = x643 + x644; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x646 = x645 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x647 = x640 * x646; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x648 = x640 * x10; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x649 = x7 * x646; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x650 = x198 * x26; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x651 = x650 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - arg0[62] = x651; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x652 = x647 * x651; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x653 = x647 * x14; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x654 = x649 * x651; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x655 = x648 * x651; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x656 = x384 * x652; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x657 = x656 - x654; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x658 = x657 - x655; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x659 = x658 - x653; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x660 = x632 + x659 * poly_mix[1]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x661 = x202 * x20; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x662 = x204 * x21; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x663 = x661 + x662; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x664 = x207 * x25; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x665 = x663 + x664; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x666 = x210 * x22; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x667 = x665 + x666; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x668 = x667 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x669 = x661 + x217; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x670 = x207 * x24; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x671 = x669 + x670; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x672 = x210 * x29; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x673 = x671 + x672; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x674 = x673 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - arg0[27] = x674; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x675 = x668 * x674; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x676 = x668 * x23; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x677 = x72 * x674; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x678 = x198 * x28; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x679 = x678 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - arg0[32] = x679; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x680 = x675 * x679; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x681 = x675 * x27; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x682 = x677 * x679; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x683 = x676 * x679; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x684 = x411 * x680; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x685 = x684 - x682; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x686 = x685 - x683; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x687 = x686 - x681; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x688 = x660 + x687 * poly_mix[2]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x689 = x202 * x34; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x690 = x204 * x75; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x691 = x689 + x690; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x692 = x207 * x74; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x693 = x691 + x692; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x694 = x210 * x135; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x695 = x693 + x694; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x696 = x695 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x697 = x689 + x217; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x698 = x207 * x136; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x699 = x697 + x698; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x700 = x210 * x137; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x701 = x699 + x700; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x702 = x701 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x703 = x696 * x702; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x704 = x696 * x138; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x705 = x73 * x702; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x706 = x198 * x139; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x707 = x706 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x708 = x703 * x707; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x709 = x703 * x140; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x710 = x705 * x707; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x711 = x704 * x707; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x712 = x191 * x708; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x713 = x712 - x710; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x714 = x713 - x711; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x715 = x714 - x709; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x716 = x688 + x715 * poly_mix[3]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x717 = x716 + x453 * poly_mix[4]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x718 = x717 + x466 * poly_mix[5]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x719 = x277 * x77; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x720 = x719 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x721 = x277 * x78; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x722 = x721 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x723 = x720 * x722; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x724 = x720 * x79; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x725 = x80 * x722; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x726 = arg0[25]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x727 = x723 * x726; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x728 = x723 * x82; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x729 = x725 * x726; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x730 = x724 * x726; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x731 = x295 * x727; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x732 = x731 - x729; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x733 = x732 - x730; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x734 = x733 - x728; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x735 = x718 + x734 * poly_mix[6]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x736 = x735 + x502 * poly_mix[7]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x737 = x736 + x527 * poly_mix[8]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x738 = x737 + x552 * poly_mix[9]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x739 = x342 * x141; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x740 = x739 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x741 = x555 * x740; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x742 = x555 * x142; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x743 = x115 * x740; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x744 = x342 * x143; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x745 = x744 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x746 = x741 * x745; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x747 = x741 * x144; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x748 = x743 * x745; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x749 = x742 * x745; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x750 = x583 * x746; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x751 = x750 - x748; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x752 = x751 - x749; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x753 = x752 - x747; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x754 = x738 + x753 * poly_mix[10]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x755 = x342 * x145; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x756 = x755 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x757 = x202 * x125; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x758 = x204 * x146; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x759 = x757 + x758; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x760 = x207 * x128; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x761 = x759 + x760; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x762 = x210 * x127; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x763 = x761 + x762; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x764 = x763 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x765 = x756 * x764; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x766 = x756 * x124; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x767 = x147 * x764; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x768 = x757 + x217; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x769 = x207 * x148; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x770 = x768 + x769; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x771 = x210 * x149; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x772 = x770 + x771; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x773 = x772 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x774 = x765 * x773; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x775 = x765 * x150; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x776 = x767 * x773; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x777 = x766 * x773; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x778 = x608 * x774; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x779 = x778 - x776; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x780 = x779 - x777; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x781 = x780 - x775; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x782 = x754 + x781 * poly_mix[11]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x783 = x198 * x151; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x784 = x783 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x785 = x277 * x152; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x786 = x785 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x787 = x784 * x786; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x788 = x784 * x153; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x789 = x154 * x786; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x790 = x277 * x155; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x791 = x790 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - arg0[87] = x791; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x792 = x787 * x791; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x793 = x787 * x156; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x794 = x789 * x791; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x795 = x788 * x791; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x796 = x157 * x0; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x797 = x158 + x796; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x798 = x797 * x0; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x799 = x159 + x798; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x800 = x799 * x0; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x801 = x160 + x800; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - arg0[67] = x801; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :177:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x802 = x801 - x607; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :177:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - arg0[66] = x802; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x803 = x802 * x792; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x804 = x803 - x794; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x805 = x804 - x795; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x806 = x805 - x793; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x807 = x782 + x806 * poly_mix[12]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :124:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x808 = x331 - x801; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :125:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x809 = x807 + x808 * poly_mix[13]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :590:9 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x810 = x616 + x161 * x809 * poly_mix[404]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x811 = x277 * x89; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x812 = x811 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x813 = x345 * x812; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x814 = x345 * x92; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x815 = x88 * x812; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x816 = x277 * x93; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x817 = x816 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x818 = x813 * x817; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x819 = x813 * x94; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x820 = x815 * x817; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x821 = x814 * x817; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x822 = x355 * x818; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x823 = x822 - x820; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x824 = x823 - x821; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x825 = x824 - x819; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x826 = arg3 + x825 * poly_mix[0]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x827 = x202 * x102; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x828 = x204 * x101; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x829 = x827 + x828; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x830 = x207 * x100; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x831 = x829 + x830; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x832 = x210 * x104; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x833 = x831 + x832; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x834 = x833 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x835 = x827 + x217; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x836 = x207 * x115; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x837 = x835 + x836; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x838 = x210 * x109; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x839 = x837 + x838; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x840 = x839 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x841 = x834 * x840; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x842 = x834 * x103; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x843 = x99 * x840; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x844 = x198 * x141; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x845 = x844 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - arg0[69] = x845; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x846 = x841 * x845; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x847 = x841 * x142; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x848 = x843 * x845; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x849 = x842 * x845; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x850 = x384 * x846; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x851 = x850 - x848; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x852 = x851 - x849; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x853 = x852 - x847; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x854 = x826 + x853 * poly_mix[1]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x855 = x202 * x144; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - arg0[71] = x855; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x856 = x204 * x147; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - arg0[50] = x856; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x857 = x855 + x856; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x858 = x207 * x145; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - arg0[51] = x858; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x859 = x857 + x858; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x860 = x210 * x162; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - arg0[52] = x860; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x861 = x859 + x860; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x862 = x861 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x863 = x855 + x217; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - arg0[72] = x863; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x864 = x207 * x163; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - arg0[54] = x864; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x865 = x863 + x864; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x866 = x210 * x164; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - arg0[55] = x866; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x867 = x865 + x866; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x868 = x867 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x869 = x862 * x868; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x870 = x862 * x165; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x871 = x143 * x868; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x872 = x198 * x166; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x873 = x872 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x874 = x869 * x873; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x875 = x869 * x167; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x876 = x871 * x873; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x877 = x870 * x873; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x878 = x411 * x874; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x879 = x878 - x876; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x880 = x879 - x877; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x881 = x880 - x875; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x882 = x854 + x881 * poly_mix[2]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x883 = x277 * x168; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x884 = x883 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x885 = x277 * x169; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x886 = x885 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x887 = x884 * x886; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x888 = x884 * x67; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x889 = x170 * x886; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x890 = x277 * x69; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x891 = x890 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x892 = x887 * x891; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x893 = x887 * x171; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x894 = x889 * x891; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x895 = x888 * x891; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x896 = x191 * x892; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x897 = x896 - x894; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x898 = x897 - x895; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x899 = x898 - x893; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x900 = x882 + x899 * poly_mix[3]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x901 = x277 * x1; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x902 = x901 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x903 = x202 * x172; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x904 = x204 * x12; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x905 = x903 + x904; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x906 = x905 + x370; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x907 = x906 + x372; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x908 = x907 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x909 = x902 * x908; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x910 = x902 * x134; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x911 = x71 * x908; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x912 = x903 + x217; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x913 = x912 + x636; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x914 = x913 + x638; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x915 = x914 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x916 = x909 * x915; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x917 = x909 * x11; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x918 = x911 * x915; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x919 = x910 * x915; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x920 = x234 * x916; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x921 = x920 - x918; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x922 = x921 - x919; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x923 = x922 - x917; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x924 = x900 + x923 * poly_mix[4]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x925 = x198 * x15; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x926 = x925 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x927 = x342 * x35; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x928 = x927 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - arg0[33] = x928; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x929 = x926 * x928; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x930 = x926 * x36; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x931 = x10 * x928; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x932 = x342 * x38; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x933 = x932 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - arg0[34] = x933; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x934 = x929 * x933; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x935 = x929 * x39; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x936 = x931 * x933; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x937 = x930 * x933; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x938 = x269 * x934; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x939 = x938 - x936; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x940 = x939 - x937; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x941 = x940 - x935; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x942 = x924 + x941 * poly_mix[5]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x943 = x342 * x44; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x944 = x943 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - arg0[37] = x944; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x945 = x202 * x72; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x946 = x204 * x25; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - arg0[80] = x946; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x947 = x945 + x946; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x948 = x207 * x22; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - arg0[81] = x948; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x949 = x947 + x948; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x950 = x210 * x23; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - arg0[82] = x950; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x951 = x949 + x950; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x952 = x951 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x953 = x944 * x952; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x954 = x944 * x21; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x955 = x47 * x952; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x956 = x945 + x217; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x957 = x207 * x29; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - arg0[84] = x957; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x958 = x956 + x957; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x959 = x210 * x27; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - arg0[85] = x959; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x960 = x958 + x959; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x961 = x960 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x962 = x953 * x961; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x963 = x953 * x24; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x964 = x955 * x961; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x965 = x954 * x961; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x966 = x295 * x962; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x967 = x966 - x964; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x968 = x967 - x965; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x969 = x968 - x963; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x970 = x942 + x969 * poly_mix[6]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x971 = x198 * x37; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x972 = x971 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x973 = x277 * x73; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x974 = x973 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x975 = x972 * x974; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x976 = x972 * x34; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x977 = x28 * x974; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x978 = x277 * x135; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x979 = x978 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - arg0[63] = x979; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x980 = x975 * x979; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x981 = x975 * x74; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x982 = x977 * x979; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x983 = x976 * x979; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x984 = x320 * x980; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x985 = x984 - x982; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x986 = x985 - x983; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x987 = x986 - x981; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x988 = x970 + x987 * poly_mix[7]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :125:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x989 = x988 + x332 * poly_mix[8]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :590:9 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x990 = x810 + x173 * x989 * poly_mix[405]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x991 = x277 * x90; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x992 = x991 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x993 = x345 * x992; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x994 = x345 * x91; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x995 = x92 * x992; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x996 = x277 * x99; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x997 = x996 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x998 = x993 * x997; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x999 = x993 * x102; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1000 = x995 * x997; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1001 = x994 * x997; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1002 = x355 * x998; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1003 = x1002 - x1000; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1004 = x1003 - x1001; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1005 = x1004 - x999; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x1006 = arg3 + x1005 * poly_mix[0]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1007 = x202 * x101; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1008 = x204 * x104; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - arg0[45] = x1008; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1009 = x1007 + x1008; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1010 = x207 * x103; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - arg0[46] = x1010; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1011 = x1009 + x1010; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1012 = x210 * x115; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - arg0[47] = x1012; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1013 = x1011 + x1012; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1014 = x1013 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1015 = x1007 + x217; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1016 = x207 * x142; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - arg0[48] = x1016; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1017 = x1015 + x1016; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1018 = x210 * x141; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - arg0[49] = x1018; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1019 = x1017 + x1018; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1020 = x1019 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1021 = x1014 * x1020; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1022 = x1014 * x109; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1023 = x100 * x1020; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1024 = x198 * x143; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1025 = x1024 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1026 = x1021 * x1025; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1027 = x1021 * x144; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1028 = x1023 * x1025; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1029 = x1022 * x1025; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1030 = x384 * x1026; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1031 = x1030 - x1028; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1032 = x1031 - x1029; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1033 = x1032 - x1027; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x1034 = x1006 + x1033 * poly_mix[1]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1035 = x202 * x147; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1036 = x204 * x162; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1037 = x1035 + x1036; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1038 = x207 * x165; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - arg0[73] = x1038; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1039 = x1037 + x1038; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1040 = x210 * x163; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - arg0[74] = x1040; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1041 = x1039 + x1040; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1042 = x1041 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1043 = x1035 + x217; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1044 = x207 * x167; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1045 = x1043 + x1044; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1046 = x210 * x166; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1047 = x1045 + x1046; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1048 = x1047 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1049 = x1042 * x1048; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1050 = x1042 * x164; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1051 = x145 * x1048; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1052 = x198 * x170; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1053 = x1052 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1054 = x1049 * x1053; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1055 = x1049 * x174; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1056 = x1051 * x1053; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1057 = x1050 * x1053; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1058 = x411 * x1054; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1059 = x1058 - x1056; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1060 = x1059 - x1057; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1061 = x1060 - x1055; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x1062 = x1034 + x1061 * poly_mix[2]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1063 = x202 * x175; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1064 = x204 * x169; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1065 = x1063 + x1064; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1066 = x207 * x66; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1067 = x1065 + x1066; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1068 = x210 * x65; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1069 = x1067 + x1068; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1070 = x1069 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1071 = x1063 + x217; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1072 = x207 * x171; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - arg0[57] = x1072; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1073 = x1071 + x1072; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1074 = x210 * x69; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - arg0[58] = x1074; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1075 = x1073 + x1074; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1076 = x1075 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1077 = x1070 * x1076; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1078 = x1070 * x176; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1079 = x67 * x1076; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1080 = x198 * x70; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1081 = x1080 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1082 = x1077 * x1081; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1083 = x1077 * x68; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1084 = x1079 * x1081; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1085 = x1078 * x1081; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1086 = x191 * x1082; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1087 = x1086 - x1084; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1088 = x1087 - x1085; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1089 = x1088 - x1083; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x1090 = x1062 + x1089 * poly_mix[3]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1091 = x277 * x172; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1092 = x1091 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1093 = x277 * x6; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1094 = x1093 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1095 = x1092 * x1094; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1096 = x1092 * x12; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1097 = x1 * x1094; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1098 = x277 * x10; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1099 = x1098 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1100 = x1095 * x1099; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1101 = x1095 * x9; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1102 = x1097 * x1099; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1103 = x1096 * x1099; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1104 = x234 * x1100; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1105 = x1104 - x1102; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1106 = x1105 - x1103; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1107 = x1106 - x1101; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - FpExt x1108 = x1090 + x1107 * poly_mix[4]; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1109 = x277 * x26; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1110 = x1109 + x200; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1111 = x1110 * x668; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1112 = x1110 * x72; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - arg0[26] = x1112; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1113 = x14 * x668; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1114 = x1111 * x674; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - arg0[29] = x1114; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1115 = x1111 * x23; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - arg0[31] = x1115; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - auto x1116 = x1113 * x674; - // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) - arg0[30] = x1116; - // loc(unknown) - auto x1117 = rv32im_v2_0(cycle, steps, poly_mix, arg0, x1108, x990, arg3, arg4, arg5); - return x1117; -} - -} // namespace risc0::circuit::rv32im_v2 -// clang-format on diff --git a/risc0/circuit/rv32im-v2-sys/kernels/cxx/steps.cpp b/risc0/circuit/rv32im-v2-sys/kernels/cxx/steps.cpp deleted file mode 100644 index 9953dfac..00000000 --- a/risc0/circuit/rv32im-v2-sys/kernels/cxx/steps.cpp +++ /dev/null @@ -1,18423 +0,0 @@ -// Copyright 2024 RISC Zero, Inc. -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#include "steps.h" -#include "witgen.h" - -namespace risc0::circuit::rv32im_v2::cpu { -NondetRegStruct -back_NondetReg(ExecContext& ctx, Index distance0, BoundLayout layout1) { - NondetRegStruct x2 = NondetRegStruct{._super = LOAD(LAYOUT_LOOKUP(layout1, _super), distance0)}; - return x2; -} -NondetRegStruct exec_NondetReg(ExecContext& ctx, Val arg0, BoundLayout layout1) { - STORE(LAYOUT_LOOKUP(layout1, _super), arg0); - NondetRegStruct x2 = NondetRegStruct{._super = LOAD(LAYOUT_LOOKUP(layout1, _super), 0)}; - return x2; -} -NondetExtRegStruct -back_NondetExtReg(ExecContext& ctx, Index distance0, BoundLayout layout1) { - NondetExtRegStruct x2 = - NondetExtRegStruct{._super = LOAD_EXT(LAYOUT_LOOKUP(layout1, _super), distance0)}; - return x2; -} -NondetExtRegStruct -exec_NondetExtReg(ExecContext& ctx, ExtVal arg0, BoundLayout layout1) { - STORE_EXT(LAYOUT_LOOKUP(layout1, _super), arg0); - NondetExtRegStruct x2 = NondetExtRegStruct{._super = LOAD_EXT(LAYOUT_LOOKUP(layout1, _super), 0)}; - return x2; -} -RegStruct back_Reg(ExecContext& ctx, Index distance0, BoundLayout layout1) { - // Reg(:4) - NondetRegStruct x2 = back_NondetReg(ctx, distance0, layout1); - return RegStruct{._super = x2}; -} -RegStruct exec_Reg(ExecContext& ctx, Val arg0, BoundLayout layout1) { - NondetRegStruct x2 = exec_NondetReg(ctx, arg0, layout1); - // Reg(:5) - EQZ((arg0 - x2._super), "Reg(:5)"); - return RegStruct{._super = x2}; -} -NondetExtRegStruct -back_ExtReg(ExecContext& ctx, Index distance0, BoundLayout layout1) { - // ExtReg(:10) - NondetExtRegStruct x2 = back_NondetExtReg(ctx, distance0, layout1); - return x2; -} -NondetExtRegStruct -exec_ExtReg(ExecContext& ctx, ExtVal arg0, BoundLayout layout1) { - NondetExtRegStruct x2 = exec_NondetExtReg(ctx, arg0, layout1); - // ExtReg(:11) - EQZ((x2._super - arg0), "loc(callsite(unknown at ExtReg ( :11:11)))"); - return x2; -} -NondetRegStruct -exec_NondetBitReg(ExecContext& ctx, Val arg0, BoundLayout layout1) { - // NondetBitReg(zirgen/circuit/rv32im/v2/dsl/bits.zir:11) - NondetRegStruct x2 = exec_NondetReg(ctx, arg0, layout1); - // AssertBit(zirgen/circuit/rv32im/v2/dsl/bits.zir:6) - // NondetBitReg(zirgen/circuit/rv32im/v2/dsl/bits.zir:12) - Val x3 = (x2._super * (Val(1) - x2._super)); - EQZ(x3, - "loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at NondetBitReg ( " - "zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13)))"); - return x2; -} -BitRegStruct exec_BitReg(ExecContext& ctx, Val arg0, BoundLayout layout1) { - // BitReg(zirgen/circuit/rv32im/v2/dsl/bits.zir:17) - NondetRegStruct x2 = exec_NondetBitReg(ctx, arg0, layout1); - // BitReg(zirgen/circuit/rv32im/v2/dsl/bits.zir:18) - EQZ((arg0 - x2._super), "BitReg(zirgen/circuit/rv32im/v2/dsl/bits.zir:18)"); - return BitRegStruct{}; -} -NondetRegStruct -exec_NondetTwitReg(ExecContext& ctx, Val arg0, BoundLayout layout1) { - // NondetTwitReg(zirgen/circuit/rv32im/v2/dsl/bits.zir:48) - NondetRegStruct x2 = exec_NondetReg(ctx, arg0, layout1); - // AssertTwit(zirgen/circuit/rv32im/v2/dsl/bits.zir:35) - // NondetTwitReg(zirgen/circuit/rv32im/v2/dsl/bits.zir:49) - Val x3 = (x2._super * (Val(1) - x2._super)); - Val x4 = ((x3 * (Val(2) - x2._super)) * (Val(3) - x2._super)); - EQZ(x4, - "loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at NondetTwitReg " - "( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14)))"); - return x2; -} -NondetFakeTwitRegStruct -exec_NondetFakeTwitReg(ExecContext& ctx, Val arg0, BoundLayout layout1) { - // NondetFakeTwitReg(zirgen/circuit/rv32im/v2/dsl/bits.zir:55) - NondetRegStruct x2 = exec_NondetBitReg(ctx, bitAnd(arg0, Val(1)), LAYOUT_LOOKUP(layout1, reg0)); - // NondetFakeTwitReg(zirgen/circuit/rv32im/v2/dsl/bits.zir:56) - NondetRegStruct x3 = exec_NondetBitReg( - ctx, (bitAnd(arg0, Val(2)) * Val(1006632961)), LAYOUT_LOOKUP(layout1, reg1)); - // NondetFakeTwitReg(zirgen/circuit/rv32im/v2/dsl/bits.zir:57) - Val x4 = ((x3._super * Val(2)) + x2._super); - return NondetFakeTwitRegStruct{._super = x4}; -} -FakeTwitRegStruct -exec_FakeTwitReg(ExecContext& ctx, Val arg0, BoundLayout layout1) { - // FakeTwitReg(zirgen/circuit/rv32im/v2/dsl/bits.zir:67) - NondetFakeTwitRegStruct x2 = exec_NondetFakeTwitReg(ctx, arg0, layout1); - // FakeTwitReg(zirgen/circuit/rv32im/v2/dsl/bits.zir:68) - EQZ((arg0 - x2._super), "FakeTwitReg(zirgen/circuit/rv32im/v2/dsl/bits.zir:68)"); - return FakeTwitRegStruct{}; -} -NondetRegStruct exec_IsZero(ExecContext& ctx, Val arg0, BoundLayout layout1) { - // IsZero(zirgen/circuit/rv32im/v2/dsl/is_zero.zir:8) - NondetRegStruct x2 = exec_NondetReg(ctx, isz(arg0), LAYOUT_LOOKUP(layout1, _super)); - // IsZero(zirgen/circuit/rv32im/v2/dsl/is_zero.zir:11) - NondetRegStruct x3 = exec_NondetReg(ctx, inv_0(arg0), LAYOUT_LOOKUP(layout1, inv)); - // AssertBit(zirgen/circuit/rv32im/v2/dsl/bits.zir:6) - // IsZero(zirgen/circuit/rv32im/v2/dsl/is_zero.zir:14) - Val x4 = (Val(1) - x2._super); - EQZ((x2._super * x4), - "loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at IsZero ( " - "zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13)))"); - // IsZero(zirgen/circuit/rv32im/v2/dsl/is_zero.zir:16) - EQZ(((arg0 * x3._super) - x4), "IsZero(zirgen/circuit/rv32im/v2/dsl/is_zero.zir:16)"); - // IsZero(zirgen/circuit/rv32im/v2/dsl/is_zero.zir:18) - EQZ((x2._super * arg0), "IsZero(zirgen/circuit/rv32im/v2/dsl/is_zero.zir:18)"); - // IsZero(zirgen/circuit/rv32im/v2/dsl/is_zero.zir:20) - EQZ((x2._super * x3._super), "IsZero(zirgen/circuit/rv32im/v2/dsl/is_zero.zir:20)"); - return x2; -} -ArgU8Struct exec_ArgU8(ExecContext& ctx, Val arg0, Val arg1, BoundLayout layout2) { - // ArgU8(zirgen/circuit/rv32im/v2/dsl/lookups.zir:8) - NondetRegStruct x3 = exec_NondetReg(ctx, arg0, LAYOUT_LOOKUP(layout2, count)); - // ArgU8(zirgen/circuit/rv32im/v2/dsl/lookups.zir:9) - NondetRegStruct x4 = exec_NondetReg(ctx, arg1, LAYOUT_LOOKUP(layout2, val)); - // LookupDelta(zirgen/circuit/rv32im/v2/dsl/lookups.zir:4) - // ArgU8(zirgen/circuit/rv32im/v2/dsl/lookups.zir:10) - INVOKE_EXTERN(ctx, lookupDelta, Val(8), x4._super, x3._super); - return ArgU8Struct{.count = x3, .val = x4}; -} -NondetRegStruct -exec_NondetU8Reg(ExecContext& ctx, Val arg0, BoundLayout layout1) { - // NondetU8Reg(zirgen/circuit/rv32im/v2/dsl/lookups.zir:15) - ArgU8Struct x2 = exec_ArgU8(ctx, Val(1), arg0, LAYOUT_LOOKUP(layout1, arg)); - // NondetU8Reg(zirgen/circuit/rv32im/v2/dsl/lookups.zir:16) - Val x3 = (x2.count._super - Val(1)); - EQZ(x3, "NondetU8Reg(zirgen/circuit/rv32im/v2/dsl/lookups.zir:16)"); - return x2.val; -} -U8RegStruct exec_U8Reg(ExecContext& ctx, Val arg0, BoundLayout layout1) { - // U8Reg(zirgen/circuit/rv32im/v2/dsl/lookups.zir:22) - NondetRegStruct x2 = exec_NondetU8Reg(ctx, arg0, LAYOUT_LOOKUP(layout1, ret)); - // U8Reg(zirgen/circuit/rv32im/v2/dsl/lookups.zir:23) - EQZ((x2._super - arg0), "U8Reg(zirgen/circuit/rv32im/v2/dsl/lookups.zir:23)"); - return U8RegStruct{}; -} -ArgU16Struct exec_ArgU16(ExecContext& ctx, Val arg0, Val arg1, BoundLayout layout2) { - // ArgU16(zirgen/circuit/rv32im/v2/dsl/lookups.zir:28) - NondetRegStruct x3 = exec_NondetReg(ctx, arg0, LAYOUT_LOOKUP(layout2, count)); - // ArgU16(zirgen/circuit/rv32im/v2/dsl/lookups.zir:29) - NondetRegStruct x4 = exec_NondetReg(ctx, arg1, LAYOUT_LOOKUP(layout2, val)); - // LookupDelta(zirgen/circuit/rv32im/v2/dsl/lookups.zir:4) - // ArgU16(zirgen/circuit/rv32im/v2/dsl/lookups.zir:30) - INVOKE_EXTERN(ctx, lookupDelta, Val(16), x4._super, x3._super); - return ArgU16Struct{.count = x3, .val = x4}; -} -NondetRegStruct -exec_NondetU16Reg(ExecContext& ctx, Val arg0, BoundLayout layout1) { - // NondetU16Reg(zirgen/circuit/rv32im/v2/dsl/lookups.zir:35) - ArgU16Struct x2 = exec_ArgU16(ctx, Val(1), arg0, LAYOUT_LOOKUP(layout1, arg)); - // NondetU16Reg(zirgen/circuit/rv32im/v2/dsl/lookups.zir:36) - Val x3 = (x2.count._super - Val(1)); - EQZ(x3, "NondetU16Reg(zirgen/circuit/rv32im/v2/dsl/lookups.zir:36)"); - return x2.val; -} -U16RegStruct exec_U16Reg(ExecContext& ctx, Val arg0, BoundLayout layout1) { - // U16Reg(zirgen/circuit/rv32im/v2/dsl/lookups.zir:42) - NondetRegStruct x2 = exec_NondetU16Reg(ctx, arg0, LAYOUT_LOOKUP(layout1, ret)); - // U16Reg(zirgen/circuit/rv32im/v2/dsl/lookups.zir:43) - EQZ((x2._super - arg0), "U16Reg(zirgen/circuit/rv32im/v2/dsl/lookups.zir:43)"); - return U16RegStruct{._super = arg0}; -} -ToBits_5_Struct exec_ToBits_5_(ExecContext& ctx, Val arg0, BoundLayout layout1) { - // ToBits(zirgen/circuit/rv32im/v2/dsl/po2.zir:31) - NondetRegStruct5Array x2 = - map(Val5Array{Val(0), Val(1), Val(2), Val(3), Val(4)}, - LAYOUT_LOOKUP(layout1, _super), - ([&](Val5Array::value_type x3, BoundLayout x4) { - // Div(:16) - Val x5 = inv_0(Val16Array{Val(1), - Val(2), - Val(4), - Val(8), - Val(16), - Val(32), - Val(64), - Val(128), - Val(256), - Val(512), - Val(1024), - Val(2048), - Val(4096), - Val(8192), - Val(16384), - Val(32768)}[to_size_t(x3)]); - // Div(:17) - EQZ(((x5 * Val16Array{Val(1), - Val(2), - Val(4), - Val(8), - Val(16), - Val(32), - Val(64), - Val(128), - Val(256), - Val(512), - Val(1024), - Val(2048), - Val(4096), - Val(8192), - Val(16384), - Val(32768)}[to_size_t(x3)]) - - Val(1)), - "loc(callsite( Div ( :17:22) at ToBits ( " - "zirgen/circuit/rv32im/v2/dsl/po2.zir :31:43)))"); - NondetRegStruct x6 = - exec_NondetBitReg(ctx, - (x5 * bitAnd(arg0, - Val16Array{Val(1), - Val(2), - Val(4), - Val(8), - Val(16), - Val(32), - Val(64), - Val(128), - Val(256), - Val(512), - Val(1024), - Val(2048), - Val(4096), - Val(8192), - Val(16384), - Val(32768)}[to_size_t(x3)])), - x4); - return x6; - })); - return ToBits_5_Struct{._super = x2}; -} -ValU32Struct exec_DynPo2(ExecContext& ctx, Val arg0, BoundLayout layout1) { - // DynPo2(zirgen/circuit/rv32im/v2/dsl/po2.zir:44) - ToBits_5_Struct x2 = exec_ToBits_5_(ctx, arg0, LAYOUT_LOOKUP(layout1, low5)); - // FromBits(zirgen/circuit/rv32im/v2/dsl/po2.zir:35) - // DynPo2(zirgen/circuit/rv32im/v2/dsl/po2.zir:45) - Val x3 = (x2._super[1]._super * Val(2)); - Val x4 = (x2._super[2]._super * Val(4)); - Val x5 = (x2._super[3]._super * Val(8)); - Val x6 = (x2._super[4]._super * Val(16)); - Val x7 = (x2._super[0]._super + x3); - Val x8 = (((x7 + x4) + x5) + x6); - // DynPo2(zirgen/circuit/rv32im/v2/dsl/po2.zir:46) - NondetRegStruct x9 = - exec_NondetU16Reg(ctx, ((arg0 - x8) * Val(1950351361)), LAYOUT_LOOKUP(layout1, checkU16)); - // DynPo2(zirgen/circuit/rv32im/v2/dsl/po2.zir:47) - Val x10 = ((x9._super * Val(32)) + x8); - EQZ((x10 - arg0), "DynPo2(zirgen/circuit/rv32im/v2/dsl/po2.zir:47)"); - // CondMul(zirgen/circuit/rv32im/v2/dsl/po2.zir:39) - // DynPo2(zirgen/circuit/rv32im/v2/dsl/po2.zir:48) - Val x11 = (x2._super[0]._super * Val(2)); - Val x12 = (Val(1) - x2._super[0]._super); - Val x13 = (x11 + x12); - // DynPo2(zirgen/circuit/rv32im/v2/dsl/po2.zir:49) - Val x14 = (x2._super[1]._super * x13); - Val x15 = (Val(1) - x2._super[1]._super); - Val x16 = ((x14 * Val(4)) + (x15 * x13)); - // DynPo2(zirgen/circuit/rv32im/v2/dsl/po2.zir:50) - Val x17 = (x2._super[2]._super * x16); - Val x18 = (Val(1) - x2._super[2]._super); - RegStruct x19 = exec_Reg(ctx, ((x17 * Val(16)) + (x18 * x16)), LAYOUT_LOOKUP(layout1, b3)); - // CondMul(zirgen/circuit/rv32im/v2/dsl/po2.zir:39) - // DynPo2(zirgen/circuit/rv32im/v2/dsl/po2.zir:51) - Val x20 = (x2._super[3]._super * x19._super._super); - Val x21 = (Val(1) - x2._super[3]._super); - Val x22 = ((x20 * Val(256)) + (x21 * x19._super._super)); - // DynPo2(zirgen/circuit/rv32im/v2/dsl/po2.zir:52) - Val x23 = (Val(1) - x2._super[4]._super); - RegStruct x24 = exec_Reg(ctx, (x23 * x22), LAYOUT_LOOKUP(layout1, low)); - // DynPo2(zirgen/circuit/rv32im/v2/dsl/po2.zir:53) - Val x25 = (x2._super[4]._super * x22); - RegStruct x26 = exec_Reg(ctx, x25, LAYOUT_LOOKUP(layout1, high)); - // ValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:10) - // DynPo2(zirgen/circuit/rv32im/v2/dsl/po2.zir:54) - ValU32Struct x27 = ValU32Struct{.low = x24._super._super, .high = x26._super._super}; - return x27; -} -NormalizeU32Struct exec_NormalizeU32(ExecContext& ctx, - DenormedValU32Struct arg0, - BoundLayout layout1) { - // NormalizeU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:44) - NondetRegStruct x2 = - exec_NondetU16Reg(ctx, bitAnd(arg0.low, Val(65535)), LAYOUT_LOOKUP(layout1, low16)); - // Div(:19) - // NormalizeU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:45) - Val x3 = (bitAnd(arg0.low, Val(65536)) * Val(2013235201)); - NondetRegStruct x4 = exec_NondetBitReg(ctx, x3, LAYOUT_LOOKUP(layout1, lowCarry)); - // NormalizeU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:46) - Val x5 = ((x4._super * Val(65536)) + x2._super); - EQZ((arg0.low - x5), "NormalizeU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:46)"); - // NormalizeU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:48) - Val x6 = (arg0.high + x4._super); - // NormalizeU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:50) - NondetRegStruct x7 = - exec_NondetU16Reg(ctx, bitAnd(x6, Val(65535)), LAYOUT_LOOKUP(layout1, high16)); - // NormalizeU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:51) - NondetRegStruct x8 = exec_NondetBitReg( - ctx, (bitAnd(x6, Val(65536)) * Val(2013235201)), LAYOUT_LOOKUP(layout1, highCarry)); - // NormalizeU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:52) - Val x9 = ((x8._super * Val(65536)) + x7._super); - EQZ((x6 - x9), "NormalizeU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:52)"); - // NormalizeU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:42) - NormalizeU32Struct x10 = - NormalizeU32Struct{._super = ValU32Struct{.low = x2._super, .high = x7._super}, .carry = x8}; - return x10; -} -AddrDecomposeStruct exec_AddrDecompose(ExecContext& ctx, - ValU32Struct arg0, - Val arg1, - BoundLayout layout2) { - // AddrDecompose(zirgen/circuit/rv32im/v2/dsl/u32.zir:63) - NondetRegStruct x3 = - exec_NondetTwitReg(ctx, bitAnd(arg0.low, Val(3)), LAYOUT_LOOKUP(layout2, low2)); - // AddrDecompose(zirgen/circuit/rv32im/v2/dsl/u32.zir:65) - Val x4 = ((Val(1) - arg1) * Val(49151)); - Val x5 = (((arg1 * Val(65535)) + x4) - arg0.high); - U16RegStruct x6 = exec_U16Reg(ctx, x5, LAYOUT_LOOKUP(layout2, upperDiff)); - // AddrDecompose(zirgen/circuit/rv32im/v2/dsl/u32.zir:67) - NondetRegStruct x7 = exec_IsZero(ctx, arg0.high, LAYOUT_LOOKUP(layout2, _0)); - EQZ(x7._super, "AddrDecompose(zirgen/circuit/rv32im/v2/dsl/u32.zir:67)"); - // Div(:19) - // AddrDecompose(zirgen/circuit/rv32im/v2/dsl/u32.zir:69) - Val x8 = ((arg0.low - x3._super) * Val(1509949441)); - NondetRegStruct x9 = exec_NondetU16Reg(ctx, x8, LAYOUT_LOOKUP(layout2, med14)); - // AddrDecompose(zirgen/circuit/rv32im/v2/dsl/u32.zir:71) - Val x10 = ((x9._super * Val(4)) + x3._super); - EQZ((x10 - arg0.low), "AddrDecompose(zirgen/circuit/rv32im/v2/dsl/u32.zir:71)"); - // AddrDecompose(zirgen/circuit/rv32im/v2/dsl/u32.zir:73) - Val x11 = ((arg0.high * Val(16384)) + x9._super); - return AddrDecomposeStruct{._super = x11, .low2 = x3}; -} -AddrDecomposeBitsStruct exec_AddrDecomposeBits(ExecContext& ctx, - ValU32Struct arg0, - Val arg1, - BoundLayout layout2) { - // AddrDecomposeBits(zirgen/circuit/rv32im/v2/dsl/u32.zir:81) - NondetRegStruct x3 = - exec_NondetBitReg(ctx, bitAnd(arg0.low, Val(1)), LAYOUT_LOOKUP(layout2, low0)); - // Div(:19) - // AddrDecomposeBits(zirgen/circuit/rv32im/v2/dsl/u32.zir:82) - Val x4 = (bitAnd(arg0.low, Val(2)) * Val(1006632961)); - NondetRegStruct x5 = exec_NondetBitReg(ctx, x4, LAYOUT_LOOKUP(layout2, low1)); - // AddrDecomposeBits(zirgen/circuit/rv32im/v2/dsl/u32.zir:83) - Val x6 = ((x5._super * Val(2)) + x3._super); - // AddrDecomposeBits(zirgen/circuit/rv32im/v2/dsl/u32.zir:85) - Val x7 = ((Val(1) - arg1) * Val(49151)); - Val x8 = (((arg1 * Val(65535)) + x7) - arg0.high); - U16RegStruct x9 = exec_U16Reg(ctx, x8, LAYOUT_LOOKUP(layout2, upperDiff)); - // AddrDecomposeBits(zirgen/circuit/rv32im/v2/dsl/u32.zir:87) - NondetRegStruct x10 = exec_IsZero(ctx, arg0.high, LAYOUT_LOOKUP(layout2, _0)); - EQZ(x10._super, "AddrDecomposeBits(zirgen/circuit/rv32im/v2/dsl/u32.zir:87)"); - // Div(:19) - // AddrDecomposeBits(zirgen/circuit/rv32im/v2/dsl/u32.zir:89) - Val x11 = ((arg0.low - x6) * Val(1509949441)); - NondetRegStruct x12 = exec_NondetU16Reg(ctx, x11, LAYOUT_LOOKUP(layout2, med14)); - // AddrDecomposeBits(zirgen/circuit/rv32im/v2/dsl/u32.zir:91) - Val x13 = ((x12._super * Val(4)) + x6); - EQZ((x13 - arg0.low), "AddrDecomposeBits(zirgen/circuit/rv32im/v2/dsl/u32.zir:91)"); - // AddrDecomposeBits(zirgen/circuit/rv32im/v2/dsl/u32.zir:93) - Val x14 = ((arg0.high * Val(16384)) + x12._super); - return AddrDecomposeBitsStruct{._super = x14, .low0 = x3, .low1 = x5, .low2 = x6, .addr = x14}; -} -CmpEqualStruct exec_CmpEqual(ExecContext& ctx, - ValU32Struct arg0, - ValU32Struct arg1, - BoundLayout layout2) { - // CmpEqual(zirgen/circuit/rv32im/v2/dsl/u32.zir:112) - NondetRegStruct x3 = exec_IsZero(ctx, (arg0.low - arg1.low), LAYOUT_LOOKUP(layout2, lowSame)); - // CmpEqual(zirgen/circuit/rv32im/v2/dsl/u32.zir:113) - NondetRegStruct x4 = exec_IsZero(ctx, (arg0.high - arg1.high), LAYOUT_LOOKUP(layout2, highSame)); - // CmpEqual(zirgen/circuit/rv32im/v2/dsl/u32.zir:114) - RegStruct x5 = exec_Reg(ctx, (x3._super * x4._super), LAYOUT_LOOKUP(layout2, isEqual)); - return CmpEqualStruct{.isEqual = x5}; -} -CmpLessThanUnsignedStruct exec_CmpLessThanUnsigned(ExecContext& ctx, - ValU32Struct arg0, - ValU32Struct arg1, - BoundLayout layout2) { - // SubU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:33) - // CmpLessThanUnsigned(zirgen/circuit/rv32im/v2/dsl/u32.zir:119) - Val x3 = ((arg0.low + Val(65536)) - arg1.low); - Val x4 = ((arg0.high + Val(65535)) - arg1.high); - NormalizeU32Struct x5 = exec_NormalizeU32( - ctx, DenormedValU32Struct{.low = x3, .high = x4}, LAYOUT_LOOKUP(layout2, diff)); - // CmpLessThanUnsigned(zirgen/circuit/rv32im/v2/dsl/u32.zir:120) - Val x6 = (Val(1) - x5.carry._super); - return CmpLessThanUnsignedStruct{.isLessThan = x6}; -} -NondetRegStruct -exec_GetSignU32(ExecContext& ctx, ValU32Struct arg0, BoundLayout layout1) { - // Div(:19) - // GetSignU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:125) - Val x2 = (bitAnd(arg0.high, Val(32768)) * Val(2013204481)); - NondetRegStruct x3 = exec_NondetBitReg(ctx, x2, LAYOUT_LOOKUP(layout1, _super)); - // GetSignU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:126) - Val x4 = (bitAnd(arg0.high, Val(32767)) * Val(2)); - NondetRegStruct x5 = exec_NondetU16Reg(ctx, x4, LAYOUT_LOOKUP(layout1, restTimesTwo)); - // GetSignU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:127) - Val x6 = ((x3._super * Val(32768)) + (x5._super * Val(1006632961))); - EQZ((arg0.high - x6), "GetSignU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:127)"); - return x3; -} -CmpLessThanStruct exec_CmpLessThan(ExecContext& ctx, - ValU32Struct arg0, - ValU32Struct arg1, - BoundLayout layout2) { - // SubU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:33) - // CmpLessThan(zirgen/circuit/rv32im/v2/dsl/u32.zir:133) - Val x3 = ((arg0.low + Val(65536)) - arg1.low); - Val x4 = ((arg0.high + Val(65535)) - arg1.high); - NormalizeU32Struct x5 = exec_NormalizeU32( - ctx, DenormedValU32Struct{.low = x3, .high = x4}, LAYOUT_LOOKUP(layout2, diff)); - // CmpLessThan(zirgen/circuit/rv32im/v2/dsl/u32.zir:134) - NondetRegStruct x6 = exec_GetSignU32(ctx, arg0, LAYOUT_LOOKUP(layout2, s1)); - // CmpLessThan(zirgen/circuit/rv32im/v2/dsl/u32.zir:135) - NondetRegStruct x7 = exec_GetSignU32(ctx, arg1, LAYOUT_LOOKUP(layout2, s2)); - // CmpLessThan(zirgen/circuit/rv32im/v2/dsl/u32.zir:136) - NondetRegStruct x8 = exec_GetSignU32(ctx, x5._super, LAYOUT_LOOKUP(layout2, s3)); - // CmpLessThan(zirgen/circuit/rv32im/v2/dsl/u32.zir:138) - Val x9 = (x6._super * (Val(1) - x7._super)); - Val x10 = ((Val(1) - x6._super) * x7._super); - RegStruct x11 = exec_Reg( - ctx, ((x9 * (Val(1) - x8._super)) + (x10 * x8._super)), LAYOUT_LOOKUP(layout2, overflow)); - // CmpLessThan(zirgen/circuit/rv32im/v2/dsl/u32.zir:140) - Val x12 = (x11._super._super + x8._super); - Val x13 = (x11._super._super * Val(2)); - RegStruct x14 = exec_Reg(ctx, (x12 - (x13 * x8._super)), LAYOUT_LOOKUP(layout2, isLessThan)); - return CmpLessThanStruct{.isLessThan = x14}; -} -ToBits_16_Struct -exec_ToBits_16_(ExecContext& ctx, Val arg0, BoundLayout layout1) { - // ToBits(zirgen/circuit/rv32im/v2/dsl/po2.zir:31) - NondetRegStruct16Array x2 = map( - Val16Array{Val(0), - Val(1), - Val(2), - Val(3), - Val(4), - Val(5), - Val(6), - Val(7), - Val(8), - Val(9), - Val(10), - Val(11), - Val(12), - Val(13), - Val(14), - Val(15)}, - LAYOUT_LOOKUP(layout1, _super), - ([&](Val16Array::value_type x3, BoundLayout x4) { - // Div(:16) - Val x5 = inv_0(Val16Array{Val(1), - Val(2), - Val(4), - Val(8), - Val(16), - Val(32), - Val(64), - Val(128), - Val(256), - Val(512), - Val(1024), - Val(2048), - Val(4096), - Val(8192), - Val(16384), - Val(32768)}[to_size_t(x3)]); - // Div(:17) - EQZ(((x5 * Val16Array{Val(1), - Val(2), - Val(4), - Val(8), - Val(16), - Val(32), - Val(64), - Val(128), - Val(256), - Val(512), - Val(1024), - Val(2048), - Val(4096), - Val(8192), - Val(16384), - Val(32768)}[to_size_t(x3)]) - - Val(1)), - "loc(callsite( Div ( :17:22) at ToBits ( " - "zirgen/circuit/rv32im/v2/dsl/po2.zir :31:43)))"); - NondetRegStruct x6 = exec_NondetBitReg(ctx, - (x5 * bitAnd(arg0, - Val16Array{Val(1), - Val(2), - Val(4), - Val(8), - Val(16), - Val(32), - Val(64), - Val(128), - Val(256), - Val(512), - Val(1024), - Val(2048), - Val(4096), - Val(8192), - Val(16384), - Val(32768)}[to_size_t(x3)])), - x4); - return x6; - })); - return ToBits_16_Struct{._super = x2}; -} -FromBits_16_Struct -exec_BitwiseAndU16(ExecContext& ctx, Val arg0, Val arg1, BoundLayout layout2) { - // BitwiseAndU16(zirgen/circuit/rv32im/v2/dsl/u32.zir:144) - ToBits_16_Struct x3 = exec_ToBits_16_(ctx, arg0, LAYOUT_LOOKUP(layout2, bitsX)); - // FromBits(zirgen/circuit/rv32im/v2/dsl/po2.zir:35) - // BitwiseAndU16(zirgen/circuit/rv32im/v2/dsl/u32.zir:145) - Val x4 = (x3._super[1]._super * Val(2)); - Val x5 = (x3._super[2]._super * Val(4)); - Val x6 = (x3._super[3]._super * Val(8)); - Val x7 = (x3._super[4]._super * Val(16)); - Val x8 = (x3._super[5]._super * Val(32)); - Val x9 = (x3._super[6]._super * Val(64)); - Val x10 = (x3._super[7]._super * Val(128)); - Val x11 = (x3._super[8]._super * Val(256)); - Val x12 = (x3._super[9]._super * Val(512)); - Val x13 = (x3._super[10]._super * Val(1024)); - Val x14 = (x3._super[11]._super * Val(2048)); - Val x15 = (x3._super[12]._super * Val(4096)); - Val x16 = (x3._super[13]._super * Val(8192)); - Val x17 = (x3._super[14]._super * Val(16384)); - Val x18 = (x3._super[15]._super * Val(32768)); - Val x19 = (x3._super[0]._super + x4); - Val x20 = (((x19 + x5) + x6) + x7); - Val x21 = (((x20 + x8) + x9) + x10); - Val x22 = (((x21 + x11) + x12) + x13); - Val x23 = (((x22 + x14) + x15) + x16); - EQZ((arg0 - ((x23 + x17) + x18)), "BitwiseAndU16(zirgen/circuit/rv32im/v2/dsl/u32.zir:145)"); - // BitwiseAndU16(zirgen/circuit/rv32im/v2/dsl/u32.zir:146) - ToBits_16_Struct x24 = exec_ToBits_16_(ctx, arg1, LAYOUT_LOOKUP(layout2, bitsY)); - // FromBits(zirgen/circuit/rv32im/v2/dsl/po2.zir:35) - // BitwiseAndU16(zirgen/circuit/rv32im/v2/dsl/u32.zir:147) - Val x25 = (x24._super[1]._super * Val(2)); - Val x26 = (x24._super[2]._super * Val(4)); - Val x27 = (x24._super[3]._super * Val(8)); - Val x28 = (x24._super[4]._super * Val(16)); - Val x29 = (x24._super[5]._super * Val(32)); - Val x30 = (x24._super[6]._super * Val(64)); - Val x31 = (x24._super[7]._super * Val(128)); - Val x32 = (x24._super[8]._super * Val(256)); - Val x33 = (x24._super[9]._super * Val(512)); - Val x34 = (x24._super[10]._super * Val(1024)); - Val x35 = (x24._super[11]._super * Val(2048)); - Val x36 = (x24._super[12]._super * Val(4096)); - Val x37 = (x24._super[13]._super * Val(8192)); - Val x38 = (x24._super[14]._super * Val(16384)); - Val x39 = (x24._super[15]._super * Val(32768)); - Val x40 = (x24._super[0]._super + x25); - Val x41 = (((x40 + x26) + x27) + x28); - Val x42 = (((x41 + x29) + x30) + x31); - Val x43 = (((x42 + x32) + x33) + x34); - Val x44 = (((x43 + x35) + x36) + x37); - EQZ((arg1 - ((x44 + x38) + x39)), "BitwiseAndU16(zirgen/circuit/rv32im/v2/dsl/u32.zir:147)"); - // BitwiseAndU16(zirgen/circuit/rv32im/v2/dsl/u32.zir:148) - Val x45 = (x3._super[0]._super * x24._super[0]._super); - Val x46 = (x3._super[1]._super * x24._super[1]._super); - Val x47 = (x3._super[2]._super * x24._super[2]._super); - Val x48 = (x3._super[3]._super * x24._super[3]._super); - Val x49 = (x3._super[4]._super * x24._super[4]._super); - Val x50 = (x3._super[5]._super * x24._super[5]._super); - Val x51 = (x3._super[6]._super * x24._super[6]._super); - Val x52 = (x3._super[7]._super * x24._super[7]._super); - Val x53 = (x3._super[8]._super * x24._super[8]._super); - Val x54 = (x3._super[9]._super * x24._super[9]._super); - Val x55 = (x3._super[10]._super * x24._super[10]._super); - Val x56 = (x3._super[11]._super * x24._super[11]._super); - Val x57 = (x3._super[12]._super * x24._super[12]._super); - Val x58 = (x3._super[13]._super * x24._super[13]._super); - Val x59 = (x3._super[14]._super * x24._super[14]._super); - Val x60 = (x3._super[15]._super * x24._super[15]._super); - // FromBits(zirgen/circuit/rv32im/v2/dsl/po2.zir:35) - // BitwiseAndU16(zirgen/circuit/rv32im/v2/dsl/u32.zir:149) - Val x61 = (((x45 + (x46 * Val(2))) + (x47 * Val(4))) + (x48 * Val(8))); - Val x62 = (((x61 + (x49 * Val(16))) + (x50 * Val(32))) + (x51 * Val(64))); - Val x63 = (((x62 + (x52 * Val(128))) + (x53 * Val(256))) + (x54 * Val(512))); - Val x64 = (((x63 + (x55 * Val(1024))) + (x56 * Val(2048))) + (x57 * Val(4096))); - Val x65 = (((x64 + (x58 * Val(8192))) + (x59 * Val(16384))) + (x60 * Val(32768))); - return FromBits_16_Struct{._super = x65}; -} -ValU32Struct exec_BitwiseAnd(ExecContext& ctx, - ValU32Struct arg0, - ValU32Struct arg1, - BoundLayout layout2) { - // BitwiseAnd(zirgen/circuit/rv32im/v2/dsl/u32.zir:155) - FromBits_16_Struct x3 = exec_BitwiseAndU16(ctx, arg0.low, arg1.low, LAYOUT_LOOKUP(layout2, _0)); - FromBits_16_Struct x4 = exec_BitwiseAndU16(ctx, arg0.high, arg1.high, LAYOUT_LOOKUP(layout2, _1)); - return ValU32Struct{.low = x3._super, .high = x4._super}; -} -ValU32Struct exec_BitwiseOr(ExecContext& ctx, - ValU32Struct arg0, - ValU32Struct arg1, - BoundLayout layout2) { - // BitwiseOr(zirgen/circuit/rv32im/v2/dsl/u32.zir:159) - ValU32Struct x3 = exec_BitwiseAnd(ctx, arg0, arg1, LAYOUT_LOOKUP(layout2, andXy)); - // BitwiseOr(zirgen/circuit/rv32im/v2/dsl/u32.zir:160) - Val x4 = ((arg0.low + arg1.low) - x3.low); - Val x5 = ((arg0.high + arg1.high) - x3.high); - return ValU32Struct{.low = x4, .high = x5}; -} -ValU32Struct exec_BitwiseXor(ExecContext& ctx, - ValU32Struct arg0, - ValU32Struct arg1, - BoundLayout layout2) { - // BitwiseXor(zirgen/circuit/rv32im/v2/dsl/u32.zir:164) - ValU32Struct x3 = exec_BitwiseAnd(ctx, arg0, arg1, LAYOUT_LOOKUP(layout2, andXy)); - // BitwiseXor(zirgen/circuit/rv32im/v2/dsl/u32.zir:165) - Val x4 = ((arg0.low + arg1.low) - (x3.low * Val(2))); - Val x5 = ((arg0.high + arg1.high) - (x3.high * Val(2))); - return ValU32Struct{.low = x4, .high = x5}; -} -DecoderStruct -exec_Decoder(ExecContext& ctx, ValU32Struct arg0, BoundLayout layout1) { - // Div(:19) - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:15) - Val x2 = (bitAnd(arg0.high, Val(32768)) * Val(2013204481)); - NondetRegStruct x3 = exec_NondetBitReg(ctx, x2, LAYOUT_LOOKUP(layout1, _f7_6)); - // Div(:19) - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:16) - Val x4 = (bitAnd(arg0.high, Val(24576)) * Val(2013020161)); - NondetRegStruct x5 = exec_NondetTwitReg(ctx, x4, LAYOUT_LOOKUP(layout1, _f7_45)); - // Div(:19) - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:17) - Val x6 = (bitAnd(arg0.high, Val(6144)) * Val(2012282881)); - NondetRegStruct x7 = exec_NondetTwitReg(ctx, x6, LAYOUT_LOOKUP(layout1, _f7_23)); - // Div(:19) - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:18) - Val x8 = (bitAnd(arg0.high, Val(1536)) * Val(2009333761)); - NondetRegStruct x9 = exec_NondetTwitReg(ctx, x8, LAYOUT_LOOKUP(layout1, _f7_01)); - // Div(:19) - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:19) - Val x10 = (bitAnd(arg0.high, Val(384)) * Val(1997537281)); - NondetRegStruct x11 = exec_NondetTwitReg(ctx, x10, LAYOUT_LOOKUP(layout1, _rs2_34)); - // Div(:19) - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:20) - Val x12 = (bitAnd(arg0.high, Val(96)) * Val(1950351361)); - NondetRegStruct x13 = exec_NondetTwitReg(ctx, x12, LAYOUT_LOOKUP(layout1, _rs2_12)); - // Div(:19) - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:21) - Val x14 = (bitAnd(arg0.high, Val(16)) * Val(1887436801)); - NondetRegStruct x15 = exec_NondetBitReg(ctx, x14, LAYOUT_LOOKUP(layout1, _rs2_0)); - // Div(:19) - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:22) - Val x16 = (bitAnd(arg0.high, Val(12)) * Val(1509949441)); - NondetRegStruct x17 = exec_NondetTwitReg(ctx, x16, LAYOUT_LOOKUP(layout1, _rs1_34)); - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:23) - NondetRegStruct x18 = - exec_NondetTwitReg(ctx, bitAnd(arg0.high, Val(3)), LAYOUT_LOOKUP(layout1, _rs1_12)); - // Div(:19) - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:24) - Val x19 = (bitAnd(arg0.low, Val(32768)) * Val(2013204481)); - NondetRegStruct x20 = exec_NondetBitReg(ctx, x19, LAYOUT_LOOKUP(layout1, _rs1_0)); - // Div(:19) - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:25) - Val x21 = (bitAnd(arg0.low, Val(16384)) * Val(2013143041)); - NondetRegStruct x22 = exec_NondetBitReg(ctx, x21, LAYOUT_LOOKUP(layout1, _f3_2)); - // Div(:19) - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:26) - Val x23 = (bitAnd(arg0.low, Val(12288)) * Val(2012774401)); - NondetRegStruct x24 = exec_NondetTwitReg(ctx, x23, LAYOUT_LOOKUP(layout1, _f3_01)); - // Div(:19) - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:27) - Val x25 = (bitAnd(arg0.low, Val(3072)) * Val(2011299841)); - NondetRegStruct x26 = exec_NondetTwitReg(ctx, x25, LAYOUT_LOOKUP(layout1, _rd_34)); - // Div(:19) - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:28) - Val x27 = (bitAnd(arg0.low, Val(768)) * Val(2005401601)); - NondetRegStruct x28 = exec_NondetTwitReg(ctx, x27, LAYOUT_LOOKUP(layout1, _rd_12)); - // Div(:19) - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:29) - Val x29 = (bitAnd(arg0.low, Val(128)) * Val(1997537281)); - NondetRegStruct x30 = exec_NondetTwitReg(ctx, x29, LAYOUT_LOOKUP(layout1, _rd_0)); - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:34) - NondetRegStruct x31 = - exec_NondetReg(ctx, bitAnd(arg0.low, Val(127)), LAYOUT_LOOKUP(layout1, opcode)); - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:37) - Val x32 = ((x3._super * Val(32768)) + (x5._super * Val(8192))); - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:39) - Val x33 = ((x32 + (x7._super * Val(2048))) + (x9._super * Val(512))); - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:41) - Val x34 = ((x33 + (x11._super * Val(128))) + (x13._super * Val(32))); - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:44) - Val x35 = (x17._super * Val(4)); - Val x36 = (((x34 + (x15._super * Val(16))) + x35) + x18._super); - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:37) - EQZ((arg0.high - x36), "Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:37)"); - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:46) - Val x37 = (x20._super * Val(32768)); - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:47) - Val x38 = ((x37 + (x22._super * Val(16384))) + (x24._super * Val(4096))); - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:49) - Val x39 = ((x38 + (x26._super * Val(1024))) + (x28._super * Val(256))); - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:46) - Val x40 = (arg0.low - ((x39 + (x30._super * Val(128))) + x31._super)); - EQZ(x40, "Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:46)"); - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:55) - Val x41 = ((x17._super * Val(8)) + (x18._super * Val(2))); - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:56) - Val x42 = (x11._super * Val(8)); - Val x43 = (x13._super * Val(2)); - Val x44 = ((x42 + x43) + x15._super); - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:57) - Val x45 = (x26._super * Val(8)); - Val x46 = (x28._super * Val(2)); - Val x47 = ((x45 + x46) + x30._super); - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:58) - Val x48 = ((x5._super * Val(16)) + (x7._super * Val(4))); - Val x49 = (x48 + x9._super); - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:59) - Val x50 = ((x3._super * Val(64)) + x49); - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:60) - Val x51 = ((x22._super * Val(4)) + x24._super); - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:66) - Val x52 = (x3._super * Val(61440)); - Val x53 = (x52 + (x50 * Val(32))); - Val x54 = (x3._super * Val(65535)); - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:68) - Val x55 = (x49 * Val(32)); - Val x56 = (((x52 + (x30._super * Val(2048))) + x55) + x45); - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:71) - Val x57 = ((x37 + (x51 * Val(4096))) + (x15._super * Val(2048))); - Val x58 = (((x57 + x55) + x42) + x43); - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:72) - Val x59 = ((x3._super * Val(65520)) + x35); - return DecoderStruct{.opcode = x31, - .rs1 = (x41 + x20._super), - .rs2 = x44, - .rd = x47, - .func7 = x50, - .func3 = x51, - .immI = ValU32Struct{.low = (x53 + x44), .high = x54}, - .immS = ValU32Struct{.low = (x53 + x47), .high = x54}, - .immB = ValU32Struct{.low = (x56 + x46), .high = x54}, - .immU = ValU32Struct{.low = x38, .high = arg0.high}, - .immJ = ValU32Struct{.low = x58, .high = (x59 + x18._super)}}; -} -MemoryArgStruct exec_MemoryArg(ExecContext& ctx, - Val arg0, - Val arg1, - Val arg2, - ValU32Struct arg3, - BoundLayout layout4) { - // MemoryArg(zirgen/circuit/rv32im/v2/dsl/mem.zir:25) - NondetRegStruct x5 = exec_NondetReg(ctx, arg0, LAYOUT_LOOKUP(layout4, count)); - // MemoryArg(zirgen/circuit/rv32im/v2/dsl/mem.zir:26) - NondetRegStruct x6 = exec_NondetReg(ctx, arg1, LAYOUT_LOOKUP(layout4, addr)); - // MemoryArg(zirgen/circuit/rv32im/v2/dsl/mem.zir:27) - NondetRegStruct x7 = exec_NondetReg(ctx, arg2, LAYOUT_LOOKUP(layout4, cycle)); - // MemoryArg(zirgen/circuit/rv32im/v2/dsl/mem.zir:28) - NondetRegStruct x8 = exec_NondetReg(ctx, arg3.low, LAYOUT_LOOKUP(layout4, dataLow)); - // MemoryArg(zirgen/circuit/rv32im/v2/dsl/mem.zir:29) - NondetRegStruct x9 = exec_NondetReg(ctx, arg3.high, LAYOUT_LOOKUP(layout4, dataHigh)); - // MemoryDelta(zirgen/circuit/rv32im/v2/dsl/mem.zir:21) - // MemoryArg(zirgen/circuit/rv32im/v2/dsl/mem.zir:30) - INVOKE_EXTERN(ctx, memoryDelta, x6._super, x7._super, x8._super, x9._super, x5._super); - return MemoryArgStruct{.count = x5, .addr = x6, .cycle = x7, .dataLow = x8, .dataHigh = x9}; -} -CycleArgStruct -exec_CycleArg(ExecContext& ctx, Val arg0, Val arg1, BoundLayout layout2) { - // CycleArg(zirgen/circuit/rv32im/v2/dsl/mem.zir:54) - NondetRegStruct x3 = exec_NondetReg(ctx, arg0, LAYOUT_LOOKUP(layout2, count)); - // CycleArg(zirgen/circuit/rv32im/v2/dsl/mem.zir:55) - NondetRegStruct x4 = exec_NondetReg(ctx, arg1, LAYOUT_LOOKUP(layout2, cycle)); - // LookupDelta(zirgen/circuit/rv32im/v2/dsl/lookups.zir:4) - // CycleArg(zirgen/circuit/rv32im/v2/dsl/mem.zir:56) - INVOKE_EXTERN(ctx, lookupDelta, Val(0), x4._super, x3._super); - return CycleArgStruct{.count = x3, .cycle = x4}; -} -IsCycleStruct exec_IsCycle(ExecContext& ctx, Val arg0, BoundLayout layout1) { - // IsCycle(zirgen/circuit/rv32im/v2/dsl/mem.zir:60) - CycleArgStruct x2 = exec_CycleArg(ctx, Val(1), arg0, LAYOUT_LOOKUP(layout1, arg)); - // IsCycle(zirgen/circuit/rv32im/v2/dsl/mem.zir:61) - Val x3 = (x2.count._super - Val(1)); - EQZ(x3, "IsCycle(zirgen/circuit/rv32im/v2/dsl/mem.zir:61)"); - // IsCycle(zirgen/circuit/rv32im/v2/dsl/mem.zir:62) - Val x4 = (x2.cycle._super - arg0); - EQZ(x4, "IsCycle(zirgen/circuit/rv32im/v2/dsl/mem.zir:62)"); - return IsCycleStruct{}; -} -MemoryIOStruct -exec_MemoryIO(ExecContext& ctx, RegStruct arg0, Val arg1, BoundLayout layout2) { - // GetMemoryTxn(zirgen/circuit/rv32im/v2/dsl/mem.zir:51) - // MemoryIO(zirgen/circuit/rv32im/v2/dsl/mem.zir:66) - auto [x3, x4, x5, x6, x7] = INVOKE_EXTERN(ctx, getMemoryTxn, arg1); - // MemoryIO(zirgen/circuit/rv32im/v2/dsl/mem.zir:67) - MemoryArgStruct x8 = exec_MemoryArg(ctx, - Val(2013265920), - arg1, - x3, - ValU32Struct{.low = x4, .high = x5}, - LAYOUT_LOOKUP(layout2, oldTxn)); - // MemoryIO(zirgen/circuit/rv32im/v2/dsl/mem.zir:68) - MemoryArgStruct x9 = exec_MemoryArg(ctx, - Val(1), - arg1, - arg0._super._super, - ValU32Struct{.low = x6, .high = x7}, - LAYOUT_LOOKUP(layout2, newTxn)); - // MemoryIO(zirgen/circuit/rv32im/v2/dsl/mem.zir:69) - Val x10 = (x8.count._super - Val(2013265920)); - EQZ(x10, "MemoryIO(zirgen/circuit/rv32im/v2/dsl/mem.zir:69)"); - // MemoryIO(zirgen/circuit/rv32im/v2/dsl/mem.zir:70) - Val x11 = (x9.count._super - Val(1)); - EQZ(x11, "MemoryIO(zirgen/circuit/rv32im/v2/dsl/mem.zir:70)"); - // MemoryIO(zirgen/circuit/rv32im/v2/dsl/mem.zir:72) - Val x12 = (x9.cycle._super - arg0._super._super); - EQZ(x12, "MemoryIO(zirgen/circuit/rv32im/v2/dsl/mem.zir:72)"); - // MemoryIO(zirgen/circuit/rv32im/v2/dsl/mem.zir:74) - Val x13 = (x8.addr._super - x9.addr._super); - EQZ(x13, "MemoryIO(zirgen/circuit/rv32im/v2/dsl/mem.zir:74)"); - // MemoryIO(zirgen/circuit/rv32im/v2/dsl/mem.zir:75) - Val x14 = (x9.addr._super - arg1); - EQZ(x14, "MemoryIO(zirgen/circuit/rv32im/v2/dsl/mem.zir:75)"); - return MemoryIOStruct{.oldTxn = x8, .newTxn = x9}; -} -IsForwardStruct -exec_IsForward(ExecContext& ctx, MemoryIOStruct arg0, BoundLayout layout1) { - // IsForward(zirgen/circuit/rv32im/v2/dsl/mem.zir:84) - Val x2 = (arg0.newTxn.cycle._super - arg0.oldTxn.cycle._super); - IsCycleStruct x3 = exec_IsCycle(ctx, x2, LAYOUT_LOOKUP(layout1, _0)); - return IsForwardStruct{}; -} -GetDataStruct -exec_MemoryRead(ExecContext& ctx, RegStruct arg0, Val arg1, BoundLayout layout2) { - // MemoryRead(zirgen/circuit/rv32im/v2/dsl/mem.zir:89) - MemoryIOStruct x3 = exec_MemoryIO(ctx, arg0, arg1, LAYOUT_LOOKUP(layout2, io)); - // IsRead(zirgen/circuit/rv32im/v2/dsl/mem.zir:79) - // MemoryRead(zirgen/circuit/rv32im/v2/dsl/mem.zir:90) - Val x4 = (x3.oldTxn.dataLow._super - x3.newTxn.dataLow._super); - EQZ(x4, - "loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at MemoryRead ( " - "zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10)))"); - // IsRead(zirgen/circuit/rv32im/v2/dsl/mem.zir:80) - Val x5 = (x3.oldTxn.dataHigh._super - x3.newTxn.dataHigh._super); - EQZ(x5, - "loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at MemoryRead ( " - "zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10)))"); - // MemoryRead(zirgen/circuit/rv32im/v2/dsl/mem.zir:91) - IsForwardStruct x6 = exec_IsForward(ctx, x3, LAYOUT_LOOKUP(layout2, _0)); - // ValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:10) - // GetData(zirgen/circuit/rv32im/v2/dsl/mem.zir:36) - // MemoryRead(zirgen/circuit/rv32im/v2/dsl/mem.zir:92) - ValU32Struct x7 = - ValU32Struct{.low = x3.newTxn.dataLow._super, .high = x3.newTxn.dataHigh._super}; - return GetDataStruct{._super = x7, .diffLow = Val(0), .diffHigh = Val(1)}; -} -MemoryWriteStruct exec_MemoryWrite(ExecContext& ctx, - RegStruct arg0, - Val arg1, - ValU32Struct arg2, - BoundLayout layout3) { - // MemoryWrite(zirgen/circuit/rv32im/v2/dsl/mem.zir:97) - MemoryIOStruct x4 = exec_MemoryIO(ctx, arg0, arg1, LAYOUT_LOOKUP(layout3, io)); - // MemoryWrite(zirgen/circuit/rv32im/v2/dsl/mem.zir:98) - IsForwardStruct x5 = exec_IsForward(ctx, x4, LAYOUT_LOOKUP(layout3, _0)); - // MemoryWrite(zirgen/circuit/rv32im/v2/dsl/mem.zir:99) - Val x6 = (x4.newTxn.dataLow._super - arg2.low); - EQZ(x6, "MemoryWrite(zirgen/circuit/rv32im/v2/dsl/mem.zir:99)"); - // MemoryWrite(zirgen/circuit/rv32im/v2/dsl/mem.zir:100) - Val x7 = (x4.newTxn.dataHigh._super - arg2.high); - EQZ(x7, "MemoryWrite(zirgen/circuit/rv32im/v2/dsl/mem.zir:100)"); - return MemoryWriteStruct{}; -} -MemoryWriteUnconstrainedStruct -exec_MemoryWriteUnconstrained(ExecContext& ctx, - RegStruct arg0, - Val arg1, - BoundLayout layout2) { - // MemoryWriteUnconstrained(zirgen/circuit/rv32im/v2/dsl/mem.zir:105) - MemoryIOStruct x3 = exec_MemoryIO(ctx, arg0, arg1, LAYOUT_LOOKUP(layout2, io)); - // MemoryWriteUnconstrained(zirgen/circuit/rv32im/v2/dsl/mem.zir:106) - IsForwardStruct x4 = exec_IsForward(ctx, x3, LAYOUT_LOOKUP(layout2, _0)); - return MemoryWriteUnconstrainedStruct{}; -} -GetDataStruct exec_MemoryPageIn(ExecContext& ctx, - RegStruct arg0, - Val arg1, - BoundLayout layout2) { - // MemoryPageIn(zirgen/circuit/rv32im/v2/dsl/mem.zir:112) - MemoryIOStruct x3 = exec_MemoryIO(ctx, arg0, arg1, LAYOUT_LOOKUP(layout2, io)); - // IsRead(zirgen/circuit/rv32im/v2/dsl/mem.zir:79) - // MemoryPageIn(zirgen/circuit/rv32im/v2/dsl/mem.zir:113) - Val x4 = (x3.oldTxn.dataLow._super - x3.newTxn.dataLow._super); - EQZ(x4, - "loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at MemoryPageIn ( " - "zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10)))"); - // IsRead(zirgen/circuit/rv32im/v2/dsl/mem.zir:80) - Val x5 = (x3.oldTxn.dataHigh._super - x3.newTxn.dataHigh._super); - EQZ(x5, - "loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at MemoryPageIn ( " - "zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10)))"); - // MemoryPageIn(zirgen/circuit/rv32im/v2/dsl/mem.zir:114) - Val x6 = (x3.newTxn.cycle._super - x3.oldTxn.cycle._super); - // ValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:10) - // GetData(zirgen/circuit/rv32im/v2/dsl/mem.zir:36) - ValU32Struct x7 = - ValU32Struct{.low = x3.newTxn.dataLow._super, .high = x3.newTxn.dataHigh._super}; - return GetDataStruct{._super = x7, .diffLow = Val(0), .diffHigh = x6}; -} -GetDataStruct exec_MemoryPageOut(ExecContext& ctx, - RegStruct arg0, - Val arg1, - BoundLayout layout2) { - // MemoryPageOut(zirgen/circuit/rv32im/v2/dsl/mem.zir:120) - MemoryIOStruct x3 = exec_MemoryIO(ctx, arg0, arg1, LAYOUT_LOOKUP(layout2, io)); - // MemoryPageOut(zirgen/circuit/rv32im/v2/dsl/mem.zir:121) - IsForwardStruct x4 = exec_IsForward(ctx, x3, LAYOUT_LOOKUP(layout2, _0)); - // MemoryPageOut(zirgen/circuit/rv32im/v2/dsl/mem.zir:122) - Val x5 = (x3.newTxn.dataLow._super - x3.oldTxn.dataLow._super); - // MemoryPageOut(zirgen/circuit/rv32im/v2/dsl/mem.zir:123) - Val x6 = (x3.newTxn.dataHigh._super - x3.oldTxn.dataHigh._super); - // ValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:10) - // GetData(zirgen/circuit/rv32im/v2/dsl/mem.zir:36) - // MemoryPageOut(zirgen/circuit/rv32im/v2/dsl/mem.zir:122) - ValU32Struct x7 = - ValU32Struct{.low = x3.oldTxn.dataLow._super, .high = x3.oldTxn.dataHigh._super}; - return GetDataStruct{._super = x7, .diffLow = x5, .diffHigh = x6}; -} -OneHot_3_Struct exec_OneHot_3_(ExecContext& ctx, Val arg0, BoundLayout layout1) { - // OneHot(zirgen/circuit/rv32im/v2/dsl/one_hot.zir:7) - NondetRegStruct3Array x2 = - map(Val3Array{Val(0), Val(1), Val(2)}, - LAYOUT_LOOKUP(layout1, _super), - ([&](Val3Array::value_type x3, BoundLayout x4) { - NondetRegStruct x5 = exec_NondetBitReg(ctx, isz((x3 - arg0)), x4); - return x5; - })); - // OneHot(zirgen/circuit/rv32im/v2/dsl/one_hot.zir:9) - Val x6 = (x2[0]._super + x2[1]._super); - EQZ(((x6 + x2[2]._super) - Val(1)), "OneHot(zirgen/circuit/rv32im/v2/dsl/one_hot.zir:9)"); - // OneHot(zirgen/circuit/rv32im/v2/dsl/one_hot.zir:11) - Val x7 = (x2[2]._super * Val(2)); - Val x8 = (x2[1]._super + x7); - EQZ((x8 - arg0), "OneHot(zirgen/circuit/rv32im/v2/dsl/one_hot.zir:11)"); - return OneHot_3_Struct{._super = x2}; -} -GetDataStruct exec_MemoryGet(ExecContext& ctx, - RegStruct arg0, - Val arg1, - OneHot_3_Struct arg2, - BoundLayout layout3) { - GetDataStruct x4; - if (to_size_t(arg2._super[0]._super)) { - // MemoryGet(zirgen/circuit/rv32im/v2/dsl/mem.zir:129) - GetDataStruct x5 = exec_MemoryRead(ctx, arg0, arg1, LAYOUT_LOOKUP(layout3, _super.arm0)); - x4 = x5; - } else if (to_size_t(arg2._super[1]._super)) { - // MemoryGet(zirgen/circuit/rv32im/v2/dsl/mem.zir:130) - GetDataStruct x6 = - exec_MemoryPageIn(ctx, arg0, arg1, LAYOUT_LOOKUP(layout3, _super.arm1._super)); - // MemoryGet(zirgen/circuit/rv32im/v2/dsl/mem.zir:128) - STORE(LAYOUT_LOOKUP(layout3, _super.arm1._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout3, _super.arm1._extra0.count._super), 0), - "MemoryGet(zirgen/circuit/rv32im/v2/dsl/mem.zir:128)"); - x4 = x6; - } else if (to_size_t(arg2._super[2]._super)) { - // MemoryGet(zirgen/circuit/rv32im/v2/dsl/mem.zir:131) - GetDataStruct x7 = exec_MemoryPageOut(ctx, arg0, arg1, LAYOUT_LOOKUP(layout3, _super.arm2)); - x4 = x7; - } else { - assert(0 && "Reached unreachable mux arm"); - } - return x4; -} -OneHot_8_Struct exec_OneHot_8_(ExecContext& ctx, Val arg0, BoundLayout layout1) { - // OneHot(zirgen/circuit/rv32im/v2/dsl/one_hot.zir:7) - NondetRegStruct8Array x2 = - map(Val8Array{Val(0), Val(1), Val(2), Val(3), Val(4), Val(5), Val(6), Val(7)}, - LAYOUT_LOOKUP(layout1, _super), - ([&](Val8Array::value_type x3, BoundLayout x4) { - NondetRegStruct x5 = exec_NondetBitReg(ctx, isz((x3 - arg0)), x4); - return x5; - })); - // OneHot(zirgen/circuit/rv32im/v2/dsl/one_hot.zir:9) - Val x6 = (x2[0]._super + x2[1]._super); - Val x7 = ((x6 + x2[2]._super) + x2[3]._super); - Val x8 = ((x7 + x2[4]._super) + x2[5]._super); - Val x9 = ((x8 + x2[6]._super) + x2[7]._super); - EQZ((x9 - Val(1)), "OneHot(zirgen/circuit/rv32im/v2/dsl/one_hot.zir:9)"); - // OneHot(zirgen/circuit/rv32im/v2/dsl/one_hot.zir:11) - Val x10 = (x2[2]._super * Val(2)); - Val x11 = (x2[3]._super * Val(3)); - Val x12 = (x2[4]._super * Val(4)); - Val x13 = (x2[5]._super * Val(5)); - Val x14 = (x2[6]._super * Val(6)); - Val x15 = (x2[7]._super * Val(7)); - Val x16 = (x2[1]._super + x10); - Val x17 = (((x16 + x11) + x12) + x13); - Val x18 = (((x17 + x14) + x15) - arg0); - EQZ(x18, "OneHot(zirgen/circuit/rv32im/v2/dsl/one_hot.zir:11)"); - return OneHot_8_Struct{._super = x2, .bits = x2}; -} -InstInputStruct exec_InstInput(ExecContext& ctx, - Val arg0, - Val arg1, - Val arg2, - ValU32Struct arg3, - Val arg4, - Val arg5, - BoundLayout layout6) { - // InstInput(zirgen/circuit/rv32im/v2/dsl/inst.zir:15) - OneHot_8_Struct x7 = exec_OneHot_8_(ctx, arg2, LAYOUT_LOOKUP(layout6, minorOnehot)); - return InstInputStruct{.pcU32 = arg3, .state = arg4, .mode = arg5, .minorOnehot = x7}; -} -DecoderStruct exec_DecodeInst(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2) { - // GetDiffCount(zirgen/circuit/rv32im/v2/dsl/mem.zir:22) - // DecodeInst(zirgen/circuit/rv32im/v2/dsl/inst.zir:20) - Val x3 = INVOKE_EXTERN(ctx, getDiffCount, arg0._super._super); - CycleArgStruct x4 = - exec_CycleArg(ctx, neg_0(x3), arg0._super._super, LAYOUT_LOOKUP(layout2, arg)); - // DecodeInst(zirgen/circuit/rv32im/v2/dsl/inst.zir:22) - Val x5 = (x4.cycle._super - arg0._super._super); - EQZ(x5, "DecodeInst(zirgen/circuit/rv32im/v2/dsl/inst.zir:22)"); - // DecodeInst(zirgen/circuit/rv32im/v2/dsl/inst.zir:24) - AddrDecomposeStruct x6 = - exec_AddrDecompose(ctx, arg1.pcU32, arg1.mode, LAYOUT_LOOKUP(layout2, pcAddr)); - // DecodeInst(zirgen/circuit/rv32im/v2/dsl/inst.zir:26) - EQZ(x6.low2._super, "DecodeInst(zirgen/circuit/rv32im/v2/dsl/inst.zir:26)"); - // DecodeInst(zirgen/circuit/rv32im/v2/dsl/inst.zir:28) - GetDataStruct x7 = exec_MemoryRead(ctx, arg0, x6._super, LAYOUT_LOOKUP(layout2, loadInst)); - // DecodeInst(zirgen/circuit/rv32im/v2/dsl/inst.zir:30) - DecoderStruct x8 = exec_Decoder(ctx, x7._super, LAYOUT_LOOKUP(layout2, _super)); - return x8; -} -GetDataStruct exec_ReadReg(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - Val arg2, - BoundLayout layout3) { - // ReadReg(zirgen/circuit/rv32im/v2/dsl/inst.zir:34) - Val x4 = ((Val(1) - arg1.mode) * Val(1073725472)); - Val x5 = ((arg1.mode * Val(1073725440)) + x4); - RegStruct x6 = exec_Reg(ctx, (x5 + arg2), LAYOUT_LOOKUP(layout3, addr)); - // ReadReg(zirgen/circuit/rv32im/v2/dsl/inst.zir:35) - GetDataStruct x7 = exec_MemoryRead(ctx, arg0, x6._super._super, LAYOUT_LOOKUP(layout3, _super)); - return x7; -} -WriteRdStruct exec_WriteRd(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - DecoderStruct arg2, - Val arg3, - ValU32Struct arg4, - BoundLayout layout5) { - // WriteRd(zirgen/circuit/rv32im/v2/dsl/inst.zir:39) - NondetRegStruct x6 = exec_IsZero(ctx, arg2.rd, LAYOUT_LOOKUP(layout5, isRd0)); - // WriteRd(zirgen/circuit/rv32im/v2/dsl/inst.zir:40) - Val x7 = ((Val(1) - x6._super) * arg3); - // WriteRd(zirgen/circuit/rv32im/v2/dsl/inst.zir:42) - Val x8 = ((Val(1) - arg1.mode) * Val(1073725472)); - Val x9 = ((arg1.mode * Val(1073725440)) + x8); - Val x10 = ((Val(1) - x7) * Val(64)); - RegStruct x11 = exec_Reg(ctx, ((x9 + x10) + (x7 * arg2.rd)), LAYOUT_LOOKUP(layout5, writeAddr)); - // WriteRd(zirgen/circuit/rv32im/v2/dsl/inst.zir:43) - MemoryWriteStruct x12 = - exec_MemoryWrite(ctx, arg0, x11._super._super, arg4, LAYOUT_LOOKUP(layout5, _0)); - return WriteRdStruct{}; -} -ExpandU32Struct exec_ExpandU32(ExecContext& ctx, - ValU32Struct arg0, - Val arg1, - BoundLayout layout2) { - // ExpandU32(zirgen/circuit/rv32im/v2/dsl/mult.zir:50) - NondetRegStruct x3 = - exec_NondetU8Reg(ctx, bitAnd(arg0.low, Val(255)), LAYOUT_LOOKUP(layout2, b0)); - // Div(:19) - // ExpandU32(zirgen/circuit/rv32im/v2/dsl/mult.zir:51) - Val x4 = (bitAnd(arg0.low, Val(65280)) * Val(2005401601)); - NondetRegStruct x5 = exec_NondetU8Reg(ctx, x4, LAYOUT_LOOKUP(layout2, b1)); - // ExpandU32(zirgen/circuit/rv32im/v2/dsl/mult.zir:52) - NondetRegStruct x6 = - exec_NondetU8Reg(ctx, bitAnd(arg0.high, Val(255)), LAYOUT_LOOKUP(layout2, b2)); - // Div(:19) - // ExpandU32(zirgen/circuit/rv32im/v2/dsl/mult.zir:53) - Val x7 = (bitAnd(arg0.high, Val(65280)) * Val(2005401601)); - NondetRegStruct x8 = exec_NondetU8Reg(ctx, x7, LAYOUT_LOOKUP(layout2, b3)); - // Div(:19) - // ExpandU32(zirgen/circuit/rv32im/v2/dsl/mult.zir:59) - Val x9 = (bitAnd(arg0.high, Val(32512)) * Val(1997537281)); - NondetRegStruct x10 = exec_NondetU8Reg(ctx, x9, LAYOUT_LOOKUP(layout2, b3Top7times2)); - // Div(:19) - // ExpandU32(zirgen/circuit/rv32im/v2/dsl/mult.zir:60) - Val x11 = (bitAnd(arg0.high, Val(32768)) * Val(2013204481)); - NondetRegStruct x12 = exec_NondetBitReg(ctx, x11, LAYOUT_LOOKUP(layout2, topBit)); - // ExpandU32(zirgen/circuit/rv32im/v2/dsl/mult.zir:62) - Val x13 = (x3._super + (x5._super * Val(256))); - EQZ((arg0.low - x13), "ExpandU32(zirgen/circuit/rv32im/v2/dsl/mult.zir:62)"); - // ExpandU32(zirgen/circuit/rv32im/v2/dsl/mult.zir:63) - Val x14 = (x6._super + (x10._super * Val(128))); - EQZ((arg0.high - (x14 + (x12._super * Val(32768)))), - "ExpandU32(zirgen/circuit/rv32im/v2/dsl/mult.zir:63)"); - // ExpandU32(zirgen/circuit/rv32im/v2/dsl/mult.zir:67) - Val x15 = ((x10._super * Val(1006632961)) + (x12._super * Val(128))); - EQZ((x8._super - x15), "ExpandU32(zirgen/circuit/rv32im/v2/dsl/mult.zir:67)"); - return ExpandU32Struct{.b0 = x3, .b1 = x5, .b2 = x6, .b3 = x8, .neg = (x12._super * arg1)}; -} -SplitTotalStruct -exec_SplitTotal(ExecContext& ctx, Val arg0, BoundLayout layout1) { - // SplitTotal(zirgen/circuit/rv32im/v2/dsl/mult.zir:97) - NondetRegStruct x2 = - exec_NondetU16Reg(ctx, bitAnd(arg0, Val(65535)), LAYOUT_LOOKUP(layout1, out)); - // SplitTotal(zirgen/circuit/rv32im/v2/dsl/mult.zir:98) - NondetRegStruct x3 = exec_NondetU8Reg( - ctx, (bitAnd(arg0, Val(16711680)) * Val(2013235201)), LAYOUT_LOOKUP(layout1, carryByte)); - // SplitTotal(zirgen/circuit/rv32im/v2/dsl/mult.zir:99) - NondetFakeTwitRegStruct x4 = exec_NondetFakeTwitReg( - ctx, (bitAnd(arg0, Val(251658240)) * Val(2013265801)), LAYOUT_LOOKUP(layout1, carryExtra)); - // SplitTotal(zirgen/circuit/rv32im/v2/dsl/mult.zir:100) - Val x5 = ((x4._super * Val(16777216)) + (x3._super * Val(65536))); - EQZ((arg0 - (x5 + x2._super)), "SplitTotal(zirgen/circuit/rv32im/v2/dsl/mult.zir:100)"); - // SplitTotal(zirgen/circuit/rv32im/v2/dsl/mult.zir:101) - Val x6 = ((x4._super * Val(256)) + x3._super); - return SplitTotalStruct{.out = x2, .carry = x6}; -} -MultiplyAccumulateStruct exec_MultiplyAccumulate(ExecContext& ctx, - ValU32Struct arg0, - ValU32Struct arg1, - ValU32Struct arg2, - MultiplySettingsStruct arg3, - BoundLayout layout4) { - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:115) - ExpandU32Struct x5 = exec_ExpandU32(ctx, arg0, arg3.aSigned, LAYOUT_LOOKUP(layout4, ax)); - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:116) - ExpandU32Struct x6 = exec_ExpandU32(ctx, arg1, arg3.bSigned, LAYOUT_LOOKUP(layout4, bx)); - // Div(:19) - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:118) - Val x7 = (bitAnd(arg2.high, Val(32768)) * Val(2013204481)); - NondetRegStruct x8 = exec_NondetBitReg(ctx, x7, LAYOUT_LOOKUP(layout4, cSign)); - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:119) - Val x9 = (bitAnd(arg2.high, Val(32767)) * Val(2)); - NondetRegStruct x10 = exec_NondetU16Reg(ctx, x9, LAYOUT_LOOKUP(layout4, cRestTimes2)); - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:120) - Val x11 = ((x8._super * Val(32768)) + (x10._super * Val(1006632961))); - EQZ((arg2.high - x11), "MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:120)"); - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:124) - Val x12 = (x5.b0._super * x6.b0._super); - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:125) - Val x13 = (x5.b0._super * x6.b1._super); - Val x14 = (x5.b1._super * x6.b0._super); - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:124) - Val x15 = ((arg2.low + x12) + ((x13 + x14) * Val(256))); - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:122) - SplitTotalStruct x16 = exec_SplitTotal(ctx, x15, LAYOUT_LOOKUP(layout4, s0)); - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:131) - Val x17 = (x5.b0._super * x6.b2._super); - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:130) - Val x18 = ((arg2.high + x16.carry) + x17); - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:131) - Val x19 = (x5.b1._super * x6.b1._super); - Val x20 = (x5.b2._super * x6.b0._super); - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:132) - Val x21 = (x5.b0._super * x6.b3._super); - Val x22 = (x5.b1._super * x6.b2._super); - Val x23 = (x5.b2._super * x6.b1._super); - Val x24 = (x5.b3._super * x6.b0._super); - Val x25 = (((x21 + x22) + x23) + x24); - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:131) - Val x26 = (((x18 + x19) + x20) + (x25 * Val(256))); - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:128) - SplitTotalStruct x27 = exec_SplitTotal(ctx, x26, LAYOUT_LOOKUP(layout4, s1)); - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:138) - Val x28 = ((x8._super * Val(65535)) * arg3.cSigned); - Val x29 = ((x27.carry + x28) + Val(131072)); - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:139) - Val x30 = (x5.b1._super * Val(256)); - Val x31 = (x5.b0._super + x30); - Val x32 = (x6.b1._super * Val(256)); - Val x33 = (x6.b0._super + x32); - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:140) - Val x34 = (x5.b1._super * x6.b3._super); - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:139) - Val x35 = (((x29 - (x31 * x6.neg)) - (x33 * x5.neg)) + x34); - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:140) - Val x36 = (x5.b2._super * x6.b2._super); - Val x37 = (x5.b3._super * x6.b1._super); - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:141) - Val x38 = (x5.b2._super * x6.b3._super); - Val x39 = (x5.b3._super * x6.b2._super); - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:140) - Val x40 = (((x35 + x36) + x37) + ((x38 + x39) * Val(256))); - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:136) - SplitTotalStruct x41 = exec_SplitTotal(ctx, x40, LAYOUT_LOOKUP(layout4, s2)); - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:147) - Val x42 = ((x41.carry + x28) + Val(131070)); - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:148) - Val x43 = (x5.b3._super * Val(256)); - Val x44 = (x5.b2._super + x43); - Val x45 = (x6.b3._super * Val(256)); - Val x46 = (x6.b2._super + x45); - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:149) - Val x47 = (x5.b3._super * x6.b3._super); - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:148) - Val x48 = (((x42 - (x44 * x6.neg)) - (x46 * x5.neg)) + x47); - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:150) - NondetRegStruct x49 = - exec_NondetU16Reg(ctx, bitAnd(x48, Val(65535)), LAYOUT_LOOKUP(layout4, s3Out)); - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:151) - FakeTwitRegStruct x50 = exec_FakeTwitReg( - ctx, ((x48 - x49._super) * Val(2013235201)), LAYOUT_LOOKUP(layout4, s3Carry)); - // ValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:10) - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:152) - ValU32Struct x51 = ValU32Struct{.low = x16.out._super, .high = x27.out._super}; - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:153) - ValU32Struct x52 = ValU32Struct{.low = x41.out._super, .high = x49._super}; - return MultiplyAccumulateStruct{.outLow = x51, .outHigh = x52}; -} -DivInputStruct exec_DivInput(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2) { - // DivInput(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:8) - EQZ((arg1.state - Val(32)), "DivInput(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:8)"); - // DivInput(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:10) - DecoderStruct x3 = exec_DecodeInst(ctx, arg0, arg1, LAYOUT_LOOKUP(layout2, decoded)); - // DivInput(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:11) - GetDataStruct x4 = exec_ReadReg(ctx, arg0, arg1, x3.rs1, LAYOUT_LOOKUP(layout2, rs1)); - // DivInput(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:12) - GetDataStruct x5 = exec_ReadReg(ctx, arg0, arg1, x3.rs2, LAYOUT_LOOKUP(layout2, rs2)); - return DivInputStruct{._super = arg1, .ii = arg1, .decoded = x3, .rs1 = x4, .rs2 = x5}; -} -DivideReturnStruct exec_DoDiv(ExecContext& ctx, - ValU32Struct arg0, - ValU32Struct arg1, - Val arg2, - Val arg3, - BoundLayout layout4) { - // Divide(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:43) - // DoDiv(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:47) - auto [x5, x6, x7, x8] = INVOKE_EXTERN( - ctx, divide, arg0.low, arg0.high, arg1.low, arg1.high, (arg2 + (arg3 * Val(2)))); - // DoDiv(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:50) - NondetRegStruct x9 = exec_NondetReg(ctx, x5, LAYOUT_LOOKUP(layout4, quotLow)); - // DoDiv(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:51) - NondetRegStruct x10 = exec_NondetReg(ctx, x6, LAYOUT_LOOKUP(layout4, quotHigh)); - // ValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:10) - // DoDiv(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:52) - ValU32Struct x11 = ValU32Struct{.low = x9._super, .high = x10._super}; - // DoDiv(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:54) - NondetRegStruct x12 = exec_NondetU16Reg(ctx, x7, LAYOUT_LOOKUP(layout4, remLow)); - // DoDiv(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:55) - NondetRegStruct x13 = exec_NondetU16Reg(ctx, x8, LAYOUT_LOOKUP(layout4, remHigh)); - // ValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:10) - // DoDiv(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:56) - ValU32Struct x14 = ValU32Struct{.low = x12._super, .high = x13._super}; - // DoDiv(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:60) - MultiplyAccumulateStruct x15 = exec_MultiplyAccumulate( - ctx, - x11, - arg1, - x14, - MultiplySettingsStruct{.aSigned = arg2, .bSigned = arg2, .cSigned = arg2}, - LAYOUT_LOOKUP(layout4, mul)); - // AssertEqU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:106) - // DoDiv(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:62) - Val x16 = (x15.outLow.low - arg0.low); - EQZ(x16, - "loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :106:10) at DoDiv ( " - "zirgen/circuit/rv32im/v2/dsl/inst_div.zir :62:15)))"); - // AssertEqU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:107) - Val x17 = (x15.outLow.high - arg0.high); - EQZ(x17, - "loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :107:11) at DoDiv ( " - "zirgen/circuit/rv32im/v2/dsl/inst_div.zir :62:15)))"); - // DoDiv(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:64) - Val x18 = isz(x15.outHigh.low); - NondetRegStruct x19 = exec_NondetBitReg(ctx, (Val(1) - x18), LAYOUT_LOOKUP(layout4, topBitType)); - // DoDiv(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:65) - Val x20 = (x19._super * Val(65535)); - // AssertEqU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:106) - Val x21 = (x15.outHigh.low - x20); - EQZ(x21, - "loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :106:10) at DoDiv ( " - "zirgen/circuit/rv32im/v2/dsl/inst_div.zir :65:15)))"); - // AssertEqU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:107) - Val x22 = (x15.outHigh.high - x20); - EQZ(x22, - "loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :107:11) at DoDiv ( " - "zirgen/circuit/rv32im/v2/dsl/inst_div.zir :65:15)))"); - return DivideReturnStruct{.quot = x11, .rem = x14}; -} -ValU32Struct exec_OpSRL(ExecContext& ctx, DivInputStruct arg0, BoundLayout layout1) { - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:62) - // OpSRL(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:85) - Val x2 = (arg0.decoded.opcode._super - Val(51)); - EQZ(x2, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :62:19) at OpSRL ( " - "zirgen/circuit/rv32im/v2/dsl/inst_div.zir :85:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:63) - Val x3 = (arg0.decoded.func3 - Val(5)); - EQZ(x3, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at OpSRL ( " - "zirgen/circuit/rv32im/v2/dsl/inst_div.zir :85:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:64) - EQZ(arg0.decoded.func7, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at OpSRL ( " - "zirgen/circuit/rv32im/v2/dsl/inst_div.zir :85:20)))"); - // OpSRL(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:86) - ValU32Struct x4 = exec_DynPo2(ctx, arg0.rs2._super.low, LAYOUT_LOOKUP(layout1, shiftMul)); - // OpSRL(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:87) - DivideReturnStruct x5 = - exec_DoDiv(ctx, arg0.rs1._super, x4, Val(0), Val(0), LAYOUT_LOOKUP(layout1, _0)); - return x5.quot; -} -NondetRegStruct -exec_TopBit(ExecContext& ctx, ValU32Struct arg0, BoundLayout layout1) { - // Div(:19) - // TopBit(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:70) - Val x2 = (bitAnd(arg0.high, Val(32768)) * Val(2013204481)); - NondetRegStruct x3 = exec_NondetBitReg(ctx, x2, LAYOUT_LOOKUP(layout1, _super)); - // TopBit(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:71) - Val x4 = (x3._super * Val(32768)); - Val x5 = ((arg0.high - x4) * Val(2)); - NondetRegStruct x6 = exec_NondetU16Reg(ctx, x5, LAYOUT_LOOKUP(layout1, rest)); - // TopBit(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:72) - Val x7 = ((x6._super * Val(1006632961)) + x4); - EQZ((arg0.high - x7), "TopBit(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:72)"); - return x3; -} -ValU32Struct exec_OpSRA(ExecContext& ctx, DivInputStruct arg0, BoundLayout layout1) { - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:62) - // OpSRA(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:91) - Val x2 = (arg0.decoded.opcode._super - Val(51)); - EQZ(x2, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :62:19) at OpSRA ( " - "zirgen/circuit/rv32im/v2/dsl/inst_div.zir :91:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:63) - Val x3 = (arg0.decoded.func3 - Val(5)); - EQZ(x3, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at OpSRA ( " - "zirgen/circuit/rv32im/v2/dsl/inst_div.zir :91:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:64) - Val x4 = (arg0.decoded.func7 - Val(32)); - EQZ(x4, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at OpSRA ( " - "zirgen/circuit/rv32im/v2/dsl/inst_div.zir :91:20)))"); - // OpSRA(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:92) - ValU32Struct x5 = exec_DynPo2(ctx, arg0.rs2._super.low, LAYOUT_LOOKUP(layout1, shiftMul)); - // OpSRA(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:93) - NondetRegStruct x6 = exec_TopBit(ctx, arg0.rs1._super, LAYOUT_LOOKUP(layout1, flip)); - // FlipU16(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:77) - // FlipU32(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:81) - // OpSRA(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:94) - Val x7 = (Val(65535) - arg0.rs1._super.low); - Val x8 = (Val(1) - x6._super); - Val x9 = ((x6._super * x7) + (x8 * arg0.rs1._super.low)); - Val x10 = (Val(65535) - arg0.rs1._super.high); - Val x11 = ((x6._super * x10) + (x8 * arg0.rs1._super.high)); - DivideReturnStruct x12 = exec_DoDiv( - ctx, ValU32Struct{.low = x9, .high = x11}, x5, Val(0), Val(1), LAYOUT_LOOKUP(layout1, _0)); - // FlipU16(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:77) - // FlipU32(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:81) - // OpSRA(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:95) - Val x13 = (Val(65535) - x12.quot.low); - Val x14 = ((x6._super * x13) + (x8 * x12.quot.low)); - Val x15 = (Val(65535) - x12.quot.high); - Val x16 = ((x6._super * x15) + (x8 * x12.quot.high)); - return ValU32Struct{.low = x14, .high = x16}; -} -ValU32Struct exec_OpSRLI(ExecContext& ctx, DivInputStruct arg0, BoundLayout layout1) { - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:62) - // OpSRLI(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:99) - Val x2 = (arg0.decoded.opcode._super - Val(19)); - EQZ(x2, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :62:19) at OpSRLI ( " - "zirgen/circuit/rv32im/v2/dsl/inst_div.zir :99:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:63) - Val x3 = (arg0.decoded.func3 - Val(5)); - EQZ(x3, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at OpSRLI ( " - "zirgen/circuit/rv32im/v2/dsl/inst_div.zir :99:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:64) - EQZ(arg0.decoded.func7, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at OpSRLI ( " - "zirgen/circuit/rv32im/v2/dsl/inst_div.zir :99:20)))"); - // OpSRLI(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:100) - ValU32Struct x4 = exec_DynPo2(ctx, arg0.decoded.rs2, LAYOUT_LOOKUP(layout1, shiftMul)); - // OpSRLI(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:101) - DivideReturnStruct x5 = - exec_DoDiv(ctx, arg0.rs1._super, x4, Val(0), Val(0), LAYOUT_LOOKUP(layout1, _0)); - return x5.quot; -} -ValU32Struct exec_OpSRAI(ExecContext& ctx, DivInputStruct arg0, BoundLayout layout1) { - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:62) - // OpSRAI(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:105) - Val x2 = (arg0.decoded.opcode._super - Val(19)); - EQZ(x2, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :62:19) at OpSRAI ( " - "zirgen/circuit/rv32im/v2/dsl/inst_div.zir :105:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:63) - Val x3 = (arg0.decoded.func3 - Val(5)); - EQZ(x3, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at OpSRAI ( " - "zirgen/circuit/rv32im/v2/dsl/inst_div.zir :105:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:64) - Val x4 = (arg0.decoded.func7 - Val(32)); - EQZ(x4, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at OpSRAI ( " - "zirgen/circuit/rv32im/v2/dsl/inst_div.zir :105:20)))"); - // OpSRAI(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:106) - ValU32Struct x5 = exec_DynPo2(ctx, arg0.decoded.rs2, LAYOUT_LOOKUP(layout1, shiftMul)); - // OpSRAI(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:107) - NondetRegStruct x6 = exec_TopBit(ctx, arg0.rs1._super, LAYOUT_LOOKUP(layout1, flip)); - // FlipU16(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:77) - // FlipU32(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:81) - // OpSRAI(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:108) - Val x7 = (Val(65535) - arg0.rs1._super.low); - Val x8 = (Val(1) - x6._super); - Val x9 = ((x6._super * x7) + (x8 * arg0.rs1._super.low)); - Val x10 = (Val(65535) - arg0.rs1._super.high); - Val x11 = ((x6._super * x10) + (x8 * arg0.rs1._super.high)); - DivideReturnStruct x12 = exec_DoDiv( - ctx, ValU32Struct{.low = x9, .high = x11}, x5, Val(0), Val(1), LAYOUT_LOOKUP(layout1, _0)); - // FlipU16(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:77) - // FlipU32(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:81) - // OpSRAI(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:109) - Val x13 = (Val(65535) - x12.quot.low); - Val x14 = ((x6._super * x13) + (x8 * x12.quot.low)); - Val x15 = (Val(65535) - x12.quot.high); - Val x16 = ((x6._super * x15) + (x8 * x12.quot.high)); - return ValU32Struct{.low = x14, .high = x16}; -} -ValU32Struct exec_OpDIV(ExecContext& ctx, DivInputStruct arg0, BoundLayout layout1) { - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:62) - // OpDIV(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:113) - Val x2 = (arg0.decoded.opcode._super - Val(51)); - EQZ(x2, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :62:19) at OpDIV ( " - "zirgen/circuit/rv32im/v2/dsl/inst_div.zir :113:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:63) - Val x3 = (arg0.decoded.func3 - Val(4)); - EQZ(x3, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at OpDIV ( " - "zirgen/circuit/rv32im/v2/dsl/inst_div.zir :113:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:64) - Val x4 = (arg0.decoded.func7 - Val(1)); - EQZ(x4, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at OpDIV ( " - "zirgen/circuit/rv32im/v2/dsl/inst_div.zir :113:20)))"); - // OpDIV(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:114) - DivideReturnStruct x5 = - exec_DoDiv(ctx, arg0.rs1._super, arg0.rs2._super, Val(1), Val(0), LAYOUT_LOOKUP(layout1, _0)); - return x5.quot; -} -ValU32Struct exec_OpDIVU(ExecContext& ctx, DivInputStruct arg0, BoundLayout layout1) { - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:62) - // OpDIVU(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:118) - Val x2 = (arg0.decoded.opcode._super - Val(51)); - EQZ(x2, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :62:19) at OpDIVU ( " - "zirgen/circuit/rv32im/v2/dsl/inst_div.zir :118:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:63) - Val x3 = (arg0.decoded.func3 - Val(5)); - EQZ(x3, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at OpDIVU ( " - "zirgen/circuit/rv32im/v2/dsl/inst_div.zir :118:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:64) - Val x4 = (arg0.decoded.func7 - Val(1)); - EQZ(x4, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at OpDIVU ( " - "zirgen/circuit/rv32im/v2/dsl/inst_div.zir :118:20)))"); - // OpDIVU(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:119) - DivideReturnStruct x5 = - exec_DoDiv(ctx, arg0.rs1._super, arg0.rs2._super, Val(0), Val(0), LAYOUT_LOOKUP(layout1, _0)); - return x5.quot; -} -ValU32Struct exec_OpREM(ExecContext& ctx, DivInputStruct arg0, BoundLayout layout1) { - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:62) - // OpREM(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:123) - Val x2 = (arg0.decoded.opcode._super - Val(51)); - EQZ(x2, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :62:19) at OpREM ( " - "zirgen/circuit/rv32im/v2/dsl/inst_div.zir :123:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:63) - Val x3 = (arg0.decoded.func3 - Val(6)); - EQZ(x3, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at OpREM ( " - "zirgen/circuit/rv32im/v2/dsl/inst_div.zir :123:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:64) - Val x4 = (arg0.decoded.func7 - Val(1)); - EQZ(x4, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at OpREM ( " - "zirgen/circuit/rv32im/v2/dsl/inst_div.zir :123:20)))"); - // OpREM(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:124) - DivideReturnStruct x5 = - exec_DoDiv(ctx, arg0.rs1._super, arg0.rs2._super, Val(1), Val(0), LAYOUT_LOOKUP(layout1, _0)); - return x5.rem; -} -ValU32Struct exec_OpREMU(ExecContext& ctx, DivInputStruct arg0, BoundLayout layout1) { - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:62) - // OpREMU(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:128) - Val x2 = (arg0.decoded.opcode._super - Val(51)); - EQZ(x2, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :62:19) at OpREMU ( " - "zirgen/circuit/rv32im/v2/dsl/inst_div.zir :128:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:63) - Val x3 = (arg0.decoded.func3 - Val(7)); - EQZ(x3, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at OpREMU ( " - "zirgen/circuit/rv32im/v2/dsl/inst_div.zir :128:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:64) - Val x4 = (arg0.decoded.func7 - Val(1)); - EQZ(x4, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at OpREMU ( " - "zirgen/circuit/rv32im/v2/dsl/inst_div.zir :128:20)))"); - // OpREMU(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:129) - DivideReturnStruct x5 = - exec_DoDiv(ctx, arg0.rs1._super, arg0.rs2._super, Val(0), Val(0), LAYOUT_LOOKUP(layout1, _0)); - return x5.rem; -} -InstOutputStruct -exec_Div0(ExecContext& ctx, RegStruct arg0, InstInputStruct arg1, BoundLayout layout2) { - // Div0(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:22) - DivInputStruct x3 = exec_DivInput(ctx, arg0, arg1, LAYOUT_LOOKUP(layout2, input)); - ValU32Struct x4; - if (to_size_t(x3._super.minorOnehot._super[0]._super)) { - // Div0(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:24) - ValU32Struct x5 = exec_OpSRL(ctx, x3, LAYOUT_LOOKUP(layout2, mulOutput.arm0._super)); - // Div0(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:23) - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm0._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm0._extra0.count._super), 0), - "Div0(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:23)"); - x4 = x5; - } else if (to_size_t(x3._super.minorOnehot._super[1]._super)) { - // Div0(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:25) - ValU32Struct x6 = exec_OpSRA(ctx, x3, LAYOUT_LOOKUP(layout2, mulOutput.arm1)); - x4 = x6; - } else if (to_size_t(x3._super.minorOnehot._super[2]._super)) { - // Div0(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:26) - ValU32Struct x7 = exec_OpSRLI(ctx, x3, LAYOUT_LOOKUP(layout2, mulOutput.arm2._super)); - // Div0(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:23) - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm2._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm2._extra0.count._super), 0), - "Div0(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:23)"); - x4 = x7; - } else if (to_size_t(x3._super.minorOnehot._super[3]._super)) { - // Div0(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:27) - ValU32Struct x8 = exec_OpSRAI(ctx, x3, LAYOUT_LOOKUP(layout2, mulOutput.arm3)); - x4 = x8; - } else if (to_size_t(x3._super.minorOnehot._super[4]._super)) { - // Div0(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:28) - ValU32Struct x9 = exec_OpDIV(ctx, x3, LAYOUT_LOOKUP(layout2, mulOutput.arm4._super)); - // Div0(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:23) - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm4._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm4._extra0.count._super), 0), - "Div0(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:23)"); - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm4._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm4._extra1.count._super), 0), - "Div0(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:23)"); - x4 = x9; - } else if (to_size_t(x3._super.minorOnehot._super[5]._super)) { - // Div0(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:29) - ValU32Struct x10 = exec_OpDIVU(ctx, x3, LAYOUT_LOOKUP(layout2, mulOutput.arm5._super)); - // Div0(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:23) - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm5._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm5._extra0.count._super), 0), - "Div0(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:23)"); - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm5._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm5._extra1.count._super), 0), - "Div0(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:23)"); - x4 = x10; - } else if (to_size_t(x3._super.minorOnehot._super[6]._super)) { - // Div0(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:30) - ValU32Struct x11 = exec_OpREM(ctx, x3, LAYOUT_LOOKUP(layout2, mulOutput.arm6._super)); - // Div0(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:23) - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm6._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm6._extra0.count._super), 0), - "Div0(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:23)"); - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm6._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm6._extra1.count._super), 0), - "Div0(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:23)"); - x4 = x11; - } else if (to_size_t(x3._super.minorOnehot._super[7]._super)) { - // Div0(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:31) - ValU32Struct x12 = exec_OpREMU(ctx, x3, LAYOUT_LOOKUP(layout2, mulOutput.arm7._super)); - // Div0(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:23) - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm7._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm7._extra0.count._super), 0), - "Div0(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:23)"); - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm7._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm7._extra1.count._super), 0), - "Div0(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:23)"); - x4 = x12; - } else { - assert(0 && "Reached unreachable mux arm"); - } - // Div0(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:33) - WriteRdStruct x13 = - exec_WriteRd(ctx, arg0, x3.ii, x3.decoded, Val(1), x4, LAYOUT_LOOKUP(layout2, _0)); - // AddU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:27) - // Div0(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:34) - Val x14 = (arg1.pcU32.low + Val(4)); - NormalizeU32Struct x15 = - exec_NormalizeU32(ctx, - DenormedValU32Struct{.low = x14, .high = arg1.pcU32.high}, - LAYOUT_LOOKUP(layout2, pcAdd)); - return InstOutputStruct{.newPc = x15._super, .newState = Val(32), .newMode = arg1.mode}; -} -MiscInputStruct exec_MiscInput(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2) { - // MiscInput(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:7) - EQZ((arg1.state - Val(32)), "MiscInput(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:7)"); - // MiscInput(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:9) - DecoderStruct x3 = exec_DecodeInst(ctx, arg0, arg1, LAYOUT_LOOKUP(layout2, decoded)); - // MiscInput(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:10) - GetDataStruct x4 = exec_ReadReg(ctx, arg0, arg1, x3.rs1, LAYOUT_LOOKUP(layout2, rs1)); - // MiscInput(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:11) - GetDataStruct x5 = exec_ReadReg(ctx, arg0, arg1, x3.rs2, LAYOUT_LOOKUP(layout2, rs2)); - return MiscInputStruct{._super = arg1, .ii = arg1, .decoded = x3, .rs1 = x4, .rs2 = x5}; -} -InstOutputStruct exec_FinalizeMisc(ExecContext& ctx, - RegStruct arg0, - MiscInputStruct arg1, - MiscOutputStruct arg2, - BoundLayout layout3) { - // FinalizeMisc(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:22) - NormalizeU32Struct x4 = exec_NormalizeU32(ctx, arg2.toWrite, LAYOUT_LOOKUP(layout3, writeData)); - // FinalizeMisc(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:23) - NormalizeU32Struct x5 = exec_NormalizeU32(ctx, arg2.newPc, LAYOUT_LOOKUP(layout3, pcNorm)); - // FinalizeMisc(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:24) - WriteRdStruct x6 = exec_WriteRd( - ctx, arg0, arg1.ii, arg1.decoded, arg2.doWrite, x4._super, LAYOUT_LOOKUP(layout3, _0)); - // InstOutput(zirgen/circuit/rv32im/v2/dsl/inst.zir:46) - // FinalizeMisc(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:25) - InstOutputStruct x7 = - InstOutputStruct{.newPc = x5._super, .newState = Val(32), .newMode = arg1.ii.mode}; - return x7; -} -MiscOutputStruct -exec_OpXOR(ExecContext& ctx, MiscInputStruct arg0, BoundLayout layout1) { - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:62) - // OpXOR(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:96) - Val x2 = (arg0.decoded.opcode._super - Val(51)); - EQZ(x2, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :62:19) at OpXOR ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :96:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:63) - Val x3 = (arg0.decoded.func3 - Val(4)); - EQZ(x3, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at OpXOR ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :96:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:64) - EQZ(arg0.decoded.func7, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at OpXOR ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :96:20)))"); - // OpXOR(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:97) - ValU32Struct x4 = - exec_BitwiseXor(ctx, arg0.rs1._super, arg0.rs2._super, LAYOUT_LOOKUP(layout1, _0)); - // AddU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:27) - // SimpleOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:74) - Val x5 = (arg0._super.pcU32.low + Val(4)); - // MiscOutput(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:15) - // SimpleOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:75) - MiscOutputStruct x6 = - MiscOutputStruct{.doWrite = Val(1), - .toWrite = DenormedValU32Struct{.low = x4.low, .high = x4.high}, - .newPc = DenormedValU32Struct{.low = x5, .high = arg0._super.pcU32.high}}; - return x6; -} -MiscOutputStruct -exec_OpOR(ExecContext& ctx, MiscInputStruct arg0, BoundLayout layout1) { - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:62) - // OpOR(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:101) - Val x2 = (arg0.decoded.opcode._super - Val(51)); - EQZ(x2, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :62:19) at OpOR ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :101:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:63) - Val x3 = (arg0.decoded.func3 - Val(6)); - EQZ(x3, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at OpOR ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :101:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:64) - EQZ(arg0.decoded.func7, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at OpOR ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :101:20)))"); - // OpOR(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:102) - ValU32Struct x4 = - exec_BitwiseOr(ctx, arg0.rs1._super, arg0.rs2._super, LAYOUT_LOOKUP(layout1, _0)); - // AddU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:27) - // SimpleOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:74) - Val x5 = (arg0._super.pcU32.low + Val(4)); - // MiscOutput(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:15) - // SimpleOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:75) - MiscOutputStruct x6 = - MiscOutputStruct{.doWrite = Val(1), - .toWrite = DenormedValU32Struct{.low = x4.low, .high = x4.high}, - .newPc = DenormedValU32Struct{.low = x5, .high = arg0._super.pcU32.high}}; - return x6; -} -MiscOutputStruct -exec_OpAND(ExecContext& ctx, MiscInputStruct arg0, BoundLayout layout1) { - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:62) - // OpAND(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:106) - Val x2 = (arg0.decoded.opcode._super - Val(51)); - EQZ(x2, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :62:19) at OpAND ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :106:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:63) - Val x3 = (arg0.decoded.func3 - Val(7)); - EQZ(x3, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at OpAND ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :106:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:64) - EQZ(arg0.decoded.func7, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at OpAND ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :106:20)))"); - // OpAND(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:107) - ValU32Struct x4 = - exec_BitwiseAnd(ctx, arg0.rs1._super, arg0.rs2._super, LAYOUT_LOOKUP(layout1, _0)); - // AddU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:27) - // SimpleOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:74) - Val x5 = (arg0._super.pcU32.low + Val(4)); - // MiscOutput(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:15) - // SimpleOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:75) - MiscOutputStruct x6 = - MiscOutputStruct{.doWrite = Val(1), - .toWrite = DenormedValU32Struct{.low = x4.low, .high = x4.high}, - .newPc = DenormedValU32Struct{.low = x5, .high = arg0._super.pcU32.high}}; - return x6; -} -MiscOutputStruct -exec_OpSLT(ExecContext& ctx, MiscInputStruct arg0, BoundLayout layout1) { - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:62) - // OpSLT(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:111) - Val x2 = (arg0.decoded.opcode._super - Val(51)); - EQZ(x2, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :62:19) at OpSLT ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :111:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:63) - Val x3 = (arg0.decoded.func3 - Val(2)); - EQZ(x3, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at OpSLT ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :111:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:64) - EQZ(arg0.decoded.func7, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at OpSLT ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :111:20)))"); - // OpSLT(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:112) - CmpLessThanStruct x4 = - exec_CmpLessThan(ctx, arg0.rs1._super, arg0.rs2._super, LAYOUT_LOOKUP(layout1, cmp)); - // DenormedValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:20) - // OpSLT(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:113) - DenormedValU32Struct x5 = - DenormedValU32Struct{.low = x4.isLessThan._super._super, .high = Val(0)}; - // AddU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:27) - // SimpleOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:74) - Val x6 = (arg0._super.pcU32.low + Val(4)); - return MiscOutputStruct{.doWrite = Val(1), - .toWrite = x5, - .newPc = DenormedValU32Struct{.low = x6, .high = arg0._super.pcU32.high}}; -} -MiscOutputStruct -exec_OpSLTU(ExecContext& ctx, MiscInputStruct arg0, BoundLayout layout1) { - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:62) - // OpSLTU(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:117) - Val x2 = (arg0.decoded.opcode._super - Val(51)); - EQZ(x2, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :62:19) at OpSLTU ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :117:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:63) - Val x3 = (arg0.decoded.func3 - Val(3)); - EQZ(x3, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at OpSLTU ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :117:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:64) - EQZ(arg0.decoded.func7, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at OpSLTU ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :117:20)))"); - // OpSLTU(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:118) - CmpLessThanUnsignedStruct x4 = - exec_CmpLessThanUnsigned(ctx, arg0.rs1._super, arg0.rs2._super, LAYOUT_LOOKUP(layout1, cmp)); - // AddU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:27) - // SimpleOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:74) - // OpSLTU(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:119) - Val x5 = (arg0._super.pcU32.low + Val(4)); - // MiscOutput(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:15) - // SimpleOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:75) - MiscOutputStruct x6 = - MiscOutputStruct{.doWrite = Val(1), - .toWrite = DenormedValU32Struct{.low = x4.isLessThan, .high = Val(0)}, - .newPc = DenormedValU32Struct{.low = x5, .high = arg0._super.pcU32.high}}; - return x6; -} -InstOutputStruct exec_Misc0(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2) { - // Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:29) - MiscInputStruct x3 = exec_MiscInput(ctx, arg0, arg1, LAYOUT_LOOKUP(layout2, input)); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:62) - // OpADD(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:86) - // Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:31) - Val x4 = (x3.decoded.opcode._super - Val(51)); - // AddU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:27) - // OpADD(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:87) - Val x5 = (x3.rs1._super.low + x3.rs2._super.low); - Val x6 = (x3.rs1._super.high + x3.rs2._super.high); - // SimpleOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:74) - Val x7 = (x3._super.pcU32.low + Val(4)); - // DenormedValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:20) - DenormedValU32Struct x8 = DenormedValU32Struct{.low = x7, .high = x3._super.pcU32.high}; - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:64) - // OpSUB(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:91) - // Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:32) - Val x9 = (x3.decoded.func7 - Val(32)); - // SubU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:33) - // OpSUB(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:92) - Val x10 = (x3.rs1._super.low + Val(65536)); - Val x11 = (x3.rs1._super.high + Val(65535)); - // MiscOutput(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:15) - // SimpleOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:75) - MiscOutputStruct x12 = - MiscOutputStruct{.doWrite = Val(1), - .toWrite = DenormedValU32Struct{.low = (x10 - x3.rs2._super.low), - .high = (x11 - x3.rs2._super.high)}, - .newPc = x8}; - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:57) - // OpADDI(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:123) - // Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:38) - Val x13 = (x3.decoded.opcode._super - Val(19)); - // AddU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:27) - // OpADDI(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:124) - Val x14 = (x3.rs1._super.low + x3.decoded.immI.low); - Val x15 = (x3.rs1._super.high + x3.decoded.immI.high); - MiscOutputStruct x16; - if (to_size_t(x3._super.minorOnehot._super[0]._super)) { - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:62) - // OpADD(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:86) - // Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:31) - EQZ(x4, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :62:19) at " - "callsite( OpADD ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :86:20) at Misc0 ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :31:11))))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:63) - EQZ(x3.decoded.func3, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at " - "callsite( OpADD ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :86:20) at Misc0 ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :31:11))))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:64) - EQZ(x3.decoded.func7, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at " - "callsite( OpADD ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :86:20) at Misc0 ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :31:11))))"); - // Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30) - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm0._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm0._extra0.count._super), 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm0._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm0._extra1.count._super), 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm0._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm0._extra2.count._super), 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm0._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm0._extra3.count._super), 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm0._extra4.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm0._extra4.count._super), 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)"); - x16 = MiscOutputStruct{ - .doWrite = Val(1), .toWrite = DenormedValU32Struct{.low = x5, .high = x6}, .newPc = x8}; - } else if (to_size_t(x3._super.minorOnehot._super[1]._super)) { - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:62) - // OpSUB(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:91) - // Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:32) - EQZ(x4, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :62:19) at " - "callsite( OpSUB ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :91:20) at Misc0 ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :32:11))))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:63) - EQZ(x3.decoded.func3, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at " - "callsite( OpSUB ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :91:20) at Misc0 ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :32:11))))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:64) - EQZ(x9, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at " - "callsite( OpSUB ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :91:20) at Misc0 ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :32:11))))"); - // Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30) - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm1._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm1._extra0.count._super), 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm1._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm1._extra1.count._super), 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm1._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm1._extra2.count._super), 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm1._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm1._extra3.count._super), 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm1._extra4.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm1._extra4.count._super), 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)"); - x16 = x12; - } else if (to_size_t(x3._super.minorOnehot._super[2]._super)) { - // Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:33) - MiscOutputStruct x17 = exec_OpXOR(ctx, x3, LAYOUT_LOOKUP(layout2, miscOutput.arm2._super)); - // Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30) - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm2._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm2._extra0.count._super), 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm2._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm2._extra1.count._super), 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm2._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm2._extra2.count._super), 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm2._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm2._extra3.count._super), 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm2._extra4.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm2._extra4.count._super), 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)"); - x16 = x17; - } else if (to_size_t(x3._super.minorOnehot._super[3]._super)) { - // Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:34) - MiscOutputStruct x18 = exec_OpOR(ctx, x3, LAYOUT_LOOKUP(layout2, miscOutput.arm3._super)); - // Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30) - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm3._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm3._extra0.count._super), 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm3._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm3._extra1.count._super), 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm3._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm3._extra2.count._super), 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm3._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm3._extra3.count._super), 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm3._extra4.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm3._extra4.count._super), 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)"); - x16 = x18; - } else if (to_size_t(x3._super.minorOnehot._super[4]._super)) { - // Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:35) - MiscOutputStruct x19 = exec_OpAND(ctx, x3, LAYOUT_LOOKUP(layout2, miscOutput.arm4._super)); - // Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30) - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm4._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm4._extra0.count._super), 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm4._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm4._extra1.count._super), 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm4._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm4._extra2.count._super), 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm4._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm4._extra3.count._super), 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm4._extra4.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm4._extra4.count._super), 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)"); - x16 = x19; - } else if (to_size_t(x3._super.minorOnehot._super[5]._super)) { - // Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:36) - MiscOutputStruct x20 = exec_OpSLT(ctx, x3, LAYOUT_LOOKUP(layout2, miscOutput.arm5)); - x16 = x20; - } else if (to_size_t(x3._super.minorOnehot._super[6]._super)) { - // Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:37) - MiscOutputStruct x21 = exec_OpSLTU(ctx, x3, LAYOUT_LOOKUP(layout2, miscOutput.arm6._super)); - // Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30) - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm6._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm6._extra0.count._super), 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm6._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm6._extra1.count._super), 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm6._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm6._extra2.count._super), 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)"); - x16 = x21; - } else if (to_size_t(x3._super.minorOnehot._super[7]._super)) { - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:57) - // OpADDI(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:123) - // Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:38) - EQZ(x13, - "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :57:19) at callsite( " - "OpADDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :123:18) at Misc0 ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :38:12))))"); - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:58) - EQZ(x3.decoded.func3, - "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at callsite( " - "OpADDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :123:18) at Misc0 ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :38:12))))"); - // Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30) - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm7._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm7._extra0.count._super), 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm7._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm7._extra1.count._super), 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm7._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm7._extra2.count._super), 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm7._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm7._extra3.count._super), 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm7._extra4.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm7._extra4.count._super), 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)"); - x16 = MiscOutputStruct{ - .doWrite = Val(1), .toWrite = DenormedValU32Struct{.low = x14, .high = x15}, .newPc = x8}; - } else { - assert(0 && "Reached unreachable mux arm"); - } - // Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:40) - InstOutputStruct x22 = exec_FinalizeMisc(ctx, arg0, x3, x16, LAYOUT_LOOKUP(layout2, _super)); - return x22; -} -MiscOutputStruct -exec_OpXORI(ExecContext& ctx, MiscInputStruct arg0, BoundLayout layout1) { - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:57) - // OpXORI(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:128) - Val x2 = (arg0.decoded.opcode._super - Val(19)); - EQZ(x2, - "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :57:19) at OpXORI ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :128:18)))"); - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:58) - Val x3 = (arg0.decoded.func3 - Val(4)); - EQZ(x3, - "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at OpXORI ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :128:18)))"); - // OpXORI(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:129) - ValU32Struct x4 = - exec_BitwiseXor(ctx, arg0.rs1._super, arg0.decoded.immI, LAYOUT_LOOKUP(layout1, _0)); - // AddU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:27) - // SimpleOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:74) - Val x5 = (arg0._super.pcU32.low + Val(4)); - // MiscOutput(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:15) - // SimpleOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:75) - MiscOutputStruct x6 = - MiscOutputStruct{.doWrite = Val(1), - .toWrite = DenormedValU32Struct{.low = x4.low, .high = x4.high}, - .newPc = DenormedValU32Struct{.low = x5, .high = arg0._super.pcU32.high}}; - return x6; -} -MiscOutputStruct -exec_OpORI(ExecContext& ctx, MiscInputStruct arg0, BoundLayout layout1) { - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:57) - // OpORI(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:133) - Val x2 = (arg0.decoded.opcode._super - Val(19)); - EQZ(x2, - "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :57:19) at OpORI ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :133:18)))"); - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:58) - Val x3 = (arg0.decoded.func3 - Val(6)); - EQZ(x3, - "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at OpORI ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :133:18)))"); - // OpORI(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:134) - ValU32Struct x4 = - exec_BitwiseOr(ctx, arg0.rs1._super, arg0.decoded.immI, LAYOUT_LOOKUP(layout1, _0)); - // AddU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:27) - // SimpleOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:74) - Val x5 = (arg0._super.pcU32.low + Val(4)); - // MiscOutput(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:15) - // SimpleOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:75) - MiscOutputStruct x6 = - MiscOutputStruct{.doWrite = Val(1), - .toWrite = DenormedValU32Struct{.low = x4.low, .high = x4.high}, - .newPc = DenormedValU32Struct{.low = x5, .high = arg0._super.pcU32.high}}; - return x6; -} -MiscOutputStruct -exec_OpANDI(ExecContext& ctx, MiscInputStruct arg0, BoundLayout layout1) { - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:57) - // OpANDI(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:138) - Val x2 = (arg0.decoded.opcode._super - Val(19)); - EQZ(x2, - "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :57:19) at OpANDI ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :138:18)))"); - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:58) - Val x3 = (arg0.decoded.func3 - Val(7)); - EQZ(x3, - "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at OpANDI ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :138:18)))"); - // OpANDI(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:139) - ValU32Struct x4 = - exec_BitwiseAnd(ctx, arg0.rs1._super, arg0.decoded.immI, LAYOUT_LOOKUP(layout1, _0)); - // AddU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:27) - // SimpleOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:74) - Val x5 = (arg0._super.pcU32.low + Val(4)); - // MiscOutput(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:15) - // SimpleOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:75) - MiscOutputStruct x6 = - MiscOutputStruct{.doWrite = Val(1), - .toWrite = DenormedValU32Struct{.low = x4.low, .high = x4.high}, - .newPc = DenormedValU32Struct{.low = x5, .high = arg0._super.pcU32.high}}; - return x6; -} -MiscOutputStruct -exec_OpSLTI(ExecContext& ctx, MiscInputStruct arg0, BoundLayout layout1) { - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:57) - // OpSLTI(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:143) - Val x2 = (arg0.decoded.opcode._super - Val(19)); - EQZ(x2, - "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :57:19) at OpSLTI ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :143:18)))"); - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:58) - Val x3 = (arg0.decoded.func3 - Val(2)); - EQZ(x3, - "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at OpSLTI ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :143:18)))"); - // OpSLTI(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:144) - CmpLessThanStruct x4 = - exec_CmpLessThan(ctx, arg0.rs1._super, arg0.decoded.immI, LAYOUT_LOOKUP(layout1, cmp)); - // DenormedValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:20) - // OpSLTI(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:145) - DenormedValU32Struct x5 = - DenormedValU32Struct{.low = x4.isLessThan._super._super, .high = Val(0)}; - // AddU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:27) - // SimpleOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:74) - Val x6 = (arg0._super.pcU32.low + Val(4)); - return MiscOutputStruct{.doWrite = Val(1), - .toWrite = x5, - .newPc = DenormedValU32Struct{.low = x6, .high = arg0._super.pcU32.high}}; -} -MiscOutputStruct -exec_OpSLTIU(ExecContext& ctx, MiscInputStruct arg0, BoundLayout layout1) { - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:57) - // OpSLTIU(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:149) - Val x2 = (arg0.decoded.opcode._super - Val(19)); - EQZ(x2, - "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :57:19) at OpSLTIU ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :149:18)))"); - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:58) - Val x3 = (arg0.decoded.func3 - Val(3)); - EQZ(x3, - "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at OpSLTIU ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :149:18)))"); - // OpSLTIU(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:150) - CmpLessThanUnsignedStruct x4 = exec_CmpLessThanUnsigned( - ctx, arg0.rs1._super, arg0.decoded.immI, LAYOUT_LOOKUP(layout1, cmp)); - // AddU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:27) - // SimpleOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:74) - // OpSLTIU(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:151) - Val x5 = (arg0._super.pcU32.low + Val(4)); - // MiscOutput(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:15) - // SimpleOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:75) - MiscOutputStruct x6 = - MiscOutputStruct{.doWrite = Val(1), - .toWrite = DenormedValU32Struct{.low = x4.isLessThan, .high = Val(0)}, - .newPc = DenormedValU32Struct{.low = x5, .high = arg0._super.pcU32.high}}; - return x6; -} -MiscOutputStruct -exec_OpBEQ(ExecContext& ctx, MiscInputStruct arg0, BoundLayout layout1) { - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:57) - // OpBEQ(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:155) - Val x2 = (arg0.decoded.opcode._super - Val(99)); - EQZ(x2, - "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :57:19) at OpBEQ ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :155:18)))"); - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:58) - EQZ(arg0.decoded.func3, - "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at OpBEQ ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :155:18)))"); - // OpBEQ(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:156) - CmpEqualStruct x3 = - exec_CmpEqual(ctx, arg0.rs1._super, arg0.rs2._super, LAYOUT_LOOKUP(layout1, cmp)); - // AddU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:27) - // CmpOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:80) - // OpBEQ(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:157) - Val x4 = (arg0._super.pcU32.low + arg0.decoded.immB.low); - Val x5 = (arg0._super.pcU32.high + arg0.decoded.immB.high); - // CmpOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:81) - Val x6 = (arg0._super.pcU32.low + Val(4)); - // CondDenormed(zirgen/circuit/rv32im/v2/dsl/u32.zir:101) - // CmpOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:79) - Val x7 = (x3.isEqual._super._super * x4); - Val x8 = (Val(1) - x3.isEqual._super._super); - // CondDenormed(zirgen/circuit/rv32im/v2/dsl/u32.zir:102) - Val x9 = (x3.isEqual._super._super * x5); - // MiscOutput(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:15) - // CmpOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:82) - MiscOutputStruct x10 = - MiscOutputStruct{.doWrite = Val(0), - .toWrite = DenormedValU32Struct{.low = Val(0), .high = Val(0)}, - .newPc = DenormedValU32Struct{.low = (x7 + (x8 * x6)), - .high = (x9 + (x8 * arg0._super.pcU32.high))}}; - return x10; -} -MiscOutputStruct -exec_OpBNE(ExecContext& ctx, MiscInputStruct arg0, BoundLayout layout1) { - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:57) - // OpBNE(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:161) - Val x2 = (arg0.decoded.opcode._super - Val(99)); - EQZ(x2, - "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :57:19) at OpBNE ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :161:18)))"); - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:58) - Val x3 = (arg0.decoded.func3 - Val(1)); - EQZ(x3, - "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at OpBNE ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :161:18)))"); - // OpBNE(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:162) - CmpEqualStruct x4 = - exec_CmpEqual(ctx, arg0.rs1._super, arg0.rs2._super, LAYOUT_LOOKUP(layout1, cmp)); - // OpBNE(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:163) - Val x5 = (Val(1) - x4.isEqual._super._super); - // AddU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:27) - // CmpOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:80) - Val x6 = (arg0._super.pcU32.low + arg0.decoded.immB.low); - Val x7 = (arg0._super.pcU32.high + arg0.decoded.immB.high); - // CmpOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:81) - Val x8 = (arg0._super.pcU32.low + Val(4)); - // CondDenormed(zirgen/circuit/rv32im/v2/dsl/u32.zir:101) - // CmpOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:79) - Val x9 = (Val(1) - x5); - // DenormedValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:20) - // CondDenormed(zirgen/circuit/rv32im/v2/dsl/u32.zir:100) - DenormedValU32Struct x10 = DenormedValU32Struct{ - .low = ((x5 * x6) + (x9 * x8)), .high = ((x5 * x7) + (x9 * arg0._super.pcU32.high))}; - // MiscOutput(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:15) - // CmpOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:82) - MiscOutputStruct x11 = - MiscOutputStruct{.doWrite = Val(0), - .toWrite = DenormedValU32Struct{.low = Val(0), .high = Val(0)}, - .newPc = x10}; - return x11; -} -MiscOutputStruct -exec_OpBLT(ExecContext& ctx, MiscInputStruct arg0, BoundLayout layout1) { - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:57) - // OpBLT(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:167) - Val x2 = (arg0.decoded.opcode._super - Val(99)); - EQZ(x2, - "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :57:19) at OpBLT ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :167:18)))"); - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:58) - Val x3 = (arg0.decoded.func3 - Val(4)); - EQZ(x3, - "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at OpBLT ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :167:18)))"); - // OpBLT(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:168) - CmpLessThanStruct x4 = - exec_CmpLessThan(ctx, arg0.rs1._super, arg0.rs2._super, LAYOUT_LOOKUP(layout1, cmp)); - // AddU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:27) - // CmpOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:80) - // OpBLT(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:169) - Val x5 = (arg0._super.pcU32.low + arg0.decoded.immB.low); - Val x6 = (arg0._super.pcU32.high + arg0.decoded.immB.high); - // CmpOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:81) - Val x7 = (arg0._super.pcU32.low + Val(4)); - // CondDenormed(zirgen/circuit/rv32im/v2/dsl/u32.zir:101) - // CmpOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:79) - Val x8 = (x4.isLessThan._super._super * x5); - Val x9 = (Val(1) - x4.isLessThan._super._super); - // CondDenormed(zirgen/circuit/rv32im/v2/dsl/u32.zir:102) - Val x10 = (x4.isLessThan._super._super * x6); - // MiscOutput(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:15) - // CmpOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:82) - MiscOutputStruct x11 = - MiscOutputStruct{.doWrite = Val(0), - .toWrite = DenormedValU32Struct{.low = Val(0), .high = Val(0)}, - .newPc = DenormedValU32Struct{ - .low = (x8 + (x9 * x7)), .high = (x10 + (x9 * arg0._super.pcU32.high))}}; - return x11; -} -InstOutputStruct exec_Misc1(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2) { - // Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:44) - MiscInputStruct x3 = exec_MiscInput(ctx, arg0, arg1, LAYOUT_LOOKUP(layout2, input)); - MiscOutputStruct x4; - if (to_size_t(x3._super.minorOnehot._super[0]._super)) { - // Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:46) - MiscOutputStruct x5 = exec_OpXORI(ctx, x3, LAYOUT_LOOKUP(layout2, miscOutput.arm0._super)); - // Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45) - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm0._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm0._extra0.count._super), 0), - "Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm0._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm0._extra1.count._super), 0), - "Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm0._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm0._extra2.count._super), 0), - "Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm0._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm0._extra3.count._super), 0), - "Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm0._extra4.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm0._extra4.count._super), 0), - "Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45)"); - x4 = x5; - } else if (to_size_t(x3._super.minorOnehot._super[1]._super)) { - // Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:47) - MiscOutputStruct x6 = exec_OpORI(ctx, x3, LAYOUT_LOOKUP(layout2, miscOutput.arm1._super)); - // Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45) - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm1._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm1._extra0.count._super), 0), - "Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm1._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm1._extra1.count._super), 0), - "Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm1._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm1._extra2.count._super), 0), - "Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm1._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm1._extra3.count._super), 0), - "Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm1._extra4.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm1._extra4.count._super), 0), - "Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45)"); - x4 = x6; - } else if (to_size_t(x3._super.minorOnehot._super[2]._super)) { - // Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:48) - MiscOutputStruct x7 = exec_OpANDI(ctx, x3, LAYOUT_LOOKUP(layout2, miscOutput.arm2._super)); - // Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45) - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm2._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm2._extra0.count._super), 0), - "Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm2._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm2._extra1.count._super), 0), - "Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm2._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm2._extra2.count._super), 0), - "Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm2._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm2._extra3.count._super), 0), - "Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm2._extra4.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm2._extra4.count._super), 0), - "Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45)"); - x4 = x7; - } else if (to_size_t(x3._super.minorOnehot._super[3]._super)) { - // Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:49) - MiscOutputStruct x8 = exec_OpSLTI(ctx, x3, LAYOUT_LOOKUP(layout2, miscOutput.arm3)); - x4 = x8; - } else if (to_size_t(x3._super.minorOnehot._super[4]._super)) { - // Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:50) - MiscOutputStruct x9 = exec_OpSLTIU(ctx, x3, LAYOUT_LOOKUP(layout2, miscOutput.arm4._super)); - // Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45) - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm4._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm4._extra0.count._super), 0), - "Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm4._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm4._extra1.count._super), 0), - "Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm4._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm4._extra2.count._super), 0), - "Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45)"); - x4 = x9; - } else if (to_size_t(x3._super.minorOnehot._super[5]._super)) { - // Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:51) - MiscOutputStruct x10 = exec_OpBEQ(ctx, x3, LAYOUT_LOOKUP(layout2, miscOutput.arm5._super)); - // Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45) - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm5._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm5._extra0.count._super), 0), - "Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm5._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm5._extra1.count._super), 0), - "Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm5._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm5._extra2.count._super), 0), - "Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm5._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm5._extra3.count._super), 0), - "Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm5._extra4.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm5._extra4.count._super), 0), - "Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45)"); - x4 = x10; - } else if (to_size_t(x3._super.minorOnehot._super[6]._super)) { - // Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:52) - MiscOutputStruct x11 = exec_OpBNE(ctx, x3, LAYOUT_LOOKUP(layout2, miscOutput.arm6._super)); - // Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45) - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm6._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm6._extra0.count._super), 0), - "Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm6._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm6._extra1.count._super), 0), - "Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm6._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm6._extra2.count._super), 0), - "Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm6._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm6._extra3.count._super), 0), - "Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm6._extra4.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm6._extra4.count._super), 0), - "Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45)"); - x4 = x11; - } else if (to_size_t(x3._super.minorOnehot._super[7]._super)) { - // Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:53) - MiscOutputStruct x12 = exec_OpBLT(ctx, x3, LAYOUT_LOOKUP(layout2, miscOutput.arm7)); - x4 = x12; - } else { - assert(0 && "Reached unreachable mux arm"); - } - // Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:55) - InstOutputStruct x13 = exec_FinalizeMisc(ctx, arg0, x3, x4, LAYOUT_LOOKUP(layout2, _super)); - return x13; -} -MiscOutputStruct -exec_OpBGE(ExecContext& ctx, MiscInputStruct arg0, BoundLayout layout1) { - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:57) - // OpBGE(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:173) - Val x2 = (arg0.decoded.opcode._super - Val(99)); - EQZ(x2, - "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :57:19) at OpBGE ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :173:18)))"); - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:58) - Val x3 = (arg0.decoded.func3 - Val(5)); - EQZ(x3, - "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at OpBGE ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :173:18)))"); - // OpBGE(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:174) - CmpLessThanStruct x4 = - exec_CmpLessThan(ctx, arg0.rs1._super, arg0.rs2._super, LAYOUT_LOOKUP(layout1, cmp)); - // OpBGE(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:175) - Val x5 = (Val(1) - x4.isLessThan._super._super); - // AddU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:27) - // CmpOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:80) - Val x6 = (arg0._super.pcU32.low + arg0.decoded.immB.low); - Val x7 = (arg0._super.pcU32.high + arg0.decoded.immB.high); - // CmpOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:81) - Val x8 = (arg0._super.pcU32.low + Val(4)); - // CondDenormed(zirgen/circuit/rv32im/v2/dsl/u32.zir:101) - // CmpOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:79) - Val x9 = (Val(1) - x5); - // DenormedValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:20) - // CondDenormed(zirgen/circuit/rv32im/v2/dsl/u32.zir:100) - DenormedValU32Struct x10 = DenormedValU32Struct{ - .low = ((x5 * x6) + (x9 * x8)), .high = ((x5 * x7) + (x9 * arg0._super.pcU32.high))}; - // MiscOutput(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:15) - // CmpOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:82) - MiscOutputStruct x11 = - MiscOutputStruct{.doWrite = Val(0), - .toWrite = DenormedValU32Struct{.low = Val(0), .high = Val(0)}, - .newPc = x10}; - return x11; -} -MiscOutputStruct -exec_OpBLTU(ExecContext& ctx, MiscInputStruct arg0, BoundLayout layout1) { - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:57) - // OpBLTU(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:179) - Val x2 = (arg0.decoded.opcode._super - Val(99)); - EQZ(x2, - "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :57:19) at OpBLTU ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :179:18)))"); - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:58) - Val x3 = (arg0.decoded.func3 - Val(6)); - EQZ(x3, - "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at OpBLTU ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :179:18)))"); - // OpBLTU(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:180) - CmpLessThanUnsignedStruct x4 = - exec_CmpLessThanUnsigned(ctx, arg0.rs1._super, arg0.rs2._super, LAYOUT_LOOKUP(layout1, cmp)); - // AddU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:27) - // CmpOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:80) - // OpBLTU(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:181) - Val x5 = (arg0._super.pcU32.low + arg0.decoded.immB.low); - Val x6 = (arg0._super.pcU32.high + arg0.decoded.immB.high); - // CmpOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:81) - Val x7 = (arg0._super.pcU32.low + Val(4)); - // CondDenormed(zirgen/circuit/rv32im/v2/dsl/u32.zir:101) - // CmpOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:79) - Val x8 = (Val(1) - x4.isLessThan); - Val x9 = ((x4.isLessThan * x5) + (x8 * x7)); - // CondDenormed(zirgen/circuit/rv32im/v2/dsl/u32.zir:102) - Val x10 = ((x4.isLessThan * x6) + (x8 * arg0._super.pcU32.high)); - // MiscOutput(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:15) - // CmpOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:82) - MiscOutputStruct x11 = - MiscOutputStruct{.doWrite = Val(0), - .toWrite = DenormedValU32Struct{.low = Val(0), .high = Val(0)}, - .newPc = DenormedValU32Struct{.low = x9, .high = x10}}; - return x11; -} -MiscOutputStruct -exec_OpBGEU(ExecContext& ctx, MiscInputStruct arg0, BoundLayout layout1) { - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:57) - // OpBGEU(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:185) - Val x2 = (arg0.decoded.opcode._super - Val(99)); - EQZ(x2, - "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :57:19) at OpBGEU ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :185:18)))"); - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:58) - Val x3 = (arg0.decoded.func3 - Val(7)); - EQZ(x3, - "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at OpBGEU ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :185:18)))"); - // OpBGEU(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:186) - CmpLessThanUnsignedStruct x4 = - exec_CmpLessThanUnsigned(ctx, arg0.rs1._super, arg0.rs2._super, LAYOUT_LOOKUP(layout1, cmp)); - // OpBGEU(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:187) - Val x5 = (Val(1) - x4.isLessThan); - // AddU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:27) - // CmpOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:80) - Val x6 = (arg0._super.pcU32.low + arg0.decoded.immB.low); - Val x7 = (arg0._super.pcU32.high + arg0.decoded.immB.high); - // CmpOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:81) - Val x8 = (arg0._super.pcU32.low + Val(4)); - // CondDenormed(zirgen/circuit/rv32im/v2/dsl/u32.zir:101) - // CmpOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:79) - Val x9 = (Val(1) - x5); - // DenormedValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:20) - // CondDenormed(zirgen/circuit/rv32im/v2/dsl/u32.zir:100) - DenormedValU32Struct x10 = DenormedValU32Struct{ - .low = ((x5 * x6) + (x9 * x8)), .high = ((x5 * x7) + (x9 * arg0._super.pcU32.high))}; - // MiscOutput(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:15) - // CmpOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:82) - MiscOutputStruct x11 = - MiscOutputStruct{.doWrite = Val(0), - .toWrite = DenormedValU32Struct{.low = Val(0), .high = Val(0)}, - .newPc = x10}; - return x11; -} -InstOutputStruct exec_Misc2(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2) { - // Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:59) - MiscInputStruct x3 = exec_MiscInput(ctx, arg0, arg1, LAYOUT_LOOKUP(layout2, input)); - // VerifyOpcode(zirgen/circuit/rv32im/v2/dsl/inst.zir:53) - // OpJAL(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:191) - // Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:64) - Val x4 = (x3.decoded.opcode._super - Val(111)); - // AddU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:27) - // OpJAL(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:193) - Val x5 = (x3._super.pcU32.low + Val(4)); - // DenormedValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:20) - DenormedValU32Struct x6 = DenormedValU32Struct{.low = x5, .high = x3._super.pcU32.high}; - // OpJAL(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:194) - Val x7 = (x3._super.pcU32.low + x3.decoded.immJ.low); - Val x8 = (x3._super.pcU32.high + x3.decoded.immJ.high); - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:57) - // OpJALR(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:198) - // Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:65) - Val x9 = (x3.decoded.opcode._super - Val(103)); - // AddU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:27) - // OpJALR(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:201) - Val x10 = (x3.rs1._super.low + x3.decoded.immI.low); - Val x11 = (x3.rs1._super.high + x3.decoded.immI.high); - // VerifyOpcode(zirgen/circuit/rv32im/v2/dsl/inst.zir:53) - // OpLUI(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:205) - // Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:66) - Val x12 = (x3.decoded.opcode._super - Val(55)); - // DenormedValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:20) - // Denorm(zirgen/circuit/rv32im/v2/dsl/u32.zir:38) - // OpLUI(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:206) - DenormedValU32Struct x13 = - DenormedValU32Struct{.low = x3.decoded.immU.low, .high = x3.decoded.immU.high}; - // VerifyOpcode(zirgen/circuit/rv32im/v2/dsl/inst.zir:53) - // OpAUIPC(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:210) - // Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:67) - Val x14 = (x3.decoded.opcode._super - Val(23)); - // AddU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:27) - // OpAUIPC(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:211) - Val x15 = (x3._super.pcU32.low + x3.decoded.immU.low); - Val x16 = (x3._super.pcU32.high + x3.decoded.immU.high); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:62) - // OpECALL(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:216) - // Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:68) - Val x17 = (x3.decoded.opcode._super - Val(115)); - // DenormedValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:20) - // AddU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:27) - // OpECALL(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:217) - DenormedValU32Struct x18 = - DenormedValU32Struct{.low = x3._super.pcU32.low, .high = x3._super.pcU32.high}; - // MiscOutput(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:15) - MiscOutputStruct x19 = - MiscOutputStruct{.doWrite = Val(0), - .toWrite = DenormedValU32Struct{.low = Val(0), .high = Val(0)}, - .newPc = x18}; - MiscOutputStruct x20; - if (to_size_t(x3._super.minorOnehot._super[0]._super)) { - // Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:61) - MiscOutputStruct x21 = exec_OpBGE(ctx, x3, LAYOUT_LOOKUP(layout2, miscOutput.arm0)); - x20 = x21; - } else if (to_size_t(x3._super.minorOnehot._super[1]._super)) { - // Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:62) - MiscOutputStruct x22 = exec_OpBLTU(ctx, x3, LAYOUT_LOOKUP(layout2, miscOutput.arm1._super)); - // Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60) - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm1._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm1._extra0.count._super), 0), - "Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm1._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm1._extra1.count._super), 0), - "Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm1._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm1._extra2.count._super), 0), - "Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60)"); - x20 = x22; - } else if (to_size_t(x3._super.minorOnehot._super[2]._super)) { - // Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:63) - MiscOutputStruct x23 = exec_OpBGEU(ctx, x3, LAYOUT_LOOKUP(layout2, miscOutput.arm2._super)); - // Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60) - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm2._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm2._extra0.count._super), 0), - "Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm2._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm2._extra1.count._super), 0), - "Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm2._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm2._extra2.count._super), 0), - "Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60)"); - x20 = x23; - } else if (to_size_t(x3._super.minorOnehot._super[3]._super)) { - // VerifyOpcode(zirgen/circuit/rv32im/v2/dsl/inst.zir:53) - // OpJAL(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:191) - // Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:64) - EQZ(x4, - "loc(callsite( VerifyOpcode ( zirgen/circuit/rv32im/v2/dsl/inst.zir :53:19) at callsite( " - "OpJAL ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :191:16) at Misc2 ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :64:11))))"); - // Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60) - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm3._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm3._extra0.count._super), 0), - "Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm3._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm3._extra1.count._super), 0), - "Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm3._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm3._extra2.count._super), 0), - "Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm3._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm3._extra3.count._super), 0), - "Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm3._extra4.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm3._extra4.count._super), 0), - "Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60)"); - x20 = MiscOutputStruct{ - .doWrite = Val(1), .toWrite = x6, .newPc = DenormedValU32Struct{.low = x7, .high = x8}}; - } else if (to_size_t(x3._super.minorOnehot._super[4]._super)) { - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:57) - // OpJALR(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:198) - // Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:65) - EQZ(x9, - "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :57:19) at callsite( " - "OpJALR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :198:18) at Misc2 ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :65:12))))"); - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:58) - EQZ(x3.decoded.func3, - "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at callsite( " - "OpJALR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :198:18) at Misc2 ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :65:12))))"); - // Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60) - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm4._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm4._extra0.count._super), 0), - "Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm4._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm4._extra1.count._super), 0), - "Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm4._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm4._extra2.count._super), 0), - "Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm4._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm4._extra3.count._super), 0), - "Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm4._extra4.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm4._extra4.count._super), 0), - "Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60)"); - x20 = MiscOutputStruct{ - .doWrite = Val(1), .toWrite = x6, .newPc = DenormedValU32Struct{.low = x10, .high = x11}}; - } else if (to_size_t(x3._super.minorOnehot._super[5]._super)) { - // VerifyOpcode(zirgen/circuit/rv32im/v2/dsl/inst.zir:53) - // OpLUI(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:205) - // Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:66) - EQZ(x12, - "loc(callsite( VerifyOpcode ( zirgen/circuit/rv32im/v2/dsl/inst.zir :53:19) at callsite( " - "OpLUI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :205:16) at Misc2 ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :66:11))))"); - // Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60) - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm5._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm5._extra0.count._super), 0), - "Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm5._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm5._extra1.count._super), 0), - "Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm5._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm5._extra2.count._super), 0), - "Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm5._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm5._extra3.count._super), 0), - "Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm5._extra4.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm5._extra4.count._super), 0), - "Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60)"); - x20 = MiscOutputStruct{.doWrite = Val(1), .toWrite = x13, .newPc = x6}; - } else if (to_size_t(x3._super.minorOnehot._super[6]._super)) { - // VerifyOpcode(zirgen/circuit/rv32im/v2/dsl/inst.zir:53) - // OpAUIPC(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:210) - // Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:67) - EQZ(x14, - "loc(callsite( VerifyOpcode ( zirgen/circuit/rv32im/v2/dsl/inst.zir :53:19) at callsite( " - "OpAUIPC ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :210:16) at Misc2 ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :67:13))))"); - // Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60) - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm6._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm6._extra0.count._super), 0), - "Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm6._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm6._extra1.count._super), 0), - "Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm6._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm6._extra2.count._super), 0), - "Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm6._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm6._extra3.count._super), 0), - "Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm6._extra4.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm6._extra4.count._super), 0), - "Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60)"); - x20 = MiscOutputStruct{ - .doWrite = Val(1), .toWrite = DenormedValU32Struct{.low = x15, .high = x16}, .newPc = x6}; - } else if (to_size_t(x3._super.minorOnehot._super[7]._super)) { - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:62) - // OpECALL(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:216) - // Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:68) - EQZ(x17, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :62:19) at " - "callsite( OpECALL ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :216:20) at Misc2 ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :68:13))))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:63) - EQZ(x3.decoded.func3, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at " - "callsite( OpECALL ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :216:20) at Misc2 ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :68:13))))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:64) - EQZ(x3.decoded.func7, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at " - "callsite( OpECALL ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :216:20) at Misc2 ( " - "zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :68:13))))"); - // Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60) - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm7._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm7._extra0.count._super), 0), - "Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm7._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm7._extra1.count._super), 0), - "Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm7._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm7._extra2.count._super), 0), - "Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm7._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm7._extra3.count._super), 0), - "Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60)"); - STORE(LAYOUT_LOOKUP(layout2, miscOutput.arm7._extra4.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, miscOutput.arm7._extra4.count._super), 0), - "Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60)"); - x20 = x19; - } else { - assert(0 && "Reached unreachable mux arm"); - } - // Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:70) - InstOutputStruct x24 = exec_FinalizeMisc(ctx, arg0, x3, x20, LAYOUT_LOOKUP(layout2, _super)); - return x24; -} -MulInputStruct exec_MulInput(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2) { - // MulInput(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:8) - EQZ((arg1.state - Val(32)), "MulInput(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:8)"); - // MulInput(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:10) - DecoderStruct x3 = exec_DecodeInst(ctx, arg0, arg1, LAYOUT_LOOKUP(layout2, decoded)); - // MulInput(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:11) - GetDataStruct x4 = exec_ReadReg(ctx, arg0, arg1, x3.rs1, LAYOUT_LOOKUP(layout2, rs1)); - // MulInput(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:12) - GetDataStruct x5 = exec_ReadReg(ctx, arg0, arg1, x3.rs2, LAYOUT_LOOKUP(layout2, rs2)); - return MulInputStruct{._super = arg1, .ii = arg1, .decoded = x3, .rs1 = x4, .rs2 = x5}; -} -DoMulStruct exec_DoMul(ExecContext& ctx, - ValU32Struct arg0, - ValU32Struct arg1, - Val arg2, - Val arg3, - BoundLayout layout4) { - // DoMul(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:40) - MultiplyAccumulateStruct x5 = exec_MultiplyAccumulate( - ctx, - arg0, - arg1, - ValU32Struct{.low = Val(0), .high = Val(0)}, - MultiplySettingsStruct{.aSigned = arg2, .bSigned = arg3, .cSigned = Val(0)}, - LAYOUT_LOOKUP(layout4, mul)); - return DoMulStruct{.low = x5.outLow, .high = x5.outHigh}; -} -ValU32Struct exec_OpSLL(ExecContext& ctx, MulInputStruct arg0, BoundLayout layout1) { - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:62) - // OpSLL(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:46) - Val x2 = (arg0.decoded.opcode._super - Val(51)); - EQZ(x2, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :62:19) at OpSLL ( " - "zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :46:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:63) - Val x3 = (arg0.decoded.func3 - Val(1)); - EQZ(x3, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at OpSLL ( " - "zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :46:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:64) - EQZ(arg0.decoded.func7, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at OpSLL ( " - "zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :46:20)))"); - // OpSLL(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:47) - ValU32Struct x4 = exec_DynPo2(ctx, arg0.rs2._super.low, LAYOUT_LOOKUP(layout1, shiftMul)); - // OpSLL(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:48) - DoMulStruct x5 = exec_DoMul(ctx, arg0.rs1._super, x4, Val(0), Val(0), LAYOUT_LOOKUP(layout1, _0)); - return x5.low; -} -ValU32Struct exec_OpSLLI(ExecContext& ctx, MulInputStruct arg0, BoundLayout layout1) { - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:62) - // OpSLLI(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:52) - Val x2 = (arg0.decoded.opcode._super - Val(19)); - EQZ(x2, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :62:19) at OpSLLI ( " - "zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :52:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:63) - Val x3 = (arg0.decoded.func3 - Val(1)); - EQZ(x3, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at OpSLLI ( " - "zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :52:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:64) - EQZ(arg0.decoded.func7, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at OpSLLI ( " - "zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :52:20)))"); - // OpSLLI(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:53) - ValU32Struct x4 = exec_DynPo2(ctx, arg0.decoded.rs2, LAYOUT_LOOKUP(layout1, shiftMul)); - // OpSLLI(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:54) - DoMulStruct x5 = exec_DoMul(ctx, arg0.rs1._super, x4, Val(0), Val(0), LAYOUT_LOOKUP(layout1, _0)); - return x5.low; -} -ValU32Struct exec_OpMUL(ExecContext& ctx, MulInputStruct arg0, BoundLayout layout1) { - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:62) - // OpMUL(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:58) - Val x2 = (arg0.decoded.opcode._super - Val(51)); - EQZ(x2, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :62:19) at OpMUL ( " - "zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :58:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:63) - EQZ(arg0.decoded.func3, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at OpMUL ( " - "zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :58:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:64) - Val x3 = (arg0.decoded.func7 - Val(1)); - EQZ(x3, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at OpMUL ( " - "zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :58:20)))"); - // OpMUL(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:59) - DoMulStruct x4 = - exec_DoMul(ctx, arg0.rs1._super, arg0.rs2._super, Val(0), Val(0), LAYOUT_LOOKUP(layout1, _0)); - return x4.low; -} -ValU32Struct exec_OpMULH(ExecContext& ctx, MulInputStruct arg0, BoundLayout layout1) { - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:62) - // OpMULH(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:63) - Val x2 = (arg0.decoded.opcode._super - Val(51)); - EQZ(x2, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :62:19) at OpMULH ( " - "zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :63:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:63) - Val x3 = (arg0.decoded.func3 - Val(1)); - EQZ(x3, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at OpMULH ( " - "zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :63:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:64) - Val x4 = (arg0.decoded.func7 - Val(1)); - EQZ(x4, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at OpMULH ( " - "zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :63:20)))"); - // OpMULH(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:64) - DoMulStruct x5 = - exec_DoMul(ctx, arg0.rs1._super, arg0.rs2._super, Val(1), Val(1), LAYOUT_LOOKUP(layout1, _0)); - return x5.high; -} -ValU32Struct -exec_OpMULHSU(ExecContext& ctx, MulInputStruct arg0, BoundLayout layout1) { - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:62) - // OpMULHSU(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:68) - Val x2 = (arg0.decoded.opcode._super - Val(51)); - EQZ(x2, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :62:19) at OpMULHSU " - "( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :68:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:63) - Val x3 = (arg0.decoded.func3 - Val(2)); - EQZ(x3, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at OpMULHSU " - "( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :68:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:64) - Val x4 = (arg0.decoded.func7 - Val(1)); - EQZ(x4, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at OpMULHSU " - "( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :68:20)))"); - // OpMULHSU(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:69) - DoMulStruct x5 = - exec_DoMul(ctx, arg0.rs1._super, arg0.rs2._super, Val(1), Val(0), LAYOUT_LOOKUP(layout1, _0)); - return x5.high; -} -ValU32Struct -exec_OpMULHU(ExecContext& ctx, MulInputStruct arg0, BoundLayout layout1) { - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:62) - // OpMULHU(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:73) - Val x2 = (arg0.decoded.opcode._super - Val(51)); - EQZ(x2, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :62:19) at OpMULHU " - "( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :73:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:63) - Val x3 = (arg0.decoded.func3 - Val(3)); - EQZ(x3, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at OpMULHU " - "( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :73:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:64) - Val x4 = (arg0.decoded.func7 - Val(1)); - EQZ(x4, - "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at OpMULHU " - "( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :73:20)))"); - // OpMULHU(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:74) - DoMulStruct x5 = - exec_DoMul(ctx, arg0.rs1._super, arg0.rs2._super, Val(0), Val(0), LAYOUT_LOOKUP(layout1, _0)); - return x5.high; -} -InstOutputStruct -exec_Mul0(ExecContext& ctx, RegStruct arg0, InstInputStruct arg1, BoundLayout layout2) { - // Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:22) - MulInputStruct x3 = exec_MulInput(ctx, arg0, arg1, LAYOUT_LOOKUP(layout2, input)); - // ValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:10) - // IllegalMulOp(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:18) - // Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:30) - ValU32Struct x4 = ValU32Struct{.low = Val(0), .high = Val(0)}; - ValU32Struct x5; - if (to_size_t(x3._super.minorOnehot._super[0]._super)) { - // Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:24) - ValU32Struct x6 = exec_OpSLL(ctx, x3, LAYOUT_LOOKUP(layout2, mulOutput.arm0)); - x5 = x6; - } else if (to_size_t(x3._super.minorOnehot._super[1]._super)) { - // Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:25) - ValU32Struct x7 = exec_OpSLLI(ctx, x3, LAYOUT_LOOKUP(layout2, mulOutput.arm1)); - x5 = x7; - } else if (to_size_t(x3._super.minorOnehot._super[2]._super)) { - // Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:26) - ValU32Struct x8 = exec_OpMUL(ctx, x3, LAYOUT_LOOKUP(layout2, mulOutput.arm2._super)); - // Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23) - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm2._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm2._extra0.count._super), 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)"); - x5 = x8; - } else if (to_size_t(x3._super.minorOnehot._super[3]._super)) { - // Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:27) - ValU32Struct x9 = exec_OpMULH(ctx, x3, LAYOUT_LOOKUP(layout2, mulOutput.arm3._super)); - // Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23) - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm3._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm3._extra0.count._super), 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)"); - x5 = x9; - } else if (to_size_t(x3._super.minorOnehot._super[4]._super)) { - // Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:28) - ValU32Struct x10 = exec_OpMULHSU(ctx, x3, LAYOUT_LOOKUP(layout2, mulOutput.arm4._super)); - // Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23) - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm4._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm4._extra0.count._super), 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)"); - x5 = x10; - } else if (to_size_t(x3._super.minorOnehot._super[5]._super)) { - // Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:29) - ValU32Struct x11 = exec_OpMULHU(ctx, x3, LAYOUT_LOOKUP(layout2, mulOutput.arm5._super)); - // Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23) - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm5._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm5._extra0.count._super), 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)"); - x5 = x11; - } else if (to_size_t(x3._super.minorOnehot._super[6]._super)) { - // IllegalMulOp(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:17) - // Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:30) - EQZ(Val(2013265920), - "loc(callsite( IllegalMulOp ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :17:6) at Mul0 ( " - "zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :30:18)))"); - // Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23) - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm6._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm6._extra0.count._super), 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)"); - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm6._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm6._extra1.count._super), 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)"); - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm6._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm6._extra2.count._super), 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)"); - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm6._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm6._extra3.count._super), 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)"); - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm6._extra4.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm6._extra4.count._super), 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)"); - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm6._extra5.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm6._extra5.count._super), 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)"); - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm6._extra6.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm6._extra6.count._super), 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)"); - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm6._extra7.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm6._extra7.count._super), 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)"); - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm6._extra8.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm6._extra8.count._super), 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)"); - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm6._extra9.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm6._extra9.count._super), 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)"); - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm6._extra10.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm6._extra10.count._super), 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)"); - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm6._extra11.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm6._extra11.count._super), 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)"); - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm6._extra12.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm6._extra12.count._super), 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)"); - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm6._extra13.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm6._extra13.count._super), 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)"); - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm6._extra14.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm6._extra14.count._super), 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)"); - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm6._extra15.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm6._extra15.count._super), 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)"); - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm6._extra16.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm6._extra16.count._super), 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)"); - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm6._extra17.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm6._extra17.count._super), 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)"); - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm6._extra18.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm6._extra18.count._super), 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)"); - x5 = x4; - } else if (to_size_t(x3._super.minorOnehot._super[7]._super)) { - // IllegalMulOp(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:17) - // Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:31) - EQZ(Val(2013265920), - "loc(callsite( IllegalMulOp ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :17:6) at Mul0 ( " - "zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :31:18)))"); - // Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23) - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm7._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm7._extra0.count._super), 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)"); - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm7._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm7._extra1.count._super), 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)"); - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm7._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm7._extra2.count._super), 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)"); - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm7._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm7._extra3.count._super), 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)"); - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm7._extra4.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm7._extra4.count._super), 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)"); - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm7._extra5.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm7._extra5.count._super), 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)"); - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm7._extra6.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm7._extra6.count._super), 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)"); - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm7._extra7.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm7._extra7.count._super), 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)"); - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm7._extra8.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm7._extra8.count._super), 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)"); - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm7._extra9.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm7._extra9.count._super), 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)"); - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm7._extra10.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm7._extra10.count._super), 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)"); - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm7._extra11.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm7._extra11.count._super), 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)"); - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm7._extra12.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm7._extra12.count._super), 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)"); - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm7._extra13.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm7._extra13.count._super), 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)"); - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm7._extra14.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm7._extra14.count._super), 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)"); - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm7._extra15.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm7._extra15.count._super), 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)"); - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm7._extra16.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm7._extra16.count._super), 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)"); - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm7._extra17.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm7._extra17.count._super), 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)"); - STORE(LAYOUT_LOOKUP(layout2, mulOutput.arm7._extra18.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, mulOutput.arm7._extra18.count._super), 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)"); - x5 = x4; - } else { - assert(0 && "Reached unreachable mux arm"); - } - // Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:33) - WriteRdStruct x12 = - exec_WriteRd(ctx, arg0, x3.ii, x3.decoded, Val(1), x5, LAYOUT_LOOKUP(layout2, _0)); - // AddU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:27) - // Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:34) - Val x13 = (arg1.pcU32.low + Val(4)); - NormalizeU32Struct x14 = - exec_NormalizeU32(ctx, - DenormedValU32Struct{.low = x13, .high = arg1.pcU32.high}, - LAYOUT_LOOKUP(layout2, pcAdd)); - return InstOutputStruct{.newPc = x14._super, .newState = Val(32), .newMode = arg1.mode}; -} -MemLoadInputStruct exec_MemLoadInput(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2) { - // MemLoadInput(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:8) - EQZ((arg1.state - Val(32)), "MemLoadInput(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:8)"); - // MemLoadInput(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:10) - DecoderStruct x3 = exec_DecodeInst(ctx, arg0, arg1, LAYOUT_LOOKUP(layout2, decoded)); - // MemLoadInput(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:11) - GetDataStruct x4 = exec_ReadReg(ctx, arg0, arg1, x3.rs1, LAYOUT_LOOKUP(layout2, rs1)); - // AddU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:27) - // MemLoadInput(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:12) - Val x5 = (x4._super.low + x3.immI.low); - Val x6 = (x4._super.high + x3.immI.high); - NormalizeU32Struct x7 = exec_NormalizeU32( - ctx, DenormedValU32Struct{.low = x5, .high = x6}, LAYOUT_LOOKUP(layout2, addrU32)); - // MemLoadInput(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:13) - AddrDecomposeBitsStruct x8 = - exec_AddrDecomposeBits(ctx, x7._super, arg1.mode, LAYOUT_LOOKUP(layout2, addr)); - // MemLoadInput(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:14) - GetDataStruct x9 = exec_MemoryRead(ctx, arg0, x8.addr, LAYOUT_LOOKUP(layout2, data)); - return MemLoadInputStruct{.ii = arg1, .decoded = x3, .addr = x8, .data = x9}; -} -MemStoreInputStruct exec_MemStoreInput(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2) { - // MemStoreInput(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:18) - EQZ((arg1.state - Val(32)), "MemStoreInput(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:18)"); - // MemStoreInput(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:20) - DecoderStruct x3 = exec_DecodeInst(ctx, arg0, arg1, LAYOUT_LOOKUP(layout2, decoded)); - // MemStoreInput(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:21) - GetDataStruct x4 = exec_ReadReg(ctx, arg0, arg1, x3.rs1, LAYOUT_LOOKUP(layout2, rs1)); - // MemStoreInput(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:22) - GetDataStruct x5 = exec_ReadReg(ctx, arg0, arg1, x3.rs2, LAYOUT_LOOKUP(layout2, rs2)); - // AddU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:27) - // MemStoreInput(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:23) - Val x6 = (x4._super.low + x3.immS.low); - Val x7 = (x4._super.high + x3.immS.high); - NormalizeU32Struct x8 = exec_NormalizeU32( - ctx, DenormedValU32Struct{.low = x6, .high = x7}, LAYOUT_LOOKUP(layout2, addrU32)); - // MemStoreInput(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:24) - AddrDecomposeBitsStruct x9 = - exec_AddrDecomposeBits(ctx, x8._super, arg1.mode, LAYOUT_LOOKUP(layout2, addr)); - // MemStoreInput(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:25) - GetDataStruct x10 = exec_MemoryRead(ctx, arg0, x9.addr, LAYOUT_LOOKUP(layout2, data)); - return MemStoreInputStruct{.decoded = x3, .rs2 = x5, .addr = x9, .data = x10}; -} -MemStoreFinalizeStruct exec_MemStoreFinalize(ExecContext& ctx, - RegStruct arg0, - MemStoreInputStruct arg1, - ValU32Struct arg2, - BoundLayout layout3) { - // MemStoreFinalize(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:29) - MemoryWriteStruct x4 = - exec_MemoryWrite(ctx, arg0, arg1.addr.addr, arg2, LAYOUT_LOOKUP(layout3, _0)); - return MemStoreFinalizeStruct{}; -} -SplitWordStruct exec_SplitWord(ExecContext& ctx, Val arg0, BoundLayout layout1) { - // SplitWord(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:33) - NondetRegStruct x2 = exec_NondetU8Reg(ctx, bitAnd(arg0, Val(255)), LAYOUT_LOOKUP(layout1, byte0)); - // SplitWord(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:34) - NondetRegStruct x3 = exec_NondetU8Reg( - ctx, (bitAnd(arg0, Val(65280)) * Val(2005401601)), LAYOUT_LOOKUP(layout1, byte1)); - // SplitWord(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:35) - Val x4 = ((x3._super * Val(256)) + x2._super); - EQZ((arg0 - x4), "SplitWord(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:35)"); - return SplitWordStruct{.byte0 = x2, .byte1 = x3}; -} -ValU32Struct exec_OpLB(ExecContext& ctx, MemLoadInputStruct arg0, BoundLayout layout1) { - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:57) - // OpLB(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:83) - Val x2 = (arg0.decoded.opcode._super - Val(3)); - EQZ(x2, - "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :57:19) at OpLB ( " - "zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :83:18)))"); - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:58) - EQZ(arg0.decoded.func3, - "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at OpLB ( " - "zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :83:18)))"); - // OpLB(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:84) - Val x3 = (arg0.addr.low1._super * arg0.data._super.high); - Val x4 = (Val(1) - arg0.addr.low1._super); - // OpLB(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:85) - SplitWordStruct x5 = - exec_SplitWord(ctx, (x3 + (x4 * arg0.data._super.low)), LAYOUT_LOOKUP(layout1, bytes)); - // OpLB(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:86) - Val x6 = (arg0.addr.low0._super * x5.byte1._super); - Val x7 = (Val(1) - arg0.addr.low0._super); - Val x8 = (x6 + (x7 * x5.byte0._super)); - // OpLB(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:87) - NondetRegStruct x9 = exec_NondetBitReg( - ctx, (bitAnd(x8, Val(128)) * Val(1997537281)), LAYOUT_LOOKUP(layout1, highBit)); - // OpLB(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:88) - NondetRegStruct x10 = - exec_NondetU8Reg(ctx, (bitAnd(x8, Val(127)) * Val(2)), LAYOUT_LOOKUP(layout1, low7x2)); - // OpLB(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:89) - Val x11 = ((x9._super * Val(128)) + (x10._super * Val(1006632961))); - EQZ((x8 - x11), "OpLB(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:89)"); - // ValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:10) - // OpLB(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:90) - ValU32Struct x12 = - ValU32Struct{.low = (x8 + (x9._super * Val(65280))), .high = (x9._super * Val(65535))}; - return x12; -} -ValU32Struct exec_OpLH(ExecContext& ctx, MemLoadInputStruct arg0, BoundLayout layout1) { - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:57) - // OpLH(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:94) - Val x2 = (arg0.decoded.opcode._super - Val(3)); - EQZ(x2, - "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :57:19) at OpLH ( " - "zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :94:18)))"); - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:58) - Val x3 = (arg0.decoded.func3 - Val(1)); - EQZ(x3, - "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at OpLH ( " - "zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :94:18)))"); - // OpLH(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:95) - EQZ(arg0.addr.low0._super, "OpLH(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:95)"); - // OpLH(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:96) - Val x4 = (arg0.addr.low1._super * arg0.data._super.high); - Val x5 = (Val(1) - arg0.addr.low1._super); - Val x6 = (x4 + (x5 * arg0.data._super.low)); - // OpLH(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:97) - NondetRegStruct x7 = exec_NondetBitReg( - ctx, (bitAnd(x6, Val(32768)) * Val(2013204481)), LAYOUT_LOOKUP(layout1, highBit)); - // OpLH(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:98) - NondetRegStruct x8 = - exec_NondetU8Reg(ctx, (bitAnd(x6, Val(32767)) * Val(2)), LAYOUT_LOOKUP(layout1, low15x2)); - // OpLH(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:99) - Val x9 = ((x7._super * Val(32768)) + (x8._super * Val(1006632961))); - EQZ((x6 - x9), "OpLH(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:99)"); - return ValU32Struct{.low = x6, .high = (x7._super * Val(65535))}; -} -ValU32Struct -exec_OpLBU(ExecContext& ctx, MemLoadInputStruct arg0, BoundLayout layout1) { - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:57) - // OpLBU(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:111) - Val x2 = (arg0.decoded.opcode._super - Val(3)); - EQZ(x2, - "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :57:19) at OpLBU ( " - "zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :111:18)))"); - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:58) - Val x3 = (arg0.decoded.func3 - Val(4)); - EQZ(x3, - "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at OpLBU ( " - "zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :111:18)))"); - // OpLBU(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:112) - Val x4 = (arg0.addr.low1._super * arg0.data._super.high); - Val x5 = (Val(1) - arg0.addr.low1._super); - // OpLBU(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:113) - SplitWordStruct x6 = - exec_SplitWord(ctx, (x4 + (x5 * arg0.data._super.low)), LAYOUT_LOOKUP(layout1, bytes)); - // OpLBU(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:114) - Val x7 = (arg0.addr.low0._super * x6.byte1._super); - Val x8 = (Val(1) - arg0.addr.low0._super); - return ValU32Struct{.low = (x7 + (x8 * x6.byte0._super)), .high = Val(0)}; -} -InstOutputStruct -exec_Mem0(ExecContext& ctx, RegStruct arg0, InstInputStruct arg1, BoundLayout layout2) { - // Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:49) - MemLoadInputStruct x3 = exec_MemLoadInput(ctx, arg0, arg1, LAYOUT_LOOKUP(layout2, input)); - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:57) - // OpLW(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:104) - // Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:53) - Val x4 = (x3.decoded.opcode._super - Val(3)); - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:58) - Val x5 = (x3.decoded.func3 - Val(2)); - // OpLHU(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:119) - // Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:55) - Val x6 = (x3.decoded.func3 - Val(5)); - // OpLHU(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:121) - Val x7 = (x3.addr.low1._super * x3.data._super.high); - Val x8 = (Val(1) - x3.addr.low1._super); - // ValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:10) - // IllegalLoadOp(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:40) - // Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:56) - ValU32Struct x9 = ValU32Struct{.low = Val(0), .high = Val(0)}; - ValU32Struct x10; - if (to_size_t(arg1.minorOnehot._super[0]._super)) { - // Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:51) - ValU32Struct x11 = exec_OpLB(ctx, x3, LAYOUT_LOOKUP(layout2, output.arm0)); - x10 = x11; - } else if (to_size_t(arg1.minorOnehot._super[1]._super)) { - // Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:52) - ValU32Struct x12 = exec_OpLH(ctx, x3, LAYOUT_LOOKUP(layout2, output.arm1._super)); - // Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:50) - STORE(LAYOUT_LOOKUP(layout2, output.arm1._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm1._extra0.count._super), 0), - "Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:50)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm1._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm1._extra1.count._super), 0), - "Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:50)"); - x10 = x12; - } else if (to_size_t(arg1.minorOnehot._super[2]._super)) { - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:57) - // OpLW(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:104) - // Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:53) - EQZ(x4, - "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :57:19) at callsite( " - "OpLW ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :104:18) at Mem0 ( " - "zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :53:10))))"); - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:58) - EQZ(x5, - "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at callsite( " - "OpLW ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :104:18) at Mem0 ( " - "zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :53:10))))"); - // OpLW(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:105) - EQZ(x3.addr.low0._super, - "loc(callsite( OpLW ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :105:20) at Mem0 ( " - "zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :53:10)))"); - // OpLW(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:106) - EQZ(x3.addr.low1._super, - "loc(callsite( OpLW ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :106:20) at Mem0 ( " - "zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :53:10)))"); - // Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:50) - STORE(LAYOUT_LOOKUP(layout2, output.arm2._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm2._extra0.count._super), 0), - "Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:50)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm2._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm2._extra1.count._super), 0), - "Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:50)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm2._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm2._extra2.count._super), 0), - "Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:50)"); - x10 = x3.data._super; - } else if (to_size_t(arg1.minorOnehot._super[3]._super)) { - // Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:54) - ValU32Struct x13 = exec_OpLBU(ctx, x3, LAYOUT_LOOKUP(layout2, output.arm3._super)); - // Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:50) - STORE(LAYOUT_LOOKUP(layout2, output.arm3._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm3._extra0.count._super), 0), - "Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:50)"); - x10 = x13; - } else if (to_size_t(arg1.minorOnehot._super[4]._super)) { - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:57) - // OpLHU(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:119) - // Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:55) - EQZ(x4, - "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :57:19) at callsite( " - "OpLHU ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :119:18) at Mem0 ( " - "zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :55:11))))"); - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:58) - EQZ(x6, - "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at callsite( " - "OpLHU ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :119:18) at Mem0 ( " - "zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :55:11))))"); - // OpLHU(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:120) - EQZ(x3.addr.low0._super, - "loc(callsite( OpLHU ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :120:20) at Mem0 ( " - "zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :55:11)))"); - // Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:50) - STORE(LAYOUT_LOOKUP(layout2, output.arm4._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm4._extra0.count._super), 0), - "Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:50)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm4._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm4._extra1.count._super), 0), - "Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:50)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm4._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm4._extra2.count._super), 0), - "Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:50)"); - x10 = ValU32Struct{.low = (x7 + (x8 * x3.data._super.low)), .high = Val(0)}; - } else if (to_size_t(arg1.minorOnehot._super[5]._super)) { - // IllegalLoadOp(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:39) - // Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:56) - EQZ(Val(2013265920), - "loc(callsite( IllegalLoadOp ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :39:6) at Mem0 ( " - "zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :56:19)))"); - // Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:50) - STORE(LAYOUT_LOOKUP(layout2, output.arm5._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm5._extra0.count._super), 0), - "Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:50)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm5._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm5._extra1.count._super), 0), - "Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:50)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm5._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm5._extra2.count._super), 0), - "Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:50)"); - x10 = x9; - } else if (to_size_t(arg1.minorOnehot._super[6]._super)) { - // IllegalLoadOp(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:39) - // Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:57) - EQZ(Val(2013265920), - "loc(callsite( IllegalLoadOp ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :39:6) at Mem0 ( " - "zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :57:19)))"); - // Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:50) - STORE(LAYOUT_LOOKUP(layout2, output.arm6._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm6._extra0.count._super), 0), - "Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:50)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm6._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm6._extra1.count._super), 0), - "Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:50)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm6._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm6._extra2.count._super), 0), - "Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:50)"); - x10 = x9; - } else if (to_size_t(arg1.minorOnehot._super[7]._super)) { - // IllegalLoadOp(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:39) - // Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:58) - EQZ(Val(2013265920), - "loc(callsite( IllegalLoadOp ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :39:6) at Mem0 ( " - "zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :58:19)))"); - // Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:50) - STORE(LAYOUT_LOOKUP(layout2, output.arm7._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm7._extra0.count._super), 0), - "Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:50)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm7._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm7._extra1.count._super), 0), - "Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:50)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm7._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm7._extra2.count._super), 0), - "Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:50)"); - x10 = x9; - } else { - assert(0 && "Reached unreachable mux arm"); - } - // Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:60) - WriteRdStruct x14 = - exec_WriteRd(ctx, arg0, x3.ii, x3.decoded, Val(1), x10, LAYOUT_LOOKUP(layout2, _0)); - // AddU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:27) - // Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:61) - Val x15 = (arg1.pcU32.low + Val(4)); - NormalizeU32Struct x16 = - exec_NormalizeU32(ctx, - DenormedValU32Struct{.low = x15, .high = arg1.pcU32.high}, - LAYOUT_LOOKUP(layout2, pcAdd)); - return InstOutputStruct{.newPc = x16._super, .newState = Val(32), .newMode = arg1.mode}; -} -ValU32Struct -exec_OpSB(ExecContext& ctx, MemStoreInputStruct arg0, BoundLayout layout1) { - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:57) - // OpSB(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:126) - Val x2 = (arg0.decoded.opcode._super - Val(35)); - EQZ(x2, - "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :57:19) at OpSB ( " - "zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :126:18)))"); - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:58) - EQZ(arg0.decoded.func3, - "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at OpSB ( " - "zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :126:18)))"); - // OpSB(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:127) - Val x3 = (arg0.addr.low1._super * arg0.data._super.high); - Val x4 = (Val(1) - arg0.addr.low1._super); - // OpSB(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:128) - SplitWordStruct x5 = - exec_SplitWord(ctx, (x3 + (x4 * arg0.data._super.low)), LAYOUT_LOOKUP(layout1, origBytes)); - // OpSB(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:129) - SplitWordStruct x6 = exec_SplitWord(ctx, arg0.rs2._super.low, LAYOUT_LOOKUP(layout1, newBytes)); - // OpSB(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:134) - Val x7 = (arg0.addr.low0._super * x5.byte0._super); - Val x8 = (Val(1) - arg0.addr.low0._super); - // OpSB(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:135) - Val x9 = (arg0.addr.low0._super * x6.byte0._super); - Val x10 = (((x8 * x5.byte1._super) + x9) * Val(256)); - // OpSB(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:134) - Val x11 = ((x7 + (x8 * x6.byte0._super)) + x10); - // OpSB(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:138) - Val x12 = (arg0.addr.low1._super * arg0.data._super.low); - // OpSB(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:139) - Val x13 = (arg0.addr.low1._super * x11); - // ValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:10) - // OpSB(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:137) - ValU32Struct x14 = - ValU32Struct{.low = (x12 + (x4 * x11)), .high = ((x4 * arg0.data._super.high) + x13)}; - return x14; -} -InstOutputStruct -exec_Mem1(ExecContext& ctx, RegStruct arg0, InstInputStruct arg1, BoundLayout layout2) { - // Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:66) - MemStoreInputStruct x3 = exec_MemStoreInput(ctx, arg0, arg1, LAYOUT_LOOKUP(layout2, input)); - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:57) - // OpSH(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:144) - // Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:69) - Val x4 = (x3.decoded.opcode._super - Val(35)); - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:58) - Val x5 = (x3.decoded.func3 - Val(1)); - // OpSH(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:150) - Val x6 = (x3.addr.low1._super * x3.data._super.low); - Val x7 = (Val(1) - x3.addr.low1._super); - // OpSH(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:151) - Val x8 = (x3.addr.low1._super * x3.rs2._super.low); - // ValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:10) - // OpSH(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:149) - ValU32Struct x9 = ValU32Struct{.low = (x6 + (x7 * x3.rs2._super.low)), - .high = ((x7 * x3.data._super.high) + x8)}; - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:58) - // OpSW(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:156) - // Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:70) - Val x10 = (x3.decoded.func3 - Val(2)); - // ValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:10) - // IllegalStoreOp(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:45) - // Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:71) - ValU32Struct x11 = ValU32Struct{.low = Val(0), .high = Val(0)}; - ValU32Struct x12; - if (to_size_t(arg1.minorOnehot._super[0]._super)) { - // Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:68) - ValU32Struct x13 = exec_OpSB(ctx, x3, LAYOUT_LOOKUP(layout2, output.arm0)); - x12 = x13; - } else if (to_size_t(arg1.minorOnehot._super[1]._super)) { - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:57) - // OpSH(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:144) - // Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:69) - EQZ(x4, - "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :57:19) at callsite( " - "OpSH ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :144:18) at Mem1 ( " - "zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :69:10))))"); - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:58) - EQZ(x5, - "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at callsite( " - "OpSH ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :144:18) at Mem1 ( " - "zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :69:10))))"); - // OpSH(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:145) - EQZ(x3.addr.low0._super, - "loc(callsite( OpSH ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :145:20) at Mem1 ( " - "zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :69:10)))"); - // Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67) - STORE(LAYOUT_LOOKUP(layout2, output.arm1._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm1._extra0.count._super), 0), - "Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm1._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm1._extra1.count._super), 0), - "Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm1._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm1._extra2.count._super), 0), - "Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm1._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm1._extra3.count._super), 0), - "Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67)"); - x12 = x9; - } else if (to_size_t(arg1.minorOnehot._super[2]._super)) { - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:57) - // OpSW(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:156) - // Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:70) - EQZ(x4, - "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :57:19) at callsite( " - "OpSW ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :156:18) at Mem1 ( " - "zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :70:10))))"); - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:58) - EQZ(x10, - "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at callsite( " - "OpSW ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :156:18) at Mem1 ( " - "zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :70:10))))"); - // OpSW(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:157) - EQZ(x3.addr.low0._super, - "loc(callsite( OpSW ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :157:20) at Mem1 ( " - "zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :70:10)))"); - // OpSW(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:158) - EQZ(x3.addr.low1._super, - "loc(callsite( OpSW ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :158:20) at Mem1 ( " - "zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :70:10)))"); - // Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67) - STORE(LAYOUT_LOOKUP(layout2, output.arm2._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm2._extra0.count._super), 0), - "Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm2._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm2._extra1.count._super), 0), - "Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm2._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm2._extra2.count._super), 0), - "Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm2._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm2._extra3.count._super), 0), - "Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67)"); - x12 = x3.rs2._super; - } else if (to_size_t(arg1.minorOnehot._super[3]._super)) { - // IllegalStoreOp(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:44) - // Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:71) - EQZ(Val(2013265920), - "loc(callsite( IllegalStoreOp ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :44:6) at Mem1 " - "( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :71:20)))"); - // Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67) - STORE(LAYOUT_LOOKUP(layout2, output.arm3._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm3._extra0.count._super), 0), - "Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm3._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm3._extra1.count._super), 0), - "Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm3._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm3._extra2.count._super), 0), - "Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm3._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm3._extra3.count._super), 0), - "Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67)"); - x12 = x11; - } else if (to_size_t(arg1.minorOnehot._super[4]._super)) { - // IllegalStoreOp(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:44) - // Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:72) - EQZ(Val(2013265920), - "loc(callsite( IllegalStoreOp ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :44:6) at Mem1 " - "( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :72:20)))"); - // Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67) - STORE(LAYOUT_LOOKUP(layout2, output.arm4._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm4._extra0.count._super), 0), - "Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm4._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm4._extra1.count._super), 0), - "Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm4._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm4._extra2.count._super), 0), - "Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm4._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm4._extra3.count._super), 0), - "Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67)"); - x12 = x11; - } else if (to_size_t(arg1.minorOnehot._super[5]._super)) { - // IllegalStoreOp(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:44) - // Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:73) - EQZ(Val(2013265920), - "loc(callsite( IllegalStoreOp ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :44:6) at Mem1 " - "( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :73:20)))"); - // Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67) - STORE(LAYOUT_LOOKUP(layout2, output.arm5._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm5._extra0.count._super), 0), - "Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm5._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm5._extra1.count._super), 0), - "Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm5._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm5._extra2.count._super), 0), - "Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm5._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm5._extra3.count._super), 0), - "Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67)"); - x12 = x11; - } else if (to_size_t(arg1.minorOnehot._super[6]._super)) { - // IllegalStoreOp(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:44) - // Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:74) - EQZ(Val(2013265920), - "loc(callsite( IllegalStoreOp ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :44:6) at Mem1 " - "( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :74:20)))"); - // Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67) - STORE(LAYOUT_LOOKUP(layout2, output.arm6._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm6._extra0.count._super), 0), - "Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm6._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm6._extra1.count._super), 0), - "Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm6._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm6._extra2.count._super), 0), - "Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm6._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm6._extra3.count._super), 0), - "Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67)"); - x12 = x11; - } else if (to_size_t(arg1.minorOnehot._super[7]._super)) { - // IllegalStoreOp(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:44) - // Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:75) - EQZ(Val(2013265920), - "loc(callsite( IllegalStoreOp ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :44:6) at Mem1 " - "( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :75:20)))"); - // Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67) - STORE(LAYOUT_LOOKUP(layout2, output.arm7._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm7._extra0.count._super), 0), - "Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm7._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm7._extra1.count._super), 0), - "Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm7._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm7._extra2.count._super), 0), - "Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm7._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm7._extra3.count._super), 0), - "Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67)"); - x12 = x11; - } else { - assert(0 && "Reached unreachable mux arm"); - } - // Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:77) - MemStoreFinalizeStruct x14 = - exec_MemStoreFinalize(ctx, arg0, x3, x12, LAYOUT_LOOKUP(layout2, _0)); - // AddU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:27) - // Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:78) - Val x15 = (arg1.pcU32.low + Val(4)); - NormalizeU32Struct x16 = - exec_NormalizeU32(ctx, - DenormedValU32Struct{.low = x15, .high = arg1.pcU32.high}, - LAYOUT_LOOKUP(layout2, pcAdd)); - return InstOutputStruct{.newPc = x16._super, .newState = Val(32), .newMode = arg1.mode}; -} -DigestRegStruct -back_DigestReg(ExecContext& ctx, Index distance0, BoundLayout layout1) { - // DigestReg(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:7) - DigestRegValues_SuperStruct8Array x2 = - map(Val8Array{Val(0), Val(1), Val(2), Val(3), Val(4), Val(5), Val(6), Val(7)}, - LAYOUT_LOOKUP(layout1, values), - ([&](Val8Array::value_type x3, - BoundLayout x4) { - // DigestReg(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:8) - RegStruct x5 = back_Reg(ctx, distance0, LAYOUT_LOOKUP(x4, low)); - // DigestReg(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:9) - RegStruct x6 = back_Reg(ctx, distance0, LAYOUT_LOOKUP(x4, high)); - return DigestRegValues_SuperStruct{.low = x5, .high = x6}; - })); - return DigestRegStruct{.values = x2}; -} -DigestRegStruct -exec_DigestReg(ExecContext& ctx, ValU32Struct8Array arg0, BoundLayout layout1) { - // DigestReg(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:7) - DigestRegValues_SuperStruct8Array x2 = - map(arg0, - LAYOUT_LOOKUP(layout1, values), - ([&](ValU32Struct8Array::value_type x3, - BoundLayout x4) { - // DigestReg(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:8) - RegStruct x5 = exec_Reg(ctx, x3.low, LAYOUT_LOOKUP(x4, low)); - // DigestReg(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:9) - RegStruct x6 = exec_Reg(ctx, x3.high, LAYOUT_LOOKUP(x4, high)); - return DigestRegValues_SuperStruct{.low = x5, .high = x6}; - })); - return DigestRegStruct{.values = x2}; -} -InstOutputStruct exec_ControlLoadRoot(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2, - GlobalBuf global3) { - // ControlLoadRoot(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:18) - BoundLayout<_globalLayout> x4 = BIND_LAYOUT(kLayoutGlobal, global3); - // ControlLoadRoot(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:20) - EQZ(arg1.state, "ControlLoadRoot(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:20)"); - // ControlLoadRoot(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:22) - ControlLoadRoot__0Struct8Array x5 = - map(Val8Array{Val(0), Val(1), Val(2), Val(3), Val(4), Val(5), Val(6), Val(7)}, - LAYOUT_LOOKUP(layout2, _1), - ([&](Val8Array::value_type x6, - BoundLayout x7) { - // ControlLoadRoot(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:23) - GetDataStruct x8 = - exec_MemoryPageIn(ctx, arg0, (x6 + Val(1140850680)), LAYOUT_LOOKUP(x7, mem)); - // ControlLoadRoot(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:19) - DigestRegStruct x9 = back_DigestReg(ctx, 0, LAYOUT_LOOKUP(x4, stateIn)); - // ControlLoadRoot(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:24) - Val x10 = (x9.values[to_size_t(x6)].low._super._super - x8._super.low); - EQZ(x10, "ControlLoadRoot(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:24)"); - // ControlLoadRoot(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:19) - DigestRegStruct x11 = back_DigestReg(ctx, 0, LAYOUT_LOOKUP(x4, stateIn)); - // ControlLoadRoot(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:25) - Val x12 = (x11.values[to_size_t(x6)].high._super._super - x8._super.high); - EQZ(x12, "ControlLoadRoot(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:25)"); - return ControlLoadRoot__0Struct{}; - })); - // InstOutput(zirgen/circuit/rv32im/v2/dsl/inst.zir:46) - // ControlLoadRoot(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:27) - InstOutputStruct x13 = InstOutputStruct{ - .newPc = ValU32Struct{.low = Val(0), .high = Val(0)}, .newState = Val(16), .newMode = Val(0)}; - return x13; -} -InstOutputStruct exec_ControlResume(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2, - GlobalBuf global3) { - // ControlResume(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:30) - BoundLayout<_globalLayout> x4 = BIND_LAYOUT(kLayoutGlobal, global3); - // ControlResume(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:31) - EQZ((arg1.state - Val(1)), "ControlResume(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:31)"); - // ControlResume(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:33) - Val x5 = (arg1.pcU32.low + arg1.pcU32.high); - NondetRegStruct x6 = exec_IsZero(ctx, x5, LAYOUT_LOOKUP(layout2, pcZero)); - InstOutputStruct x7; - if (to_size_t(x6._super)) { - // ControlResume(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:36) - GetDataStruct x8 = - exec_MemoryRead(ctx, arg0, Val(1073725572), LAYOUT_LOOKUP(layout2, _super.arm0._super.pc)); - // ControlResume(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:37) - GetDataStruct x9 = exec_MemoryRead( - ctx, arg0, Val(1073725573), LAYOUT_LOOKUP(layout2, _super.arm0._super.mode)); - // InstOutput(zirgen/circuit/rv32im/v2/dsl/inst.zir:46) - // ControlResume(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:38) - InstOutputStruct x10 = - InstOutputStruct{.newPc = x8._super, .newState = Val(1), .newMode = x9._super.low}; - // ControlResume(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:34) - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra0.count._super), 0), - "ControlResume(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:34)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra1.count._super), 0), - "ControlResume(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:34)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra2.count._super), 0), - "ControlResume(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:34)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra3.count._super), 0), - "ControlResume(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:34)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra4.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra4.count._super), 0), - "ControlResume(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:34)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra5.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra5.count._super), 0), - "ControlResume(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:34)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra6.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra6.count._super), 0), - "ControlResume(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:34)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra7.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra7.count._super), 0), - "ControlResume(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:34)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra8.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra8.count._super), 0), - "ControlResume(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:34)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra9.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra9.count._super), 0), - "ControlResume(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:34)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra10.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra10.count._super), 0), - "ControlResume(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:34)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra11.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra11.count._super), 0), - "ControlResume(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:34)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra12.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra12.count._super), 0), - "ControlResume(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:34)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra13.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra13.count._super), 0), - "ControlResume(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:34)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra14.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra14.count._super), 0), - "ControlResume(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:34)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra15.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra15.count._super), 0), - "ControlResume(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:34)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra16.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra16.count._super), 0), - "ControlResume(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:34)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra17.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra17.count._super), 0), - "ControlResume(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:34)"); - x7 = x10; - } else if (to_size_t((Val(1) - x6._super))) { - // ControlResume(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:41) - ControlResume_SuperArm1_Super__0Struct8Array x11 = - map(Val8Array{Val(0), Val(1), Val(2), Val(3), Val(4), Val(5), Val(6), Val(7)}, - LAYOUT_LOOKUP(layout2, _super.arm1._1), - ([&](Val8Array::value_type x12, - BoundLayout - x13) { - // ControlResume(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:40) - DigestRegStruct x14 = back_DigestReg(ctx, 0, LAYOUT_LOOKUP(x4, input)); - // ValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:10) - // ControlResume(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:43) - ValU32Struct x15 = - ValU32Struct{.low = x14.values[to_size_t(x12)].low._super._super, - .high = x14.values[to_size_t(x12)].high._super._super}; - // ControlResume(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:42) - MemoryWriteStruct x16 = - exec_MemoryWrite(ctx, arg0, (x12 + Val(1073725592)), x15, LAYOUT_LOOKUP(x13, _0)); - return ControlResume_SuperArm1_Super__0Struct{}; - })); - x7 = InstOutputStruct{.newPc = arg1.pcU32, .newState = Val(32), .newMode = arg1.mode}; - } else { - assert(0 && "Reached unreachable mux arm"); - } - return x7; -} -InstOutputStruct exec_ControlUserECALL(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2) { - // ControlUserECALL(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:50) - RegStruct x3 = exec_Reg(ctx, arg1.mode, LAYOUT_LOOKUP(layout2, safeMode)); - // ControlUserECALL(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:51) - AddrDecomposeBitsStruct x4 = - exec_AddrDecomposeBits(ctx, arg1.pcU32, x3._super._super, LAYOUT_LOOKUP(layout2, pcAddr)); - // ControlUserECALL(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:52) - EQZ(x4.low2, "ControlUserECALL(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:52)"); - // ControlUserECALL(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:53) - GetDataStruct x5 = exec_MemoryRead(ctx, arg0, x4._super, LAYOUT_LOOKUP(layout2, loadInst)); - // ControlUserECALL(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:54) - EQZ(x5._super.high, "ControlUserECALL(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:54)"); - // ControlUserECALL(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:55) - Val x6 = (x5._super.low - Val(115)); - EQZ(x6, "ControlUserECALL(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:55)"); - // ControlUserECALL(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:56) - EQZ((arg1.state - Val(32)), "ControlUserECALL(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:56)"); - // ControlUserECALL(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:57) - EQZ(arg1.mode, "ControlUserECALL(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:57)"); - // ControlUserECALL(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:58) - GetDataStruct x7 = - exec_MemoryRead(ctx, arg0, Val(1073725489), LAYOUT_LOOKUP(layout2, dispatchIdx)); - // ControlUserECALL(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:59) - EQZ(x7._super.high, "ControlUserECALL(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:59)"); - // ControlUserECALL(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:60) - Val x8 = (x7._super.low * Val(128)); - U16RegStruct x9 = exec_U16Reg(ctx, x8, LAYOUT_LOOKUP(layout2, _0)); - // ControlUserECALL(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:61) - Val x10 = (x7._super.low + Val(1073726464)); - GetDataStruct x11 = exec_MemoryRead(ctx, arg0, x10, LAYOUT_LOOKUP(layout2, newPcAddr)); - // ControlUserECALL(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:62) - MemoryWriteStruct x12 = - exec_MemoryWrite(ctx, arg0, Val(1073725568), arg1.pcU32, LAYOUT_LOOKUP(layout2, _1)); - return InstOutputStruct{.newPc = x11._super, .newState = Val(32), .newMode = Val(1)}; -} -InstOutputStruct exec_ControlMRET(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2) { - // ControlMRET(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:67) - RegStruct x3 = exec_Reg(ctx, arg1.mode, LAYOUT_LOOKUP(layout2, safeMode)); - // ControlMRET(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:68) - AddrDecomposeBitsStruct x4 = - exec_AddrDecomposeBits(ctx, arg1.pcU32, x3._super._super, LAYOUT_LOOKUP(layout2, pcAddr)); - // ControlMRET(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:69) - EQZ(x4.low2, "ControlMRET(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:69)"); - // ControlMRET(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:70) - GetDataStruct x5 = exec_MemoryRead(ctx, arg0, x4._super, LAYOUT_LOOKUP(layout2, loadInst)); - // ControlMRET(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:71) - Val x6 = (x5._super.high - Val(12320)); - EQZ(x6, "ControlMRET(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:71)"); - // ControlMRET(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:72) - Val x7 = (x5._super.low - Val(115)); - EQZ(x7, "ControlMRET(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:72)"); - // ControlMRET(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:73) - EQZ((arg1.state - Val(32)), "ControlMRET(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:73)"); - // ControlMRET(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:74) - EQZ((arg1.mode - Val(1)), "ControlMRET(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:74)"); - // ControlMRET(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:75) - GetDataStruct x8 = exec_MemoryRead(ctx, arg0, Val(1073725568), LAYOUT_LOOKUP(layout2, pc)); - // AddU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:27) - // ControlMRET(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:76) - Val x9 = (x8._super.low + Val(4)); - NormalizeU32Struct x10 = exec_NormalizeU32( - ctx, DenormedValU32Struct{.low = x9, .high = x8._super.high}, LAYOUT_LOOKUP(layout2, pcAdd)); - return InstOutputStruct{.newPc = x10._super, .newState = Val(32), .newMode = Val(0)}; -} -InstOutputStruct exec_ControlSuspend(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2, - GlobalBuf global3) { - // ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:80) - BoundLayout<_globalLayout> x4 = BIND_LAYOUT(kLayoutGlobal, global3); - // ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:81) - EQZ((arg1.state - Val(4)), "ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:81)"); - // ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:83) - Val x5 = (arg1.pcU32.low + arg1.pcU32.high); - NondetRegStruct x6 = exec_IsZero(ctx, x5, LAYOUT_LOOKUP(layout2, pcZero)); - // ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:91) - ComponentStruct x7 = ComponentStruct{}; - // ValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:10) - // ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:103) - ValU32Struct x8 = ValU32Struct{.low = Val(0), .high = Val(0)}; - InstOutputStruct x9; - if (to_size_t(x6._super)) { - // ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:89) - GetDataStruct8Array x10 = map( - Val8Array{Val(0), Val(1), Val(2), Val(3), Val(4), Val(5), Val(6), Val(7)}, - LAYOUT_LOOKUP(layout2, _super.arm0._1), - ([&](Val8Array::value_type x11, BoundLayout x12) { - GetDataStruct x13 = exec_MemoryRead(ctx, arg0, (x11 + Val(1073725584)), x12); - return x13; - })); - ValU32Struct8Array x14 = ValU32Struct8Array{x10[0]._super, - x10[1]._super, - x10[2]._super, - x10[3]._super, - x10[4]._super, - x10[5]._super, - x10[6]._super, - x10[7]._super}; - // ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:88) - DigestRegStruct x15 = exec_DigestReg(ctx, x14, LAYOUT_LOOKUP(x4, output)); - // ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:86) - RegStruct x16 = back_Reg(ctx, 0, LAYOUT_LOOKUP(x4, isTerminate)); - // ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:91) - Val x17 = (Val(1) - x16._super._super); - // ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:86) - RegStruct x18 = back_Reg(ctx, 0, LAYOUT_LOOKUP(x4, isTerminate)); - // ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:91) - Val x19 = (Val(1) - x18._super._super); - ComponentStruct x20; - if (to_size_t(x17)) { - // ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:92) - RegStruct x21 = exec_Reg(ctx, Val(0), LAYOUT_LOOKUP(x4, termA0low)); - // ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:93) - RegStruct x22 = exec_Reg(ctx, Val(0), LAYOUT_LOOKUP(x4, termA0high)); - // ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:94) - RegStruct x23 = exec_Reg(ctx, Val(0), LAYOUT_LOOKUP(x4, termA1low)); - // ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:95) - RegStruct x24 = exec_Reg(ctx, Val(0), LAYOUT_LOOKUP(x4, termA1high)); - x20 = x7; - } else if (to_size_t((Val(1) - x19))) { - x20 = x7; - } else { - assert(0 && "Reached unreachable mux arm"); - } - x9 = InstOutputStruct{.newPc = x8, .newState = Val(16), .newMode = Val(3)}; - } else if (to_size_t((Val(1) - x6._super))) { - // ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:107) - RegStruct x25 = exec_Reg(ctx, arg1.state, LAYOUT_LOOKUP(layout2, _super.arm1._super.state)); - // ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:108) - Val x26 = (x25._super._super - Val(32)); - Val x27 = (x25._super._super - Val(4)); - EQZ((x26 * x27), "ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:108)"); - // ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:111) - RegStruct x28 = exec_Reg(ctx, (x26 * Val(1797558858)), LAYOUT_LOOKUP(x4, isTerminate)); - // ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:113) - MemoryWriteStruct x29 = exec_MemoryWrite( - ctx, arg0, Val(1073725572), arg1.pcU32, LAYOUT_LOOKUP(layout2, _super.arm1._super._0)); - // ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:114) - MemoryWriteStruct x30 = exec_MemoryWrite(ctx, - arg0, - Val(1073725573), - ValU32Struct{.low = arg1.mode, .high = Val(0)}, - LAYOUT_LOOKUP(layout2, _super.arm1._super._1)); - // ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:84) - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra0.count._super), 0), - "ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:84)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra1.count._super), 0), - "ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:84)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra2.count._super), 0), - "ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:84)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra3.count._super), 0), - "ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:84)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra4.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra4.count._super), 0), - "ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:84)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra5.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra5.count._super), 0), - "ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:84)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra6.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra6.count._super), 0), - "ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:84)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra7.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra7.count._super), 0), - "ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:84)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra8.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra8.count._super), 0), - "ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:84)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra9.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra9.count._super), 0), - "ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:84)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra10.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra10.count._super), 0), - "ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:84)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra11.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra11.count._super), 0), - "ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:84)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra12.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra12.count._super), 0), - "ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:84)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra13.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra13.count._super), 0), - "ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:84)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra14.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra14.count._super), 0), - "ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:84)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra15.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra15.count._super), 0), - "ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:84)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra16.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra16.count._super), 0), - "ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:84)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra17.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra17.count._super), 0), - "ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:84)"); - x9 = InstOutputStruct{.newPc = x8, .newState = Val(4), .newMode = arg1.mode}; - } else { - assert(0 && "Reached unreachable mux arm"); - } - return x9; -} -InstOutputStruct exec_ControlStoreRoot(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2, - GlobalBuf global3) { - // ControlStoreRoot(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:120) - BoundLayout<_globalLayout> x4 = BIND_LAYOUT(kLayoutGlobal, global3); - // ControlStoreRoot(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:121) - EQZ((arg1.state - Val(5)), "ControlStoreRoot(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:121)"); - // ControlStoreRoot(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:123) - GetDataStruct8Array x5 = map( - Val8Array{Val(0), Val(1), Val(2), Val(3), Val(4), Val(5), Val(6), Val(7)}, - LAYOUT_LOOKUP(layout2, _1), - ([&](Val8Array::value_type x6, BoundLayout x7) { - // ControlStoreRoot(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:124) - GetDataStruct x8 = exec_MemoryPageOut(ctx, arg0, (x6 + Val(1140850680)), x7); - return x8; - })); - // ControlStoreRoot(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:123) - ValU32Struct8Array x9 = ValU32Struct8Array{x5[0]._super, - x5[1]._super, - x5[2]._super, - x5[3]._super, - x5[4]._super, - x5[5]._super, - x5[6]._super, - x5[7]._super}; - // ControlStoreRoot(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:122) - DigestRegStruct x10 = exec_DigestReg(ctx, x9, LAYOUT_LOOKUP(x4, stateOut)); - // InstOutput(zirgen/circuit/rv32im/v2/dsl/inst.zir:46) - // ControlStoreRoot(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:127) - InstOutputStruct x11 = InstOutputStruct{ - .newPc = ValU32Struct{.low = Val(0), .high = Val(0)}, .newState = Val(6), .newMode = Val(0)}; - return x11; -} -InstOutputStruct exec_ControlTable(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2) { - // ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:131) - EQZ((arg1.state - Val(6)), "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:131)"); - // ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:132) - RegStruct x3 = exec_Reg(ctx, arg1.pcU32.low, LAYOUT_LOOKUP(layout2, entry)); - // ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:133) - RegStruct x4 = exec_Reg(ctx, arg1.mode, LAYOUT_LOOKUP(layout2, mode)); - // ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:134) - std::initializer_list x5 = std::initializer_list{x4._super._super, x3._super._super}; - // Log(:22) - INVOKE_EXTERN(ctx, log, "mode/entry = ", x5); - // ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135) - Val x6 = (Val(1) - x4._super._super); - // ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:137) - Val16Array x7 = Val16Array{Val(0), - Val(1), - Val(2), - Val(3), - Val(4), - Val(5), - Val(6), - Val(7), - Val(8), - Val(9), - Val(10), - Val(11), - Val(12), - Val(13), - Val(14), - Val(15)}; - // ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:142) - Val x8 = (x3._super._super + Val(16)); - // ValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:10) - // ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:145) - ValU32Struct x9 = ValU32Struct{.low = Val(0), .high = Val(0)}; - // ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:147) - ValU32Struct x10 = ValU32Struct{.low = x8, .high = Val(0)}; - InstOutputStruct x11; - if (to_size_t(x4._super._super)) { - // ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:137) - ControlTable_SuperArm0_Super__0Struct16Array x12 = - map(x7, - LAYOUT_LOOKUP(layout2, _super.arm0._super._1), - ([&](Val16Array::value_type x13, - BoundLayout - x14) { - // ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:138) - Val x15 = (x3._super._super + x13); - // LookupCurrent(zirgen/circuit/rv32im/v2/dsl/lookups.zir:5) - // ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:139) - Val x16 = INVOKE_EXTERN(ctx, lookupCurrent, Val(16), x15); - ArgU16Struct x17 = exec_ArgU16(ctx, neg_0(x16), x15, LAYOUT_LOOKUP(x14, arg)); - // ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:140) - Val x18 = (x17.val._super - x15); - EQZ(x18, "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:140)"); - return ControlTable_SuperArm0_Super__0Struct{}; - })); - // ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:143) - NondetRegStruct x19 = - exec_IsZero(ctx, (x8 - Val(65536)), LAYOUT_LOOKUP(layout2, _super.arm0._super.done)); - InstOutputStruct x20; - if (to_size_t(x19._super)) { - x20 = InstOutputStruct{.newPc = x9, .newState = Val(7), .newMode = Val(0)}; - } else if (to_size_t((Val(1) - x19._super))) { - x20 = InstOutputStruct{.newPc = x10, .newState = Val(6), .newMode = Val(1)}; - } else { - assert(0 && "Reached unreachable mux arm"); - } - // ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135) - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra0.count._super), 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra1.count._super), 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra2.count._super), 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra3.count._super), 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra4.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra4.count._super), 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra5.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra5.count._super), 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra6.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra6.count._super), 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra7.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra7.count._super), 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra8.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra8.count._super), 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra9.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra9.count._super), 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra10.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra10.count._super), 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra11.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra11.count._super), 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra12.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra12.count._super), 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra13.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra13.count._super), 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra14.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra14.count._super), 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra15.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra15.count._super), 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)"); - x11 = x20; - } else if (to_size_t(x6)) { - // ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:151) - ControlTable_SuperArm1_Super__0Struct16Array x21 = - map(x7, - LAYOUT_LOOKUP(layout2, _super.arm1._super._1), - ([&](Val16Array::value_type x22, - BoundLayout - x23) { - // ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:152) - Val x24 = (x3._super._super + x22); - // LookupCurrent(zirgen/circuit/rv32im/v2/dsl/lookups.zir:5) - // ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:153) - Val x25 = INVOKE_EXTERN(ctx, lookupCurrent, Val(8), x24); - ArgU8Struct x26 = exec_ArgU8(ctx, neg_0(x25), x24, LAYOUT_LOOKUP(x23, arg)); - // ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:154) - Val x27 = (x26.val._super - x24); - EQZ(x27, "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:154)"); - return ControlTable_SuperArm1_Super__0Struct{}; - })); - // ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:157) - NondetRegStruct x28 = - exec_IsZero(ctx, (x8 - Val(256)), LAYOUT_LOOKUP(layout2, _super.arm1._super.done)); - InstOutputStruct x29; - if (to_size_t(x28._super)) { - x29 = InstOutputStruct{.newPc = x9, .newState = Val(6), .newMode = Val(1)}; - } else if (to_size_t((Val(1) - x28._super))) { - x29 = InstOutputStruct{.newPc = x10, .newState = Val(6), .newMode = Val(0)}; - } else { - assert(0 && "Reached unreachable mux arm"); - } - // ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135) - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra0.count._super), 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra1.count._super), 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra2.count._super), 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra3.count._super), 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra4.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra4.count._super), 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra5.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra5.count._super), 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra6.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra6.count._super), 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra7.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra7.count._super), 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra8.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra8.count._super), 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra9.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra9.count._super), 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra10.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra10.count._super), 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra11.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra11.count._super), 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra12.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra12.count._super), 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra13.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra13.count._super), 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra14.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra14.count._super), 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra15.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra15.count._super), 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)"); - x11 = x29; - } else { - assert(0 && "Reached unreachable mux arm"); - } - return x11; -} -InstOutputStruct exec_Control0(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2, - GlobalBuf global3) { - // GetDiffCount(zirgen/circuit/rv32im/v2/dsl/mem.zir:22) - // Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:173) - Val x4 = INVOKE_EXTERN(ctx, getDiffCount, arg0._super._super); - CycleArgStruct x5 = - exec_CycleArg(ctx, neg_0(x4), arg0._super._super, LAYOUT_LOOKUP(layout2, arg)); - // Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:175) - Val x6 = (x5.cycle._super - arg0._super._super); - EQZ(x6, "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:175)"); - // InstOutput(zirgen/circuit/rv32im/v2/dsl/inst.zir:46) - // ControlDone(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:168) - // Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:184) - InstOutputStruct x7 = InstOutputStruct{ - .newPc = ValU32Struct{.low = Val(0), .high = Val(0)}, .newState = Val(7), .newMode = Val(0)}; - InstOutputStruct x8; - if (to_size_t(arg1.minorOnehot._super[0]._super)) { - // Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:177) - InstOutputStruct x9 = - exec_ControlLoadRoot(ctx, arg0, arg1, LAYOUT_LOOKUP(layout2, _super.arm0._super), global3); - // Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176) - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra0.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra1.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra2.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra3.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra4.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra4.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra5.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra5.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra6.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra6.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra7.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra7.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra8.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra8.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra9.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra9.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra10.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra10.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra11.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra11.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra12.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra12.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra13.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra13.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra14.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra14.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra15.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra15.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra16.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra16.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra17.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra17.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra18.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra18.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra19.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra19.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra20.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra20.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra21.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra21.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra22.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra22.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra23.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra23.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra24.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra24.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra25.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra25.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra26.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra26.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra27.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra27.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra28.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra28.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra29.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra29.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra30.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra30.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra31.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra31.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra32.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra32.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra33.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra33.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra34.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra34.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra35.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra35.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra36.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra36.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra37.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra37.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra38.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra38.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra39.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra39.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - x8 = x9; - } else if (to_size_t(arg1.minorOnehot._super[1]._super)) { - // Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:178) - InstOutputStruct x10 = - exec_ControlResume(ctx, arg0, arg1, LAYOUT_LOOKUP(layout2, _super.arm1._super), global3); - // Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176) - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra0.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra1.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra2.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra3.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra4.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra4.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra5.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra5.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra6.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra6.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra7.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra7.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra8.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra8.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra9.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra9.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra10.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra10.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra11.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra11.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra12.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra12.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra13.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra13.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra14.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra14.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra15.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra15.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra16.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra16.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra17.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra17.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra18.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra18.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra19.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra19.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra20.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra20.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra21.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra21.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra22.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra22.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra23.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra23.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra24.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra24.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra25.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra25.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra26.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra26.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra27.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra27.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra28.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra28.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra29.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra29.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra30.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra30.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm1._extra31.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm1._extra31.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - x8 = x10; - } else if (to_size_t(arg1.minorOnehot._super[2]._super)) { - // Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:179) - InstOutputStruct x11 = - exec_ControlUserECALL(ctx, arg0, arg1, LAYOUT_LOOKUP(layout2, _super.arm2._super)); - // Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176) - STORE(LAYOUT_LOOKUP(layout2, _super.arm2._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm2._extra0.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm2._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm2._extra1.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm2._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm2._extra2.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm2._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm2._extra3.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm2._extra4.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm2._extra4.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm2._extra5.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm2._extra5.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm2._extra6.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm2._extra6.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm2._extra7.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm2._extra7.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm2._extra8.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm2._extra8.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm2._extra9.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm2._extra9.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm2._extra10.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm2._extra10.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm2._extra11.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm2._extra11.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm2._extra12.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm2._extra12.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm2._extra13.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm2._extra13.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm2._extra14.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm2._extra14.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm2._extra15.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm2._extra15.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm2._extra16.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm2._extra16.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm2._extra17.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm2._extra17.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm2._extra18.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm2._extra18.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm2._extra19.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm2._extra19.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm2._extra20.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm2._extra20.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm2._extra21.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm2._extra21.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm2._extra22.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm2._extra22.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm2._extra23.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm2._extra23.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm2._extra24.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm2._extra24.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm2._extra25.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm2._extra25.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm2._extra26.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm2._extra26.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm2._extra27.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm2._extra27.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm2._extra28.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm2._extra28.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm2._extra29.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm2._extra29.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm2._extra30.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm2._extra30.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm2._extra31.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm2._extra31.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm2._extra32.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm2._extra32.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm2._extra33.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm2._extra33.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm2._extra34.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm2._extra34.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm2._extra35.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm2._extra35.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm2._extra36.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm2._extra36.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm2._extra37.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm2._extra37.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm2._extra38.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm2._extra38.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm2._extra39.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm2._extra39.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm2._extra40.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm2._extra40.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - x8 = x11; - } else if (to_size_t(arg1.minorOnehot._super[3]._super)) { - // Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:180) - InstOutputStruct x12 = - exec_ControlMRET(ctx, arg0, arg1, LAYOUT_LOOKUP(layout2, _super.arm3._super)); - // Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176) - STORE(LAYOUT_LOOKUP(layout2, _super.arm3._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm3._extra0.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm3._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm3._extra1.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm3._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm3._extra2.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm3._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm3._extra3.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm3._extra4.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm3._extra4.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm3._extra5.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm3._extra5.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm3._extra6.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm3._extra6.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm3._extra7.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm3._extra7.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm3._extra8.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm3._extra8.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm3._extra9.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm3._extra9.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm3._extra10.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm3._extra10.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm3._extra11.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm3._extra11.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm3._extra12.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm3._extra12.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm3._extra13.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm3._extra13.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm3._extra14.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm3._extra14.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm3._extra15.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm3._extra15.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm3._extra16.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm3._extra16.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm3._extra17.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm3._extra17.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm3._extra18.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm3._extra18.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm3._extra19.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm3._extra19.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm3._extra20.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm3._extra20.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm3._extra21.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm3._extra21.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm3._extra22.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm3._extra22.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm3._extra23.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm3._extra23.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm3._extra24.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm3._extra24.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm3._extra25.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm3._extra25.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm3._extra26.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm3._extra26.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm3._extra27.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm3._extra27.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm3._extra28.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm3._extra28.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm3._extra29.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm3._extra29.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm3._extra30.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm3._extra30.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm3._extra31.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm3._extra31.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm3._extra32.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm3._extra32.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm3._extra33.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm3._extra33.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm3._extra34.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm3._extra34.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm3._extra35.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm3._extra35.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm3._extra36.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm3._extra36.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm3._extra37.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm3._extra37.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm3._extra38.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm3._extra38.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm3._extra39.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm3._extra39.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm3._extra40.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm3._extra40.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm3._extra41.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm3._extra41.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm3._extra42.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm3._extra42.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm3._extra43.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm3._extra43.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm3._extra44.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm3._extra44.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm3._extra45.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm3._extra45.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - x8 = x12; - } else if (to_size_t(arg1.minorOnehot._super[4]._super)) { - // Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:181) - InstOutputStruct x13 = - exec_ControlSuspend(ctx, arg0, arg1, LAYOUT_LOOKUP(layout2, _super.arm4._super), global3); - // Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176) - STORE(LAYOUT_LOOKUP(layout2, _super.arm4._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm4._extra0.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm4._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm4._extra1.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm4._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm4._extra2.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm4._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm4._extra3.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm4._extra4.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm4._extra4.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm4._extra5.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm4._extra5.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm4._extra6.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm4._extra6.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm4._extra7.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm4._extra7.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm4._extra8.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm4._extra8.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm4._extra9.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm4._extra9.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm4._extra10.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm4._extra10.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm4._extra11.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm4._extra11.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm4._extra12.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm4._extra12.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm4._extra13.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm4._extra13.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm4._extra14.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm4._extra14.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm4._extra15.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm4._extra15.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm4._extra16.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm4._extra16.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm4._extra17.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm4._extra17.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm4._extra18.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm4._extra18.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm4._extra19.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm4._extra19.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm4._extra20.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm4._extra20.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm4._extra21.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm4._extra21.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm4._extra22.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm4._extra22.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm4._extra23.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm4._extra23.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm4._extra24.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm4._extra24.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm4._extra25.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm4._extra25.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm4._extra26.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm4._extra26.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm4._extra27.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm4._extra27.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm4._extra28.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm4._extra28.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm4._extra29.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm4._extra29.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm4._extra30.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm4._extra30.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm4._extra31.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm4._extra31.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - x8 = x13; - } else if (to_size_t(arg1.minorOnehot._super[5]._super)) { - // Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:182) - InstOutputStruct x14 = - exec_ControlStoreRoot(ctx, arg0, arg1, LAYOUT_LOOKUP(layout2, _super.arm5._super), global3); - // Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176) - STORE(LAYOUT_LOOKUP(layout2, _super.arm5._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm5._extra0.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm5._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm5._extra1.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm5._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm5._extra2.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm5._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm5._extra3.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm5._extra4.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm5._extra4.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm5._extra5.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm5._extra5.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm5._extra6.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm5._extra6.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm5._extra7.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm5._extra7.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm5._extra8.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm5._extra8.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm5._extra9.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm5._extra9.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm5._extra10.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm5._extra10.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm5._extra11.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm5._extra11.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm5._extra12.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm5._extra12.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm5._extra13.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm5._extra13.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm5._extra14.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm5._extra14.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm5._extra15.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm5._extra15.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm5._extra16.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm5._extra16.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm5._extra17.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm5._extra17.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm5._extra18.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm5._extra18.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm5._extra19.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm5._extra19.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm5._extra20.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm5._extra20.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm5._extra21.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm5._extra21.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm5._extra22.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm5._extra22.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm5._extra23.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm5._extra23.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm5._extra24.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm5._extra24.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm5._extra25.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm5._extra25.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm5._extra26.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm5._extra26.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm5._extra27.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm5._extra27.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm5._extra28.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm5._extra28.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm5._extra29.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm5._extra29.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm5._extra30.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm5._extra30.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm5._extra31.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm5._extra31.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - x8 = x14; - } else if (to_size_t(arg1.minorOnehot._super[6]._super)) { - // Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:183) - InstOutputStruct x15 = - exec_ControlTable(ctx, arg0, arg1, LAYOUT_LOOKUP(layout2, _super.arm6._super)); - // Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176) - STORE(LAYOUT_LOOKUP(layout2, _super.arm6._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm6._extra0.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm6._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm6._extra1.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm6._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm6._extra2.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm6._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm6._extra3.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm6._extra4.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm6._extra4.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm6._extra5.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm6._extra5.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm6._extra6.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm6._extra6.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm6._extra7.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm6._extra7.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm6._extra8.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm6._extra8.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm6._extra9.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm6._extra9.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm6._extra10.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm6._extra10.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm6._extra11.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm6._extra11.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm6._extra12.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm6._extra12.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm6._extra13.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm6._extra13.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm6._extra14.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm6._extra14.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm6._extra15.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm6._extra15.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm6._extra16.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm6._extra16.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm6._extra17.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm6._extra17.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm6._extra18.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm6._extra18.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm6._extra19.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm6._extra19.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm6._extra20.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm6._extra20.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm6._extra21.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm6._extra21.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm6._extra22.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm6._extra22.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm6._extra23.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm6._extra23.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - x8 = x15; - } else if (to_size_t(arg1.minorOnehot._super[7]._super)) { - // ControlDone(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:167) - // Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:184) - EQZ((arg1.state - Val(7)), - "loc(callsite( ControlDone ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :167:16) at " - "Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :184:17)))"); - // Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176) - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra0.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra1.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra2.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra3.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra4.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra4.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra5.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra5.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra6.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra6.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra7.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra7.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra8.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra8.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra9.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra9.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra10.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra10.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra11.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra11.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra12.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra12.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra13.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra13.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra14.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra14.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra15.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra15.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra16.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra16.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra17.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra17.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra18.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra18.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra19.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra19.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra20.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra20.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra21.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra21.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra22.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra22.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra23.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra23.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra24.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra24.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra25.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra25.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra26.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra26.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra27.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra27.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra28.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra28.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra29.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra29.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra30.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra30.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra31.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra31.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra32.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra32.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra33.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra33.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra34.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra34.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra35.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra35.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra36.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra36.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra37.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra37.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra38.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra38.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra39.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra39.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra40.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra40.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra41.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra41.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra42.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra42.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra43.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra43.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra44.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra44.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra45.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra45.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra46.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra46.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra47.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra47.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra48.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra48.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra49.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra49.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra50.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra50.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra51.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra51.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra52.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra52.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra53.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra53.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra54.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra54.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm7._extra55.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm7._extra55.count._super), 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)"); - x8 = x7; - } else { - assert(0 && "Reached unreachable mux arm"); - } - return x8; -} -OneHot_4_Struct exec_OneHot_4_(ExecContext& ctx, Val arg0, BoundLayout layout1) { - // OneHot(zirgen/circuit/rv32im/v2/dsl/one_hot.zir:7) - NondetRegStruct4Array x2 = - map(Val4Array{Val(0), Val(1), Val(2), Val(3)}, - LAYOUT_LOOKUP(layout1, _super), - ([&](Val4Array::value_type x3, BoundLayout x4) { - NondetRegStruct x5 = exec_NondetBitReg(ctx, isz((x3 - arg0)), x4); - return x5; - })); - // OneHot(zirgen/circuit/rv32im/v2/dsl/one_hot.zir:9) - Val x6 = (x2[0]._super + x2[1]._super); - Val x7 = ((x6 + x2[2]._super) + x2[3]._super); - EQZ((x7 - Val(1)), "OneHot(zirgen/circuit/rv32im/v2/dsl/one_hot.zir:9)"); - // OneHot(zirgen/circuit/rv32im/v2/dsl/one_hot.zir:11) - Val x8 = (x2[2]._super * Val(2)); - Val x9 = (x2[3]._super * Val(3)); - Val x10 = (x2[1]._super + x8); - EQZ(((x10 + x9) - arg0), "OneHot(zirgen/circuit/rv32im/v2/dsl/one_hot.zir:11)"); - return OneHot_4_Struct{._super = x2}; -} -ECallOutputStruct exec_MachineECall(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - Val arg2, - BoundLayout layout3) { - // MachineECall(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:26) - GetDataStruct x4 = exec_MemoryRead(ctx, arg0, arg2, LAYOUT_LOOKUP(layout3, loadInst)); - // MachineECall(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:27) - EQZ((arg1.state - Val(32)), "MachineECall(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:27)"); - // MachineECall(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:28) - EQZ(x4._super.high, "MachineECall(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:28)"); - // MachineECall(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:29) - Val x5 = (x4._super.low - Val(115)); - EQZ(x5, "MachineECall(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:29)"); - // MachineECall(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:30) - EQZ((arg1.mode - Val(1)), "MachineECall(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:30)"); - // MachineECall(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:31) - GetDataStruct x6 = - exec_MemoryRead(ctx, arg0, Val(1073725457), LAYOUT_LOOKUP(layout3, dispatchIdx)); - // MachineECall(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:32) - EQZ(x6._super.high, "MachineECall(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:32)"); - // MachineECall(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:33) - OneHot_4_Struct x7 = exec_OneHot_4_(ctx, x6._super.low, LAYOUT_LOOKUP(layout3, dispatch)); - Val x8; - if (to_size_t(x7._super[0]._super)) { - x8 = Val(9); - } else if (to_size_t(x7._super[1]._super)) { - x8 = Val(10); - } else if (to_size_t(x7._super[2]._super)) { - x8 = Val(11); - } else if (to_size_t(x7._super[3]._super)) { - x8 = Val(16); - } else { - assert(0 && "Reached unreachable mux arm"); - } - return ECallOutputStruct{.state = x8, .s0 = Val(0), .s1 = Val(0), .s2 = Val(0)}; -} -ECallOutputStruct exec_ECallTerminate(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2, - GlobalBuf global3) { - // ECallTerminate(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:43) - BoundLayout<_globalLayout> x4 = BIND_LAYOUT(kLayoutGlobal, global3); - // ECallTerminate(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:44) - EQZ((arg1.state - Val(9)), "ECallTerminate(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:44)"); - // ECallTerminate(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:45) - GetDataStruct x5 = exec_MemoryRead(ctx, arg0, Val(1073725482), LAYOUT_LOOKUP(layout2, a0)); - // ECallTerminate(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:46) - GetDataStruct x6 = exec_MemoryRead(ctx, arg0, Val(1073725483), LAYOUT_LOOKUP(layout2, a1)); - // ECallTerminate(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:47) - RegStruct x7 = exec_Reg(ctx, x5._super.low, LAYOUT_LOOKUP(x4, termA0low)); - // ECallTerminate(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:48) - RegStruct x8 = exec_Reg(ctx, x5._super.high, LAYOUT_LOOKUP(x4, termA0high)); - // ECallTerminate(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:49) - RegStruct x9 = exec_Reg(ctx, x6._super.low, LAYOUT_LOOKUP(x4, termA1low)); - // ECallTerminate(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:50) - RegStruct x10 = exec_Reg(ctx, x6._super.high, LAYOUT_LOOKUP(x4, termA1high)); - return ECallOutputStruct{.state = Val(4), .s0 = Val(0), .s1 = Val(0), .s2 = Val(0)}; -} -DecomposeLow2Struct -exec_DecomposeLow2(ExecContext& ctx, Val arg0, BoundLayout layout1) { - // DecomposeLow2(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:57) - NondetRegStruct x2 = exec_NondetReg( - ctx, (bitAnd(arg0, Val(65532)) * Val(1509949441)), LAYOUT_LOOKUP(layout1, high)); - // DecomposeLow2(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:58) - NondetRegStruct x3 = exec_NondetReg(ctx, bitAnd(arg0, Val(3)), LAYOUT_LOOKUP(layout1, low2)); - // DecomposeLow2(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:59) - OneHot_4_Struct x4 = exec_OneHot_4_(ctx, x3._super, LAYOUT_LOOKUP(layout1, low2Hot)); - // DecomposeLow2(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:60) - NondetRegStruct x5 = exec_IsZero(ctx, x2._super, LAYOUT_LOOKUP(layout1, highZero)); - // DecomposeLow2(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:61) - Val x6 = (x5._super * x4._super[0]._super); - RegStruct x7 = exec_Reg(ctx, x6, LAYOUT_LOOKUP(layout1, isZero)); - // DecomposeLow2(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:63) - Val x8 = (x4._super[1]._super + x4._super[2]._super); - return DecomposeLow2Struct{.high = x2, - .low2 = x3, - .low2Hot = x4, - .highZero = x5, - .isZero = x7, - .low2Nonzero = (x8 + x4._super[3]._super)}; -} -ECallOutputStruct exec_ECallHostReadSetup(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2) { - // ECallHostReadSetup(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:67) - EQZ((arg1.state - Val(10)), "ECallHostReadSetup(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:67)"); - // ECallHostReadSetup(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:69) - GetDataStruct x3 = exec_MemoryRead(ctx, arg0, Val(1073725450), LAYOUT_LOOKUP(layout2, fd)); - // ECallHostReadSetup(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:70) - GetDataStruct x4 = exec_MemoryRead(ctx, arg0, Val(1073725451), LAYOUT_LOOKUP(layout2, ptr)); - // ECallHostReadSetup(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:71) - GetDataStruct x5 = exec_MemoryRead(ctx, arg0, Val(1073725452), LAYOUT_LOOKUP(layout2, len)); - // ECallHostReadSetup(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:73) - EQZ(x3._super.high, "ECallHostReadSetup(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:73)"); - // ECallHostReadSetup(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:75) - EQZ(x5._super.high, "ECallHostReadSetup(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:75)"); - // HostReadPrepare(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:8) - // ECallHostReadSetup(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:77) - Val x6 = INVOKE_EXTERN(ctx, hostReadPrepare, x3._super.low, x5._super.low); - NondetRegStruct x7 = exec_NondetU16Reg(ctx, x6, LAYOUT_LOOKUP(layout2, newLen)); - // ECallHostReadSetup(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:79) - Val x8 = (x5._super.low - x7._super); - U16RegStruct x9 = exec_U16Reg(ctx, x8, LAYOUT_LOOKUP(layout2, diff)); - // ECallHostReadSetup(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:81) - MemoryWriteStruct x10 = exec_MemoryWrite(ctx, - arg0, - Val(1073725450), - ValU32Struct{.low = x7._super, .high = Val(0)}, - LAYOUT_LOOKUP(layout2, _0)); - // ECallHostReadSetup(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:83) - DecomposeLow2Struct x11 = - exec_DecomposeLow2(ctx, x4._super.low, LAYOUT_LOOKUP(layout2, ptrDecomp)); - // ECallHostReadSetup(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:84) - Val x12 = (x4._super.high * Val(16384)); - // ECallHostReadSetup(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:85) - DecomposeLow2Struct x13 = exec_DecomposeLow2(ctx, x7._super, LAYOUT_LOOKUP(layout2, lenDecomp)); - // ECallHostReadSetup(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:87) - Val x14 = (x13.highZero._super * x13.low2Nonzero); - RegStruct x15 = exec_Reg(ctx, x14, LAYOUT_LOOKUP(layout2, len123)); - // ECallHostReadSetup(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:89) - Val x16 = (x15._super._super * x11.low2Nonzero); - RegStruct x17 = exec_Reg(ctx, x16, LAYOUT_LOOKUP(layout2, uneven)); - // ECallHostReadSetup(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:93) - Val x18 = (x13.isZero._super._super * Val(32)); - // ECallHostReadSetup(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:95) - Val x19 = (Val(1) - x13.isZero._super._super); - // ECallHostReadSetup(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:97) - Val x20 = (Val(1) - x17._super._super); - // ECallHostReadSetup(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:95) - Val x21 = ((x18 + ((x19 * x17._super._super) * Val(12))) + ((x19 * x20) * Val(13))); - return ECallOutputStruct{ - .state = x21, .s0 = (x12 + x11.high._super), .s1 = x11.low2._super, .s2 = x7._super}; -} -ECallOutputStruct exec_ECallHostWrite(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2) { - // ECallHostWrite(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:102) - EQZ((arg1.state - Val(11)), "ECallHostWrite(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:102)"); - // ECallHostWrite(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:104) - GetDataStruct x3 = exec_MemoryRead(ctx, arg0, Val(1073725450), LAYOUT_LOOKUP(layout2, fd)); - // ECallHostWrite(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:105) - GetDataStruct x4 = exec_MemoryRead(ctx, arg0, Val(1073725451), LAYOUT_LOOKUP(layout2, ptr)); - // ECallHostWrite(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:106) - GetDataStruct x5 = exec_MemoryRead(ctx, arg0, Val(1073725452), LAYOUT_LOOKUP(layout2, len)); - // ECallHostWrite(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:107) - EQZ(x3._super.high, "ECallHostWrite(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:107)"); - // ECallHostWrite(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:108) - EQZ(x5._super.high, "ECallHostWrite(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:108)"); - // HostWrite(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:11) - // ECallHostWrite(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:110) - Val x6 = - INVOKE_EXTERN(ctx, hostWrite, x3._super.low, x4._super.low, x4._super.high, x5._super.low); - NondetRegStruct x7 = exec_NondetU16Reg(ctx, x6, LAYOUT_LOOKUP(layout2, newLen)); - // ECallHostWrite(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:112) - Val x8 = (x5._super.low - x7._super); - U16RegStruct x9 = exec_U16Reg(ctx, x8, LAYOUT_LOOKUP(layout2, diff)); - // ECallHostWrite(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:114) - MemoryWriteStruct x10 = exec_MemoryWrite(ctx, - arg0, - Val(1073725450), - ValU32Struct{.low = x7._super, .high = Val(0)}, - LAYOUT_LOOKUP(layout2, _0)); - return ECallOutputStruct{.state = Val(32), .s0 = Val(0), .s1 = Val(0), .s2 = Val(0)}; -} -ECallOutputStruct exec_ECallHostReadWords(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - Val arg2, - Val arg3, - BoundLayout layout4) { - // ECallHostReadWords(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:127) - EQZ((arg1.state - Val(13)), - "ECallHostReadWords(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:127)"); - // ECallHostReadWords(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:128) - DecomposeLow2Struct x5 = exec_DecomposeLow2(ctx, arg3, LAYOUT_LOOKUP(layout4, lenDecomp)); - // ECallHostReadWords(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:129) - DecomposeLow2Struct x6 = - exec_DecomposeLow2(ctx, x5.high._super, LAYOUT_LOOKUP(layout4, wordsDecomp)); - // ECallHostReadWords(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:131) - Val x7 = (x6.low2Hot._super[1]._super * x6.highZero._super); - // ECallHostReadWords(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:132) - Val x8 = (x6.low2Hot._super[2]._super * x6.highZero._super); - // ECallHostReadWords(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:133) - Val x9 = (x6.low2Hot._super[3]._super * x6.highZero._super); - // ECallHostReadWords(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:134) - Val x10 = (Val(1) - x6.highZero._super); - // ECallHostReadWords(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:136) - Val x11 = (((x7 + x8) + x9) + x10); - // ECallHostReadWords(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:137) - ECallHostReadWords__0Struct4Array x12 = - map(Val4Array{Val(0), Val(1), Val(2), Val(3)}, - LAYOUT_LOOKUP(layout4, _1), - ([&](Val4Array::value_type x13, - BoundLayout x14) { - // ECallHostReadWords(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:138) - Val x15 = (Val4Array{x7, x8, x9, x10}[to_size_t(x13)] * (arg2 + x13)); - Val x16 = (Val(1) - Val4Array{x7, x8, x9, x10}[to_size_t(x13)]); - RegStruct x17 = - exec_Reg(ctx, (x15 + (x16 * Val(1073725504))), LAYOUT_LOOKUP(x14, addr)); - // ECallHostReadWords(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:139) - MemoryWriteUnconstrainedStruct x18 = - exec_MemoryWriteUnconstrained(ctx, arg0, x17._super._super, LAYOUT_LOOKUP(x14, _0)); - return ECallHostReadWords__0Struct{}; - })); - // ECallHostReadWords(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:141) - Val x19 = (arg3 - (x11 * Val(4))); - NondetRegStruct x20 = exec_IsZero(ctx, x19, LAYOUT_LOOKUP(layout4, lenZero)); - // ECallHostReadWords(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:146) - Val x21 = (Val(1) - x20._super); - // ECallHostReadWords(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:144) - Val x22 = ((x20._super * Val(32)) + ((x21 * x5.low2Nonzero) * Val(12))); - return ECallOutputStruct{.state = (x22 + ((x21 * (Val(1) - x5.low2Nonzero)) * Val(13))), - .s0 = (arg2 + x11), - .s1 = Val(0), - .s2 = x19}; -} -InstOutputStruct exec_ECall0(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2, - GlobalBuf global3) { - // ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:156) - AddrDecomposeBitsStruct x4 = - exec_AddrDecomposeBits(ctx, arg1.pcU32, arg1.mode, LAYOUT_LOOKUP(layout2, pcAddr)); - // ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:157) - EQZ(x4.low2, "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:157)"); - // ECallOutput(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:13) - // IllegalECall(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:22) - // ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:165) - ECallOutputStruct x5 = - ECallOutputStruct{.state = Val(0), .s0 = Val(0), .s1 = Val(0), .s2 = Val(0)}; - ECallOutputStruct x6; - if (to_size_t(arg1.minorOnehot._super[0]._super)) { - // ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:159) - ECallOutputStruct x7 = - exec_MachineECall(ctx, arg0, arg1, x4._super, LAYOUT_LOOKUP(layout2, output.arm0._super)); - // ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158) - STORE(LAYOUT_LOOKUP(layout2, output.arm0._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm0._extra0.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm0._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm0._extra1.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm0._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm0._extra2.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm0._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm0._extra3.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm0._extra4.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm0._extra4.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm0._extra5.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm0._extra5.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm0._extra6.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm0._extra6.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm0._extra7.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm0._extra7.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - x6 = x7; - } else if (to_size_t(arg1.minorOnehot._super[1]._super)) { - // ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:160) - ECallOutputStruct x8 = - exec_ECallTerminate(ctx, arg0, arg1, LAYOUT_LOOKUP(layout2, output.arm1._super), global3); - // ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158) - STORE(LAYOUT_LOOKUP(layout2, output.arm1._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm1._extra0.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm1._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm1._extra1.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm1._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm1._extra2.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm1._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm1._extra3.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm1._extra4.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm1._extra4.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm1._extra5.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm1._extra5.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm1._extra6.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm1._extra6.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm1._extra7.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm1._extra7.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - x6 = x8; - } else if (to_size_t(arg1.minorOnehot._super[2]._super)) { - // ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:161) - ECallOutputStruct x9 = - exec_ECallHostReadSetup(ctx, arg0, arg1, LAYOUT_LOOKUP(layout2, output.arm2)); - x6 = x9; - } else if (to_size_t(arg1.minorOnehot._super[3]._super)) { - // ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:162) - ECallOutputStruct x10 = - exec_ECallHostWrite(ctx, arg0, arg1, LAYOUT_LOOKUP(layout2, output.arm3)); - x6 = x10; - } else if (to_size_t(arg1.minorOnehot._super[4]._super)) { - // ECallHostReadBytes(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:121) - // ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:163) - EQZ((arg1.state - Val(12)), - "loc(callsite( ECallHostReadBytes ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :121:16) " - "at ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :163:24)))"); - // ECallHostReadBytes(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:122) - EQZ(Val(2013265920), - "loc(callsite( ECallHostReadBytes ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :122:6) at " - " ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :163:24)))"); - // ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158) - STORE(LAYOUT_LOOKUP(layout2, output.arm4._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm4._extra0.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm4._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm4._extra1.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm4._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm4._extra2.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm4._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm4._extra3.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm4._extra4.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm4._extra4.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm4._extra5.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm4._extra5.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm4._extra6.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm4._extra6.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm4._extra7.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm4._extra7.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm4._extra8.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm4._extra8.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm4._extra9.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm4._extra9.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm4._extra10.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm4._extra10.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm4._extra11.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm4._extra11.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm4._extra12.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm4._extra12.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm4._extra13.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm4._extra13.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - x6 = ECallOutputStruct{.state = Val(16), .s0 = Val(0), .s1 = Val(0), .s2 = Val(0)}; - } else if (to_size_t(arg1.minorOnehot._super[5]._super)) { - // ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:164) - RegStruct x11 = back_Reg(ctx, 1, LAYOUT_LOOKUP(layout2, s0)); - RegStruct x12 = back_Reg(ctx, 1, LAYOUT_LOOKUP(layout2, s2)); - ECallOutputStruct x13 = exec_ECallHostReadWords(ctx, - arg0, - arg1, - x11._super._super, - x12._super._super, - LAYOUT_LOOKUP(layout2, output.arm5._super)); - // ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158) - STORE(LAYOUT_LOOKUP(layout2, output.arm5._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm5._extra0.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm5._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm5._extra1.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - x6 = x13; - } else if (to_size_t(arg1.minorOnehot._super[6]._super)) { - // IllegalECall(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:21) - // ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:165) - EQZ(Val(2013265920), - "loc(callsite( IllegalECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :21:6) at " - "ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :165:18)))"); - // ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158) - STORE(LAYOUT_LOOKUP(layout2, output.arm6._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm6._extra0.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm6._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm6._extra1.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm6._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm6._extra2.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm6._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm6._extra3.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm6._extra4.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm6._extra4.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm6._extra5.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm6._extra5.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm6._extra6.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm6._extra6.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm6._extra7.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm6._extra7.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm6._extra8.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm6._extra8.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm6._extra9.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm6._extra9.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm6._extra10.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm6._extra10.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm6._extra11.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm6._extra11.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm6._extra12.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm6._extra12.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm6._extra13.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm6._extra13.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - x6 = x5; - } else if (to_size_t(arg1.minorOnehot._super[7]._super)) { - // IllegalECall(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:21) - // ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:166) - EQZ(Val(2013265920), - "loc(callsite( IllegalECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :21:6) at " - "ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :166:18)))"); - // ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158) - STORE(LAYOUT_LOOKUP(layout2, output.arm7._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm7._extra0.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm7._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm7._extra1.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm7._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm7._extra2.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm7._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm7._extra3.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm7._extra4.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm7._extra4.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm7._extra5.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm7._extra5.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm7._extra6.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm7._extra6.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm7._extra7.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm7._extra7.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm7._extra8.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm7._extra8.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm7._extra9.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm7._extra9.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm7._extra10.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm7._extra10.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm7._extra11.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm7._extra11.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm7._extra12.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm7._extra12.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - STORE(LAYOUT_LOOKUP(layout2, output.arm7._extra13.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, output.arm7._extra13.count._super), 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)"); - x6 = x5; - } else { - assert(0 && "Reached unreachable mux arm"); - } - // ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:168) - RegStruct x14 = exec_Reg(ctx, x6.s0, LAYOUT_LOOKUP(layout2, s0)); - // ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:169) - RegStruct x15 = exec_Reg(ctx, x6.s1, LAYOUT_LOOKUP(layout2, s1)); - // ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:170) - RegStruct x16 = exec_Reg(ctx, x6.s2, LAYOUT_LOOKUP(layout2, s2)); - // ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:171) - NondetRegStruct x17 = exec_IsZero(ctx, (x6.state - Val(32)), LAYOUT_LOOKUP(layout2, isDecode)); - // ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:172) - NondetRegStruct x18 = exec_IsZero(ctx, (x6.state - Val(16)), LAYOUT_LOOKUP(layout2, isP2Entry)); - // ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:173) - Val x19 = ((x17._super + x18._super) * Val(4)); - // AddU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:27) - Val x20 = (arg1.pcU32.low + x19); - NormalizeU32Struct x21 = - exec_NormalizeU32(ctx, - DenormedValU32Struct{.low = x20, .high = arg1.pcU32.high}, - LAYOUT_LOOKUP(layout2, addPC)); - // GetDiffCount(zirgen/circuit/rv32im/v2/dsl/mem.zir:22) - // ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:175) - Val x22 = INVOKE_EXTERN(ctx, getDiffCount, arg0._super._super); - CycleArgStruct x23 = - exec_CycleArg(ctx, neg_0(x22), arg0._super._super, LAYOUT_LOOKUP(layout2, arg)); - // ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:177) - Val x24 = (x23.cycle._super - arg0._super._super); - EQZ(x24, "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:177)"); - return InstOutputStruct{.newPc = x21._super, .newState = x6.state, .newMode = Val(1)}; -} -RegStruct exec_SBox(ExecContext& ctx, Val arg0, BoundLayout layout1) { - // SBox(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:25) - RegStruct x2 = exec_Reg(ctx, ((arg0 * arg0) * arg0), LAYOUT_LOOKUP(layout1, cubed)); - // SBox(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:26) - Val x3 = (x2._super._super * x2._super._super); - RegStruct x4 = exec_Reg(ctx, (x3 * arg0), LAYOUT_LOOKUP(layout1, _super)); - return x4; -} -MultiplyByMIntStruct exec_DoIntRound(ExecContext& ctx, - Val24Array arg0, - Val arg1, - BoundLayout layout2) { - // DoIntRound(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:32) - RegStruct x3 = exec_SBox(ctx, (arg0[0] + arg1), LAYOUT_LOOKUP(layout2, sbox)); - // MultiplyByMInt(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:13) - // DoIntRound(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:34) - Val x4 = (x3._super._super + arg0[1]); - Val x5 = (((x4 + arg0[2]) + arg0[3]) + arg0[4]); - Val x6 = (((x5 + arg0[5]) + arg0[6]) + arg0[7]); - Val x7 = (((x6 + arg0[8]) + arg0[9]) + arg0[10]); - Val x8 = (((x7 + arg0[11]) + arg0[12]) + arg0[13]); - Val x9 = (((x8 + arg0[14]) + arg0[15]) + arg0[16]); - Val x10 = (((x9 + arg0[17]) + arg0[18]) + arg0[19]); - Val x11 = (((x10 + arg0[20]) + arg0[21]) + arg0[22]); - Val x12 = (x11 + arg0[23]); - // MultiplyByMInt(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:14) - Val x13 = (x3._super._super * Val(1083257840)); - MultiplyByMInt_Super_SuperStruct24Array x14 = MultiplyByMInt_Super_SuperStruct24Array{ - MultiplyByMInt_Super_SuperStruct{._super = (x12 + x13)}, - MultiplyByMInt_Super_SuperStruct{._super = (x12 + (arg0[1] * Val(375892129)))}, - MultiplyByMInt_Super_SuperStruct{._super = (x12 + (arg0[2] * Val(111593398)))}, - MultiplyByMInt_Super_SuperStruct{._super = (x12 + (arg0[3] * Val(1867716110)))}, - MultiplyByMInt_Super_SuperStruct{._super = (x12 + (arg0[4] * Val(658182609)))}, - MultiplyByMInt_Super_SuperStruct{._super = (x12 + (arg0[5] * Val(51866717)))}, - MultiplyByMInt_Super_SuperStruct{._super = (x12 + (arg0[6] * Val(1928969209)))}, - MultiplyByMInt_Super_SuperStruct{._super = (x12 + (arg0[7] * Val(1942928017)))}, - MultiplyByMInt_Super_SuperStruct{._super = (x12 + (arg0[8] * Val(1558116381)))}, - MultiplyByMInt_Super_SuperStruct{._super = (x12 + (arg0[9] * Val(20525701)))}, - MultiplyByMInt_Super_SuperStruct{._super = (x12 + (arg0[10] * Val(1188752902)))}, - MultiplyByMInt_Super_SuperStruct{._super = (x12 + (arg0[11] * Val(106789798)))}, - MultiplyByMInt_Super_SuperStruct{._super = (x12 + (arg0[12] * Val(1389833583)))}, - MultiplyByMInt_Super_SuperStruct{._super = (x12 + (arg0[13] * Val(98371040)))}, - MultiplyByMInt_Super_SuperStruct{._super = (x12 + (arg0[14] * Val(1001081699)))}, - MultiplyByMInt_Super_SuperStruct{._super = (x12 + (arg0[15] * Val(1792686146)))}, - MultiplyByMInt_Super_SuperStruct{._super = (x12 + (arg0[16] * Val(801504236)))}, - MultiplyByMInt_Super_SuperStruct{._super = (x12 + (arg0[17] * Val(1997365680)))}, - MultiplyByMInt_Super_SuperStruct{._super = (x12 + (arg0[18] * Val(1461037801)))}, - MultiplyByMInt_Super_SuperStruct{._super = (x12 + (arg0[19] * Val(65998480)))}, - MultiplyByMInt_Super_SuperStruct{._super = (x12 + (arg0[20] * Val(1974912880)))}, - MultiplyByMInt_Super_SuperStruct{._super = (x12 + (arg0[21] * Val(606789471)))}, - MultiplyByMInt_Super_SuperStruct{._super = (x12 + (arg0[22] * Val(13683276)))}, - MultiplyByMInt_Super_SuperStruct{._super = (x12 + (arg0[23] * Val(918610824)))}}; - return MultiplyByMIntStruct{._super = x14}; -} -DoIntRoundsStruct -exec_DoIntRounds(ExecContext& ctx, Val24Array arg0, BoundLayout layout1) { - // DoIntRounds(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:38) - DoIntRounds__0_SuperStruct21Array x2 = - DoIntRounds__0_SuperStruct21Array{DoIntRounds__0_SuperStruct{._super = Val(497520322)}, - DoIntRounds__0_SuperStruct{._super = Val(1930103076)}, - DoIntRounds__0_SuperStruct{._super = Val(1052077299)}, - DoIntRounds__0_SuperStruct{._super = Val(1540960371)}, - DoIntRounds__0_SuperStruct{._super = Val(924863639)}, - DoIntRounds__0_SuperStruct{._super = Val(1365519753)}, - DoIntRounds__0_SuperStruct{._super = Val(1726563304)}, - DoIntRounds__0_SuperStruct{._super = Val(440300254)}, - DoIntRounds__0_SuperStruct{._super = Val(1891545577)}, - DoIntRounds__0_SuperStruct{._super = Val(822033215)}, - DoIntRounds__0_SuperStruct{._super = Val(1111544260)}, - DoIntRounds__0_SuperStruct{._super = Val(308575117)}, - DoIntRounds__0_SuperStruct{._super = Val(1708681573)}, - DoIntRounds__0_SuperStruct{._super = Val(1240419708)}, - DoIntRounds__0_SuperStruct{._super = Val(1199068823)}, - DoIntRounds__0_SuperStruct{._super = Val(1186174623)}, - DoIntRounds__0_SuperStruct{._super = Val(1551596046)}, - DoIntRounds__0_SuperStruct{._super = Val(1886977120)}, - DoIntRounds__0_SuperStruct{._super = Val(1327682690)}, - DoIntRounds__0_SuperStruct{._super = Val(1210751726)}, - DoIntRounds__0_SuperStruct{._super = Val(1810596765)}}; - Val24Array x3 = reduce( - x2, - arg0, - LAYOUT_LOOKUP(layout1, _super), - ([&](Val24Array x4, - DoIntRounds__0_SuperStruct21Array::value_type x5, - BoundLayout x6) { - MultiplyByMIntStruct x7 = exec_DoIntRound(ctx, x4, x5._super, x6); - Val24Array x8 = Val24Array{ - x7._super[0]._super, x7._super[1]._super, x7._super[2]._super, x7._super[3]._super, - x7._super[4]._super, x7._super[5]._super, x7._super[6]._super, x7._super[7]._super, - x7._super[8]._super, x7._super[9]._super, x7._super[10]._super, x7._super[11]._super, - x7._super[12]._super, x7._super[13]._super, x7._super[14]._super, x7._super[15]._super, - x7._super[16]._super, x7._super[17]._super, x7._super[18]._super, x7._super[19]._super, - x7._super[20]._super, x7._super[21]._super, x7._super[22]._super, x7._super[23]._super}; - return x8; - })); - return DoIntRoundsStruct{._super = x3}; -} -MultiplyByMExtStruct exec_DoExtRound(ExecContext& ctx, - Val24Array arg0, - Val24Array arg1, - BoundLayout layout2) { - // DoExtRound(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:103) - RegStruct24Array x3 = - map(Val24Array{Val(0), Val(1), Val(2), Val(3), Val(4), Val(5), Val(6), Val(7), - Val(8), Val(9), Val(10), Val(11), Val(12), Val(13), Val(14), Val(15), - Val(16), Val(17), Val(18), Val(19), Val(20), Val(21), Val(22), Val(23)}, - LAYOUT_LOOKUP(layout2, _1), - ([&](Val24Array::value_type x4, BoundLayout x5) { - RegStruct x6 = exec_SBox(ctx, (arg0[to_size_t(x4)] + arg1[to_size_t(x4)]), x5); - return x6; - })); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:42) - // MultiplyByMExt(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:61) - Val x7 = (x3[0]._super._super + x3[1]._super._super); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:43) - Val x8 = (x3[2]._super._super + x3[3]._super._super); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:44) - Val x9 = (x3[1]._super._super * Val(2)); - Val x10 = (x9 + x8); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:45) - Val x11 = (x3[3]._super._super * Val(2)); - Val x12 = (x11 + x7); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:46) - Val x13 = ((x8 * Val(4)) + x12); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:47) - Val x14 = ((x7 * Val(4)) + x10); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:48) - Val x15 = (x12 + x14); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:49) - Val x16 = (x10 + x13); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:42) - Val x17 = (x3[4]._super._super + x3[5]._super._super); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:43) - Val x18 = (x3[6]._super._super + x3[7]._super._super); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:44) - Val x19 = (x3[5]._super._super * Val(2)); - Val x20 = (x19 + x18); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:45) - Val x21 = (x3[7]._super._super * Val(2)); - Val x22 = (x21 + x17); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:46) - Val x23 = ((x18 * Val(4)) + x22); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:47) - Val x24 = ((x17 * Val(4)) + x20); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:48) - Val x25 = (x22 + x24); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:49) - Val x26 = (x20 + x23); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:42) - Val x27 = (x3[8]._super._super + x3[9]._super._super); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:43) - Val x28 = (x3[10]._super._super + x3[11]._super._super); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:44) - Val x29 = (x3[9]._super._super * Val(2)); - Val x30 = (x29 + x28); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:45) - Val x31 = (x3[11]._super._super * Val(2)); - Val x32 = (x31 + x27); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:46) - Val x33 = ((x28 * Val(4)) + x32); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:47) - Val x34 = ((x27 * Val(4)) + x30); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:48) - Val x35 = (x32 + x34); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:49) - Val x36 = (x30 + x33); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:42) - Val x37 = (x3[12]._super._super + x3[13]._super._super); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:43) - Val x38 = (x3[14]._super._super + x3[15]._super._super); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:44) - Val x39 = (x3[13]._super._super * Val(2)); - Val x40 = (x39 + x38); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:45) - Val x41 = (x3[15]._super._super * Val(2)); - Val x42 = (x41 + x37); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:46) - Val x43 = ((x38 * Val(4)) + x42); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:47) - Val x44 = ((x37 * Val(4)) + x40); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:48) - Val x45 = (x42 + x44); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:49) - Val x46 = (x40 + x43); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:42) - Val x47 = (x3[16]._super._super + x3[17]._super._super); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:43) - Val x48 = (x3[18]._super._super + x3[19]._super._super); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:44) - Val x49 = (x3[17]._super._super * Val(2)); - Val x50 = (x49 + x48); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:45) - Val x51 = (x3[19]._super._super * Val(2)); - Val x52 = (x51 + x47); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:46) - Val x53 = ((x48 * Val(4)) + x52); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:47) - Val x54 = ((x47 * Val(4)) + x50); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:48) - Val x55 = (x52 + x54); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:49) - Val x56 = (x50 + x53); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:42) - Val x57 = (x3[20]._super._super + x3[21]._super._super); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:43) - Val x58 = (x3[22]._super._super + x3[23]._super._super); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:44) - Val x59 = (x3[21]._super._super * Val(2)); - Val x60 = (x59 + x58); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:45) - Val x61 = (x3[23]._super._super * Val(2)); - Val x62 = (x61 + x57); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:46) - Val x63 = ((x58 * Val(4)) + x62); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:47) - Val x64 = ((x57 * Val(4)) + x60); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:48) - Val x65 = (x62 + x64); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:49) - Val x66 = (x60 + x63); - // ReduceVec4(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:54) - // MultiplyByMExt(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:64) - Val x67 = (((x15 + x25) + x35) + x45); - Val x68 = (((x14 + x24) + x34) + x44); - Val x69 = (((x16 + x26) + x36) + x46); - Val x70 = (((x13 + x23) + x33) + x43); - Val x71 = ((x67 + x55) + x65); - Val x72 = ((x68 + x54) + x64); - Val x73 = ((x69 + x56) + x66); - Val x74 = ((x70 + x53) + x63); - // MultiplyByMExt(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:65) - MultiplyByMExt_Super_SuperStruct24Array x75 = MultiplyByMExt_Super_SuperStruct24Array{ - MultiplyByMExt_Super_SuperStruct{._super = (x15 + x71)}, - MultiplyByMExt_Super_SuperStruct{._super = (x14 + x72)}, - MultiplyByMExt_Super_SuperStruct{._super = (x16 + x73)}, - MultiplyByMExt_Super_SuperStruct{._super = (x13 + x74)}, - MultiplyByMExt_Super_SuperStruct{._super = (x25 + x71)}, - MultiplyByMExt_Super_SuperStruct{._super = (x24 + x72)}, - MultiplyByMExt_Super_SuperStruct{._super = (x26 + x73)}, - MultiplyByMExt_Super_SuperStruct{._super = (x23 + x74)}, - MultiplyByMExt_Super_SuperStruct{._super = (x35 + x71)}, - MultiplyByMExt_Super_SuperStruct{._super = (x34 + x72)}, - MultiplyByMExt_Super_SuperStruct{._super = (x36 + x73)}, - MultiplyByMExt_Super_SuperStruct{._super = (x33 + x74)}, - MultiplyByMExt_Super_SuperStruct{._super = (x45 + x71)}, - MultiplyByMExt_Super_SuperStruct{._super = (x44 + x72)}, - MultiplyByMExt_Super_SuperStruct{._super = (x46 + x73)}, - MultiplyByMExt_Super_SuperStruct{._super = (x43 + x74)}, - MultiplyByMExt_Super_SuperStruct{._super = (x55 + x71)}, - MultiplyByMExt_Super_SuperStruct{._super = (x54 + x72)}, - MultiplyByMExt_Super_SuperStruct{._super = (x56 + x73)}, - MultiplyByMExt_Super_SuperStruct{._super = (x53 + x74)}, - MultiplyByMExt_Super_SuperStruct{._super = (x65 + x71)}, - MultiplyByMExt_Super_SuperStruct{._super = (x64 + x72)}, - MultiplyByMExt_Super_SuperStruct{._super = (x66 + x73)}, - MultiplyByMExt_Super_SuperStruct{._super = (x63 + x74)}}; - return MultiplyByMExtStruct{._super = x75}; -} -MultiplyByMExtStruct exec_DoExtRoundByIdx(ExecContext& ctx, - Val24Array arg0, - Val arg1, - BoundLayout layout2) { - // DoExtRoundByIdx(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:115) - OneHot_8_Struct x3 = exec_OneHot_8_(ctx, arg1, LAYOUT_LOOKUP(layout2, idxHot)); - // MultBy(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:111) - // DoExtRoundByIdx(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:119) - Val x4 = (x3.bits[0]._super * Val(262278199)); - Val x5 = (x3.bits[0]._super * Val(127253399)); - Val x6 = (x3.bits[0]._super * Val(314968988)); - Val x7 = (x3.bits[0]._super * Val(246143118)); - Val x8 = (x3.bits[0]._super * Val(157582794)); - Val x9 = (x3.bits[0]._super * Val(118043943)); - Val x10 = (x3.bits[0]._super * Val(454905424)); - Val x11 = (x3.bits[0]._super * Val(815798990)); - Val x12 = (x3.bits[0]._super * Val(1004040026)); - Val x13 = (x3.bits[0]._super * Val(1773108264)); - Val x14 = (x3.bits[0]._super * Val(1066694495)); - Val x15 = (x3.bits[0]._super * Val(1930780904)); - Val x16 = (x3.bits[0]._super * Val(1180307149)); - Val x17 = (x3.bits[0]._super * Val(1464793095)); - Val x18 = (x3.bits[0]._super * Val(1660766320)); - Val x19 = (x3.bits[0]._super * Val(1389166148)); - Val x20 = (x3.bits[0]._super * Val(343354132)); - Val x21 = (x3.bits[0]._super * Val(1307439985)); - Val x22 = (x3.bits[0]._super * Val(638242172)); - Val x23 = (x3.bits[0]._super * Val(525458520)); - Val x24 = (x3.bits[0]._super * Val(1964135730)); - Val x25 = (x3.bits[0]._super * Val(1751797115)); - Val x26 = (x3.bits[0]._super * Val(1421525369)); - Val x27 = (x3.bits[0]._super * Val(831813382)); - Val x28 = (x3.bits[1]._super * Val(695835963)); - Val x29 = (x3.bits[1]._super * Val(1845603984)); - Val x30 = (x3.bits[1]._super * Val(540703332)); - Val x31 = (x3.bits[1]._super * Val(1333667262)); - Val x32 = (x3.bits[1]._super * Val(1917861751)); - Val x33 = (x3.bits[1]._super * Val(1170029417)); - Val x34 = (x3.bits[1]._super * Val(1989924532)); - Val x35 = (x3.bits[1]._super * Val(1518763784)); - Val x36 = (x3.bits[1]._super * Val(1339793538)); - Val x37 = (x3.bits[1]._super * Val(622609176)); - Val x38 = (x3.bits[1]._super * Val(686842369)); - Val x39 = (x3.bits[1]._super * Val(1737016378)); - Val x40 = (x3.bits[1]._super * Val(1282239129)); - Val x41 = (x3.bits[1]._super * Val(897025192)); - Val x42 = (x3.bits[1]._super * Val(716894289)); - Val x43 = (x3.bits[1]._super * Val(1997503974)); - Val x44 = (x3.bits[1]._super * Val(395622276)); - Val x45 = (x3.bits[1]._super * Val(1201063290)); - Val x46 = (x3.bits[1]._super * Val(1917549072)); - Val x47 = (x3.bits[1]._super * Val(1150912935)); - Val x48 = (x3.bits[1]._super * Val(1687379185)); - Val x49 = (x3.bits[1]._super * Val(1507936940)); - Val x50 = (x3.bits[1]._super * Val(241306552)); - Val x51 = (x3.bits[1]._super * Val(989176635)); - Val x52 = (x3.bits[2]._super * Val(1147522062)); - Val x53 = (x3.bits[2]._super * Val(27129487)); - Val x54 = (x3.bits[2]._super * Val(1257820264)); - Val x55 = (x3.bits[2]._super * Val(142102402)); - Val x56 = (x3.bits[2]._super * Val(217046702)); - Val x57 = (x3.bits[2]._super * Val(1664590951)); - Val x58 = (x3.bits[2]._super * Val(855276054)); - Val x59 = (x3.bits[2]._super * Val(1215259350)); - Val x60 = (x3.bits[2]._super * Val(946500736)); - Val x61 = (x3.bits[2]._super * Val(552696906)); - Val x62 = (x3.bits[2]._super * Val(1424297384)); - Val x63 = (x3.bits[2]._super * Val(538103555)); - Val x64 = (x3.bits[2]._super * Val(1608853840)); - Val x65 = (x3.bits[2]._super * Val(162510541)); - Val x66 = (x3.bits[2]._super * Val(623051854)); - Val x67 = (x3.bits[2]._super * Val(1549062383)); - Val x68 = (x3.bits[2]._super * Val(1908416316)); - Val x69 = (x3.bits[2]._super * Val(1622328571)); - Val x70 = (x3.bits[2]._super * Val(1079030649)); - Val x71 = (x3.bits[2]._super * Val(1584033957)); - Val x72 = (x3.bits[2]._super * Val(1099252725)); - Val x73 = (x3.bits[2]._super * Val(1910423126)); - Val x74 = (x3.bits[2]._super * Val(447555988)); - Val x75 = (x3.bits[2]._super * Val(862495875)); - Val x76 = (x3.bits[3]._super * Val(128479034)); - Val x77 = (x3.bits[3]._super * Val(1587822577)); - Val x78 = (x3.bits[3]._super * Val(608401422)); - Val x79 = (x3.bits[3]._super * Val(1290028279)); - Val x80 = (x3.bits[3]._super * Val(342857858)); - Val x81 = (x3.bits[3]._super * Val(825405577)); - Val x82 = (x3.bits[3]._super * Val(427731030)); - Val x83 = (x3.bits[3]._super * Val(1718628547)); - Val x84 = (x3.bits[3]._super * Val(588764636)); - Val x85 = (x3.bits[3]._super * Val(204228775)); - Val x86 = (x3.bits[3]._super * Val(1454563174)); - Val x87 = (x3.bits[3]._super * Val(1740472809)); - Val x88 = (x3.bits[3]._super * Val(1338899225)); - Val x89 = (x3.bits[3]._super * Val(1269493554)); - Val x90 = (x3.bits[3]._super * Val(53007114)); - Val x91 = (x3.bits[3]._super * Val(1647670797)); - Val x92 = (x3.bits[3]._super * Val(306391314)); - Val x93 = (x3.bits[3]._super * Val(172614232)); - Val x94 = (x3.bits[3]._super * Val(51256176)); - Val x95 = (x3.bits[3]._super * Val(1221257987)); - Val x96 = (x3.bits[3]._super * Val(1239734761)); - Val x97 = (x3.bits[3]._super * Val(273790406)); - Val x98 = (x3.bits[3]._super * Val(1781980094)); - Val x99 = (x3.bits[3]._super * Val(1291790245)); - Val x100 = (x3.bits[4]._super * Val(53041581)); - Val x101 = (x3.bits[4]._super * Val(723038058)); - Val x102 = (x3.bits[4]._super * Val(1439947916)); - Val x103 = (x3.bits[4]._super * Val(1136469704)); - Val x104 = (x3.bits[4]._super * Val(205609311)); - Val x105 = (x3.bits[4]._super * Val(1883820770)); - Val x106 = (x3.bits[4]._super * Val(14387587)); - Val x107 = (x3.bits[4]._super * Val(720724951)); - Val x108 = (x3.bits[4]._super * Val(1854174607)); - Val x109 = (x3.bits[4]._super * Val(1629316321)); - Val x110 = (x3.bits[4]._super * Val(530151394)); - Val x111 = (x3.bits[4]._super * Val(1679178250)); - Val x112 = (x3.bits[4]._super * Val(1549779579)); - Val x113 = (x3.bits[4]._super * Val(48375137)); - Val x114 = (x3.bits[4]._super * Val(976057819)); - Val x115 = (x3.bits[4]._super * Val(463976218)); - Val x116 = (x3.bits[4]._super * Val(875839332)); - Val x117 = (x3.bits[4]._super * Val(1946596189)); - Val x118 = (x3.bits[4]._super * Val(434078361)); - Val x119 = (x3.bits[4]._super * Val(1878280202)); - Val x120 = (x3.bits[4]._super * Val(1363837384)); - Val x121 = (x3.bits[4]._super * Val(1470845646)); - Val x122 = (x3.bits[4]._super * Val(1792450386)); - Val x123 = (x3.bits[4]._super * Val(1040977421)); - Val x124 = (x3.bits[5]._super * Val(1209164052)); - Val x125 = (x3.bits[5]._super * Val(714957516)); - Val x126 = (x3.bits[5]._super * Val(390340387)); - Val x127 = (x3.bits[5]._super * Val(1213686459)); - Val x128 = (x3.bits[5]._super * Val(790726260)); - Val x129 = (x3.bits[5]._super * Val(117294666)); - Val x130 = (x3.bits[5]._super * Val(140621810)); - Val x131 = (x3.bits[5]._super * Val(993455846)); - Val x132 = (x3.bits[5]._super * Val(1889603648)); - Val x133 = (x3.bits[5]._super * Val(78845751)); - Val x134 = (x3.bits[5]._super * Val(925018226)); - Val x135 = (x3.bits[5]._super * Val(708123747)); - Val x136 = (x3.bits[5]._super * Val(1647665372)); - Val x137 = (x3.bits[5]._super * Val(1649953458)); - Val x138 = (x3.bits[5]._super * Val(942439428)); - Val x139 = (x3.bits[5]._super * Val(1006235079)); - Val x140 = (x3.bits[5]._super * Val(238616145)); - Val x141 = (x3.bits[5]._super * Val(930036496)); - Val x142 = (x3.bits[5]._super * Val(1401020792)); - Val x143 = (x3.bits[5]._super * Val(989618631)); - Val x144 = (x3.bits[5]._super * Val(1545325389)); - Val x145 = (x3.bits[5]._super * Val(1715719711)); - Val x146 = (x3.bits[5]._super * Val(755691969)); - Val x147 = (x3.bits[5]._super * Val(150307788)); - Val x148 = (x3.bits[6]._super * Val(1567618575)); - Val x149 = (x3.bits[6]._super * Val(1663353317)); - Val x150 = (x3.bits[6]._super * Val(1950429111)); - Val x151 = (x3.bits[6]._super * Val(1891637550)); - Val x152 = (x3.bits[6]._super * Val(192082241)); - Val x153 = (x3.bits[6]._super * Val(1080533265)); - Val x154 = (x3.bits[6]._super * Val(1463323727)); - Val x155 = (x3.bits[6]._super * Val(890243564)); - Val x156 = (x3.bits[6]._super * Val(158646617)); - Val x157 = (x3.bits[6]._super * Val(1402624179)); - Val x158 = (x3.bits[6]._super * Val(59510015)); - Val x159 = (x3.bits[6]._super * Val(1198261138)); - Val x160 = (x3.bits[6]._super * Val(1065075039)); - Val x161 = (x3.bits[6]._super * Val(1150410028)); - Val x162 = (x3.bits[6]._super * Val(1293938517)); - Val x163 = (x3.bits[6]._super * Val(76770019)); - Val x164 = (x3.bits[6]._super * Val(1478577620)); - Val x165 = (x3.bits[6]._super * Val(1748789933)); - Val x166 = (x3.bits[6]._super * Val(457372011)); - Val x167 = (x3.bits[6]._super * Val(1841795381)); - Val x168 = (x3.bits[6]._super * Val(760115692)); - Val x169 = (x3.bits[6]._super * Val(1042892522)); - Val x170 = (x3.bits[6]._super * Val(1507649755)); - Val x171 = (x3.bits[6]._super * Val(1827572010)); - Val x172 = (x3.bits[7]._super * Val(1206940496)); - Val x173 = (x3.bits[7]._super * Val(1896271507)); - Val x174 = (x3.bits[7]._super * Val(1003792297)); - Val x175 = (x3.bits[7]._super * Val(738091882)); - Val x176 = (x3.bits[7]._super * Val(1124078057)); - Val x177 = (x3.bits[7]._super * Val(1889898)); - Val x178 = (x3.bits[7]._super * Val(813674331)); - Val x179 = (x3.bits[7]._super * Val(228520958)); - Val x180 = (x3.bits[7]._super * Val(1832911930)); - Val x181 = (x3.bits[7]._super * Val(781141772)); - Val x182 = (x3.bits[7]._super * Val(459826664)); - Val x183 = (x3.bits[7]._super * Val(202271745)); - Val x184 = (x3.bits[7]._super * Val(1296144415)); - Val x185 = (x3.bits[7]._super * Val(1111203133)); - Val x186 = (x3.bits[7]._super * Val(1090783436)); - Val x187 = (x3.bits[7]._super * Val(641665156)); - Val x188 = (x3.bits[7]._super * Val(1393671120)); - Val x189 = (x3.bits[7]._super * Val(1303271640)); - Val x190 = (x3.bits[7]._super * Val(809508074)); - Val x191 = (x3.bits[7]._super * Val(162506101)); - Val x192 = (x3.bits[7]._super * Val(1262312258)); - Val x193 = (x3.bits[7]._super * Val(1672219447)); - Val x194 = (x3.bits[7]._super * Val(1608891156)); - Val x195 = (x3.bits[7]._super * Val(1380248020)); - // AddConsts(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:107) - // DoExtRoundByIdx(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:118) - Val x196 = (((x4 + x28) + x52) + x76); - Val x197 = (((x5 + x29) + x53) + x77); - Val x198 = (((x6 + x30) + x54) + x78); - Val x199 = (((x7 + x31) + x55) + x79); - Val x200 = (((x8 + x32) + x56) + x80); - Val x201 = (((x9 + x33) + x57) + x81); - Val x202 = (((x10 + x34) + x58) + x82); - Val x203 = (((x11 + x35) + x59) + x83); - Val x204 = (((x12 + x36) + x60) + x84); - Val x205 = (((x13 + x37) + x61) + x85); - Val x206 = (((x14 + x38) + x62) + x86); - Val x207 = (((x15 + x39) + x63) + x87); - Val x208 = (((x16 + x40) + x64) + x88); - Val x209 = (((x17 + x41) + x65) + x89); - Val x210 = (((x18 + x42) + x66) + x90); - Val x211 = (((x19 + x43) + x67) + x91); - Val x212 = (((x20 + x44) + x68) + x92); - Val x213 = (((x21 + x45) + x69) + x93); - Val x214 = (((x22 + x46) + x70) + x94); - Val x215 = (((x23 + x47) + x71) + x95); - Val x216 = (((x24 + x48) + x72) + x96); - Val x217 = (((x25 + x49) + x73) + x97); - Val x218 = (((x26 + x50) + x74) + x98); - Val x219 = (((x27 + x51) + x75) + x99); - Val x220 = (((x196 + x100) + x124) + x148); - Val x221 = (((x197 + x101) + x125) + x149); - Val x222 = (((x198 + x102) + x126) + x150); - Val x223 = (((x199 + x103) + x127) + x151); - Val x224 = (((x200 + x104) + x128) + x152); - Val x225 = (((x201 + x105) + x129) + x153); - Val x226 = (((x202 + x106) + x130) + x154); - Val x227 = (((x203 + x107) + x131) + x155); - Val x228 = (((x204 + x108) + x132) + x156); - Val x229 = (((x205 + x109) + x133) + x157); - Val x230 = (((x206 + x110) + x134) + x158); - Val x231 = (((x207 + x111) + x135) + x159); - Val x232 = (((x208 + x112) + x136) + x160); - Val x233 = (((x209 + x113) + x137) + x161); - Val x234 = (((x210 + x114) + x138) + x162); - Val x235 = (((x211 + x115) + x139) + x163); - Val x236 = (((x212 + x116) + x140) + x164); - Val x237 = (((x213 + x117) + x141) + x165); - Val x238 = (((x214 + x118) + x142) + x166); - Val x239 = (((x215 + x119) + x143) + x167); - Val x240 = (((x216 + x120) + x144) + x168); - Val x241 = (((x217 + x121) + x145) + x169); - Val x242 = (((x218 + x122) + x146) + x170); - Val x243 = (((x219 + x123) + x147) + x171); - // DoExtRoundByIdx(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:122) - MultiplyByMExtStruct x244 = exec_DoExtRound( - ctx, - arg0, - Val24Array{(x220 + x172), (x221 + x173), (x222 + x174), (x223 + x175), (x224 + x176), - (x225 + x177), (x226 + x178), (x227 + x179), (x228 + x180), (x229 + x181), - (x230 + x182), (x231 + x183), (x232 + x184), (x233 + x185), (x234 + x186), - (x235 + x187), (x236 + x188), (x237 + x189), (x238 + x190), (x239 + x191), - (x240 + x192), (x241 + x193), (x242 + x194), (x243 + x195)}, - LAYOUT_LOOKUP(layout2, _super)); - return x244; -} -PoseidonStateStruct -back_PoseidonState(ExecContext& ctx, Index distance0, BoundLayout layout1) { - // PoseidonState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:34) - RegStruct x2 = back_Reg(ctx, distance0, LAYOUT_LOOKUP(layout1, hasState)); - // PoseidonState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:35) - RegStruct x3 = back_Reg(ctx, distance0, LAYOUT_LOOKUP(layout1, stateAddr)); - // PoseidonState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:36) - RegStruct x4 = back_Reg(ctx, distance0, LAYOUT_LOOKUP(layout1, bufOutAddr)); - // PoseidonState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:37) - RegStruct x5 = back_Reg(ctx, distance0, LAYOUT_LOOKUP(layout1, isElem)); - // PoseidonState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:38) - RegStruct x6 = back_Reg(ctx, distance0, LAYOUT_LOOKUP(layout1, checkOut)); - // PoseidonState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:39) - RegStruct x7 = back_Reg(ctx, distance0, LAYOUT_LOOKUP(layout1, loadTxType)); - // PoseidonState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:41) - RegStruct x8 = back_Reg(ctx, distance0, LAYOUT_LOOKUP(layout1, nextState)); - // PoseidonState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:42) - RegStruct x9 = back_Reg(ctx, distance0, LAYOUT_LOOKUP(layout1, subState)); - // PoseidonState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:43) - RegStruct x10 = back_Reg(ctx, distance0, LAYOUT_LOOKUP(layout1, bufInAddr)); - // PoseidonState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:44) - RegStruct x11 = back_Reg(ctx, distance0, LAYOUT_LOOKUP(layout1, count)); - // PoseidonState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:45) - RegStruct x12 = back_Reg(ctx, distance0, LAYOUT_LOOKUP(layout1, mode)); - // PoseidonState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:47) - RegStruct24Array x13 = map( - Val24Array{Val(0), Val(1), Val(2), Val(3), Val(4), Val(5), Val(6), Val(7), - Val(8), Val(9), Val(10), Val(11), Val(12), Val(13), Val(14), Val(15), - Val(16), Val(17), Val(18), Val(19), Val(20), Val(21), Val(22), Val(23)}, - LAYOUT_LOOKUP(layout1, inner), - ([&](Val24Array::value_type x14, BoundLayout x15) { - RegStruct x16 = back_Reg(ctx, distance0, x15); - return x16; - })); - // PoseidonState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:48) - NondetExtRegStruct x17 = back_ExtReg(ctx, distance0, LAYOUT_LOOKUP(layout1, zcheck)); - return PoseidonStateStruct{.hasState = x2, - .stateAddr = x3, - .bufOutAddr = x4, - .isElem = x5, - .checkOut = x6, - .loadTxType = x7, - .nextState = x8, - .subState = x9, - .bufInAddr = x10, - .count = x11, - .mode = x12, - .inner = x13, - .zcheck = x17}; -} -PoseidonStateStruct exec_PoseidonState(ExecContext& ctx, - PoseidonOpDefStruct arg0, - Val arg1, - Val arg2, - Val arg3, - Val arg4, - Val arg5, - Val24Array arg6, - ExtVal arg7, - BoundLayout layout8) { - // PoseidonState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:34) - RegStruct x9 = exec_Reg(ctx, arg0.hasState, LAYOUT_LOOKUP(layout8, hasState)); - // PoseidonState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:35) - RegStruct x10 = exec_Reg(ctx, arg0.stateAddr, LAYOUT_LOOKUP(layout8, stateAddr)); - // PoseidonState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:36) - RegStruct x11 = exec_Reg(ctx, arg0.bufOutAddr, LAYOUT_LOOKUP(layout8, bufOutAddr)); - // PoseidonState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:37) - RegStruct x12 = exec_Reg(ctx, arg0.isElem, LAYOUT_LOOKUP(layout8, isElem)); - // PoseidonState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:38) - RegStruct x13 = exec_Reg(ctx, arg0.checkOut, LAYOUT_LOOKUP(layout8, checkOut)); - // PoseidonState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:39) - RegStruct x14 = exec_Reg(ctx, arg0.loadTxType, LAYOUT_LOOKUP(layout8, loadTxType)); - // PoseidonState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:41) - RegStruct x15 = exec_Reg(ctx, arg1, LAYOUT_LOOKUP(layout8, nextState)); - // PoseidonState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:42) - RegStruct x16 = exec_Reg(ctx, arg2, LAYOUT_LOOKUP(layout8, subState)); - // PoseidonState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:43) - RegStruct x17 = exec_Reg(ctx, arg3, LAYOUT_LOOKUP(layout8, bufInAddr)); - // PoseidonState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:44) - RegStruct x18 = exec_Reg(ctx, arg4, LAYOUT_LOOKUP(layout8, count)); - // PoseidonState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:45) - RegStruct x19 = exec_Reg(ctx, arg5, LAYOUT_LOOKUP(layout8, mode)); - // PoseidonState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:47) - RegStruct24Array x20 = map( - arg6, - LAYOUT_LOOKUP(layout8, inner), - ([&](Val24Array::value_type x21, BoundLayout x22) { - RegStruct x23 = exec_Reg(ctx, x21, x22); - return x23; - })); - // PoseidonState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:48) - NondetExtRegStruct x24 = exec_ExtReg(ctx, arg7, LAYOUT_LOOKUP(layout8, zcheck)); - return PoseidonStateStruct{.hasState = x9, - .stateAddr = x10, - .bufOutAddr = x11, - .isElem = x12, - .checkOut = x13, - .loadTxType = x14, - .nextState = x15, - .subState = x16, - .bufInAddr = x17, - .count = x18, - .mode = x19, - .inner = x20, - .zcheck = x24}; -} -PoseidonStateStruct exec_PoseidonInvalid(ExecContext& ctx, - BoundLayout layout0) { - // PoseidonInvalid(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:52) - EQZ(Val(2013265920), "PoseidonInvalid(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:52)"); - // PoseidonInvalid(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:61) - PoseidonStateStruct x1 = - exec_PoseidonState(ctx, - PoseidonOpDefStruct{.hasState = Val(0), - .stateAddr = Val(0), - .bufOutAddr = Val(0), - .isElem = Val(0), - .checkOut = Val(0), - .loadTxType = Val(0)}, - Val(0), - Val(0), - Val(0), - Val(0), - Val(0), - Val24Array{Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), - Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), - Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0)}, - ExtVal(0, 0, 0, 0), - layout0); - return x1; -} -ReadAddrStruct -exec_ReadAddr(ExecContext& ctx, RegStruct arg0, Val arg1, BoundLayout layout2) { - // ReadAddr(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:78) - GetDataStruct x3 = - exec_MemoryRead(ctx, arg0, (arg1 + Val(1073725440)), LAYOUT_LOOKUP(layout2, addr32)); - // ReadAddr(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:79) - Val x4 = (x3._super.high * Val(16384)); - // Div(:19) - Val x5 = (x3._super.low * Val(1509949441)); - return ReadAddrStruct{._super = (x4 + x5)}; -} -PoseidonStateStruct exec_PoseidonEcall(ExecContext& ctx, - RegStruct arg0, - Val arg1, - BoundLayout layout2) { - // PoseidonEcall(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:84) - ReadAddrStruct x3 = exec_ReadAddr(ctx, arg0, Val(10), LAYOUT_LOOKUP(layout2, stateAddr)); - // PoseidonEcall(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:85) - ReadAddrStruct x4 = exec_ReadAddr(ctx, arg0, Val(11), LAYOUT_LOOKUP(layout2, bufInAddr)); - // PoseidonEcall(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:86) - ReadAddrStruct x5 = exec_ReadAddr(ctx, arg0, Val(12), LAYOUT_LOOKUP(layout2, bufOutAddr)); - // PoseidonEcall(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:87) - GetDataStruct x6 = - exec_MemoryRead(ctx, arg0, Val(1073725453), LAYOUT_LOOKUP(layout2, bitsAndCount)); - // PoseidonEcall(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:90) - NondetRegStruct x7 = exec_IsZero(ctx, x3._super, LAYOUT_LOOKUP(layout2, _0)); - Val x8 = (Val(1) - x7._super); - // PoseidonEcall(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:94) - Val x9 = bitAnd(x6._super.high, Val(32768)); - NondetRegStruct x10 = - exec_NondetBitReg(ctx, (x9 * Val(2013204481)), LAYOUT_LOOKUP(layout2, isElem)); - // PoseidonEcall(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:95) - Val x11 = bitAnd(x6._super.high, Val(16384)); - NondetRegStruct x12 = - exec_NondetBitReg(ctx, (x11 * Val(2013143041)), LAYOUT_LOOKUP(layout2, checkOut)); - // PoseidonEcall(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:96) - Val x13 = ((x10._super * Val(32768)) + (x12._super * Val(16384))); - Val x14 = (x6._super.high - x13); - EQZ(x14, "PoseidonEcall(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:96)"); - // PoseidonEcall(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:99) - NondetRegStruct x15 = exec_IsZero(ctx, x6._super.low, LAYOUT_LOOKUP(layout2, countZero)); - // PoseidonEcall(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:102) - Val x16 = (Val(1) - x15._super); - // PoseidonEcall(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:101) - Val x17 = ((x15._super * Val(32)) + ((x16 * x8) * Val(17))); - // PoseidonEcall(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:105) - PoseidonStateStruct x18 = - exec_PoseidonState(ctx, - PoseidonOpDefStruct{.hasState = x8, - .stateAddr = x3._super, - .bufOutAddr = x5._super, - .isElem = x10._super, - .checkOut = x12._super, - .loadTxType = Val(0)}, - (x17 + ((x16 * (Val(1) - x8)) * Val(18))), - Val(0), - x4._super, - x6._super.low, - arg1, - Val24Array{Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), - Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), - Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0)}, - ExtVal(0, 0, 0, 0), - LAYOUT_LOOKUP(layout2, _super)); - return x18; -} -PoseidonStateStruct exec_PoseidonPagingEntry(ExecContext& ctx, - RegStruct arg0, - Val arg1, - BoundLayout layout2) { - // Div(:19) - // PoseidonPagingEntry(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:110) - Val x3 = (arg1 * Val(1342177281)); - // PoseidonPagingEntry(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:114) - Val x4 = ((Val(1) - x3) * Val(1140850688)); - // PoseidonOpDef(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:8) - // PoseidonPagingEntry(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:111) - PoseidonOpDefStruct x5 = PoseidonOpDefStruct{.hasState = Val(0), - .stateAddr = Val(0), - .bufOutAddr = ((x3 * Val(1073741824)) + x4), - .isElem = Val(1), - .checkOut = Val(1), - .loadTxType = Val(1)}; - // PoseidonPagingEntry(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:119) - PoseidonStateStruct x6 = - exec_PoseidonState(ctx, - x5, - Val(22), - Val(0), - Val(0), - Val(0), - arg1, - Val24Array{Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), - Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), - Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0)}, - ExtVal(0, 0, 0, 0), - layout2); - return x6; -} -PoseidonStateStruct exec_PoseidonEntry(ExecContext& ctx, - RegStruct arg0, - ValU32Struct arg1, - Val arg2, - BoundLayout layout3) { - // PoseidonEntry(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:131) - NondetRegStruct x4 = exec_IsZero(ctx, (arg1.low + arg1.high), LAYOUT_LOOKUP(layout3, pcZero)); - PoseidonStateStruct x5; - if (to_size_t(x4._super)) { - // PoseidonEntry(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:133) - PoseidonStateStruct x6 = - exec_PoseidonPagingEntry(ctx, arg0, arg2, LAYOUT_LOOKUP(layout3, _super.arm0._super)); - // PoseidonEntry(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:132) - STORE(LAYOUT_LOOKUP(layout3, _super.arm0._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout3, _super.arm0._extra0.count._super), 0), - "PoseidonEntry(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:132)"); - STORE(LAYOUT_LOOKUP(layout3, _super.arm0._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout3, _super.arm0._extra1.count._super), 0), - "PoseidonEntry(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:132)"); - STORE(LAYOUT_LOOKUP(layout3, _super.arm0._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout3, _super.arm0._extra2.count._super), 0), - "PoseidonEntry(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:132)"); - STORE(LAYOUT_LOOKUP(layout3, _super.arm0._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout3, _super.arm0._extra3.count._super), 0), - "PoseidonEntry(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:132)"); - STORE(LAYOUT_LOOKUP(layout3, _super.arm0._extra4.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout3, _super.arm0._extra4.count._super), 0), - "PoseidonEntry(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:132)"); - STORE(LAYOUT_LOOKUP(layout3, _super.arm0._extra5.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout3, _super.arm0._extra5.count._super), 0), - "PoseidonEntry(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:132)"); - STORE(LAYOUT_LOOKUP(layout3, _super.arm0._extra6.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout3, _super.arm0._extra6.count._super), 0), - "PoseidonEntry(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:132)"); - STORE(LAYOUT_LOOKUP(layout3, _super.arm0._extra7.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout3, _super.arm0._extra7.count._super), 0), - "PoseidonEntry(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:132)"); - STORE(LAYOUT_LOOKUP(layout3, _super.arm0._extra8.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout3, _super.arm0._extra8.count._super), 0), - "PoseidonEntry(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:132)"); - STORE(LAYOUT_LOOKUP(layout3, _super.arm0._extra9.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout3, _super.arm0._extra9.count._super), 0), - "PoseidonEntry(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:132)"); - STORE(LAYOUT_LOOKUP(layout3, _super.arm0._extra10.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout3, _super.arm0._extra10.count._super), 0), - "PoseidonEntry(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:132)"); - STORE(LAYOUT_LOOKUP(layout3, _super.arm0._extra11.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout3, _super.arm0._extra11.count._super), 0), - "PoseidonEntry(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:132)"); - x5 = x6; - } else if (to_size_t((Val(1) - x4._super))) { - // PoseidonEntry(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:135) - PoseidonStateStruct x7 = - exec_PoseidonEcall(ctx, arg0, arg2, LAYOUT_LOOKUP(layout3, _super.arm1)); - x5 = x7; - } else { - assert(0 && "Reached unreachable mux arm"); - } - // PoseidonEntry(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:132) - PoseidonStateStruct x8 = back_PoseidonState(ctx, 0, LAYOUT_LOOKUP(layout3, _super._super)); - return x8; -} -ReadElemStruct -exec_ReadElem(ExecContext& ctx, RegStruct arg0, Val arg1, BoundLayout layout2) { - // ReadElem(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:140) - GetDataStruct x3 = exec_MemoryRead(ctx, arg0, arg1, LAYOUT_LOOKUP(layout2, elem32)); - // ReadElem(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:141) - Val x4 = (x3._super.high * Val(65536)); - return ReadElemStruct{._super = (x4 + x3._super.low)}; -} -PoseidonStateStruct exec_PoseidonLoadState(ExecContext& ctx, - RegStruct arg0, - PoseidonStateStruct arg1, - BoundLayout layout2) { - // PoseidonLoadState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:146) - ReadElemStruct8Array x3 = - map(Val8Array{Val(0), Val(1), Val(2), Val(3), Val(4), Val(5), Val(6), Val(7)}, - LAYOUT_LOOKUP(layout2, loadList), - ([&](Val8Array::value_type x4, BoundLayout x5) { - // PoseidonLoadState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:147) - Val x6 = (arg1.stateAddr._super._super + x4); - ReadElemStruct x7 = exec_ReadElem(ctx, arg0, x6, x5); - return x7; - })); - // PoseidonOpDef(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:8) - // GetDef(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:72) - // PoseidonLoadState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:156) - PoseidonOpDefStruct x8 = PoseidonOpDefStruct{.hasState = arg1.hasState._super._super, - .stateAddr = arg1.stateAddr._super._super, - .bufOutAddr = arg1.bufOutAddr._super._super, - .isElem = arg1.isElem._super._super, - .checkOut = arg1.checkOut._super._super, - .loadTxType = arg1.loadTxType._super._super}; - // PoseidonLoadState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:149) - Val24Array x9 = Val24Array{Val(0), Val(0), Val(0), Val(0), Val(0), - Val(0), Val(0), Val(0), Val(0), Val(0), - Val(0), Val(0), Val(0), Val(0), Val(0), - Val(0), x3[0]._super, x3[1]._super, x3[2]._super, x3[3]._super, - x3[4]._super, x3[5]._super, x3[6]._super, x3[7]._super}; - // PoseidonLoadState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:156) - PoseidonStateStruct x10 = exec_PoseidonState(ctx, - x8, - Val(18), - Val(0), - arg1.bufInAddr._super._super, - arg1.count._super._super, - arg1.mode._super._super, - x9, - ExtVal(0, 0, 0, 0), - LAYOUT_LOOKUP(layout2, _super)); - return x10; -} -PoseidonStateStruct exec_PoseidonLoadInShort(ExecContext& ctx, - RegStruct arg0, - PoseidonStateStruct arg1, - BoundLayout layout2, - GlobalBuf global3) { - // PoseidonLoadInShort(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:175) - std::initializer_list x4 = std::initializer_list{arg1.loadTxType._super._super}; - // Log(:22) - INVOKE_EXTERN(ctx, log, "txnType", x4); - // PoseidonLoadInShort(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:176) - OneHot_3_Struct x5 = - exec_OneHot_3_(ctx, arg1.loadTxType._super._super, LAYOUT_LOOKUP(layout2, txType)); - // PoseidonLoadInShort(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:177) - GetDataStruct8Array x6 = - map(Val8Array{Val(0), Val(1), Val(2), Val(3), Val(4), Val(5), Val(6), Val(7)}, - LAYOUT_LOOKUP(layout2, loadList), - ([&](Val8Array::value_type x7, BoundLayout x8) { - // PoseidonLoadInShort(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:178) - Val x9 = (arg1.bufInAddr._super._super + x7); - GetDataStruct x10 = exec_MemoryGet(ctx, arg0, x9, x5, x8); - return x10; - })); - // ShiftPoly(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:159) - // PoseidonLoadInShort(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:180) - BoundLayout<_globalLayout> x11 = BIND_LAYOUT(kLayoutGlobal, global3); - // ShiftPoly(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:160) - NondetExtRegStruct x12 = back_ExtReg(ctx, 0, LAYOUT_LOOKUP(x11, rng)); - // PolyEvalStateReduce(zirgen/circuit/rv32im/v2/dsl/poly.zir:14) - // PolyEval(zirgen/circuit/rv32im/v2/dsl/poly.zir:18) - // ShiftPoly(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:170) - ExtVal x13 = (x12._super * ExtVal(1, 0, 0, 0)); - ExtVal x14 = (x6[0].diffLow + ExtVal(0, 0, 0, 0)); - ExtVal x15 = (x13 * x12._super); - ExtVal x16 = (x6[0].diffHigh + ExtVal(0, 0, 0, 0)); - ExtVal x17 = (((x14 * ExtVal(1, 0, 0, 0)) + ExtVal(0, 0, 0, 0)) + (x16 * x13)); - ExtVal x18 = (x15 * x12._super); - ExtVal x19 = (x6[1].diffLow + ExtVal(0, 0, 0, 0)); - ExtVal x20 = (x18 * x12._super); - ExtVal x21 = (x6[1].diffHigh + ExtVal(0, 0, 0, 0)); - ExtVal x22 = (x20 * x12._super); - ExtVal x23 = (x6[2].diffLow + ExtVal(0, 0, 0, 0)); - ExtVal x24 = (((x17 + (x19 * x15)) + (x21 * x18)) + (x23 * x20)); - ExtVal x25 = (x22 * x12._super); - ExtVal x26 = (x6[2].diffHigh + ExtVal(0, 0, 0, 0)); - ExtVal x27 = (x25 * x12._super); - ExtVal x28 = (x6[3].diffLow + ExtVal(0, 0, 0, 0)); - ExtVal x29 = (x27 * x12._super); - ExtVal x30 = (x6[3].diffHigh + ExtVal(0, 0, 0, 0)); - ExtVal x31 = (((x24 + (x26 * x22)) + (x28 * x25)) + (x30 * x27)); - ExtVal x32 = (x29 * x12._super); - ExtVal x33 = (x6[4].diffLow + ExtVal(0, 0, 0, 0)); - ExtVal x34 = (x32 * x12._super); - ExtVal x35 = (x6[4].diffHigh + ExtVal(0, 0, 0, 0)); - ExtVal x36 = (x34 * x12._super); - ExtVal x37 = (x6[5].diffLow + ExtVal(0, 0, 0, 0)); - ExtVal x38 = (((x31 + (x33 * x29)) + (x35 * x32)) + (x37 * x34)); - ExtVal x39 = (x36 * x12._super); - ExtVal x40 = (x6[5].diffHigh + ExtVal(0, 0, 0, 0)); - ExtVal x41 = (x39 * x12._super); - ExtVal x42 = (x6[6].diffLow + ExtVal(0, 0, 0, 0)); - ExtVal x43 = (x41 * x12._super); - ExtVal x44 = (x6[6].diffHigh + ExtVal(0, 0, 0, 0)); - ExtVal x45 = (((x38 + (x40 * x36)) + (x42 * x39)) + (x44 * x41)); - ExtVal x46 = (x6[7].diffLow + ExtVal(0, 0, 0, 0)); - ExtVal x47 = (x6[7].diffHigh + ExtVal(0, 0, 0, 0)); - // ShiftPoly(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:160) - NondetExtRegStruct x48 = back_ExtReg(ctx, 0, LAYOUT_LOOKUP(x11, rng)); - // Pow(zirgen/circuit/rv32im/v2/dsl/poly.zir:10) - // ShiftPoly(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:171) - ExtVal x49 = ((x48._super * ExtVal(1, 0, 0, 0)) * x48._super); - ExtVal x50 = (((x49 * x48._super) * x48._super) * x48._super); - ExtVal x51 = (((x50 * x48._super) * x48._super) * x48._super); - ExtVal x52 = (((x51 * x48._super) * x48._super) * x48._super); - ExtVal x53 = (((x52 * x48._super) * x48._super) * x48._super); - ExtVal x54 = (arg1.zcheck._super * ((x53 * x48._super) * x48._super)); - // PoseidonOpDef(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:8) - // GetDef(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:72) - // PoseidonLoadInShort(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:194) - PoseidonOpDefStruct x55 = PoseidonOpDefStruct{.hasState = arg1.hasState._super._super, - .stateAddr = arg1.stateAddr._super._super, - .bufOutAddr = arg1.bufOutAddr._super._super, - .isElem = arg1.isElem._super._super, - .checkOut = arg1.checkOut._super._super, - .loadTxType = arg1.loadTxType._super._super}; - Val x56 = (arg1.bufInAddr._super._super + Val(8)); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:42) - // MultiplyByMExt(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:61) - Val x57 = (x6[0]._super.low + x6[0]._super.high); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:43) - Val x58 = (x6[1]._super.low + x6[1]._super.high); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:44) - Val x59 = (x6[0]._super.high * Val(2)); - Val x60 = (x59 + x58); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:45) - Val x61 = (x6[1]._super.high * Val(2)); - Val x62 = (x61 + x57); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:46) - Val x63 = ((x58 * Val(4)) + x62); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:47) - Val x64 = ((x57 * Val(4)) + x60); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:48) - Val x65 = (x62 + x64); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:49) - Val x66 = (x60 + x63); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:42) - Val x67 = (x6[2]._super.low + x6[2]._super.high); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:43) - Val x68 = (x6[3]._super.low + x6[3]._super.high); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:44) - Val x69 = (x6[2]._super.high * Val(2)); - Val x70 = (x69 + x68); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:45) - Val x71 = (x6[3]._super.high * Val(2)); - Val x72 = (x71 + x67); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:46) - Val x73 = ((x68 * Val(4)) + x72); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:47) - Val x74 = ((x67 * Val(4)) + x70); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:48) - Val x75 = (x72 + x74); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:49) - Val x76 = (x70 + x73); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:42) - Val x77 = (x6[4]._super.low + x6[4]._super.high); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:43) - Val x78 = (x6[5]._super.low + x6[5]._super.high); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:44) - Val x79 = (x6[4]._super.high * Val(2)); - Val x80 = (x79 + x78); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:45) - Val x81 = (x6[5]._super.high * Val(2)); - Val x82 = (x81 + x77); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:46) - Val x83 = ((x78 * Val(4)) + x82); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:47) - Val x84 = ((x77 * Val(4)) + x80); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:48) - Val x85 = (x82 + x84); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:49) - Val x86 = (x80 + x83); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:42) - Val x87 = (x6[6]._super.low + x6[6]._super.high); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:43) - Val x88 = (x6[7]._super.low + x6[7]._super.high); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:44) - Val x89 = (x6[6]._super.high * Val(2)); - Val x90 = (x89 + x88); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:45) - Val x91 = (x6[7]._super.high * Val(2)); - Val x92 = (x91 + x87); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:46) - Val x93 = ((x88 * Val(4)) + x92); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:47) - Val x94 = ((x87 * Val(4)) + x90); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:48) - Val x95 = (x92 + x94); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:49) - Val x96 = (x90 + x93); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:42) - Val x97 = (arg1.inner[16]._super._super + arg1.inner[17]._super._super); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:43) - Val x98 = (arg1.inner[18]._super._super + arg1.inner[19]._super._super); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:44) - Val x99 = (arg1.inner[17]._super._super * Val(2)); - Val x100 = (x99 + x98); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:45) - Val x101 = (arg1.inner[19]._super._super * Val(2)); - Val x102 = (x101 + x97); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:46) - Val x103 = ((x98 * Val(4)) + x102); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:47) - Val x104 = ((x97 * Val(4)) + x100); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:48) - Val x105 = (x102 + x104); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:49) - Val x106 = (x100 + x103); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:42) - Val x107 = (arg1.inner[20]._super._super + arg1.inner[21]._super._super); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:43) - Val x108 = (arg1.inner[22]._super._super + arg1.inner[23]._super._super); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:44) - Val x109 = (arg1.inner[21]._super._super * Val(2)); - Val x110 = (x109 + x108); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:45) - Val x111 = (arg1.inner[23]._super._super * Val(2)); - Val x112 = (x111 + x107); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:46) - Val x113 = ((x108 * Val(4)) + x112); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:47) - Val x114 = ((x107 * Val(4)) + x110); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:48) - Val x115 = (x112 + x114); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:49) - Val x116 = (x110 + x113); - // ReduceVec4(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:54) - // MultiplyByMExt(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:64) - Val x117 = (((x65 + x75) + x85) + x95); - Val x118 = (((x64 + x74) + x84) + x94); - Val x119 = (((x66 + x76) + x86) + x96); - Val x120 = (((x63 + x73) + x83) + x93); - Val x121 = ((x117 + x105) + x115); - Val x122 = ((x118 + x104) + x114); - Val x123 = ((x119 + x106) + x116); - Val x124 = ((x120 + x103) + x113); - PoseidonStateStruct x125 = exec_PoseidonState( - ctx, - x55, - Val(24), - Val(0), - x56, - arg1.count._super._super, - arg1.mode._super._super, - Val24Array{(x65 + x121), (x64 + x122), (x66 + x123), (x63 + x124), (x75 + x121), - (x74 + x122), (x76 + x123), (x73 + x124), (x85 + x121), (x84 + x122), - (x86 + x123), (x83 + x124), (x95 + x121), (x94 + x122), (x96 + x123), - (x93 + x124), (x105 + x121), (x104 + x122), (x106 + x123), (x103 + x124), - (x115 + x121), (x114 + x122), (x116 + x123), (x113 + x124)}, - (x54 + ((x45 + (x46 * x43)) + (x47 * (x43 * x12._super)))), - LAYOUT_LOOKUP(layout2, _super)); - return x125; -} -PoseidonStateStruct exec_PoseidonLoadInLow(ExecContext& ctx, - RegStruct arg0, - PoseidonStateStruct arg1, - BoundLayout layout2, - GlobalBuf global3) { - // PoseidonLoadInLow(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:198) - std::initializer_list x4 = std::initializer_list{arg1.loadTxType._super._super}; - // Log(:22) - INVOKE_EXTERN(ctx, log, "txnType", x4); - // PoseidonLoadInLow(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:199) - OneHot_3_Struct x5 = - exec_OneHot_3_(ctx, arg1.loadTxType._super._super, LAYOUT_LOOKUP(layout2, txType)); - // PoseidonLoadInLow(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:200) - GetDataStruct8Array x6 = - map(Val8Array{Val(0), Val(1), Val(2), Val(3), Val(4), Val(5), Val(6), Val(7)}, - LAYOUT_LOOKUP(layout2, loadList), - ([&](Val8Array::value_type x7, BoundLayout x8) { - // PoseidonLoadInLow(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:201) - Val x9 = (arg1.bufInAddr._super._super + x7); - GetDataStruct x10 = exec_MemoryGet(ctx, arg0, x9, x5, x8); - return x10; - })); - // ShiftPoly(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:159) - // PoseidonLoadInLow(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:203) - BoundLayout<_globalLayout> x11 = BIND_LAYOUT(kLayoutGlobal, global3); - // ShiftPoly(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:160) - NondetExtRegStruct x12 = back_ExtReg(ctx, 0, LAYOUT_LOOKUP(x11, rng)); - // PolyEvalStateReduce(zirgen/circuit/rv32im/v2/dsl/poly.zir:14) - // PolyEval(zirgen/circuit/rv32im/v2/dsl/poly.zir:18) - // ShiftPoly(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:170) - ExtVal x13 = (x12._super * ExtVal(1, 0, 0, 0)); - ExtVal x14 = (x6[0].diffLow + ExtVal(0, 0, 0, 0)); - ExtVal x15 = (x13 * x12._super); - ExtVal x16 = (x6[0].diffHigh + ExtVal(0, 0, 0, 0)); - ExtVal x17 = (((x14 * ExtVal(1, 0, 0, 0)) + ExtVal(0, 0, 0, 0)) + (x16 * x13)); - ExtVal x18 = (x15 * x12._super); - ExtVal x19 = (x6[1].diffLow + ExtVal(0, 0, 0, 0)); - ExtVal x20 = (x18 * x12._super); - ExtVal x21 = (x6[1].diffHigh + ExtVal(0, 0, 0, 0)); - ExtVal x22 = (x20 * x12._super); - ExtVal x23 = (x6[2].diffLow + ExtVal(0, 0, 0, 0)); - ExtVal x24 = (((x17 + (x19 * x15)) + (x21 * x18)) + (x23 * x20)); - ExtVal x25 = (x22 * x12._super); - ExtVal x26 = (x6[2].diffHigh + ExtVal(0, 0, 0, 0)); - ExtVal x27 = (x25 * x12._super); - ExtVal x28 = (x6[3].diffLow + ExtVal(0, 0, 0, 0)); - ExtVal x29 = (x27 * x12._super); - ExtVal x30 = (x6[3].diffHigh + ExtVal(0, 0, 0, 0)); - ExtVal x31 = (((x24 + (x26 * x22)) + (x28 * x25)) + (x30 * x27)); - ExtVal x32 = (x29 * x12._super); - ExtVal x33 = (x6[4].diffLow + ExtVal(0, 0, 0, 0)); - ExtVal x34 = (x32 * x12._super); - ExtVal x35 = (x6[4].diffHigh + ExtVal(0, 0, 0, 0)); - ExtVal x36 = (x34 * x12._super); - ExtVal x37 = (x6[5].diffLow + ExtVal(0, 0, 0, 0)); - ExtVal x38 = (((x31 + (x33 * x29)) + (x35 * x32)) + (x37 * x34)); - ExtVal x39 = (x36 * x12._super); - ExtVal x40 = (x6[5].diffHigh + ExtVal(0, 0, 0, 0)); - ExtVal x41 = (x39 * x12._super); - ExtVal x42 = (x6[6].diffLow + ExtVal(0, 0, 0, 0)); - ExtVal x43 = (x41 * x12._super); - ExtVal x44 = (x6[6].diffHigh + ExtVal(0, 0, 0, 0)); - ExtVal x45 = (((x38 + (x40 * x36)) + (x42 * x39)) + (x44 * x41)); - ExtVal x46 = (x6[7].diffLow + ExtVal(0, 0, 0, 0)); - ExtVal x47 = (x6[7].diffHigh + ExtVal(0, 0, 0, 0)); - // ShiftPoly(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:160) - NondetExtRegStruct x48 = back_ExtReg(ctx, 0, LAYOUT_LOOKUP(x11, rng)); - // Pow(zirgen/circuit/rv32im/v2/dsl/poly.zir:10) - // ShiftPoly(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:171) - ExtVal x49 = ((x48._super * ExtVal(1, 0, 0, 0)) * x48._super); - ExtVal x50 = (((x49 * x48._super) * x48._super) * x48._super); - ExtVal x51 = (((x50 * x48._super) * x48._super) * x48._super); - ExtVal x52 = (((x51 * x48._super) * x48._super) * x48._super); - ExtVal x53 = (((x52 * x48._super) * x48._super) * x48._super); - ExtVal x54 = (arg1.zcheck._super * ((x53 * x48._super) * x48._super)); - // PoseidonLoadInLow(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:206) - Val x55 = (x6[0]._super.high * Val(65536)); - Val x56 = (x6[1]._super.high * Val(65536)); - Val x57 = (x6[2]._super.high * Val(65536)); - Val x58 = (x6[3]._super.high * Val(65536)); - Val x59 = (x6[4]._super.high * Val(65536)); - Val x60 = (x6[5]._super.high * Val(65536)); - Val x61 = (x6[6]._super.high * Val(65536)); - Val x62 = (x6[7]._super.high * Val(65536)); - // PoseidonOpDef(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:8) - // GetDef(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:72) - // PoseidonLoadInLow(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:211) - PoseidonOpDefStruct x63 = PoseidonOpDefStruct{.hasState = arg1.hasState._super._super, - .stateAddr = arg1.stateAddr._super._super, - .bufOutAddr = arg1.bufOutAddr._super._super, - .isElem = arg1.isElem._super._super, - .checkOut = arg1.checkOut._super._super, - .loadTxType = arg1.loadTxType._super._super}; - Val x64 = (arg1.bufInAddr._super._super + Val(8)); - // PoseidonLoadInLow(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:204) - Val24Array x65 = Val24Array{ - (x55 + x6[0]._super.low), (x56 + x6[1]._super.low), (x57 + x6[2]._super.low), - (x58 + x6[3]._super.low), (x59 + x6[4]._super.low), (x60 + x6[5]._super.low), - (x61 + x6[6]._super.low), (x62 + x6[7]._super.low), arg1.inner[8]._super._super, - arg1.inner[9]._super._super, arg1.inner[10]._super._super, arg1.inner[11]._super._super, - arg1.inner[12]._super._super, arg1.inner[13]._super._super, arg1.inner[14]._super._super, - arg1.inner[15]._super._super, arg1.inner[16]._super._super, arg1.inner[17]._super._super, - arg1.inner[18]._super._super, arg1.inner[19]._super._super, arg1.inner[20]._super._super, - arg1.inner[21]._super._super, arg1.inner[22]._super._super, arg1.inner[23]._super._super}; - // PoseidonLoadInLow(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:211) - PoseidonStateStruct x66 = - exec_PoseidonState(ctx, - x63, - Val(18), - Val(1), - x64, - arg1.count._super._super, - arg1.mode._super._super, - x65, - (x54 + ((x45 + (x46 * x43)) + (x47 * (x43 * x12._super)))), - LAYOUT_LOOKUP(layout2, _super)); - return x66; -} -PoseidonStateStruct exec_PoseidonLoadInHigh(ExecContext& ctx, - RegStruct arg0, - PoseidonStateStruct arg1, - BoundLayout layout2, - GlobalBuf global3) { - // PoseidonLoadInHigh(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:215) - std::initializer_list x4 = std::initializer_list{arg1.loadTxType._super._super}; - // Log(:22) - INVOKE_EXTERN(ctx, log, "txnType", x4); - // PoseidonLoadInHigh(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:216) - OneHot_3_Struct x5 = - exec_OneHot_3_(ctx, arg1.loadTxType._super._super, LAYOUT_LOOKUP(layout2, txType)); - // PoseidonLoadInHigh(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:217) - GetDataStruct8Array x6 = - map(Val8Array{Val(0), Val(1), Val(2), Val(3), Val(4), Val(5), Val(6), Val(7)}, - LAYOUT_LOOKUP(layout2, loadList), - ([&](Val8Array::value_type x7, BoundLayout x8) { - // PoseidonLoadInHigh(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:218) - Val x9 = (arg1.bufInAddr._super._super + x7); - GetDataStruct x10 = exec_MemoryGet(ctx, arg0, x9, x5, x8); - return x10; - })); - // PoseidonLoadInHigh(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:222) - Val x11 = (x6[0]._super.high * Val(65536)); - Val x12 = (x6[1]._super.high * Val(65536)); - Val x13 = (x12 + x6[1]._super.low); - Val x14 = (x6[2]._super.high * Val(65536)); - Val x15 = (x6[3]._super.high * Val(65536)); - Val x16 = (x15 + x6[3]._super.low); - Val x17 = (x6[4]._super.high * Val(65536)); - Val x18 = (x6[5]._super.high * Val(65536)); - Val x19 = (x18 + x6[5]._super.low); - Val x20 = (x6[6]._super.high * Val(65536)); - Val x21 = (x6[7]._super.high * Val(65536)); - Val x22 = (x21 + x6[7]._super.low); - // ShiftPoly(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:159) - // PoseidonLoadInHigh(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:227) - BoundLayout<_globalLayout> x23 = BIND_LAYOUT(kLayoutGlobal, global3); - // ShiftPoly(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:160) - NondetExtRegStruct x24 = back_ExtReg(ctx, 0, LAYOUT_LOOKUP(x23, rng)); - // PolyEvalStateReduce(zirgen/circuit/rv32im/v2/dsl/poly.zir:14) - // PolyEval(zirgen/circuit/rv32im/v2/dsl/poly.zir:18) - // ShiftPoly(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:170) - ExtVal x25 = (x24._super * ExtVal(1, 0, 0, 0)); - ExtVal x26 = (x6[0].diffLow + ExtVal(0, 0, 0, 0)); - ExtVal x27 = (x25 * x24._super); - ExtVal x28 = (x6[0].diffHigh + ExtVal(0, 0, 0, 0)); - ExtVal x29 = (((x26 * ExtVal(1, 0, 0, 0)) + ExtVal(0, 0, 0, 0)) + (x28 * x25)); - ExtVal x30 = (x27 * x24._super); - ExtVal x31 = (x6[1].diffLow + ExtVal(0, 0, 0, 0)); - ExtVal x32 = (x30 * x24._super); - ExtVal x33 = (x6[1].diffHigh + ExtVal(0, 0, 0, 0)); - ExtVal x34 = (x32 * x24._super); - ExtVal x35 = (x6[2].diffLow + ExtVal(0, 0, 0, 0)); - ExtVal x36 = (((x29 + (x31 * x27)) + (x33 * x30)) + (x35 * x32)); - ExtVal x37 = (x34 * x24._super); - ExtVal x38 = (x6[2].diffHigh + ExtVal(0, 0, 0, 0)); - ExtVal x39 = (x37 * x24._super); - ExtVal x40 = (x6[3].diffLow + ExtVal(0, 0, 0, 0)); - ExtVal x41 = (x39 * x24._super); - ExtVal x42 = (x6[3].diffHigh + ExtVal(0, 0, 0, 0)); - ExtVal x43 = (((x36 + (x38 * x34)) + (x40 * x37)) + (x42 * x39)); - ExtVal x44 = (x41 * x24._super); - ExtVal x45 = (x6[4].diffLow + ExtVal(0, 0, 0, 0)); - ExtVal x46 = (x44 * x24._super); - ExtVal x47 = (x6[4].diffHigh + ExtVal(0, 0, 0, 0)); - ExtVal x48 = (x46 * x24._super); - ExtVal x49 = (x6[5].diffLow + ExtVal(0, 0, 0, 0)); - ExtVal x50 = (((x43 + (x45 * x41)) + (x47 * x44)) + (x49 * x46)); - ExtVal x51 = (x48 * x24._super); - ExtVal x52 = (x6[5].diffHigh + ExtVal(0, 0, 0, 0)); - ExtVal x53 = (x51 * x24._super); - ExtVal x54 = (x6[6].diffLow + ExtVal(0, 0, 0, 0)); - ExtVal x55 = (x53 * x24._super); - ExtVal x56 = (x6[6].diffHigh + ExtVal(0, 0, 0, 0)); - ExtVal x57 = (((x50 + (x52 * x48)) + (x54 * x51)) + (x56 * x53)); - ExtVal x58 = (x6[7].diffLow + ExtVal(0, 0, 0, 0)); - ExtVal x59 = (x6[7].diffHigh + ExtVal(0, 0, 0, 0)); - // ShiftPoly(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:160) - NondetExtRegStruct x60 = back_ExtReg(ctx, 0, LAYOUT_LOOKUP(x23, rng)); - // Pow(zirgen/circuit/rv32im/v2/dsl/poly.zir:10) - // ShiftPoly(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:171) - ExtVal x61 = ((x60._super * ExtVal(1, 0, 0, 0)) * x60._super); - ExtVal x62 = (((x61 * x60._super) * x60._super) * x60._super); - ExtVal x63 = (((x62 * x60._super) * x60._super) * x60._super); - ExtVal x64 = (((x63 * x60._super) * x60._super) * x60._super); - ExtVal x65 = (((x64 * x60._super) * x60._super) * x60._super); - ExtVal x66 = (arg1.zcheck._super * ((x65 * x60._super) * x60._super)); - // PoseidonOpDef(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:8) - // GetDef(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:72) - // PoseidonLoadInHigh(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:228) - PoseidonOpDefStruct x67 = PoseidonOpDefStruct{.hasState = arg1.hasState._super._super, - .stateAddr = arg1.stateAddr._super._super, - .bufOutAddr = arg1.bufOutAddr._super._super, - .isElem = arg1.isElem._super._super, - .checkOut = arg1.checkOut._super._super, - .loadTxType = arg1.loadTxType._super._super}; - Val x68 = (arg1.bufInAddr._super._super + Val(8)); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:42) - // MultiplyByMExt(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:61) - Val x69 = (arg1.inner[0]._super._super + arg1.inner[1]._super._super); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:43) - Val x70 = (arg1.inner[2]._super._super + arg1.inner[3]._super._super); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:44) - Val x71 = (arg1.inner[1]._super._super * Val(2)); - Val x72 = (x71 + x70); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:45) - Val x73 = (arg1.inner[3]._super._super * Val(2)); - Val x74 = (x73 + x69); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:46) - Val x75 = ((x70 * Val(4)) + x74); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:47) - Val x76 = ((x69 * Val(4)) + x72); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:48) - Val x77 = (x74 + x76); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:49) - Val x78 = (x72 + x75); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:42) - Val x79 = (arg1.inner[4]._super._super + arg1.inner[5]._super._super); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:43) - Val x80 = (arg1.inner[6]._super._super + arg1.inner[7]._super._super); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:44) - Val x81 = (arg1.inner[5]._super._super * Val(2)); - Val x82 = (x81 + x80); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:45) - Val x83 = (arg1.inner[7]._super._super * Val(2)); - Val x84 = (x83 + x79); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:46) - Val x85 = ((x80 * Val(4)) + x84); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:47) - Val x86 = ((x79 * Val(4)) + x82); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:48) - Val x87 = (x84 + x86); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:49) - Val x88 = (x82 + x85); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:42) - Val x89 = ((x11 + x6[0]._super.low) + x13); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:43) - Val x90 = ((x14 + x6[2]._super.low) + x16); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:44) - Val x91 = ((x13 * Val(2)) + x90); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:45) - Val x92 = ((x16 * Val(2)) + x89); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:46) - Val x93 = ((x90 * Val(4)) + x92); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:47) - Val x94 = ((x89 * Val(4)) + x91); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:48) - Val x95 = (x92 + x94); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:49) - Val x96 = (x91 + x93); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:42) - Val x97 = ((x17 + x6[4]._super.low) + x19); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:43) - Val x98 = ((x20 + x6[6]._super.low) + x22); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:44) - Val x99 = ((x19 * Val(2)) + x98); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:45) - Val x100 = ((x22 * Val(2)) + x97); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:46) - Val x101 = ((x98 * Val(4)) + x100); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:47) - Val x102 = ((x97 * Val(4)) + x99); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:48) - Val x103 = (x100 + x102); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:49) - Val x104 = (x99 + x101); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:42) - Val x105 = (arg1.inner[16]._super._super + arg1.inner[17]._super._super); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:43) - Val x106 = (arg1.inner[18]._super._super + arg1.inner[19]._super._super); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:44) - Val x107 = (arg1.inner[17]._super._super * Val(2)); - Val x108 = (x107 + x106); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:45) - Val x109 = (arg1.inner[19]._super._super * Val(2)); - Val x110 = (x109 + x105); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:46) - Val x111 = ((x106 * Val(4)) + x110); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:47) - Val x112 = ((x105 * Val(4)) + x108); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:48) - Val x113 = (x110 + x112); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:49) - Val x114 = (x108 + x111); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:42) - Val x115 = (arg1.inner[20]._super._super + arg1.inner[21]._super._super); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:43) - Val x116 = (arg1.inner[22]._super._super + arg1.inner[23]._super._super); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:44) - Val x117 = (arg1.inner[21]._super._super * Val(2)); - Val x118 = (x117 + x116); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:45) - Val x119 = (arg1.inner[23]._super._super * Val(2)); - Val x120 = (x119 + x115); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:46) - Val x121 = ((x116 * Val(4)) + x120); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:47) - Val x122 = ((x115 * Val(4)) + x118); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:48) - Val x123 = (x120 + x122); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:49) - Val x124 = (x118 + x121); - // ReduceVec4(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:54) - // MultiplyByMExt(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:64) - Val x125 = (((x77 + x87) + x95) + x103); - Val x126 = (((x76 + x86) + x94) + x102); - Val x127 = (((x78 + x88) + x96) + x104); - Val x128 = (((x75 + x85) + x93) + x101); - Val x129 = ((x125 + x113) + x123); - Val x130 = ((x126 + x112) + x122); - Val x131 = ((x127 + x114) + x124); - Val x132 = ((x128 + x111) + x121); - PoseidonStateStruct x133 = exec_PoseidonState( - ctx, - x67, - Val(24), - Val(0), - x68, - arg1.count._super._super, - arg1.mode._super._super, - Val24Array{(x77 + x129), (x76 + x130), (x78 + x131), (x75 + x132), (x87 + x129), - (x86 + x130), (x88 + x131), (x85 + x132), (x95 + x129), (x94 + x130), - (x96 + x131), (x93 + x132), (x103 + x129), (x102 + x130), (x104 + x131), - (x101 + x132), (x113 + x129), (x112 + x130), (x114 + x131), (x111 + x132), - (x123 + x129), (x122 + x130), (x124 + x131), (x121 + x132)}, - (x66 + ((x57 + (x58 * x55)) + (x59 * (x55 * x24._super)))), - LAYOUT_LOOKUP(layout2, _super)); - return x133; -} -PoseidonStateStruct exec_PoseidonLoadIn(ExecContext& ctx, - RegStruct arg0, - PoseidonStateStruct arg1, - BoundLayout layout2, - GlobalBuf global3) { - // PoseidonLoadIn(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:232) - Val x4 = (arg1.isElem._super._super + arg1.subState._super._super); - // PoseidonLoadIn(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:233) - OneHot_3_Struct x5 = exec_OneHot_3_(ctx, x4, LAYOUT_LOOKUP(layout2, _0)); - PoseidonStateStruct x6; - if (to_size_t(x5._super[0]._super)) { - // PoseidonLoadIn(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:234) - PoseidonStateStruct x7 = - exec_PoseidonLoadInShort(ctx, arg0, arg1, LAYOUT_LOOKUP(layout2, _super.arm0), global3); - x6 = x7; - } else if (to_size_t(x5._super[1]._super)) { - // PoseidonLoadIn(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:235) - PoseidonStateStruct x8 = - exec_PoseidonLoadInLow(ctx, arg0, arg1, LAYOUT_LOOKUP(layout2, _super.arm1), global3); - x6 = x8; - } else if (to_size_t(x5._super[2]._super)) { - // PoseidonLoadIn(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:236) - PoseidonStateStruct x9 = - exec_PoseidonLoadInHigh(ctx, arg0, arg1, LAYOUT_LOOKUP(layout2, _super.arm2), global3); - x6 = x9; - } else { - assert(0 && "Reached unreachable mux arm"); - } - // PoseidonLoadIn(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:233) - PoseidonStateStruct x10 = back_PoseidonState(ctx, 0, LAYOUT_LOOKUP(layout2, _super._super)); - return x10; -} -PoseidonStateStruct exec_PoseidonExtRound(ExecContext& ctx, - PoseidonStateStruct arg0, - BoundLayout layout1) { - // PoseidonExtRound(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:241) - Val x2 = (arg0.subState._super._super - Val(3)); - NondetRegStruct x3 = exec_IsZero(ctx, x2, LAYOUT_LOOKUP(layout1, isRound3)); - // PoseidonExtRound(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:242) - Val x4 = (arg0.subState._super._super - Val(7)); - NondetRegStruct x5 = exec_IsZero(ctx, x4, LAYOUT_LOOKUP(layout1, isRound7)); - // PoseidonExtRound(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:243) - Val x6 = (arg0.count._super._super - Val(1)); - // PoseidonExtRound(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:244) - NondetRegStruct x7 = exec_IsZero(ctx, x6, LAYOUT_LOOKUP(layout1, lastBlock)); - // PoseidonExtRound(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:245) - Val x8 = (arg0.count._super._super - x5._super); - // PoseidonExtRound(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:248) - Val x9 = ((Val(1) - x3._super) - x5._super); - // PoseidonExtRound(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:247) - Val x10 = ((x3._super * Val(25)) + (x9 * Val(24))); - // PoseidonExtRound(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:249) - Val x11 = (x5._super * (Val(1) - x7._super)); - // PoseidonExtRound(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:250) - Val x12 = ((x5._super * x7._super) * Val(21)); - // PoseidonExtRound(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:251) - Val x13 = (arg0.subState._super._super + Val(1)); - // PoseidonExtRound(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:240) - Val24Array x14 = Val24Array{ - arg0.inner[0]._super._super, arg0.inner[1]._super._super, arg0.inner[2]._super._super, - arg0.inner[3]._super._super, arg0.inner[4]._super._super, arg0.inner[5]._super._super, - arg0.inner[6]._super._super, arg0.inner[7]._super._super, arg0.inner[8]._super._super, - arg0.inner[9]._super._super, arg0.inner[10]._super._super, arg0.inner[11]._super._super, - arg0.inner[12]._super._super, arg0.inner[13]._super._super, arg0.inner[14]._super._super, - arg0.inner[15]._super._super, arg0.inner[16]._super._super, arg0.inner[17]._super._super, - arg0.inner[18]._super._super, arg0.inner[19]._super._super, arg0.inner[20]._super._super, - arg0.inner[21]._super._super, arg0.inner[22]._super._super, arg0.inner[23]._super._super}; - // PoseidonExtRound(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:252) - MultiplyByMExtStruct x15 = exec_DoExtRoundByIdx( - ctx, x14, arg0.subState._super._super, LAYOUT_LOOKUP(layout1, nextInner)); - // PoseidonOpDef(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:8) - // GetDef(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:72) - // PoseidonExtRound(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:253) - PoseidonOpDefStruct x16 = PoseidonOpDefStruct{.hasState = arg0.hasState._super._super, - .stateAddr = arg0.stateAddr._super._super, - .bufOutAddr = arg0.bufOutAddr._super._super, - .isElem = arg0.isElem._super._super, - .checkOut = arg0.checkOut._super._super, - .loadTxType = arg0.loadTxType._super._super}; - // PoseidonExtRound(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:252) - Val24Array x17 = Val24Array{ - x15._super[0]._super, x15._super[1]._super, x15._super[2]._super, x15._super[3]._super, - x15._super[4]._super, x15._super[5]._super, x15._super[6]._super, x15._super[7]._super, - x15._super[8]._super, x15._super[9]._super, x15._super[10]._super, x15._super[11]._super, - x15._super[12]._super, x15._super[13]._super, x15._super[14]._super, x15._super[15]._super, - x15._super[16]._super, x15._super[17]._super, x15._super[18]._super, x15._super[19]._super, - x15._super[20]._super, x15._super[21]._super, x15._super[22]._super, x15._super[23]._super}; - // PoseidonExtRound(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:253) - PoseidonStateStruct x18 = exec_PoseidonState(ctx, - x16, - ((x10 + (x11 * Val(18))) + x12), - (x9 * x13), - arg0.bufInAddr._super._super, - x8, - arg0.mode._super._super, - x17, - arg0.zcheck._super, - LAYOUT_LOOKUP(layout1, _super)); - return x18; -} -PoseidonStateStruct exec_PoseidonIntRounds(ExecContext& ctx, - PoseidonStateStruct arg0, - BoundLayout layout1) { - // PoseidonIntRounds(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:256) - Val24Array x2 = Val24Array{ - arg0.inner[0]._super._super, arg0.inner[1]._super._super, arg0.inner[2]._super._super, - arg0.inner[3]._super._super, arg0.inner[4]._super._super, arg0.inner[5]._super._super, - arg0.inner[6]._super._super, arg0.inner[7]._super._super, arg0.inner[8]._super._super, - arg0.inner[9]._super._super, arg0.inner[10]._super._super, arg0.inner[11]._super._super, - arg0.inner[12]._super._super, arg0.inner[13]._super._super, arg0.inner[14]._super._super, - arg0.inner[15]._super._super, arg0.inner[16]._super._super, arg0.inner[17]._super._super, - arg0.inner[18]._super._super, arg0.inner[19]._super._super, arg0.inner[20]._super._super, - arg0.inner[21]._super._super, arg0.inner[22]._super._super, arg0.inner[23]._super._super}; - // PoseidonIntRounds(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:257) - DoIntRoundsStruct x3 = exec_DoIntRounds(ctx, x2, LAYOUT_LOOKUP(layout1, nextInner)); - // PoseidonOpDef(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:8) - // GetDef(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:72) - // PoseidonIntRounds(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:258) - PoseidonOpDefStruct x4 = PoseidonOpDefStruct{.hasState = arg0.hasState._super._super, - .stateAddr = arg0.stateAddr._super._super, - .bufOutAddr = arg0.bufOutAddr._super._super, - .isElem = arg0.isElem._super._super, - .checkOut = arg0.checkOut._super._super, - .loadTxType = arg0.loadTxType._super._super}; - PoseidonStateStruct x5 = exec_PoseidonState(ctx, - x4, - Val(24), - Val(4), - arg0.bufInAddr._super._super, - arg0.count._super._super, - arg0.mode._super._super, - x3._super, - arg0.zcheck._super, - LAYOUT_LOOKUP(layout1, _super)); - return x5; -} -PoseidonStateStruct exec_PoseidonCheckOut(ExecContext& ctx, - RegStruct arg0, - PoseidonStateStruct arg1, - BoundLayout layout2) { - // PoseidonCheckOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:262) - PoseidonCheckOut__0Struct8Array x3 = - map(Val8Array{Val(0), Val(1), Val(2), Val(3), Val(4), Val(5), Val(6), Val(7)}, - LAYOUT_LOOKUP(layout2, _1), - ([&](Val8Array::value_type x4, - BoundLayout x5) { - // PoseidonCheckOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:264) - Val x6 = (arg1.bufOutAddr._super._super + x4); - ReadElemStruct x7 = exec_ReadElem(ctx, arg0, x6, LAYOUT_LOOKUP(x5, goal)); - // PoseidonCheckOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:265) - Val x8 = (x7._super - arg1.inner[to_size_t(x4)]._super._super); - EQZ(x8, "PoseidonCheckOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:265)"); - return PoseidonCheckOut__0Struct{}; - })); - // PoseidonCheckOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:267) - NondetRegStruct x9 = - exec_IsZero(ctx, arg1.loadTxType._super._super, LAYOUT_LOOKUP(layout2, isNormal)); - // PoseidonCheckOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:268) - Val x10 = ((Val(1) - x9._super) * Val(22)); - Val x11 = ((x9._super * Val(32)) + x10); - // PoseidonCheckOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:269) - Val x12 = (arg1.hasState._super._super * Val(23)); - Val x13 = (Val(1) - arg1.hasState._super._super); - // PoseidonCheckOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:274) - ExtVal x14 = inv_0(arg1.zcheck._super); - NondetExtRegStruct x15 = exec_NondetExtReg(ctx, x14, LAYOUT_LOOKUP(layout2, extInv)); - // PoseidonCheckOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:275) - ExtVal x16 = (x15._super * arg1.zcheck._super); - EQZ((x16 - ExtVal(1, 0, 0, 0)), - "loc(callsite(unknown at PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir " - ":275:10)))"); - // PoseidonOpDef(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:8) - // GetDef(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:72) - // PoseidonCheckOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:276) - PoseidonOpDefStruct x17 = PoseidonOpDefStruct{.hasState = arg1.hasState._super._super, - .stateAddr = arg1.stateAddr._super._super, - .bufOutAddr = arg1.bufOutAddr._super._super, - .isElem = arg1.isElem._super._super, - .checkOut = arg1.checkOut._super._super, - .loadTxType = arg1.loadTxType._super._super}; - // PoseidonCheckOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:261) - Val24Array x18 = Val24Array{ - arg1.inner[0]._super._super, arg1.inner[1]._super._super, arg1.inner[2]._super._super, - arg1.inner[3]._super._super, arg1.inner[4]._super._super, arg1.inner[5]._super._super, - arg1.inner[6]._super._super, arg1.inner[7]._super._super, arg1.inner[8]._super._super, - arg1.inner[9]._super._super, arg1.inner[10]._super._super, arg1.inner[11]._super._super, - arg1.inner[12]._super._super, arg1.inner[13]._super._super, arg1.inner[14]._super._super, - arg1.inner[15]._super._super, arg1.inner[16]._super._super, arg1.inner[17]._super._super, - arg1.inner[18]._super._super, arg1.inner[19]._super._super, arg1.inner[20]._super._super, - arg1.inner[21]._super._super, arg1.inner[22]._super._super, arg1.inner[23]._super._super}; - // PoseidonCheckOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:276) - PoseidonStateStruct x19 = exec_PoseidonState(ctx, - x17, - (x12 + (x13 * x11)), - Val(0), - Val(0), - Val(0), - arg1.mode._super._super, - x18, - ExtVal(0, 0, 0, 0), - LAYOUT_LOOKUP(layout2, _super)); - return x19; -} -PoseidonStateStruct exec_PoseidonStoreOut(ExecContext& ctx, - RegStruct arg0, - PoseidonStateStruct arg1, - BoundLayout layout2) { - // PoseidonStoreOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:280) - PoseidonStoreOut__0Struct8Array x3 = - map(Val8Array{Val(0), Val(1), Val(2), Val(3), Val(4), Val(5), Val(6), Val(7)}, - LAYOUT_LOOKUP(layout2, _1), - ([&](Val8Array::value_type x4, - BoundLayout x5) { - // PoseidonStoreOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:282) - Val x6 = bitAnd(arg1.inner[to_size_t(x4)]._super._super, Val(65535)); - NondetRegStruct x7 = exec_NondetU16Reg(ctx, x6, LAYOUT_LOOKUP(x5, low)); - // PoseidonStoreOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:283) - Val x8 = (arg1.inner[to_size_t(x4)]._super._super - x7._super); - U16RegStruct x9 = exec_U16Reg(ctx, (x8 * Val(2013235201)), LAYOUT_LOOKUP(x5, high)); - // PoseidonStoreOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:284) - Val x10 = (arg1.bufOutAddr._super._super + x4); - MemoryWriteStruct x11 = - exec_MemoryWrite(ctx, - arg0, - x10, - ValU32Struct{.low = x7._super, .high = x9._super}, - LAYOUT_LOOKUP(x5, _0)); - return PoseidonStoreOut__0Struct{}; - })); - // PoseidonStoreOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:286) - NondetRegStruct x12 = - exec_IsZero(ctx, arg1.loadTxType._super._super, LAYOUT_LOOKUP(layout2, isNormal)); - // PoseidonStoreOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:287) - Val x13 = ((Val(1) - x12._super) * Val(22)); - Val x14 = ((x12._super * Val(32)) + x13); - // PoseidonStoreOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:289) - Val x15 = (arg1.hasState._super._super * Val(23)); - // PoseidonStoreOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:290) - Val x16 = (Val(1) - arg1.hasState._super._super); - // PoseidonStoreOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:291) - ExtVal x17 = inv_0(arg1.zcheck._super); - NondetExtRegStruct x18 = exec_NondetExtReg(ctx, x17, LAYOUT_LOOKUP(layout2, extInv)); - // PoseidonOpDef(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:8) - // GetDef(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:72) - // PoseidonStoreOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:292) - PoseidonOpDefStruct x19 = PoseidonOpDefStruct{.hasState = arg1.hasState._super._super, - .stateAddr = arg1.stateAddr._super._super, - .bufOutAddr = arg1.bufOutAddr._super._super, - .isElem = arg1.isElem._super._super, - .checkOut = arg1.checkOut._super._super, - .loadTxType = arg1.loadTxType._super._super}; - // PoseidonStoreOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:279) - Val24Array x20 = Val24Array{ - arg1.inner[0]._super._super, arg1.inner[1]._super._super, arg1.inner[2]._super._super, - arg1.inner[3]._super._super, arg1.inner[4]._super._super, arg1.inner[5]._super._super, - arg1.inner[6]._super._super, arg1.inner[7]._super._super, arg1.inner[8]._super._super, - arg1.inner[9]._super._super, arg1.inner[10]._super._super, arg1.inner[11]._super._super, - arg1.inner[12]._super._super, arg1.inner[13]._super._super, arg1.inner[14]._super._super, - arg1.inner[15]._super._super, arg1.inner[16]._super._super, arg1.inner[17]._super._super, - arg1.inner[18]._super._super, arg1.inner[19]._super._super, arg1.inner[20]._super._super, - arg1.inner[21]._super._super, arg1.inner[22]._super._super, arg1.inner[23]._super._super}; - // PoseidonStoreOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:292) - PoseidonStateStruct x21 = exec_PoseidonState(ctx, - x19, - (x15 + (x16 * x14)), - Val(0), - Val(0), - Val(0), - arg1.mode._super._super, - x20, - ExtVal(0, 0, 0, 0), - LAYOUT_LOOKUP(layout2, _super)); - return x21; -} -PoseidonStateStruct exec_PoseidonDoOut(ExecContext& ctx, - RegStruct arg0, - PoseidonStateStruct arg1, - BoundLayout layout2) { - // PoseidonDoOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:296) - Val x3 = (Val(1) - arg1.checkOut._super._super); - PoseidonStateStruct x4; - if (to_size_t(arg1.checkOut._super._super)) { - PoseidonStateStruct x5 = - exec_PoseidonCheckOut(ctx, arg0, arg1, LAYOUT_LOOKUP(layout2, _super.arm0._super)); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra0.count._super), 0), - "PoseidonDoOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:296)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra1.count._super), 0), - "PoseidonDoOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:296)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra2.count._super), 0), - "PoseidonDoOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:296)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra3.count._super), 0), - "PoseidonDoOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:296)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra4.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra4.count._super), 0), - "PoseidonDoOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:296)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra5.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra5.count._super), 0), - "PoseidonDoOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:296)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra6.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra6.count._super), 0), - "PoseidonDoOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:296)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra7.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra7.count._super), 0), - "PoseidonDoOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:296)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra8.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra8.count._super), 0), - "PoseidonDoOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:296)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra9.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra9.count._super), 0), - "PoseidonDoOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:296)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra10.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra10.count._super), 0), - "PoseidonDoOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:296)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra11.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra11.count._super), 0), - "PoseidonDoOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:296)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra12.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra12.count._super), 0), - "PoseidonDoOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:296)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra13.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra13.count._super), 0), - "PoseidonDoOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:296)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra14.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra14.count._super), 0), - "PoseidonDoOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:296)"); - STORE(LAYOUT_LOOKUP(layout2, _super.arm0._extra15.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, _super.arm0._extra15.count._super), 0), - "PoseidonDoOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:296)"); - x4 = x5; - } else if (to_size_t(x3)) { - PoseidonStateStruct x6 = - exec_PoseidonStoreOut(ctx, arg0, arg1, LAYOUT_LOOKUP(layout2, _super.arm1)); - x4 = x6; - } else { - assert(0 && "Reached unreachable mux arm"); - } - PoseidonStateStruct x7 = back_PoseidonState(ctx, 0, LAYOUT_LOOKUP(layout2, _super._super)); - return x7; -} -PoseidonStateStruct exec_PoseidonStoreState(ExecContext& ctx, - RegStruct arg0, - PoseidonStateStruct arg1, - BoundLayout layout2) { - // PoseidonStoreState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:300) - PoseidonStoreState__0Struct8Array x3 = - map(Val8Array{Val(0), Val(1), Val(2), Val(3), Val(4), Val(5), Val(6), Val(7)}, - LAYOUT_LOOKUP(layout2, _1), - ([&](Val8Array::value_type x4, - BoundLayout x5) { - // PoseidonStoreState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:302) - Val x6 = bitAnd(arg1.inner[to_size_t((x4 + Val(16)))]._super._super, Val(65535)); - NondetRegStruct x7 = exec_NondetU16Reg(ctx, x6, LAYOUT_LOOKUP(x5, low)); - // PoseidonStoreState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:303) - Val x8 = (arg1.inner[to_size_t((x4 + Val(16)))]._super._super - x7._super); - U16RegStruct x9 = exec_U16Reg(ctx, (x8 * Val(2013235201)), LAYOUT_LOOKUP(x5, high)); - // PoseidonStoreState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:304) - Val x10 = (arg1.stateAddr._super._super + x4); - MemoryWriteStruct x11 = - exec_MemoryWrite(ctx, - arg0, - x10, - ValU32Struct{.low = x7._super, .high = x9._super}, - LAYOUT_LOOKUP(x5, _0)); - return PoseidonStoreState__0Struct{}; - })); - // PoseidonOpDef(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:8) - // GetDef(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:72) - // PoseidonStoreState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:306) - PoseidonOpDefStruct x12 = PoseidonOpDefStruct{.hasState = arg1.hasState._super._super, - .stateAddr = arg1.stateAddr._super._super, - .bufOutAddr = arg1.bufOutAddr._super._super, - .isElem = arg1.isElem._super._super, - .checkOut = arg1.checkOut._super._super, - .loadTxType = arg1.loadTxType._super._super}; - // PoseidonStoreState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:299) - Val24Array x13 = Val24Array{ - arg1.inner[0]._super._super, arg1.inner[1]._super._super, arg1.inner[2]._super._super, - arg1.inner[3]._super._super, arg1.inner[4]._super._super, arg1.inner[5]._super._super, - arg1.inner[6]._super._super, arg1.inner[7]._super._super, arg1.inner[8]._super._super, - arg1.inner[9]._super._super, arg1.inner[10]._super._super, arg1.inner[11]._super._super, - arg1.inner[12]._super._super, arg1.inner[13]._super._super, arg1.inner[14]._super._super, - arg1.inner[15]._super._super, arg1.inner[16]._super._super, arg1.inner[17]._super._super, - arg1.inner[18]._super._super, arg1.inner[19]._super._super, arg1.inner[20]._super._super, - arg1.inner[21]._super._super, arg1.inner[22]._super._super, arg1.inner[23]._super._super}; - // PoseidonStoreState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:306) - PoseidonStateStruct x14 = exec_PoseidonState(ctx, - x12, - Val(32), - Val(0), - Val(0), - Val(0), - arg1.mode._super._super, - x13, - ExtVal(0, 0, 0, 0), - LAYOUT_LOOKUP(layout2, _super)); - return x14; -} -IsU24Struct exec_IsU24(ExecContext& ctx, Val arg0, BoundLayout layout1) { - // IsU24(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:320) - NondetRegStruct x2 = - exec_NondetU16Reg(ctx, bitAnd(arg0, Val(65535)), LAYOUT_LOOKUP(layout1, low16)); - // IsU24(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:321) - U8RegStruct x3 = - exec_U8Reg(ctx, ((arg0 - x2._super) * Val(2013235201)), LAYOUT_LOOKUP(layout1, _0)); - return IsU24Struct{}; -} -PoseidonStateStruct exec_PoseidonPagingLoadNode(ExecContext& ctx, - RegStruct arg0, - Val arg1, - BoundLayout layout2) { - // PoseidonOpDef(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:8) - // PoseidonPagingLoadNode(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:325) - PoseidonOpDefStruct x3 = PoseidonOpDefStruct{.hasState = Val(0), - .stateAddr = Val(0), - .bufOutAddr = (Val(1140850688) - (arg1 * Val(8))), - .isElem = Val(1), - .checkOut = Val(1), - .loadTxType = Val(1)}; - // NodeIdxToAddr(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:317) - // PoseidonPagingLoadNode(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:337) - Val x4 = (((arg1 * Val(2)) + Val(1)) * Val(8)); - // PoseidonPagingLoadNode(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:333) - PoseidonStateStruct x5 = - exec_PoseidonState(ctx, - x3, - Val(18), - Val(0), - (Val(1140850688) - x4), - Val(1), - Val(0), - Val24Array{Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), - Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), - Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0)}, - ExtVal(0, 0, 0, 0), - layout2); - return x5; -} -PoseidonStateStruct exec_PoseidonPagingLoadPage(ExecContext& ctx, - RegStruct arg0, - Val arg1, - BoundLayout layout2) { - // PoseidonOpDef(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:8) - // PoseidonPagingLoadPage(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:347) - PoseidonOpDefStruct x3 = PoseidonOpDefStruct{.hasState = Val(0), - .stateAddr = Val(0), - .bufOutAddr = (Val(1140850688) - (arg1 * Val(8))), - .isElem = Val(0), - .checkOut = Val(1), - .loadTxType = Val(1)}; - // PoseidonPagingLoadPage(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:355) - PoseidonStateStruct x4 = - exec_PoseidonState(ctx, - x3, - Val(18), - Val(0), - ((arg1 - Val(4194304)) * Val(256)), - Val(32), - Val(1), - Val24Array{Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), - Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), - Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0)}, - ExtVal(0, 0, 0, 0), - layout2); - return x4; -} -PoseidonStateStruct exec_PoseidonPagingLoadDone(ExecContext& ctx, - BoundLayout layout0) { - // PoseidonPagingLoadDone(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:369) - PoseidonStateStruct x1 = - exec_PoseidonState(ctx, - PoseidonOpDefStruct{.hasState = Val(0), - .stateAddr = Val(0), - .bufOutAddr = Val(1073741824), - .isElem = Val(0), - .checkOut = Val(0), - .loadTxType = Val(0)}, - Val(1), - Val(0), - Val(0), - Val(0), - Val(2), - Val24Array{Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), - Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), - Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0)}, - ExtVal(0, 0, 0, 0), - layout0); - return x1; -} -PoseidonStateStruct exec_PoseidonPagingStoreNode(ExecContext& ctx, - RegStruct arg0, - Val arg1, - BoundLayout layout2) { - // PoseidonOpDef(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:8) - // PoseidonPagingStoreNode(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:373) - PoseidonOpDefStruct x3 = PoseidonOpDefStruct{.hasState = Val(0), - .stateAddr = Val(0), - .bufOutAddr = (Val(1140850688) - (arg1 * Val(8))), - .isElem = Val(1), - .checkOut = Val(0), - .loadTxType = Val(2)}; - // NodeIdxToAddr(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:317) - // PoseidonPagingStoreNode(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:385) - Val x4 = (((arg1 * Val(2)) + Val(1)) * Val(8)); - // PoseidonPagingStoreNode(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:381) - PoseidonStateStruct x5 = - exec_PoseidonState(ctx, - x3, - Val(18), - Val(0), - (Val(1140850688) - x4), - Val(1), - Val(4), - Val24Array{Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), - Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), - Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0)}, - ExtVal(0, 0, 0, 0), - layout2); - return x5; -} -PoseidonStateStruct exec_PoseidonPagingStorePage(ExecContext& ctx, - RegStruct arg0, - Val arg1, - BoundLayout layout2) { - // PoseidonOpDef(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:8) - // PoseidonPagingStorePage(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:395) - PoseidonOpDefStruct x3 = PoseidonOpDefStruct{.hasState = Val(0), - .stateAddr = Val(0), - .bufOutAddr = (Val(1140850688) - (arg1 * Val(8))), - .isElem = Val(0), - .checkOut = Val(0), - .loadTxType = Val(2)}; - // PoseidonPagingStorePage(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:403) - PoseidonStateStruct x4 = - exec_PoseidonState(ctx, - x3, - Val(18), - Val(0), - ((arg1 - Val(4194304)) * Val(256)), - Val(32), - Val(3), - Val24Array{Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), - Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), - Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0)}, - ExtVal(0, 0, 0, 0), - layout2); - return x4; -} -PoseidonStateStruct exec_PoseidonPagingStoreDone(ExecContext& ctx, - BoundLayout layout0) { - // PoseidonPagingStoreDone(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:417) - PoseidonStateStruct x1 = - exec_PoseidonState(ctx, - PoseidonOpDefStruct{.hasState = Val(0), - .stateAddr = Val(0), - .bufOutAddr = Val(1140850688), - .isElem = Val(0), - .checkOut = Val(0), - .loadTxType = Val(0)}, - Val(5), - Val(0), - Val(0), - Val(0), - Val(5), - Val24Array{Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), - Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), - Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0), Val(0)}, - ExtVal(0, 0, 0, 0), - layout0); - return x1; -} -OneHot_6_Struct exec_OneHot_6_(ExecContext& ctx, Val arg0, BoundLayout layout1) { - // OneHot(zirgen/circuit/rv32im/v2/dsl/one_hot.zir:7) - NondetRegStruct6Array x2 = - map(Val6Array{Val(0), Val(1), Val(2), Val(3), Val(4), Val(5)}, - LAYOUT_LOOKUP(layout1, _super), - ([&](Val6Array::value_type x3, BoundLayout x4) { - NondetRegStruct x5 = exec_NondetBitReg(ctx, isz((x3 - arg0)), x4); - return x5; - })); - // OneHot(zirgen/circuit/rv32im/v2/dsl/one_hot.zir:9) - Val x6 = (x2[0]._super + x2[1]._super); - Val x7 = ((x6 + x2[2]._super) + x2[3]._super); - Val x8 = ((x7 + x2[4]._super) + x2[5]._super); - EQZ((x8 - Val(1)), "OneHot(zirgen/circuit/rv32im/v2/dsl/one_hot.zir:9)"); - // OneHot(zirgen/circuit/rv32im/v2/dsl/one_hot.zir:11) - Val x9 = (x2[2]._super * Val(2)); - Val x10 = (x2[3]._super * Val(3)); - Val x11 = (x2[4]._super * Val(4)); - Val x12 = (x2[5]._super * Val(5)); - Val x13 = (x2[1]._super + x9); - Val x14 = (((x13 + x10) + x11) + x12); - EQZ((x14 - arg0), "OneHot(zirgen/circuit/rv32im/v2/dsl/one_hot.zir:11)"); - return OneHot_6_Struct{._super = x2, .bits = x2}; -} -PoseidonStateStruct exec_PoseidonPaging(ExecContext& ctx, - RegStruct arg0, - Val arg1, - PoseidonStateStruct arg2, - BoundLayout layout3) { - // NodeAddrToIdx(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:316) - // PoseidonPaging(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:421) - Val x4 = (Val(1140850688) - arg2.bufOutAddr._super._super); - // Div(:19) - Val x5 = (x4 * Val(1761607681)); - // nextPagingIdx(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:314) - // PoseidonPaging(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:422) - auto [x6, x7] = INVOKE_EXTERN(ctx, nextPagingIdx); - // PoseidonPaging(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:423) - NondetRegStruct x8 = exec_NondetReg(ctx, x6, LAYOUT_LOOKUP(layout3, curIdx)); - // PoseidonPaging(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:424) - NondetRegStruct x9 = exec_NondetReg(ctx, x7, LAYOUT_LOOKUP(layout3, curMode)); - // PoseidonPaging(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:425) - OneHot_6_Struct x10 = exec_OneHot_6_(ctx, x9._super, LAYOUT_LOOKUP(layout3, modeSplit)); - // PoseidonPaging(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:426) - Val x11 = (x10.bits[0]._super + x10.bits[1]._super); - Val x12 = (x11 + x10.bits[2]._super); - // PoseidonPaging(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:427) - IsU24Struct x13 = exec_IsU24(ctx, x8._super, LAYOUT_LOOKUP(layout3, _0)); - // PoseidonPaging(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:428) - ComponentStruct x14 = ComponentStruct{}; - ComponentStruct x15; - if (to_size_t(x12)) { - // PoseidonPaging(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:429) - IsU24Struct x16 = - exec_IsU24(ctx, (x8._super - (x5 + Val(1))), LAYOUT_LOOKUP(layout3, _3.arm0._0)); - x15 = x14; - } else if (to_size_t((Val(1) - x12))) { - // PoseidonPaging(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:431) - IsU24Struct x17 = - exec_IsU24(ctx, ((x5 - Val(1)) - x8._super), LAYOUT_LOOKUP(layout3, _3.arm1._0)); - x15 = x14; - } else { - assert(0 && "Reached unreachable mux arm"); - } - // PoseidonPaging(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:434) - BitRegStruct x18 = exec_BitReg(ctx, (x9._super - arg1), LAYOUT_LOOKUP(layout3, _4)); - PoseidonStateStruct x19; - if (to_size_t(x10._super[0]._super)) { - // PoseidonPaging(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:436) - PoseidonStateStruct x20 = - exec_PoseidonPagingLoadNode(ctx, arg0, x8._super, LAYOUT_LOOKUP(layout3, _super.arm0)); - x19 = x20; - } else if (to_size_t(x10._super[1]._super)) { - // PoseidonPaging(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:437) - PoseidonStateStruct x21 = - exec_PoseidonPagingLoadPage(ctx, arg0, x8._super, LAYOUT_LOOKUP(layout3, _super.arm1)); - x19 = x21; - } else if (to_size_t(x10._super[2]._super)) { - // PoseidonPaging(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:438) - PoseidonStateStruct x22 = exec_PoseidonPagingLoadDone(ctx, LAYOUT_LOOKUP(layout3, _super.arm2)); - x19 = x22; - } else if (to_size_t(x10._super[3]._super)) { - // PoseidonPaging(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:439) - PoseidonStateStruct x23 = - exec_PoseidonPagingStorePage(ctx, arg0, x8._super, LAYOUT_LOOKUP(layout3, _super.arm3)); - x19 = x23; - } else if (to_size_t(x10._super[4]._super)) { - // PoseidonPaging(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:440) - PoseidonStateStruct x24 = - exec_PoseidonPagingStoreNode(ctx, arg0, x8._super, LAYOUT_LOOKUP(layout3, _super.arm4)); - x19 = x24; - } else if (to_size_t(x10._super[5]._super)) { - // PoseidonPaging(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:441) - PoseidonStateStruct x25 = - exec_PoseidonPagingStoreDone(ctx, LAYOUT_LOOKUP(layout3, _super.arm5)); - x19 = x25; - } else { - assert(0 && "Reached unreachable mux arm"); - } - // PoseidonPaging(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:435) - PoseidonStateStruct x26 = back_PoseidonState(ctx, 0, LAYOUT_LOOKUP(layout3, _super._super)); - return x26; -} -InstOutputStruct exec_Poseidon0(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2, - GlobalBuf global3) { - PoseidonStateStruct x4; - if (to_size_t(arg1.minorOnehot._super[0]._super)) { - // Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:449) - PoseidonStateStruct x5 = exec_PoseidonEntry( - ctx, arg0, arg1.pcU32, arg1.mode, LAYOUT_LOOKUP(layout2, stateRedef.arm0._super)); - // Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448) - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra0.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra1.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra2.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra3.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra4.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra4.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra5.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra5.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra6.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra6.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra7.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra7.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra8.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra8.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra9.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra9.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra10.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra10.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra11.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra11.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra12.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra12.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra13.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra13.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra14.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra14.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra15.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra15.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra16.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra16.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra17.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra17.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra18.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra18.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra19.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra19.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra20.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra20.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra21.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra21.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra22.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra22.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra23.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra23.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra24.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra24.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra25.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra25.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra26.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra26.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra27.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra27.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra28.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra28.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra29.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm0._extra29.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - x4 = x5; - } else if (to_size_t(arg1.minorOnehot._super[1]._super)) { - // Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:450) - PoseidonStateStruct x6 = back_PoseidonState(ctx, 1, LAYOUT_LOOKUP(layout2, state)); - PoseidonStateStruct x7 = - exec_PoseidonLoadState(ctx, arg0, x6, LAYOUT_LOOKUP(layout2, stateRedef.arm1._super)); - // Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448) - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm1._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm1._extra0.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm1._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm1._extra1.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm1._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm1._extra2.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm1._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm1._extra3.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm1._extra4.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm1._extra4.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm1._extra5.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm1._extra5.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm1._extra6.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm1._extra6.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm1._extra7.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm1._extra7.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm1._extra8.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm1._extra8.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm1._extra9.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm1._extra9.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm1._extra10.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm1._extra10.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm1._extra11.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm1._extra11.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm1._extra12.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm1._extra12.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm1._extra13.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm1._extra13.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm1._extra14.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm1._extra14.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm1._extra15.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm1._extra15.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm1._extra16.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm1._extra16.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm1._extra17.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm1._extra17.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - x4 = x7; - } else if (to_size_t(arg1.minorOnehot._super[2]._super)) { - // Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:451) - PoseidonStateStruct x8 = back_PoseidonState(ctx, 1, LAYOUT_LOOKUP(layout2, state)); - PoseidonStateStruct x9 = - exec_PoseidonLoadIn(ctx, arg0, x8, LAYOUT_LOOKUP(layout2, stateRedef.arm2._super), global3); - // Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448) - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm2._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm2._extra0.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm2._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm2._extra1.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm2._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm2._extra2.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm2._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm2._extra3.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm2._extra4.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm2._extra4.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm2._extra5.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm2._extra5.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm2._extra6.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm2._extra6.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm2._extra7.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm2._extra7.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm2._extra8.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm2._extra8.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm2._extra9.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm2._extra9.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm2._extra10.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm2._extra10.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm2._extra11.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm2._extra11.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm2._extra12.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm2._extra12.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm2._extra13.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm2._extra13.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm2._extra14.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm2._extra14.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm2._extra15.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm2._extra15.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm2._extra16.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm2._extra16.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm2._extra17.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm2._extra17.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - x4 = x9; - } else if (to_size_t(arg1.minorOnehot._super[3]._super)) { - // Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:452) - PoseidonStateStruct x10 = - exec_PoseidonInvalid(ctx, LAYOUT_LOOKUP(layout2, stateRedef.arm3._super)); - // Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448) - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra0.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra1.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra2.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra3.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra4.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra4.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra5.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra5.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra6.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra6.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra7.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra7.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra8.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra8.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra9.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra9.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra10.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra10.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra11.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra11.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra12.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra12.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra13.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra13.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra14.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra14.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra15.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra15.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra16.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra16.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra17.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra17.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra18.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra18.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra19.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra19.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra20.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra20.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra21.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra21.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra22.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra22.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra23.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra23.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra24.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra24.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra25.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra25.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra26.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra26.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra27.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra27.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra28.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra28.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra29.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra29.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra30.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra30.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra31.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra31.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra32.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra32.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra33.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra33.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra34.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra34.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra35.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra35.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra36.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra36.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra37.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra37.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra38.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra38.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra39.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra39.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra40.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra40.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra41.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm3._extra41.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - x4 = x10; - } else if (to_size_t(arg1.minorOnehot._super[4]._super)) { - // Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:453) - PoseidonStateStruct x11 = - exec_PoseidonInvalid(ctx, LAYOUT_LOOKUP(layout2, stateRedef.arm4._super)); - // Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448) - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra0.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra1.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra2.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra3.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra4.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra4.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra5.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra5.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra6.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra6.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra7.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra7.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra8.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra8.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra9.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra9.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra10.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra10.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra11.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra11.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra12.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra12.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra13.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra13.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra14.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra14.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra15.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra15.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra16.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra16.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra17.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra17.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra18.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra18.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra19.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra19.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra20.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra20.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra21.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra21.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra22.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra22.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra23.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra23.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra24.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra24.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra25.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra25.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra26.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra26.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra27.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra27.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra28.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra28.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra29.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra29.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra30.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra30.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra31.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra31.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra32.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra32.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra33.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra33.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra34.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra34.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra35.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra35.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra36.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra36.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra37.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra37.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra38.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra38.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra39.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra39.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra40.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra40.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra41.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm4._extra41.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - x4 = x11; - } else if (to_size_t(arg1.minorOnehot._super[5]._super)) { - // Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:454) - PoseidonStateStruct x12 = back_PoseidonState(ctx, 1, LAYOUT_LOOKUP(layout2, state)); - PoseidonStateStruct x13 = - exec_PoseidonDoOut(ctx, arg0, x12, LAYOUT_LOOKUP(layout2, stateRedef.arm5._super)); - // Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448) - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm5._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm5._extra0.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm5._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm5._extra1.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - x4 = x13; - } else if (to_size_t(arg1.minorOnehot._super[6]._super)) { - // Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:455) - PoseidonStateStruct x14 = back_PoseidonState(ctx, 1, LAYOUT_LOOKUP(layout2, state)); - PoseidonStateStruct x15 = exec_PoseidonPaging( - ctx, arg0, arg1.mode, x14, LAYOUT_LOOKUP(layout2, stateRedef.arm6._super)); - // Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448) - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra0.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra1.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra2.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra2.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra3.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra3.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra4.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra4.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra5.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra5.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra6.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra6.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra7.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra7.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra8.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra8.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra9.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra9.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra10.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra10.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra11.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra11.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra12.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra12.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra13.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra13.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra14.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra14.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra15.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra15.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra16.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra16.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra17.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra17.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra18.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra18.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra19.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra19.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra20.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra20.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra21.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra21.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra22.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra22.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra23.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra23.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra24.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra24.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra25.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra25.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra26.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra26.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra27.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra27.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra28.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra28.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra29.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra29.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra30.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra30.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra31.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra31.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra32.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra32.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra33.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra33.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra34.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra34.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra35.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra35.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra36.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra36.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra37.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm6._extra37.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - x4 = x15; - } else if (to_size_t(arg1.minorOnehot._super[7]._super)) { - // Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:456) - PoseidonStateStruct x16 = back_PoseidonState(ctx, 1, LAYOUT_LOOKUP(layout2, state)); - PoseidonStateStruct x17 = - exec_PoseidonStoreState(ctx, arg0, x16, LAYOUT_LOOKUP(layout2, stateRedef.arm7._super)); - // Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448) - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm7._extra0.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm7._extra0.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - STORE(LAYOUT_LOOKUP(layout2, stateRedef.arm7._extra1.count._super), Val(0)); - EQZ(LOAD(LAYOUT_LOOKUP(layout2, stateRedef.arm7._extra1.count._super), 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)"); - x4 = x17; - } else { - assert(0 && "Reached unreachable mux arm"); - } - // GetDiffCount(zirgen/circuit/rv32im/v2/dsl/mem.zir:22) - // Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:458) - Val x18 = INVOKE_EXTERN(ctx, getDiffCount, arg0._super._super); - CycleArgStruct x19 = - exec_CycleArg(ctx, neg_0(x18), arg0._super._super, LAYOUT_LOOKUP(layout2, arg)); - // Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:460) - Val x20 = (x19.cycle._super - arg0._super._super); - EQZ(x20, "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:460)"); - // Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448) - PoseidonStateStruct x21 = back_PoseidonState(ctx, 0, LAYOUT_LOOKUP(layout2, stateRedef._super)); - // InstOutput(zirgen/circuit/rv32im/v2/dsl/inst.zir:46) - // Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:461) - InstOutputStruct x22 = InstOutputStruct{.newPc = arg1.pcU32, - .newState = x21.nextState._super._super, - .newMode = x21.mode._super._super}; - return x22; -} -InstOutputStruct exec_Poseidon1(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2) { - PoseidonStateStruct x3; - if (to_size_t(arg1.minorOnehot._super[0]._super)) { - // Poseidon1(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:468) - PoseidonStateStruct x4 = back_PoseidonState(ctx, 1, LAYOUT_LOOKUP(layout2, state)); - PoseidonStateStruct x5 = - exec_PoseidonExtRound(ctx, x4, LAYOUT_LOOKUP(layout2, stateRedef.arm0)); - x3 = x5; - } else if (to_size_t(arg1.minorOnehot._super[1]._super)) { - // Poseidon1(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:469) - PoseidonStateStruct x6 = back_PoseidonState(ctx, 1, LAYOUT_LOOKUP(layout2, state)); - PoseidonStateStruct x7 = - exec_PoseidonIntRounds(ctx, x6, LAYOUT_LOOKUP(layout2, stateRedef.arm1)); - x3 = x7; - } else if (to_size_t(arg1.minorOnehot._super[2]._super)) { - // Poseidon1(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:470) - PoseidonStateStruct x8 = exec_PoseidonInvalid(ctx, LAYOUT_LOOKUP(layout2, stateRedef.arm2)); - x3 = x8; - } else if (to_size_t(arg1.minorOnehot._super[3]._super)) { - // Poseidon1(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:471) - PoseidonStateStruct x9 = exec_PoseidonInvalid(ctx, LAYOUT_LOOKUP(layout2, stateRedef.arm3)); - x3 = x9; - } else if (to_size_t(arg1.minorOnehot._super[4]._super)) { - // Poseidon1(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:472) - PoseidonStateStruct x10 = exec_PoseidonInvalid(ctx, LAYOUT_LOOKUP(layout2, stateRedef.arm4)); - x3 = x10; - } else if (to_size_t(arg1.minorOnehot._super[5]._super)) { - // Poseidon1(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:473) - PoseidonStateStruct x11 = exec_PoseidonInvalid(ctx, LAYOUT_LOOKUP(layout2, stateRedef.arm5)); - x3 = x11; - } else if (to_size_t(arg1.minorOnehot._super[6]._super)) { - // Poseidon1(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:474) - PoseidonStateStruct x12 = exec_PoseidonInvalid(ctx, LAYOUT_LOOKUP(layout2, stateRedef.arm6)); - x3 = x12; - } else if (to_size_t(arg1.minorOnehot._super[7]._super)) { - // Poseidon1(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:475) - PoseidonStateStruct x13 = exec_PoseidonInvalid(ctx, LAYOUT_LOOKUP(layout2, stateRedef.arm7)); - x3 = x13; - } else { - assert(0 && "Reached unreachable mux arm"); - } - // GetDiffCount(zirgen/circuit/rv32im/v2/dsl/mem.zir:22) - // Poseidon1(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:477) - Val x14 = INVOKE_EXTERN(ctx, getDiffCount, arg0._super._super); - CycleArgStruct x15 = - exec_CycleArg(ctx, neg_0(x14), arg0._super._super, LAYOUT_LOOKUP(layout2, arg)); - // Poseidon1(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:479) - Val x16 = (x15.cycle._super - arg0._super._super); - EQZ(x16, "Poseidon1(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:479)"); - // Poseidon1(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:467) - PoseidonStateStruct x17 = back_PoseidonState(ctx, 0, LAYOUT_LOOKUP(layout2, stateRedef._super)); - // InstOutput(zirgen/circuit/rv32im/v2/dsl/inst.zir:46) - // Poseidon1(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:480) - InstOutputStruct x18 = InstOutputStruct{.newPc = arg1.pcU32, - .newState = x17.nextState._super._super, - .newMode = x17.mode._super._super}; - return x18; -} -OneHot_11_Struct -exec_OneHot_11_(ExecContext& ctx, Val arg0, BoundLayout layout1) { - // OneHot(zirgen/circuit/rv32im/v2/dsl/one_hot.zir:7) - NondetRegStruct11Array x2 = map( - Val11Array{ - Val(0), Val(1), Val(2), Val(3), Val(4), Val(5), Val(6), Val(7), Val(8), Val(9), Val(10)}, - LAYOUT_LOOKUP(layout1, _super), - ([&](Val11Array::value_type x3, BoundLayout x4) { - NondetRegStruct x5 = exec_NondetBitReg(ctx, isz((x3 - arg0)), x4); - return x5; - })); - // OneHot(zirgen/circuit/rv32im/v2/dsl/one_hot.zir:9) - Val x6 = (x2[0]._super + x2[1]._super); - Val x7 = ((x6 + x2[2]._super) + x2[3]._super); - Val x8 = ((x7 + x2[4]._super) + x2[5]._super); - Val x9 = ((x8 + x2[6]._super) + x2[7]._super); - Val x10 = ((x9 + x2[8]._super) + x2[9]._super); - EQZ(((x10 + x2[10]._super) - Val(1)), "OneHot(zirgen/circuit/rv32im/v2/dsl/one_hot.zir:9)"); - // OneHot(zirgen/circuit/rv32im/v2/dsl/one_hot.zir:11) - Val x11 = (x2[2]._super * Val(2)); - Val x12 = (x2[3]._super * Val(3)); - Val x13 = (x2[4]._super * Val(4)); - Val x14 = (x2[5]._super * Val(5)); - Val x15 = (x2[6]._super * Val(6)); - Val x16 = (x2[7]._super * Val(7)); - Val x17 = (x2[8]._super * Val(8)); - Val x18 = (x2[9]._super * Val(9)); - Val x19 = (x2[10]._super * Val(10)); - Val x20 = (x2[1]._super + x11); - Val x21 = (((x20 + x12) + x13) + x14); - Val x22 = (((x21 + x15) + x16) + x17); - Val x23 = (((x22 + x18) + x19) - arg0); - EQZ(x23, "OneHot(zirgen/circuit/rv32im/v2/dsl/one_hot.zir:11)"); - return OneHot_11_Struct{._super = x2}; -} -TopStruct exec_Top(ExecContext& ctx, BoundLayout layout0, GlobalBuf global1) { - // IsFirstCycle(zirgen/circuit/rv32im/v2/dsl/top.zir:17) - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:47) - Val x2 = INVOKE_EXTERN(ctx, isFirstCycle_0); - NondetRegStruct x3 = exec_NondetReg(ctx, x2, LAYOUT_LOOKUP(layout0, isFirstCycle)); - // GetCycle(zirgen/circuit/rv32im/v2/dsl/top.zir:18) - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:48) - Val x4 = INVOKE_EXTERN(ctx, getCycle); - NondetRegStruct x5 = exec_NondetReg(ctx, x4, LAYOUT_LOOKUP(layout0, cycleND)); - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:49) - RegStruct x6 = exec_Reg(ctx, x5._super, LAYOUT_LOOKUP(layout0, cycle)); - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:52) - Val x7 = (Val(1) - x3._super); - RegStruct x8 = back_Reg(ctx, 1, LAYOUT_LOOKUP(layout0, nextPcLow)); - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:53) - RegStruct x9 = back_Reg(ctx, 1, LAYOUT_LOOKUP(layout0, nextPcHigh)); - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:56) - RegStruct x10 = back_Reg(ctx, 1, LAYOUT_LOOKUP(layout0, nextState_0)); - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:58) - RegStruct x11 = back_Reg(ctx, 1, LAYOUT_LOOKUP(layout0, nextMachineMode)); - // GetMajorMinor(zirgen/circuit/rv32im/v2/dsl/top.zir:25) - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:60) - auto [x12, x13] = INVOKE_EXTERN(ctx, getMajorMinor); - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:62) - NondetRegStruct x14 = exec_NondetReg(ctx, x12, LAYOUT_LOOKUP(layout0, major)); - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:63) - NondetRegStruct x15 = exec_NondetReg(ctx, x13, LAYOUT_LOOKUP(layout0, minor)); - // Log(:22) - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:64) - INVOKE_EXTERN(ctx, log, "Major/Minor = ", std::initializer_list{x14._super, x15._super}); - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:66) - InstInputStruct x16 = - exec_InstInput(ctx, - x6._super._super, - x14._super, - x15._super, - ValU32Struct{.low = (x7 * x8._super._super), .high = (x7 * x9._super._super)}, - (x7 * x10._super._super), - ((x7 * x11._super._super) + x3._super), - LAYOUT_LOOKUP(layout0, instInput)); - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:68) - OneHot_11_Struct x17 = exec_OneHot_11_(ctx, x14._super, LAYOUT_LOOKUP(layout0, majorOnehot)); - InstOutputStruct x18; - if (to_size_t(x17._super[0]._super)) { - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:70) - InstOutputStruct x19 = exec_Misc0(ctx, x6, x16, LAYOUT_LOOKUP(layout0, instResult.arm0)); - x18 = x19; - } else if (to_size_t(x17._super[1]._super)) { - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:71) - InstOutputStruct x20 = exec_Misc1(ctx, x6, x16, LAYOUT_LOOKUP(layout0, instResult.arm1)); - x18 = x20; - } else if (to_size_t(x17._super[2]._super)) { - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:72) - InstOutputStruct x21 = exec_Misc2(ctx, x6, x16, LAYOUT_LOOKUP(layout0, instResult.arm2)); - x18 = x21; - } else if (to_size_t(x17._super[3]._super)) { - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:73) - InstOutputStruct x22 = exec_Mul0(ctx, x6, x16, LAYOUT_LOOKUP(layout0, instResult.arm3)); - x18 = x22; - } else if (to_size_t(x17._super[4]._super)) { - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:74) - InstOutputStruct x23 = exec_Div0(ctx, x6, x16, LAYOUT_LOOKUP(layout0, instResult.arm4)); - x18 = x23; - } else if (to_size_t(x17._super[5]._super)) { - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:75) - InstOutputStruct x24 = exec_Mem0(ctx, x6, x16, LAYOUT_LOOKUP(layout0, instResult.arm5)); - x18 = x24; - } else if (to_size_t(x17._super[6]._super)) { - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:76) - InstOutputStruct x25 = exec_Mem1(ctx, x6, x16, LAYOUT_LOOKUP(layout0, instResult.arm6)); - x18 = x25; - } else if (to_size_t(x17._super[7]._super)) { - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:77) - InstOutputStruct x26 = - exec_Control0(ctx, x6, x16, LAYOUT_LOOKUP(layout0, instResult.arm7), global1); - x18 = x26; - } else if (to_size_t(x17._super[8]._super)) { - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:78) - InstOutputStruct x27 = - exec_ECall0(ctx, x6, x16, LAYOUT_LOOKUP(layout0, instResult.arm8), global1); - x18 = x27; - } else if (to_size_t(x17._super[9]._super)) { - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:79) - InstOutputStruct x28 = - exec_Poseidon0(ctx, x6, x16, LAYOUT_LOOKUP(layout0, instResult.arm9), global1); - x18 = x28; - } else if (to_size_t(x17._super[10]._super)) { - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:80) - InstOutputStruct x29 = exec_Poseidon1(ctx, x6, x16, LAYOUT_LOOKUP(layout0, instResult.arm10)); - x18 = x29; - } else { - assert(0 && "Reached unreachable mux arm"); - } - // Div(:19) - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:83) - Val x30 = (x18.newPc.low * Val(1509949441)); - Val x31 = (x18.newPc.high * Val(16384)); - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:84) - std::initializer_list x32 = - std::initializer_list{x6._super._super, (x30 + x31), x18.newState, x18.newMode}; - // Log(:22) - INVOKE_EXTERN(ctx, log, "Cycle, pc, state, mm", x32); - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:85) - RegStruct x33 = exec_Reg(ctx, x18.newPc.low, LAYOUT_LOOKUP(layout0, nextPcLow)); - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:86) - RegStruct x34 = exec_Reg(ctx, x18.newPc.high, LAYOUT_LOOKUP(layout0, nextPcHigh)); - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:87) - RegStruct x35 = exec_Reg(ctx, x18.newState, LAYOUT_LOOKUP(layout0, nextState_0)); - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:88) - RegStruct x36 = exec_Reg(ctx, x18.newMode, LAYOUT_LOOKUP(layout0, nextMachineMode)); - return TopStruct{}; -} -void step_Top(ExecContext& ctx, MutableBuf data0, GlobalBuf global1) { - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:27) - BoundLayout x2 = BIND_LAYOUT(kLayout_Top, data0); - TopStruct x3 = exec_Top(ctx, x2, global1); - return; -} -ComponentStruct exec_TopAccum(ExecContext& ctx, - BoundLayout arg0, - BoundLayout layout1, - GlobalBuf mix2) { - // zirgen/dsl/passes/GenerateAccum.cpp:526 - BoundLayout<_mixLayout> x3 = BIND_LAYOUT(kLayoutMix, mix2); - // zirgen/dsl/passes/GenerateAccum.cpp:624 - ComponentStruct x4 = ComponentStruct{}; - ComponentStruct x5; - if (to_size_t(LOAD( - LAYOUT_LOOKUP(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(arg0, instResult._selector), 0), _super), - 0))) { - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x6 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0._super.writeData.low16.arg.val._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x7 = (x6 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x8 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0._super.writeData.low16.arg.count._super), 0) * - inv_0(x7)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x9 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 18), 1) + x8); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x10 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0._super.writeData.high16.arg.val._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x11 = (x10 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x12 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0._super.writeData.high16.arg.count._super), 0) * - inv_0(x11)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x13 = (x7 * x11); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x14 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0._super.writeData.low16.arg.count._super), 0) * - x11); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x15 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0._super.pcNorm.low16.arg.val._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x16 = (x15 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x17 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0._super.pcNorm.low16.arg.count._super), 0) * - inv_0(x16)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x18 = ((x9 + x12) + x17); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 0), x18); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x19 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 0), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 18), 1)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x20 = - (((x19 * (x13 * x16)) - (x14 * x16)) - - ((x7 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0._super.writeData.high16.arg.count._super), 0)) * - x16)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x20 - - (x13 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0._super.pcNorm.low16.arg.count._super), 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x21 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0._super.pcNorm.high16.arg.val._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x22 = (x21 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x23 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0._super.pcNorm.high16.arg.count._super), 0) * - inv_0(x22)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x24 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0._super._0._0.io.oldTxn.addr._super), 0)); - ExtVal x25 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0._super._0._0.io.oldTxn.cycle._super), 0)); - ExtVal x26 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0._super._0._0.io.oldTxn.dataLow._super), 0)); - ExtVal x27 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0._super._0._0.io.oldTxn.dataHigh._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x28 = (((x24 + x25) + x26) + x27); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x29 = (x28 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x30 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0._super._0._0.io.oldTxn.count._super), 0) * - inv_0(x29)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x31 = (x22 * x29); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x32 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0._super.pcNorm.high16.arg.count._super), 0) * x29); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x33 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0._super._0._0.io.newTxn.addr._super), 0)); - ExtVal x34 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0._super._0._0.io.newTxn.cycle._super), 0)); - ExtVal x35 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0._super._0._0.io.newTxn.dataLow._super), 0)); - ExtVal x36 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0._super._0._0.io.newTxn.dataHigh._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x37 = (((x33 + x34) + x35) + x36); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x38 = (x37 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x39 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0._super._0._0.io.newTxn.count._super), 0) * - inv_0(x38)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x40 = (((x18 + x23) + x30) + x39); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 1), x40); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x41 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 1), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 0), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x42 = - (((x41 * (x31 * x38)) - (x32 * x38)) - - ((x22 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0._super._0._0.io.oldTxn.count._super), 0)) * - x38)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x42 - - (x31 * LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0._super._0._0.io.newTxn.count._super), 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x43 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0._super._0._0._0._0.arg.cycle._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x44 = (x43 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x45 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0._super._0._0._0._0.arg.count._super), 0) * - inv_0(x44)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x46 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.decoded.arg.cycle._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x47 = (x46 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x48 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.decoded.arg.count._super), 0) * inv_0(x47)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x49 = (x44 * x47); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x50 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0._super._0._0._0._0.arg.count._super), 0) * x47); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x51 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - arg0, instResult.arm0.input.decoded.pcAddr.upperDiff.ret.arg.val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x52 = (x51 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x53 = - (LOAD(LAYOUT_LOOKUP(arg0, - instResult.arm0.input.decoded.pcAddr.upperDiff.ret.arg.count._super), - 0) * - inv_0(x52)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x54 = (((x40 + x45) + x48) + x53); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 2), x54); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x55 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 2), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 1), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x56 = - (((x55 * (x49 * x52)) - (x50 * x52)) - - ((x44 * LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.decoded.arg.count._super), 0)) * - x52)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x56 - - (x49 * LOAD(LAYOUT_LOOKUP( - arg0, instResult.arm0.input.decoded.pcAddr.upperDiff.ret.arg.count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x57 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.decoded.pcAddr.med14.arg.val._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x58 = (x57 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x59 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.decoded.pcAddr.med14.arg.count._super), 0) * - inv_0(x58)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x60 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.decoded.loadInst.io.oldTxn.addr._super), - 0)); - ExtVal x61 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.decoded.loadInst.io.oldTxn.cycle._super), - 0)); - ExtVal x62 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.decoded.loadInst.io.oldTxn.dataLow._super), - 0)); - ExtVal x63 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.decoded.loadInst.io.oldTxn.dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x64 = (((x60 + x61) + x62) + x63); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x65 = (x64 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x66 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.decoded.loadInst.io.oldTxn.count._super), - 0) * - inv_0(x65)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x67 = (x58 * x65); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x68 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.decoded.pcAddr.med14.arg.count._super), 0) * - x65); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x69 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.decoded.loadInst.io.newTxn.addr._super), - 0)); - ExtVal x70 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.decoded.loadInst.io.newTxn.cycle._super), - 0)); - ExtVal x71 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.decoded.loadInst.io.newTxn.dataLow._super), - 0)); - ExtVal x72 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.decoded.loadInst.io.newTxn.dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x73 = (((x69 + x70) + x71) + x72); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x74 = (x73 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x75 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.decoded.loadInst.io.newTxn.count._super), - 0) * - inv_0(x74)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x76 = (((x54 + x59) + x66) + x75); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 3), x76); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x77 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 3), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 2), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x78 = - (((x77 * (x67 * x74)) - (x68 * x74)) - - ((x58 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.decoded.loadInst.io.oldTxn.count._super), - 0)) * - x74)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x78 - (x67 * LOAD(LAYOUT_LOOKUP( - arg0, instResult.arm0.input.decoded.loadInst.io.newTxn.count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x79 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.decoded.loadInst._0._0.arg.cycle._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x80 = (x79 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x81 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.decoded.loadInst._0._0.arg.count._super), - 0) * - inv_0(x80)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x82 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.rs1._super.io.oldTxn.addr._super), 0)); - ExtVal x83 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.rs1._super.io.oldTxn.cycle._super), 0)); - ExtVal x84 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.rs1._super.io.oldTxn.dataLow._super), 0)); - ExtVal x85 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.rs1._super.io.oldTxn.dataHigh._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x86 = (((x82 + x83) + x84) + x85); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x87 = (x86 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x88 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.rs1._super.io.oldTxn.count._super), 0) * - inv_0(x87)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x89 = (x80 * x87); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x90 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.decoded.loadInst._0._0.arg.count._super), - 0) * - x87); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x91 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.rs1._super.io.newTxn.addr._super), 0)); - ExtVal x92 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.rs1._super.io.newTxn.cycle._super), 0)); - ExtVal x93 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.rs1._super.io.newTxn.dataLow._super), 0)); - ExtVal x94 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.rs1._super.io.newTxn.dataHigh._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x95 = (((x91 + x92) + x93) + x94); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x96 = (x95 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x97 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.rs1._super.io.newTxn.count._super), 0) * - inv_0(x96)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x98 = (((x76 + x81) + x88) + x97); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 4), x98); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x99 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 4), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 3), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x100 = - (((x99 * (x89 * x96)) - (x90 * x96)) - - ((x80 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.rs1._super.io.oldTxn.count._super), 0)) * - x96)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x100 - - (x89 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.rs1._super.io.newTxn.count._super), 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x101 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.rs1._super._0._0.arg.cycle._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x102 = (x101 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x103 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.rs1._super._0._0.arg.count._super), 0) * - inv_0(x102)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x104 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.rs2._super.io.oldTxn.addr._super), 0)); - ExtVal x105 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.rs2._super.io.oldTxn.cycle._super), 0)); - ExtVal x106 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.rs2._super.io.oldTxn.dataLow._super), 0)); - ExtVal x107 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.rs2._super.io.oldTxn.dataHigh._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x108 = (((x104 + x105) + x106) + x107); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x109 = (x108 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x110 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.rs2._super.io.oldTxn.count._super), 0) * - inv_0(x109)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x111 = (x102 * x109); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x112 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.rs1._super._0._0.arg.count._super), 0) * - x109); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x113 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.rs2._super.io.newTxn.addr._super), 0)); - ExtVal x114 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.rs2._super.io.newTxn.cycle._super), 0)); - ExtVal x115 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.rs2._super.io.newTxn.dataLow._super), 0)); - ExtVal x116 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.rs2._super.io.newTxn.dataHigh._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x117 = (((x113 + x114) + x115) + x116); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x118 = (x117 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x119 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.rs2._super.io.newTxn.count._super), 0) * - inv_0(x118)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x120 = (((x98 + x103) + x110) + x119); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 5), x120); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x121 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 5), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 4), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x122 = - (((x121 * (x111 * x118)) - (x112 * x118)) - - ((x102 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.rs2._super.io.oldTxn.count._super), 0)) * - x118)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x122 - - (x111 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.rs2._super.io.newTxn.count._super), 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x123 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.rs2._super._0._0.arg.cycle._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x124 = (x123 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x125 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.rs2._super._0._0.arg.count._super), 0) * - inv_0(x124)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x126 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm0._arguments_Misc0MiscOutput.argU16), 0), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x127 = (x126 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x128 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm0._arguments_Misc0MiscOutput.argU16), 0), - count._super), - 0) * - inv_0(x127)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x129 = (x124 * x127); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x130 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm0.input.rs2._super._0._0.arg.count._super), 0) * - x127); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x131 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm0._arguments_Misc0MiscOutput.argU16), 1), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x132 = (x131 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x133 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm0._arguments_Misc0MiscOutput.argU16), 1), - count._super), - 0) * - inv_0(x132)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x134 = (((x120 + x125) + x128) + x133); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 6), x134); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x135 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 6), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 5), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x136 = - (((x135 * (x129 * x132)) - (x130 * x132)) - - ((x124 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm0._arguments_Misc0MiscOutput.argU16), 0), - count._super), - 0)) * - x132)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x136 - - (x129 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm0._arguments_Misc0MiscOutput.argU16), 1), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x137 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm0._arguments_Misc0MiscOutput.argU16), 2), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x138 = (x137 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x139 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm0._arguments_Misc0MiscOutput.argU16), 2), - count._super), - 0) * - inv_0(x138)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x140 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm0._arguments_Misc0MiscOutput.argU16), 3), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x141 = (x140 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x142 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm0._arguments_Misc0MiscOutput.argU16), 3), - count._super), - 0) * - inv_0(x141)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x143 = (x138 * x141); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x144 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm0._arguments_Misc0MiscOutput.argU16), 2), - count._super), - 0) * - x141); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x145 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm0._arguments_Misc0MiscOutput.argU16), 4), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x146 = (x145 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x147 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm0._arguments_Misc0MiscOutput.argU16), 4), - count._super), - 0) * - inv_0(x146)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x148 = (((x134 + x139) + x142) + x147); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 7), x148); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x149 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 7), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 6), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x150 = - (((x149 * (x143 * x146)) - (x144 * x146)) - - ((x138 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm0._arguments_Misc0MiscOutput.argU16), 3), - count._super), - 0)) * - x146)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x150 - - (x143 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm0._arguments_Misc0MiscOutput.argU16), 4), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:122 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 18), x148); - // zirgen/dsl/passes/GenerateAccum.cpp:124 - ExtVal x151 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 18), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 7), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:125 - EQZ(x151, "zirgen/dsl/passes/GenerateAccum.cpp:125"); - x5 = x4; - } else if (to_size_t( - LOAD(LAYOUT_LOOKUP(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(arg0, instResult._selector), 1), - _super), - 0))) { - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x152 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1._super.writeData.low16.arg.val._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x153 = (x152 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x154 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1._super.writeData.low16.arg.count._super), 0) * - inv_0(x153)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x155 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 18), 1) + x154); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x156 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1._super.writeData.high16.arg.val._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x157 = (x156 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x158 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1._super.writeData.high16.arg.count._super), 0) * - inv_0(x157)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x159 = (x153 * x157); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x160 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1._super.writeData.low16.arg.count._super), 0) * - x157); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x161 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1._super.pcNorm.low16.arg.val._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x162 = (x161 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x163 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1._super.pcNorm.low16.arg.count._super), 0) * - inv_0(x162)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x164 = ((x155 + x158) + x163); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 0), x164); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x165 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 0), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 18), 1)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x166 = - (((x165 * (x159 * x162)) - (x160 * x162)) - - ((x153 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1._super.writeData.high16.arg.count._super), 0)) * - x162)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x166 - - (x159 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1._super.pcNorm.low16.arg.count._super), 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x167 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1._super.pcNorm.high16.arg.val._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x168 = (x167 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x169 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1._super.pcNorm.high16.arg.count._super), 0) * - inv_0(x168)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x170 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1._super._0._0.io.oldTxn.addr._super), 0)); - ExtVal x171 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1._super._0._0.io.oldTxn.cycle._super), 0)); - ExtVal x172 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1._super._0._0.io.oldTxn.dataLow._super), 0)); - ExtVal x173 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1._super._0._0.io.oldTxn.dataHigh._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x174 = (((x170 + x171) + x172) + x173); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x175 = (x174 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x176 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1._super._0._0.io.oldTxn.count._super), 0) * - inv_0(x175)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x177 = (x168 * x175); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x178 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1._super.pcNorm.high16.arg.count._super), 0) * - x175); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x179 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1._super._0._0.io.newTxn.addr._super), 0)); - ExtVal x180 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1._super._0._0.io.newTxn.cycle._super), 0)); - ExtVal x181 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1._super._0._0.io.newTxn.dataLow._super), 0)); - ExtVal x182 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1._super._0._0.io.newTxn.dataHigh._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x183 = (((x179 + x180) + x181) + x182); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x184 = (x183 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x185 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1._super._0._0.io.newTxn.count._super), 0) * - inv_0(x184)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x186 = (((x164 + x169) + x176) + x185); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 1), x186); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x187 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 1), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 0), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x188 = - (((x187 * (x177 * x184)) - (x178 * x184)) - - ((x168 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1._super._0._0.io.oldTxn.count._super), 0)) * - x184)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x188 - - (x177 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1._super._0._0.io.newTxn.count._super), 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x189 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1._super._0._0._0._0.arg.cycle._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x190 = (x189 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x191 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1._super._0._0._0._0.arg.count._super), 0) * - inv_0(x190)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x192 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.decoded.arg.cycle._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x193 = (x192 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x194 = (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.decoded.arg.count._super), 0) * - inv_0(x193)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x195 = (x190 * x193); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x196 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1._super._0._0._0._0.arg.count._super), 0) * x193); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x197 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD( - LAYOUT_LOOKUP(arg0, instResult.arm1.input.decoded.pcAddr.upperDiff.ret.arg.val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x198 = (x197 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x199 = - (LOAD(LAYOUT_LOOKUP(arg0, - instResult.arm1.input.decoded.pcAddr.upperDiff.ret.arg.count._super), - 0) * - inv_0(x198)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x200 = (((x186 + x191) + x194) + x199); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 2), x200); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x201 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 2), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 1), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x202 = - (((x201 * (x195 * x198)) - (x196 * x198)) - - ((x190 * LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.decoded.arg.count._super), 0)) * - x198)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x202 - - (x195 * - LOAD(LAYOUT_LOOKUP(arg0, - instResult.arm1.input.decoded.pcAddr.upperDiff.ret.arg.count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x203 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.decoded.pcAddr.med14.arg.val._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x204 = (x203 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x205 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.decoded.pcAddr.med14.arg.count._super), 0) * - inv_0(x204)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x206 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.decoded.loadInst.io.oldTxn.addr._super), - 0)); - ExtVal x207 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.decoded.loadInst.io.oldTxn.cycle._super), - 0)); - ExtVal x208 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.decoded.loadInst.io.oldTxn.dataLow._super), - 0)); - ExtVal x209 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.decoded.loadInst.io.oldTxn.dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x210 = (((x206 + x207) + x208) + x209); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x211 = (x210 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x212 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.decoded.loadInst.io.oldTxn.count._super), - 0) * - inv_0(x211)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x213 = (x204 * x211); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x214 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.decoded.pcAddr.med14.arg.count._super), 0) * - x211); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x215 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.decoded.loadInst.io.newTxn.addr._super), - 0)); - ExtVal x216 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.decoded.loadInst.io.newTxn.cycle._super), - 0)); - ExtVal x217 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.decoded.loadInst.io.newTxn.dataLow._super), - 0)); - ExtVal x218 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.decoded.loadInst.io.newTxn.dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x219 = (((x215 + x216) + x217) + x218); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x220 = (x219 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x221 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.decoded.loadInst.io.newTxn.count._super), - 0) * - inv_0(x220)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x222 = (((x200 + x205) + x212) + x221); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 3), x222); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x223 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 3), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 2), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x224 = - (((x223 * (x213 * x220)) - (x214 * x220)) - - ((x204 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.decoded.loadInst.io.oldTxn.count._super), - 0)) * - x220)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x224 - - (x213 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.decoded.loadInst.io.newTxn.count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x225 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.decoded.loadInst._0._0.arg.cycle._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x226 = (x225 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x227 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.decoded.loadInst._0._0.arg.count._super), - 0) * - inv_0(x226)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x228 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.rs1._super.io.oldTxn.addr._super), 0)); - ExtVal x229 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.rs1._super.io.oldTxn.cycle._super), 0)); - ExtVal x230 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.rs1._super.io.oldTxn.dataLow._super), 0)); - ExtVal x231 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.rs1._super.io.oldTxn.dataHigh._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x232 = (((x228 + x229) + x230) + x231); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x233 = (x232 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x234 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.rs1._super.io.oldTxn.count._super), 0) * - inv_0(x233)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x235 = (x226 * x233); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x236 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.decoded.loadInst._0._0.arg.count._super), - 0) * - x233); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x237 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.rs1._super.io.newTxn.addr._super), 0)); - ExtVal x238 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.rs1._super.io.newTxn.cycle._super), 0)); - ExtVal x239 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.rs1._super.io.newTxn.dataLow._super), 0)); - ExtVal x240 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.rs1._super.io.newTxn.dataHigh._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x241 = (((x237 + x238) + x239) + x240); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x242 = (x241 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x243 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.rs1._super.io.newTxn.count._super), 0) * - inv_0(x242)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x244 = (((x222 + x227) + x234) + x243); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 4), x244); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x245 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 4), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 3), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x246 = - (((x245 * (x235 * x242)) - (x236 * x242)) - - ((x226 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.rs1._super.io.oldTxn.count._super), 0)) * - x242)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x246 - - (x235 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.rs1._super.io.newTxn.count._super), 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x247 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.rs1._super._0._0.arg.cycle._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x248 = (x247 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x249 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.rs1._super._0._0.arg.count._super), 0) * - inv_0(x248)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x250 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.rs2._super.io.oldTxn.addr._super), 0)); - ExtVal x251 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.rs2._super.io.oldTxn.cycle._super), 0)); - ExtVal x252 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.rs2._super.io.oldTxn.dataLow._super), 0)); - ExtVal x253 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.rs2._super.io.oldTxn.dataHigh._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x254 = (((x250 + x251) + x252) + x253); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x255 = (x254 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x256 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.rs2._super.io.oldTxn.count._super), 0) * - inv_0(x255)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x257 = (x248 * x255); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x258 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.rs1._super._0._0.arg.count._super), 0) * - x255); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x259 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.rs2._super.io.newTxn.addr._super), 0)); - ExtVal x260 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.rs2._super.io.newTxn.cycle._super), 0)); - ExtVal x261 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.rs2._super.io.newTxn.dataLow._super), 0)); - ExtVal x262 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.rs2._super.io.newTxn.dataHigh._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x263 = (((x259 + x260) + x261) + x262); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x264 = (x263 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x265 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.rs2._super.io.newTxn.count._super), 0) * - inv_0(x264)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x266 = (((x244 + x249) + x256) + x265); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 5), x266); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x267 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 5), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 4), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x268 = - (((x267 * (x257 * x264)) - (x258 * x264)) - - ((x248 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.rs2._super.io.oldTxn.count._super), 0)) * - x264)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x268 - - (x257 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.rs2._super.io.newTxn.count._super), 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x269 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.rs2._super._0._0.arg.cycle._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x270 = (x269 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x271 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.rs2._super._0._0.arg.count._super), 0) * - inv_0(x270)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x272 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm1._arguments_Misc1MiscOutput.argU16), 0), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x273 = (x272 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x274 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm1._arguments_Misc1MiscOutput.argU16), 0), - count._super), - 0) * - inv_0(x273)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x275 = (x270 * x273); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x276 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm1.input.rs2._super._0._0.arg.count._super), 0) * - x273); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x277 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm1._arguments_Misc1MiscOutput.argU16), 1), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x278 = (x277 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x279 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm1._arguments_Misc1MiscOutput.argU16), 1), - count._super), - 0) * - inv_0(x278)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x280 = (((x266 + x271) + x274) + x279); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 6), x280); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x281 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 6), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 5), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x282 = - (((x281 * (x275 * x278)) - (x276 * x278)) - - ((x270 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm1._arguments_Misc1MiscOutput.argU16), 0), - count._super), - 0)) * - x278)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x282 - - (x275 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm1._arguments_Misc1MiscOutput.argU16), 1), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x283 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm1._arguments_Misc1MiscOutput.argU16), 2), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x284 = (x283 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x285 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm1._arguments_Misc1MiscOutput.argU16), 2), - count._super), - 0) * - inv_0(x284)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x286 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm1._arguments_Misc1MiscOutput.argU16), 3), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x287 = (x286 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x288 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm1._arguments_Misc1MiscOutput.argU16), 3), - count._super), - 0) * - inv_0(x287)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x289 = (x284 * x287); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x290 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm1._arguments_Misc1MiscOutput.argU16), 2), - count._super), - 0) * - x287); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x291 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm1._arguments_Misc1MiscOutput.argU16), 4), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x292 = (x291 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x293 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm1._arguments_Misc1MiscOutput.argU16), 4), - count._super), - 0) * - inv_0(x292)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x294 = (((x280 + x285) + x288) + x293); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 7), x294); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x295 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 7), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 6), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x296 = - (((x295 * (x289 * x292)) - (x290 * x292)) - - ((x284 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm1._arguments_Misc1MiscOutput.argU16), 3), - count._super), - 0)) * - x292)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x296 - - (x289 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm1._arguments_Misc1MiscOutput.argU16), 4), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:122 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 18), x294); - // zirgen/dsl/passes/GenerateAccum.cpp:124 - ExtVal x297 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 18), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 7), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:125 - EQZ(x297, "zirgen/dsl/passes/GenerateAccum.cpp:125"); - x5 = x4; - } else if (to_size_t( - LOAD(LAYOUT_LOOKUP(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(arg0, instResult._selector), 2), - _super), - 0))) { - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x298 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2._super.writeData.low16.arg.val._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x299 = (x298 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x300 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2._super.writeData.low16.arg.count._super), 0) * - inv_0(x299)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x301 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 18), 1) + x300); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x302 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2._super.writeData.high16.arg.val._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x303 = (x302 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x304 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2._super.writeData.high16.arg.count._super), 0) * - inv_0(x303)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x305 = (x299 * x303); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x306 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2._super.writeData.low16.arg.count._super), 0) * - x303); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x307 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2._super.pcNorm.low16.arg.val._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x308 = (x307 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x309 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2._super.pcNorm.low16.arg.count._super), 0) * - inv_0(x308)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x310 = ((x301 + x304) + x309); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 0), x310); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x311 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 0), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 18), 1)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x312 = - (((x311 * (x305 * x308)) - (x306 * x308)) - - ((x299 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2._super.writeData.high16.arg.count._super), 0)) * - x308)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x312 - - (x305 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2._super.pcNorm.low16.arg.count._super), 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x313 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2._super.pcNorm.high16.arg.val._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x314 = (x313 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x315 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2._super.pcNorm.high16.arg.count._super), 0) * - inv_0(x314)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x316 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2._super._0._0.io.oldTxn.addr._super), 0)); - ExtVal x317 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2._super._0._0.io.oldTxn.cycle._super), 0)); - ExtVal x318 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2._super._0._0.io.oldTxn.dataLow._super), 0)); - ExtVal x319 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2._super._0._0.io.oldTxn.dataHigh._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x320 = (((x316 + x317) + x318) + x319); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x321 = (x320 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x322 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2._super._0._0.io.oldTxn.count._super), 0) * - inv_0(x321)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x323 = (x314 * x321); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x324 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2._super.pcNorm.high16.arg.count._super), 0) * - x321); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x325 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2._super._0._0.io.newTxn.addr._super), 0)); - ExtVal x326 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2._super._0._0.io.newTxn.cycle._super), 0)); - ExtVal x327 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2._super._0._0.io.newTxn.dataLow._super), 0)); - ExtVal x328 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2._super._0._0.io.newTxn.dataHigh._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x329 = (((x325 + x326) + x327) + x328); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x330 = (x329 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x331 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2._super._0._0.io.newTxn.count._super), 0) * - inv_0(x330)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x332 = (((x310 + x315) + x322) + x331); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 1), x332); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x333 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 1), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 0), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x334 = - (((x333 * (x323 * x330)) - (x324 * x330)) - - ((x314 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2._super._0._0.io.oldTxn.count._super), 0)) * - x330)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x334 - - (x323 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2._super._0._0.io.newTxn.count._super), 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x335 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2._super._0._0._0._0.arg.cycle._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x336 = (x335 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x337 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2._super._0._0._0._0.arg.count._super), 0) * - inv_0(x336)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x338 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.decoded.arg.cycle._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x339 = (x338 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x340 = (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.decoded.arg.count._super), 0) * - inv_0(x339)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x341 = (x336 * x339); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x342 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2._super._0._0._0._0.arg.count._super), 0) * x339); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x343 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD( - LAYOUT_LOOKUP(arg0, instResult.arm2.input.decoded.pcAddr.upperDiff.ret.arg.val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x344 = (x343 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x345 = - (LOAD(LAYOUT_LOOKUP(arg0, - instResult.arm2.input.decoded.pcAddr.upperDiff.ret.arg.count._super), - 0) * - inv_0(x344)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x346 = (((x332 + x337) + x340) + x345); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 2), x346); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x347 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 2), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 1), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x348 = - (((x347 * (x341 * x344)) - (x342 * x344)) - - ((x336 * LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.decoded.arg.count._super), 0)) * - x344)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x348 - - (x341 * - LOAD(LAYOUT_LOOKUP(arg0, - instResult.arm2.input.decoded.pcAddr.upperDiff.ret.arg.count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x349 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.decoded.pcAddr.med14.arg.val._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x350 = (x349 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x351 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.decoded.pcAddr.med14.arg.count._super), 0) * - inv_0(x350)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x352 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.decoded.loadInst.io.oldTxn.addr._super), - 0)); - ExtVal x353 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.decoded.loadInst.io.oldTxn.cycle._super), - 0)); - ExtVal x354 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.decoded.loadInst.io.oldTxn.dataLow._super), - 0)); - ExtVal x355 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.decoded.loadInst.io.oldTxn.dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x356 = (((x352 + x353) + x354) + x355); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x357 = (x356 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x358 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.decoded.loadInst.io.oldTxn.count._super), - 0) * - inv_0(x357)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x359 = (x350 * x357); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x360 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.decoded.pcAddr.med14.arg.count._super), 0) * - x357); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x361 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.decoded.loadInst.io.newTxn.addr._super), - 0)); - ExtVal x362 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.decoded.loadInst.io.newTxn.cycle._super), - 0)); - ExtVal x363 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.decoded.loadInst.io.newTxn.dataLow._super), - 0)); - ExtVal x364 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.decoded.loadInst.io.newTxn.dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x365 = (((x361 + x362) + x363) + x364); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x366 = (x365 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x367 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.decoded.loadInst.io.newTxn.count._super), - 0) * - inv_0(x366)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x368 = (((x346 + x351) + x358) + x367); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 3), x368); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x369 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 3), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 2), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x370 = - (((x369 * (x359 * x366)) - (x360 * x366)) - - ((x350 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.decoded.loadInst.io.oldTxn.count._super), - 0)) * - x366)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x370 - - (x359 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.decoded.loadInst.io.newTxn.count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x371 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.decoded.loadInst._0._0.arg.cycle._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x372 = (x371 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x373 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.decoded.loadInst._0._0.arg.count._super), - 0) * - inv_0(x372)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x374 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.rs1._super.io.oldTxn.addr._super), 0)); - ExtVal x375 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.rs1._super.io.oldTxn.cycle._super), 0)); - ExtVal x376 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.rs1._super.io.oldTxn.dataLow._super), 0)); - ExtVal x377 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.rs1._super.io.oldTxn.dataHigh._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x378 = (((x374 + x375) + x376) + x377); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x379 = (x378 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x380 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.rs1._super.io.oldTxn.count._super), 0) * - inv_0(x379)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x381 = (x372 * x379); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x382 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.decoded.loadInst._0._0.arg.count._super), - 0) * - x379); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x383 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.rs1._super.io.newTxn.addr._super), 0)); - ExtVal x384 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.rs1._super.io.newTxn.cycle._super), 0)); - ExtVal x385 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.rs1._super.io.newTxn.dataLow._super), 0)); - ExtVal x386 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.rs1._super.io.newTxn.dataHigh._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x387 = (((x383 + x384) + x385) + x386); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x388 = (x387 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x389 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.rs1._super.io.newTxn.count._super), 0) * - inv_0(x388)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x390 = (((x368 + x373) + x380) + x389); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 4), x390); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x391 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 4), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 3), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x392 = - (((x391 * (x381 * x388)) - (x382 * x388)) - - ((x372 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.rs1._super.io.oldTxn.count._super), 0)) * - x388)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x392 - - (x381 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.rs1._super.io.newTxn.count._super), 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x393 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.rs1._super._0._0.arg.cycle._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x394 = (x393 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x395 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.rs1._super._0._0.arg.count._super), 0) * - inv_0(x394)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x396 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.rs2._super.io.oldTxn.addr._super), 0)); - ExtVal x397 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.rs2._super.io.oldTxn.cycle._super), 0)); - ExtVal x398 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.rs2._super.io.oldTxn.dataLow._super), 0)); - ExtVal x399 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.rs2._super.io.oldTxn.dataHigh._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x400 = (((x396 + x397) + x398) + x399); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x401 = (x400 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x402 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.rs2._super.io.oldTxn.count._super), 0) * - inv_0(x401)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x403 = (x394 * x401); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x404 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.rs1._super._0._0.arg.count._super), 0) * - x401); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x405 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.rs2._super.io.newTxn.addr._super), 0)); - ExtVal x406 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.rs2._super.io.newTxn.cycle._super), 0)); - ExtVal x407 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.rs2._super.io.newTxn.dataLow._super), 0)); - ExtVal x408 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.rs2._super.io.newTxn.dataHigh._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x409 = (((x405 + x406) + x407) + x408); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x410 = (x409 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x411 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.rs2._super.io.newTxn.count._super), 0) * - inv_0(x410)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x412 = (((x390 + x395) + x402) + x411); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 5), x412); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x413 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 5), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 4), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x414 = - (((x413 * (x403 * x410)) - (x404 * x410)) - - ((x394 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.rs2._super.io.oldTxn.count._super), 0)) * - x410)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x414 - - (x403 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.rs2._super.io.newTxn.count._super), 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x415 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.rs2._super._0._0.arg.cycle._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x416 = (x415 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x417 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.rs2._super._0._0.arg.count._super), 0) * - inv_0(x416)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x418 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm2._arguments_Misc2MiscOutput.argU16), 0), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x419 = (x418 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x420 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm2._arguments_Misc2MiscOutput.argU16), 0), - count._super), - 0) * - inv_0(x419)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x421 = (x416 * x419); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x422 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm2.input.rs2._super._0._0.arg.count._super), 0) * - x419); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x423 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm2._arguments_Misc2MiscOutput.argU16), 1), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x424 = (x423 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x425 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm2._arguments_Misc2MiscOutput.argU16), 1), - count._super), - 0) * - inv_0(x424)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x426 = (((x412 + x417) + x420) + x425); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 6), x426); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x427 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 6), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 5), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x428 = - (((x427 * (x421 * x424)) - (x422 * x424)) - - ((x416 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm2._arguments_Misc2MiscOutput.argU16), 0), - count._super), - 0)) * - x424)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x428 - - (x421 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm2._arguments_Misc2MiscOutput.argU16), 1), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x429 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm2._arguments_Misc2MiscOutput.argU16), 2), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x430 = (x429 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x431 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm2._arguments_Misc2MiscOutput.argU16), 2), - count._super), - 0) * - inv_0(x430)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x432 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm2._arguments_Misc2MiscOutput.argU16), 3), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x433 = (x432 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x434 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm2._arguments_Misc2MiscOutput.argU16), 3), - count._super), - 0) * - inv_0(x433)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x435 = (x430 * x433); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x436 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm2._arguments_Misc2MiscOutput.argU16), 2), - count._super), - 0) * - x433); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x437 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm2._arguments_Misc2MiscOutput.argU16), 4), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x438 = (x437 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x439 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm2._arguments_Misc2MiscOutput.argU16), 4), - count._super), - 0) * - inv_0(x438)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x440 = (((x426 + x431) + x434) + x439); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 7), x440); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x441 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 7), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 6), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x442 = - (((x441 * (x435 * x438)) - (x436 * x438)) - - ((x430 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm2._arguments_Misc2MiscOutput.argU16), 3), - count._super), - 0)) * - x438)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x442 - - (x435 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm2._arguments_Misc2MiscOutput.argU16), 4), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:122 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 18), x440); - // zirgen/dsl/passes/GenerateAccum.cpp:124 - ExtVal x443 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 18), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 7), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:125 - EQZ(x443, "zirgen/dsl/passes/GenerateAccum.cpp:125"); - x5 = x4; - } else if (to_size_t( - LOAD(LAYOUT_LOOKUP(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(arg0, instResult._selector), 3), - _super), - 0))) { - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x444 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.decoded.arg.cycle._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x445 = (x444 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x446 = (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.decoded.arg.count._super), 0) * - inv_0(x445)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x447 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 18), 1) + x446); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x448 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD( - LAYOUT_LOOKUP(arg0, instResult.arm3.input.decoded.pcAddr.upperDiff.ret.arg.val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x449 = (x448 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x450 = - (LOAD(LAYOUT_LOOKUP(arg0, - instResult.arm3.input.decoded.pcAddr.upperDiff.ret.arg.count._super), - 0) * - inv_0(x449)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x451 = (x445 * x449); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x452 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.decoded.arg.count._super), 0) * x449); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x453 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.decoded.pcAddr.med14.arg.val._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x454 = (x453 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x455 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.decoded.pcAddr.med14.arg.count._super), 0) * - inv_0(x454)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x456 = ((x447 + x450) + x455); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 0), x456); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x457 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 0), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 18), 1)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x458 = - (((x457 * (x451 * x454)) - (x452 * x454)) - - ((x445 * - LOAD(LAYOUT_LOOKUP(arg0, - instResult.arm3.input.decoded.pcAddr.upperDiff.ret.arg.count._super), - 0)) * - x454)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x458 - (x451 * LOAD(LAYOUT_LOOKUP( - arg0, instResult.arm3.input.decoded.pcAddr.med14.arg.count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x459 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.decoded.loadInst.io.oldTxn.addr._super), - 0)); - ExtVal x460 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.decoded.loadInst.io.oldTxn.cycle._super), - 0)); - ExtVal x461 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.decoded.loadInst.io.oldTxn.dataLow._super), - 0)); - ExtVal x462 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.decoded.loadInst.io.oldTxn.dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x463 = (((x459 + x460) + x461) + x462); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x464 = (x463 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x465 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.decoded.loadInst.io.oldTxn.count._super), - 0) * - inv_0(x464)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x466 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.decoded.loadInst.io.newTxn.addr._super), - 0)); - ExtVal x467 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.decoded.loadInst.io.newTxn.cycle._super), - 0)); - ExtVal x468 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.decoded.loadInst.io.newTxn.dataLow._super), - 0)); - ExtVal x469 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.decoded.loadInst.io.newTxn.dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x470 = (((x466 + x467) + x468) + x469); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x471 = (x470 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x472 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.decoded.loadInst.io.newTxn.count._super), - 0) * - inv_0(x471)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x473 = (x464 * x471); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x474 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.decoded.loadInst.io.oldTxn.count._super), - 0) * - x471); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x475 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.decoded.loadInst._0._0.arg.cycle._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x476 = (x475 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x477 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.decoded.loadInst._0._0.arg.count._super), - 0) * - inv_0(x476)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x478 = (((x456 + x465) + x472) + x477); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 1), x478); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x479 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 1), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 0), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x480 = - (((x479 * (x473 * x476)) - (x474 * x476)) - - ((x464 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.decoded.loadInst.io.newTxn.count._super), - 0)) * - x476)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x480 - - (x473 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.decoded.loadInst._0._0.arg.count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x481 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.rs1._super.io.oldTxn.addr._super), 0)); - ExtVal x482 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.rs1._super.io.oldTxn.cycle._super), 0)); - ExtVal x483 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.rs1._super.io.oldTxn.dataLow._super), 0)); - ExtVal x484 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.rs1._super.io.oldTxn.dataHigh._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x485 = (((x481 + x482) + x483) + x484); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x486 = (x485 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x487 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.rs1._super.io.oldTxn.count._super), 0) * - inv_0(x486)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x488 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.rs1._super.io.newTxn.addr._super), 0)); - ExtVal x489 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.rs1._super.io.newTxn.cycle._super), 0)); - ExtVal x490 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.rs1._super.io.newTxn.dataLow._super), 0)); - ExtVal x491 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.rs1._super.io.newTxn.dataHigh._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x492 = (((x488 + x489) + x490) + x491); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x493 = (x492 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x494 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.rs1._super.io.newTxn.count._super), 0) * - inv_0(x493)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x495 = (x486 * x493); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x496 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.rs1._super.io.oldTxn.count._super), 0) * - x493); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x497 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.rs1._super._0._0.arg.cycle._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x498 = (x497 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x499 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.rs1._super._0._0.arg.count._super), 0) * - inv_0(x498)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x500 = (((x478 + x487) + x494) + x499); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 2), x500); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x501 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 2), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 1), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x502 = - (((x501 * (x495 * x498)) - (x496 * x498)) - - ((x486 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.rs1._super.io.newTxn.count._super), 0)) * - x498)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x502 - - (x495 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.rs1._super._0._0.arg.count._super), 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x503 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.rs2._super.io.oldTxn.addr._super), 0)); - ExtVal x504 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.rs2._super.io.oldTxn.cycle._super), 0)); - ExtVal x505 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.rs2._super.io.oldTxn.dataLow._super), 0)); - ExtVal x506 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.rs2._super.io.oldTxn.dataHigh._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x507 = (((x503 + x504) + x505) + x506); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x508 = (x507 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x509 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.rs2._super.io.oldTxn.count._super), 0) * - inv_0(x508)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x510 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.rs2._super.io.newTxn.addr._super), 0)); - ExtVal x511 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.rs2._super.io.newTxn.cycle._super), 0)); - ExtVal x512 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.rs2._super.io.newTxn.dataLow._super), 0)); - ExtVal x513 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.rs2._super.io.newTxn.dataHigh._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x514 = (((x510 + x511) + x512) + x513); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x515 = (x514 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x516 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.rs2._super.io.newTxn.count._super), 0) * - inv_0(x515)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x517 = (x508 * x515); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x518 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.rs2._super.io.oldTxn.count._super), 0) * - x515); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x519 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.rs2._super._0._0.arg.cycle._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x520 = (x519 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x521 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.rs2._super._0._0.arg.count._super), 0) * - inv_0(x520)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x522 = (((x500 + x509) + x516) + x521); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 3), x522); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x523 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 3), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 2), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x524 = - (((x523 * (x517 * x520)) - (x518 * x520)) - - ((x508 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.rs2._super.io.newTxn.count._super), 0)) * - x520)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x524 - - (x517 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.input.rs2._super._0._0.arg.count._super), 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x525 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU16), 0), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x526 = (x525 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x527 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU16), 0), - count._super), - 0) * - inv_0(x526)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x528 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU16), 1), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x529 = (x528 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x530 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU16), 1), - count._super), - 0) * - inv_0(x529)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x531 = (x526 * x529); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x532 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU16), 0), - count._super), - 0) * - x529); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x533 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU16), 2), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x534 = (x533 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x535 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU16), 2), - count._super), - 0) * - inv_0(x534)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x536 = (((x522 + x527) + x530) + x535); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 4), x536); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x537 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 4), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 3), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x538 = - (((x537 * (x531 * x534)) - (x532 * x534)) - - ((x526 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU16), 1), - count._super), - 0)) * - x534)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x538 - - (x531 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU16), 2), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x539 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU16), 3), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x540 = (x539 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x541 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU16), 3), - count._super), - 0) * - inv_0(x540)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x542 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU16), 4), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x543 = (x542 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x544 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU16), 4), - count._super), - 0) * - inv_0(x543)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x545 = (x540 * x543); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x546 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU16), 3), - count._super), - 0) * - x543); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x547 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU16), 5), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x548 = (x547 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x549 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU16), 5), - count._super), - 0) * - inv_0(x548)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x550 = (((x536 + x541) + x544) + x549); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 5), x550); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x551 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 5), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 4), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x552 = - (((x551 * (x545 * x548)) - (x546 * x548)) - - ((x540 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU16), 4), - count._super), - 0)) * - x548)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x552 - - (x545 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU16), 5), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x553 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU8), 0), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x554 = (x553 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x555 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU8), 0), - count._super), - 0) * - inv_0(x554)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x556 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU8), 1), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x557 = (x556 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x558 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU8), 1), - count._super), - 0) * - inv_0(x557)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x559 = (x554 * x557); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x560 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU8), 0), - count._super), - 0) * - x557); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x561 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU8), 2), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x562 = (x561 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x563 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU8), 2), - count._super), - 0) * - inv_0(x562)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x564 = (((x550 + x555) + x558) + x563); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 6), x564); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x565 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 6), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 5), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x566 = - (((x565 * (x559 * x562)) - (x560 * x562)) - - ((x554 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU8), 1), - count._super), - 0)) * - x562)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x566 - - (x559 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU8), 2), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x567 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU8), 3), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x568 = (x567 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x569 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU8), 3), - count._super), - 0) * - inv_0(x568)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x570 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU8), 4), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x571 = (x570 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x572 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU8), 4), - count._super), - 0) * - inv_0(x571)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x573 = (x568 * x571); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x574 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU8), 3), - count._super), - 0) * - x571); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x575 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU8), 5), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x576 = (x575 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x577 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU8), 5), - count._super), - 0) * - inv_0(x576)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x578 = (((x564 + x569) + x572) + x577); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 7), x578); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x579 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 7), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 6), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x580 = - (((x579 * (x573 * x576)) - (x574 * x576)) - - ((x568 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU8), 4), - count._super), - 0)) * - x576)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x580 - - (x573 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU8), 5), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x581 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU8), 6), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x582 = (x581 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x583 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU8), 6), - count._super), - 0) * - inv_0(x582)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x584 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU8), 7), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x585 = (x584 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x586 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU8), 7), - count._super), - 0) * - inv_0(x585)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x587 = (x582 * x585); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x588 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU8), 6), - count._super), - 0) * - x585); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x589 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU8), 8), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x590 = (x589 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x591 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU8), 8), - count._super), - 0) * - inv_0(x590)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x592 = (((x578 + x583) + x586) + x591); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 8), x592); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x593 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 8), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 7), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x594 = - (((x593 * (x587 * x590)) - (x588 * x590)) - - ((x582 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU8), 7), - count._super), - 0)) * - x590)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x594 - - (x587 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU8), 8), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x595 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU8), 9), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x596 = (x595 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x597 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU8), 9), - count._super), - 0) * - inv_0(x596)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x598 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU8), 10), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x599 = (x598 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x600 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU8), 10), - count._super), - 0) * - inv_0(x599)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x601 = (x596 * x599); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x602 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU8), 9), - count._super), - 0) * - x599); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x603 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU8), 11), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x604 = (x603 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x605 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU8), 11), - count._super), - 0) * - inv_0(x604)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x606 = (((x592 + x597) + x600) + x605); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 9), x606); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x607 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 9), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 8), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x608 = - (((x607 * (x601 * x604)) - (x602 * x604)) - - ((x596 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU8), 10), - count._super), - 0)) * - x604)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x608 - - (x601 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU8), 11), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x609 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU8), 12), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x610 = (x609 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x611 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU8), 12), - count._super), - 0) * - inv_0(x610)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x612 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3._0._0.io.oldTxn.addr._super), 0)); - ExtVal x613 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3._0._0.io.oldTxn.cycle._super), 0)); - ExtVal x614 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3._0._0.io.oldTxn.dataLow._super), 0)); - ExtVal x615 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3._0._0.io.oldTxn.dataHigh._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x616 = (((x612 + x613) + x614) + x615); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x617 = (x616 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x618 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3._0._0.io.oldTxn.count._super), 0) * inv_0(x617)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x619 = (x610 * x617); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x620 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm3._arguments_Mul0MulOutput.argU8), 12), - count._super), - 0) * - x617); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x621 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3._0._0.io.newTxn.addr._super), 0)); - ExtVal x622 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3._0._0.io.newTxn.cycle._super), 0)); - ExtVal x623 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3._0._0.io.newTxn.dataLow._super), 0)); - ExtVal x624 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3._0._0.io.newTxn.dataHigh._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x625 = (((x621 + x622) + x623) + x624); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x626 = (x625 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x627 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3._0._0.io.newTxn.count._super), 0) * inv_0(x626)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x628 = (((x606 + x611) + x618) + x627); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 10), x628); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x629 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 10), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 9), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x630 = - (((x629 * (x619 * x626)) - (x620 * x626)) - - ((x610 * LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3._0._0.io.oldTxn.count._super), 0)) * - x626)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x630 - - (x619 * LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3._0._0.io.newTxn.count._super), 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x631 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3._0._0._0._0.arg.cycle._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x632 = (x631 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x633 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3._0._0._0._0.arg.count._super), 0) * inv_0(x632)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x634 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.pcAdd.low16.arg.val._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x635 = (x634 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x636 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.pcAdd.low16.arg.count._super), 0) * inv_0(x635)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x637 = (x632 * x635); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x638 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3._0._0._0._0.arg.count._super), 0) * x635); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x639 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.pcAdd.high16.arg.val._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x640 = (x639 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x641 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.pcAdd.high16.arg.count._super), 0) * inv_0(x640)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x642 = (((x628 + x633) + x636) + x641); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 11), x642); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x643 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 11), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 10), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x644 = - (((x643 * (x637 * x640)) - (x638 * x640)) - - ((x632 * LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.pcAdd.low16.arg.count._super), 0)) * - x640)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x644 - - (x637 * LOAD(LAYOUT_LOOKUP(arg0, instResult.arm3.pcAdd.high16.arg.count._super), 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:122 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 18), x642); - // zirgen/dsl/passes/GenerateAccum.cpp:124 - ExtVal x645 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 18), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 11), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:125 - EQZ(x645, "zirgen/dsl/passes/GenerateAccum.cpp:125"); - x5 = x4; - } else if (to_size_t( - LOAD(LAYOUT_LOOKUP(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(arg0, instResult._selector), 4), - _super), - 0))) { - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x646 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.decoded.arg.cycle._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x647 = (x646 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x648 = (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.decoded.arg.count._super), 0) * - inv_0(x647)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x649 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 18), 1) + x648); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x650 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD( - LAYOUT_LOOKUP(arg0, instResult.arm4.input.decoded.pcAddr.upperDiff.ret.arg.val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x651 = (x650 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x652 = - (LOAD(LAYOUT_LOOKUP(arg0, - instResult.arm4.input.decoded.pcAddr.upperDiff.ret.arg.count._super), - 0) * - inv_0(x651)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x653 = (x647 * x651); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x654 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.decoded.arg.count._super), 0) * x651); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x655 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.decoded.pcAddr.med14.arg.val._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x656 = (x655 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x657 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.decoded.pcAddr.med14.arg.count._super), 0) * - inv_0(x656)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x658 = ((x649 + x652) + x657); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 0), x658); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x659 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 0), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 18), 1)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x660 = - (((x659 * (x653 * x656)) - (x654 * x656)) - - ((x647 * - LOAD(LAYOUT_LOOKUP(arg0, - instResult.arm4.input.decoded.pcAddr.upperDiff.ret.arg.count._super), - 0)) * - x656)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x660 - (x653 * LOAD(LAYOUT_LOOKUP( - arg0, instResult.arm4.input.decoded.pcAddr.med14.arg.count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x661 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.decoded.loadInst.io.oldTxn.addr._super), - 0)); - ExtVal x662 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.decoded.loadInst.io.oldTxn.cycle._super), - 0)); - ExtVal x663 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.decoded.loadInst.io.oldTxn.dataLow._super), - 0)); - ExtVal x664 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.decoded.loadInst.io.oldTxn.dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x665 = (((x661 + x662) + x663) + x664); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x666 = (x665 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x667 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.decoded.loadInst.io.oldTxn.count._super), - 0) * - inv_0(x666)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x668 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.decoded.loadInst.io.newTxn.addr._super), - 0)); - ExtVal x669 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.decoded.loadInst.io.newTxn.cycle._super), - 0)); - ExtVal x670 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.decoded.loadInst.io.newTxn.dataLow._super), - 0)); - ExtVal x671 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.decoded.loadInst.io.newTxn.dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x672 = (((x668 + x669) + x670) + x671); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x673 = (x672 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x674 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.decoded.loadInst.io.newTxn.count._super), - 0) * - inv_0(x673)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x675 = (x666 * x673); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x676 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.decoded.loadInst.io.oldTxn.count._super), - 0) * - x673); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x677 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.decoded.loadInst._0._0.arg.cycle._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x678 = (x677 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x679 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.decoded.loadInst._0._0.arg.count._super), - 0) * - inv_0(x678)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x680 = (((x658 + x667) + x674) + x679); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 1), x680); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x681 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 1), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 0), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x682 = - (((x681 * (x675 * x678)) - (x676 * x678)) - - ((x666 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.decoded.loadInst.io.newTxn.count._super), - 0)) * - x678)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x682 - - (x675 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.decoded.loadInst._0._0.arg.count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x683 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.rs1._super.io.oldTxn.addr._super), 0)); - ExtVal x684 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.rs1._super.io.oldTxn.cycle._super), 0)); - ExtVal x685 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.rs1._super.io.oldTxn.dataLow._super), 0)); - ExtVal x686 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.rs1._super.io.oldTxn.dataHigh._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x687 = (((x683 + x684) + x685) + x686); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x688 = (x687 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x689 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.rs1._super.io.oldTxn.count._super), 0) * - inv_0(x688)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x690 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.rs1._super.io.newTxn.addr._super), 0)); - ExtVal x691 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.rs1._super.io.newTxn.cycle._super), 0)); - ExtVal x692 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.rs1._super.io.newTxn.dataLow._super), 0)); - ExtVal x693 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.rs1._super.io.newTxn.dataHigh._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x694 = (((x690 + x691) + x692) + x693); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x695 = (x694 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x696 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.rs1._super.io.newTxn.count._super), 0) * - inv_0(x695)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x697 = (x688 * x695); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x698 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.rs1._super.io.oldTxn.count._super), 0) * - x695); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x699 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.rs1._super._0._0.arg.cycle._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x700 = (x699 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x701 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.rs1._super._0._0.arg.count._super), 0) * - inv_0(x700)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x702 = (((x680 + x689) + x696) + x701); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 2), x702); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x703 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 2), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 1), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x704 = - (((x703 * (x697 * x700)) - (x698 * x700)) - - ((x688 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.rs1._super.io.newTxn.count._super), 0)) * - x700)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x704 - - (x697 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.rs1._super._0._0.arg.count._super), 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x705 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.rs2._super.io.oldTxn.addr._super), 0)); - ExtVal x706 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.rs2._super.io.oldTxn.cycle._super), 0)); - ExtVal x707 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.rs2._super.io.oldTxn.dataLow._super), 0)); - ExtVal x708 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.rs2._super.io.oldTxn.dataHigh._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x709 = (((x705 + x706) + x707) + x708); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x710 = (x709 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x711 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.rs2._super.io.oldTxn.count._super), 0) * - inv_0(x710)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x712 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.rs2._super.io.newTxn.addr._super), 0)); - ExtVal x713 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.rs2._super.io.newTxn.cycle._super), 0)); - ExtVal x714 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.rs2._super.io.newTxn.dataLow._super), 0)); - ExtVal x715 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.rs2._super.io.newTxn.dataHigh._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x716 = (((x712 + x713) + x714) + x715); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x717 = (x716 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x718 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.rs2._super.io.newTxn.count._super), 0) * - inv_0(x717)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x719 = (x710 * x717); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x720 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.rs2._super.io.oldTxn.count._super), 0) * - x717); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x721 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.rs2._super._0._0.arg.cycle._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x722 = (x721 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x723 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.rs2._super._0._0.arg.count._super), 0) * - inv_0(x722)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x724 = (((x702 + x711) + x718) + x723); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 3), x724); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x725 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 3), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 2), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x726 = - (((x725 * (x719 * x722)) - (x720 * x722)) - - ((x710 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.rs2._super.io.newTxn.count._super), 0)) * - x722)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x726 - - (x719 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.input.rs2._super._0._0.arg.count._super), 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x727 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU16), 0), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x728 = (x727 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x729 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU16), 0), - count._super), - 0) * - inv_0(x728)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x730 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU16), 1), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x731 = (x730 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x732 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU16), 1), - count._super), - 0) * - inv_0(x731)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x733 = (x728 * x731); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x734 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU16), 0), - count._super), - 0) * - x731); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x735 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU16), 2), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x736 = (x735 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x737 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU16), 2), - count._super), - 0) * - inv_0(x736)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x738 = (((x724 + x729) + x732) + x737); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 4), x738); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x739 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 4), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 3), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x740 = - (((x739 * (x733 * x736)) - (x734 * x736)) - - ((x728 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU16), 1), - count._super), - 0)) * - x736)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x740 - - (x733 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU16), 2), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x741 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU16), 3), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x742 = (x741 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x743 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU16), 3), - count._super), - 0) * - inv_0(x742)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x744 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU16), 4), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x745 = (x744 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x746 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU16), 4), - count._super), - 0) * - inv_0(x745)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x747 = (x742 * x745); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x748 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU16), 3), - count._super), - 0) * - x745); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x749 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU16), 5), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x750 = (x749 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x751 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU16), 5), - count._super), - 0) * - inv_0(x750)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x752 = (((x738 + x743) + x746) + x751); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 5), x752); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x753 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 5), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 4), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x754 = - (((x753 * (x747 * x750)) - (x748 * x750)) - - ((x742 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU16), 4), - count._super), - 0)) * - x750)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x754 - - (x747 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU16), 5), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x755 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU16), 6), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x756 = (x755 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x757 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU16), 6), - count._super), - 0) * - inv_0(x756)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x758 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU16), 7), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x759 = (x758 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x760 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU16), 7), - count._super), - 0) * - inv_0(x759)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x761 = (x756 * x759); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x762 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU16), 6), - count._super), - 0) * - x759); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x763 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU16), 8), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x764 = (x763 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x765 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU16), 8), - count._super), - 0) * - inv_0(x764)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x766 = (((x752 + x757) + x760) + x765); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 6), x766); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x767 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 6), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 5), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x768 = - (((x767 * (x761 * x764)) - (x762 * x764)) - - ((x756 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU16), 7), - count._super), - 0)) * - x764)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x768 - - (x761 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU16), 8), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x769 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU8), 0), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x770 = (x769 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x771 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU8), 0), - count._super), - 0) * - inv_0(x770)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x772 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU8), 1), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x773 = (x772 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x774 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU8), 1), - count._super), - 0) * - inv_0(x773)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x775 = (x770 * x773); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x776 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU8), 0), - count._super), - 0) * - x773); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x777 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU8), 2), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x778 = (x777 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x779 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU8), 2), - count._super), - 0) * - inv_0(x778)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x780 = (((x766 + x771) + x774) + x779); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 7), x780); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x781 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 7), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 6), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x782 = - (((x781 * (x775 * x778)) - (x776 * x778)) - - ((x770 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU8), 1), - count._super), - 0)) * - x778)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x782 - - (x775 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU8), 2), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x783 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU8), 3), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x784 = (x783 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x785 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU8), 3), - count._super), - 0) * - inv_0(x784)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x786 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU8), 4), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x787 = (x786 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x788 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU8), 4), - count._super), - 0) * - inv_0(x787)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x789 = (x784 * x787); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x790 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU8), 3), - count._super), - 0) * - x787); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x791 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU8), 5), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x792 = (x791 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x793 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU8), 5), - count._super), - 0) * - inv_0(x792)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x794 = (((x780 + x785) + x788) + x793); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 8), x794); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x795 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 8), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 7), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x796 = - (((x795 * (x789 * x792)) - (x790 * x792)) - - ((x784 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU8), 4), - count._super), - 0)) * - x792)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x796 - - (x789 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU8), 5), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x797 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU8), 6), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x798 = (x797 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x799 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU8), 6), - count._super), - 0) * - inv_0(x798)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x800 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU8), 7), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x801 = (x800 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x802 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU8), 7), - count._super), - 0) * - inv_0(x801)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x803 = (x798 * x801); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x804 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU8), 6), - count._super), - 0) * - x801); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x805 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU8), 8), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x806 = (x805 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x807 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU8), 8), - count._super), - 0) * - inv_0(x806)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x808 = (((x794 + x799) + x802) + x807); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 9), x808); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x809 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 9), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 8), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x810 = - (((x809 * (x803 * x806)) - (x804 * x806)) - - ((x798 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU8), 7), - count._super), - 0)) * - x806)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x810 - - (x803 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU8), 8), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x811 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU8), 9), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x812 = (x811 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x813 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU8), 9), - count._super), - 0) * - inv_0(x812)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x814 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU8), 10), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x815 = (x814 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x816 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU8), 10), - count._super), - 0) * - inv_0(x815)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x817 = (x812 * x815); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x818 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU8), 9), - count._super), - 0) * - x815); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x819 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU8), 11), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x820 = (x819 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x821 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU8), 11), - count._super), - 0) * - inv_0(x820)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x822 = (((x808 + x813) + x816) + x821); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 10), x822); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x823 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 10), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 9), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x824 = - (((x823 * (x817 * x820)) - (x818 * x820)) - - ((x812 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU8), 10), - count._super), - 0)) * - x820)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x824 - - (x817 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU8), 11), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x825 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU8), 12), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x826 = (x825 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x827 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU8), 12), - count._super), - 0) * - inv_0(x826)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x828 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4._0._0.io.oldTxn.addr._super), 0)); - ExtVal x829 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4._0._0.io.oldTxn.cycle._super), 0)); - ExtVal x830 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4._0._0.io.oldTxn.dataLow._super), 0)); - ExtVal x831 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4._0._0.io.oldTxn.dataHigh._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x832 = (((x828 + x829) + x830) + x831); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x833 = (x832 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x834 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4._0._0.io.oldTxn.count._super), 0) * inv_0(x833)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x835 = (x826 * x833); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x836 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm4._arguments_Div0MulOutput.argU8), 12), - count._super), - 0) * - x833); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x837 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4._0._0.io.newTxn.addr._super), 0)); - ExtVal x838 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4._0._0.io.newTxn.cycle._super), 0)); - ExtVal x839 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4._0._0.io.newTxn.dataLow._super), 0)); - ExtVal x840 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4._0._0.io.newTxn.dataHigh._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x841 = (((x837 + x838) + x839) + x840); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x842 = (x841 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x843 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4._0._0.io.newTxn.count._super), 0) * inv_0(x842)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x844 = (((x822 + x827) + x834) + x843); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 11), x844); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x845 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 11), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 10), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x846 = - (((x845 * (x835 * x842)) - (x836 * x842)) - - ((x826 * LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4._0._0.io.oldTxn.count._super), 0)) * - x842)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x846 - - (x835 * LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4._0._0.io.newTxn.count._super), 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x847 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4._0._0._0._0.arg.cycle._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x848 = (x847 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x849 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4._0._0._0._0.arg.count._super), 0) * inv_0(x848)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x850 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.pcAdd.low16.arg.val._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x851 = (x850 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x852 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.pcAdd.low16.arg.count._super), 0) * inv_0(x851)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x853 = (x848 * x851); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x854 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4._0._0._0._0.arg.count._super), 0) * x851); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x855 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.pcAdd.high16.arg.val._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x856 = (x855 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x857 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.pcAdd.high16.arg.count._super), 0) * inv_0(x856)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x858 = (((x844 + x849) + x852) + x857); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 12), x858); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x859 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 12), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 11), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x860 = - (((x859 * (x853 * x856)) - (x854 * x856)) - - ((x848 * LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.pcAdd.low16.arg.count._super), 0)) * - x856)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x860 - - (x853 * LOAD(LAYOUT_LOOKUP(arg0, instResult.arm4.pcAdd.high16.arg.count._super), 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:122 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 18), x858); - // zirgen/dsl/passes/GenerateAccum.cpp:124 - ExtVal x861 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 18), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 12), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:125 - EQZ(x861, "zirgen/dsl/passes/GenerateAccum.cpp:125"); - x5 = x4; - } else if (to_size_t( - LOAD(LAYOUT_LOOKUP(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(arg0, instResult._selector), 5), - _super), - 0))) { - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x862 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.decoded.arg.cycle._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x863 = (x862 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x864 = (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.decoded.arg.count._super), 0) * - inv_0(x863)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x865 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 18), 1) + x864); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x866 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD( - LAYOUT_LOOKUP(arg0, instResult.arm5.input.decoded.pcAddr.upperDiff.ret.arg.val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x867 = (x866 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x868 = - (LOAD(LAYOUT_LOOKUP(arg0, - instResult.arm5.input.decoded.pcAddr.upperDiff.ret.arg.count._super), - 0) * - inv_0(x867)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x869 = (x863 * x867); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x870 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.decoded.arg.count._super), 0) * x867); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x871 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.decoded.pcAddr.med14.arg.val._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x872 = (x871 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x873 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.decoded.pcAddr.med14.arg.count._super), 0) * - inv_0(x872)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x874 = ((x865 + x868) + x873); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 0), x874); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x875 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 0), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 18), 1)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x876 = - (((x875 * (x869 * x872)) - (x870 * x872)) - - ((x863 * - LOAD(LAYOUT_LOOKUP(arg0, - instResult.arm5.input.decoded.pcAddr.upperDiff.ret.arg.count._super), - 0)) * - x872)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x876 - (x869 * LOAD(LAYOUT_LOOKUP( - arg0, instResult.arm5.input.decoded.pcAddr.med14.arg.count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x877 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.decoded.loadInst.io.oldTxn.addr._super), - 0)); - ExtVal x878 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.decoded.loadInst.io.oldTxn.cycle._super), - 0)); - ExtVal x879 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.decoded.loadInst.io.oldTxn.dataLow._super), - 0)); - ExtVal x880 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.decoded.loadInst.io.oldTxn.dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x881 = (((x877 + x878) + x879) + x880); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x882 = (x881 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x883 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.decoded.loadInst.io.oldTxn.count._super), - 0) * - inv_0(x882)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x884 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.decoded.loadInst.io.newTxn.addr._super), - 0)); - ExtVal x885 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.decoded.loadInst.io.newTxn.cycle._super), - 0)); - ExtVal x886 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.decoded.loadInst.io.newTxn.dataLow._super), - 0)); - ExtVal x887 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.decoded.loadInst.io.newTxn.dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x888 = (((x884 + x885) + x886) + x887); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x889 = (x888 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x890 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.decoded.loadInst.io.newTxn.count._super), - 0) * - inv_0(x889)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x891 = (x882 * x889); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x892 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.decoded.loadInst.io.oldTxn.count._super), - 0) * - x889); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x893 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.decoded.loadInst._0._0.arg.cycle._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x894 = (x893 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x895 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.decoded.loadInst._0._0.arg.count._super), - 0) * - inv_0(x894)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x896 = (((x874 + x883) + x890) + x895); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 1), x896); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x897 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 1), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 0), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x898 = - (((x897 * (x891 * x894)) - (x892 * x894)) - - ((x882 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.decoded.loadInst.io.newTxn.count._super), - 0)) * - x894)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x898 - - (x891 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.decoded.loadInst._0._0.arg.count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x899 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.rs1._super.io.oldTxn.addr._super), 0)); - ExtVal x900 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.rs1._super.io.oldTxn.cycle._super), 0)); - ExtVal x901 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.rs1._super.io.oldTxn.dataLow._super), 0)); - ExtVal x902 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.rs1._super.io.oldTxn.dataHigh._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x903 = (((x899 + x900) + x901) + x902); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x904 = (x903 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x905 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.rs1._super.io.oldTxn.count._super), 0) * - inv_0(x904)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x906 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.rs1._super.io.newTxn.addr._super), 0)); - ExtVal x907 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.rs1._super.io.newTxn.cycle._super), 0)); - ExtVal x908 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.rs1._super.io.newTxn.dataLow._super), 0)); - ExtVal x909 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.rs1._super.io.newTxn.dataHigh._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x910 = (((x906 + x907) + x908) + x909); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x911 = (x910 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x912 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.rs1._super.io.newTxn.count._super), 0) * - inv_0(x911)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x913 = (x904 * x911); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x914 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.rs1._super.io.oldTxn.count._super), 0) * - x911); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x915 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.rs1._super._0._0.arg.cycle._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x916 = (x915 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x917 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.rs1._super._0._0.arg.count._super), 0) * - inv_0(x916)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x918 = (((x896 + x905) + x912) + x917); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 2), x918); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x919 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 2), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 1), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x920 = - (((x919 * (x913 * x916)) - (x914 * x916)) - - ((x904 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.rs1._super.io.newTxn.count._super), 0)) * - x916)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x920 - - (x913 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.rs1._super._0._0.arg.count._super), 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x921 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.addrU32.low16.arg.val._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x922 = (x921 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x923 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.addrU32.low16.arg.count._super), 0) * - inv_0(x922)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x924 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.addrU32.high16.arg.val._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x925 = (x924 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x926 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.addrU32.high16.arg.count._super), 0) * - inv_0(x925)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x927 = (x922 * x925); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x928 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.addrU32.low16.arg.count._super), 0) * x925); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x929 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.addr.upperDiff.ret.arg.val._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x930 = (x929 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x931 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.addr.upperDiff.ret.arg.count._super), 0) * - inv_0(x930)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x932 = (((x918 + x923) + x926) + x931); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 3), x932); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x933 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 3), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 2), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x934 = - (((x933 * (x927 * x930)) - (x928 * x930)) - - ((x922 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.addrU32.high16.arg.count._super), 0)) * - x930)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x934 - - (x927 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.addr.upperDiff.ret.arg.count._super), 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x935 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.addr.med14.arg.val._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x936 = (x935 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x937 = (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.addr.med14.arg.count._super), 0) * - inv_0(x936)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x938 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.data.io.oldTxn.addr._super), 0)); - ExtVal x939 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.data.io.oldTxn.cycle._super), 0)); - ExtVal x940 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.data.io.oldTxn.dataLow._super), 0)); - ExtVal x941 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.data.io.oldTxn.dataHigh._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x942 = (((x938 + x939) + x940) + x941); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x943 = (x942 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x944 = (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.data.io.oldTxn.count._super), 0) * - inv_0(x943)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x945 = (x936 * x943); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x946 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.addr.med14.arg.count._super), 0) * x943); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x947 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.data.io.newTxn.addr._super), 0)); - ExtVal x948 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.data.io.newTxn.cycle._super), 0)); - ExtVal x949 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.data.io.newTxn.dataLow._super), 0)); - ExtVal x950 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.data.io.newTxn.dataHigh._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x951 = (((x947 + x948) + x949) + x950); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x952 = (x951 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x953 = (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.data.io.newTxn.count._super), 0) * - inv_0(x952)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x954 = (((x932 + x937) + x944) + x953); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 4), x954); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x955 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 4), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 3), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x956 = - (((x955 * (x945 * x952)) - (x946 * x952)) - - ((x936 * LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.data.io.oldTxn.count._super), 0)) * - x952)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x956 - - (x945 * LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.data.io.newTxn.count._super), 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x957 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.data._0._0.arg.cycle._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x958 = (x957 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x959 = (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.data._0._0.arg.count._super), 0) * - inv_0(x958)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x960 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD( - LAYOUT_LOOKUP(LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm5._arguments_Mem0Output.argU8), 0), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x961 = (x960 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x962 = - (LOAD( - LAYOUT_LOOKUP(LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm5._arguments_Mem0Output.argU8), 0), - count._super), - 0) * - inv_0(x961)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x963 = (x958 * x961); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x964 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.input.data._0._0.arg.count._super), 0) * x961); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x965 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD( - LAYOUT_LOOKUP(LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm5._arguments_Mem0Output.argU8), 1), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x966 = (x965 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x967 = - (LOAD( - LAYOUT_LOOKUP(LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm5._arguments_Mem0Output.argU8), 1), - count._super), - 0) * - inv_0(x966)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x968 = (((x954 + x959) + x962) + x967); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 5), x968); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x969 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 5), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 4), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x970 = - (((x969 * (x963 * x966)) - (x964 * x966)) - - ((x958 * LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm5._arguments_Mem0Output.argU8), 0), - count._super), - 0)) * - x966)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x970 - - (x963 * LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm5._arguments_Mem0Output.argU8), 1), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x971 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD( - LAYOUT_LOOKUP(LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm5._arguments_Mem0Output.argU8), 2), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x972 = (x971 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x973 = - (LOAD( - LAYOUT_LOOKUP(LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm5._arguments_Mem0Output.argU8), 2), - count._super), - 0) * - inv_0(x972)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x974 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5._0._0.io.oldTxn.addr._super), 0)); - ExtVal x975 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5._0._0.io.oldTxn.cycle._super), 0)); - ExtVal x976 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5._0._0.io.oldTxn.dataLow._super), 0)); - ExtVal x977 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5._0._0.io.oldTxn.dataHigh._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x978 = (((x974 + x975) + x976) + x977); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x979 = (x978 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x980 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5._0._0.io.oldTxn.count._super), 0) * inv_0(x979)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x981 = (x972 * x979); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x982 = - (LOAD( - LAYOUT_LOOKUP(LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm5._arguments_Mem0Output.argU8), 2), - count._super), - 0) * - x979); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x983 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5._0._0.io.newTxn.addr._super), 0)); - ExtVal x984 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5._0._0.io.newTxn.cycle._super), 0)); - ExtVal x985 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5._0._0.io.newTxn.dataLow._super), 0)); - ExtVal x986 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5._0._0.io.newTxn.dataHigh._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x987 = (((x983 + x984) + x985) + x986); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x988 = (x987 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x989 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5._0._0.io.newTxn.count._super), 0) * inv_0(x988)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x990 = (((x968 + x973) + x980) + x989); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 6), x990); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x991 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 6), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 5), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x992 = - (((x991 * (x981 * x988)) - (x982 * x988)) - - ((x972 * LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5._0._0.io.oldTxn.count._super), 0)) * - x988)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x992 - - (x981 * LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5._0._0.io.newTxn.count._super), 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x993 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5._0._0._0._0.arg.cycle._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x994 = (x993 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x995 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5._0._0._0._0.arg.count._super), 0) * inv_0(x994)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x996 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.pcAdd.low16.arg.val._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x997 = (x996 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x998 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.pcAdd.low16.arg.count._super), 0) * inv_0(x997)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x999 = (x994 * x997); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1000 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5._0._0._0._0.arg.count._super), 0) * x997); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1001 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.pcAdd.high16.arg.val._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1002 = (x1001 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1003 = (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.pcAdd.high16.arg.count._super), 0) * - inv_0(x1002)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1004 = (((x990 + x995) + x998) + x1003); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 7), x1004); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1005 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 7), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 6), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1006 = - (((x1005 * (x999 * x1002)) - (x1000 * x1002)) - - ((x994 * LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.pcAdd.low16.arg.count._super), 0)) * - x1002)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1006 - - (x999 * LOAD(LAYOUT_LOOKUP(arg0, instResult.arm5.pcAdd.high16.arg.count._super), 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:122 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 18), x1004); - // zirgen/dsl/passes/GenerateAccum.cpp:124 - ExtVal x1007 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 18), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 7), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:125 - EQZ(x1007, "zirgen/dsl/passes/GenerateAccum.cpp:125"); - x5 = x4; - } else if (to_size_t( - LOAD(LAYOUT_LOOKUP(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(arg0, instResult._selector), 6), - _super), - 0))) { - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1008 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.decoded.arg.cycle._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1009 = (x1008 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1010 = (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.decoded.arg.count._super), 0) * - inv_0(x1009)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1011 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 18), 1) + x1010); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1012 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD( - LAYOUT_LOOKUP(arg0, instResult.arm6.input.decoded.pcAddr.upperDiff.ret.arg.val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1013 = (x1012 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1014 = - (LOAD(LAYOUT_LOOKUP(arg0, - instResult.arm6.input.decoded.pcAddr.upperDiff.ret.arg.count._super), - 0) * - inv_0(x1013)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1015 = (x1009 * x1013); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1016 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.decoded.arg.count._super), 0) * x1013); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1017 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.decoded.pcAddr.med14.arg.val._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1018 = (x1017 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1019 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.decoded.pcAddr.med14.arg.count._super), 0) * - inv_0(x1018)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1020 = ((x1011 + x1014) + x1019); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 0), x1020); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1021 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 0), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 18), 1)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1022 = - (((x1021 * (x1015 * x1018)) - (x1016 * x1018)) - - ((x1009 * - LOAD(LAYOUT_LOOKUP(arg0, - instResult.arm6.input.decoded.pcAddr.upperDiff.ret.arg.count._super), - 0)) * - x1018)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1022 - - (x1015 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.decoded.pcAddr.med14.arg.count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1023 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.decoded.loadInst.io.oldTxn.addr._super), - 0)); - ExtVal x1024 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.decoded.loadInst.io.oldTxn.cycle._super), - 0)); - ExtVal x1025 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.decoded.loadInst.io.oldTxn.dataLow._super), - 0)); - ExtVal x1026 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.decoded.loadInst.io.oldTxn.dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1027 = (((x1023 + x1024) + x1025) + x1026); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1028 = (x1027 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1029 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.decoded.loadInst.io.oldTxn.count._super), - 0) * - inv_0(x1028)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1030 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.decoded.loadInst.io.newTxn.addr._super), - 0)); - ExtVal x1031 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.decoded.loadInst.io.newTxn.cycle._super), - 0)); - ExtVal x1032 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.decoded.loadInst.io.newTxn.dataLow._super), - 0)); - ExtVal x1033 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.decoded.loadInst.io.newTxn.dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1034 = (((x1030 + x1031) + x1032) + x1033); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1035 = (x1034 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1036 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.decoded.loadInst.io.newTxn.count._super), - 0) * - inv_0(x1035)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1037 = (x1028 * x1035); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1038 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.decoded.loadInst.io.oldTxn.count._super), - 0) * - x1035); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1039 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.decoded.loadInst._0._0.arg.cycle._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1040 = (x1039 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1041 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.decoded.loadInst._0._0.arg.count._super), - 0) * - inv_0(x1040)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1042 = (((x1020 + x1029) + x1036) + x1041); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 1), x1042); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1043 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 1), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 0), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1044 = - (((x1043 * (x1037 * x1040)) - (x1038 * x1040)) - - ((x1028 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.decoded.loadInst.io.newTxn.count._super), - 0)) * - x1040)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1044 - - (x1037 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.decoded.loadInst._0._0.arg.count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1045 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.rs1._super.io.oldTxn.addr._super), 0)); - ExtVal x1046 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.rs1._super.io.oldTxn.cycle._super), 0)); - ExtVal x1047 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.rs1._super.io.oldTxn.dataLow._super), 0)); - ExtVal x1048 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.rs1._super.io.oldTxn.dataHigh._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1049 = (((x1045 + x1046) + x1047) + x1048); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1050 = (x1049 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1051 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.rs1._super.io.oldTxn.count._super), 0) * - inv_0(x1050)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1052 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.rs1._super.io.newTxn.addr._super), 0)); - ExtVal x1053 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.rs1._super.io.newTxn.cycle._super), 0)); - ExtVal x1054 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.rs1._super.io.newTxn.dataLow._super), 0)); - ExtVal x1055 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.rs1._super.io.newTxn.dataHigh._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1056 = (((x1052 + x1053) + x1054) + x1055); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1057 = (x1056 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1058 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.rs1._super.io.newTxn.count._super), 0) * - inv_0(x1057)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1059 = (x1050 * x1057); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1060 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.rs1._super.io.oldTxn.count._super), 0) * - x1057); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1061 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.rs1._super._0._0.arg.cycle._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1062 = (x1061 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1063 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.rs1._super._0._0.arg.count._super), 0) * - inv_0(x1062)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1064 = (((x1042 + x1051) + x1058) + x1063); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 2), x1064); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1065 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 2), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 1), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1066 = - (((x1065 * (x1059 * x1062)) - (x1060 * x1062)) - - ((x1050 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.rs1._super.io.newTxn.count._super), 0)) * - x1062)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1066 - - (x1059 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.rs1._super._0._0.arg.count._super), 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1067 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.rs2._super.io.oldTxn.addr._super), 0)); - ExtVal x1068 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.rs2._super.io.oldTxn.cycle._super), 0)); - ExtVal x1069 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.rs2._super.io.oldTxn.dataLow._super), 0)); - ExtVal x1070 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.rs2._super.io.oldTxn.dataHigh._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1071 = (((x1067 + x1068) + x1069) + x1070); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1072 = (x1071 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1073 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.rs2._super.io.oldTxn.count._super), 0) * - inv_0(x1072)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1074 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.rs2._super.io.newTxn.addr._super), 0)); - ExtVal x1075 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.rs2._super.io.newTxn.cycle._super), 0)); - ExtVal x1076 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.rs2._super.io.newTxn.dataLow._super), 0)); - ExtVal x1077 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.rs2._super.io.newTxn.dataHigh._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1078 = (((x1074 + x1075) + x1076) + x1077); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1079 = (x1078 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1080 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.rs2._super.io.newTxn.count._super), 0) * - inv_0(x1079)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1081 = (x1072 * x1079); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1082 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.rs2._super.io.oldTxn.count._super), 0) * - x1079); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1083 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.rs2._super._0._0.arg.cycle._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1084 = (x1083 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1085 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.rs2._super._0._0.arg.count._super), 0) * - inv_0(x1084)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1086 = (((x1064 + x1073) + x1080) + x1085); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 3), x1086); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1087 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 3), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 2), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1088 = - (((x1087 * (x1081 * x1084)) - (x1082 * x1084)) - - ((x1072 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.rs2._super.io.newTxn.count._super), 0)) * - x1084)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1088 - - (x1081 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.rs2._super._0._0.arg.count._super), 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1089 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.addrU32.low16.arg.val._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1090 = (x1089 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1091 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.addrU32.low16.arg.count._super), 0) * - inv_0(x1090)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1092 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.addrU32.high16.arg.val._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1093 = (x1092 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1094 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.addrU32.high16.arg.count._super), 0) * - inv_0(x1093)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1095 = (x1090 * x1093); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1096 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.addrU32.low16.arg.count._super), 0) * - x1093); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1097 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.addr.upperDiff.ret.arg.val._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1098 = (x1097 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1099 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.addr.upperDiff.ret.arg.count._super), 0) * - inv_0(x1098)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1100 = (((x1086 + x1091) + x1094) + x1099); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 4), x1100); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1101 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 4), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 3), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1102 = - (((x1101 * (x1095 * x1098)) - (x1096 * x1098)) - - ((x1090 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.addrU32.high16.arg.count._super), 0)) * - x1098)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1102 - - (x1095 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.addr.upperDiff.ret.arg.count._super), 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1103 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.addr.med14.arg.val._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1104 = (x1103 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1105 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.addr.med14.arg.count._super), 0) * - inv_0(x1104)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1106 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.data.io.oldTxn.addr._super), 0)); - ExtVal x1107 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.data.io.oldTxn.cycle._super), 0)); - ExtVal x1108 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.data.io.oldTxn.dataLow._super), 0)); - ExtVal x1109 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.data.io.oldTxn.dataHigh._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1110 = (((x1106 + x1107) + x1108) + x1109); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1111 = (x1110 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1112 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.data.io.oldTxn.count._super), 0) * - inv_0(x1111)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1113 = (x1104 * x1111); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1114 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.addr.med14.arg.count._super), 0) * x1111); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1115 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.data.io.newTxn.addr._super), 0)); - ExtVal x1116 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.data.io.newTxn.cycle._super), 0)); - ExtVal x1117 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.data.io.newTxn.dataLow._super), 0)); - ExtVal x1118 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.data.io.newTxn.dataHigh._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1119 = (((x1115 + x1116) + x1117) + x1118); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1120 = (x1119 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1121 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.data.io.newTxn.count._super), 0) * - inv_0(x1120)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1122 = (((x1100 + x1105) + x1112) + x1121); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 5), x1122); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1123 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 5), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 4), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1124 = - (((x1123 * (x1113 * x1120)) - (x1114 * x1120)) - - ((x1104 * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.data.io.oldTxn.count._super), 0)) * - x1120)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1124 - - (x1113 * LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.data.io.newTxn.count._super), 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1125 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.data._0._0.arg.cycle._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1126 = (x1125 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1127 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.data._0._0.arg.count._super), 0) * - inv_0(x1126)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1128 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD( - LAYOUT_LOOKUP(LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm6._arguments_Mem1Output.argU8), 0), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1129 = (x1128 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1130 = - (LOAD( - LAYOUT_LOOKUP(LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm6._arguments_Mem1Output.argU8), 0), - count._super), - 0) * - inv_0(x1129)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1131 = (x1126 * x1129); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1132 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.input.data._0._0.arg.count._super), 0) * x1129); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1133 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD( - LAYOUT_LOOKUP(LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm6._arguments_Mem1Output.argU8), 1), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1134 = (x1133 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1135 = - (LOAD( - LAYOUT_LOOKUP(LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm6._arguments_Mem1Output.argU8), 1), - count._super), - 0) * - inv_0(x1134)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1136 = (((x1122 + x1127) + x1130) + x1135); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 6), x1136); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1137 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 6), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 5), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1138 = - (((x1137 * (x1131 * x1134)) - (x1132 * x1134)) - - ((x1126 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm6._arguments_Mem1Output.argU8), 0), - count._super), - 0)) * - x1134)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1138 - - (x1131 * LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm6._arguments_Mem1Output.argU8), 1), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1139 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD( - LAYOUT_LOOKUP(LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm6._arguments_Mem1Output.argU8), 2), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1140 = (x1139 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1141 = - (LOAD( - LAYOUT_LOOKUP(LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm6._arguments_Mem1Output.argU8), 2), - count._super), - 0) * - inv_0(x1140)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1142 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD( - LAYOUT_LOOKUP(LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm6._arguments_Mem1Output.argU8), 3), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1143 = (x1142 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1144 = - (LOAD( - LAYOUT_LOOKUP(LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm6._arguments_Mem1Output.argU8), 3), - count._super), - 0) * - inv_0(x1143)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1145 = (x1140 * x1143); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1146 = - (LOAD( - LAYOUT_LOOKUP(LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm6._arguments_Mem1Output.argU8), 2), - count._super), - 0) * - x1143); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1147 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6._0._0.io.oldTxn.addr._super), 0)); - ExtVal x1148 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6._0._0.io.oldTxn.cycle._super), 0)); - ExtVal x1149 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6._0._0.io.oldTxn.dataLow._super), 0)); - ExtVal x1150 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6._0._0.io.oldTxn.dataHigh._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1151 = (((x1147 + x1148) + x1149) + x1150); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1152 = (x1151 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1153 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6._0._0.io.oldTxn.count._super), 0) * inv_0(x1152)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1154 = (((x1136 + x1141) + x1144) + x1153); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 7), x1154); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1155 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 7), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 6), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1156 = - (((x1155 * (x1145 * x1152)) - (x1146 * x1152)) - - ((x1140 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm6._arguments_Mem1Output.argU8), 3), - count._super), - 0)) * - x1152)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1156 - - (x1145 * LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6._0._0.io.oldTxn.count._super), 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1157 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6._0._0.io.newTxn.addr._super), 0)); - ExtVal x1158 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6._0._0.io.newTxn.cycle._super), 0)); - ExtVal x1159 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6._0._0.io.newTxn.dataLow._super), 0)); - ExtVal x1160 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6._0._0.io.newTxn.dataHigh._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1161 = (((x1157 + x1158) + x1159) + x1160); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1162 = (x1161 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1163 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6._0._0.io.newTxn.count._super), 0) * inv_0(x1162)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1164 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6._0._0._0._0.arg.cycle._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1165 = (x1164 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1166 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6._0._0._0._0.arg.count._super), 0) * inv_0(x1165)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1167 = (x1162 * x1165); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1168 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6._0._0.io.newTxn.count._super), 0) * x1165); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1169 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.pcAdd.low16.arg.val._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1170 = (x1169 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1171 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.pcAdd.low16.arg.count._super), 0) * inv_0(x1170)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1172 = (((x1154 + x1163) + x1166) + x1171); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 8), x1172); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1173 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 8), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 7), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1174 = - (((x1173 * (x1167 * x1170)) - (x1168 * x1170)) - - ((x1162 * LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6._0._0._0._0.arg.count._super), 0)) * - x1170)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1174 - - (x1167 * LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.pcAdd.low16.arg.count._super), 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1175 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.pcAdd.high16.arg.val._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1176 = (x1175 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1177 = (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.pcAdd.high16.arg.count._super), 0) * - inv_0(x1176)); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 9), (x1172 + x1177)); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1178 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 9), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 8), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1179 = ((x1178 * x1176) - - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm6.pcAdd.high16.arg.count._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ(x1179, "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:122 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 18), - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 9), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:124 - ExtVal x1180 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 18), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 9), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:125 - EQZ(x1180, "zirgen/dsl/passes/GenerateAccum.cpp:125"); - x5 = x4; - } else if (to_size_t( - LOAD(LAYOUT_LOOKUP(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(arg0, instResult._selector), 7), - _super), - 0))) { - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1181 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm7.arg.cycle._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1182 = (x1181 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1183 = (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm7.arg.count._super), 0) * inv_0(x1182)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1184 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 18), 1) + x1183); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1185 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 0), - addr._super), - 0)); - ExtVal x1186 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 0), - cycle._super), - 0)); - ExtVal x1187 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 0), - dataLow._super), - 0)); - ExtVal x1188 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 0), - dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1189 = (((x1185 + x1186) + x1187) + x1188); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1190 = (x1189 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1191 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 0), - count._super), - 0) * - inv_0(x1190)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1192 = (x1182 * x1190); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1193 = (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm7.arg.count._super), 0) * x1190); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1194 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 1), - addr._super), - 0)); - ExtVal x1195 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 1), - cycle._super), - 0)); - ExtVal x1196 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 1), - dataLow._super), - 0)); - ExtVal x1197 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 1), - dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1198 = (((x1194 + x1195) + x1196) + x1197); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1199 = (x1198 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1200 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 1), - count._super), - 0) * - inv_0(x1199)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1201 = ((x1184 + x1191) + x1200); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 0), x1201); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1202 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 0), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 18), 1)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1203 = - (((x1202 * (x1192 * x1199)) - (x1193 * x1199)) - - ((x1182 * - LOAD( - LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 0), - count._super), - 0)) * - x1199)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1203 - - (x1192 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 1), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1204 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 2), - addr._super), - 0)); - ExtVal x1205 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 2), - cycle._super), - 0)); - ExtVal x1206 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 2), - dataLow._super), - 0)); - ExtVal x1207 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 2), - dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1208 = (((x1204 + x1205) + x1206) + x1207); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1209 = (x1208 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1210 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 2), - count._super), - 0) * - inv_0(x1209)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1211 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 3), - addr._super), - 0)); - ExtVal x1212 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 3), - cycle._super), - 0)); - ExtVal x1213 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 3), - dataLow._super), - 0)); - ExtVal x1214 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 3), - dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1215 = (((x1211 + x1212) + x1213) + x1214); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1216 = (x1215 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1217 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 3), - count._super), - 0) * - inv_0(x1216)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1218 = (x1209 * x1216); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1219 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 2), - count._super), - 0) * - x1216); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1220 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 4), - addr._super), - 0)); - ExtVal x1221 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 4), - cycle._super), - 0)); - ExtVal x1222 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 4), - dataLow._super), - 0)); - ExtVal x1223 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 4), - dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1224 = (((x1220 + x1221) + x1222) + x1223); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1225 = (x1224 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1226 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 4), - count._super), - 0) * - inv_0(x1225)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1227 = (((x1201 + x1210) + x1217) + x1226); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 1), x1227); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1228 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 1), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 0), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1229 = - (((x1228 * (x1218 * x1225)) - (x1219 * x1225)) - - ((x1209 * - LOAD( - LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 3), - count._super), - 0)) * - x1225)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1229 - - (x1218 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 4), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1230 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 5), - addr._super), - 0)); - ExtVal x1231 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 5), - cycle._super), - 0)); - ExtVal x1232 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 5), - dataLow._super), - 0)); - ExtVal x1233 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 5), - dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1234 = (((x1230 + x1231) + x1232) + x1233); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1235 = (x1234 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1236 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 5), - count._super), - 0) * - inv_0(x1235)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1237 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 6), - addr._super), - 0)); - ExtVal x1238 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 6), - cycle._super), - 0)); - ExtVal x1239 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 6), - dataLow._super), - 0)); - ExtVal x1240 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 6), - dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1241 = (((x1237 + x1238) + x1239) + x1240); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1242 = (x1241 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1243 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 6), - count._super), - 0) * - inv_0(x1242)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1244 = (x1235 * x1242); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1245 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 5), - count._super), - 0) * - x1242); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1246 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 7), - addr._super), - 0)); - ExtVal x1247 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 7), - cycle._super), - 0)); - ExtVal x1248 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 7), - dataLow._super), - 0)); - ExtVal x1249 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 7), - dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1250 = (((x1246 + x1247) + x1248) + x1249); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1251 = (x1250 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1252 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 7), - count._super), - 0) * - inv_0(x1251)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1253 = (((x1227 + x1236) + x1243) + x1252); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 2), x1253); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1254 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 2), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 1), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1255 = - (((x1254 * (x1244 * x1251)) - (x1245 * x1251)) - - ((x1235 * - LOAD( - LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 6), - count._super), - 0)) * - x1251)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1255 - - (x1244 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 7), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1256 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 8), - addr._super), - 0)); - ExtVal x1257 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 8), - cycle._super), - 0)); - ExtVal x1258 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 8), - dataLow._super), - 0)); - ExtVal x1259 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 8), - dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1260 = (((x1256 + x1257) + x1258) + x1259); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1261 = (x1260 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1262 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 8), - count._super), - 0) * - inv_0(x1261)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1263 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 9), - addr._super), - 0)); - ExtVal x1264 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 9), - cycle._super), - 0)); - ExtVal x1265 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 9), - dataLow._super), - 0)); - ExtVal x1266 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 9), - dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1267 = (((x1263 + x1264) + x1265) + x1266); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1268 = (x1267 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1269 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 9), - count._super), - 0) * - inv_0(x1268)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1270 = (x1261 * x1268); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1271 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 8), - count._super), - 0) * - x1268); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1272 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 10), - addr._super), - 0)); - ExtVal x1273 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 10), - cycle._super), - 0)); - ExtVal x1274 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 10), - dataLow._super), - 0)); - ExtVal x1275 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 10), - dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1276 = (((x1272 + x1273) + x1274) + x1275); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1277 = (x1276 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1278 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 10), - count._super), - 0) * - inv_0(x1277)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1279 = (((x1253 + x1262) + x1269) + x1278); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 3), x1279); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1280 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 3), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 2), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1281 = - (((x1280 * (x1270 * x1277)) - (x1271 * x1277)) - - ((x1261 * - LOAD( - LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 9), - count._super), - 0)) * - x1277)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1281 - - (x1270 * - LOAD( - LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 10), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1282 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 11), - addr._super), - 0)); - ExtVal x1283 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 11), - cycle._super), - 0)); - ExtVal x1284 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 11), - dataLow._super), - 0)); - ExtVal x1285 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 11), - dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1286 = (((x1282 + x1283) + x1284) + x1285); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1287 = (x1286 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1288 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 11), - count._super), - 0) * - inv_0(x1287)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1289 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 12), - addr._super), - 0)); - ExtVal x1290 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 12), - cycle._super), - 0)); - ExtVal x1291 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 12), - dataLow._super), - 0)); - ExtVal x1292 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 12), - dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1293 = (((x1289 + x1290) + x1291) + x1292); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1294 = (x1293 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1295 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 12), - count._super), - 0) * - inv_0(x1294)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1296 = (x1287 * x1294); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1297 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 11), - count._super), - 0) * - x1294); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1298 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 13), - addr._super), - 0)); - ExtVal x1299 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 13), - cycle._super), - 0)); - ExtVal x1300 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 13), - dataLow._super), - 0)); - ExtVal x1301 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 13), - dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1302 = (((x1298 + x1299) + x1300) + x1301); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1303 = (x1302 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1304 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 13), - count._super), - 0) * - inv_0(x1303)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1305 = (((x1279 + x1288) + x1295) + x1304); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 4), x1305); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1306 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 4), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 3), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1307 = - (((x1306 * (x1296 * x1303)) - (x1297 * x1303)) - - ((x1287 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), - 12), - count._super), - 0)) * - x1303)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1307 - - (x1296 * - LOAD( - LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 13), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1308 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 14), - addr._super), - 0)); - ExtVal x1309 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 14), - cycle._super), - 0)); - ExtVal x1310 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 14), - dataLow._super), - 0)); - ExtVal x1311 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 14), - dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1312 = (((x1308 + x1309) + x1310) + x1311); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1313 = (x1312 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1314 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 14), - count._super), - 0) * - inv_0(x1313)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1315 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 15), - addr._super), - 0)); - ExtVal x1316 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 15), - cycle._super), - 0)); - ExtVal x1317 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 15), - dataLow._super), - 0)); - ExtVal x1318 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 15), - dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1319 = (((x1315 + x1316) + x1317) + x1318); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1320 = (x1319 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1321 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 15), - count._super), - 0) * - inv_0(x1320)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1322 = (x1313 * x1320); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1323 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), 14), - count._super), - 0) * - x1320); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1324 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.cycleArg), 0), - cycle._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1325 = (x1324 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1326 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.cycleArg), 0), - count._super), - 0) * - inv_0(x1325)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1327 = (((x1305 + x1314) + x1321) + x1326); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 5), x1327); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1328 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 5), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 4), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1329 = - (((x1328 * (x1322 * x1325)) - (x1323 * x1325)) - - ((x1313 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.memoryArg), - 15), - count._super), - 0)) * - x1325)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1329 - - (x1322 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.cycleArg), 0), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1330 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.cycleArg), 1), - cycle._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1331 = (x1330 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1332 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.cycleArg), 1), - count._super), - 0) * - inv_0(x1331)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1333 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.cycleArg), 2), - cycle._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1334 = (x1333 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1335 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.cycleArg), 2), - count._super), - 0) * - inv_0(x1334)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1336 = (x1331 * x1334); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1337 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.cycleArg), 1), - count._super), - 0) * - x1334); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1338 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.cycleArg), 3), - cycle._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1339 = (x1338 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1340 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.cycleArg), 3), - count._super), - 0) * - inv_0(x1339)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1341 = (((x1327 + x1332) + x1335) + x1340); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 6), x1341); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1342 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 6), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 5), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1343 = - (((x1342 * (x1336 * x1339)) - (x1337 * x1339)) - - ((x1331 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.cycleArg), 2), - count._super), - 0)) * - x1339)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1343 - - (x1336 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.cycleArg), 3), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1344 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.cycleArg), 4), - cycle._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1345 = (x1344 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1346 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.cycleArg), 4), - count._super), - 0) * - inv_0(x1345)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1347 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.cycleArg), 5), - cycle._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1348 = (x1347 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1349 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.cycleArg), 5), - count._super), - 0) * - inv_0(x1348)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1350 = (x1345 * x1348); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1351 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.cycleArg), 4), - count._super), - 0) * - x1348); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1352 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.cycleArg), 6), - cycle._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1353 = (x1352 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1354 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.cycleArg), 6), - count._super), - 0) * - inv_0(x1353)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1355 = (((x1341 + x1346) + x1349) + x1354); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 7), x1355); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1356 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 7), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 6), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1357 = - (((x1356 * (x1350 * x1353)) - (x1351 * x1353)) - - ((x1345 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.cycleArg), 5), - count._super), - 0)) * - x1353)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1357 - - (x1350 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.cycleArg), 6), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1358 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.cycleArg), 7), - cycle._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1359 = (x1358 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1360 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.cycleArg), 7), - count._super), - 0) * - inv_0(x1359)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1361 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 0), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1362 = (x1361 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1363 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 0), - count._super), - 0) * - inv_0(x1362)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1364 = (x1359 * x1362); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1365 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.cycleArg), 7), - count._super), - 0) * - x1362); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1366 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 1), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1367 = (x1366 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1368 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 1), - count._super), - 0) * - inv_0(x1367)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1369 = (((x1355 + x1360) + x1363) + x1368); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 8), x1369); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1370 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 8), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 7), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1371 = - (((x1370 * (x1364 * x1367)) - (x1365 * x1367)) - - ((x1359 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 0), - count._super), - 0)) * - x1367)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1371 - - (x1364 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 1), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1372 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 2), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1373 = (x1372 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1374 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 2), - count._super), - 0) * - inv_0(x1373)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1375 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 3), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1376 = (x1375 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1377 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 3), - count._super), - 0) * - inv_0(x1376)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1378 = (x1373 * x1376); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1379 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 2), - count._super), - 0) * - x1376); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1380 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 4), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1381 = (x1380 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1382 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 4), - count._super), - 0) * - inv_0(x1381)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1383 = (((x1369 + x1374) + x1377) + x1382); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 9), x1383); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1384 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 9), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 8), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1385 = - (((x1384 * (x1378 * x1381)) - (x1379 * x1381)) - - ((x1373 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 3), - count._super), - 0)) * - x1381)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1385 - - (x1378 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 4), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1386 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 5), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1387 = (x1386 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1388 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 5), - count._super), - 0) * - inv_0(x1387)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1389 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 6), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1390 = (x1389 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1391 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 6), - count._super), - 0) * - inv_0(x1390)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1392 = (x1387 * x1390); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1393 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 5), - count._super), - 0) * - x1390); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1394 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 7), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1395 = (x1394 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1396 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 7), - count._super), - 0) * - inv_0(x1395)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1397 = (((x1383 + x1388) + x1391) + x1396); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 10), x1397); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1398 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 10), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 9), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1399 = - (((x1398 * (x1392 * x1395)) - (x1393 * x1395)) - - ((x1387 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 6), - count._super), - 0)) * - x1395)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1399 - - (x1392 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 7), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1400 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 8), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1401 = (x1400 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1402 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 8), - count._super), - 0) * - inv_0(x1401)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1403 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 9), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1404 = (x1403 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1405 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 9), - count._super), - 0) * - inv_0(x1404)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1406 = (x1401 * x1404); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1407 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 8), - count._super), - 0) * - x1404); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1408 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 10), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1409 = (x1408 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1410 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 10), - count._super), - 0) * - inv_0(x1409)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1411 = (((x1397 + x1402) + x1405) + x1410); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 11), x1411); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1412 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 11), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 10), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1413 = - (((x1412 * (x1406 * x1409)) - (x1407 * x1409)) - - ((x1401 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 9), - count._super), - 0)) * - x1409)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1413 - - (x1406 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 10), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1414 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 11), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1415 = (x1414 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1416 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 11), - count._super), - 0) * - inv_0(x1415)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1417 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 12), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1418 = (x1417 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1419 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 12), - count._super), - 0) * - inv_0(x1418)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1420 = (x1415 * x1418); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1421 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 11), - count._super), - 0) * - x1418); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1422 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 13), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1423 = (x1422 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1424 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 13), - count._super), - 0) * - inv_0(x1423)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1425 = (((x1411 + x1416) + x1419) + x1424); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 12), x1425); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1426 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 12), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 11), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1427 = - (((x1426 * (x1420 * x1423)) - (x1421 * x1423)) - - ((x1415 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 12), - count._super), - 0)) * - x1423)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1427 - - (x1420 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 13), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1428 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 14), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1429 = (x1428 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1430 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 14), - count._super), - 0) * - inv_0(x1429)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1431 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 15), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1432 = (x1431 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1433 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 15), - count._super), - 0) * - inv_0(x1432)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1434 = (x1429 * x1432); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1435 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 14), - count._super), - 0) * - x1432); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1436 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 0), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1437 = (x1436 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1438 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 0), - count._super), - 0) * - inv_0(x1437)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1439 = (((x1425 + x1430) + x1433) + x1438); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 13), x1439); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1440 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 13), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 12), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1441 = - (((x1440 * (x1434 * x1437)) - (x1435 * x1437)) - - ((x1429 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU16), 15), - count._super), - 0)) * - x1437)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1441 - - (x1434 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 0), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1442 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 1), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1443 = (x1442 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1444 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 1), - count._super), - 0) * - inv_0(x1443)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1445 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 2), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1446 = (x1445 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1447 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 2), - count._super), - 0) * - inv_0(x1446)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1448 = (x1443 * x1446); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1449 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 1), - count._super), - 0) * - x1446); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1450 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 3), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1451 = (x1450 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1452 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 3), - count._super), - 0) * - inv_0(x1451)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1453 = (((x1439 + x1444) + x1447) + x1452); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 14), x1453); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1454 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 14), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 13), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1455 = - (((x1454 * (x1448 * x1451)) - (x1449 * x1451)) - - ((x1443 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 2), - count._super), - 0)) * - x1451)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1455 - - (x1448 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 3), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1456 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 4), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1457 = (x1456 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1458 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 4), - count._super), - 0) * - inv_0(x1457)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1459 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 5), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1460 = (x1459 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1461 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 5), - count._super), - 0) * - inv_0(x1460)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1462 = (x1457 * x1460); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1463 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 4), - count._super), - 0) * - x1460); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1464 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 6), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1465 = (x1464 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1466 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 6), - count._super), - 0) * - inv_0(x1465)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1467 = (((x1453 + x1458) + x1461) + x1466); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 15), x1467); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1468 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 15), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 14), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1469 = - (((x1468 * (x1462 * x1465)) - (x1463 * x1465)) - - ((x1457 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 5), - count._super), - 0)) * - x1465)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1469 - - (x1462 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 6), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1470 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 7), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1471 = (x1470 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1472 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 7), - count._super), - 0) * - inv_0(x1471)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1473 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 8), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1474 = (x1473 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1475 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 8), - count._super), - 0) * - inv_0(x1474)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1476 = (x1471 * x1474); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1477 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 7), - count._super), - 0) * - x1474); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1478 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 9), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1479 = (x1478 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1480 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 9), - count._super), - 0) * - inv_0(x1479)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1481 = (((x1467 + x1472) + x1475) + x1480); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 16), x1481); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1482 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 16), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 15), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1483 = - (((x1482 * (x1476 * x1479)) - (x1477 * x1479)) - - ((x1471 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 8), - count._super), - 0)) * - x1479)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1483 - - (x1476 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 9), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1484 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 10), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1485 = (x1484 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1486 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 10), - count._super), - 0) * - inv_0(x1485)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1487 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 11), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1488 = (x1487 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1489 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 11), - count._super), - 0) * - inv_0(x1488)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1490 = (x1485 * x1488); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1491 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 10), - count._super), - 0) * - x1488); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1492 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 12), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1493 = (x1492 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1494 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 12), - count._super), - 0) * - inv_0(x1493)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1495 = (((x1481 + x1486) + x1489) + x1494); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 17), x1495); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1496 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 17), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 16), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1497 = - (((x1496 * (x1490 * x1493)) - (x1491 * x1493)) - - ((x1485 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 11), - count._super), - 0)) * - x1493)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1497 - - (x1490 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 12), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1498 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 13), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1499 = (x1498 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1500 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 13), - count._super), - 0) * - inv_0(x1499)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1501 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 14), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1502 = (x1501 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1503 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 14), - count._super), - 0) * - inv_0(x1502)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1504 = (x1499 * x1502); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1505 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 13), - count._super), - 0) * - x1502); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1506 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 15), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1507 = (x1506 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1508 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 15), - count._super), - 0) * - inv_0(x1507)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1509 = (((x1495 + x1500) + x1503) + x1508); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 18), x1509); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1510 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 18), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 17), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1511 = - (((x1510 * (x1504 * x1507)) - (x1505 * x1507)) - - ((x1499 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 14), - count._super), - 0)) * - x1507)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1511 - - (x1504 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm7._arguments_Control0_Super.argU8), 15), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - x5 = x4; - } else if (to_size_t( - LOAD(LAYOUT_LOOKUP(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(arg0, instResult._selector), 8), - _super), - 0))) { - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1512 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm8.pcAddr.upperDiff.ret.arg.val._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1513 = (x1512 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1514 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm8.pcAddr.upperDiff.ret.arg.count._super), 0) * - inv_0(x1513)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1515 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 18), 1) + x1514); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1516 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm8.pcAddr.med14.arg.val._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1517 = (x1516 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1518 = (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm8.pcAddr.med14.arg.count._super), 0) * - inv_0(x1517)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1519 = (x1513 * x1517); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1520 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm8.pcAddr.upperDiff.ret.arg.count._super), 0) * - x1517); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1521 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 0), - addr._super), - 0)); - ExtVal x1522 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 0), - cycle._super), - 0)); - ExtVal x1523 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 0), - dataLow._super), - 0)); - ExtVal x1524 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 0), - dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1525 = (((x1521 + x1522) + x1523) + x1524); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1526 = (x1525 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1527 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 0), - count._super), - 0) * - inv_0(x1526)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1528 = ((x1515 + x1518) + x1527); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 0), x1528); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1529 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 0), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 18), 1)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1530 = - (((x1529 * (x1519 * x1526)) - (x1520 * x1526)) - - ((x1513 * LOAD(LAYOUT_LOOKUP(arg0, instResult.arm8.pcAddr.med14.arg.count._super), 0)) * - x1526)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1530 - - (x1519 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 0), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1531 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 1), - addr._super), - 0)); - ExtVal x1532 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 1), - cycle._super), - 0)); - ExtVal x1533 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 1), - dataLow._super), - 0)); - ExtVal x1534 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 1), - dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1535 = (((x1531 + x1532) + x1533) + x1534); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1536 = (x1535 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1537 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 1), - count._super), - 0) * - inv_0(x1536)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1538 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 2), - addr._super), - 0)); - ExtVal x1539 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 2), - cycle._super), - 0)); - ExtVal x1540 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 2), - dataLow._super), - 0)); - ExtVal x1541 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 2), - dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1542 = (((x1538 + x1539) + x1540) + x1541); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1543 = (x1542 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1544 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 2), - count._super), - 0) * - inv_0(x1543)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1545 = (x1536 * x1543); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1546 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 1), - count._super), - 0) * - x1543); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1547 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 3), - addr._super), - 0)); - ExtVal x1548 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 3), - cycle._super), - 0)); - ExtVal x1549 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 3), - dataLow._super), - 0)); - ExtVal x1550 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 3), - dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1551 = (((x1547 + x1548) + x1549) + x1550); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1552 = (x1551 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1553 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 3), - count._super), - 0) * - inv_0(x1552)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1554 = (((x1528 + x1537) + x1544) + x1553); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 1), x1554); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1555 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 1), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 0), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1556 = - (((x1555 * (x1545 * x1552)) - (x1546 * x1552)) - - ((x1536 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 2), - count._super), - 0)) * - x1552)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1556 - - (x1545 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 3), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1557 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 4), - addr._super), - 0)); - ExtVal x1558 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 4), - cycle._super), - 0)); - ExtVal x1559 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 4), - dataLow._super), - 0)); - ExtVal x1560 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 4), - dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1561 = (((x1557 + x1558) + x1559) + x1560); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1562 = (x1561 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1563 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 4), - count._super), - 0) * - inv_0(x1562)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1564 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 5), - addr._super), - 0)); - ExtVal x1565 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 5), - cycle._super), - 0)); - ExtVal x1566 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 5), - dataLow._super), - 0)); - ExtVal x1567 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 5), - dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1568 = (((x1564 + x1565) + x1566) + x1567); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1569 = (x1568 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1570 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 5), - count._super), - 0) * - inv_0(x1569)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1571 = (x1562 * x1569); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1572 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 4), - count._super), - 0) * - x1569); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1573 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 6), - addr._super), - 0)); - ExtVal x1574 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 6), - cycle._super), - 0)); - ExtVal x1575 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 6), - dataLow._super), - 0)); - ExtVal x1576 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 6), - dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1577 = (((x1573 + x1574) + x1575) + x1576); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1578 = (x1577 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1579 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 6), - count._super), - 0) * - inv_0(x1578)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1580 = (((x1554 + x1563) + x1570) + x1579); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 2), x1580); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1581 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 2), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 1), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1582 = - (((x1581 * (x1571 * x1578)) - (x1572 * x1578)) - - ((x1562 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 5), - count._super), - 0)) * - x1578)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1582 - - (x1571 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 6), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1583 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 7), - addr._super), - 0)); - ExtVal x1584 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 7), - cycle._super), - 0)); - ExtVal x1585 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 7), - dataLow._super), - 0)); - ExtVal x1586 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 7), - dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1587 = (((x1583 + x1584) + x1585) + x1586); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1588 = (x1587 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1589 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 7), - count._super), - 0) * - inv_0(x1588)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1590 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.cycleArg), 0), - cycle._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1591 = (x1590 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1592 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.cycleArg), 0), - count._super), - 0) * - inv_0(x1591)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1593 = (x1588 * x1591); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1594 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.memoryArg), 7), - count._super), - 0) * - x1591); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1595 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.cycleArg), 1), - cycle._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1596 = (x1595 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1597 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.cycleArg), 1), - count._super), - 0) * - inv_0(x1596)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1598 = (((x1580 + x1589) + x1592) + x1597); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 3), x1598); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1599 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 3), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 2), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1600 = - (((x1599 * (x1593 * x1596)) - (x1594 * x1596)) - - ((x1588 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.cycleArg), 0), - count._super), - 0)) * - x1596)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1600 - - (x1593 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.cycleArg), 1), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1601 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.cycleArg), 2), - cycle._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1602 = (x1601 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1603 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.cycleArg), 2), - count._super), - 0) * - inv_0(x1602)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1604 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.cycleArg), 3), - cycle._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1605 = (x1604 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1606 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.cycleArg), 3), - count._super), - 0) * - inv_0(x1605)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1607 = (x1602 * x1605); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1608 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.cycleArg), 2), - count._super), - 0) * - x1605); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1609 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.argU16), 0), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1610 = (x1609 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1611 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.argU16), 0), - count._super), - 0) * - inv_0(x1610)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1612 = (((x1598 + x1603) + x1606) + x1611); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 4), x1612); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1613 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 4), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 3), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1614 = - (((x1613 * (x1607 * x1610)) - (x1608 * x1610)) - - ((x1602 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.cycleArg), 3), - count._super), - 0)) * - x1610)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1614 - - (x1607 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.argU16), 0), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1615 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.argU16), 1), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1616 = (x1615 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1617 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.argU16), 1), - count._super), - 0) * - inv_0(x1616)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1618 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm8.addPC.low16.arg.val._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1619 = (x1618 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1620 = - (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm8.addPC.low16.arg.count._super), 0) * inv_0(x1619)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1621 = (x1616 * x1619); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1622 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm8._arguments_ECall0Output.argU16), 1), - count._super), - 0) * - x1619); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1623 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm8.addPC.high16.arg.val._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1624 = (x1623 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1625 = (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm8.addPC.high16.arg.count._super), 0) * - inv_0(x1624)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1626 = (((x1612 + x1617) + x1620) + x1625); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 5), x1626); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1627 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 5), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 4), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1628 = - (((x1627 * (x1621 * x1624)) - (x1622 * x1624)) - - ((x1616 * LOAD(LAYOUT_LOOKUP(arg0, instResult.arm8.addPC.low16.arg.count._super), 0)) * - x1624)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1628 - - (x1621 * LOAD(LAYOUT_LOOKUP(arg0, instResult.arm8.addPC.high16.arg.count._super), 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1629 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm8.arg.cycle._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1630 = (x1629 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1631 = (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm8.arg.count._super), 0) * inv_0(x1630)); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 6), (x1626 + x1631)); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1632 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 6), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 5), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1633 = - ((x1632 * x1630) - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm8.arg.count._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ(x1633, "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:122 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 18), - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 6), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:124 - ExtVal x1634 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 18), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 6), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:125 - EQZ(x1634, "zirgen/dsl/passes/GenerateAccum.cpp:125"); - x5 = x4; - } else if (to_size_t( - LOAD(LAYOUT_LOOKUP(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(arg0, instResult._selector), 9), - _super), - 0))) { - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1635 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 0), - addr._super), - 0)); - ExtVal x1636 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 0), - cycle._super), - 0)); - ExtVal x1637 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 0), - dataLow._super), - 0)); - ExtVal x1638 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 0), - dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1639 = (((x1635 + x1636) + x1637) + x1638); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1640 = (x1639 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1641 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 0), - count._super), - 0) * - inv_0(x1640)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1642 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 18), 1) + x1641); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1643 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 1), - addr._super), - 0)); - ExtVal x1644 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 1), - cycle._super), - 0)); - ExtVal x1645 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 1), - dataLow._super), - 0)); - ExtVal x1646 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 1), - dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1647 = (((x1643 + x1644) + x1645) + x1646); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1648 = (x1647 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1649 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 1), - count._super), - 0) * - inv_0(x1648)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1650 = (x1640 * x1648); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1651 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 0), - count._super), - 0) * - x1648); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1652 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 2), - addr._super), - 0)); - ExtVal x1653 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 2), - cycle._super), - 0)); - ExtVal x1654 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 2), - dataLow._super), - 0)); - ExtVal x1655 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 2), - dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1656 = (((x1652 + x1653) + x1654) + x1655); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1657 = (x1656 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1658 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 2), - count._super), - 0) * - inv_0(x1657)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1659 = ((x1642 + x1649) + x1658); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 0), x1659); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1660 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 0), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 18), 1)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1661 = - (((x1660 * (x1650 * x1657)) - (x1651 * x1657)) - - ((x1640 * - LOAD( - LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 1), - count._super), - 0)) * - x1657)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1661 - - (x1650 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 2), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1662 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 3), - addr._super), - 0)); - ExtVal x1663 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 3), - cycle._super), - 0)); - ExtVal x1664 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 3), - dataLow._super), - 0)); - ExtVal x1665 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 3), - dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1666 = (((x1662 + x1663) + x1664) + x1665); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1667 = (x1666 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1668 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 3), - count._super), - 0) * - inv_0(x1667)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1669 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 4), - addr._super), - 0)); - ExtVal x1670 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 4), - cycle._super), - 0)); - ExtVal x1671 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 4), - dataLow._super), - 0)); - ExtVal x1672 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 4), - dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1673 = (((x1669 + x1670) + x1671) + x1672); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1674 = (x1673 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1675 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 4), - count._super), - 0) * - inv_0(x1674)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1676 = (x1667 * x1674); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1677 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 3), - count._super), - 0) * - x1674); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1678 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 5), - addr._super), - 0)); - ExtVal x1679 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 5), - cycle._super), - 0)); - ExtVal x1680 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 5), - dataLow._super), - 0)); - ExtVal x1681 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 5), - dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1682 = (((x1678 + x1679) + x1680) + x1681); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1683 = (x1682 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1684 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 5), - count._super), - 0) * - inv_0(x1683)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1685 = (((x1659 + x1668) + x1675) + x1684); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 1), x1685); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1686 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 1), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 0), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1687 = - (((x1686 * (x1676 * x1683)) - (x1677 * x1683)) - - ((x1667 * - LOAD( - LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 4), - count._super), - 0)) * - x1683)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1687 - - (x1676 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 5), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1688 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 6), - addr._super), - 0)); - ExtVal x1689 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 6), - cycle._super), - 0)); - ExtVal x1690 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 6), - dataLow._super), - 0)); - ExtVal x1691 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 6), - dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1692 = (((x1688 + x1689) + x1690) + x1691); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1693 = (x1692 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1694 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 6), - count._super), - 0) * - inv_0(x1693)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1695 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 7), - addr._super), - 0)); - ExtVal x1696 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 7), - cycle._super), - 0)); - ExtVal x1697 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 7), - dataLow._super), - 0)); - ExtVal x1698 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 7), - dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1699 = (((x1695 + x1696) + x1697) + x1698); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1700 = (x1699 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1701 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 7), - count._super), - 0) * - inv_0(x1700)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1702 = (x1693 * x1700); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1703 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 6), - count._super), - 0) * - x1700); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1704 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 8), - addr._super), - 0)); - ExtVal x1705 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 8), - cycle._super), - 0)); - ExtVal x1706 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 8), - dataLow._super), - 0)); - ExtVal x1707 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 8), - dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1708 = (((x1704 + x1705) + x1706) + x1707); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1709 = (x1708 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1710 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 8), - count._super), - 0) * - inv_0(x1709)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1711 = (((x1685 + x1694) + x1701) + x1710); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 2), x1711); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1712 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 2), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 1), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1713 = - (((x1712 * (x1702 * x1709)) - (x1703 * x1709)) - - ((x1693 * - LOAD( - LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 7), - count._super), - 0)) * - x1709)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1713 - - (x1702 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 8), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1714 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 9), - addr._super), - 0)); - ExtVal x1715 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 9), - cycle._super), - 0)); - ExtVal x1716 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 9), - dataLow._super), - 0)); - ExtVal x1717 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 9), - dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1718 = (((x1714 + x1715) + x1716) + x1717); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1719 = (x1718 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1720 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 9), - count._super), - 0) * - inv_0(x1719)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1721 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 10), - addr._super), - 0)); - ExtVal x1722 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 10), - cycle._super), - 0)); - ExtVal x1723 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 10), - dataLow._super), - 0)); - ExtVal x1724 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 10), - dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1725 = (((x1721 + x1722) + x1723) + x1724); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1726 = (x1725 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1727 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 10), - count._super), - 0) * - inv_0(x1726)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1728 = (x1719 * x1726); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1729 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 9), - count._super), - 0) * - x1726); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1730 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 11), - addr._super), - 0)); - ExtVal x1731 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 11), - cycle._super), - 0)); - ExtVal x1732 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 11), - dataLow._super), - 0)); - ExtVal x1733 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 11), - dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1734 = (((x1730 + x1731) + x1732) + x1733); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1735 = (x1734 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1736 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 11), - count._super), - 0) * - inv_0(x1735)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1737 = (((x1711 + x1720) + x1727) + x1736); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 3), x1737); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1738 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 3), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 2), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1739 = - (((x1738 * (x1728 * x1735)) - (x1729 * x1735)) - - ((x1719 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), - 10), - count._super), - 0)) * - x1735)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1739 - - (x1728 * - LOAD( - LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 11), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1740 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 12), - addr._super), - 0)); - ExtVal x1741 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 12), - cycle._super), - 0)); - ExtVal x1742 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 12), - dataLow._super), - 0)); - ExtVal x1743 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 12), - dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1744 = (((x1740 + x1741) + x1742) + x1743); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1745 = (x1744 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1746 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 12), - count._super), - 0) * - inv_0(x1745)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1747 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 13), - addr._super), - 0)); - ExtVal x1748 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 13), - cycle._super), - 0)); - ExtVal x1749 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 13), - dataLow._super), - 0)); - ExtVal x1750 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 13), - dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1751 = (((x1747 + x1748) + x1749) + x1750); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1752 = (x1751 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1753 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 13), - count._super), - 0) * - inv_0(x1752)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1754 = (x1745 * x1752); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1755 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 12), - count._super), - 0) * - x1752); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1756 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 14), - addr._super), - 0)); - ExtVal x1757 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 14), - cycle._super), - 0)); - ExtVal x1758 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 14), - dataLow._super), - 0)); - ExtVal x1759 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 14), - dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1760 = (((x1756 + x1757) + x1758) + x1759); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1761 = (x1760 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1762 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 14), - count._super), - 0) * - inv_0(x1761)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1763 = (((x1737 + x1746) + x1753) + x1762); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 4), x1763); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1764 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 4), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 3), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1765 = - (((x1764 * (x1754 * x1761)) - (x1755 * x1761)) - - ((x1745 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), - 13), - count._super), - 0)) * - x1761)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1765 - - (x1754 * - LOAD( - LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 14), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1766 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.addr), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 15), - addr._super), - 0)); - ExtVal x1767 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 15), - cycle._super), - 0)); - ExtVal x1768 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataLow), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 15), - dataLow._super), - 0)); - ExtVal x1769 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.memoryArg.dataHigh), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 15), - dataHigh._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - ExtVal x1770 = (((x1766 + x1767) + x1768) + x1769); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1771 = (x1770 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1772 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 15), - count._super), - 0) * - inv_0(x1771)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1773 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.cycleArg), 0), - cycle._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1774 = (x1773 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1775 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.cycleArg), 0), - count._super), - 0) * - inv_0(x1774)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1776 = (x1771 * x1774); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1777 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.memoryArg), 15), - count._super), - 0) * - x1774); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1778 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.cycleArg), 1), - cycle._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1779 = (x1778 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1780 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.cycleArg), 1), - count._super), - 0) * - inv_0(x1779)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1781 = (((x1763 + x1772) + x1775) + x1780); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 5), x1781); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1782 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 5), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 4), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1783 = - (((x1782 * (x1776 * x1779)) - (x1777 * x1779)) - - ((x1771 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.cycleArg), 0), - count._super), - 0)) * - x1779)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1783 - - (x1776 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.cycleArg), 1), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1784 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.cycleArg), 2), - cycle._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1785 = (x1784 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1786 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.cycleArg), 2), - count._super), - 0) * - inv_0(x1785)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1787 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.cycleArg), 3), - cycle._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1788 = (x1787 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1789 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.cycleArg), 3), - count._super), - 0) * - inv_0(x1788)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1790 = (x1785 * x1788); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1791 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.cycleArg), 2), - count._super), - 0) * - x1788); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1792 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.cycleArg), 4), - cycle._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1793 = (x1792 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1794 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.cycleArg), 4), - count._super), - 0) * - inv_0(x1793)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1795 = (((x1781 + x1786) + x1789) + x1794); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 6), x1795); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1796 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 6), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 5), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1797 = - (((x1796 * (x1790 * x1793)) - (x1791 * x1793)) - - ((x1785 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.cycleArg), 3), - count._super), - 0)) * - x1793)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1797 - - (x1790 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.cycleArg), 4), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1798 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.cycleArg), 5), - cycle._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1799 = (x1798 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1800 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.cycleArg), 5), - count._super), - 0) * - inv_0(x1799)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1801 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.cycleArg), 6), - cycle._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1802 = (x1801 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1803 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.cycleArg), 6), - count._super), - 0) * - inv_0(x1802)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1804 = (x1799 * x1802); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1805 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.cycleArg), 5), - count._super), - 0) * - x1802); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1806 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.cycleArg), 7), - cycle._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1807 = (x1806 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1808 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.cycleArg), 7), - count._super), - 0) * - inv_0(x1807)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1809 = (((x1795 + x1800) + x1803) + x1808); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 7), x1809); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1810 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 7), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 6), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1811 = - (((x1810 * (x1804 * x1807)) - (x1805 * x1807)) - - ((x1799 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.cycleArg), 6), - count._super), - 0)) * - x1807)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1811 - - (x1804 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.cycleArg), 7), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1812 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 0), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1813 = (x1812 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1814 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 0), - count._super), - 0) * - inv_0(x1813)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1815 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 1), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1816 = (x1815 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1817 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 1), - count._super), - 0) * - inv_0(x1816)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1818 = (x1813 * x1816); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1819 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 0), - count._super), - 0) * - x1816); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1820 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 2), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1821 = (x1820 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1822 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 2), - count._super), - 0) * - inv_0(x1821)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1823 = (((x1809 + x1814) + x1817) + x1822); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 8), x1823); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1824 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 8), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 7), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1825 = - (((x1824 * (x1818 * x1821)) - (x1819 * x1821)) - - ((x1813 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 1), - count._super), - 0)) * - x1821)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1825 - - (x1818 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 2), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1826 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 3), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1827 = (x1826 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1828 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 3), - count._super), - 0) * - inv_0(x1827)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1829 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 4), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1830 = (x1829 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1831 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 4), - count._super), - 0) * - inv_0(x1830)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1832 = (x1827 * x1830); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1833 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 3), - count._super), - 0) * - x1830); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1834 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 5), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1835 = (x1834 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1836 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 5), - count._super), - 0) * - inv_0(x1835)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1837 = (((x1823 + x1828) + x1831) + x1836); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 9), x1837); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1838 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 9), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 8), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1839 = - (((x1838 * (x1832 * x1835)) - (x1833 * x1835)) - - ((x1827 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 4), - count._super), - 0)) * - x1835)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1839 - - (x1832 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 5), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1840 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 6), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1841 = (x1840 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1842 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 6), - count._super), - 0) * - inv_0(x1841)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1843 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 7), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1844 = (x1843 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1845 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 7), - count._super), - 0) * - inv_0(x1844)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1846 = (x1841 * x1844); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1847 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 6), - count._super), - 0) * - x1844); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1848 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 8), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1849 = (x1848 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1850 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 8), - count._super), - 0) * - inv_0(x1849)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1851 = (((x1837 + x1842) + x1845) + x1850); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 10), x1851); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1852 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 10), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 9), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1853 = - (((x1852 * (x1846 * x1849)) - (x1847 * x1849)) - - ((x1841 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 7), - count._super), - 0)) * - x1849)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1853 - - (x1846 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 8), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1854 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 9), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1855 = (x1854 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1856 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 9), - count._super), - 0) * - inv_0(x1855)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1857 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 10), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1858 = (x1857 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1859 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 10), - count._super), - 0) * - inv_0(x1858)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1860 = (x1855 * x1858); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1861 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 9), - count._super), - 0) * - x1858); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1862 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 11), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1863 = (x1862 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1864 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 11), - count._super), - 0) * - inv_0(x1863)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1865 = (((x1851 + x1856) + x1859) + x1864); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 11), x1865); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1866 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 11), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 10), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1867 = - (((x1866 * (x1860 * x1863)) - (x1861 * x1863)) - - ((x1855 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 10), - count._super), - 0)) * - x1863)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1867 - - (x1860 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 11), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1868 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 12), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1869 = (x1868 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1870 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 12), - count._super), - 0) * - inv_0(x1869)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1871 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 13), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1872 = (x1871 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1873 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 13), - count._super), - 0) * - inv_0(x1872)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1874 = (x1869 * x1872); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1875 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 12), - count._super), - 0) * - x1872); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1876 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 14), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1877 = (x1876 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1878 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 14), - count._super), - 0) * - inv_0(x1877)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1879 = (((x1865 + x1870) + x1873) + x1878); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 12), x1879); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1880 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 12), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 11), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1881 = - (((x1880 * (x1874 * x1877)) - (x1875 * x1877)) - - ((x1869 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 13), - count._super), - 0)) * - x1877)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1881 - - (x1874 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 14), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1882 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU16.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 15), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1883 = (x1882 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1884 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 15), - count._super), - 0) * - inv_0(x1883)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1885 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU8), 0), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1886 = (x1885 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1887 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU8), 0), - count._super), - 0) * - inv_0(x1886)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - ExtVal x1888 = (x1883 * x1886); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - ExtVal x1889 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU16), 15), - count._super), - 0) * - x1886); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1890 = - (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.argU8.val), 0) * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU8), 1), - val._super), - 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1891 = (x1890 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1892 = - (LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU8), 1), - count._super), - 0) * - inv_0(x1891)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1893 = (((x1879 + x1884) + x1887) + x1892); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 13), x1893); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1894 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 13), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 12), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1895 = - (((x1894 * (x1888 * x1891)) - (x1889 * x1891)) - - ((x1883 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU8), 0), - count._super), - 0)) * - x1891)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ((x1895 - - (x1888 * - LOAD(LAYOUT_LOOKUP( - LAYOUT_SUBSCRIPT( - LAYOUT_LOOKUP(arg0, instResult.arm9._arguments_Poseidon0State.argU8), 1), - count._super), - 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1896 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm9.arg.cycle._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1897 = (x1896 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1898 = (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm9.arg.count._super), 0) * inv_0(x1897)); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 14), (x1893 + x1898)); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1899 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 14), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 13), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1900 = - ((x1899 * x1897) - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm9.arg.count._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ(x1900, "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:122 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 18), - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 14), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:124 - ExtVal x1901 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 18), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 14), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:125 - EQZ(x1901, "zirgen/dsl/passes/GenerateAccum.cpp:125"); - x5 = x4; - } else if (to_size_t( - LOAD(LAYOUT_LOOKUP(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(arg0, instResult._selector), 10), - _super), - 0))) { - // zirgen/dsl/passes/GenerateAccum.cpp:146 - ExtVal x1902 = (LOAD_EXT(LAYOUT_LOOKUP(x3, randomness.cycleArg.cycle), 0) * - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm10.arg.cycle._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - ExtVal x1903 = (x1902 + LOAD_EXT(LAYOUT_LOOKUP(x3, randomness._offset), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - ExtVal x1904 = (LOAD(LAYOUT_LOOKUP(arg0, instResult.arm10.arg.count._super), 0) * inv_0(x1903)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - ExtVal x1905 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 18), 1) + x1904); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 0), x1905); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - ExtVal x1906 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 0), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 18), 1)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - ExtVal x1907 = - ((x1906 * x1903) - LOAD(LAYOUT_LOOKUP(arg0, instResult.arm10.arg.count._super), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - EQZ(x1907, "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:122 - STORE_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 18), - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 0), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:124 - ExtVal x1908 = (LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 18), 0) - - LOAD_EXT(LAYOUT_SUBSCRIPT(LAYOUT_LOOKUP(layout1, columns), 0), 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:125 - EQZ(x1908, "zirgen/dsl/passes/GenerateAccum.cpp:125"); - x5 = x4; - } else { - assert(0 && "Reached unreachable mux arm"); - } - return x4; -} -void step_TopAccum(ExecContext& ctx, MutableBuf accum0, MutableBuf data1, GlobalBuf mix2) { - // zirgen/dsl/passes/GenerateAccum.cpp:526 - BoundLayout x3 = BIND_LAYOUT(kLayout_Top, data1); - BoundLayout x4 = BIND_LAYOUT(kLayout_TopAccum, accum0); - ComponentStruct x5 = exec_TopAccum(ctx, x3, x4, mix2); - return; -} - -} // namespace risc0::circuit::rv32im_v2::cpu diff --git a/risc0/circuit/rv32im-v2-sys/kernels/cxx/steps.h b/risc0/circuit/rv32im-v2-sys/kernels/cxx/steps.h deleted file mode 100644 index a5f3aee6..00000000 --- a/risc0/circuit/rv32im-v2-sys/kernels/cxx/steps.h +++ /dev/null @@ -1,527 +0,0 @@ -// Copyright 2024 RISC Zero, Inc. -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include "buffers.h" -#include "fp.h" -#include "fpext.h" -#include "witgen.h" - -namespace risc0::circuit::rv32im_v2::cpu { - -extern NondetRegStruct -back_NondetReg(ExecContext& ctx, Index distance0, BoundLayout layout1); -extern NondetRegStruct -exec_NondetReg(ExecContext& ctx, Val arg0, BoundLayout layout1); -extern NondetExtRegStruct -back_NondetExtReg(ExecContext& ctx, Index distance0, BoundLayout layout1); -extern NondetExtRegStruct -exec_NondetExtReg(ExecContext& ctx, ExtVal arg0, BoundLayout layout1); -extern RegStruct back_Reg(ExecContext& ctx, Index distance0, BoundLayout layout1); -extern RegStruct exec_Reg(ExecContext& ctx, Val arg0, BoundLayout layout1); -extern NondetExtRegStruct -back_ExtReg(ExecContext& ctx, Index distance0, BoundLayout layout1); -extern NondetExtRegStruct -exec_ExtReg(ExecContext& ctx, ExtVal arg0, BoundLayout layout1); -extern NondetRegStruct -exec_NondetBitReg(ExecContext& ctx, Val arg0, BoundLayout layout1); -extern BitRegStruct exec_BitReg(ExecContext& ctx, Val arg0, BoundLayout layout1); -extern NondetRegStruct -exec_NondetTwitReg(ExecContext& ctx, Val arg0, BoundLayout layout1); -extern NondetFakeTwitRegStruct -exec_NondetFakeTwitReg(ExecContext& ctx, Val arg0, BoundLayout layout1); -extern FakeTwitRegStruct -exec_FakeTwitReg(ExecContext& ctx, Val arg0, BoundLayout layout1); -extern NondetRegStruct exec_IsZero(ExecContext& ctx, Val arg0, BoundLayout layout1); -extern ArgU8Struct -exec_ArgU8(ExecContext& ctx, Val arg0, Val arg1, BoundLayout layout2); -extern NondetRegStruct -exec_NondetU8Reg(ExecContext& ctx, Val arg0, BoundLayout layout1); -extern U8RegStruct exec_U8Reg(ExecContext& ctx, Val arg0, BoundLayout layout1); -extern ArgU16Struct -exec_ArgU16(ExecContext& ctx, Val arg0, Val arg1, BoundLayout layout2); -extern NondetRegStruct -exec_NondetU16Reg(ExecContext& ctx, Val arg0, BoundLayout layout1); -extern U16RegStruct exec_U16Reg(ExecContext& ctx, Val arg0, BoundLayout layout1); -extern ToBits_5_Struct -exec_ToBits_5_(ExecContext& ctx, Val arg0, BoundLayout layout1); -extern ValU32Struct exec_DynPo2(ExecContext& ctx, Val arg0, BoundLayout layout1); -extern NormalizeU32Struct exec_NormalizeU32(ExecContext& ctx, - DenormedValU32Struct arg0, - BoundLayout layout1); -extern AddrDecomposeStruct exec_AddrDecompose(ExecContext& ctx, - ValU32Struct arg0, - Val arg1, - BoundLayout layout2); -extern AddrDecomposeBitsStruct exec_AddrDecomposeBits(ExecContext& ctx, - ValU32Struct arg0, - Val arg1, - BoundLayout layout2); -extern CmpEqualStruct exec_CmpEqual(ExecContext& ctx, - ValU32Struct arg0, - ValU32Struct arg1, - BoundLayout layout2); -extern CmpLessThanUnsignedStruct -exec_CmpLessThanUnsigned(ExecContext& ctx, - ValU32Struct arg0, - ValU32Struct arg1, - BoundLayout layout2); -extern NondetRegStruct -exec_GetSignU32(ExecContext& ctx, ValU32Struct arg0, BoundLayout layout1); -extern CmpLessThanStruct exec_CmpLessThan(ExecContext& ctx, - ValU32Struct arg0, - ValU32Struct arg1, - BoundLayout layout2); -extern ToBits_16_Struct -exec_ToBits_16_(ExecContext& ctx, Val arg0, BoundLayout layout1); -extern FromBits_16_Struct -exec_BitwiseAndU16(ExecContext& ctx, Val arg0, Val arg1, BoundLayout layout2); -extern ValU32Struct exec_BitwiseAnd(ExecContext& ctx, - ValU32Struct arg0, - ValU32Struct arg1, - BoundLayout layout2); -extern ValU32Struct exec_BitwiseOr(ExecContext& ctx, - ValU32Struct arg0, - ValU32Struct arg1, - BoundLayout layout2); -extern ValU32Struct exec_BitwiseXor(ExecContext& ctx, - ValU32Struct arg0, - ValU32Struct arg1, - BoundLayout layout2); -extern DecoderStruct -exec_Decoder(ExecContext& ctx, ValU32Struct arg0, BoundLayout layout1); -extern MemoryArgStruct exec_MemoryArg(ExecContext& ctx, - Val arg0, - Val arg1, - Val arg2, - ValU32Struct arg3, - BoundLayout layout4); -extern CycleArgStruct -exec_CycleArg(ExecContext& ctx, Val arg0, Val arg1, BoundLayout layout2); -extern IsCycleStruct exec_IsCycle(ExecContext& ctx, Val arg0, BoundLayout layout1); -extern MemoryIOStruct -exec_MemoryIO(ExecContext& ctx, RegStruct arg0, Val arg1, BoundLayout layout2); -extern IsForwardStruct -exec_IsForward(ExecContext& ctx, MemoryIOStruct arg0, BoundLayout layout1); -extern GetDataStruct -exec_MemoryRead(ExecContext& ctx, RegStruct arg0, Val arg1, BoundLayout layout2); -extern MemoryWriteStruct exec_MemoryWrite(ExecContext& ctx, - RegStruct arg0, - Val arg1, - ValU32Struct arg2, - BoundLayout layout3); -extern MemoryWriteUnconstrainedStruct -exec_MemoryWriteUnconstrained(ExecContext& ctx, - RegStruct arg0, - Val arg1, - BoundLayout layout2); -extern GetDataStruct exec_MemoryPageIn(ExecContext& ctx, - RegStruct arg0, - Val arg1, - BoundLayout layout2); -extern GetDataStruct exec_MemoryPageOut(ExecContext& ctx, - RegStruct arg0, - Val arg1, - BoundLayout layout2); -extern OneHot_3_Struct -exec_OneHot_3_(ExecContext& ctx, Val arg0, BoundLayout layout1); -extern GetDataStruct exec_MemoryGet(ExecContext& ctx, - RegStruct arg0, - Val arg1, - OneHot_3_Struct arg2, - BoundLayout layout3); -extern OneHot_8_Struct -exec_OneHot_8_(ExecContext& ctx, Val arg0, BoundLayout layout1); -extern InstInputStruct exec_InstInput(ExecContext& ctx, - Val arg0, - Val arg1, - Val arg2, - ValU32Struct arg3, - Val arg4, - Val arg5, - BoundLayout layout6); -extern DecoderStruct exec_DecodeInst(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2); -extern GetDataStruct exec_ReadReg(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - Val arg2, - BoundLayout layout3); -extern WriteRdStruct exec_WriteRd(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - DecoderStruct arg2, - Val arg3, - ValU32Struct arg4, - BoundLayout layout5); -extern ExpandU32Struct -exec_ExpandU32(ExecContext& ctx, ValU32Struct arg0, Val arg1, BoundLayout layout2); -extern SplitTotalStruct -exec_SplitTotal(ExecContext& ctx, Val arg0, BoundLayout layout1); -extern MultiplyAccumulateStruct -exec_MultiplyAccumulate(ExecContext& ctx, - ValU32Struct arg0, - ValU32Struct arg1, - ValU32Struct arg2, - MultiplySettingsStruct arg3, - BoundLayout layout4); -extern DivInputStruct exec_DivInput(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2); -extern DivideReturnStruct exec_DoDiv(ExecContext& ctx, - ValU32Struct arg0, - ValU32Struct arg1, - Val arg2, - Val arg3, - BoundLayout layout4); -extern ValU32Struct -exec_OpSRL(ExecContext& ctx, DivInputStruct arg0, BoundLayout layout1); -extern NondetRegStruct -exec_TopBit(ExecContext& ctx, ValU32Struct arg0, BoundLayout layout1); -extern ValU32Struct -exec_OpSRA(ExecContext& ctx, DivInputStruct arg0, BoundLayout layout1); -extern ValU32Struct -exec_OpSRLI(ExecContext& ctx, DivInputStruct arg0, BoundLayout layout1); -extern ValU32Struct -exec_OpSRAI(ExecContext& ctx, DivInputStruct arg0, BoundLayout layout1); -extern ValU32Struct -exec_OpDIV(ExecContext& ctx, DivInputStruct arg0, BoundLayout layout1); -extern ValU32Struct -exec_OpDIVU(ExecContext& ctx, DivInputStruct arg0, BoundLayout layout1); -extern ValU32Struct -exec_OpREM(ExecContext& ctx, DivInputStruct arg0, BoundLayout layout1); -extern ValU32Struct -exec_OpREMU(ExecContext& ctx, DivInputStruct arg0, BoundLayout layout1); -extern InstOutputStruct -exec_Div0(ExecContext& ctx, RegStruct arg0, InstInputStruct arg1, BoundLayout layout2); -extern MiscInputStruct exec_MiscInput(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2); -extern InstOutputStruct exec_FinalizeMisc(ExecContext& ctx, - RegStruct arg0, - MiscInputStruct arg1, - MiscOutputStruct arg2, - BoundLayout layout3); -extern MiscOutputStruct -exec_OpXOR(ExecContext& ctx, MiscInputStruct arg0, BoundLayout layout1); -extern MiscOutputStruct -exec_OpOR(ExecContext& ctx, MiscInputStruct arg0, BoundLayout layout1); -extern MiscOutputStruct -exec_OpAND(ExecContext& ctx, MiscInputStruct arg0, BoundLayout layout1); -extern MiscOutputStruct -exec_OpSLT(ExecContext& ctx, MiscInputStruct arg0, BoundLayout layout1); -extern MiscOutputStruct -exec_OpSLTU(ExecContext& ctx, MiscInputStruct arg0, BoundLayout layout1); -extern InstOutputStruct exec_Misc0(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2); -extern MiscOutputStruct -exec_OpXORI(ExecContext& ctx, MiscInputStruct arg0, BoundLayout layout1); -extern MiscOutputStruct -exec_OpORI(ExecContext& ctx, MiscInputStruct arg0, BoundLayout layout1); -extern MiscOutputStruct -exec_OpANDI(ExecContext& ctx, MiscInputStruct arg0, BoundLayout layout1); -extern MiscOutputStruct -exec_OpSLTI(ExecContext& ctx, MiscInputStruct arg0, BoundLayout layout1); -extern MiscOutputStruct -exec_OpSLTIU(ExecContext& ctx, MiscInputStruct arg0, BoundLayout layout1); -extern MiscOutputStruct -exec_OpBEQ(ExecContext& ctx, MiscInputStruct arg0, BoundLayout layout1); -extern MiscOutputStruct -exec_OpBNE(ExecContext& ctx, MiscInputStruct arg0, BoundLayout layout1); -extern MiscOutputStruct -exec_OpBLT(ExecContext& ctx, MiscInputStruct arg0, BoundLayout layout1); -extern InstOutputStruct exec_Misc1(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2); -extern MiscOutputStruct -exec_OpBGE(ExecContext& ctx, MiscInputStruct arg0, BoundLayout layout1); -extern MiscOutputStruct -exec_OpBLTU(ExecContext& ctx, MiscInputStruct arg0, BoundLayout layout1); -extern MiscOutputStruct -exec_OpBGEU(ExecContext& ctx, MiscInputStruct arg0, BoundLayout layout1); -extern InstOutputStruct exec_Misc2(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2); -extern MulInputStruct exec_MulInput(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2); -extern DoMulStruct exec_DoMul(ExecContext& ctx, - ValU32Struct arg0, - ValU32Struct arg1, - Val arg2, - Val arg3, - BoundLayout layout4); -extern ValU32Struct -exec_OpSLL(ExecContext& ctx, MulInputStruct arg0, BoundLayout layout1); -extern ValU32Struct -exec_OpSLLI(ExecContext& ctx, MulInputStruct arg0, BoundLayout layout1); -extern ValU32Struct -exec_OpMUL(ExecContext& ctx, MulInputStruct arg0, BoundLayout layout1); -extern ValU32Struct -exec_OpMULH(ExecContext& ctx, MulInputStruct arg0, BoundLayout layout1); -extern ValU32Struct -exec_OpMULHSU(ExecContext& ctx, MulInputStruct arg0, BoundLayout layout1); -extern ValU32Struct -exec_OpMULHU(ExecContext& ctx, MulInputStruct arg0, BoundLayout layout1); -extern InstOutputStruct -exec_Mul0(ExecContext& ctx, RegStruct arg0, InstInputStruct arg1, BoundLayout layout2); -extern MemLoadInputStruct exec_MemLoadInput(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2); -extern MemStoreInputStruct exec_MemStoreInput(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2); -extern MemStoreFinalizeStruct exec_MemStoreFinalize(ExecContext& ctx, - RegStruct arg0, - MemStoreInputStruct arg1, - ValU32Struct arg2, - BoundLayout layout3); -extern SplitWordStruct -exec_SplitWord(ExecContext& ctx, Val arg0, BoundLayout layout1); -extern ValU32Struct -exec_OpLB(ExecContext& ctx, MemLoadInputStruct arg0, BoundLayout layout1); -extern ValU32Struct -exec_OpLH(ExecContext& ctx, MemLoadInputStruct arg0, BoundLayout layout1); -extern ValU32Struct -exec_OpLBU(ExecContext& ctx, MemLoadInputStruct arg0, BoundLayout layout1); -extern InstOutputStruct -exec_Mem0(ExecContext& ctx, RegStruct arg0, InstInputStruct arg1, BoundLayout layout2); -extern ValU32Struct -exec_OpSB(ExecContext& ctx, MemStoreInputStruct arg0, BoundLayout layout1); -extern InstOutputStruct -exec_Mem1(ExecContext& ctx, RegStruct arg0, InstInputStruct arg1, BoundLayout layout2); -extern DigestRegStruct -back_DigestReg(ExecContext& ctx, Index distance0, BoundLayout layout1); -extern DigestRegStruct -exec_DigestReg(ExecContext& ctx, ValU32Struct8Array arg0, BoundLayout layout1); -extern InstOutputStruct exec_ControlLoadRoot(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2, - GlobalBuf global3); -extern InstOutputStruct exec_ControlResume(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2, - GlobalBuf global3); -extern InstOutputStruct exec_ControlUserECALL(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2); -extern InstOutputStruct exec_ControlMRET(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2); -extern InstOutputStruct exec_ControlSuspend(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2, - GlobalBuf global3); -extern InstOutputStruct exec_ControlStoreRoot(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2, - GlobalBuf global3); -extern InstOutputStruct exec_ControlTable(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2); -extern InstOutputStruct exec_Control0(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2, - GlobalBuf global3); -extern OneHot_4_Struct -exec_OneHot_4_(ExecContext& ctx, Val arg0, BoundLayout layout1); -extern ECallOutputStruct exec_MachineECall(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - Val arg2, - BoundLayout layout3); -extern ECallOutputStruct exec_ECallTerminate(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2, - GlobalBuf global3); -extern DecomposeLow2Struct -exec_DecomposeLow2(ExecContext& ctx, Val arg0, BoundLayout layout1); -extern ECallOutputStruct exec_ECallHostReadSetup(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2); -extern ECallOutputStruct exec_ECallHostWrite(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2); -extern ECallOutputStruct exec_ECallHostReadWords(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - Val arg2, - Val arg3, - BoundLayout layout4); -extern InstOutputStruct exec_ECall0(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2, - GlobalBuf global3); -extern RegStruct exec_SBox(ExecContext& ctx, Val arg0, BoundLayout layout1); -extern MultiplyByMIntStruct -exec_DoIntRound(ExecContext& ctx, Val24Array arg0, Val arg1, BoundLayout layout2); -extern DoIntRoundsStruct -exec_DoIntRounds(ExecContext& ctx, Val24Array arg0, BoundLayout layout1); -extern MultiplyByMExtStruct exec_DoExtRound(ExecContext& ctx, - Val24Array arg0, - Val24Array arg1, - BoundLayout layout2); -extern MultiplyByMExtStruct exec_DoExtRoundByIdx(ExecContext& ctx, - Val24Array arg0, - Val arg1, - BoundLayout layout2); -extern PoseidonStateStruct -back_PoseidonState(ExecContext& ctx, Index distance0, BoundLayout layout1); -extern PoseidonStateStruct exec_PoseidonState(ExecContext& ctx, - PoseidonOpDefStruct arg0, - Val arg1, - Val arg2, - Val arg3, - Val arg4, - Val arg5, - Val24Array arg6, - ExtVal arg7, - BoundLayout layout8); -extern PoseidonStateStruct exec_PoseidonInvalid(ExecContext& ctx, - BoundLayout layout0); -extern ReadAddrStruct -exec_ReadAddr(ExecContext& ctx, RegStruct arg0, Val arg1, BoundLayout layout2); -extern PoseidonStateStruct exec_PoseidonEcall(ExecContext& ctx, - RegStruct arg0, - Val arg1, - BoundLayout layout2); -extern PoseidonStateStruct exec_PoseidonPagingEntry(ExecContext& ctx, - RegStruct arg0, - Val arg1, - BoundLayout layout2); -extern PoseidonStateStruct exec_PoseidonEntry(ExecContext& ctx, - RegStruct arg0, - ValU32Struct arg1, - Val arg2, - BoundLayout layout3); -extern ReadElemStruct -exec_ReadElem(ExecContext& ctx, RegStruct arg0, Val arg1, BoundLayout layout2); -extern PoseidonStateStruct exec_PoseidonLoadState(ExecContext& ctx, - RegStruct arg0, - PoseidonStateStruct arg1, - BoundLayout layout2); -extern PoseidonStateStruct exec_PoseidonLoadInShort(ExecContext& ctx, - RegStruct arg0, - PoseidonStateStruct arg1, - BoundLayout layout2, - GlobalBuf global3); -extern PoseidonStateStruct exec_PoseidonLoadInLow(ExecContext& ctx, - RegStruct arg0, - PoseidonStateStruct arg1, - BoundLayout layout2, - GlobalBuf global3); -extern PoseidonStateStruct exec_PoseidonLoadInHigh(ExecContext& ctx, - RegStruct arg0, - PoseidonStateStruct arg1, - BoundLayout layout2, - GlobalBuf global3); -extern PoseidonStateStruct exec_PoseidonLoadIn(ExecContext& ctx, - RegStruct arg0, - PoseidonStateStruct arg1, - BoundLayout layout2, - GlobalBuf global3); -extern PoseidonStateStruct exec_PoseidonExtRound(ExecContext& ctx, - PoseidonStateStruct arg0, - BoundLayout layout1); -extern PoseidonStateStruct exec_PoseidonIntRounds(ExecContext& ctx, - PoseidonStateStruct arg0, - BoundLayout layout1); -extern PoseidonStateStruct exec_PoseidonCheckOut(ExecContext& ctx, - RegStruct arg0, - PoseidonStateStruct arg1, - BoundLayout layout2); -extern PoseidonStateStruct exec_PoseidonStoreOut(ExecContext& ctx, - RegStruct arg0, - PoseidonStateStruct arg1, - BoundLayout layout2); -extern PoseidonStateStruct exec_PoseidonDoOut(ExecContext& ctx, - RegStruct arg0, - PoseidonStateStruct arg1, - BoundLayout layout2); -extern PoseidonStateStruct exec_PoseidonStoreState(ExecContext& ctx, - RegStruct arg0, - PoseidonStateStruct arg1, - BoundLayout layout2); -extern IsU24Struct exec_IsU24(ExecContext& ctx, Val arg0, BoundLayout layout1); -extern PoseidonStateStruct exec_PoseidonPagingLoadNode(ExecContext& ctx, - RegStruct arg0, - Val arg1, - BoundLayout layout2); -extern PoseidonStateStruct exec_PoseidonPagingLoadPage(ExecContext& ctx, - RegStruct arg0, - Val arg1, - BoundLayout layout2); -extern PoseidonStateStruct exec_PoseidonPagingLoadDone(ExecContext& ctx, - BoundLayout layout0); -extern PoseidonStateStruct exec_PoseidonPagingStoreNode(ExecContext& ctx, - RegStruct arg0, - Val arg1, - BoundLayout layout2); -extern PoseidonStateStruct exec_PoseidonPagingStorePage(ExecContext& ctx, - RegStruct arg0, - Val arg1, - BoundLayout layout2); -extern PoseidonStateStruct exec_PoseidonPagingStoreDone(ExecContext& ctx, - BoundLayout layout0); -extern OneHot_6_Struct -exec_OneHot_6_(ExecContext& ctx, Val arg0, BoundLayout layout1); -extern PoseidonStateStruct exec_PoseidonPaging(ExecContext& ctx, - RegStruct arg0, - Val arg1, - PoseidonStateStruct arg2, - BoundLayout layout3); -extern InstOutputStruct exec_Poseidon0(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2, - GlobalBuf global3); -extern InstOutputStruct exec_Poseidon1(ExecContext& ctx, - RegStruct arg0, - InstInputStruct arg1, - BoundLayout layout2); -extern OneHot_11_Struct -exec_OneHot_11_(ExecContext& ctx, Val arg0, BoundLayout layout1); -extern TopStruct exec_Top(ExecContext& ctx, BoundLayout layout0, GlobalBuf global1); -extern void step_Top(ExecContext& ctx, MutableBuf data0, GlobalBuf global1); -extern ComponentStruct exec_TopAccum(ExecContext& ctx, - BoundLayout arg0, - BoundLayout layout1, - GlobalBuf mix2); -extern void step_TopAccum(ExecContext& ctx, MutableBuf accum0, MutableBuf data1, GlobalBuf mix2); - -} // namespace risc0::circuit::rv32im_v2::cpu diff --git a/risc0/circuit/rv32im-v2-sys/kernels/cxx/tables.h b/risc0/circuit/rv32im-v2-sys/kernels/cxx/tables.h deleted file mode 100644 index e9e091c1..00000000 --- a/risc0/circuit/rv32im-v2-sys/kernels/cxx/tables.h +++ /dev/null @@ -1,74 +0,0 @@ -// Copyright 2024 RISC Zero, Inc. -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include "fp.h" - -#include -#include -#include -#include -#include - -namespace risc0::circuit::rv32im_v2::cpu { - -struct LookupTables { - std::vector> tableU8{1 << 8}; - std::vector> tableU16{1 << 16}; - - void atomic_rmw(std::atomic& atom, Fp count) { - Fp old = atom.load(), next; - do { - next = old + count; - } while (!atom.compare_exchange_weak(old, next)); - } - - void lookupDelta(Fp table, Fp index, Fp count) { - uint32_t tableU32 = table.asUInt32(); - uint32_t indexU32 = index.asUInt32(); - if (tableU32 == 0) { - // tableCycle[index] += count; - return; - } - if (tableU32 != 8 && tableU32 != 16) { - throw std::runtime_error("Invalid lookup table"); - } - if (indexU32 >= (1u << tableU32)) { - printf("LOOKUP ERROR: table = %u, index = %u\n", tableU32, indexU32); - throw std::runtime_error("u8/16 table error"); - } - // printf("table = %u, index = %u\n", tableU32, indexU32); - if (tableU32 == 8) { - atomic_rmw(tableU8[indexU32], count); - } else { - atomic_rmw(tableU16[indexU32], count); - } - } - - Fp lookupCurrent(Fp table, Fp index) { - uint32_t tableU32 = table.asUInt32(); - if (tableU32 != 8 && tableU32 != 16) { - throw std::runtime_error("Invalid lookup table"); - } - uint32_t indexU32 = index.asUInt32(); - if (tableU32 == 8) { - return tableU8[indexU32]; - } else { - return tableU16[indexU32]; - } - } -}; - -} // namespace risc0::circuit::rv32im_v2::cpu diff --git a/risc0/circuit/rv32im-v2-sys/kernels/cxx/types.h.inc b/risc0/circuit/rv32im-v2-sys/kernels/cxx/types.h.inc deleted file mode 100644 index 82ea14bc..00000000 --- a/risc0/circuit/rv32im-v2-sys/kernels/cxx/types.h.inc +++ /dev/null @@ -1,2451 +0,0 @@ -struct NondetRegLayout { - Reg _super; -}; -using NondetRegLayout8LayoutArray = std::array; -struct OneHot_8_Layout { - NondetRegLayout8LayoutArray _super; -}; -struct InstInputLayout { - OneHot_8_Layout minorOnehot; -}; -using NondetRegLayout11LayoutArray = std::array; -struct OneHot_11_Layout { - NondetRegLayout11LayoutArray _super; -}; -struct ArgU16Layout { - NondetRegLayout count; - NondetRegLayout val; -}; -struct NondetU16RegLayout { - ArgU16Layout arg; -}; -struct NormalizeU32Layout { - NondetU16RegLayout low16; - NondetRegLayout lowCarry; - NondetU16RegLayout high16; - NondetRegLayout highCarry; -}; -struct MemoryArgLayout { - NondetRegLayout count; - NondetRegLayout addr; - NondetRegLayout cycle; - NondetRegLayout dataLow; - NondetRegLayout dataHigh; -}; -struct MemoryIOLayout { - MemoryArgLayout oldTxn; - MemoryArgLayout newTxn; -}; -struct CycleArgLayout { - NondetRegLayout count; - NondetRegLayout cycle; -}; -struct IsCycleLayout { - CycleArgLayout arg; -}; -struct IsForwardLayout { - IsCycleLayout _0; -}; -struct MemoryWriteLayout { - MemoryIOLayout io; - IsForwardLayout _0; -}; -struct IsZeroLayout { - NondetRegLayout _super; - NondetRegLayout inv; -}; -struct WriteRdLayout { - IsZeroLayout isRd0; - NondetRegLayout writeAddr; - MemoryWriteLayout _0; -}; -struct FinalizeMiscLayout { - NormalizeU32Layout writeData; - NormalizeU32Layout pcNorm; - WriteRdLayout _0; -}; -struct DecoderLayout { - NondetRegLayout _f7_6; - NondetRegLayout _f7_45; - NondetRegLayout _f7_23; - NondetRegLayout _f7_01; - NondetRegLayout _rs2_34; - NondetRegLayout _rs2_12; - NondetRegLayout _rs2_0; - NondetRegLayout _rs1_34; - NondetRegLayout _rs1_12; - NondetRegLayout _rs1_0; - NondetRegLayout _f3_2; - NondetRegLayout _f3_01; - NondetRegLayout _rd_34; - NondetRegLayout _rd_12; - NondetRegLayout _rd_0; - NondetRegLayout opcode; -}; -struct U16RegLayout { - NondetU16RegLayout ret; -}; -struct AddrDecomposeLayout { - NondetRegLayout low2; - U16RegLayout upperDiff; - IsZeroLayout _0; - NondetU16RegLayout med14; -}; -struct MemoryReadLayout { - MemoryIOLayout io; - IsForwardLayout _0; -}; -struct DecodeInstLayout { - DecoderLayout _super; - CycleArgLayout arg; - AddrDecomposeLayout pcAddr; - MemoryReadLayout loadInst; -}; -struct ReadRegLayout { - MemoryReadLayout _super; - NondetRegLayout addr; -}; -struct MiscInputLayout { - DecodeInstLayout decoded; - ReadRegLayout rs1; - ReadRegLayout rs2; -}; -using ArgU16Layout5LayoutArray = std::array; -struct _Arguments_Misc0MiscOutputLayout { - ArgU16Layout5LayoutArray argU16; -}; -struct Misc0MiscOutputArm0Layout { - ArgU16Layout _extra0; - ArgU16Layout _extra1; - ArgU16Layout _extra2; - ArgU16Layout _extra3; - ArgU16Layout _extra4; -}; -struct Misc0MiscOutputArm1Layout { - ArgU16Layout _extra0; - ArgU16Layout _extra1; - ArgU16Layout _extra2; - ArgU16Layout _extra3; - ArgU16Layout _extra4; -}; -using NondetRegLayout16LayoutArray = std::array; -struct ToBits_16_Layout { - NondetRegLayout16LayoutArray _super; -}; -struct BitwiseAndU16Layout { - ToBits_16_Layout bitsX; - ToBits_16_Layout bitsY; -}; -struct BitwiseAndLayout { - BitwiseAndU16Layout _0; - BitwiseAndU16Layout _1; -}; -struct BitwiseXorLayout { - BitwiseAndLayout andXy; -}; -struct OpXORLayout { - BitwiseXorLayout _0; -}; -struct Misc0MiscOutputArm2Layout { - OpXORLayout _super; - ArgU16Layout _extra0; - ArgU16Layout _extra1; - ArgU16Layout _extra2; - ArgU16Layout _extra3; - ArgU16Layout _extra4; -}; -struct BitwiseOrLayout { - BitwiseAndLayout andXy; -}; -struct OpORLayout { - BitwiseOrLayout _0; -}; -struct Misc0MiscOutputArm3Layout { - OpORLayout _super; - ArgU16Layout _extra0; - ArgU16Layout _extra1; - ArgU16Layout _extra2; - ArgU16Layout _extra3; - ArgU16Layout _extra4; -}; -struct OpANDLayout { - BitwiseAndLayout _0; -}; -struct Misc0MiscOutputArm4Layout { - OpANDLayout _super; - ArgU16Layout _extra0; - ArgU16Layout _extra1; - ArgU16Layout _extra2; - ArgU16Layout _extra3; - ArgU16Layout _extra4; -}; -struct GetSignU32Layout { - NondetRegLayout _super; - NondetU16RegLayout restTimesTwo; -}; -struct CmpLessThanLayout { - NormalizeU32Layout diff; - GetSignU32Layout s1; - GetSignU32Layout s2; - GetSignU32Layout s3; - NondetRegLayout overflow; - NondetRegLayout isLessThan; -}; -struct OpSLTLayout { - CmpLessThanLayout cmp; -}; -struct CmpLessThanUnsignedLayout { - NormalizeU32Layout diff; -}; -struct OpSLTULayout { - CmpLessThanUnsignedLayout cmp; -}; -struct Misc0MiscOutputArm6Layout { - OpSLTULayout _super; - ArgU16Layout _extra0; - ArgU16Layout _extra1; - ArgU16Layout _extra2; -}; -struct Misc0MiscOutputArm7Layout { - ArgU16Layout _extra0; - ArgU16Layout _extra1; - ArgU16Layout _extra2; - ArgU16Layout _extra3; - ArgU16Layout _extra4; -}; -struct Misc0MiscOutputLayout { - Misc0MiscOutputArm0Layout arm0; - Misc0MiscOutputArm1Layout arm1; - Misc0MiscOutputArm2Layout arm2; - Misc0MiscOutputArm3Layout arm3; - Misc0MiscOutputArm4Layout arm4; - OpSLTLayout arm5; - Misc0MiscOutputArm6Layout arm6; - Misc0MiscOutputArm7Layout arm7; -}; -struct Misc0Layout { - FinalizeMiscLayout _super; - MiscInputLayout input; - _Arguments_Misc0MiscOutputLayout _arguments_Misc0MiscOutput; - Misc0MiscOutputLayout miscOutput; -}; -struct _Arguments_Misc1MiscOutputLayout { - ArgU16Layout5LayoutArray argU16; -}; -struct OpXORILayout { - BitwiseXorLayout _0; -}; -struct Misc1MiscOutputArm0Layout { - OpXORILayout _super; - ArgU16Layout _extra0; - ArgU16Layout _extra1; - ArgU16Layout _extra2; - ArgU16Layout _extra3; - ArgU16Layout _extra4; -}; -struct OpORILayout { - BitwiseOrLayout _0; -}; -struct Misc1MiscOutputArm1Layout { - OpORILayout _super; - ArgU16Layout _extra0; - ArgU16Layout _extra1; - ArgU16Layout _extra2; - ArgU16Layout _extra3; - ArgU16Layout _extra4; -}; -struct OpANDILayout { - BitwiseAndLayout _0; -}; -struct Misc1MiscOutputArm2Layout { - OpANDILayout _super; - ArgU16Layout _extra0; - ArgU16Layout _extra1; - ArgU16Layout _extra2; - ArgU16Layout _extra3; - ArgU16Layout _extra4; -}; -struct OpSLTILayout { - CmpLessThanLayout cmp; -}; -struct OpSLTIULayout { - CmpLessThanUnsignedLayout cmp; -}; -struct Misc1MiscOutputArm4Layout { - OpSLTIULayout _super; - ArgU16Layout _extra0; - ArgU16Layout _extra1; - ArgU16Layout _extra2; -}; -struct CmpEqualLayout { - IsZeroLayout lowSame; - IsZeroLayout highSame; - NondetRegLayout isEqual; -}; -struct OpBEQLayout { - CmpEqualLayout cmp; -}; -struct Misc1MiscOutputArm5Layout { - OpBEQLayout _super; - ArgU16Layout _extra0; - ArgU16Layout _extra1; - ArgU16Layout _extra2; - ArgU16Layout _extra3; - ArgU16Layout _extra4; -}; -struct OpBNELayout { - CmpEqualLayout cmp; -}; -struct Misc1MiscOutputArm6Layout { - OpBNELayout _super; - ArgU16Layout _extra0; - ArgU16Layout _extra1; - ArgU16Layout _extra2; - ArgU16Layout _extra3; - ArgU16Layout _extra4; -}; -struct OpBLTLayout { - CmpLessThanLayout cmp; -}; -struct Misc1MiscOutputLayout { - Misc1MiscOutputArm0Layout arm0; - Misc1MiscOutputArm1Layout arm1; - Misc1MiscOutputArm2Layout arm2; - OpSLTILayout arm3; - Misc1MiscOutputArm4Layout arm4; - Misc1MiscOutputArm5Layout arm5; - Misc1MiscOutputArm6Layout arm6; - OpBLTLayout arm7; -}; -struct Misc1Layout { - FinalizeMiscLayout _super; - MiscInputLayout input; - _Arguments_Misc1MiscOutputLayout _arguments_Misc1MiscOutput; - Misc1MiscOutputLayout miscOutput; -}; -struct _Arguments_Misc2MiscOutputLayout { - ArgU16Layout5LayoutArray argU16; -}; -struct OpBGELayout { - CmpLessThanLayout cmp; -}; -struct OpBLTULayout { - CmpLessThanUnsignedLayout cmp; -}; -struct Misc2MiscOutputArm1Layout { - OpBLTULayout _super; - ArgU16Layout _extra0; - ArgU16Layout _extra1; - ArgU16Layout _extra2; -}; -struct OpBGEULayout { - CmpLessThanUnsignedLayout cmp; -}; -struct Misc2MiscOutputArm2Layout { - OpBGEULayout _super; - ArgU16Layout _extra0; - ArgU16Layout _extra1; - ArgU16Layout _extra2; -}; -struct Misc2MiscOutputArm3Layout { - ArgU16Layout _extra0; - ArgU16Layout _extra1; - ArgU16Layout _extra2; - ArgU16Layout _extra3; - ArgU16Layout _extra4; -}; -struct Misc2MiscOutputArm4Layout { - ArgU16Layout _extra0; - ArgU16Layout _extra1; - ArgU16Layout _extra2; - ArgU16Layout _extra3; - ArgU16Layout _extra4; -}; -struct Misc2MiscOutputArm5Layout { - ArgU16Layout _extra0; - ArgU16Layout _extra1; - ArgU16Layout _extra2; - ArgU16Layout _extra3; - ArgU16Layout _extra4; -}; -struct Misc2MiscOutputArm6Layout { - ArgU16Layout _extra0; - ArgU16Layout _extra1; - ArgU16Layout _extra2; - ArgU16Layout _extra3; - ArgU16Layout _extra4; -}; -struct Misc2MiscOutputArm7Layout { - ArgU16Layout _extra0; - ArgU16Layout _extra1; - ArgU16Layout _extra2; - ArgU16Layout _extra3; - ArgU16Layout _extra4; -}; -struct Misc2MiscOutputLayout { - OpBGELayout arm0; - Misc2MiscOutputArm1Layout arm1; - Misc2MiscOutputArm2Layout arm2; - Misc2MiscOutputArm3Layout arm3; - Misc2MiscOutputArm4Layout arm4; - Misc2MiscOutputArm5Layout arm5; - Misc2MiscOutputArm6Layout arm6; - Misc2MiscOutputArm7Layout arm7; -}; -struct Misc2Layout { - FinalizeMiscLayout _super; - MiscInputLayout input; - _Arguments_Misc2MiscOutputLayout _arguments_Misc2MiscOutput; - Misc2MiscOutputLayout miscOutput; -}; -struct MulInputLayout { - DecodeInstLayout decoded; - ReadRegLayout rs1; - ReadRegLayout rs2; -}; -using ArgU16Layout6LayoutArray = std::array; -struct ArgU8Layout { - NondetRegLayout count; - NondetRegLayout val; -}; -using ArgU8Layout13LayoutArray = std::array; -struct _Arguments_Mul0MulOutputLayout { - ArgU16Layout6LayoutArray argU16; - ArgU8Layout13LayoutArray argU8; -}; -using NondetRegLayout5LayoutArray = std::array; -struct ToBits_5_Layout { - NondetRegLayout5LayoutArray _super; -}; -struct DynPo2Layout { - ToBits_5_Layout low5; - NondetU16RegLayout checkU16; - NondetRegLayout b3; - NondetRegLayout low; - NondetRegLayout high; -}; -struct NondetU8RegLayout { - ArgU8Layout arg; -}; -struct ExpandU32Layout { - NondetU8RegLayout b0; - NondetU8RegLayout b1; - NondetU8RegLayout b2; - NondetU8RegLayout b3; - NondetU8RegLayout b3Top7times2; - NondetRegLayout topBit; -}; -struct NondetFakeTwitRegLayout { - NondetRegLayout reg0; - NondetRegLayout reg1; -}; -struct SplitTotalLayout { - NondetU16RegLayout out; - NondetU8RegLayout carryByte; - NondetFakeTwitRegLayout carryExtra; -}; -struct MultiplyAccumulateLayout { - ExpandU32Layout ax; - ExpandU32Layout bx; - NondetRegLayout cSign; - NondetU16RegLayout cRestTimes2; - SplitTotalLayout s0; - SplitTotalLayout s1; - SplitTotalLayout s2; - NondetU16RegLayout s3Out; - NondetFakeTwitRegLayout s3Carry; -}; -struct DoMulLayout { - MultiplyAccumulateLayout mul; -}; -struct OpSLLLayout { - DynPo2Layout shiftMul; - DoMulLayout _0; -}; -struct OpSLLILayout { - DynPo2Layout shiftMul; - DoMulLayout _0; -}; -struct OpMULLayout { - DoMulLayout _0; -}; -struct Mul0MulOutputArm2Layout { - OpMULLayout _super; - ArgU16Layout _extra0; -}; -struct OpMULHLayout { - DoMulLayout _0; -}; -struct Mul0MulOutputArm3Layout { - OpMULHLayout _super; - ArgU16Layout _extra0; -}; -struct OpMULHSULayout { - DoMulLayout _0; -}; -struct Mul0MulOutputArm4Layout { - OpMULHSULayout _super; - ArgU16Layout _extra0; -}; -struct OpMULHULayout { - DoMulLayout _0; -}; -struct Mul0MulOutputArm5Layout { - OpMULHULayout _super; - ArgU16Layout _extra0; -}; -struct Mul0MulOutputArm6Layout { - ArgU16Layout _extra0; - ArgU16Layout _extra1; - ArgU16Layout _extra2; - ArgU16Layout _extra3; - ArgU16Layout _extra4; - ArgU16Layout _extra5; - ArgU8Layout _extra6; - ArgU8Layout _extra7; - ArgU8Layout _extra8; - ArgU8Layout _extra9; - ArgU8Layout _extra10; - ArgU8Layout _extra11; - ArgU8Layout _extra12; - ArgU8Layout _extra13; - ArgU8Layout _extra14; - ArgU8Layout _extra15; - ArgU8Layout _extra16; - ArgU8Layout _extra17; - ArgU8Layout _extra18; -}; -struct Mul0MulOutputArm7Layout { - ArgU16Layout _extra0; - ArgU16Layout _extra1; - ArgU16Layout _extra2; - ArgU16Layout _extra3; - ArgU16Layout _extra4; - ArgU16Layout _extra5; - ArgU8Layout _extra6; - ArgU8Layout _extra7; - ArgU8Layout _extra8; - ArgU8Layout _extra9; - ArgU8Layout _extra10; - ArgU8Layout _extra11; - ArgU8Layout _extra12; - ArgU8Layout _extra13; - ArgU8Layout _extra14; - ArgU8Layout _extra15; - ArgU8Layout _extra16; - ArgU8Layout _extra17; - ArgU8Layout _extra18; -}; -struct Mul0MulOutputLayout { - OpSLLLayout arm0; - OpSLLILayout arm1; - Mul0MulOutputArm2Layout arm2; - Mul0MulOutputArm3Layout arm3; - Mul0MulOutputArm4Layout arm4; - Mul0MulOutputArm5Layout arm5; - Mul0MulOutputArm6Layout arm6; - Mul0MulOutputArm7Layout arm7; -}; -struct Mul0Layout { - MulInputLayout input; - _Arguments_Mul0MulOutputLayout _arguments_Mul0MulOutput; - Mul0MulOutputLayout mulOutput; - WriteRdLayout _0; - NormalizeU32Layout pcAdd; -}; -struct DivInputLayout { - DecodeInstLayout decoded; - ReadRegLayout rs1; - ReadRegLayout rs2; -}; -using ArgU16Layout9LayoutArray = std::array; -struct _Arguments_Div0MulOutputLayout { - ArgU16Layout9LayoutArray argU16; - ArgU8Layout13LayoutArray argU8; -}; -struct DoDivLayout { - NondetRegLayout quotLow; - NondetRegLayout quotHigh; - NondetU16RegLayout remLow; - NondetU16RegLayout remHigh; - MultiplyAccumulateLayout mul; - NondetRegLayout topBitType; -}; -struct OpSRLLayout { - DynPo2Layout shiftMul; - DoDivLayout _0; -}; -struct Div0MulOutputArm0Layout { - OpSRLLayout _super; - ArgU16Layout _extra0; -}; -struct TopBitLayout { - NondetRegLayout _super; - NondetU16RegLayout rest; -}; -struct OpSRALayout { - DynPo2Layout shiftMul; - TopBitLayout flip; - DoDivLayout _0; -}; -struct OpSRLILayout { - DynPo2Layout shiftMul; - DoDivLayout _0; -}; -struct Div0MulOutputArm2Layout { - OpSRLILayout _super; - ArgU16Layout _extra0; -}; -struct OpSRAILayout { - DynPo2Layout shiftMul; - TopBitLayout flip; - DoDivLayout _0; -}; -struct OpDIVLayout { - DoDivLayout _0; -}; -struct Div0MulOutputArm4Layout { - OpDIVLayout _super; - ArgU16Layout _extra0; - ArgU16Layout _extra1; -}; -struct OpDIVULayout { - DoDivLayout _0; -}; -struct Div0MulOutputArm5Layout { - OpDIVULayout _super; - ArgU16Layout _extra0; - ArgU16Layout _extra1; -}; -struct OpREMLayout { - DoDivLayout _0; -}; -struct Div0MulOutputArm6Layout { - OpREMLayout _super; - ArgU16Layout _extra0; - ArgU16Layout _extra1; -}; -struct OpREMULayout { - DoDivLayout _0; -}; -struct Div0MulOutputArm7Layout { - OpREMULayout _super; - ArgU16Layout _extra0; - ArgU16Layout _extra1; -}; -struct Div0MulOutputLayout { - Div0MulOutputArm0Layout arm0; - OpSRALayout arm1; - Div0MulOutputArm2Layout arm2; - OpSRAILayout arm3; - Div0MulOutputArm4Layout arm4; - Div0MulOutputArm5Layout arm5; - Div0MulOutputArm6Layout arm6; - Div0MulOutputArm7Layout arm7; -}; -struct Div0Layout { - DivInputLayout input; - _Arguments_Div0MulOutputLayout _arguments_Div0MulOutput; - Div0MulOutputLayout mulOutput; - WriteRdLayout _0; - NormalizeU32Layout pcAdd; -}; -struct AddrDecomposeBitsLayout { - NondetRegLayout low0; - NondetRegLayout low1; - U16RegLayout upperDiff; - IsZeroLayout _0; - NondetU16RegLayout med14; -}; -struct MemLoadInputLayout { - DecodeInstLayout decoded; - ReadRegLayout rs1; - NormalizeU32Layout addrU32; - AddrDecomposeBitsLayout addr; - MemoryReadLayout data; -}; -using ArgU8Layout3LayoutArray = std::array; -struct _Arguments_Mem0OutputLayout { - ArgU8Layout3LayoutArray argU8; -}; -struct SplitWordLayout { - NondetU8RegLayout byte0; - NondetU8RegLayout byte1; -}; -struct OpLBLayout { - SplitWordLayout bytes; - NondetRegLayout highBit; - NondetU8RegLayout low7x2; -}; -struct OpLHLayout { - NondetRegLayout highBit; - NondetU8RegLayout low15x2; -}; -struct Mem0OutputArm1Layout { - OpLHLayout _super; - ArgU8Layout _extra0; - ArgU8Layout _extra1; -}; -struct Mem0OutputArm2Layout { - ArgU8Layout _extra0; - ArgU8Layout _extra1; - ArgU8Layout _extra2; -}; -struct OpLBULayout { - SplitWordLayout bytes; -}; -struct Mem0OutputArm3Layout { - OpLBULayout _super; - ArgU8Layout _extra0; -}; -struct Mem0OutputArm4Layout { - ArgU8Layout _extra0; - ArgU8Layout _extra1; - ArgU8Layout _extra2; -}; -struct Mem0OutputArm5Layout { - ArgU8Layout _extra0; - ArgU8Layout _extra1; - ArgU8Layout _extra2; -}; -struct Mem0OutputArm6Layout { - ArgU8Layout _extra0; - ArgU8Layout _extra1; - ArgU8Layout _extra2; -}; -struct Mem0OutputArm7Layout { - ArgU8Layout _extra0; - ArgU8Layout _extra1; - ArgU8Layout _extra2; -}; -struct Mem0OutputLayout { - OpLBLayout arm0; - Mem0OutputArm1Layout arm1; - Mem0OutputArm2Layout arm2; - Mem0OutputArm3Layout arm3; - Mem0OutputArm4Layout arm4; - Mem0OutputArm5Layout arm5; - Mem0OutputArm6Layout arm6; - Mem0OutputArm7Layout arm7; -}; -struct Mem0Layout { - MemLoadInputLayout input; - _Arguments_Mem0OutputLayout _arguments_Mem0Output; - Mem0OutputLayout output; - WriteRdLayout _0; - NormalizeU32Layout pcAdd; -}; -struct MemStoreInputLayout { - DecodeInstLayout decoded; - ReadRegLayout rs1; - ReadRegLayout rs2; - NormalizeU32Layout addrU32; - AddrDecomposeBitsLayout addr; - MemoryReadLayout data; -}; -using ArgU8Layout4LayoutArray = std::array; -struct _Arguments_Mem1OutputLayout { - ArgU8Layout4LayoutArray argU8; -}; -struct OpSBLayout { - SplitWordLayout origBytes; - SplitWordLayout newBytes; -}; -struct Mem1OutputArm1Layout { - ArgU8Layout _extra0; - ArgU8Layout _extra1; - ArgU8Layout _extra2; - ArgU8Layout _extra3; -}; -struct Mem1OutputArm2Layout { - ArgU8Layout _extra0; - ArgU8Layout _extra1; - ArgU8Layout _extra2; - ArgU8Layout _extra3; -}; -struct Mem1OutputArm3Layout { - ArgU8Layout _extra0; - ArgU8Layout _extra1; - ArgU8Layout _extra2; - ArgU8Layout _extra3; -}; -struct Mem1OutputArm4Layout { - ArgU8Layout _extra0; - ArgU8Layout _extra1; - ArgU8Layout _extra2; - ArgU8Layout _extra3; -}; -struct Mem1OutputArm5Layout { - ArgU8Layout _extra0; - ArgU8Layout _extra1; - ArgU8Layout _extra2; - ArgU8Layout _extra3; -}; -struct Mem1OutputArm6Layout { - ArgU8Layout _extra0; - ArgU8Layout _extra1; - ArgU8Layout _extra2; - ArgU8Layout _extra3; -}; -struct Mem1OutputArm7Layout { - ArgU8Layout _extra0; - ArgU8Layout _extra1; - ArgU8Layout _extra2; - ArgU8Layout _extra3; -}; -struct Mem1OutputLayout { - OpSBLayout arm0; - Mem1OutputArm1Layout arm1; - Mem1OutputArm2Layout arm2; - Mem1OutputArm3Layout arm3; - Mem1OutputArm4Layout arm4; - Mem1OutputArm5Layout arm5; - Mem1OutputArm6Layout arm6; - Mem1OutputArm7Layout arm7; -}; -struct MemStoreFinalizeLayout { - MemoryWriteLayout _0; -}; -struct Mem1Layout { - MemStoreInputLayout input; - _Arguments_Mem1OutputLayout _arguments_Mem1Output; - Mem1OutputLayout output; - MemStoreFinalizeLayout _0; - NormalizeU32Layout pcAdd; -}; -struct MemoryPageInLayout { - MemoryIOLayout io; -}; -struct ControlLoadRoot__0_SuperLayout { - MemoryPageInLayout mem; -}; -using ControlLoadRoot__0_SuperLayout8LayoutArray = std::array; -struct ControlLoadRootLayout { - ControlLoadRoot__0_SuperLayout8LayoutArray _1; -}; -struct Control0_SuperArm0Layout { - ControlLoadRootLayout _super; - CycleArgLayout _extra0; - CycleArgLayout _extra1; - CycleArgLayout _extra2; - CycleArgLayout _extra3; - CycleArgLayout _extra4; - CycleArgLayout _extra5; - CycleArgLayout _extra6; - CycleArgLayout _extra7; - ArgU16Layout _extra8; - ArgU16Layout _extra9; - ArgU16Layout _extra10; - ArgU16Layout _extra11; - ArgU16Layout _extra12; - ArgU16Layout _extra13; - ArgU16Layout _extra14; - ArgU16Layout _extra15; - ArgU16Layout _extra16; - ArgU16Layout _extra17; - ArgU16Layout _extra18; - ArgU16Layout _extra19; - ArgU16Layout _extra20; - ArgU16Layout _extra21; - ArgU16Layout _extra22; - ArgU16Layout _extra23; - ArgU8Layout _extra24; - ArgU8Layout _extra25; - ArgU8Layout _extra26; - ArgU8Layout _extra27; - ArgU8Layout _extra28; - ArgU8Layout _extra29; - ArgU8Layout _extra30; - ArgU8Layout _extra31; - ArgU8Layout _extra32; - ArgU8Layout _extra33; - ArgU8Layout _extra34; - ArgU8Layout _extra35; - ArgU8Layout _extra36; - ArgU8Layout _extra37; - ArgU8Layout _extra38; - ArgU8Layout _extra39; -}; -struct ControlResume_SuperArm0_SuperLayout { - MemoryReadLayout pc; - MemoryReadLayout mode; -}; -struct ControlResume_SuperArm0Layout { - ControlResume_SuperArm0_SuperLayout _super; - MemoryArgLayout _extra0; - MemoryArgLayout _extra1; - MemoryArgLayout _extra2; - MemoryArgLayout _extra3; - MemoryArgLayout _extra4; - MemoryArgLayout _extra5; - MemoryArgLayout _extra6; - MemoryArgLayout _extra7; - MemoryArgLayout _extra8; - MemoryArgLayout _extra9; - MemoryArgLayout _extra10; - MemoryArgLayout _extra11; - CycleArgLayout _extra12; - CycleArgLayout _extra13; - CycleArgLayout _extra14; - CycleArgLayout _extra15; - CycleArgLayout _extra16; - CycleArgLayout _extra17; -}; -struct ControlResume_SuperArm1_Super__0_SuperLayout { - MemoryWriteLayout _0; -}; -using ControlResume_SuperArm1_Super__0_SuperLayout8LayoutArray = std::array; -struct ControlResume_SuperArm1_SuperLayout { - ControlResume_SuperArm1_Super__0_SuperLayout8LayoutArray _1; -}; -struct ControlResume_SuperLayout { - ControlResume_SuperArm0Layout arm0; - ControlResume_SuperArm1_SuperLayout arm1; -}; -using MemoryArgLayout16LayoutArray = std::array; -using CycleArgLayout8LayoutArray = std::array; -struct _Arguments_ControlResume_SuperLayout { - MemoryArgLayout16LayoutArray memoryArg; - CycleArgLayout8LayoutArray cycleArg; -}; -struct ControlResumeLayout { - ControlResume_SuperLayout _super; - IsZeroLayout pcZero; - _Arguments_ControlResume_SuperLayout _arguments_ControlResume_Super; -}; -struct Control0_SuperArm1Layout { - ControlResumeLayout _super; - ArgU16Layout _extra0; - ArgU16Layout _extra1; - ArgU16Layout _extra2; - ArgU16Layout _extra3; - ArgU16Layout _extra4; - ArgU16Layout _extra5; - ArgU16Layout _extra6; - ArgU16Layout _extra7; - ArgU16Layout _extra8; - ArgU16Layout _extra9; - ArgU16Layout _extra10; - ArgU16Layout _extra11; - ArgU16Layout _extra12; - ArgU16Layout _extra13; - ArgU16Layout _extra14; - ArgU16Layout _extra15; - ArgU8Layout _extra16; - ArgU8Layout _extra17; - ArgU8Layout _extra18; - ArgU8Layout _extra19; - ArgU8Layout _extra20; - ArgU8Layout _extra21; - ArgU8Layout _extra22; - ArgU8Layout _extra23; - ArgU8Layout _extra24; - ArgU8Layout _extra25; - ArgU8Layout _extra26; - ArgU8Layout _extra27; - ArgU8Layout _extra28; - ArgU8Layout _extra29; - ArgU8Layout _extra30; - ArgU8Layout _extra31; -}; -struct ControlUserECALLLayout { - NondetRegLayout safeMode; - AddrDecomposeBitsLayout pcAddr; - MemoryReadLayout loadInst; - MemoryReadLayout dispatchIdx; - U16RegLayout _0; - MemoryReadLayout newPcAddr; - MemoryWriteLayout _1; -}; -struct Control0_SuperArm2Layout { - ControlUserECALLLayout _super; - MemoryArgLayout _extra0; - MemoryArgLayout _extra1; - MemoryArgLayout _extra2; - MemoryArgLayout _extra3; - MemoryArgLayout _extra4; - MemoryArgLayout _extra5; - MemoryArgLayout _extra6; - MemoryArgLayout _extra7; - CycleArgLayout _extra8; - CycleArgLayout _extra9; - CycleArgLayout _extra10; - CycleArgLayout _extra11; - ArgU16Layout _extra12; - ArgU16Layout _extra13; - ArgU16Layout _extra14; - ArgU16Layout _extra15; - ArgU16Layout _extra16; - ArgU16Layout _extra17; - ArgU16Layout _extra18; - ArgU16Layout _extra19; - ArgU16Layout _extra20; - ArgU16Layout _extra21; - ArgU16Layout _extra22; - ArgU16Layout _extra23; - ArgU16Layout _extra24; - ArgU8Layout _extra25; - ArgU8Layout _extra26; - ArgU8Layout _extra27; - ArgU8Layout _extra28; - ArgU8Layout _extra29; - ArgU8Layout _extra30; - ArgU8Layout _extra31; - ArgU8Layout _extra32; - ArgU8Layout _extra33; - ArgU8Layout _extra34; - ArgU8Layout _extra35; - ArgU8Layout _extra36; - ArgU8Layout _extra37; - ArgU8Layout _extra38; - ArgU8Layout _extra39; - ArgU8Layout _extra40; -}; -struct ControlMRETLayout { - NondetRegLayout safeMode; - AddrDecomposeBitsLayout pcAddr; - MemoryReadLayout loadInst; - MemoryReadLayout pc; - NormalizeU32Layout pcAdd; -}; -struct Control0_SuperArm3Layout { - ControlMRETLayout _super; - MemoryArgLayout _extra0; - MemoryArgLayout _extra1; - MemoryArgLayout _extra2; - MemoryArgLayout _extra3; - MemoryArgLayout _extra4; - MemoryArgLayout _extra5; - MemoryArgLayout _extra6; - MemoryArgLayout _extra7; - MemoryArgLayout _extra8; - MemoryArgLayout _extra9; - MemoryArgLayout _extra10; - MemoryArgLayout _extra11; - CycleArgLayout _extra12; - CycleArgLayout _extra13; - CycleArgLayout _extra14; - CycleArgLayout _extra15; - CycleArgLayout _extra16; - CycleArgLayout _extra17; - ArgU16Layout _extra18; - ArgU16Layout _extra19; - ArgU16Layout _extra20; - ArgU16Layout _extra21; - ArgU16Layout _extra22; - ArgU16Layout _extra23; - ArgU16Layout _extra24; - ArgU16Layout _extra25; - ArgU16Layout _extra26; - ArgU16Layout _extra27; - ArgU16Layout _extra28; - ArgU16Layout _extra29; - ArgU8Layout _extra30; - ArgU8Layout _extra31; - ArgU8Layout _extra32; - ArgU8Layout _extra33; - ArgU8Layout _extra34; - ArgU8Layout _extra35; - ArgU8Layout _extra36; - ArgU8Layout _extra37; - ArgU8Layout _extra38; - ArgU8Layout _extra39; - ArgU8Layout _extra40; - ArgU8Layout _extra41; - ArgU8Layout _extra42; - ArgU8Layout _extra43; - ArgU8Layout _extra44; - ArgU8Layout _extra45; -}; -using MemoryReadLayout8LayoutArray = std::array; -struct ControlSuspend_SuperArm0_SuperLayout { - MemoryReadLayout8LayoutArray _1; -}; -struct ControlSuspend_SuperArm1_SuperLayout { - NondetRegLayout state; - MemoryWriteLayout _0; - MemoryWriteLayout _1; -}; -struct ControlSuspend_SuperArm1Layout { - ControlSuspend_SuperArm1_SuperLayout _super; - MemoryArgLayout _extra0; - MemoryArgLayout _extra1; - MemoryArgLayout _extra2; - MemoryArgLayout _extra3; - MemoryArgLayout _extra4; - MemoryArgLayout _extra5; - MemoryArgLayout _extra6; - MemoryArgLayout _extra7; - MemoryArgLayout _extra8; - MemoryArgLayout _extra9; - MemoryArgLayout _extra10; - MemoryArgLayout _extra11; - CycleArgLayout _extra12; - CycleArgLayout _extra13; - CycleArgLayout _extra14; - CycleArgLayout _extra15; - CycleArgLayout _extra16; - CycleArgLayout _extra17; -}; -struct ControlSuspend_SuperLayout { - ControlSuspend_SuperArm0_SuperLayout arm0; - ControlSuspend_SuperArm1Layout arm1; -}; -struct _Arguments_ControlSuspend_SuperLayout { - MemoryArgLayout16LayoutArray memoryArg; - CycleArgLayout8LayoutArray cycleArg; -}; -struct ControlSuspendLayout { - ControlSuspend_SuperLayout _super; - IsZeroLayout pcZero; - _Arguments_ControlSuspend_SuperLayout _arguments_ControlSuspend_Super; -}; -struct Control0_SuperArm4Layout { - ControlSuspendLayout _super; - ArgU16Layout _extra0; - ArgU16Layout _extra1; - ArgU16Layout _extra2; - ArgU16Layout _extra3; - ArgU16Layout _extra4; - ArgU16Layout _extra5; - ArgU16Layout _extra6; - ArgU16Layout _extra7; - ArgU16Layout _extra8; - ArgU16Layout _extra9; - ArgU16Layout _extra10; - ArgU16Layout _extra11; - ArgU16Layout _extra12; - ArgU16Layout _extra13; - ArgU16Layout _extra14; - ArgU16Layout _extra15; - ArgU8Layout _extra16; - ArgU8Layout _extra17; - ArgU8Layout _extra18; - ArgU8Layout _extra19; - ArgU8Layout _extra20; - ArgU8Layout _extra21; - ArgU8Layout _extra22; - ArgU8Layout _extra23; - ArgU8Layout _extra24; - ArgU8Layout _extra25; - ArgU8Layout _extra26; - ArgU8Layout _extra27; - ArgU8Layout _extra28; - ArgU8Layout _extra29; - ArgU8Layout _extra30; - ArgU8Layout _extra31; -}; -struct MemoryPageOutLayout { - MemoryIOLayout io; - IsForwardLayout _0; -}; -using MemoryPageOutLayout8LayoutArray = std::array; -struct ControlStoreRootLayout { - MemoryPageOutLayout8LayoutArray _1; -}; -struct Control0_SuperArm5Layout { - ControlStoreRootLayout _super; - ArgU16Layout _extra0; - ArgU16Layout _extra1; - ArgU16Layout _extra2; - ArgU16Layout _extra3; - ArgU16Layout _extra4; - ArgU16Layout _extra5; - ArgU16Layout _extra6; - ArgU16Layout _extra7; - ArgU16Layout _extra8; - ArgU16Layout _extra9; - ArgU16Layout _extra10; - ArgU16Layout _extra11; - ArgU16Layout _extra12; - ArgU16Layout _extra13; - ArgU16Layout _extra14; - ArgU16Layout _extra15; - ArgU8Layout _extra16; - ArgU8Layout _extra17; - ArgU8Layout _extra18; - ArgU8Layout _extra19; - ArgU8Layout _extra20; - ArgU8Layout _extra21; - ArgU8Layout _extra22; - ArgU8Layout _extra23; - ArgU8Layout _extra24; - ArgU8Layout _extra25; - ArgU8Layout _extra26; - ArgU8Layout _extra27; - ArgU8Layout _extra28; - ArgU8Layout _extra29; - ArgU8Layout _extra30; - ArgU8Layout _extra31; -}; -struct ControlTable_SuperArm0_Super__0_SuperLayout { - ArgU16Layout arg; -}; -using ControlTable_SuperArm0_Super__0_SuperLayout16LayoutArray = std::array; -struct ControlTable_SuperArm0_SuperLayout { - ControlTable_SuperArm0_Super__0_SuperLayout16LayoutArray _1; - IsZeroLayout done; -}; -struct ControlTable_SuperArm0Layout { - ControlTable_SuperArm0_SuperLayout _super; - ArgU8Layout _extra0; - ArgU8Layout _extra1; - ArgU8Layout _extra2; - ArgU8Layout _extra3; - ArgU8Layout _extra4; - ArgU8Layout _extra5; - ArgU8Layout _extra6; - ArgU8Layout _extra7; - ArgU8Layout _extra8; - ArgU8Layout _extra9; - ArgU8Layout _extra10; - ArgU8Layout _extra11; - ArgU8Layout _extra12; - ArgU8Layout _extra13; - ArgU8Layout _extra14; - ArgU8Layout _extra15; -}; -struct ControlTable_SuperArm1_Super__0_SuperLayout { - ArgU8Layout arg; -}; -using ControlTable_SuperArm1_Super__0_SuperLayout16LayoutArray = std::array; -struct ControlTable_SuperArm1_SuperLayout { - ControlTable_SuperArm1_Super__0_SuperLayout16LayoutArray _1; - IsZeroLayout done; -}; -struct ControlTable_SuperArm1Layout { - ControlTable_SuperArm1_SuperLayout _super; - ArgU16Layout _extra0; - ArgU16Layout _extra1; - ArgU16Layout _extra2; - ArgU16Layout _extra3; - ArgU16Layout _extra4; - ArgU16Layout _extra5; - ArgU16Layout _extra6; - ArgU16Layout _extra7; - ArgU16Layout _extra8; - ArgU16Layout _extra9; - ArgU16Layout _extra10; - ArgU16Layout _extra11; - ArgU16Layout _extra12; - ArgU16Layout _extra13; - ArgU16Layout _extra14; - ArgU16Layout _extra15; -}; -struct ControlTable_SuperLayout { - ControlTable_SuperArm0Layout arm0; - ControlTable_SuperArm1Layout arm1; -}; -using ArgU16Layout16LayoutArray = std::array; -using ArgU8Layout16LayoutArray = std::array; -struct _Arguments_ControlTable_SuperLayout { - ArgU16Layout16LayoutArray argU16; - ArgU8Layout16LayoutArray argU8; -}; -struct ControlTableLayout { - ControlTable_SuperLayout _super; - NondetRegLayout entry; - NondetRegLayout mode; - _Arguments_ControlTable_SuperLayout _arguments_ControlTable_Super; -}; -struct Control0_SuperArm6Layout { - ControlTableLayout _super; - MemoryArgLayout _extra0; - MemoryArgLayout _extra1; - MemoryArgLayout _extra2; - MemoryArgLayout _extra3; - MemoryArgLayout _extra4; - MemoryArgLayout _extra5; - MemoryArgLayout _extra6; - MemoryArgLayout _extra7; - MemoryArgLayout _extra8; - MemoryArgLayout _extra9; - MemoryArgLayout _extra10; - MemoryArgLayout _extra11; - MemoryArgLayout _extra12; - MemoryArgLayout _extra13; - MemoryArgLayout _extra14; - MemoryArgLayout _extra15; - CycleArgLayout _extra16; - CycleArgLayout _extra17; - CycleArgLayout _extra18; - CycleArgLayout _extra19; - CycleArgLayout _extra20; - CycleArgLayout _extra21; - CycleArgLayout _extra22; - CycleArgLayout _extra23; -}; -struct Control0_SuperArm7Layout { - MemoryArgLayout _extra0; - MemoryArgLayout _extra1; - MemoryArgLayout _extra2; - MemoryArgLayout _extra3; - MemoryArgLayout _extra4; - MemoryArgLayout _extra5; - MemoryArgLayout _extra6; - MemoryArgLayout _extra7; - MemoryArgLayout _extra8; - MemoryArgLayout _extra9; - MemoryArgLayout _extra10; - MemoryArgLayout _extra11; - MemoryArgLayout _extra12; - MemoryArgLayout _extra13; - MemoryArgLayout _extra14; - MemoryArgLayout _extra15; - CycleArgLayout _extra16; - CycleArgLayout _extra17; - CycleArgLayout _extra18; - CycleArgLayout _extra19; - CycleArgLayout _extra20; - CycleArgLayout _extra21; - CycleArgLayout _extra22; - CycleArgLayout _extra23; - ArgU16Layout _extra24; - ArgU16Layout _extra25; - ArgU16Layout _extra26; - ArgU16Layout _extra27; - ArgU16Layout _extra28; - ArgU16Layout _extra29; - ArgU16Layout _extra30; - ArgU16Layout _extra31; - ArgU16Layout _extra32; - ArgU16Layout _extra33; - ArgU16Layout _extra34; - ArgU16Layout _extra35; - ArgU16Layout _extra36; - ArgU16Layout _extra37; - ArgU16Layout _extra38; - ArgU16Layout _extra39; - ArgU8Layout _extra40; - ArgU8Layout _extra41; - ArgU8Layout _extra42; - ArgU8Layout _extra43; - ArgU8Layout _extra44; - ArgU8Layout _extra45; - ArgU8Layout _extra46; - ArgU8Layout _extra47; - ArgU8Layout _extra48; - ArgU8Layout _extra49; - ArgU8Layout _extra50; - ArgU8Layout _extra51; - ArgU8Layout _extra52; - ArgU8Layout _extra53; - ArgU8Layout _extra54; - ArgU8Layout _extra55; -}; -struct Control0_SuperLayout { - Control0_SuperArm0Layout arm0; - Control0_SuperArm1Layout arm1; - Control0_SuperArm2Layout arm2; - Control0_SuperArm3Layout arm3; - Control0_SuperArm4Layout arm4; - Control0_SuperArm5Layout arm5; - Control0_SuperArm6Layout arm6; - Control0_SuperArm7Layout arm7; -}; -struct _Arguments_Control0_SuperLayout { - MemoryArgLayout16LayoutArray memoryArg; - CycleArgLayout8LayoutArray cycleArg; - ArgU16Layout16LayoutArray argU16; - ArgU8Layout16LayoutArray argU8; -}; -struct Control0Layout { - Control0_SuperLayout _super; - CycleArgLayout arg; - _Arguments_Control0_SuperLayout _arguments_Control0_Super; -}; -using MemoryArgLayout8LayoutArray = std::array; -using CycleArgLayout4LayoutArray = std::array; -using ArgU16Layout2LayoutArray = std::array; -struct _Arguments_ECall0OutputLayout { - MemoryArgLayout8LayoutArray memoryArg; - CycleArgLayout4LayoutArray cycleArg; - ArgU16Layout2LayoutArray argU16; -}; -using NondetRegLayout4LayoutArray = std::array; -struct OneHot_4_Layout { - NondetRegLayout4LayoutArray _super; -}; -struct MachineECallLayout { - MemoryReadLayout loadInst; - MemoryReadLayout dispatchIdx; - OneHot_4_Layout dispatch; -}; -struct ECall0OutputArm0Layout { - MachineECallLayout _super; - MemoryArgLayout _extra0; - MemoryArgLayout _extra1; - MemoryArgLayout _extra2; - MemoryArgLayout _extra3; - CycleArgLayout _extra4; - CycleArgLayout _extra5; - ArgU16Layout _extra6; - ArgU16Layout _extra7; -}; -struct ECallTerminateLayout { - MemoryReadLayout a0; - MemoryReadLayout a1; -}; -struct ECall0OutputArm1Layout { - ECallTerminateLayout _super; - MemoryArgLayout _extra0; - MemoryArgLayout _extra1; - MemoryArgLayout _extra2; - MemoryArgLayout _extra3; - CycleArgLayout _extra4; - CycleArgLayout _extra5; - ArgU16Layout _extra6; - ArgU16Layout _extra7; -}; -struct DecomposeLow2Layout { - NondetRegLayout high; - NondetRegLayout low2; - OneHot_4_Layout low2Hot; - IsZeroLayout highZero; - NondetRegLayout isZero; -}; -struct ECallHostReadSetupLayout { - MemoryReadLayout fd; - MemoryReadLayout ptr; - MemoryReadLayout len; - NondetU16RegLayout newLen; - U16RegLayout diff; - MemoryWriteLayout _0; - DecomposeLow2Layout ptrDecomp; - DecomposeLow2Layout lenDecomp; - NondetRegLayout len123; - NondetRegLayout uneven; -}; -struct ECallHostWriteLayout { - MemoryReadLayout fd; - MemoryReadLayout ptr; - MemoryReadLayout len; - NondetU16RegLayout newLen; - U16RegLayout diff; - MemoryWriteLayout _0; -}; -struct ECall0OutputArm4Layout { - MemoryArgLayout _extra0; - MemoryArgLayout _extra1; - MemoryArgLayout _extra2; - MemoryArgLayout _extra3; - MemoryArgLayout _extra4; - MemoryArgLayout _extra5; - MemoryArgLayout _extra6; - MemoryArgLayout _extra7; - CycleArgLayout _extra8; - CycleArgLayout _extra9; - CycleArgLayout _extra10; - CycleArgLayout _extra11; - ArgU16Layout _extra12; - ArgU16Layout _extra13; -}; -struct MemoryWriteUnconstrainedLayout { - MemoryIOLayout io; - IsForwardLayout _0; -}; -struct ECallHostReadWords__0_SuperLayout { - NondetRegLayout addr; - MemoryWriteUnconstrainedLayout _0; -}; -using ECallHostReadWords__0_SuperLayout4LayoutArray = std::array; -struct ECallHostReadWordsLayout { - DecomposeLow2Layout lenDecomp; - DecomposeLow2Layout wordsDecomp; - ECallHostReadWords__0_SuperLayout4LayoutArray _1; - IsZeroLayout lenZero; -}; -struct ECall0OutputArm5Layout { - ECallHostReadWordsLayout _super; - ArgU16Layout _extra0; - ArgU16Layout _extra1; -}; -struct ECall0OutputArm6Layout { - MemoryArgLayout _extra0; - MemoryArgLayout _extra1; - MemoryArgLayout _extra2; - MemoryArgLayout _extra3; - MemoryArgLayout _extra4; - MemoryArgLayout _extra5; - MemoryArgLayout _extra6; - MemoryArgLayout _extra7; - CycleArgLayout _extra8; - CycleArgLayout _extra9; - CycleArgLayout _extra10; - CycleArgLayout _extra11; - ArgU16Layout _extra12; - ArgU16Layout _extra13; -}; -struct ECall0OutputArm7Layout { - MemoryArgLayout _extra0; - MemoryArgLayout _extra1; - MemoryArgLayout _extra2; - MemoryArgLayout _extra3; - MemoryArgLayout _extra4; - MemoryArgLayout _extra5; - MemoryArgLayout _extra6; - MemoryArgLayout _extra7; - CycleArgLayout _extra8; - CycleArgLayout _extra9; - CycleArgLayout _extra10; - CycleArgLayout _extra11; - ArgU16Layout _extra12; - ArgU16Layout _extra13; -}; -struct ECall0OutputLayout { - ECall0OutputArm0Layout arm0; - ECall0OutputArm1Layout arm1; - ECallHostReadSetupLayout arm2; - ECallHostWriteLayout arm3; - ECall0OutputArm4Layout arm4; - ECall0OutputArm5Layout arm5; - ECall0OutputArm6Layout arm6; - ECall0OutputArm7Layout arm7; -}; -struct ECall0Layout { - NondetRegLayout s0; - NondetRegLayout s1; - NondetRegLayout s2; - AddrDecomposeBitsLayout pcAddr; - _Arguments_ECall0OutputLayout _arguments_ECall0Output; - ECall0OutputLayout output; - IsZeroLayout isDecode; - IsZeroLayout isP2Entry; - NormalizeU32Layout addPC; - CycleArgLayout arg; -}; -using NondetRegLayout24LayoutArray = std::array; -struct NondetExtRegLayout { - Reg _super; -}; -struct PoseidonStateLayout { - NondetRegLayout hasState; - NondetRegLayout stateAddr; - NondetRegLayout bufOutAddr; - NondetRegLayout isElem; - NondetRegLayout checkOut; - NondetRegLayout loadTxType; - NondetRegLayout nextState; - NondetRegLayout subState; - NondetRegLayout bufInAddr; - NondetRegLayout count; - NondetRegLayout mode; - NondetRegLayout24LayoutArray inner; - NondetExtRegLayout zcheck; -}; -using ArgU8Layout2LayoutArray = std::array; -struct _Arguments_Poseidon0StateLayout { - MemoryArgLayout16LayoutArray memoryArg; - CycleArgLayout8LayoutArray cycleArg; - ArgU16Layout16LayoutArray argU16; - ArgU8Layout2LayoutArray argU8; -}; -struct PoseidonEntry_SuperArm0Layout { - PoseidonStateLayout _super; - MemoryArgLayout _extra0; - MemoryArgLayout _extra1; - MemoryArgLayout _extra2; - MemoryArgLayout _extra3; - MemoryArgLayout _extra4; - MemoryArgLayout _extra5; - MemoryArgLayout _extra6; - MemoryArgLayout _extra7; - CycleArgLayout _extra8; - CycleArgLayout _extra9; - CycleArgLayout _extra10; - CycleArgLayout _extra11; -}; -struct ReadAddrLayout { - MemoryReadLayout addr32; -}; -struct PoseidonEcallLayout { - PoseidonStateLayout _super; - ReadAddrLayout stateAddr; - ReadAddrLayout bufInAddr; - ReadAddrLayout bufOutAddr; - MemoryReadLayout bitsAndCount; - IsZeroLayout _0; - NondetRegLayout isElem; - NondetRegLayout checkOut; - IsZeroLayout countZero; -}; -struct PoseidonEntry_SuperLayout { - PoseidonStateLayout _super; - PoseidonEntry_SuperArm0Layout arm0; - PoseidonEcallLayout arm1; -}; -struct _Arguments_PoseidonEntry_SuperLayout { - MemoryArgLayout8LayoutArray memoryArg; - CycleArgLayout4LayoutArray cycleArg; -}; -struct PoseidonEntryLayout { - PoseidonEntry_SuperLayout _super; - IsZeroLayout pcZero; - _Arguments_PoseidonEntry_SuperLayout _arguments_PoseidonEntry_Super; -}; -struct Poseidon0StateArm0Layout { - PoseidonEntryLayout _super; - MemoryArgLayout _extra0; - MemoryArgLayout _extra1; - MemoryArgLayout _extra2; - MemoryArgLayout _extra3; - MemoryArgLayout _extra4; - MemoryArgLayout _extra5; - MemoryArgLayout _extra6; - MemoryArgLayout _extra7; - CycleArgLayout _extra8; - CycleArgLayout _extra9; - CycleArgLayout _extra10; - CycleArgLayout _extra11; - ArgU16Layout _extra12; - ArgU16Layout _extra13; - ArgU16Layout _extra14; - ArgU16Layout _extra15; - ArgU16Layout _extra16; - ArgU16Layout _extra17; - ArgU16Layout _extra18; - ArgU16Layout _extra19; - ArgU16Layout _extra20; - ArgU16Layout _extra21; - ArgU16Layout _extra22; - ArgU16Layout _extra23; - ArgU16Layout _extra24; - ArgU16Layout _extra25; - ArgU16Layout _extra26; - ArgU16Layout _extra27; - ArgU8Layout _extra28; - ArgU8Layout _extra29; -}; -struct ReadElemLayout { - MemoryReadLayout elem32; -}; -using ReadElemLayout8LayoutArray = std::array; -struct PoseidonLoadStateLayout { - PoseidonStateLayout _super; - ReadElemLayout8LayoutArray loadList; -}; -struct Poseidon0StateArm1Layout { - PoseidonLoadStateLayout _super; - ArgU16Layout _extra0; - ArgU16Layout _extra1; - ArgU16Layout _extra2; - ArgU16Layout _extra3; - ArgU16Layout _extra4; - ArgU16Layout _extra5; - ArgU16Layout _extra6; - ArgU16Layout _extra7; - ArgU16Layout _extra8; - ArgU16Layout _extra9; - ArgU16Layout _extra10; - ArgU16Layout _extra11; - ArgU16Layout _extra12; - ArgU16Layout _extra13; - ArgU16Layout _extra14; - ArgU16Layout _extra15; - ArgU8Layout _extra16; - ArgU8Layout _extra17; -}; -using NondetRegLayout3LayoutArray = std::array; -struct OneHot_3_Layout { - NondetRegLayout3LayoutArray _super; -}; -struct MemoryGet_SuperArm1Layout { - MemoryPageInLayout _super; - CycleArgLayout _extra0; -}; -struct MemoryGet_SuperLayout { - MemoryReadLayout arm0; - MemoryGet_SuperArm1Layout arm1; - MemoryPageOutLayout arm2; -}; -using MemoryArgLayout2LayoutArray = std::array; -using CycleArgLayout1LayoutArray = std::array; -struct _Arguments_MemoryGet_SuperLayout { - MemoryArgLayout2LayoutArray memoryArg; - CycleArgLayout1LayoutArray cycleArg; -}; -struct MemoryGetLayout { - MemoryGet_SuperLayout _super; - _Arguments_MemoryGet_SuperLayout _arguments_MemoryGet_Super; -}; -using MemoryGetLayout8LayoutArray = std::array; -struct PoseidonLoadInShortLayout { - PoseidonStateLayout _super; - OneHot_3_Layout txType; - MemoryGetLayout8LayoutArray loadList; -}; -struct PoseidonLoadInLowLayout { - PoseidonStateLayout _super; - OneHot_3_Layout txType; - MemoryGetLayout8LayoutArray loadList; -}; -struct PoseidonLoadInHighLayout { - PoseidonStateLayout _super; - OneHot_3_Layout txType; - MemoryGetLayout8LayoutArray loadList; -}; -struct PoseidonLoadIn_SuperLayout { - PoseidonStateLayout _super; - PoseidonLoadInShortLayout arm0; - PoseidonLoadInLowLayout arm1; - PoseidonLoadInHighLayout arm2; -}; -struct _Arguments_PoseidonLoadIn_SuperLayout { - MemoryArgLayout16LayoutArray memoryArg; - CycleArgLayout8LayoutArray cycleArg; -}; -struct PoseidonLoadInLayout { - PoseidonLoadIn_SuperLayout _super; - OneHot_3_Layout _0; - _Arguments_PoseidonLoadIn_SuperLayout _arguments_PoseidonLoadIn_Super; -}; -struct Poseidon0StateArm2Layout { - PoseidonLoadInLayout _super; - ArgU16Layout _extra0; - ArgU16Layout _extra1; - ArgU16Layout _extra2; - ArgU16Layout _extra3; - ArgU16Layout _extra4; - ArgU16Layout _extra5; - ArgU16Layout _extra6; - ArgU16Layout _extra7; - ArgU16Layout _extra8; - ArgU16Layout _extra9; - ArgU16Layout _extra10; - ArgU16Layout _extra11; - ArgU16Layout _extra12; - ArgU16Layout _extra13; - ArgU16Layout _extra14; - ArgU16Layout _extra15; - ArgU8Layout _extra16; - ArgU8Layout _extra17; -}; -struct Poseidon0StateArm3Layout { - PoseidonStateLayout _super; - MemoryArgLayout _extra0; - MemoryArgLayout _extra1; - MemoryArgLayout _extra2; - MemoryArgLayout _extra3; - MemoryArgLayout _extra4; - MemoryArgLayout _extra5; - MemoryArgLayout _extra6; - MemoryArgLayout _extra7; - MemoryArgLayout _extra8; - MemoryArgLayout _extra9; - MemoryArgLayout _extra10; - MemoryArgLayout _extra11; - MemoryArgLayout _extra12; - MemoryArgLayout _extra13; - MemoryArgLayout _extra14; - MemoryArgLayout _extra15; - CycleArgLayout _extra16; - CycleArgLayout _extra17; - CycleArgLayout _extra18; - CycleArgLayout _extra19; - CycleArgLayout _extra20; - CycleArgLayout _extra21; - CycleArgLayout _extra22; - CycleArgLayout _extra23; - ArgU16Layout _extra24; - ArgU16Layout _extra25; - ArgU16Layout _extra26; - ArgU16Layout _extra27; - ArgU16Layout _extra28; - ArgU16Layout _extra29; - ArgU16Layout _extra30; - ArgU16Layout _extra31; - ArgU16Layout _extra32; - ArgU16Layout _extra33; - ArgU16Layout _extra34; - ArgU16Layout _extra35; - ArgU16Layout _extra36; - ArgU16Layout _extra37; - ArgU16Layout _extra38; - ArgU16Layout _extra39; - ArgU8Layout _extra40; - ArgU8Layout _extra41; -}; -struct Poseidon0StateArm4Layout { - PoseidonStateLayout _super; - MemoryArgLayout _extra0; - MemoryArgLayout _extra1; - MemoryArgLayout _extra2; - MemoryArgLayout _extra3; - MemoryArgLayout _extra4; - MemoryArgLayout _extra5; - MemoryArgLayout _extra6; - MemoryArgLayout _extra7; - MemoryArgLayout _extra8; - MemoryArgLayout _extra9; - MemoryArgLayout _extra10; - MemoryArgLayout _extra11; - MemoryArgLayout _extra12; - MemoryArgLayout _extra13; - MemoryArgLayout _extra14; - MemoryArgLayout _extra15; - CycleArgLayout _extra16; - CycleArgLayout _extra17; - CycleArgLayout _extra18; - CycleArgLayout _extra19; - CycleArgLayout _extra20; - CycleArgLayout _extra21; - CycleArgLayout _extra22; - CycleArgLayout _extra23; - ArgU16Layout _extra24; - ArgU16Layout _extra25; - ArgU16Layout _extra26; - ArgU16Layout _extra27; - ArgU16Layout _extra28; - ArgU16Layout _extra29; - ArgU16Layout _extra30; - ArgU16Layout _extra31; - ArgU16Layout _extra32; - ArgU16Layout _extra33; - ArgU16Layout _extra34; - ArgU16Layout _extra35; - ArgU16Layout _extra36; - ArgU16Layout _extra37; - ArgU16Layout _extra38; - ArgU16Layout _extra39; - ArgU8Layout _extra40; - ArgU8Layout _extra41; -}; -struct PoseidonCheckOut__0_SuperLayout { - ReadElemLayout goal; -}; -using PoseidonCheckOut__0_SuperLayout8LayoutArray = std::array; -struct PoseidonCheckOutLayout { - PoseidonStateLayout _super; - PoseidonCheckOut__0_SuperLayout8LayoutArray _1; - IsZeroLayout isNormal; - NondetExtRegLayout extInv; -}; -struct PoseidonDoOut_SuperArm0Layout { - PoseidonCheckOutLayout _super; - ArgU16Layout _extra0; - ArgU16Layout _extra1; - ArgU16Layout _extra2; - ArgU16Layout _extra3; - ArgU16Layout _extra4; - ArgU16Layout _extra5; - ArgU16Layout _extra6; - ArgU16Layout _extra7; - ArgU16Layout _extra8; - ArgU16Layout _extra9; - ArgU16Layout _extra10; - ArgU16Layout _extra11; - ArgU16Layout _extra12; - ArgU16Layout _extra13; - ArgU16Layout _extra14; - ArgU16Layout _extra15; -}; -struct PoseidonStoreOut__0_SuperLayout { - NondetU16RegLayout low; - U16RegLayout high; - MemoryWriteLayout _0; -}; -using PoseidonStoreOut__0_SuperLayout8LayoutArray = std::array; -struct PoseidonStoreOutLayout { - PoseidonStateLayout _super; - PoseidonStoreOut__0_SuperLayout8LayoutArray _1; - IsZeroLayout isNormal; - NondetExtRegLayout extInv; -}; -struct PoseidonDoOut_SuperLayout { - PoseidonStateLayout _super; - PoseidonDoOut_SuperArm0Layout arm0; - PoseidonStoreOutLayout arm1; -}; -struct _Arguments_PoseidonDoOut_SuperLayout { - MemoryArgLayout16LayoutArray memoryArg; - CycleArgLayout8LayoutArray cycleArg; - ArgU16Layout16LayoutArray argU16; -}; -struct PoseidonDoOutLayout { - PoseidonDoOut_SuperLayout _super; - _Arguments_PoseidonDoOut_SuperLayout _arguments_PoseidonDoOut_Super; -}; -struct Poseidon0StateArm5Layout { - PoseidonDoOutLayout _super; - ArgU8Layout _extra0; - ArgU8Layout _extra1; -}; -struct PoseidonPaging_SuperLayout { - PoseidonStateLayout _super; - PoseidonStateLayout arm0; - PoseidonStateLayout arm1; - PoseidonStateLayout arm2; - PoseidonStateLayout arm3; - PoseidonStateLayout arm4; - PoseidonStateLayout arm5; -}; -using NondetRegLayout6LayoutArray = std::array; -struct OneHot_6_Layout { - NondetRegLayout6LayoutArray _super; -}; -struct U8RegLayout { - NondetU8RegLayout ret; -}; -struct IsU24Layout { - NondetU16RegLayout low16; - U8RegLayout _0; -}; -using ArgU16Layout1LayoutArray = std::array; -using ArgU8Layout1LayoutArray = std::array; -struct _Arguments_PoseidonPaging__1Layout { - ArgU16Layout1LayoutArray argU16; - ArgU8Layout1LayoutArray argU8; -}; -struct PoseidonPaging__1Arm0_SuperLayout { - IsU24Layout _0; -}; -struct PoseidonPaging__1Arm1_SuperLayout { - IsU24Layout _0; -}; -struct PoseidonPaging__1Layout { - PoseidonPaging__1Arm0_SuperLayout arm0; - PoseidonPaging__1Arm1_SuperLayout arm1; -}; -struct PoseidonPagingLayout { - PoseidonPaging_SuperLayout _super; - NondetRegLayout curIdx; - NondetRegLayout curMode; - OneHot_6_Layout modeSplit; - IsU24Layout _0; - _Arguments_PoseidonPaging__1Layout _arguments_PoseidonPaging__1; - PoseidonPaging__1Layout _3; - NondetRegLayout _4; -}; -struct Poseidon0StateArm6Layout { - PoseidonPagingLayout _super; - MemoryArgLayout _extra0; - MemoryArgLayout _extra1; - MemoryArgLayout _extra2; - MemoryArgLayout _extra3; - MemoryArgLayout _extra4; - MemoryArgLayout _extra5; - MemoryArgLayout _extra6; - MemoryArgLayout _extra7; - MemoryArgLayout _extra8; - MemoryArgLayout _extra9; - MemoryArgLayout _extra10; - MemoryArgLayout _extra11; - MemoryArgLayout _extra12; - MemoryArgLayout _extra13; - MemoryArgLayout _extra14; - MemoryArgLayout _extra15; - CycleArgLayout _extra16; - CycleArgLayout _extra17; - CycleArgLayout _extra18; - CycleArgLayout _extra19; - CycleArgLayout _extra20; - CycleArgLayout _extra21; - CycleArgLayout _extra22; - CycleArgLayout _extra23; - ArgU16Layout _extra24; - ArgU16Layout _extra25; - ArgU16Layout _extra26; - ArgU16Layout _extra27; - ArgU16Layout _extra28; - ArgU16Layout _extra29; - ArgU16Layout _extra30; - ArgU16Layout _extra31; - ArgU16Layout _extra32; - ArgU16Layout _extra33; - ArgU16Layout _extra34; - ArgU16Layout _extra35; - ArgU16Layout _extra36; - ArgU16Layout _extra37; -}; -struct PoseidonStoreState__0_SuperLayout { - NondetU16RegLayout low; - U16RegLayout high; - MemoryWriteLayout _0; -}; -using PoseidonStoreState__0_SuperLayout8LayoutArray = std::array; -struct PoseidonStoreStateLayout { - PoseidonStateLayout _super; - PoseidonStoreState__0_SuperLayout8LayoutArray _1; -}; -struct Poseidon0StateArm7Layout { - PoseidonStoreStateLayout _super; - ArgU8Layout _extra0; - ArgU8Layout _extra1; -}; -struct Poseidon0StateLayout { - PoseidonStateLayout _super; - Poseidon0StateArm0Layout arm0; - Poseidon0StateArm1Layout arm1; - Poseidon0StateArm2Layout arm2; - Poseidon0StateArm3Layout arm3; - Poseidon0StateArm4Layout arm4; - Poseidon0StateArm5Layout arm5; - Poseidon0StateArm6Layout arm6; - Poseidon0StateArm7Layout arm7; -}; -struct Poseidon0Layout { - PoseidonStateLayout state; - _Arguments_Poseidon0StateLayout _arguments_Poseidon0State; - Poseidon0StateLayout stateRedef; - CycleArgLayout arg; -}; -struct SBoxLayout { - NondetRegLayout _super; - NondetRegLayout cubed; -}; -using SBoxLayout24LayoutArray = std::array; -struct DoExtRoundLayout { - SBoxLayout24LayoutArray _1; -}; -struct DoExtRoundByIdxLayout { - DoExtRoundLayout _super; - OneHot_8_Layout idxHot; -}; -struct PoseidonExtRoundLayout { - PoseidonStateLayout _super; - IsZeroLayout isRound3; - IsZeroLayout isRound7; - IsZeroLayout lastBlock; - DoExtRoundByIdxLayout nextInner; -}; -struct DoIntRoundLayout { - SBoxLayout sbox; -}; -using DoIntRoundLayout21LayoutArray = std::array; -struct DoIntRoundsLayout { - DoIntRoundLayout21LayoutArray _super; -}; -struct PoseidonIntRoundsLayout { - PoseidonStateLayout _super; - DoIntRoundsLayout nextInner; -}; -struct Poseidon1StateLayout { - PoseidonStateLayout _super; - PoseidonExtRoundLayout arm0; - PoseidonIntRoundsLayout arm1; - PoseidonStateLayout arm2; - PoseidonStateLayout arm3; - PoseidonStateLayout arm4; - PoseidonStateLayout arm5; - PoseidonStateLayout arm6; - PoseidonStateLayout arm7; -}; -struct Poseidon1Layout { - PoseidonStateLayout state; - Poseidon1StateLayout stateRedef; - CycleArgLayout arg; -}; -struct TopInstResultLayout { - NondetRegLayout11LayoutArray _selector; - Misc0Layout arm0; - Misc1Layout arm1; - Misc2Layout arm2; - Mul0Layout arm3; - Div0Layout arm4; - Mem0Layout arm5; - Mem1Layout arm6; - Control0Layout arm7; - ECall0Layout arm8; - Poseidon0Layout arm9; - Poseidon1Layout arm10; -}; -struct TopLayout { - NondetRegLayout nextPcLow; - NondetRegLayout nextPcHigh; - NondetRegLayout nextState_0; - NondetRegLayout nextMachineMode; - NondetRegLayout isFirstCycle; - NondetRegLayout cycleND; - NondetRegLayout cycle; - NondetRegLayout major; - NondetRegLayout minor; - InstInputLayout instInput; - OneHot_11_Layout majorOnehot; - TopInstResultLayout instResult; -}; -struct DigestRegValues_SuperLayout { - NondetRegLayout low; - NondetRegLayout high; -}; -using DigestRegValues_SuperLayout8LayoutArray = std::array; -struct DigestRegLayout { - DigestRegValues_SuperLayout8LayoutArray values; -}; -struct Arg_ArgU8Layout { - Reg val; -}; -struct Arg_ArgU16Layout { - Reg val; -}; -struct Arg_MemoryArgLayout { - Reg addr; - Reg cycle; - Reg dataLow; - Reg dataHigh; -}; -struct Arg_CycleArgLayout { - Reg cycle; -}; -struct _accumLayout { - Arg_ArgU8Layout argU8; - Arg_ArgU16Layout argU16; - Arg_MemoryArgLayout memoryArg; - Arg_CycleArgLayout cycleArg; - Reg _offset; -}; -using Reg19LayoutArray = std::array; -struct LayoutAccumLayout { - Reg19LayoutArray columns; -}; -struct TestSuccRunLayout { - TopLayout _0; -}; -struct _globalLayout { - DigestRegLayout input; - NondetRegLayout isTerminate; - DigestRegLayout output; - NondetExtRegLayout rng; - DigestRegLayout stateIn; - DigestRegLayout stateOut; - NondetRegLayout termA0high; - NondetRegLayout termA0low; - NondetRegLayout termA1high; - NondetRegLayout termA1low; -}; -struct _mixLayout { - _accumLayout randomness; -}; -struct NondetRegStruct { - Val _super; -}; -struct NondetExtRegStruct { - ExtVal _super; -}; -struct RegStruct { - NondetRegStruct _super; -}; -struct BitRegStruct { -}; -struct NondetFakeTwitRegStruct { - Val _super; -}; -struct FakeTwitRegStruct { -}; -struct ArgU8Struct { - NondetRegStruct count; - NondetRegStruct val; -}; -struct U8RegStruct { -}; -struct ArgU16Struct { - NondetRegStruct count; - NondetRegStruct val; -}; -struct U16RegStruct { - Val _super; -}; -using Val5Array = std::array; -using Val16Array = std::array; -using NondetRegStruct5Array = std::array; -struct ToBits_5_Struct { - NondetRegStruct5Array _super; -}; -struct ValU32Struct { - Val low; - Val high; -}; -struct DenormedValU32Struct { - Val low; - Val high; -}; -struct NormalizeU32Struct { - ValU32Struct _super; - NondetRegStruct carry; -}; -struct AddrDecomposeStruct { - Val _super; - NondetRegStruct low2; -}; -struct AddrDecomposeBitsStruct { - Val _super; - NondetRegStruct low0; - NondetRegStruct low1; - Val low2; - Val addr; -}; -struct CmpEqualStruct { - RegStruct isEqual; -}; -struct CmpLessThanUnsignedStruct { - Val isLessThan; -}; -struct CmpLessThanStruct { - RegStruct isLessThan; -}; -using NondetRegStruct16Array = std::array; -struct ToBits_16_Struct { - NondetRegStruct16Array _super; -}; -struct FromBits_16_Struct { - Val _super; -}; -struct DecoderStruct { - NondetRegStruct opcode; - Val rs1; - Val rs2; - Val rd; - Val func7; - Val func3; - ValU32Struct immI; - ValU32Struct immS; - ValU32Struct immB; - ValU32Struct immU; - ValU32Struct immJ; -}; -struct MemoryArgStruct { - NondetRegStruct count; - NondetRegStruct addr; - NondetRegStruct cycle; - NondetRegStruct dataLow; - NondetRegStruct dataHigh; -}; -struct CycleArgStruct { - NondetRegStruct count; - NondetRegStruct cycle; -}; -struct IsCycleStruct { -}; -struct MemoryIOStruct { - MemoryArgStruct oldTxn; - MemoryArgStruct newTxn; -}; -struct IsForwardStruct { -}; -struct GetDataStruct { - ValU32Struct _super; - Val diffLow; - Val diffHigh; -}; -struct MemoryWriteStruct { -}; -struct MemoryWriteUnconstrainedStruct { -}; -using Val3Array = std::array; -using NondetRegStruct3Array = std::array; -struct OneHot_3_Struct { - NondetRegStruct3Array _super; -}; -using Val8Array = std::array; -using NondetRegStruct8Array = std::array; -struct OneHot_8_Struct { - NondetRegStruct8Array _super; - NondetRegStruct8Array bits; -}; -struct InstInputStruct { - ValU32Struct pcU32; - Val state; - Val mode; - OneHot_8_Struct minorOnehot; -}; -struct WriteRdStruct { -}; -struct ExpandU32Struct { - NondetRegStruct b0; - NondetRegStruct b1; - NondetRegStruct b2; - NondetRegStruct b3; - Val neg; -}; -struct SplitTotalStruct { - NondetRegStruct out; - Val carry; -}; -struct MultiplySettingsStruct { - Val aSigned; - Val bSigned; - Val cSigned; -}; -struct MultiplyAccumulateStruct { - ValU32Struct outLow; - ValU32Struct outHigh; -}; -struct DivInputStruct { - InstInputStruct _super; - InstInputStruct ii; - DecoderStruct decoded; - GetDataStruct rs1; - GetDataStruct rs2; -}; -struct DivideReturnStruct { - ValU32Struct quot; - ValU32Struct rem; -}; -struct InstOutputStruct { - ValU32Struct newPc; - Val newState; - Val newMode; -}; -struct MiscInputStruct { - InstInputStruct _super; - InstInputStruct ii; - DecoderStruct decoded; - GetDataStruct rs1; - GetDataStruct rs2; -}; -struct MiscOutputStruct { - Val doWrite; - DenormedValU32Struct toWrite; - DenormedValU32Struct newPc; -}; -struct MulInputStruct { - InstInputStruct _super; - InstInputStruct ii; - DecoderStruct decoded; - GetDataStruct rs1; - GetDataStruct rs2; -}; -struct DoMulStruct { - ValU32Struct low; - ValU32Struct high; -}; -struct MemLoadInputStruct { - InstInputStruct ii; - DecoderStruct decoded; - AddrDecomposeBitsStruct addr; - GetDataStruct data; -}; -struct MemStoreInputStruct { - DecoderStruct decoded; - GetDataStruct rs2; - AddrDecomposeBitsStruct addr; - GetDataStruct data; -}; -struct MemStoreFinalizeStruct { -}; -struct SplitWordStruct { - NondetRegStruct byte0; - NondetRegStruct byte1; -}; -struct DigestRegValues_SuperStruct { - RegStruct low; - RegStruct high; -}; -using DigestRegValues_SuperStruct8Array = std::array; -struct DigestRegStruct { - DigestRegValues_SuperStruct8Array values; -}; -using ValU32Struct8Array = std::array; -struct ControlLoadRoot__0Struct { -}; -using ControlLoadRoot__0Struct8Array = std::array; -struct ControlResume_SuperArm1_Super__0Struct { -}; -using ControlResume_SuperArm1_Super__0Struct8Array = std::array; -struct ComponentStruct { -}; -using GetDataStruct8Array = std::array; -struct ControlTable_SuperArm0_Super__0Struct { -}; -struct ControlTable_SuperArm1_Super__0Struct { -}; -using ControlTable_SuperArm0_Super__0Struct16Array = std::array; -using ControlTable_SuperArm1_Super__0Struct16Array = std::array; -using Val4Array = std::array; -using NondetRegStruct4Array = std::array; -struct OneHot_4_Struct { - NondetRegStruct4Array _super; -}; -struct ECallOutputStruct { - Val state; - Val s0; - Val s1; - Val s2; -}; -struct DecomposeLow2Struct { - NondetRegStruct high; - NondetRegStruct low2; - OneHot_4_Struct low2Hot; - NondetRegStruct highZero; - RegStruct isZero; - Val low2Nonzero; -}; -struct ECallHostReadWords__0Struct { -}; -using ECallHostReadWords__0Struct4Array = std::array; -using Val24Array = std::array; -struct MultiplyByMInt_Super_SuperStruct { - Val _super; -}; -using MultiplyByMInt_Super_SuperStruct24Array = std::array; -struct MultiplyByMIntStruct { - MultiplyByMInt_Super_SuperStruct24Array _super; -}; -struct DoIntRounds__0_SuperStruct { - Val _super; -}; -using DoIntRounds__0_SuperStruct21Array = std::array; -struct DoIntRoundsStruct { - Val24Array _super; -}; -using RegStruct24Array = std::array; -struct MultiplyByMExt_Super_SuperStruct { - Val _super; -}; -using MultiplyByMExt_Super_SuperStruct24Array = std::array; -struct MultiplyByMExtStruct { - MultiplyByMExt_Super_SuperStruct24Array _super; -}; -struct PoseidonStateStruct { - RegStruct hasState; - RegStruct stateAddr; - RegStruct bufOutAddr; - RegStruct isElem; - RegStruct checkOut; - RegStruct loadTxType; - RegStruct nextState; - RegStruct subState; - RegStruct bufInAddr; - RegStruct count; - RegStruct mode; - RegStruct24Array inner; - NondetExtRegStruct zcheck; -}; -struct PoseidonOpDefStruct { - Val hasState; - Val stateAddr; - Val bufOutAddr; - Val isElem; - Val checkOut; - Val loadTxType; -}; -struct ReadAddrStruct { - Val _super; -}; -struct ReadElemStruct { - Val _super; -}; -using ReadElemStruct8Array = std::array; -struct PoseidonCheckOut__0Struct { -}; -using PoseidonCheckOut__0Struct8Array = std::array; -struct PoseidonStoreOut__0Struct { -}; -using PoseidonStoreOut__0Struct8Array = std::array; -struct PoseidonStoreState__0Struct { -}; -using PoseidonStoreState__0Struct8Array = std::array; -struct IsU24Struct { -}; -using Val6Array = std::array; -using NondetRegStruct6Array = std::array; -struct OneHot_6_Struct { - NondetRegStruct6Array _super; - NondetRegStruct6Array bits; -}; -using Val11Array = std::array; -using NondetRegStruct11Array = std::array; -struct OneHot_11_Struct { - NondetRegStruct11Array _super; -}; -struct TopStruct { -}; diff --git a/risc0/circuit/rv32im-v2-sys/kernels/cxx/witgen.h b/risc0/circuit/rv32im-v2-sys/kernels/cxx/witgen.h deleted file mode 100644 index 26a28336..00000000 --- a/risc0/circuit/rv32im-v2-sys/kernels/cxx/witgen.h +++ /dev/null @@ -1,293 +0,0 @@ -// Copyright 2024 RISC Zero, Inc. -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include "buffers.h" -#include "fp.h" -#include "fpext.h" -#include "preflight.h" -#include "tables.h" - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -namespace risc0::circuit::rv32im_v2::cpu { - -struct ExecBuffers { - Buffer global; - Buffer data; -}; - -struct AccumBuffers { - Buffer data; - Buffer accum; - Buffer mix; -}; - -#if defined(__clang__) -#pragma clang diagnostic ignored "-Wunused-parameter" -#pragma clang diagnostic ignored "-Wunused-variable" -#elif defined(__GNUC__) -#pragma GCC diagnostic ignored "-Wunused-parameter" -#pragma GCC diagnostic ignored "-Wunused-variable" -#pragma GCC diagnostic ignored "-Wunused-but-set-variable" -#endif - -using Val = risc0::Fp; -using ExtVal = risc0::FpExt; - -inline size_t to_size_t(Val v) { - return v.asUInt32(); -} - -inline Val mod(Val a, Val b) { - return Val(a.asUInt32() % b.asUInt32()); -} - -constexpr size_t EXT_SIZE = 4; - -// Built in field operations -inline Val isz(Val x) { - return Val(x == Val(0)); -} - -inline Val neg_0(Val x) { - return -x; -} - -inline Val inv_0(Val x) { - return inv(x); -} - -inline ExtVal inv_0(ExtVal x) { - return inv(x); -} - -inline Val bitAnd(Val a, Val b) { - return Val(a.asUInt32() & b.asUInt32()); -} - -inline Val inRange(Val low, Val mid, Val high) { - assert(low <= high); - return Val(low <= mid && mid < high); -} - -inline void eqz(Val a, const char* loc) { - if (a.asUInt32()) { - printf("eqz failure at: %s\n", loc); - throw std::runtime_error("eqz failure"); - } -} - -inline void eqz(ExtVal a, const char* loc) { - for (size_t i = 0; i < EXT_SIZE; i++) { - eqz(a.elems[i], loc); - } -} - -struct ExecContext { - ExecContext(PreflightTrace& preflight, LookupTables& tables, size_t cycle) - : preflight(preflight), tables(tables), cycle(cycle) {} - PreflightTrace& preflight; - LookupTables& tables; - size_t cycle; -}; - -// Define index type (used in back) -using Index = size_t; - -struct Reg { - constexpr Reg(size_t col) : col(col) {} - size_t col; -}; - -struct BufferObj { - virtual Val load(ExecContext& ctx, size_t col, size_t back) = 0; - virtual void store(ExecContext& ctx, size_t col, Val val) = 0; -}; - -struct MutableBufObj : public BufferObj { - MutableBufObj(Buffer& buf) : buf(buf) {} - - Val load(ExecContext& ctx, size_t col, size_t back) override { - if (back > ctx.cycle) { - return 0; - } - return buf.get(ctx.cycle - back, col); - } - - void store(ExecContext& ctx, size_t col, Val val) override { - return buf.set(ctx.cycle, col, val); - } - - Buffer& buf; -}; - -using MutableBuf = MutableBufObj*; - -struct GlobalBufObj : public BufferObj { - GlobalBufObj(Buffer& buf) : buf(buf) {} - - Val load(ExecContext& ctx, size_t col, size_t back) override { - assert(back == 0); - return buf.get(0, col); - } - - void store(ExecContext& ctx, size_t col, Val val) override { return buf.set(0, col, val); } - - Buffer& buf; -}; - -using GlobalBuf = GlobalBufObj*; - -template struct BoundLayout { - BoundLayout(const T& layout, BufferObj* buf) : layout(layout), buf(buf) {} - BoundLayout() = default; - BoundLayout(const BoundLayout&) = default; - - const T& layout; - BufferObj* buf = nullptr; -}; - -#define BIND_LAYOUT(orig, buf) BoundLayout(orig, buf) -#define LAYOUT_LOOKUP(orig, elem) BoundLayout(orig.layout.elem, orig.buf) -#define LAYOUT_SUBSCRIPT(orig, index) BoundLayout(orig.layout[index], orig.buf) -#define EQZ(val, loc) eqz(val, loc) - -inline void store(ExecContext& ctx, BoundLayout reg, Val val) { - reg.buf->store(ctx, reg.layout.col, val); -} - -inline void set(ExecContext& ctx, BufferObj* buf, size_t offset, Val val) { - static_cast(buf)->store(ctx, offset, val); -} - -inline void setGlobal(ExecContext& ctx, BufferObj* buf, size_t offset, Val val) { - static_cast(buf)->store(ctx, offset, val); -} - -inline void storeExt(ExecContext& ctx, BoundLayout reg, ExtVal val) { - for (size_t i = 0; i < EXT_SIZE; i++) { - reg.buf->store(ctx, reg.layout.col + i, val.elems[i]); - } -} - -inline Val load(ExecContext& ctx, BoundLayout reg, size_t back) { - return reg.buf->load(ctx, reg.layout.col, back); -} - -inline ExtVal loadExt(ExecContext& ctx, BoundLayout reg, size_t back) { - std::array elems; - for (size_t i = 0; i < EXT_SIZE; i++) { - elems[i] = reg.buf->load(ctx, reg.layout.col + i, back); - } - return FpExt(elems[0], elems[1], elems[2], elems[3]); -} - -inline Val get(ExecContext& ctx, BufferObj* buf, size_t offset, size_t back) { - return static_cast(buf)->load(ctx, offset, back); -} - -inline Val getGlobal(ExecContext& ctx, BufferObj* buf, size_t offset) { - return static_cast(buf)->load(ctx, offset, 0); -} - -#define LOAD(reg, back) load(ctx, reg, back) -#define LOAD_EXT(reg, back) loadExt(ctx, reg, back) -#define STORE(reg, val) store(ctx, reg, val) -#define STORE_EXT(reg, val) storeExt(ctx, reg, val) - -// Map + reduce support -template inline auto map(std::array a, F f) { - std::array out; - for (size_t i = 0; i < N; i++) { - out[i] = f(a[i]); - } - return out; -} - -template -inline auto map(std::array a, std::array b, F f) { - std::array out; - for (size_t i = 0; i < N; i++) { - out[i] = f(a[i], b[i]); - } - return out; -} - -template -inline auto map(std::array a, const BoundLayout& b, F f) { - std::array out; - for (size_t i = 0; i < N; i++) { - out[i] = f(a[i], BoundLayout(b.layout[i], b.buf)); - } - return out; -} - -template -inline auto reduce(std::array elems, T2 start, F f) { - T2 cur = start; - for (size_t i = 0; i < N; i++) { - cur = f(cur, elems[i]); - } - return cur; -} - -template -inline auto reduce(std::array elems, T2 start, const BoundLayout& b, F f) { - T2 cur = start; - for (size_t i = 0; i < N; i++) { - cur = f(cur, elems[i], BoundLayout(b.layout[i], b.buf)); - } - return cur; -} - -// All the extern handling -#define INVOKE_EXTERN(ctx, name, ...) extern_##name(ctx, ##__VA_ARGS__) - -std::array extern_getMemoryTxn(ExecContext& ctx, Val addrElem); -void extern_lookupDelta(ExecContext& ctx, Val table, Val index, Val count); -Val extern_lookupCurrent(ExecContext& ctx, Val table, Val index); -void extern_memoryDelta( - ExecContext& ctx, Val addr, Val cycle, Val dataLow, Val dataHigh, Val count); -uint32_t extern_getDiffCount(ExecContext& ctx, Val cycle); -Val extern_isFirstCycle_0(ExecContext& ctx); -Val extern_getCycle(ExecContext& ctx); -void extern_log(ExecContext& ctx, const std::string& message, std::vector vals); -std::array extern_divide( - ExecContext& ctx, Val numerLow, Val numerHigh, Val denomLow, Val denomHigh, Val signType); -void extern_print(ExecContext& ctx, Val v); -std::array extern_getMajorMinor(ExecContext& ctx); -Val extern_hostReadPrepare(ExecContext& ctx, Val fp, Val len); -Val extern_hostWrite(ExecContext& ctx, Val fdVal, Val addrLow, Val addrHigh, Val lenVal); -std::array extern_nextPagingIdx(ExecContext& ctx); - -// Setup the basic field stuff -#define SET_FIELD(x) /**/ - -#include "defs.cpp.inc" - -#include "types.h.inc" - -#include "layout.cpp.inc" - -} // namespace risc0::circuit::rv32im_v2::cpu diff --git a/risc0/circuit/rv32im-v2-sys/src/lib.rs b/risc0/circuit/rv32im-v2-sys/src/lib.rs deleted file mode 100644 index d15a86be..00000000 --- a/risc0/circuit/rv32im-v2-sys/src/lib.rs +++ /dev/null @@ -1,129 +0,0 @@ -// Copyright 2024 RISC Zero, Inc. -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#[cfg(feature = "cuda")] -use cust::memory::DevicePointer; -use derive_more::Debug; -use risc0_core::field::baby_bear::{BabyBearElem, BabyBearExtElem}; - -#[derive(Clone, Debug, PartialEq)] -#[repr(C)] -pub struct RawMemoryTransaction { - #[debug("{addr:#010x}")] - pub addr: u32, - pub cycle: u32, - #[debug("{word:#010x}")] - pub word: u32, - pub prev_cycle: u32, - #[debug("{word:#010x}")] - pub prev_word: u32, -} - -#[derive(Clone, Debug, PartialEq)] -#[repr(C)] -pub struct RawPreflightCycle { - pub state: u32, - #[debug("{pc:#010x}")] - pub pc: u32, - pub major: u8, - pub minor: u8, - pub machine_mode: u8, - #[debug(skip)] - pub padding: u8, - pub user_cycle: u32, - pub txn_idx: u32, - pub paging_idx: u32, - pub diff_count: u32, -} - -#[repr(C)] -pub struct RawPreflightTrace { - pub cycles: *const RawPreflightCycle, - pub txns: *const RawMemoryTransaction, - pub txns_len: u32, - pub table_split_cycle: u32, -} - -#[repr(C)] -pub struct RawBuffer { - pub buf: *const BabyBearElem, - pub rows: usize, - pub cols: usize, - pub checked_reads: bool, -} - -#[repr(C)] -pub struct RawExecBuffers { - pub global: RawBuffer, - pub data: RawBuffer, -} - -#[repr(C)] -pub struct RawAccumBuffers { - pub data: RawBuffer, - pub accum: RawBuffer, - pub mix: RawBuffer, -} - -extern "C" { - pub fn risc0_circuit_rv32im_v2_cpu_witgen( - mode: u32, - buffers: *const RawExecBuffers, - preflight: *const RawPreflightTrace, - cycles: u32, - ) -> *const std::os::raw::c_char; - - pub fn risc0_circuit_rv32im_v2_cpu_accum( - buffers: *const RawAccumBuffers, - preflight: *const RawPreflightTrace, - cycles: u32, - ) -> *const std::os::raw::c_char; - - pub fn risc0_circuit_rv32im_v2_cpu_poly_fp( - cycle: usize, - steps: usize, - poly_mixs: *const BabyBearExtElem, - args_ptr: *const *const BabyBearElem, - result: *mut BabyBearExtElem, - ) -> *const std::os::raw::c_char; -} - -#[cfg(feature = "cuda")] -extern "C" { - pub fn risc0_circuit_rv32im_v2_cuda_witgen( - mode: u32, - buffers: *const RawExecBuffers, - preflight: *const RawPreflightTrace, - cycles: u32, - ) -> *const std::os::raw::c_char; - - pub fn risc0_circuit_rv32im_v2_cuda_accum( - buffers: *const RawAccumBuffers, - preflight: *const RawPreflightTrace, - cycles: u32, - ) -> *const std::os::raw::c_char; - - pub fn risc0_circuit_rv32im_v2_cuda_eval_check( - check: DevicePointer, - ctrl: DevicePointer, - data: DevicePointer, - accum: DevicePointer, - mix: DevicePointer, - out: DevicePointer, - rou: *const BabyBearElem, - po2: u32, - domain: u32, - poly_mix_pows: *const u32, - ) -> *const std::os::raw::c_char; -} diff --git a/risc0/circuit/rv32im-v2/Cargo.toml b/risc0/circuit/rv32im-v2/Cargo.toml deleted file mode 100644 index cf6c5739..00000000 --- a/risc0/circuit/rv32im-v2/Cargo.toml +++ /dev/null @@ -1,67 +0,0 @@ -[package] -name = "risc0-circuit-rv32im-v2" -description = "RISC Zero circuit for rv32im-v2" -version = "0.1.0" -edition = "2021" - -[[example]] -name = "rv32im_v2" -required-features = ["prove"] - -[dependencies] -anyhow = { version = "1.0", features = ["backtrace"] } -num-derive = "0.4.2" -num-traits = "0.2.19" -risc0-binfmt = { workspace = true } -risc0-core = { workspace = true } -risc0-zkp = { workspace = true, default-features = false, features = [ - "prove", - # "circuit_debug", -] } -serde = { version = "1.0", default-features = false, features = [ - "derive", - "alloc", -] } -tracing = "0.1" - -[target.'cfg(not(target_os = "zkvm"))'.dependencies] -bytemuck = { version = "1.13", optional = true } -cfg-if = { version = "1.0", optional = true } -derive_more = { version = "1.0", features = [ - "add", - "add_assign", - "debug", -], optional = true } -paste = { version = "1.0", optional = true } -rand = { version = "0.8", optional = true } -rayon = { version = "1.5", optional = true } -risc0-circuit-rv32im-v2-sys = { workspace = true, optional = true } -risc0-sys = { workspace = true, optional = true } - -[dev-dependencies] -clap = { version = "4.5", features = ["derive"] } -test-log = { version = "0.2", default-features = false, features = ["trace"] } -tracing-subscriber = { version = "0.3", features = ["env-filter"] } - -[features] -cuda = [ - "prove", - "risc0-circuit-rv32im-v2-sys/cuda", - "risc0-sys/cuda", - "risc0-zkp/cuda", -] -default = ["prove"] -execute = ["dep:bytemuck", "dep:derive_more", "std"] -prove = [ - "dep:cfg-if", - "dep:paste", - "dep:rand", - "dep:rayon", - "dep:risc0-circuit-rv32im-v2-sys", - "dep:risc0-sys", - "execute", - "risc0-core/perf", - "risc0-zkp/prove", - "std", -] -std = ["risc0-zkp/std", "serde/std"] diff --git a/risc0/circuit/rv32im-v2/examples/rv32im_v2.rs b/risc0/circuit/rv32im-v2/examples/rv32im_v2.rs deleted file mode 100644 index 358d7e05..00000000 --- a/risc0/circuit/rv32im-v2/examples/rv32im_v2.rs +++ /dev/null @@ -1,92 +0,0 @@ -// Copyright 2024 RISC Zero, Inc. -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -use std::time::Instant; - -use clap::Parser; -use risc0_circuit_rv32im_v2::{ - execute::{platform::LOOKUP_TABLE_CYCLES, testutil, MemoryImage2, DEFAULT_SEGMENT_LIMIT_PO2}, - prove::segment_prover, -}; - -/// keccak prover benchmarking tool -#[derive(Parser)] -#[command(about, version, author)] -struct Cli { - /// Circuit PO2 - #[arg(long, default_value_t = DEFAULT_SEGMENT_LIMIT_PO2)] - po2: usize, - - /// Number of proofs to run - #[arg(long, default_value_t = 1)] - count: usize, - - /// Don't verify the seal - #[arg(long)] - skip_verification: bool, -} - -const PAGING_CYCLES: usize = 1821; -const NON_LOOP_CYCLES: usize = 8; -const RESERVED_CYCLES: usize = LOOKUP_TABLE_CYCLES + PAGING_CYCLES + NON_LOOP_CYCLES; - -fn main() { - tracing_subscriber::fmt() - .with_env_filter(tracing_subscriber::filter::EnvFilter::from_default_env()) - .init(); - - let args = Cli::parse(); - - let po2 = args.po2; - let cycles = 1 << po2; - assert!(cycles > RESERVED_CYCLES); - let iterations = (cycles - RESERVED_CYCLES) / 2; - - let program = testutil::simple_loop(iterations as u32); - let image = MemoryImage2::new(program); - let result = testutil::execute( - image, - args.po2, - testutil::DEFAULT_SESSION_LIMIT, - &testutil::NullSyscall, - None, - ) - .unwrap(); - - let prover = segment_prover().unwrap(); - let segments = result.segments; - let segment = segments.first().unwrap(); - assert_eq!(args.po2, segment.po2 as usize); - - let mut tot_time: f64 = 0.0; - for i in 0..args.count { - let start_time = Instant::now(); - let seal = prover.prove(segment).unwrap(); - if !args.skip_verification { - prover.verify(&seal).expect("Verification failed"); - } - let run_time = start_time.elapsed().as_secs_f64(); - println!( - "PO2={po2} Run #{i}: {run_time:.3}s, {:.3} cycles/sec", - cycles as f64 / run_time - ); - tot_time += run_time; - } - println!( - "{} runs of PO2={po2} completed in {tot_time:.3}s, avg={:.3}s, {:.3} cycles/sec", - args.count, - tot_time / (args.count as f64), - (args.count * cycles) as f64 / tot_time, - ); -} diff --git a/risc0/circuit/rv32im-v2/src/execute/addr.rs b/risc0/circuit/rv32im-v2/src/execute/addr.rs deleted file mode 100644 index 065d06c2..00000000 --- a/risc0/circuit/rv32im-v2/src/execute/addr.rs +++ /dev/null @@ -1,145 +0,0 @@ -// Copyright 2024 RISC Zero, Inc. -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -use std::ops; - -use derive_more::{Add, AddAssign, Debug, Sub}; - -use super::{pager::PAGE_WORDS, platform::WORD_SIZE}; - -#[derive(Add, AddAssign, Clone, Copy, Debug, Eq, Ord, PartialEq, PartialOrd, Sub)] -#[debug("{_0:#010x}")] -pub struct ByteAddr(pub u32); - -#[derive(Add, AddAssign, Clone, Copy, Debug, Eq, Ord, PartialEq, PartialOrd, Sub)] -#[debug("${_0:#010x}")] -pub struct WordAddr(pub u32); - -impl ByteAddr { - pub const fn waddr(self) -> WordAddr { - WordAddr(self.0 / WORD_SIZE as u32) - } - - pub const fn is_aligned(&self) -> bool { - self.0 % WORD_SIZE as u32 == 0 - } - - pub const fn is_null(&self) -> bool { - self.0 == 0 - } - - pub fn wrapping_add(self, rhs: u32) -> Self { - Self(self.0.wrapping_add(rhs)) - } - - pub fn subaddr(&self) -> u32 { - self.0 % WORD_SIZE as u32 - } -} - -impl WordAddr { - pub const fn baddr(self) -> ByteAddr { - ByteAddr(self.0 * WORD_SIZE as u32) - } - - pub fn page_idx(&self) -> u32 { - self.0 / PAGE_WORDS as u32 - } - - pub fn page_subaddr(&self) -> WordAddr { - Self(self.0 % PAGE_WORDS as u32) - } - - pub fn postfix_inc(&mut self) -> Self { - let cur = *self; - self.0 += 1; - cur - } -} - -impl ops::Add for WordAddr { - type Output = WordAddr; - - fn add(self, rhs: usize) -> Self::Output { - Self(self.0 + rhs as u32) - } -} - -impl ops::Add for WordAddr { - type Output = WordAddr; - - fn add(self, rhs: u32) -> Self::Output { - Self(self.0 + rhs) - } -} - -impl ops::Sub for WordAddr { - type Output = WordAddr; - - fn sub(self, rhs: u32) -> Self::Output { - Self(self.0 - rhs) - } -} - -impl ops::AddAssign for WordAddr { - fn add_assign(&mut self, rhs: usize) { - self.0 += rhs as u32; - } -} - -impl ops::AddAssign for WordAddr { - fn add_assign(&mut self, rhs: u32) { - self.0 += rhs; - } -} - -impl ops::Add for ByteAddr { - type Output = ByteAddr; - - fn add(self, rhs: usize) -> Self::Output { - Self(self.0 + rhs as u32) - } -} - -impl ops::Add for ByteAddr { - type Output = ByteAddr; - - fn add(self, rhs: u32) -> Self::Output { - Self(self.0 + rhs) - } -} - -impl ops::AddAssign for ByteAddr { - fn add_assign(&mut self, rhs: usize) { - self.0 += rhs as u32; - } -} - -impl ops::AddAssign for ByteAddr { - fn add_assign(&mut self, rhs: u32) { - self.0 += rhs; - } -} - -impl From for WordAddr { - fn from(addr: ByteAddr) -> Self { - addr.waddr() - } -} - -impl From for ByteAddr { - fn from(addr: WordAddr) -> Self { - addr.baddr() - } -} diff --git a/risc0/circuit/rv32im-v2/src/execute/executor.rs b/risc0/circuit/rv32im-v2/src/execute/executor.rs deleted file mode 100644 index 9d407473..00000000 --- a/risc0/circuit/rv32im-v2/src/execute/executor.rs +++ /dev/null @@ -1,299 +0,0 @@ -// Copyright 2024 RISC Zero, Inc. -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -use std::{cell::RefCell, rc::Rc}; - -use anyhow::{bail, Result}; -use risc0_binfmt::ExitCode; -use risc0_zkp::core::{digest::Digest, log2_ceil}; - -use super::{ - addr::{ByteAddr, WordAddr}, - image::MemoryImage2, - pager::PagedMemory, - platform::{CycleState, LOOKUP_TABLE_CYCLES}, - r0vm::{Risc0Context, Risc0Machine}, - rv32im::{disasm, DecodedInstruction, Emulator, Instruction}, - segment::Segment, - syscall::Syscall, - trace::{TraceCallback, TraceEvent}, -}; - -pub struct Executor<'a, 'b, S: Syscall> { - pc: ByteAddr, - machine_mode: u32, - user_cycles: u32, - phys_cycles: u32, - pager: PagedMemory, - exit_code: Option, - read_record: Vec>, - write_record: Vec, - syscall_handler: &'a S, - input_digest: Digest, - output_digest: Option, - trace: Vec>>, - cycles: SessionCycles, -} - -pub struct ExecutorResult { - pub segments: u64, - pub exit_code: ExitCode, - pub post_image: MemoryImage2, - pub user_cycles: u64, - pub total_cycles: u64, - pub pre_digest: Digest, - pub post_digest: Digest, - pub output_digest: Option, -} - -#[derive(Default)] -struct SessionCycles { - user: u64, - total: u64, -} - -pub struct SimpleSession { - pub segments: Vec, - pub result: ExecutorResult, -} - -impl<'a, 'b, S: Syscall> Executor<'a, 'b, S> { - pub fn new( - image: MemoryImage2, - syscall_handler: &'a S, - input_digest: Option, - trace: Vec>>, - ) -> Self { - Self { - pc: ByteAddr(0), - machine_mode: 0, - user_cycles: 0, - phys_cycles: 0, - pager: PagedMemory::new(image), - exit_code: None, - read_record: Vec::new(), - write_record: Vec::new(), - syscall_handler, - input_digest: input_digest.unwrap_or_default(), - output_digest: None, - trace, - cycles: SessionCycles::default(), - } - } - - pub fn run Result<()>>( - &mut self, - segment_po2: usize, - max_cycles: Option, - mut callback: F, - ) -> Result { - let segment_limit = 1 << segment_po2; - let mut segment_counter = 0u64; - - self.reset(); - - let mut emu = Emulator::new(); - Risc0Machine::resume(self)?; - let initial_digest = *self.pager.image.image_id(); - - while self.exit_code.is_none() { - if let Some(max_cycles) = max_cycles { - if self.cycles.user >= max_cycles { - bail!("Session limit exceeded"); - } - } - - if self.segment_cycles() >= segment_limit { - Risc0Machine::suspend(self)?; - - let (pre_digest, partial_image, post_digest) = self.pager.commit()?; - callback(Segment { - partial_image, - pre_digest, - post_digest, - read_record: std::mem::take(&mut self.read_record), - write_record: std::mem::take(&mut self.write_record), - user_cycles: self.user_cycles, - suspend_cycle: self.phys_cycles, - paging_cycles: self.pager.cycles, - po2: segment_po2 as u32, - exit_code: ExitCode::SystemSplit, - index: segment_counter, - input_digest: self.input_digest, - output_digest: self.output_digest, - })?; - - segment_counter += 1; - self.cycles.total += 1 << segment_po2; - self.user_cycles = 0; - self.phys_cycles = 0; - self.pager.reset(); - - Risc0Machine::resume(self)?; - } - - Risc0Machine::step(&mut emu, self)?; - } - - Risc0Machine::suspend(self)?; - - let (pre_digest, partial_image, post_digest) = self.pager.commit()?; - let last_po2 = log2_ceil(self.segment_cycles().next_power_of_two() as usize); - let exit_code = self.exit_code.unwrap(); - - callback(Segment { - partial_image, - pre_digest, - post_digest, - read_record: std::mem::take(&mut self.read_record), - write_record: std::mem::take(&mut self.write_record), - user_cycles: self.user_cycles, - suspend_cycle: self.phys_cycles, - paging_cycles: self.pager.cycles, - po2: last_po2 as u32, - exit_code, - index: segment_counter, - input_digest: self.input_digest, - output_digest: self.output_digest, - })?; - - self.cycles.total += 1 << last_po2; - - Ok(ExecutorResult { - segments: segment_counter + 1, - exit_code, - post_image: self.pager.image.clone(), - user_cycles: self.cycles.user, - total_cycles: self.cycles.total, - pre_digest: initial_digest, - post_digest, - output_digest: self.output_digest, - }) - } - - fn reset(&mut self) { - self.pager.reset(); - self.exit_code = None; - self.read_record.clear(); - self.write_record.clear(); - self.output_digest = None; - self.machine_mode = 0; - self.user_cycles = 0; - self.phys_cycles = 0; - self.cycles.user = 0; - self.cycles.total = 0; - self.pc = ByteAddr(0); - } - - fn segment_cycles(&self) -> u32 { - self.phys_cycles + self.pager.cycles + LOOKUP_TABLE_CYCLES as u32 - } - - fn trace(&mut self, event: TraceEvent) -> Result<()> { - for trace in self.trace.iter() { - trace.borrow_mut().trace_callback(event.clone())?; - } - Ok(()) - } -} - -impl<'a, 'b, S: Syscall> Risc0Context for Executor<'a, 'b, S> { - fn get_pc(&self) -> ByteAddr { - self.pc - } - - fn set_pc(&mut self, addr: ByteAddr) { - self.pc = addr; - } - - fn get_machine_mode(&self) -> u32 { - self.machine_mode - } - - fn set_machine_mode(&mut self, mode: u32) { - self.machine_mode = mode; - } - - fn on_insn_start(&mut self, insn: &Instruction, decoded: &DecodedInstruction) -> Result<()> { - let cycle = self.cycles.user; - self.cycles.user += 1; - tracing::trace!( - "[{}:{}:{cycle}] {:?}> {:#010x} {}", - self.user_cycles + 1, - self.segment_cycles() + 1, - self.pc, - decoded.insn, - disasm(insn, decoded) - ); - self.trace(TraceEvent::InstructionStart { - cycle, - pc: self.pc.0, - insn: decoded.insn, - }) - } - - fn on_insn_end(&mut self, _insn: &Instruction, _decoded: &DecodedInstruction) -> Result<()> { - self.user_cycles += 1; - self.phys_cycles += 1; - Ok(()) - } - - fn on_ecall_cycle( - &mut self, - _cur: CycleState, - _next: CycleState, - _s0: u32, - _s1: u32, - _s2: u32, - ) -> Result<()> { - self.phys_cycles += 1; - Ok(()) - } - - fn peek_u32(&mut self, addr: WordAddr) -> Result { - self.pager.peek(addr) - } - - fn load_u32(&mut self, addr: WordAddr) -> Result { - let word = self.pager.load(addr)?; - // tracing::trace!("load_mem({:?}) -> {word:#010x}", addr.baddr()); - Ok(word) - } - - fn store_u32(&mut self, addr: WordAddr, word: u32) -> Result<()> { - // tracing::trace!("store_mem({:?}, {word:#010x})", addr.baddr()); - self.trace(TraceEvent::MemorySet { - addr: addr.baddr().0, - region: word.to_be_bytes().to_vec(), - })?; - self.pager.store(addr, word) - } - - fn on_terminate(&mut self, a0: u32, _a1: u32) { - self.exit_code = Some(ExitCode::Halted(a0)); - } - - fn host_read(&mut self, fd: u32, buf: &mut [u8]) -> Result { - let rlen = self.syscall_handler.host_read(fd, buf)?; - let slice = &buf[..rlen as usize]; - self.read_record.push(slice.to_vec()); - Ok(rlen) - } - - fn host_write(&mut self, fd: u32, buf: &[u8]) -> Result { - let rlen = self.syscall_handler.host_write(fd, buf)?; - self.write_record.push(rlen); - Ok(rlen) - } -} diff --git a/risc0/circuit/rv32im-v2/src/execute/image.rs b/risc0/circuit/rv32im-v2/src/execute/image.rs deleted file mode 100644 index f875d412..00000000 --- a/risc0/circuit/rv32im-v2/src/execute/image.rs +++ /dev/null @@ -1,363 +0,0 @@ -// Copyright 2024 RISC Zero, Inc. -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -use std::{collections::BTreeMap, sync::LazyLock}; - -use anyhow::{anyhow, bail, Result}; -use derive_more::Debug; -use risc0_binfmt::Program; -use risc0_zkp::{ - core::{ - digest::{Digest, DIGEST_WORDS}, - hash::poseidon2::{poseidon2_mix, CELLS}, - }, - field::Elem as _, -}; -use serde::{Deserialize, Serialize}; - -use crate::zirgen::circuit::Val; - -use super::{ - addr::{ByteAddr, WordAddr}, - pager::PAGE_WORDS, - platform::*, -}; - -static ZERO_CACHE: LazyLock = LazyLock::new(ZeroCache::new); - -struct ZeroCache { - pub page: Page, - pub digests: Vec, -} - -impl ZeroCache { - fn new() -> Self { - let page = Page::default(); - let mut digest = page.digest(); - let mut digests = vec![Digest::ZERO; MERKLE_TREE_DEPTH + 1]; - for depth in (0..MERKLE_TREE_DEPTH + 1).rev() { - digests[depth] = digest; - digest = DigestPair { - lhs: digest, - rhs: digest, - } - .digest(); - } - Self { page, digests } - } -} - -#[derive(Clone, Serialize, Deserialize)] -pub struct Page(Vec); - -#[derive(Clone, Debug, Serialize, Deserialize)] -pub struct MemoryImage2 { - #[debug("{}", pages.len())] - // #[debug("{:#010x?}", pages.keys())] - pub pages: BTreeMap, - #[debug("{}", digests.len())] - // #[debug("{:#010x?}", digests.keys())] - pub digests: BTreeMap, -} - -impl Default for MemoryImage2 { - fn default() -> Self { - Self { - pages: Default::default(), - digests: BTreeMap::from([(1, ZERO_CACHE.digests[0])]), - } - } -} - -impl MemoryImage2 { - pub fn new(program: Program) -> Self { - let mut this = Self::default(); - let mut cur_page_idx = 0xffffffff_u32; - let mut cur_page: Option = None; - - let mut image = program.image; - image.insert(SUSPEND_PC_ADDR.0, program.entry); - image.insert(SUSPEND_MODE_ADDR.0, 1); - - for (&addr, &word) in image.iter() { - let addr = ByteAddr(addr).waddr(); - let page_idx = addr.page_idx(); - if page_idx != cur_page_idx { - if let Some(page) = cur_page.take() { - this.set_page(cur_page_idx, page); - } - cur_page = Some(Page::default()); - cur_page_idx = page_idx; - } - - cur_page.as_mut().unwrap().store(addr, word); - } - - if let Some(page) = cur_page.take() { - this.set_page(cur_page_idx, page); - } - - this - } - - pub fn with_kernel(mut user: Program, mut kernel: Program) -> Self { - kernel.image.append(&mut user.image); - kernel - .image - .insert(MEPC_ADDR.0, user.entry - WORD_SIZE as u32); - // .insert(MEPC_ADDR.waddr().0, user.entry - WORD_SIZE as u32); - Self::new(kernel) - } - - /// Return the page data, fails if unavailable - pub fn get_page(&mut self, page_idx: u32) -> Result { - // If page exists, return it - if let Some(page) = self.pages.get(&page_idx) { - return Ok(page.clone()); - } - - // Otherwise try an expand - let digest_idx = MEMORY_PAGES as u32 + page_idx; - if self.expand_if_zero(digest_idx) { - let zero_page = &ZERO_CACHE.page; - self.pages.insert(page_idx, zero_page.clone()); - return Ok(zero_page.clone()); - } - - // Otherwise fail - bail!("Unavailable page: {page_idx}") - } - - /// Set the data for a page - pub fn set_page(&mut self, page_idx: u32, page: Page) { - // tracing::trace!("set_page({page_idx:#08x})"); - let digest_idx = MEMORY_PAGES as u32 + page_idx; - self.expand_if_zero(digest_idx); - self.digests.insert(digest_idx, page.digest()); - self.pages.insert(page_idx, page); - self.fixup_digests(digest_idx); - } - - /// Get a digest, fails if unavailable - pub fn get_digest(&mut self, digest_idx: u32) -> Result<&Digest> { - // Expand if needed - self.expand_if_zero(digest_idx); - self.digests - .get(&digest_idx) - .ok_or(anyhow!("Unavailable digest: {digest_idx}")) - } - - /// Set a digest - pub fn set_digest(&mut self, digest_idx: u32, digest: Digest) { - // If digest is in a zero region, reify for proper uncles - self.expand_if_zero(digest_idx); - // Set the digest value - self.digests.insert(digest_idx, digest); - // Fixup digest values - self.fixup_digests(digest_idx); - } - - /// Return the root digest - pub fn image_id(&mut self) -> &Digest { - self.get_digest(1).unwrap() - } - - /// Expand if digest at `digest_idx` is a zero, return if expanded - fn expand_if_zero(&mut self, digest_idx: u32) -> bool { - let ret = self.is_zero(digest_idx); - if ret { - self.expand_zero(digest_idx); - } - ret - } - - /// Check if given MT node is a zero - fn is_zero(&self, mut digest_idx: u32) -> bool { - // Compute the depth in the tree of this node - let mut depth = digest_idx.ilog2() as usize; - // Go up until we hit a valid node or get past the root - while !self.digests.contains_key(&digest_idx) && digest_idx > 0 { - digest_idx /= 2; - depth -= 1; - } - if digest_idx == 0 { - false - } else { - self.digests[&digest_idx] == ZERO_CACHE.digests[depth] - } - } - - /// Expand zero MT node. - /// - /// Presumes `is_zero(digest_idx)` returned true. - fn expand_zero(&mut self, mut digest_idx: u32) { - // Compute the depth in the tree of this node - let mut depth = digest_idx.ilog2() as usize; - // Go up until we hit the valid zero node - while !self.digests.contains_key(&digest_idx) { - let parent_idx = digest_idx / 2; - let lhs_idx = parent_idx * 2; - let rhs_idx = parent_idx * 2 + 1; - self.digests.insert(lhs_idx, ZERO_CACHE.digests[depth]); - self.digests.insert(rhs_idx, ZERO_CACHE.digests[depth]); - digest_idx = parent_idx; - depth -= 1; - } - } - - /// Fixup digests after a change - fn fixup_digests(&mut self, mut digest_idx: u32) { - while digest_idx != 1 { - let parent_idx = digest_idx / 2; - let lhs_idx = parent_idx * 2; - let rhs_idx = parent_idx * 2 + 1; - let lhs = self.digests.get(&lhs_idx); - let rhs = self.digests.get(&rhs_idx); - if let (Some(&lhs), Some(&rhs)) = (lhs, rhs) { - let parent_digest = DigestPair { lhs, rhs }.digest(); - self.digests.insert(parent_idx, parent_digest); - digest_idx = parent_idx; - } else { - break; - }; - } - } -} - -impl Default for Page { - fn default() -> Self { - Self(vec![0; PAGE_BYTES]) - } -} - -impl Page { - pub fn digest(&self) -> Digest { - let mut cells = [Val::ZERO; CELLS]; - for i in 0..PAGE_WORDS / DIGEST_WORDS { - for j in 0..DIGEST_WORDS { - let addr = WordAddr((i * DIGEST_WORDS + j) as u32); - let word = self.load(addr); - cells[2 * j] = Val::new(word & 0xffff); - cells[2 * j + 1] = Val::new(word >> 16); - } - poseidon2_mix(&mut cells); - } - cells_to_digest(&cells) - } - - pub fn load(&self, addr: WordAddr) -> u32 { - let byte_addr = addr.page_subaddr().baddr().0 as usize; - let mut bytes = [0u8; WORD_SIZE]; - bytes.clone_from_slice(&self.0[byte_addr..byte_addr + WORD_SIZE]); - #[allow(clippy::let_and_return)] // easier to toggle optional tracing - let word = u32::from_le_bytes(bytes); - // tracing::trace!("load({addr:?}) -> {word:#010x}"); - word - } - - pub fn store(&mut self, addr: WordAddr, word: u32) { - let byte_addr = addr.page_subaddr().baddr().0 as usize; - // tracing::trace!("store({addr:?}, {byte_addr:#05x}, {word:#010x})"); - self.0[byte_addr..byte_addr + WORD_SIZE].clone_from_slice(&word.to_le_bytes()); - } -} - -struct DigestPair { - lhs: Digest, - rhs: Digest, -} - -impl DigestPair { - pub fn digest(&self) -> Digest { - let mut cells = [Val::ZERO; CELLS]; - for i in 0..DIGEST_WORDS { - cells[i] = Val::new(self.rhs.as_words()[i]); - cells[DIGEST_WORDS + i] = Val::new(self.lhs.as_words()[i]); - } - poseidon2_mix(&mut cells); - cells_to_digest(&cells) - } -} - -fn cells_to_digest(cells: &[Val; CELLS]) -> Digest { - Digest::new([ - cells[0].as_u32(), - cells[1].as_u32(), - cells[2].as_u32(), - cells[3].as_u32(), - cells[4].as_u32(), - cells[5].as_u32(), - cells[6].as_u32(), - cells[7].as_u32(), - ]) -} - -#[cfg(test)] -mod tests { - use std::collections::BTreeMap; - - use risc0_binfmt::Program; - use risc0_zkp::digest; - use test_log::test; - - use super::{MemoryImage2, ZERO_CACHE}; - - #[test] - fn poseidon2_zeros() { - let expected = [ - digest!("f85c5a32ccc45c22f9686b08d710d4597d7ce256cdcd63146426270d9432c644"), - digest!("2ce7714c40af126c2e86f320b10de417eddd8f51d2b9133d3105c3541a154812"), - digest!("889c443e0c55734c0212fe6c400f00423c421f2070b1340351e77826e4918274"), - digest!("53ea92273a7dfb7622de685c49f4ce1bd69db1696cd6846e9f5de56c89098b01"), - digest!("82db13229831cb2ad63df0476dc1f217c702503d46770c283b6ecc1520fff074"), - digest!("45cba5321f90c34b780d5d1790f23612fb834b3d21dc1e53594826470719ba34"), - digest!("132689262568ae5ac27a4b65018aef0b2e4345578a16453acd874973a61c6350"), - digest!("9fc9626e87aa3614eb38b44d9d832712fb2ea32427c6fd49281ca225f1fefd0d"), - digest!("70947164fe9a4353fa33fb024f09ea0df24be40d88b6025278a3472ac49e6715"), - digest!("4b707f15d9941c0168d630618cdcc05ccae5d84ab9674a6666123a0039915173"), - digest!("97fb1325724ddb74b1446b5bfa13f02c2ecb1b2b2a2f5b1334a04c5c76335d12"), - digest!("adba743a459eb5357487a1238a0c4c238b8313458283900447e9b8540adfb042"), - digest!("a16e68725fe981434dcca548e972214b2dd85e017c3a4e03909a0f4c31a08741"), - digest!("fb94f356397279703f12c24da7aa371e192294347af15d46f10ab512708cdb68"), - digest!("30a2fe1aa5c2ae0e10b91074e34b06742be91e450a9bc10f28ab082263c48750"), - digest!("2347f636d9a0ea45bbe8bf519f39d3127f72b625e2e5495f26a6dd583eb2965d"), - digest!("e43d140e71e366521152d932e846c73535674921576711023deaee06de3b091e"), - digest!("35500a740d3a8b4e5a0ca06a8362f3444456e3206826102dd9e9bc3e5a1a5a18"), - digest!("7c650c1a2000ef1a9baf4f56c2d66e76a3a0b4510175b171268d156a25d8dd45"), - digest!("d73a1e0997a00543afd8de5261f316704215ce384e3ea13df3f87e000f04fb5f"), - digest!("5b77f60275cb272fa0a3d267bdf1fc15021dbe7185ed6a3c94e45d70bbd70148"), - digest!("e053c93b359c8905c5d8523139988b0ed4ef3426864a80498dfcb91d9b813364"), - digest!("242ce034cc4e9326f8b7071124454b2be1a1cd5d21b6483c7ff81d4ba5ac9566"), - ]; - assert_eq!(ZERO_CACHE.digests, expected); - } - - #[test] - fn image_circuit_match() { - let entry = 0x10000; - let program = Program { - entry, - image: BTreeMap::from([(entry, 0x1234b337)]), - }; - let mut image = MemoryImage2::new(program); - assert_eq!( - *image.get_digest(0x0040_0100).unwrap(), - digest!("242ce034cc4e9326f8b7071124454b2be1a1cd5d21b6483c7ff81d4ba5ac9566") - ); - assert_eq!( - *image.image_id(), - digest!("9d41290fa400705127c0240cb646586cc6ea8a23d560aa57cfa86c1369d9d53f") - ); - } -} diff --git a/risc0/circuit/rv32im-v2/src/execute/mod.rs b/risc0/circuit/rv32im-v2/src/execute/mod.rs deleted file mode 100644 index f9b78b6e..00000000 --- a/risc0/circuit/rv32im-v2/src/execute/mod.rs +++ /dev/null @@ -1,40 +0,0 @@ -// Copyright 2024 RISC Zero, Inc. -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -pub(crate) mod addr; -mod executor; -pub(crate) mod image; -pub(crate) mod pager; -pub mod platform; -pub(crate) mod r0vm; -pub(crate) mod rv32im; -pub(crate) mod segment; -mod syscall; -#[cfg(test)] -mod tests; -pub mod testutil; -mod trace; - -use self::platform::MEMORY_PAGES; - -pub use self::{ - executor::{Executor, ExecutorResult, SimpleSession}, - image::MemoryImage2, -}; - -pub const DEFAULT_SEGMENT_LIMIT_PO2: usize = 20; - -pub(crate) fn node_idx(page_idx: u32) -> u32 { - MEMORY_PAGES as u32 + page_idx -} diff --git a/risc0/circuit/rv32im-v2/src/execute/pager.rs b/risc0/circuit/rv32im-v2/src/execute/pager.rs deleted file mode 100644 index b9341779..00000000 --- a/risc0/circuit/rv32im-v2/src/execute/pager.rs +++ /dev/null @@ -1,262 +0,0 @@ -// Copyright 2024 RISC Zero, Inc. -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -use std::collections::{BTreeMap, BTreeSet}; - -use anyhow::{bail, Result}; -use derive_more::Debug; -use risc0_zkp::core::digest::Digest; - -use super::{ - addr::WordAddr, - image::{MemoryImage2, Page}, - node_idx, - platform::*, -}; - -pub const PAGE_WORDS: usize = PAGE_BYTES / WORD_SIZE; - -const LOAD_ROOT_CYCLES: u32 = 1; -const RESUME_CYCLES: u32 = 2; -const SUSPEND_CYCLES: u32 = 2; -const STORE_ROOT_CYCLES: u32 = 1; - -const POSEIDON_PAGING: u32 = 1; -const POSEIDON_LOAD_IN: u32 = 2; -const POSEIDON_DO_OUT: u32 = 1; -const POSEIDON_EXTERNAL: u32 = 8; -const POSEIDON_INTERNAL: u32 = 1; -const POSEIDON_ENTRY: u32 = 1; -pub(crate) const POSEIDON_BLOCK_WORDS: u32 = 8; -pub(crate) const POSEIDON_PAGE_ROUNDS: u32 = PAGE_WORDS as u32 / POSEIDON_BLOCK_WORDS; - -const CYCLE_COST_PAGE: u32 = POSEIDON_PAGING + 10 * POSEIDON_PAGE_ROUNDS + POSEIDON_DO_OUT; - -const CYCLE_COST_NODE: u32 = - POSEIDON_PAGING + POSEIDON_LOAD_IN + POSEIDON_EXTERNAL + POSEIDON_INTERNAL + POSEIDON_DO_OUT; - -const CYCLE_COST_RESERVED: u32 = LOAD_ROOT_CYCLES - + POSEIDON_ENTRY - + POSEIDON_PAGING - + RESUME_CYCLES - + SUSPEND_CYCLES - + POSEIDON_ENTRY - + POSEIDON_PAGING - + STORE_ROOT_CYCLES; - -#[derive(Clone, Copy, Debug, PartialEq, PartialOrd)] -enum PageState { - Unloaded, - Loaded, - Dirty, -} - -#[derive(Clone, Default, Debug)] -pub(crate) struct PagingActivity { - pub pages: BTreeSet, - pub nodes: BTreeSet, -} - -impl PagingActivity { - fn new(pages: BTreeSet) -> Self { - let mut nodes = BTreeSet::new(); - for &page_idx in pages.iter() { - let mut node_idx = node_idx(page_idx); - while node_idx != 1 { - let parent_idx = node_idx / 2; - // tracing::trace!("add node: {node_idx:#010x}, parent_idx: {parent_idx:#010x}"); - if !nodes.insert(parent_idx) { - break; - } - node_idx = parent_idx; - } - } - Self { pages, nodes } - } -} - -#[derive(Debug)] -pub(crate) struct PagedMemory { - pub image: MemoryImage2, - #[debug("{:#x?}", page_cache.keys())] - page_cache: BTreeMap, - #[debug("{page_states:#x?}")] - page_states: BTreeMap, - pub cycles: u32, -} - -impl PagedMemory { - pub(crate) fn new(image: MemoryImage2) -> Self { - Self { - image, - page_cache: BTreeMap::new(), - page_states: BTreeMap::new(), - cycles: CYCLE_COST_RESERVED, - } - } - - pub(crate) fn reset(&mut self) { - self.page_cache.clear(); - self.page_states.clear(); - self.cycles = CYCLE_COST_RESERVED; - } - - pub(crate) fn loaded_pages(&self) -> PagingActivity { - tracing::trace!("loaded_pages: {:#010x?}", self.image.pages.keys()); - PagingActivity::new(self.image.pages.keys().copied().collect()) - } - - pub(crate) fn dirty_pages(&self) -> PagingActivity { - let pages = self - .page_cache - .keys() - .filter(|page_idx| self.page_states[&node_idx(**page_idx)] == PageState::Dirty) - .copied() - .collect(); - PagingActivity::new(pages) - } - - pub(crate) fn peek(&mut self, addr: WordAddr) -> Result { - if addr >= MEMORY_END_ADDR { - bail!("Invalid peek address: {addr:?}"); - } - let page_idx = addr.page_idx(); - let node_idx = node_idx(page_idx); - if self.page_states.contains_key(&node_idx) { - // Loaded, get from cache - Ok(self.page_cache[&page_idx].load(addr)) - } else { - // Unloaded, peek into image - Ok(self.image.get_page(page_idx)?.load(addr)) - } - } - - pub(crate) fn load(&mut self, addr: WordAddr) -> Result { - if addr >= MEMORY_END_ADDR { - bail!("Invalid load address: {addr:?}"); - } - let page_idx = addr.page_idx(); - // tracing::trace!("load: {addr:?}, page: {page_idx:#08x}"); - let node_idx = node_idx(page_idx); - #[allow(clippy::map_entry)] // lifetime issues - if !self.page_states.contains_key(&node_idx) { - self.load_page(page_idx)?; - self.page_states.insert(node_idx, PageState::Loaded); - } - Ok(self.page_cache[&page_idx].load(addr)) - } - - pub(crate) fn store(&mut self, addr: WordAddr, word: u32) -> Result<()> { - if addr >= MEMORY_END_ADDR { - bail!("Invalid store address: {addr:?}"); - } - let page_idx = addr.page_idx(); - // tracing::trace!("store: {addr:?}, page: {page_idx:#08x}, word: {word:#010x}"); - let node_idx = node_idx(page_idx); - let state = if let Some(state) = self.page_states.get(&node_idx) { - *state - } else { - self.load_page(page_idx)?; - PageState::Loaded - }; - if state == PageState::Loaded { - self.cycles += CYCLE_COST_PAGE; - self.fixup_costs(node_idx, PageState::Dirty); - self.page_states.insert(node_idx, PageState::Dirty); - } - self.page_cache - .get_mut(&page_idx) - .unwrap() - .store(addr, word); - Ok(()) - } - - pub(crate) fn commit(&mut self) -> Result<(Digest, MemoryImage2, Digest)> { - // tracing::trace!("commit: {self:#?}"); - - let pre_state = *self.image.image_id(); - - let mut image = MemoryImage2::default(); - - // Gather the original pages - for (&page_idx, page) in self.page_cache.iter() { - let page_state = self.page_states[&node_idx(page_idx)]; - tracing::trace!("commit: {page_idx:#08x}, state: {page_state:?}"); - - // Copy original state of all pages accessed in this segment. - image.set_page(page_idx, self.image.get_page(page_idx)?); - - // Update dirty pages into the image that accumulates over a session. - if page_state == PageState::Dirty { - self.image.set_page(page_idx, page.clone()); - } - } - - // Add minimal needed 'uncles' - for &node_idx in self.page_states.keys() { - // If this is a leaf, break - if node_idx >= MEMORY_PAGES as u32 { - break; - } - - let lhs_idx = node_idx * 2; - let rhs_idx = node_idx * 2 + 1; - - // Otherwise, add whichever child digest (if any) is not loaded - if !self.page_states.contains_key(&lhs_idx) { - image.set_digest(lhs_idx, *self.image.get_digest(lhs_idx)?); - } - if !self.page_states.contains_key(&rhs_idx) { - image.set_digest(rhs_idx, *self.image.get_digest(rhs_idx)?); - } - } - - let post_state = *self.image.image_id(); - - Ok((pre_state, image, post_state)) - } - - fn load_page(&mut self, page_idx: u32) -> Result<()> { - tracing::trace!("load_page: {page_idx:#08x}"); - self.page_cache - .insert(page_idx, self.image.get_page(page_idx)?); - self.cycles += CYCLE_COST_PAGE; - self.fixup_costs(node_idx(page_idx), PageState::Loaded); - Ok(()) - } - - fn fixup_costs(&mut self, mut node_idx: u32, goal: PageState) { - tracing::trace!("fixup: {node_idx:#010x}: {goal:?}"); - while node_idx != 0 { - let state = *self - .page_states - .get(&node_idx) - .unwrap_or(&PageState::Unloaded); - if goal > state { - if node_idx < MEMORY_PAGES as u32 { - if state == PageState::Unloaded { - // tracing::trace!("fixup: {state:?}: {node_idx:#010x}"); - self.cycles += CYCLE_COST_NODE; - } - if goal == PageState::Dirty { - // tracing::trace!("fixup: {goal:?}: {node_idx:#010x}"); - self.cycles += CYCLE_COST_NODE; - } - } - self.page_states.insert(node_idx, goal); - } - node_idx /= 2; - } - } -} diff --git a/risc0/circuit/rv32im-v2/src/execute/platform.rs b/risc0/circuit/rv32im-v2/src/execute/platform.rs deleted file mode 100644 index 2c7fe636..00000000 --- a/risc0/circuit/rv32im-v2/src/execute/platform.rs +++ /dev/null @@ -1,177 +0,0 @@ -// Copyright 2024 RISC Zero, Inc. -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#![allow(unused)] - -use num_derive::FromPrimitive; - -use super::addr::{ByteAddr, WordAddr}; - -pub const WORD_SIZE: usize = 4; -pub const PAGE_BYTES: usize = 1024; -pub const MEMORY_BYTES: usize = 1 << 32; // TODO: this only works on 64-bit machines -pub const MEMORY_PAGES: usize = MEMORY_BYTES / PAGE_BYTES; -pub const MERKLE_TREE_DEPTH: usize = MEMORY_PAGES.ilog2() as usize; -pub const LOOKUP_TABLE_CYCLES: usize = ((1 << 8) + (1 << 16)) / 16; - -pub const ZERO_PAGE_START_ADDR: ByteAddr = ByteAddr(0x0000_0000); -pub const ZERO_PAGE_END_ADDR: ByteAddr = ByteAddr(0x0001_0000); -pub const USER_START_ADDR: ByteAddr = ZERO_PAGE_END_ADDR; -pub const USER_END_ADDR: ByteAddr = ByteAddr(0xc000_0000); -pub const KERNEL_START_ADDR: ByteAddr = USER_END_ADDR; -pub const KERNEL_END_ADDR: ByteAddr = ByteAddr(0xff00_0000); -pub const MACHINE_REGS_ADDR: ByteAddr = ByteAddr(0xffff_0000); -pub const USER_REGS_ADDR: ByteAddr = ByteAddr(0xffff_0080); -pub const SAFE_WRITE_ADDR: ByteAddr = ByteAddr(0xffff_0100); -pub const MEPC_ADDR: ByteAddr = ByteAddr(0xffff_0200); -pub const SUSPEND_PC_ADDR: ByteAddr = ByteAddr(0xffff_0210); -pub const SUSPEND_MODE_ADDR: ByteAddr = ByteAddr(0xffff_0214); -pub const SUSPEND_CYCLE_LOW_ADDR: ByteAddr = ByteAddr(0xffff_0218); -pub const SUSPEND_CYCLE_HIGH_ADDR: ByteAddr = ByteAddr(0xffff_021c); -pub const GLOBAL_OUTPUT_ADDR: ByteAddr = ByteAddr(0xffff_0240); -pub const GLOBAL_INPUT_ADDR: ByteAddr = ByteAddr(0xffff_0260); - -pub const ECALL_DISPATCH_ADDR: ByteAddr = ByteAddr(0xffff_1000); -pub const TRAP_DISPATCH_ADDR: ByteAddr = ByteAddr(0xffff_2000); - -pub const MEMORY_END_ADDR: WordAddr = WordAddr(0x4000_0000); -pub const MERKLE_TREE_START_ADDR: WordAddr = WordAddr(0x4000_0000); -pub const MERKLE_TREE_END_ADDR: WordAddr = WordAddr(0x4400_0000); - -pub const REG_ZERO: usize = 0; // zero constant -pub const REG_RA: usize = 1; // return address -pub const REG_SP: usize = 2; // stack pointer -pub const REG_GP: usize = 3; // global pointer -pub const REG_TP: usize = 4; // thread pointer -pub const REG_T0: usize = 5; // temporary -pub const REG_T1: usize = 6; // temporary -pub const REG_T2: usize = 7; // temporary -pub const REG_S0: usize = 8; // saved register -pub const REG_FP: usize = 8; // frame pointer -pub const REG_S1: usize = 9; // saved register -pub const REG_A0: usize = 10; // fn arg / return value -pub const REG_A1: usize = 11; // fn arg / return value -pub const REG_A2: usize = 12; // fn arg -pub const REG_A3: usize = 13; // fn arg -pub const REG_A4: usize = 14; // fn arg -pub const REG_A5: usize = 15; // fn arg -pub const REG_A6: usize = 16; // fn arg -pub const REG_A7: usize = 17; // fn arg -pub const REG_S2: usize = 18; // saved register -pub const REG_S3: usize = 19; // saved register -pub const REG_S4: usize = 20; // saved register -pub const REG_S5: usize = 21; // saved register -pub const REG_S6: usize = 22; // saved register -pub const REG_S7: usize = 23; // saved register -pub const REG_S8: usize = 24; // saved register -pub const REG_S9: usize = 25; // saved register -pub const REG_S10: usize = 26; // saved register -pub const REG_S11: usize = 27; // saved register -pub const REG_T3: usize = 28; // temporary -pub const REG_T4: usize = 29; // temporary -pub const REG_T5: usize = 30; // temporary -pub const REG_T6: usize = 31; // temporary -pub const REG_MAX: usize = 32; // maximum number of registers - -pub const HOST_ECALL_TERMINATE: u32 = 0; -pub const HOST_ECALL_READ: u32 = 1; -pub const HOST_ECALL_WRITE: u32 = 2; -pub const HOST_ECALL_POSEIDON2: u32 = 3; - -pub const PFLAG_IS_ELEM: u32 = 0x8000_0000; -pub const PFLAG_CHECK_OUT: u32 = 0x4000_0000; - -#[derive(Clone, Copy, Debug, Default, Eq, FromPrimitive, PartialEq)] -pub enum CycleState { - #[default] - LoadRoot = 0, - Resume = 1, - Suspend = 4, - StoreRoot = 5, - ControlTable = 6, - ControlDone = 7, - MachineEcall = 8, - Terminate = 9, - HostReadSetup = 10, - HostWrite = 11, - HostReadBytes = 12, - HostReadWords = 13, - PoseidonEntry = 16, - PoseidonLoadState = 17, - PoseidonLoadIn = 18, - PoseidonDoOut = 21, - PoseidonPaging = 22, - PoseidonStoreState = 23, - PoseidonExtRound = 24, - PoseidonIntRound = 25, - Decode = 32, -} - -pub const SYSCALL_MAX: u32 = 512; - -pub const MAX_IO_BYTES: u32 = 1024; -pub const MAX_IO_WORDS: u32 = 4; - -/// Returns whether `addr` is within user memory bounds. -pub fn is_user_memory(addr: ByteAddr) -> bool { - addr >= USER_START_ADDR && addr < USER_END_ADDR -} - -/// Returns whether `addr` is within user memory bounds. -pub fn is_kernel_memory(addr: ByteAddr) -> bool { - addr >= KERNEL_START_ADDR && addr < KERNEL_END_ADDR -} - -pub mod major { - pub const MISC0: u8 = 0; - pub const MISC1: u8 = 1; - pub const MISC2: u8 = 2; - pub const MUL0: u8 = 3; - pub const DIV0: u8 = 4; - pub const MEM0: u8 = 5; - pub const MEM1: u8 = 6; - pub const CONTROL0: u8 = 7; - pub const ECALL0: u8 = 8; - pub const POSEIDON0: u8 = 9; - pub const POSEIDON1: u8 = 10; -} - -pub mod control_minor { - pub const RESUME: u8 = 1; - pub const USER_ECALL: u8 = 2; - pub const MRET: u8 = 3; -} - -pub mod ecall_minor { - pub const MACHINE_ECALL: u8 = 0; - pub const TERMINATE: u8 = 1; - pub const HOST_READ_SETUP: u8 = 2; - pub const HOST_WRITE: u8 = 3; - pub const HOST_READ_BYTES: u8 = 4; - pub const HOST_READ_WORDS: u8 = 5; -} - -pub mod poseidon_minor { - pub const LOAD_STATE: u8 = 0; - pub const LOAD_DATA: u8 = 1; - pub const EXT_ROUND: u8 = 2; - pub const INT_ROUNDS: u8 = 3; - pub const STORE_STATE: u8 = 4; -} - -pub mod tx { - pub const READ: u32 = 0; - pub const PAGE_IN: u32 = 1; - pub const PAGE_OUT: u32 = 2; -} diff --git a/risc0/circuit/rv32im-v2/src/execute/r0vm.rs b/risc0/circuit/rv32im-v2/src/execute/r0vm.rs deleted file mode 100644 index afd64523..00000000 --- a/risc0/circuit/rv32im-v2/src/execute/r0vm.rs +++ /dev/null @@ -1,389 +0,0 @@ -// Copyright 2024 RISC Zero, Inc. -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -use std::cmp::min; - -use anyhow::{bail, Result}; - -use super::{ - addr::{ByteAddr, WordAddr}, - platform::*, - rv32im::{DecodedInstruction, EmuContext, Emulator, Instruction, TrapCause}, -}; - -pub trait Risc0Context { - /// Get the program counter - fn get_pc(&self) -> ByteAddr; - - /// Set the program counter - fn set_pc(&mut self, addr: ByteAddr); - - /// Get the machine mode - fn get_machine_mode(&self) -> u32; - - /// Set the machine mode - fn set_machine_mode(&mut self, mode: u32); - - fn on_insn_start(&mut self, insn: &Instruction, decoded: &DecodedInstruction) -> Result<()>; - - fn on_insn_end(&mut self, insn: &Instruction, decoded: &DecodedInstruction) -> Result<()>; - - fn peek_u32(&mut self, addr: WordAddr) -> Result; - - fn load_u32(&mut self, addr: WordAddr) -> Result; - - fn store_u32(&mut self, addr: WordAddr, word: u32) -> Result<()>; - - fn on_ecall_cycle( - &mut self, - cur: CycleState, - next: CycleState, - s0: u32, - s1: u32, - s2: u32, - ) -> Result<()>; - - fn on_terminate(&mut self, a0: u32, a1: u32); - - fn suspend(&mut self) -> Result<()> { - // default no-op - Ok(()) - } - - fn resume(&mut self) -> Result<()> { - // default no-op - Ok(()) - } - - fn trap_rewind(&mut self) { - // default no-op - } - - fn trap(&mut self, _cause: TrapCause) { - // default no-op - } - - /// Record what was read during execution so we can replay - fn host_read(&mut self, fd: u32, buf: &mut [u8]) -> Result; - - /// For writes, just pass through, record rlen only - fn host_write(&mut self, fd: u32, buf: &[u8]) -> Result; -} - -pub struct Risc0Machine<'a> { - ctx: &'a mut dyn Risc0Context, -} - -impl<'a> Risc0Machine<'a> { - pub fn step(emu: &mut Emulator, ctx: &'a mut dyn Risc0Context) -> Result<()> { - emu.step(&mut Risc0Machine { ctx }) - } - - pub fn suspend(ctx: &'a mut dyn Risc0Context) -> Result<()> { - let mut this = Risc0Machine { ctx }; - this.store_memory(SUSPEND_PC_ADDR.waddr(), this.ctx.get_pc().0)?; - this.store_memory(SUSPEND_MODE_ADDR.waddr(), this.ctx.get_machine_mode())?; - this.ctx.suspend() - } - - pub fn resume(ctx: &'a mut dyn Risc0Context) -> Result<()> { - let mut this = Risc0Machine { ctx }; - let pc = ByteAddr(this.load_memory(SUSPEND_PC_ADDR.waddr())?); - let machine_mode = this.load_memory(SUSPEND_MODE_ADDR.waddr())?; - // tracing::debug!("resume(entry: {pc:?}, mode: {machine_mode})"); - this.ctx.set_pc(pc); - this.ctx.set_machine_mode(machine_mode); - this.ctx.resume() - } - - fn is_machine_mode(&self) -> bool { - self.ctx.get_machine_mode() != 0 - } - - fn next_pc(&mut self) { - self.ctx.set_pc(self.ctx.get_pc() + WORD_SIZE); - } - - fn machine_ecall(&mut self) -> Result { - match self.load_register(REG_A7)? { - HOST_ECALL_TERMINATE => self.ecall_terminate(), - HOST_ECALL_READ => self.ecall_read(), - HOST_ECALL_WRITE => self.ecall_write(), - HOST_ECALL_POSEIDON2 => self.ecall_poseidon2(), - _ => unimplemented!(), - } - } - - fn user_ecall(&mut self) -> Result { - let dispatch_idx = self.load_register(REG_A7)?; - if dispatch_idx >= SYSCALL_MAX { - return self.trap(TrapCause::EnvironmentCallFromUserMode); - } - - let dispatch_addr = ByteAddr(self.load_memory(ECALL_DISPATCH_ADDR.waddr() + dispatch_idx)?); - if dispatch_addr.is_aligned() || dispatch_addr < KERNEL_START_ADDR { - return self.trap(TrapCause::EnvironmentCallFromUserMode); - } - - self.enter_trap(dispatch_addr)?; - Ok(true) - } - - fn ecall_terminate(&mut self) -> Result { - self.ctx - .on_ecall_cycle(CycleState::MachineEcall, CycleState::Terminate, 0, 0, 0)?; - let a0 = self.load_memory(USER_REGS_ADDR.waddr() + REG_A0)?; - let a1 = self.load_memory(USER_REGS_ADDR.waddr() + REG_A1)?; - self.ctx.on_terminate(a0, a1); - self.ctx - .on_ecall_cycle(CycleState::Terminate, CycleState::Suspend, 0, 0, 0)?; - Ok(false) - } - - fn ecall_read(&mut self) -> Result { - self.ctx - .on_ecall_cycle(CycleState::MachineEcall, CycleState::HostReadSetup, 0, 0, 0)?; - let mut cur_state = CycleState::HostReadSetup; - let fd = self.load_register(REG_A0)?; - let mut ptr = ByteAddr(self.load_register(REG_A1)?); - let len = self.load_register(REG_A2)?; - if ptr + len < ptr { - bail!("Invalid length in host read: {len}"); - } - if len > MAX_IO_BYTES { - bail!("Invalid length (too big) in host read: {len}"); - } - let mut bytes = vec![0u8; len as usize]; - let mut rlen = self.ctx.host_read(fd, &mut bytes)?; - self.store_register(REG_A0, rlen)?; - if rlen == 0 { - self.next_pc(); - } - - fn next_io_state(ptr: ByteAddr, rlen: u32) -> CycleState { - if rlen == 0 { - return CycleState::Decode; - } - if !ptr.is_aligned() || rlen < WORD_SIZE as u32 { - return CycleState::HostReadBytes; - } - CycleState::HostReadWords - } - - let next_state = next_io_state(ptr, rlen); - self.ctx - .on_ecall_cycle(cur_state, next_state, ptr.waddr().0, ptr.subaddr(), rlen)?; - cur_state = next_state; - - let mut i = 0; - - while rlen > 0 && !ptr.is_aligned() { - self.store_u8(ptr, bytes[i])?; - ptr += 1u32; - i += 1; - rlen -= 1; - } - - while rlen >= MAX_IO_WORDS { - let words = min(rlen / MAX_IO_WORDS, MAX_IO_WORDS); - for j in 0..MAX_IO_WORDS { - if j < words { - let word = u32::from_le_bytes(bytes[i..i + WORD_SIZE].try_into()?); - self.store_memory(ptr.waddr(), word)?; - } else { - self.store_memory(SAFE_WRITE_ADDR.waddr(), 0)?; - } - ptr += words; - i += words as usize; - rlen -= words; - } - - if rlen == 0 { - self.next_pc(); - } - - let next_state = next_io_state(ptr, rlen); - self.ctx - .on_ecall_cycle(cur_state, next_state, ptr.waddr().0, ptr.subaddr(), rlen)?; - cur_state = next_state; - } - - while rlen > 0 && !ptr.is_aligned() { - self.store_u8(ptr, bytes[i])?; - ptr += 1u32; - i += 1; - rlen -= 1; - } - - Ok(false) - } - - fn ecall_write(&mut self) -> Result { - self.ctx - .on_ecall_cycle(CycleState::MachineEcall, CycleState::HostWrite, 0, 0, 0)?; - let fd = self.load_register(REG_A0)?; - let ptr = ByteAddr(self.load_register(REG_A1)?); - let len = self.load_register(REG_A2)?; - if ptr + len < ptr { - bail!("Invalid length in host write: {len}"); - } - if len > MAX_IO_BYTES { - bail!("Invalid length (too big) in host write: {len}"); - } - let bytes = self.peek(ptr, len as usize)?; - let rlen = self.ctx.host_write(fd, &bytes)?; - self.store_register(REG_A0, rlen)?; - self.next_pc(); - self.ctx - .on_ecall_cycle(CycleState::HostWrite, CycleState::Decode, 0, 0, 0)?; - Ok(false) - } - - fn ecall_poseidon2(&mut self) -> Result { - self.next_pc(); - self.ctx - .on_ecall_cycle(CycleState::MachineEcall, CycleState::PoseidonEntry, 0, 0, 0)?; - Ok(false) - } - - fn enter_trap(&mut self, dispatch_addr: ByteAddr) -> Result<()> { - if self.is_machine_mode() { - bail!("Illegal trap in machine mode"); - } - let pc = self.ctx.get_pc(); - self.store_memory(MEPC_ADDR.waddr(), pc.0)?; - self.ctx.set_pc(dispatch_addr); - self.ctx.set_machine_mode(1); - Ok(()) - } - - fn peek(&mut self, ptr: ByteAddr, len: usize) -> Result> { - let mut bytes = vec![0u8; len]; - for i in 0..len { - bytes[i] = self.peek_u8(ptr + i)?; - } - Ok(bytes) - } - - fn peek_u8(&mut self, ptr: ByteAddr) -> Result { - let word = self.ctx.peek_u32(ptr.waddr())?; - let bytes = word.to_le_bytes(); - let offset = ptr.subaddr() as usize; - Ok(bytes[offset]) - } - - fn store_u8(&mut self, addr: ByteAddr, byte: u8) -> Result<()> { - let byte_offset = addr.subaddr() as usize; - let word = self.load_memory(addr.waddr())?; - let mut bytes = word.to_le_bytes(); - bytes[byte_offset] = byte; - let word = u32::from_le_bytes(bytes); - self.store_memory(addr.waddr(), word) - } -} - -impl<'a> EmuContext for Risc0Machine<'a> { - fn ecall(&mut self) -> Result { - if self.is_machine_mode() { - self.machine_ecall() - } else { - self.user_ecall() - } - } - - fn mret(&mut self) -> Result { - if !self.is_machine_mode() { - bail!("Illegal mret in user mode"); - } - let dispatch_addr = ByteAddr(self.load_memory(MEPC_ADDR.waddr())?); - self.ctx.set_pc(dispatch_addr + WORD_SIZE); - self.ctx.set_machine_mode(0); - Ok(true) - } - - fn trap(&mut self, cause: TrapCause) -> Result { - self.ctx.trap_rewind(); - let dispatch_addr = - ByteAddr(self.load_memory(TRAP_DISPATCH_ADDR.waddr() + cause.as_u32())?); - if !dispatch_addr.is_aligned() || !is_kernel_memory(dispatch_addr) { - bail!("Invalid trap address: {dispatch_addr:?}, cause: {cause:?}"); - } - self.enter_trap(dispatch_addr)?; - self.ctx.trap(cause); - Ok(false) - } - - fn on_insn_decoded(&mut self, insn: &Instruction, decoded: &DecodedInstruction) -> Result<()> { - self.ctx.on_insn_start(insn, decoded) - } - - fn on_normal_end(&mut self, insn: &Instruction, decoded: &DecodedInstruction) -> Result<()> { - self.ctx.on_insn_end(insn, decoded) - } - - fn get_pc(&self) -> ByteAddr { - self.ctx.get_pc() - } - - fn set_pc(&mut self, addr: ByteAddr) { - self.ctx.set_pc(addr); - } - - fn load_register(&mut self, idx: usize) -> Result { - // tracing::trace!("load_reg: x{idx}"); - let base = if self.is_machine_mode() { - MACHINE_REGS_ADDR.waddr() - } else { - USER_REGS_ADDR.waddr() - }; - self.ctx.load_u32(base + idx) - } - - fn store_register(&mut self, idx: usize, word: u32) -> Result<()> { - // tracing::trace!("store_reg: x{idx} <= {word:#010x}"); - let mut base = if self.is_machine_mode() { - MACHINE_REGS_ADDR.waddr() - } else { - USER_REGS_ADDR.waddr() - }; - - // To avoid the use of a degree in the circuit, all writes to REG_ZERO - // are shunted to a memory location that is never read from. - if idx == REG_ZERO { - base += REG_MAX * 2; - } - - self.ctx.store_u32(base + idx, word) - } - - fn load_memory(&mut self, addr: WordAddr) -> Result { - self.ctx.load_u32(addr) - } - - fn store_memory(&mut self, addr: WordAddr, word: u32) -> Result<()> { - self.ctx.store_u32(addr, word) - } - - fn check_insn_load(&self, addr: ByteAddr) -> bool { - !(addr < ZERO_PAGE_END_ADDR || (!self.is_machine_mode() && addr >= KERNEL_START_ADDR)) - } - - fn check_data_load(&self, addr: ByteAddr) -> bool { - self.is_machine_mode() || is_user_memory(addr) - } - - fn check_data_store(&self, addr: ByteAddr) -> bool { - self.check_data_load(addr) - } -} diff --git a/risc0/circuit/rv32im-v2/src/execute/rv32im.rs b/risc0/circuit/rv32im-v2/src/execute/rv32im.rs deleted file mode 100644 index 6fc2117e..00000000 --- a/risc0/circuit/rv32im-v2/src/execute/rv32im.rs +++ /dev/null @@ -1,709 +0,0 @@ -// Copyright 2024 RISC Zero, Inc. -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -use anyhow::Result; - -use super::{ - addr::{ByteAddr, WordAddr}, - platform::WORD_SIZE, -}; - -pub trait EmuContext { - // Handle environment call - fn ecall(&mut self) -> Result; - - // Handle a machine return - fn mret(&mut self) -> Result; - - // Handle a trap - fn trap(&mut self, cause: TrapCause) -> Result; - - // Callback when instructions are decoded - fn on_insn_decoded(&mut self, insn: &Instruction, decoded: &DecodedInstruction) -> Result<()>; - - // Callback when instructions end normally - fn on_normal_end(&mut self, insn: &Instruction, decoded: &DecodedInstruction) -> Result<()>; - - // Get the program counter - fn get_pc(&self) -> ByteAddr; - - // Set the program counter - fn set_pc(&mut self, addr: ByteAddr); - - // Load from a register - fn load_register(&mut self, idx: usize) -> Result; - - // Store to a register - fn store_register(&mut self, idx: usize, word: u32) -> Result<()>; - - // Load from memory - fn load_memory(&mut self, addr: WordAddr) -> Result; - - // Store to memory - fn store_memory(&mut self, addr: WordAddr, word: u32) -> Result<()>; - - // Check access for instruction load - fn check_insn_load(&self, _addr: ByteAddr) -> bool { - true - } - - // Check access for data load - fn check_data_load(&self, _addr: ByteAddr) -> bool { - true - } - - // Check access for data store - fn check_data_store(&self, _addr: ByteAddr) -> bool { - true - } -} - -#[derive(Default)] -pub struct Emulator { - table: FastDecodeTable, -} - -#[derive(Debug)] -#[repr(u32)] -pub enum TrapCause { - InstructionAddressMisaligned = 0, - InstructionAccessFault, - IllegalInstruction(u32), - Breakpoint, - LoadAddressMisaligned, - LoadAccessFault(ByteAddr), - StoreAddressMisaligned(ByteAddr), - StoreAccessFault, - EnvironmentCallFromUserMode, -} - -impl TrapCause { - pub fn as_u32(&self) -> u32 { - unsafe { *(self as *const Self as *const u32) } - } -} - -#[derive(Clone, Debug, Default)] -pub struct DecodedInstruction { - pub insn: u32, - top_bit: u32, - func7: u32, - rs2: u32, - rs1: u32, - func3: u32, - rd: u32, - opcode: u32, -} - -#[derive(Clone, Copy, Debug)] -enum InsnCategory { - Compute, - Load, - Store, - System, - Invalid, -} - -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum InsnKind { - Add = 0, // major: 0, minor: 0 - Sub = 1, // major: 0, minor: 1 - Xor = 2, // major: 0, minor: 2 - Or = 3, // major: 0, minor: 3 - And = 4, // major: 0, minor: 4 - Slt = 5, // major: 0, minor: 5 - SltU = 6, // major: 0, minor: 6 - AddI = 7, // major: 0, minor: 7 - - XorI = 8, // major: 1, minor: 0 - OrI = 9, // major: 1, minor: 1 - AndI = 10, // major: 1, minor: 2 - SltI = 11, // major: 1, minor: 3 - SltIU = 12, // major: 1, minor: 4 - Beq = 13, // major: 1, minor: 5 - Bne = 14, // major: 1, minor: 6 - Blt = 15, // major: 1, minor: 7 - - Bge = 16, // major: 2, minor: 0 - BltU = 17, // major: 2, minor: 1 - BgeU = 18, // major: 2, minor: 2 - Jal = 19, // major: 2, minor: 3 - JalR = 20, // major: 2, minor: 4 - Lui = 21, // major: 2, minor: 5 - Auipc = 22, // major: 2, minor: 6 - - Sll = 24, // major: 3, minor: 0 - SllI = 25, // major: 3, minor: 1 - Mul = 26, // major: 3, minor: 2 - MulH = 27, // major: 3, minor: 3 - MulHSU = 28, // major: 3, minor: 4 - MulHU = 29, // major: 3, minor: 5 - - Srl = 32, // major: 4, minor: 0 - Sra = 33, // major: 4, minor: 1 - SrlI = 34, // major: 4, minor: 2 - SraI = 35, // major: 4, minor: 3 - Div = 36, // major: 4, minor: 4 - DivU = 37, // major: 4, minor: 5 - Rem = 38, // major: 4, minor: 6 - RemU = 39, // major: 4, minor: 7 - - Lb = 40, // major: 5, minor: 0 - Lh = 41, // major: 5, minor: 1 - Lw = 42, // major: 5, minor: 2 - LbU = 43, // major: 5, minor: 3 - LhU = 44, // major: 5, minor: 4 - - Sb = 48, // major: 6, minor: 0 - Sh = 49, // major: 6, minor: 1 - Sw = 50, // major: 6, minor: 2 - - Eany = 56, // major: 7, minor: 0 - Mret = 57, // major: 7, minor: 1 - - Invalid = 255, -} - -#[derive(Clone, Copy, Debug)] -pub struct Instruction { - pub kind: InsnKind, - category: InsnCategory, - pub opcode: u32, - pub func3: u32, - pub func7: u32, -} - -impl DecodedInstruction { - fn new(insn: u32) -> Self { - Self { - insn, - top_bit: (insn & 0x80000000) >> 31, - func7: (insn & 0xfe000000) >> 25, - rs2: (insn & 0x01f00000) >> 20, - rs1: (insn & 0x000f8000) >> 15, - func3: (insn & 0x00007000) >> 12, - rd: (insn & 0x00000f80) >> 7, - opcode: insn & 0x0000007f, - } - } - - fn imm_b(&self) -> u32 { - (self.top_bit * 0xfffff000) - | ((self.rd & 1) << 11) - | ((self.func7 & 0x3f) << 5) - | (self.rd & 0x1e) - } - - fn imm_i(&self) -> u32 { - (self.top_bit * 0xfffff000) | (self.func7 << 5) | self.rs2 - } - - fn imm_s(&self) -> u32 { - (self.top_bit * 0xfffff000) | (self.func7 << 5) | self.rd - } - - fn imm_j(&self) -> u32 { - (self.top_bit * 0xfff00000) - | (self.rs1 << 15) - | (self.func3 << 12) - | ((self.rs2 & 1) << 11) - | ((self.func7 & 0x3f) << 5) - | (self.rs2 & 0x1e) - } - - fn imm_u(&self) -> u32 { - self.insn & 0xfffff000 - } -} - -const fn insn( - kind: InsnKind, - category: InsnCategory, - opcode: u32, - func3: i32, - func7: i32, -) -> Instruction { - Instruction { - kind, - category, - opcode, - func3: func3 as u32, - func7: func7 as u32, - } -} - -type InstructionTable = [Instruction; 48]; -type FastInstructionTable = [u8; 1 << 10]; - -const RV32IM_ISA: InstructionTable = [ - insn(InsnKind::Invalid, InsnCategory::Invalid, 0x00, 0x0, 0x00), - insn(InsnKind::Add, InsnCategory::Compute, 0x33, 0x0, 0x00), - insn(InsnKind::Sub, InsnCategory::Compute, 0x33, 0x0, 0x20), - insn(InsnKind::Xor, InsnCategory::Compute, 0x33, 0x4, 0x00), - insn(InsnKind::Or, InsnCategory::Compute, 0x33, 0x6, 0x00), - insn(InsnKind::And, InsnCategory::Compute, 0x33, 0x7, 0x00), - insn(InsnKind::Sll, InsnCategory::Compute, 0x33, 0x1, 0x00), - insn(InsnKind::Srl, InsnCategory::Compute, 0x33, 0x5, 0x00), - insn(InsnKind::Sra, InsnCategory::Compute, 0x33, 0x5, 0x20), - insn(InsnKind::Slt, InsnCategory::Compute, 0x33, 0x2, 0x00), - insn(InsnKind::SltU, InsnCategory::Compute, 0x33, 0x3, 0x00), - insn(InsnKind::AddI, InsnCategory::Compute, 0x13, 0x0, -1), - insn(InsnKind::XorI, InsnCategory::Compute, 0x13, 0x4, -1), - insn(InsnKind::OrI, InsnCategory::Compute, 0x13, 0x6, -1), - insn(InsnKind::AndI, InsnCategory::Compute, 0x13, 0x7, -1), - insn(InsnKind::SllI, InsnCategory::Compute, 0x13, 0x1, 0x00), - insn(InsnKind::SrlI, InsnCategory::Compute, 0x13, 0x5, 0x00), - insn(InsnKind::SraI, InsnCategory::Compute, 0x13, 0x5, 0x20), - insn(InsnKind::SltI, InsnCategory::Compute, 0x13, 0x2, -1), - insn(InsnKind::SltIU, InsnCategory::Compute, 0x13, 0x3, -1), - insn(InsnKind::Beq, InsnCategory::Compute, 0x63, 0x0, -1), - insn(InsnKind::Bne, InsnCategory::Compute, 0x63, 0x1, -1), - insn(InsnKind::Blt, InsnCategory::Compute, 0x63, 0x4, -1), - insn(InsnKind::Bge, InsnCategory::Compute, 0x63, 0x5, -1), - insn(InsnKind::BltU, InsnCategory::Compute, 0x63, 0x6, -1), - insn(InsnKind::BgeU, InsnCategory::Compute, 0x63, 0x7, -1), - insn(InsnKind::Jal, InsnCategory::Compute, 0x6f, -1, -1), - insn(InsnKind::JalR, InsnCategory::Compute, 0x67, 0x0, -1), - insn(InsnKind::Lui, InsnCategory::Compute, 0x37, -1, -1), - insn(InsnKind::Auipc, InsnCategory::Compute, 0x17, -1, -1), - insn(InsnKind::Mul, InsnCategory::Compute, 0x33, 0x0, 0x01), - insn(InsnKind::MulH, InsnCategory::Compute, 0x33, 0x1, 0x01), - insn(InsnKind::MulHSU, InsnCategory::Compute, 0x33, 0x2, 0x01), - insn(InsnKind::MulHU, InsnCategory::Compute, 0x33, 0x3, 0x01), - insn(InsnKind::Div, InsnCategory::Compute, 0x33, 0x4, 0x01), - insn(InsnKind::DivU, InsnCategory::Compute, 0x33, 0x5, 0x01), - insn(InsnKind::Rem, InsnCategory::Compute, 0x33, 0x6, 0x01), - insn(InsnKind::RemU, InsnCategory::Compute, 0x33, 0x7, 0x01), - insn(InsnKind::Lb, InsnCategory::Load, 0x03, 0x0, -1), - insn(InsnKind::Lh, InsnCategory::Load, 0x03, 0x1, -1), - insn(InsnKind::Lw, InsnCategory::Load, 0x03, 0x2, -1), - insn(InsnKind::LbU, InsnCategory::Load, 0x03, 0x4, -1), - insn(InsnKind::LhU, InsnCategory::Load, 0x03, 0x5, -1), - insn(InsnKind::Sb, InsnCategory::Store, 0x23, 0x0, -1), - insn(InsnKind::Sh, InsnCategory::Store, 0x23, 0x1, -1), - insn(InsnKind::Sw, InsnCategory::Store, 0x23, 0x2, -1), - insn(InsnKind::Eany, InsnCategory::System, 0x73, 0x0, 0x00), - insn(InsnKind::Mret, InsnCategory::System, 0x73, 0x0, 0x18), -]; - -// RISC-V instruction are determined by 3 parts: -// - Opcode: 7 bits -// - Func3: 3 bits -// - Func7: 7 bits -// In many cases, func7 and/or func3 is ignored. A standard trick is to decode -// via a table, but a 17 bit lookup table destroys L1 cache. Luckily for us, -// in practice the low 2 bits of opcode are always 11, so we can drop them, and -// also func7 is always either 0, 1, 0x20 or don't care, so we can reduce func7 -// to 2 bits, which gets us to 10 bits, which is only 1k. -struct FastDecodeTable { - table: FastInstructionTable, -} - -impl Default for FastDecodeTable { - fn default() -> Self { - Self::new() - } -} - -impl FastDecodeTable { - fn new() -> Self { - let mut table: FastInstructionTable = [InsnKind::Invalid as u8; 1 << 10]; - for (isa_idx, insn) in RV32IM_ISA.iter().enumerate() { - Self::add_insn(&mut table, insn, isa_idx); - } - Self { table } - } - - // Map to 10 bit format - fn map10(opcode: u32, func3: u32, func7: u32) -> usize { - let op_high = opcode >> 2; - // Map 0 -> 0, 1 -> 1, 0x20 -> 2, everything else to 3 - let func72bits = if func7 <= 1 { - func7 - } else if func7 == 0x20 { - 2 - } else { - 3 - }; - ((op_high << 5) | (func72bits << 3) | func3) as usize - } - - fn add_insn(table: &mut FastInstructionTable, insn: &Instruction, isa_idx: usize) { - let op_high = insn.opcode >> 2; - if (insn.func3 as i32) < 0 { - for f3 in 0..8 { - for f7b in 0..4 { - let idx = (op_high << 5) | (f7b << 3) | f3; - table[idx as usize] = isa_idx as u8; - } - } - } else if (insn.func7 as i32) < 0 { - for f7b in 0..4 { - let idx = (op_high << 5) | (f7b << 3) | insn.func3; - table[idx as usize] = isa_idx as u8; - } - } else { - table[Self::map10(insn.opcode, insn.func3, insn.func7)] = isa_idx as u8; - } - } - - fn lookup(&self, decoded: &DecodedInstruction) -> Instruction { - let isa_idx = self.table[Self::map10(decoded.opcode, decoded.func3, decoded.func7)]; - RV32IM_ISA[isa_idx as usize] - } -} - -impl Emulator { - pub fn new() -> Self { - Self { - table: FastDecodeTable::new(), - } - } - - pub fn step(&mut self, ctx: &mut C) -> Result<()> { - let pc = ctx.get_pc(); - - if !ctx.check_insn_load(pc) { - ctx.trap(TrapCause::InstructionAccessFault)?; - return Ok(()); - } - - let word = ctx.load_memory(pc.waddr())?; - if word & 0x03 != 0x03 { - ctx.trap(TrapCause::IllegalInstruction(word))?; - return Ok(()); - } - - let decoded = DecodedInstruction::new(word); - let insn = self.table.lookup(&decoded); - ctx.on_insn_decoded(&insn, &decoded)?; - - if match insn.category { - InsnCategory::Compute => self.step_compute(ctx, insn.kind, &decoded)?, - InsnCategory::Load => self.step_load(ctx, insn.kind, &decoded)?, - InsnCategory::Store => self.step_store(ctx, insn.kind, &decoded)?, - InsnCategory::System => self.step_system(ctx, insn.kind, &decoded)?, - InsnCategory::Invalid => ctx.trap(TrapCause::IllegalInstruction(word))?, - } { - ctx.on_normal_end(&insn, &decoded)?; - }; - - Ok(()) - } - - fn step_compute( - &mut self, - ctx: &mut M, - kind: InsnKind, - decoded: &DecodedInstruction, - ) -> Result { - let pc = ctx.get_pc(); - let mut new_pc = pc + WORD_SIZE; - let mut rd = decoded.rd; - let rs1 = ctx.load_register(decoded.rs1 as usize)?; - let rs2 = ctx.load_register(decoded.rs2 as usize)?; - let imm_i = decoded.imm_i(); - let mut br_cond = |cond| -> u32 { - rd = 0; - if cond { - new_pc = pc.wrapping_add(decoded.imm_b()); - } - 0 - }; - let out = match kind { - InsnKind::Add => rs1.wrapping_add(rs2), - InsnKind::Sub => rs1.wrapping_sub(rs2), - InsnKind::Xor => rs1 ^ rs2, - InsnKind::Or => rs1 | rs2, - InsnKind::And => rs1 & rs2, - InsnKind::Sll => rs1 << (rs2 & 0x1f), - InsnKind::Srl => rs1 >> (rs2 & 0x1f), - InsnKind::Sra => ((rs1 as i32) >> (rs2 & 0x1f)) as u32, - InsnKind::Slt => { - if (rs1 as i32) < (rs2 as i32) { - 1 - } else { - 0 - } - } - InsnKind::SltU => { - if rs1 < rs2 { - 1 - } else { - 0 - } - } - InsnKind::AddI => rs1.wrapping_add(imm_i), - InsnKind::XorI => rs1 ^ imm_i, - InsnKind::OrI => rs1 | imm_i, - InsnKind::AndI => rs1 & imm_i, - InsnKind::SllI => rs1 << (imm_i & 0x1f), - InsnKind::SrlI => rs1 >> (imm_i & 0x1f), - InsnKind::SraI => ((rs1 as i32) >> (imm_i & 0x1f)) as u32, - InsnKind::SltI => { - if (rs1 as i32) < (imm_i as i32) { - 1 - } else { - 0 - } - } - InsnKind::SltIU => { - if rs1 < imm_i { - 1 - } else { - 0 - } - } - InsnKind::Beq => br_cond(rs1 == rs2), - InsnKind::Bne => br_cond(rs1 != rs2), - InsnKind::Blt => br_cond((rs1 as i32) < (rs2 as i32)), - InsnKind::Bge => br_cond((rs1 as i32) >= (rs2 as i32)), - InsnKind::BltU => br_cond(rs1 < rs2), - InsnKind::BgeU => br_cond(rs1 >= rs2), - InsnKind::Jal => { - new_pc = pc.wrapping_add(decoded.imm_j()); - (pc + WORD_SIZE).0 - } - InsnKind::JalR => { - new_pc = ByteAddr(rs1.wrapping_add(imm_i) & 0xfffffffe); - (pc + WORD_SIZE).0 - } - InsnKind::Lui => decoded.imm_u(), - InsnKind::Auipc => (pc.wrapping_add(decoded.imm_u())).0, - InsnKind::Mul => rs1.wrapping_mul(rs2), - InsnKind::MulH => { - (sign_extend_u32(rs1).wrapping_mul(sign_extend_u32(rs2)) >> 32) as u32 - } - InsnKind::MulHSU => (sign_extend_u32(rs1).wrapping_mul(rs2 as i64) >> 32) as u32, - InsnKind::MulHU => (((rs1 as u64).wrapping_mul(rs2 as u64)) >> 32) as u32, - InsnKind::Div => { - if rs2 == 0 { - u32::MAX - } else { - ((rs1 as i32).wrapping_div(rs2 as i32)) as u32 - } - } - InsnKind::DivU => { - if rs2 == 0 { - u32::MAX - } else { - rs1 / rs2 - } - } - InsnKind::Rem => { - if rs2 == 0 { - rs1 - } else { - ((rs1 as i32).wrapping_rem(rs2 as i32)) as u32 - } - } - InsnKind::RemU => { - if rs2 == 0 { - rs1 - } else { - rs1 % rs2 - } - } - _ => unreachable!(), - }; - if !new_pc.is_aligned() { - return ctx.trap(TrapCause::InstructionAddressMisaligned); - } - ctx.store_register(rd as usize, out)?; - ctx.set_pc(new_pc); - Ok(true) - } - - fn step_load( - &mut self, - ctx: &mut M, - kind: InsnKind, - decoded: &DecodedInstruction, - ) -> Result { - let rs1 = ctx.load_register(decoded.rs1 as usize)?; - let _rs2 = ctx.load_register(decoded.rs2 as usize)?; - let addr = ByteAddr(rs1.wrapping_add(decoded.imm_i())); - if !ctx.check_data_load(addr) { - return ctx.trap(TrapCause::LoadAccessFault(addr)); - } - let data = ctx.load_memory(addr.waddr())?; - let shift = 8 * (addr.0 & 3); - let out = match kind { - InsnKind::Lb => { - let mut out = (data >> shift) & 0xff; - if out & 0x80 != 0 { - out |= 0xffffff00; - } - out - } - InsnKind::Lh => { - if addr.0 & 0x01 != 0 { - return ctx.trap(TrapCause::LoadAddressMisaligned); - } - let mut out = (data >> shift) & 0xffff; - if out & 0x8000 != 0 { - out |= 0xffff0000; - } - out - } - InsnKind::Lw => { - if addr.0 & 0x03 != 0 { - return ctx.trap(TrapCause::LoadAddressMisaligned); - } - data - } - InsnKind::LbU => (data >> shift) & 0xff, - InsnKind::LhU => { - if addr.0 & 0x01 != 0 { - return ctx.trap(TrapCause::LoadAddressMisaligned); - } - (data >> shift) & 0xffff - } - _ => unreachable!(), - }; - ctx.store_register(decoded.rd as usize, out)?; - ctx.set_pc(ctx.get_pc() + WORD_SIZE); - Ok(true) - } - - fn step_store( - &mut self, - ctx: &mut M, - kind: InsnKind, - decoded: &DecodedInstruction, - ) -> Result { - let rs1 = ctx.load_register(decoded.rs1 as usize)?; - let rs2 = ctx.load_register(decoded.rs2 as usize)?; - let addr = ByteAddr(rs1.wrapping_add(decoded.imm_s())); - let shift = 8 * (addr.0 & 3); - if !ctx.check_data_store(addr) { - return ctx.trap(TrapCause::StoreAccessFault); - } - let mut data = ctx.load_memory(addr.waddr())?; - match kind { - InsnKind::Sb => { - data ^= data & (0xff << shift); - data |= (rs2 & 0xff) << shift; - } - InsnKind::Sh => { - if addr.0 & 0x01 != 0 { - tracing::debug!("Misaligned SH"); - return ctx.trap(TrapCause::StoreAddressMisaligned(addr)); - } - data ^= data & (0xffff << shift); - data |= (rs2 & 0xffff) << shift; - } - InsnKind::Sw => { - if addr.0 & 0x03 != 0 { - tracing::debug!("Misaligned SW"); - return ctx.trap(TrapCause::StoreAddressMisaligned(addr)); - } - data = rs2; - } - _ => unreachable!(), - } - ctx.store_memory(addr.waddr(), data)?; - ctx.set_pc(ctx.get_pc() + WORD_SIZE); - Ok(true) - } - - fn step_system( - &mut self, - ctx: &mut M, - kind: InsnKind, - decoded: &DecodedInstruction, - ) -> Result { - match kind { - InsnKind::Eany => match decoded.rs2 { - 0 => ctx.ecall(), - 1 => ctx.trap(TrapCause::Breakpoint), - _ => ctx.trap(TrapCause::IllegalInstruction(decoded.insn)), - }, - InsnKind::Mret => ctx.mret(), - _ => unreachable!(), - } - } -} - -fn sign_extend_u32(x: u32) -> i64 { - (x as i32) as i64 -} - -pub fn disasm(insn: &Instruction, decoded: &DecodedInstruction) -> String { - let (rd, rs1, rs2) = (decoded.rd, decoded.rs1, decoded.rs2); - match insn.kind { - InsnKind::Invalid => format!("illegal"), - InsnKind::Add => format!("add x{rd}, x{rs1}, x{rs2}"), - InsnKind::Sub => format!("sub x{rd}, x{rs1}, x{rs2}"), - InsnKind::Xor => format!("xor x{rd}, x{rs1}, x{rs2}"), - InsnKind::Or => format!("or x{rd}, x{rs1}, x{rs2}"), - InsnKind::And => format!("and x{rd}, x{rs1}, x{rs2}"), - InsnKind::Sll => format!("sll x{rd}, x{rs1}, x{rs2}"), - InsnKind::Srl => format!("srl x{rd}, x{rs1}, x{rs2}"), - InsnKind::Sra => format!("sra x{rd}, x{rs1}, x{rs2}"), - InsnKind::Slt => format!("slt x{rd}, x{rs1}, x{rs2}"), - InsnKind::SltU => format!("sltu x{rd}, x{rs1}, x{rs2}"), - InsnKind::AddI => format!("addi x{rd}, x{rs1}, {}", decoded.imm_i() as i32), - InsnKind::XorI => format!("xori x{rd}, x{rs1}, {}", decoded.imm_i() as i32), - InsnKind::OrI => format!("ori x{rd}, x{rs1}, {}", decoded.imm_i() as i32), - InsnKind::AndI => format!("andi x{rd}, x{rs1}, {}", decoded.imm_i() as i32), - InsnKind::SllI => format!("slli x{rd}, x{rs1}, {}", decoded.imm_i() as i32), - InsnKind::SrlI => format!("srli x{rd}, x{rs1}, {}", decoded.imm_i() as i32), - InsnKind::SraI => format!("srai x{rd}, x{rs1}, {}", decoded.imm_i() as i32), - InsnKind::SltI => format!("slti x{rd}, x{rs1}, {}", decoded.imm_i() as i32), - InsnKind::SltIU => format!("sltiu x{rd}, x{rs1}, {}", decoded.imm_i() as i32), - InsnKind::Beq => format!("beq x{rs1}, x{rs2}, {}", decoded.imm_b() as i32), - InsnKind::Bne => format!("bne x{rs1}, x{rs2}, {}", decoded.imm_b() as i32), - InsnKind::Blt => format!("blt x{rs1}, x{rs2}, {}", decoded.imm_b() as i32), - InsnKind::Bge => format!("bge x{rs1}, x{rs2}, {}", decoded.imm_b() as i32), - InsnKind::BltU => format!("bltu x{rs1}, x{rs2}, {}", decoded.imm_b() as i32), - InsnKind::BgeU => format!("bgeu x{rs1}, x{rs2}, {}", decoded.imm_b() as i32), - InsnKind::Jal => format!("jal x{rd}, {}", decoded.imm_j() as i32), - InsnKind::JalR => format!("jalr x{rd}, x{rs1}, {}", decoded.imm_i() as i32), - InsnKind::Lui => format!("lui x{rd}, {:#010x}", decoded.imm_u() >> 12), - InsnKind::Auipc => format!("auipc x{rd}, {:#010x}", decoded.imm_u() >> 12), - InsnKind::Mul => format!("mul x{rd}, x{rs1}, x{rs2}"), - InsnKind::MulH => format!("mulh x{rd}, x{rs1}, x{rs2}"), - InsnKind::MulHSU => format!("mulhsu x{rd}, x{rs1}, x{rs2}"), - InsnKind::MulHU => format!("mulhu x{rd}, x{rs1}, x{rs2}"), - InsnKind::Div => format!("div x{rd}, x{rs1}, x{rs2}"), - InsnKind::DivU => format!("divu x{rd}, x{rs1}, x{rs2}"), - InsnKind::Rem => format!("rem x{rd}, x{rs1}, x{rs2}"), - InsnKind::RemU => format!("remu x{rd}, x{rs1}, x{rs2}"), - InsnKind::Lb => format!("lb x{rd}, {}(x{rs1})", decoded.imm_i() as i32), - InsnKind::Lh => format!("lh x{rd}, {}(x{rs1})", decoded.imm_i() as i32), - InsnKind::Lw => format!("lw x{rd}, {}(x{rs1})", decoded.imm_i() as i32), - InsnKind::LbU => format!("lbu x{rd}, {}(x{rs1})", decoded.imm_i() as i32), - InsnKind::LhU => format!("lhu x{rd}, {}(x{rs1})", decoded.imm_i() as i32), - InsnKind::Sb => format!("sb x{rs2}, {}(x{rs1})", decoded.imm_i() as i32), - InsnKind::Sh => format!("sh x{rs2}, {}(x{rs1})", decoded.imm_i() as i32), - InsnKind::Sw => format!("sw x{rs2}, {}(x{rs1})", decoded.imm_i() as i32), - InsnKind::Eany => match decoded.rs2 { - 0 => format!("ecall"), - 1 => format!("ebreak"), - _ => format!("illegal eany"), - }, - InsnKind::Mret => format!("mret"), - } -} - -impl InsnKind { - pub fn major(&self) -> u8 { - (*self as u32 / 8) as u8 - } - - pub fn minor(&self) -> u8 { - (*self as u32 % 8) as u8 - } -} diff --git a/risc0/circuit/rv32im-v2/src/execute/segment.rs b/risc0/circuit/rv32im-v2/src/execute/segment.rs deleted file mode 100644 index 4f2f8719..00000000 --- a/risc0/circuit/rv32im-v2/src/execute/segment.rs +++ /dev/null @@ -1,56 +0,0 @@ -// Copyright 2024 RISC Zero, Inc. -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -use derive_more::Debug; -use risc0_binfmt::ExitCode; -use risc0_zkp::core::digest::Digest; -use serde::{Deserialize, Serialize}; - -use super::image::MemoryImage2; - -#[derive(Clone, Debug, Serialize, Deserialize)] -pub struct Segment { - /// Initial sparse memory state for the segment - pub partial_image: MemoryImage2, - - pub pre_digest: Digest, - - pub post_digest: Digest, - - /// Recorded host->guest IO, one entry per read - #[debug(skip)] - pub read_record: Vec>, - - /// Recorded rlen of guest->host IO, one entry per write - #[debug(skip)] - pub write_record: Vec, - - pub user_cycles: u32, - - /// Cycle at which we suspend - pub suspend_cycle: u32, - - /// Total paging cycles - pub paging_cycles: u32, - - pub po2: u32, - - pub exit_code: ExitCode, - - pub index: u64, - - pub input_digest: Digest, - - pub output_digest: Option, -} diff --git a/risc0/circuit/rv32im-v2/src/execute/syscall.rs b/risc0/circuit/rv32im-v2/src/execute/syscall.rs deleted file mode 100644 index 2033a816..00000000 --- a/risc0/circuit/rv32im-v2/src/execute/syscall.rs +++ /dev/null @@ -1,24 +0,0 @@ -// Copyright 2024 RISC Zero, Inc. -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -use anyhow::Result; - -/// A host-side implementation of a system call. -pub trait Syscall { - /// Reads from the host. - fn host_read(&self, fd: u32, buf: &mut [u8]) -> Result; - - /// Writes to the host. - fn host_write(&self, fd: u32, buf: &[u8]) -> Result; -} diff --git a/risc0/circuit/rv32im-v2/src/execute/tests.rs b/risc0/circuit/rv32im-v2/src/execute/tests.rs deleted file mode 100644 index ac0339fe..00000000 --- a/risc0/circuit/rv32im-v2/src/execute/tests.rs +++ /dev/null @@ -1,92 +0,0 @@ -// Copyright 2024 RISC Zero, Inc. -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -use risc0_binfmt::ExitCode; -use test_log::test; - -use super::{image::MemoryImage2, testutil, DEFAULT_SEGMENT_LIMIT_PO2}; - -// impl Syscall for BasicSyscall { -// fn syscall( -// &self, -// syscall: &str, -// ctx: &mut dyn SyscallContext, -// guest_buf: &mut [u32], -// ) -> Result<(u32, u32)> { -// self.state.borrow_mut().syscall = syscall.to_string(); -// let buf_ptr = ByteAddr(ctx.peek_register(REG_A4)?); -// let buf_len = ctx.peek_register(REG_A5)?; -// self.state.borrow_mut().from_guest = ctx.peek_region(buf_ptr, buf_len)?; -// let guest_buf_bytes: &mut [u8] = bytemuck::cast_slice_mut(guest_buf); -// let into_guest = &self.state.borrow().into_guest; -// guest_buf_bytes[..into_guest.len()].clone_from_slice(into_guest); -// Ok((0, 0)) -// } -// } - -#[test] -fn basic() { - let program = testutil::basic(); - let expected_cycles = program.image.len(); - let mut image = MemoryImage2::new(program); - let pre_image_id = *image.image_id(); - - println!("image_id: {pre_image_id}"); - - let result = testutil::execute( - image, - DEFAULT_SEGMENT_LIMIT_PO2, - testutil::DEFAULT_SESSION_LIMIT, - &testutil::NullSyscall, - None, - ) - .unwrap(); - - let segments = result.segments; - assert_eq!(segments.len(), 1); - let segment = segments.first().unwrap(); - assert_eq!(segment.pre_digest, pre_image_id); - assert_ne!(segment.post_digest, pre_image_id); - assert!(segment.read_record.is_empty()); - assert!(segment.write_record.is_empty()); - // FIXME - // assert_eq!(segment.user_cycles, expected_cycles as u32); - assert_eq!(segment.exit_code, ExitCode::Halted(0)); -} - -#[test] -fn system_split() { - let program = testutil::simple_loop(2000); - let mut image = MemoryImage2::new(program); - let pre_image_id = *image.image_id(); - - let result = testutil::execute( - image, - 13, - testutil::DEFAULT_SESSION_LIMIT, - &testutil::NullSyscall, - None, - ) - .unwrap(); - - let segments = result.segments; - assert_eq!(segments.len(), 2); - assert_eq!(segments[0].exit_code, ExitCode::SystemSplit); - assert_eq!(segments[0].pre_digest, pre_image_id); - assert_ne!(segments[0].post_digest, pre_image_id); - assert!(segments[0].read_record.is_empty()); - assert!(segments[0].write_record.is_empty()); - assert_eq!(segments[1].exit_code, ExitCode::Halted(0)); - assert_eq!(segments[1].pre_digest, segments[0].post_digest); -} diff --git a/risc0/circuit/rv32im-v2/src/execute/testutil.rs b/risc0/circuit/rv32im-v2/src/execute/testutil.rs deleted file mode 100644 index 2b368733..00000000 --- a/risc0/circuit/rv32im-v2/src/execute/testutil.rs +++ /dev/null @@ -1,182 +0,0 @@ -// Copyright 2024 RISC Zero, Inc. -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -use anyhow::{bail, Result}; -use risc0_binfmt::Program; -use risc0_zkp::{core::digest::Digest, MAX_CYCLES_PO2}; - -use super::{image::MemoryImage2, platform::*, syscall::Syscall, Executor, SimpleSession}; - -pub const DEFAULT_SESSION_LIMIT: Option = Some(1 << 24); -pub const MIN_CYCLES_PO2: usize = 8; - -#[derive(Default)] -pub struct NullSyscall; - -impl Syscall for NullSyscall { - fn host_read(&self, _fd: u32, _buf: &mut [u8]) -> Result { - unimplemented!() - } - - fn host_write(&self, _fd: u32, _buf: &[u8]) -> Result { - unimplemented!() - } -} - -pub fn execute( - image: MemoryImage2, - segment_limit_po2: usize, - max_cycles: Option, - syscall_handler: &S, - input_digest: Option, -) -> Result { - if !(MIN_CYCLES_PO2..=MAX_CYCLES_PO2).contains(&segment_limit_po2) { - bail!("Invalid segment_limit_po2: {segment_limit_po2}"); - } - - let mut segments = Vec::new(); - let trace = Vec::new(); - let result = Executor::new(image, syscall_handler, input_digest, trace).run( - segment_limit_po2, - max_cycles, - |segment| { - tracing::trace!("{segment:#?}"); - segments.push(segment); - Ok(()) - }, - )?; - - Ok(SimpleSession { segments, result }) -} - -/// Constructs a program from an iterator of instructions starting from an entrypoint. -fn program_from_instructions(entry: u32, instructions: impl IntoIterator) -> Program { - let mut pc = entry; - - Program { - entry, - image: instructions - .into_iter() - .map(|instr| { - let result = (pc, instr); - pc += WORD_SIZE as u32; - result - }) - .collect(), - } -} - -pub fn basic() -> Program { - program_from_instructions( - USER_START_ADDR.0, - [ - lui(REG_T1, 0x1234b), - lui(REG_T2, 0xf387e), - add(REG_T0, REG_T1, REG_T2), - lui(REG_A1, 0x4), - ecall(), - ], - ) -} - -pub fn simple_loop(count: u32) -> Program { - // loop.asm: - // - // .global _boot - // .text - // - // _boot: - // li a4,0 - // li a5,100 - // loop: - // addi a4,a4,1 - // blt a4,a5,loop - // lui a1,0x1000 - // ecall - // - // riscv32-unknown-elf-as loop.asm -o loop; riscv32-unknown-elf-objdump -d loop - - // sign extend low 12 bits - let low = ((count as i32) << 20) >> 20; - // upper 20 bits - let high = ((count as i32 - low) >> 12); - tracing::debug!("{count:#010x}: ({high:#010x}, {low:#010x})"); - - program_from_instructions( - USER_START_ADDR.0, - [ - addi(REG_A4, REG_ZERO, 0), - lui(REG_A5, high as u32), - addi(REG_A5, REG_A5, low as u32), - // loop: - addi(REG_A4, REG_A4, 1), - blt(REG_A4, REG_A5, -4 /*loop: */), - lui(REG_A1, 0x1000), - ecall(), - ], - ) -} - -// 31 25 | 24 20 | 19 15 | 14 12 | 11 7 | 6 0 | -// funct7 | rs2 | rs1 | funct3 | rd | opcode | -fn insn_r(funct7: u32, rs2: u32, rs1: u32, funct3: u32, rd: u32, opcode: u32) -> u32 { - (funct7 << 25) | (rs2 << 20) | (rs1 << 15) | (funct3 << 12) | (rd << 7) | opcode -} - -// 31 20 | 19 15 | 14 12 | 11 7 | 6 0 | -// imm[11:0] | rs1 | funct3 | rd | opcode | -fn insn_i(imm: u32, rs1: u32, funct3: u32, rd: u32, opcode: u32) -> u32 { - (imm << 20) | (rs1 << 15) | (funct3 << 12) | (rd << 7) | opcode -} - -// 31 25 | 24 20 | 19 15 | 14 12 | 11 7 | 6 0 | -// imm[12|10:5] | rs2 | rs1 | funct3 | imm[4:1|11] | opcode | -fn insn_b(imm: u32, rs2: u32, rs1: u32, funct3: u32, opcode: u32) -> u32 { - let imm_12 = (imm >> 12) & 0b1; - let imm_10_5 = (imm >> 5) & 0b111111; - let imm_11 = (imm >> 11) & 0b1; - let imm_4_1 = (imm >> 1) & 0b1111; - ((imm_12 << 6 | imm_10_5) << 25) - | (rs2 << 20) - | (rs1 << 15) - | (funct3 << 12) - | ((imm_4_1 << 1 | imm_11) << 7) - | opcode -} - -// 31 12 | 11 7 | 6 0 | -// imm[31:12] | rd | opcode | -fn insn_u(imm: u32, rd: u32, opcode: u32) -> u32 { - (imm << 12) | rd << 7 | opcode -} - -fn add(rd: usize, rs1: usize, rs2: usize) -> u32 { - insn_r(0x00, rs2 as u32, rs1 as u32, 0x0, rd as u32, 0b0110011) -} - -fn addi(rd: usize, rs1: usize, imm: u32) -> u32 { - insn_i(imm, rs1 as u32, 0x0, rd as u32, 0b0010011) -} - -fn blt(rs1: usize, rs2: usize, offset: i32) -> u32 { - insn_b(offset as u32, rs2 as u32, rs1 as u32, 0x4, 0b1100011) -} - -fn ecall() -> u32 { - insn_i(0x0, 0x0, 0x0, 0x0, 0b1110011) -} - -fn lui(rd: usize, imm: u32) -> u32 { - insn_u(imm, rd as u32, 0b0110111) -} diff --git a/risc0/circuit/rv32im-v2/src/execute/trace.rs b/risc0/circuit/rv32im-v2/src/execute/trace.rs deleted file mode 100644 index 1fa3a9ad..00000000 --- a/risc0/circuit/rv32im-v2/src/execute/trace.rs +++ /dev/null @@ -1,67 +0,0 @@ -// Copyright 2024 RISC Zero, Inc. -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -use anyhow::Result; -use derive_more::Debug; -use serde::{Deserialize, Serialize}; - -/// An event traced from the running VM. -#[derive(Clone, Debug, Eq, Ord, PartialEq, PartialOrd, Serialize, Deserialize)] -pub enum TraceEvent { - /// An instruction has started at the given program counter - InstructionStart { - /// Cycle number since startup - cycle: u64, - - /// Program counter of the instruction being executed - #[debug("{pc:#010x}")] - pc: u32, - - /// Encoded instruction being executed. - #[debug("{pc:#010x}")] - insn: u32, - }, - - /// A register has been set - RegisterSet { - /// Register ID (0-16) - idx: usize, - - /// New value in the register - #[debug("{value:#010x}")] - value: u32, - }, - - /// A memory location has been written - MemorySet { - /// Address of memory that's been written - #[debug("{addr:#010x}")] - addr: u32, - - /// Data that's been written - #[debug("{region:#04x?}")] - region: Vec, - }, -} - -/// A callback used to collect [TraceEvent]s. -pub trait TraceCallback { - fn trace_callback(&mut self, event: TraceEvent) -> Result<()>; -} - -impl Result<()>> TraceCallback for F { - fn trace_callback(&mut self, event: TraceEvent) -> Result<()> { - self(event) - } -} diff --git a/risc0/circuit/rv32im-v2/src/lib.rs b/risc0/circuit/rv32im-v2/src/lib.rs deleted file mode 100644 index b222f360..00000000 --- a/risc0/circuit/rv32im-v2/src/lib.rs +++ /dev/null @@ -1,23 +0,0 @@ -// Copyright 2024 RISC Zero, Inc. -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#![allow(unused)] - -#[cfg(feature = "execute")] -pub mod execute; -#[cfg(feature = "prove")] -pub mod prove; -// #[cfg(test)] -// mod riscv_tests; -mod zirgen; diff --git a/risc0/circuit/rv32im-v2/src/prove/hal/cpu.rs b/risc0/circuit/rv32im-v2/src/prove/hal/cpu.rs deleted file mode 100644 index e0d371c7..00000000 --- a/risc0/circuit/rv32im-v2/src/prove/hal/cpu.rs +++ /dev/null @@ -1,228 +0,0 @@ -// Copyright 2024 RISC Zero, Inc. -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -use std::rc::Rc; - -use anyhow::Result; -use rayon::prelude::*; -use risc0_circuit_rv32im_v2_sys::{ - risc0_circuit_rv32im_v2_cpu_accum, risc0_circuit_rv32im_v2_cpu_poly_fp, - risc0_circuit_rv32im_v2_cpu_witgen, RawAccumBuffers, RawBuffer, RawExecBuffers, - RawPreflightTrace, -}; -use risc0_core::scope; -use risc0_sys::ffi_wrap; -use risc0_zkp::{ - core::{hash::poseidon2::Poseidon2HashSuite, log2_ceil}, - field::{map_pow, Elem, ExtElem as _, RootsOfUnity as _}, - hal::{cpu::CpuBuffer, AccumPreflight, CircuitHal}, - INV_RATE, -}; - -use super::{ - CircuitAccumulator, CircuitWitnessGenerator, MetaBuffer, SegmentProver, SegmentProverImpl, - StepMode, -}; -use crate::{ - prove::{witgen::preflight::PreflightTrace, GLOBAL_MIX, GLOBAL_OUT}, - zirgen::{ - circuit::{ - CircuitField, ExtVal, Val, REGISTER_GROUP_ACCUM, REGISTER_GROUP_CODE, - REGISTER_GROUP_DATA, - }, - info::POLY_MIX_POWERS, - }, -}; - -type CpuHal = risc0_zkp::hal::cpu::CpuHal; - -#[derive(Default)] -pub struct CpuCircuitHal; - -impl CpuCircuitHal { - pub fn new() -> Self { - Self - } -} - -impl CircuitWitnessGenerator for CpuCircuitHal { - fn generate_witness( - &self, - mode: StepMode, - preflight: &PreflightTrace, - global: &MetaBuffer, - data: &MetaBuffer, - ) -> Result<()> { - scope!("cpu_witgen"); - let cycles = preflight.cycles.len(); - tracing::debug!("witgen: {cycles}"); - let global_buf = global.buf.as_slice(); - let data_buf = data.buf.as_slice(); - let buffers = RawExecBuffers { - global: RawBuffer { - buf: global_buf.as_ptr(), - rows: global.rows, - cols: global.cols, - checked_reads: global.checked_reads, - }, - data: RawBuffer { - buf: data_buf.as_ptr(), - rows: data.rows, - cols: data.cols, - checked_reads: data.checked_reads, - }, - }; - let preflight = RawPreflightTrace { - cycles: preflight.cycles.as_ptr(), - txns: preflight.txns.as_ptr(), - txns_len: preflight.txns.len() as u32, - table_split_cycle: preflight.table_split_cycle, - }; - ffi_wrap(|| unsafe { - risc0_circuit_rv32im_v2_cpu_witgen(mode as u32, &buffers, &preflight, cycles as u32) - }) - } -} - -impl CircuitAccumulator for CpuCircuitHal { - fn step_accum( - &self, - preflight: &PreflightTrace, - data: &MetaBuffer, - accum: &MetaBuffer, - mix: &MetaBuffer, - ) -> Result<()> { - scope!("accumulate"); - let cycles = preflight.cycles.len(); - tracing::debug!("accumulate: {cycles}"); - let data_buf = data.buf.as_slice(); - let accum_buf = accum.buf.as_slice(); - let mix_buf = mix.buf.as_slice(); - let buffers = RawAccumBuffers { - data: RawBuffer { - buf: data_buf.as_ptr(), - rows: data.rows, - cols: data.cols, - checked_reads: data.checked_reads, - }, - accum: RawBuffer { - buf: accum_buf.as_ptr(), - rows: accum.rows, - cols: accum.cols, - checked_reads: accum.checked_reads, - }, - mix: RawBuffer { - buf: mix_buf.as_ptr(), - rows: mix.rows, - cols: mix.cols, - checked_reads: mix.checked_reads, - }, - }; - let preflight = RawPreflightTrace { - cycles: preflight.cycles.as_ptr(), - txns: preflight.txns.as_ptr(), - txns_len: preflight.txns.len() as u32, - table_split_cycle: preflight.table_split_cycle, - }; - ffi_wrap(|| unsafe { - risc0_circuit_rv32im_v2_cpu_accum(&buffers, &preflight, cycles as u32) - }) - } -} - -impl CircuitHal for CpuCircuitHal { - fn eval_check( - &self, - check: &CpuBuffer, - groups: &[&CpuBuffer], - globals: &[&CpuBuffer], - poly_mix: ExtVal, - po2: usize, - steps: usize, - ) { - scope!("eval_check"); - - const EXP_PO2: usize = log2_ceil(INV_RATE); - let domain = steps * INV_RATE; - let poly_mix_pows = map_pow(poly_mix, POLY_MIX_POWERS); - - // SAFETY: Convert a borrow of a cell into a raw const slice so that we can pass - // it over the thread boundary. This should be safe because the scope of the - // usage is within this function and each thread access will not overlap with - // each other. - - let code = groups[REGISTER_GROUP_CODE].as_slice(); - let data = groups[REGISTER_GROUP_DATA].as_slice(); - let accum = groups[REGISTER_GROUP_ACCUM].as_slice(); - let mix = globals[GLOBAL_MIX].as_slice(); - let out = globals[GLOBAL_OUT].as_slice(); - let check = check.as_slice(); - - let code = unsafe { std::slice::from_raw_parts(code.as_ptr(), code.len()) }; - let data = unsafe { std::slice::from_raw_parts(data.as_ptr(), data.len()) }; - let accum = unsafe { std::slice::from_raw_parts(accum.as_ptr(), accum.len()) }; - let mix = unsafe { std::slice::from_raw_parts(mix.as_ptr(), mix.len()) }; - let out = unsafe { std::slice::from_raw_parts(out.as_ptr(), out.len()) }; - let check = unsafe { std::slice::from_raw_parts(check.as_ptr(), check.len()) }; - let poly_mix_pows = poly_mix_pows.as_slice(); - - let args: &[&[Val]] = &[accum, data, out, mix]; - - (0..domain).into_par_iter().for_each(|cycle| { - let args: Vec<*const Val> = args.iter().map(|x| (*x).as_ptr()).collect(); - let mut tot = ExtVal::ZERO; - unsafe { - risc0_circuit_rv32im_v2_cpu_poly_fp( - cycle, - domain, - poly_mix_pows.as_ptr(), - args.as_ptr(), - &mut tot, - ) - }; - let x = Val::ROU_FWD[po2 + EXP_PO2].pow(cycle); - // TODO: what is this magic number 3? - let y = (Val::new(3) * x).pow(1 << po2); - let ret = tot * (y - Val::new(1)).inv(); - - // SAFETY: This conversion is to make the check slice mutable, which should be - // safe because each thread access will not overlap with each other. - let check = - unsafe { std::slice::from_raw_parts_mut(check.as_ptr() as *mut Val, check.len()) }; - for i in 0..ExtVal::EXT_SIZE { - check[i * domain + cycle] = ret.elems()[i]; - } - }); - } - - fn accumulate( - &self, - _preflight: &AccumPreflight, - _ctrl: &CpuBuffer, - _global: &CpuBuffer, - _data: &CpuBuffer, - _mix: &CpuBuffer, - _accum: &CpuBuffer, - _steps: usize, - ) { - unimplemented!() - } -} - -pub fn segment_prover() -> Result> { - let suite = Poseidon2HashSuite::new_suite(); - let hal = Rc::new(CpuHal::new(suite)); - let circuit_hal = Rc::new(CpuCircuitHal::new()); - Ok(Box::new(SegmentProverImpl::new(hal, circuit_hal))) -} diff --git a/risc0/circuit/rv32im-v2/src/prove/hal/cuda.rs b/risc0/circuit/rv32im-v2/src/prove/hal/cuda.rs deleted file mode 100644 index 263f1ad7..00000000 --- a/risc0/circuit/rv32im-v2/src/prove/hal/cuda.rs +++ /dev/null @@ -1,264 +0,0 @@ -// Copyright 2024 RISC Zero, Inc. -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -use std::rc::Rc; - -use anyhow::Result; -use risc0_circuit_rv32im_v2_sys::{ - risc0_circuit_rv32im_v2_cpu_accum, risc0_circuit_rv32im_v2_cuda_eval_check, - risc0_circuit_rv32im_v2_cuda_witgen, RawAccumBuffers, RawBuffer, RawExecBuffers, - RawPreflightTrace, -}; -use risc0_core::{ - field::{map_pow, Elem, RootsOfUnity}, - scope, -}; -use risc0_sys::ffi_wrap; -use risc0_zkp::{ - core::log2_ceil, - field::ExtElem as _, - hal::{ - cuda::{BufferImpl as CudaBuffer, CudaHal, CudaHalPoseidon2, CudaHash, CudaHashPoseidon2}, - AccumPreflight, Buffer, CircuitHal, Hal, - }, - INV_RATE, -}; - -use crate::{ - prove::{SegmentProver, GLOBAL_MIX, GLOBAL_OUT}, - zirgen::{ - circuit::{ExtVal, Val, REGISTER_GROUP_ACCUM, REGISTER_GROUP_CODE, REGISTER_GROUP_DATA}, - info::{NUM_POLY_MIX_POWERS, POLY_MIX_POWERS}, - }, -}; - -use super::{ - CircuitAccumulator, CircuitWitnessGenerator, MetaBuffer, PreflightTrace, SegmentProverImpl, - StepMode, -}; - -pub struct CudaCircuitHal { - hal: Rc>, // retain a reference to ensure the context remains valid -} - -impl CudaCircuitHal { - pub fn new(hal: Rc>) -> Self { - Self { hal } - } -} - -impl CircuitWitnessGenerator> for CudaCircuitHal { - fn generate_witness( - &self, - mode: StepMode, - preflight: &PreflightTrace, - global: &MetaBuffer>, - data: &MetaBuffer>, - ) -> Result<()> { - scope!("witgen"); - - let cycles = preflight.cycles.len(); - assert_eq!(cycles, data.rows); - tracing::debug!("witgen: {cycles}"); - - let global_ptr = global.buf.as_device_ptr(); - let data_ptr = data.buf.as_device_ptr(); - let buffers = RawExecBuffers { - global: RawBuffer { - buf: global_ptr.as_ptr() as *const Val, - rows: global.rows, - cols: global.cols, - checked_reads: global.checked_reads, - }, - data: RawBuffer { - buf: data_ptr.as_ptr() as *const Val, - rows: data.rows, - cols: data.cols, - checked_reads: data.checked_reads, - }, - }; - - let preflight = RawPreflightTrace { - cycles: preflight.cycles.as_ptr(), - txns: preflight.txns.as_ptr(), - txns_len: preflight.txns.len() as u32, - table_split_cycle: preflight.table_split_cycle, - }; - ffi_wrap(|| unsafe { - risc0_circuit_rv32im_v2_cuda_witgen(mode as u32, &buffers, &preflight, cycles as u32) - }) - } -} - -impl CircuitAccumulator> for CudaCircuitHal { - fn step_accum( - &self, - preflight: &PreflightTrace, - data: &MetaBuffer>, - accum: &MetaBuffer>, - mix: &MetaBuffer>, - ) -> Result<()> { - scope!("accumulate"); - - let cycles = preflight.cycles.len(); - tracing::debug!("accumulate: {cycles}"); - - let data_vec = data.buf.to_vec(); - let accum_vec = accum.buf.to_vec(); - let mix_vec = mix.buf.to_vec(); - let buffers = RawAccumBuffers { - data: RawBuffer { - buf: data_vec.as_ptr(), - rows: data.rows, - cols: data.cols, - checked_reads: data.checked_reads, - }, - accum: RawBuffer { - buf: accum_vec.as_ptr(), - rows: accum.rows, - cols: accum.cols, - checked_reads: accum.checked_reads, - }, - mix: RawBuffer { - buf: mix_vec.as_ptr(), - rows: mix.rows, - cols: mix.cols, - checked_reads: mix.checked_reads, - }, - }; - let preflight = RawPreflightTrace { - cycles: preflight.cycles.as_ptr(), - txns: preflight.txns.as_ptr(), - txns_len: preflight.txns.len() as u32, - table_split_cycle: preflight.table_split_cycle, - }; - let result = ffi_wrap(|| unsafe { - risc0_circuit_rv32im_v2_cpu_accum(&buffers, &preflight, cycles as u32) - }); - data.buf.view_mut(|view| { - view.copy_from_slice(&data_vec); - }); - accum.buf.view_mut(|view| { - view.copy_from_slice(&accum_vec); - }); - mix.buf.view_mut(|view| { - view.copy_from_slice(&mix_vec); - }); - result - } -} - -impl CircuitHal> for CudaCircuitHal { - fn accumulate( - &self, - _preflight: &AccumPreflight, - _ctrl: &CudaBuffer, - _io: &CudaBuffer, - _data: &CudaBuffer, - _mix: &CudaBuffer, - _accum: &CudaBuffer, - _steps: usize, - ) { - } - - fn eval_check( - &self, - check: &CudaBuffer, - groups: &[&CudaBuffer], - globals: &[&CudaBuffer], - poly_mix: ExtVal, - po2: usize, - steps: usize, - ) { - scope!("eval_check"); - - let accum = groups[REGISTER_GROUP_ACCUM]; - let ctrl = groups[REGISTER_GROUP_CODE]; - let data = groups[REGISTER_GROUP_DATA]; - let mix = globals[GLOBAL_MIX]; - let out = globals[GLOBAL_OUT]; - tracing::debug!( - "check: {}, ctrl: {}, data: {}, accum: {}, mix: {} out: {}", - check.size(), - ctrl.size(), - data.size(), - accum.size(), - mix.size(), - out.size() - ); - tracing::debug!( - "total: {}", - (check.size() + ctrl.size() + data.size() + accum.size() + mix.size() + out.size()) * 4 - ); - - const EXP_PO2: usize = log2_ceil(INV_RATE); - let domain = steps * INV_RATE; - let rou = Val::ROU_FWD[po2 + EXP_PO2]; - - tracing::debug!("steps: {steps}, domain: {domain}, po2: {po2}, rou: {rou:?}"); - let poly_mix_pows = map_pow(poly_mix, POLY_MIX_POWERS); - let poly_mix_pows: &[u32; ExtVal::EXT_SIZE * NUM_POLY_MIX_POWERS] = - ExtVal::as_u32_slice(poly_mix_pows.as_slice()) - .try_into() - .unwrap(); - - ffi_wrap(|| unsafe { - risc0_circuit_rv32im_v2_cuda_eval_check( - check.as_device_ptr(), - ctrl.as_device_ptr(), - data.as_device_ptr(), - accum.as_device_ptr(), - mix.as_device_ptr(), - out.as_device_ptr(), - &rou as *const Val, - po2 as u32, - domain as u32, - poly_mix_pows.as_ptr(), - ) - }) - .unwrap(); - } -} - -pub type CudaCircuitHalPoseidon2 = CudaCircuitHal; - -pub fn segment_prover() -> Result> { - let hal = Rc::new(CudaHalPoseidon2::new()); - let circuit_hal = Rc::new(CudaCircuitHalPoseidon2::new(hal.clone())); - Ok(Box::new(SegmentProverImpl::new(hal, circuit_hal))) -} - -// #[cfg(test)] -// mod tests { -// use std::rc::Rc; - -// use risc0_core::field::baby_bear::BabyBear; -// use risc0_zkp::{ -// core::hash::sha::Sha256HashSuite, -// hal::{cpu::CpuHal, cuda::CudaHalSha256}, -// }; -// use test_log::test; - -// use crate::prove::hal::cpu::CpuCircuitHal; - -// #[test] -// fn eval_check() { -// const PO2: usize = 4; -// let cpu_hal: CpuHal = CpuHal::new(Sha256HashSuite::new_suite()); -// let cpu_eval = CpuCircuitHal; -// let gpu_hal = Rc::new(CudaHalSha256::new()); -// let gpu_eval = super::CudaCircuitHal::new(gpu_hal.clone()); -// crate::prove::testutil::eval_check(&cpu_hal, cpu_eval, gpu_hal.as_ref(), gpu_eval, PO2); -// } -// } diff --git a/risc0/circuit/rv32im-v2/src/prove/hal/mod.rs b/risc0/circuit/rv32im-v2/src/prove/hal/mod.rs deleted file mode 100644 index d7197d0c..00000000 --- a/risc0/circuit/rv32im-v2/src/prove/hal/mod.rs +++ /dev/null @@ -1,215 +0,0 @@ -// Copyright 2024 RISC Zero, Inc. -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -pub(crate) mod cpu; -#[cfg(feature = "cuda")] -pub(crate) mod cuda; - -use std::rc::Rc; - -use anyhow::Result; -use rand::thread_rng; -use risc0_core::scope; -use risc0_zkp::{ - adapter::{CircuitInfo as _, PROOF_SYSTEM_INFO}, - field::Elem as _, - hal::{AccumPreflight, Buffer, CircuitHal, Hal}, - prove::Prover, -}; - -use super::{ - witgen::{preflight::PreflightTrace, WitnessGenerator}, - Seal, SegmentProver, -}; -use crate::{ - execute::segment::Segment, - zirgen::{ - circuit::{ - CircuitField, ExtVal, Val, REGCOUNT_ACCUM, REGCOUNT_MIX, REGISTER_GROUP_ACCUM, - REGISTER_GROUP_CODE, REGISTER_GROUP_DATA, - }, - taps::TAPSET, - CircuitImpl, - }, -}; - -pub(crate) struct MetaBuffer { - pub buf: H::Buffer, - pub rows: usize, - pub cols: usize, - pub checked_reads: bool, -} - -impl MetaBuffer -where - H: Hal, -{ - pub fn new(name: &'static str, hal: &H, rows: usize, cols: usize, checked_reads: bool) -> Self { - let buf = hal.alloc_elem_init(name, rows * cols, Val::INVALID); - Self { - buf, - rows, - cols, - checked_reads, - } - } - - #[cfg(test)] - pub fn to_vec(&self) -> Vec { - self.buf.to_vec() - } -} - -#[derive(Clone, Copy, PartialEq)] -pub(crate) enum StepMode { - Parallel, - #[cfg(test)] - SeqForward, - #[cfg(test)] - SeqReverse, -} - -pub(crate) trait CircuitWitnessGenerator { - fn generate_witness( - &self, - mode: StepMode, - preflight: &PreflightTrace, - global: &MetaBuffer, - data: &MetaBuffer, - ) -> Result<()>; -} - -pub(crate) trait CircuitAccumulator { - fn step_accum( - &self, - preflight: &PreflightTrace, - data: &MetaBuffer, - accum: &MetaBuffer, - mix: &MetaBuffer, - ) -> Result<()>; -} - -pub(crate) struct SegmentProverImpl -where - H: Hal, - C: CircuitHal + CircuitWitnessGenerator, -{ - hal: Rc, - circuit_hal: Rc, -} - -impl SegmentProverImpl -where - H: Hal, - C: CircuitHal + CircuitWitnessGenerator, -{ - pub fn new(hal: Rc, circuit_hal: Rc) -> Self { - Self { hal, circuit_hal } - } -} - -impl SegmentProver for SegmentProverImpl -where - H: Hal, - C: CircuitHal + CircuitWitnessGenerator + CircuitAccumulator, -{ - fn prove(&self, segment: &Segment) -> Result { - scope!("prove"); - - let mut rng = thread_rng(); - let rand_z = ExtVal::random(&mut rng); - - let witgen = WitnessGenerator::new( - self.hal.as_ref(), - self.circuit_hal.as_ref(), - segment, - StepMode::Parallel, - rand_z, - )?; - - let code = &witgen.code.buf; - let data = &witgen.data.buf; - let global = &witgen.global.buf; - - Ok(scope!("prove", { - tracing::debug!("prove"); - - let mut prover = Prover::new(self.hal.as_ref(), TAPSET); - let hashfn = &self.hal.get_hash_suite().hashfn; - - let mix = scope!("main", { - // At the start of the protocol, seed the Fiat-Shamir transcript with context information - // about the proof system and circuit. - prover - .iop() - .commit(&hashfn.hash_elem_slice(&PROOF_SYSTEM_INFO.encode())); - prover - .iop() - .commit(&hashfn.hash_elem_slice(&CircuitImpl::CIRCUIT_INFO.encode())); - - // Concat globals and po2 into a vector. - let global_len = global.size(); - let mut header = vec![Val::ZERO; global_len + 1]; - global.view_mut(|view| { - for (i, elem) in view.iter_mut().enumerate() { - *elem = elem.valid_or_zero(); - header[i] = *elem; - } - header[global_len] = Val::new_raw(segment.po2); - }); - - let header_digest = hashfn.hash_elem_slice(&header); - prover.iop().commit(&header_digest); - prover.iop().write_field_elem_slice(header.as_slice()); - prover.set_po2(segment.po2 as usize); - - prover.commit_group(REGISTER_GROUP_CODE, code); - prover.commit_group(REGISTER_GROUP_DATA, data); - - // Make the mixing values - let mix: [Val; REGCOUNT_MIX] = std::array::from_fn(|_| prover.iop().random_elem()); - let mix = MetaBuffer { - buf: self.hal.copy_from_elem("mix", mix.as_slice()), - rows: 1, - cols: REGCOUNT_MIX, - checked_reads: true, - }; - - let accum = scope!( - "alloc(accum)", - MetaBuffer::new( - "accum", - self.hal.as_ref(), - witgen.cycles, - REGCOUNT_ACCUM, - true - ) - ); - - self.circuit_hal - .step_accum(&witgen.trace, &witgen.data, &accum, &mix)?; - - scope!("zeroize(accum)", { - self.hal.eltwise_zeroize_elem(&accum.buf); - }); - - prover.commit_group(REGISTER_GROUP_ACCUM, &accum.buf); - - mix - }); - - prover.finalize(&[&mix.buf, global], self.circuit_hal.as_ref()) - })) - } -} diff --git a/risc0/circuit/rv32im-v2/src/prove/mod.rs b/risc0/circuit/rv32im-v2/src/prove/mod.rs deleted file mode 100644 index 15e57d33..00000000 --- a/risc0/circuit/rv32im-v2/src/prove/mod.rs +++ /dev/null @@ -1,59 +0,0 @@ -// Copyright 2024 RISC Zero, Inc. -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -mod hal; -#[cfg(test)] -mod tests; -mod witgen; - -use anyhow::Result; -use cfg_if::cfg_if; -use risc0_zkp::core::{digest::Digest, hash::poseidon2::Poseidon2HashSuite}; - -use crate::{execute::segment::Segment, zirgen::CircuitImpl}; - -const GLOBAL_MIX: usize = 0; -const GLOBAL_OUT: usize = 1; - -pub type Seal = Vec; - -pub trait SegmentProver { - fn prove(&self, segment: &Segment) -> Result; - - fn verify(&self, seal: &Seal) -> Result<()> { - let hash_suite = Poseidon2HashSuite::new_suite(); - - // We don't have a `code' buffer to verify. - let check_code_fn = |_: u32, _: &Digest| Ok(()); - - Ok(risc0_zkp::verify::verify( - &CircuitImpl, - &hash_suite, - seal, - check_code_fn, - )?) - } -} - -pub fn segment_prover() -> Result> { - cfg_if! { - if #[cfg(feature = "cuda")] { - self::hal::cuda::segment_prover() - // } else if #[cfg(any(all(target_os = "macos", target_arch = "aarch64"), target_os = "ios"))] { - // self::hal::metal::segment_prover(hashfn) - } else { - self::hal::cpu::segment_prover() - } - } -} diff --git a/risc0/circuit/rv32im-v2/src/prove/tests.rs b/risc0/circuit/rv32im-v2/src/prove/tests.rs deleted file mode 100644 index bc98062d..00000000 --- a/risc0/circuit/rv32im-v2/src/prove/tests.rs +++ /dev/null @@ -1,52 +0,0 @@ -// Copyright 2024 RISC Zero, Inc. -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -use std::rc::Rc; - -use rand::thread_rng; -use risc0_binfmt::Program; -use risc0_zkp::{ - core::hash::poseidon2::Poseidon2HashSuite, - field::{baby_bear::BabyBearExtElem, Elem as _}, - hal::cpu::CpuHal, -}; -use test_log::test; - -use super::{hal::StepMode, segment_prover}; -use crate::{ - execute::{image::MemoryImage2, testutil, DEFAULT_SEGMENT_LIMIT_PO2}, - prove::witgen::WitnessGenerator, - zirgen::circuit::REGCOUNT_DATA, -}; - -#[test] -fn basic() { - let program = testutil::basic(); - let image = MemoryImage2::new(program); - - let result = testutil::execute( - image, - DEFAULT_SEGMENT_LIMIT_PO2, - testutil::DEFAULT_SESSION_LIMIT, - &testutil::NullSyscall, - None, - ) - .unwrap(); - let segments = result.segments; - let segment = segments.first().unwrap(); - - let prover = segment_prover().unwrap(); - let seal = prover.prove(segment).unwrap(); - prover.verify(&seal).unwrap(); -} diff --git a/risc0/circuit/rv32im-v2/src/prove/witgen/mod.rs b/risc0/circuit/rv32im-v2/src/prove/witgen/mod.rs deleted file mode 100644 index 31be6ec3..00000000 --- a/risc0/circuit/rv32im-v2/src/prove/witgen/mod.rs +++ /dev/null @@ -1,221 +0,0 @@ -// Copyright 2024 RISC Zero, Inc. -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -pub(crate) mod poseidon2; -pub(crate) mod preflight; -#[cfg(test)] -mod tests; - -use std::iter::zip; - -use anyhow::{Context, Result}; -use num_traits::FromPrimitive as _; -use preflight::PreflightTrace; -use risc0_circuit_rv32im_v2_sys::RawPreflightCycle; -use risc0_core::scope; -use risc0_zkp::{core::digest::DIGEST_WORDS, field::Elem as _, hal::Hal}; - -use self::{poseidon2::Poseidon2State, preflight::Back}; -use super::hal::{CircuitWitnessGenerator, MetaBuffer, StepMode}; -use crate::{ - execute::{ - addr::WordAddr, - platform::{CycleState, LOOKUP_TABLE_CYCLES, MERKLE_TREE_END_ADDR}, - segment::Segment, - }, - zirgen::circuit::{ - CircuitField, ExtVal, Val, LAYOUT_GLOBAL, LAYOUT_TOP, REGCOUNT_CODE, REGCOUNT_DATA, - REGCOUNT_GLOBAL, - }, -}; - -pub(crate) struct WitnessGenerator { - pub cycles: usize, - pub global: MetaBuffer, - pub code: MetaBuffer, - pub data: MetaBuffer, - pub trace: PreflightTrace, -} - -impl WitnessGenerator { - pub fn new( - hal: &H, - circuit_hal: &C, - segment: &Segment, - mode: StepMode, - rand_z: ExtVal, - ) -> Result - where - H: Hal, - C: CircuitWitnessGenerator, - { - scope!("witgen"); - - let trace = segment.preflight(rand_z)?; - let cycles = trace.cycles.len(); - - tracing::trace!("{segment:#?}"); - tracing::trace!("{trace:#?}"); - - // assert_eq!( - // segment.suspend_cycle + segment.paging_cycles + LOOKUP_TABLE_CYCLES as u32 + 1, - // cycles as u32, - // "suspend_cycle: {} + paging_cycles: {} + {LOOKUP_TABLE_CYCLES} + 1 == trace.cycles", - // segment.suspend_cycle, - // segment.paging_cycles - // ); - // assert_eq!(cycles, 1 << segment.po2, "cycles == 1 << segment.po2"); - assert!(cycles <= 1 << segment.po2, "cycles <= 1 << segment.po2"); - let cycles = 1 << segment.po2; - - let mut global = vec![Val::INVALID; REGCOUNT_GLOBAL]; - - for i in 0..DIGEST_WORDS { - // state in - let low = segment.pre_digest.as_words()[i] & 0xffff; - let high = segment.pre_digest.as_words()[i] >> 16; - global[LAYOUT_GLOBAL.state_in.values[i].low._super.offset] = low.into(); - global[LAYOUT_GLOBAL.state_in.values[i].high._super.offset] = high.into(); - - // input digest - let low = 0u32; - let high = 0u32; - global[LAYOUT_GLOBAL.input.values[i].low._super.offset] = low.into(); - global[LAYOUT_GLOBAL.input.values[i].high._super.offset] = high.into(); - } - - // rand_z - for (i, &elem) in trace.rand_z.elems().iter().enumerate() { - global[LAYOUT_GLOBAL.rng._super.offset + i] = elem; - } - - // is_terminate - global[LAYOUT_GLOBAL.is_terminate._super.offset] = 1u32.into(); - - let global = MetaBuffer { - buf: hal.copy_from_elem("global", &global), - rows: 1, - cols: REGCOUNT_GLOBAL, - checked_reads: true, - }; - - let code = MetaBuffer::new("code", hal, cycles, REGCOUNT_CODE, false); - - let data = scope!( - "alloc(data)", - MetaBuffer::new("data", hal, cycles, REGCOUNT_DATA, true) - ); - - // Set stateful columns from 'top' - let mut injector = Injector::new(cycles); - for (row, back) in trace.backs.iter().enumerate() { - let cycle = &trace.cycles[row]; - // tracing::trace!( - // "[{row}] pc: {:#010x}, state: {:?}", - // cycle.pc, - // CycleState::from_u32(cycle.state).unwrap() - // ); - match back { - Back::None => {} - Back::Ecall(s0, s1, s2) => { - const ECALL_S0: usize = LAYOUT_TOP.inst_result.arm8.s0._super.offset; - const ECALL_S1: usize = LAYOUT_TOP.inst_result.arm8.s1._super.offset; - const ECALL_S2: usize = LAYOUT_TOP.inst_result.arm8.s2._super.offset; - injector.set(row, ECALL_S0, *s0); - injector.set(row, ECALL_S1, *s1); - injector.set(row, ECALL_S2, *s2); - } - Back::Poseidon2(p2_state) => { - for (col, value) in zip(Poseidon2State::offsets(), p2_state.as_array()) { - injector.set(row, col, value); - } - } - } - injector.set_cycle(row, cycle); - } - - hal.scatter( - &data.buf, - &injector.index, - &injector.offsets, - &injector.values, - ); - - circuit_hal - .generate_witness(mode, &trace, &global, &data) - .context("witness generation failure")?; - - // Zero out 'invalid' entries in data and output. - scope!("zeroize", { - hal.eltwise_zeroize_elem(&global.buf); - hal.eltwise_zeroize_elem(&code.buf); - hal.eltwise_zeroize_elem(&data.buf); - }); - - Ok(Self { - cycles, - global, - code, - data, - trace, - }) - } -} - -#[derive(Debug)] -struct Injector { - rows: usize, - offsets: Vec, - values: Vec, - index: Vec, -} - -impl Injector { - fn new(rows: usize) -> Self { - let mut index = Vec::with_capacity(rows + 1); - index.push(0); - Self { - rows, - offsets: vec![], - values: vec![], - index, - } - } - - fn set_cycle(&mut self, row: usize, cycle: &RawPreflightCycle) { - const NEXT_PC_LOW: usize = LAYOUT_TOP.next_pc_low._super.offset; - const NEXT_PC_HIGH: usize = LAYOUT_TOP.next_pc_high._super.offset; - const NEXT_STATE: usize = LAYOUT_TOP.next_state_0._super.offset; - const MACHINE_MODE: usize = LAYOUT_TOP.next_machine_mode._super.offset; - self.set(row, NEXT_PC_LOW, cycle.pc & 0xffff); - self.set(row, NEXT_PC_HIGH, cycle.pc >> 16); - self.set(row, NEXT_STATE, cycle.state); - self.set(row, MACHINE_MODE, cycle.machine_mode as u32); - self.index.push(self.offsets.len() as u32); - } - - fn set(&mut self, row: usize, col: usize, value: u32) { - let idx = col * self.rows + row; - self.offsets.push(idx as u32); - self.values.push(value.into()); - } -} - -fn node_idx_to_addr(idx: u32) -> WordAddr { - MERKLE_TREE_END_ADDR - idx * DIGEST_WORDS as u32 -} - -fn node_addr_to_idx(addr: WordAddr) -> u32 { - (MERKLE_TREE_END_ADDR - addr).0 / DIGEST_WORDS as u32 -} diff --git a/risc0/circuit/rv32im-v2/src/prove/witgen/poseidon2.rs b/risc0/circuit/rv32im-v2/src/prove/witgen/poseidon2.rs deleted file mode 100644 index e3ad5bef..00000000 --- a/risc0/circuit/rv32im-v2/src/prove/witgen/poseidon2.rs +++ /dev/null @@ -1,541 +0,0 @@ -// Copyright 2024 RISC Zero, Inc. -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -use anyhow::{bail, Result}; -use risc0_circuit_rv32im_v2_sys::RawMemoryTransaction; -use risc0_zkp::{ - core::{ - digest::DIGEST_WORDS, - hash::poseidon2::{ - CELLS, M_INT_DIAG_HZN, ROUNDS_HALF_FULL, ROUNDS_PARTIAL, ROUND_CONSTANTS, - }, - }, - field::{ - baby_bear::{self}, - Elem, - }, -}; - -use crate::{ - execute::{ - addr::WordAddr, - node_idx, - pager::{PAGE_WORDS, POSEIDON_PAGE_ROUNDS}, - platform::*, - r0vm::Risc0Context as _, - }, - zirgen::circuit::{CircuitField, ExtVal, PoseidonStateLayout, LAYOUT_TOP}, -}; - -use super::{node_idx_to_addr, preflight::Preflight}; - -const P2_STATE_LAYOUT: &PoseidonStateLayout = LAYOUT_TOP.inst_result.arm9.state; - -const BABY_BEAR_P_U32: u32 = baby_bear::P; -const BABY_BEAR_P_U64: u64 = baby_bear::P as u64; - -#[derive(Clone, Debug, Default)] -pub(crate) struct Poseidon2State { - pub has_state: u32, - pub state_addr: u32, - pub buf_out_addr: u32, - pub is_elem: u32, - pub check_out: u32, - pub load_tx_type: u32, - pub next_state: CycleState, - pub sub_state: u32, - pub buf_in_addr: u32, - pub count: u32, - pub mode: u32, - pub inner: [u32; CELLS], - pub zcheck: ExtVal, -} - -const P2_STATE_SIZE: usize = std::mem::size_of::() / WORD_SIZE; - -impl Poseidon2State { - fn new_start(mode: u32) -> Self { - Self { - buf_out_addr: if mode == 0 { - MERKLE_TREE_END_ADDR.0 - } else { - MERKLE_TREE_START_ADDR.0 - }, - is_elem: 1, - check_out: 1, - load_tx_type: tx::PAGE_IN, - next_state: CycleState::PoseidonPaging, - mode, - ..Default::default() - } - } - - fn new_done(buf_out_addr: u32, next_state: CycleState, mode: u32) -> Self { - Self { - buf_out_addr, - next_state, - mode, - ..Default::default() - } - } - - fn new_node(node_idx: u32, is_read: bool) -> Self { - Self { - buf_out_addr: node_idx_to_addr(node_idx).0, - is_elem: 1, - check_out: if is_read { 1 } else { 0 }, - load_tx_type: if is_read { tx::PAGE_IN } else { tx::PAGE_OUT }, - next_state: CycleState::PoseidonPaging, - buf_in_addr: node_idx_to_addr(2 * node_idx + 1).0, - count: 1, - mode: if is_read { 0 } else { 4 }, - ..Default::default() - } - } - - fn new_page(page_idx: u32, is_read: bool) -> Self { - let node_idx = node_idx(page_idx); - Self { - buf_out_addr: node_idx_to_addr(node_idx).0, - check_out: if is_read { 1 } else { 0 }, - load_tx_type: if is_read { tx::PAGE_IN } else { tx::PAGE_OUT }, - next_state: CycleState::PoseidonPaging, - buf_in_addr: page_idx * PAGE_WORDS as u32, - count: POSEIDON_PAGE_ROUNDS, - mode: if is_read { 1 } else { 3 }, - ..Default::default() - } - } - - fn new_ecall(state_addr: u32, buf_in_addr: u32, buf_out_addr: u32, bits_count: u32) -> Self { - let is_elem = bits_count & PFLAG_IS_ELEM; - let check_out = bits_count & PFLAG_CHECK_OUT; - Self { - state_addr, - buf_in_addr, - buf_out_addr, - has_state: if state_addr == 0 { 0 } else { 1 }, - is_elem: if is_elem == 0 { 0 } else { 1 }, - check_out: if check_out == 0 { 0 } else { 1 }, - count: bits_count & 0xffff, - mode: 1, - load_tx_type: tx::READ, - next_state: CycleState::PoseidonEntry, - ..Default::default() - } - } - - pub(crate) const fn offsets() -> [usize; P2_STATE_SIZE] { - [ - P2_STATE_LAYOUT.has_state._super.offset, - P2_STATE_LAYOUT.state_addr._super.offset, - P2_STATE_LAYOUT.buf_out_addr._super.offset, - P2_STATE_LAYOUT.is_elem._super.offset, - P2_STATE_LAYOUT.check_out._super.offset, - P2_STATE_LAYOUT.load_tx_type._super.offset, - P2_STATE_LAYOUT.next_state._super.offset, - P2_STATE_LAYOUT.sub_state._super.offset, - P2_STATE_LAYOUT.buf_in_addr._super.offset, - P2_STATE_LAYOUT.count._super.offset, - P2_STATE_LAYOUT.mode._super.offset, - P2_STATE_LAYOUT.inner[0]._super.offset, - P2_STATE_LAYOUT.inner[1]._super.offset, - P2_STATE_LAYOUT.inner[2]._super.offset, - P2_STATE_LAYOUT.inner[3]._super.offset, - P2_STATE_LAYOUT.inner[4]._super.offset, - P2_STATE_LAYOUT.inner[5]._super.offset, - P2_STATE_LAYOUT.inner[6]._super.offset, - P2_STATE_LAYOUT.inner[7]._super.offset, - P2_STATE_LAYOUT.inner[8]._super.offset, - P2_STATE_LAYOUT.inner[9]._super.offset, - P2_STATE_LAYOUT.inner[10]._super.offset, - P2_STATE_LAYOUT.inner[11]._super.offset, - P2_STATE_LAYOUT.inner[12]._super.offset, - P2_STATE_LAYOUT.inner[13]._super.offset, - P2_STATE_LAYOUT.inner[14]._super.offset, - P2_STATE_LAYOUT.inner[15]._super.offset, - P2_STATE_LAYOUT.inner[16]._super.offset, - P2_STATE_LAYOUT.inner[17]._super.offset, - P2_STATE_LAYOUT.inner[18]._super.offset, - P2_STATE_LAYOUT.inner[19]._super.offset, - P2_STATE_LAYOUT.inner[20]._super.offset, - P2_STATE_LAYOUT.inner[21]._super.offset, - P2_STATE_LAYOUT.inner[22]._super.offset, - P2_STATE_LAYOUT.inner[23]._super.offset, - P2_STATE_LAYOUT.zcheck._super.offset + 0, - P2_STATE_LAYOUT.zcheck._super.offset + 1, - P2_STATE_LAYOUT.zcheck._super.offset + 2, - P2_STATE_LAYOUT.zcheck._super.offset + 3, - ] - } - - pub(crate) fn as_array(&self) -> [u32; P2_STATE_SIZE] { - let zcheck = self.zcheck.elems(); - [ - self.has_state, - self.state_addr, - self.buf_out_addr, - self.is_elem, - self.check_out, - self.load_tx_type, - self.next_state as u32, - self.sub_state, - self.buf_in_addr, - self.count, - self.mode, - self.inner[0], - self.inner[1], - self.inner[2], - self.inner[3], - self.inner[4], - self.inner[5], - self.inner[6], - self.inner[7], - self.inner[8], - self.inner[9], - self.inner[10], - self.inner[11], - self.inner[12], - self.inner[13], - self.inner[14], - self.inner[15], - self.inner[16], - self.inner[17], - self.inner[18], - self.inner[19], - self.inner[20], - self.inner[21], - self.inner[22], - self.inner[23], - zcheck[0].into(), - zcheck[1].into(), - zcheck[2].into(), - zcheck[3].into(), - ] - } - - fn step( - &mut self, - ctx: &mut Preflight, - cur_state: &mut CycleState, - next_state: CycleState, - sub_state: u32, - ) { - self.next_state = next_state; - self.sub_state = sub_state; - ctx.on_poseidon2_cycle(*cur_state, self); - *cur_state = next_state; - } - - fn rest(&mut self, ctx: &mut Preflight, final_state: CycleState) -> Result<()> { - let mut cur_state = self.next_state; - let state_addr = WordAddr(self.state_addr); - - // If we have state, load it - if self.has_state == 1 { - // tracing::trace!("has_state"); - self.step(ctx, &mut cur_state, CycleState::PoseidonLoadState, 0); - for i in 0..DIGEST_WORDS { - self.inner[DIGEST_WORDS * 2 + i] = ctx.load_u32(state_addr + i)?; - } - } - - // While we have data to process - let mut buf_in_addr = WordAddr(self.buf_in_addr); - // tracing::debug!("buf_in_addr: {buf_in_addr:?}"); - while self.count > 0 { - // Do load - self.step(ctx, &mut cur_state, CycleState::PoseidonLoadIn, 0); - - if self.is_elem != 0 { - for i in 0..DIGEST_WORDS { - self.inner[i] = ctx.load_u32(buf_in_addr.postfix_inc())?; - } - self.buf_in_addr = buf_in_addr.0; - self.step(ctx, &mut cur_state, CycleState::PoseidonLoadIn, 1); - for i in 0..DIGEST_WORDS { - self.inner[DIGEST_WORDS + i] = ctx.load_u32(buf_in_addr.postfix_inc())?; - } - self.buf_in_addr = buf_in_addr.0; - } else { - for i in 0..DIGEST_WORDS { - let word = ctx.load_u32(buf_in_addr.postfix_inc())?; - self.inner[2 * i + 0] = word & 0xffff; - self.inner[2 * i + 1] = word >> 16; - } - self.buf_in_addr = buf_in_addr.0; - } - - // Do the mix - self.multiply_by_m_ext(); - for i in 0..ROUNDS_HALF_FULL { - self.step(ctx, &mut cur_state, CycleState::PoseidonExtRound, i as u32); - self.do_ext_round(i); - } - self.step(ctx, &mut cur_state, CycleState::PoseidonIntRound, 0); - self.do_int_rounds(); - for i in ROUNDS_HALF_FULL..ROUNDS_HALF_FULL * 2 { - self.step(ctx, &mut cur_state, CycleState::PoseidonExtRound, i as u32); - self.do_ext_round(i); - } - self.count -= 1; - } - - self.step(ctx, &mut cur_state, CycleState::PoseidonDoOut, 0); - - let buf_out_addr = WordAddr(self.buf_out_addr); - if self.check_out != 0 { - for i in 0..DIGEST_WORDS { - let addr = buf_out_addr + i; - let word = ctx.load_u32(addr)?; - let cell = self.inner[i]; - if word != cell { - tracing::warn!( - "buf_in_addr: {:?}, buf_out_addr: {buf_out_addr:?}, cell: {i}", - WordAddr(self.buf_in_addr) - ); - bail!("poseidon2 check failed: {word:#010x} != {cell:#010x}"); - } - } - } else { - for i in 0..DIGEST_WORDS { - ctx.store_u32(buf_out_addr + i, self.inner[i])?; - } - } - - self.buf_in_addr = 0; - - if self.has_state == 1 { - self.step(ctx, &mut cur_state, CycleState::PoseidonStoreState, 0); - for i in 0..DIGEST_WORDS { - ctx.store_u32(state_addr + i, self.inner[DIGEST_WORDS * 2 + i])?; - } - } - - self.step(ctx, &mut cur_state, final_state, 0); - - Ok(()) - } - - // Optimized method for multiplication by M_EXT. - // See appendix B of Poseidon2 paper for additional details. - fn multiply_by_m_ext(&mut self) { - let mut out = [0; CELLS]; - let mut tmp_sums = [0; 4]; - - for i in 0..CELLS / 4 { - let chunk = multiply_by_4x4_circulant(&[ - self.inner[i * 4], - self.inner[i * 4 + 1], - self.inner[i * 4 + 2], - self.inner[i * 4 + 3], - ]); - for j in 0..4 { - let to_add = chunk[j] as u64; - let to_add = (to_add % BABY_BEAR_P_U64) as u32; - tmp_sums[j] += to_add; - tmp_sums[j] %= BABY_BEAR_P_U32; - out[i * 4 + j] += to_add; - out[i * 4 + j] %= BABY_BEAR_P_U32; - } - } - for i in 0..CELLS { - self.inner[i] = (out[i] + tmp_sums[i % 4]) % BABY_BEAR_P_U32; - } - } - - // Exploit the fact that off-diagonal entries of M_INT are all 1. - fn multiply_by_m_int(&mut self) { - let mut sum = 0u64; - for i in 0..CELLS { - sum += self.inner[i] as u64; - } - sum %= BABY_BEAR_P_U64; - for i in 0..CELLS { - let diag = M_INT_DIAG_HZN[i].as_u32() as u64; - let cell = self.inner[i] as u64; - self.inner[i] = ((sum + diag * cell) % BABY_BEAR_P_U64) as u32; - } - } - - fn do_ext_round(&mut self, mut idx: usize) { - if idx >= ROUNDS_HALF_FULL { - idx += ROUNDS_PARTIAL; - } - - self.add_round_constants_full(idx); - for i in 0..CELLS { - self.inner[i] = sbox2(self.inner[i]); - } - - self.multiply_by_m_ext(); - } - - fn do_int_rounds(&mut self) { - for i in 0..ROUNDS_PARTIAL { - self.add_round_constants_partial(ROUNDS_HALF_FULL + i); - self.inner[0] = sbox2(self.inner[0]); - self.multiply_by_m_int(); - } - } - - fn add_round_constants_full(&mut self, round: usize) { - for i in 0..CELLS { - self.inner[i] += ROUND_CONSTANTS[round * CELLS + i].as_u32(); - self.inner[i] %= BABY_BEAR_P_U32; - } - } - - fn add_round_constants_partial(&mut self, round: usize) { - self.inner[0] += ROUND_CONSTANTS[round * CELLS].as_u32(); - self.inner[0] %= BABY_BEAR_P_U32; - } -} - -fn multiply_by_4x4_circulant(x: &[u32; 4]) -> [u32; 4] { - // See appendix B of Poseidon2 paper. - const CIRC_FACTOR_2: u64 = 2; - const CIRC_FACTOR_4: u64 = 4; - let t0 = (x[0] as u64 + x[1] as u64) % BABY_BEAR_P_U64; - let t1 = (x[2] as u64 + x[3] as u64) % BABY_BEAR_P_U64; - let t2 = (CIRC_FACTOR_2 * x[1] as u64 + t1) % BABY_BEAR_P_U64; - let t3 = (CIRC_FACTOR_2 * x[3] as u64 + t0) % BABY_BEAR_P_U64; - let t4 = (CIRC_FACTOR_4 * t1 + t3) % BABY_BEAR_P_U64; - let t5 = (CIRC_FACTOR_4 * t0 + t2) % BABY_BEAR_P_U64; - let t6 = (t3 + t5) % BABY_BEAR_P_U64; - let t7 = (t2 + t4) % BABY_BEAR_P_U64; - [t6 as u32, t5 as u32, t7 as u32, t4 as u32] -} - -fn sbox2(x: u32) -> u32 { - let x = x as u64; - let x2 = (x * x) % BABY_BEAR_P_U64; - let x4 = (x2 * x2) % BABY_BEAR_P_U64; - let x6 = (x4 * x2) % BABY_BEAR_P_U64; - let x7 = (x6 * x) % BABY_BEAR_P_U64; - x7 as u32 -} - -pub fn read_start(ctx: &mut Preflight) -> Result<()> { - // tracing::trace!("read_start"); - let p2 = Poseidon2State::new_start(0); - ctx.on_poseidon2_cycle(CycleState::PoseidonEntry, &p2); - Ok(()) -} - -pub fn read_node(ctx: &mut Preflight, node_idx: u32) -> Result<()> { - // tracing::trace!("read_node: {node_idx:#010x}"); - let mut p2 = Poseidon2State::new_node(node_idx, true); - p2.rest(ctx, CycleState::PoseidonPaging) -} - -pub fn read_page(ctx: &mut Preflight, page_idx: u32) -> Result<()> { - // tracing::trace!("read_page: {page_idx:#010x}"); - let mut p2 = Poseidon2State::new_page(page_idx, true); - p2.rest(ctx, CycleState::PoseidonPaging) -} - -pub fn read_done(ctx: &mut Preflight) -> Result<()> { - // tracing::trace!("read_done"); - let p2 = Poseidon2State::new_done(MERKLE_TREE_START_ADDR.0, CycleState::Resume, 2); - ctx.on_poseidon2_cycle(CycleState::PoseidonPaging, &p2); - Ok(()) -} - -pub fn write_start(ctx: &mut Preflight) -> Result<()> { - // tracing::trace!("write_start"); - let p2 = Poseidon2State::new_start(3); - ctx.on_poseidon2_cycle(CycleState::PoseidonEntry, &p2); - Ok(()) -} - -pub fn write_node(ctx: &mut Preflight, node_idx: u32) -> Result<()> { - // tracing::trace!("write_node: {node_idx:#010x}"); - let mut p2 = Poseidon2State::new_node(node_idx, false); - p2.rest(ctx, CycleState::PoseidonPaging) -} - -pub fn write_page(ctx: &mut Preflight, page_idx: u32) -> Result<()> { - // tracing::trace!("write_page: {page_idx:#010x}"); - let mut p2 = Poseidon2State::new_page(page_idx, false); - p2.rest(ctx, CycleState::PoseidonPaging) -} - -pub fn write_done(ctx: &mut Preflight) -> Result<()> { - // tracing::trace!("write_done"); - let p2 = Poseidon2State::new_done(MERKLE_TREE_END_ADDR.0, CycleState::StoreRoot, 5); - ctx.on_poseidon2_cycle(CycleState::PoseidonPaging, &p2); - Ok(()) -} - -pub fn ecall(ctx: &mut Preflight) -> Result<()> { - tracing::trace!("ecall"); - let state_addr = ctx.load_u32(MACHINE_REGS_ADDR.waddr() + REG_A0)?; - let buf_in_addr = ctx.load_u32(MACHINE_REGS_ADDR.waddr() + REG_A1)?; - let buf_out_addr = ctx.load_u32(MACHINE_REGS_ADDR.waddr() + REG_A2)?; - let bits_count = ctx.load_u32(MACHINE_REGS_ADDR.waddr() + REG_A3)?; - let mut p2 = Poseidon2State::new_ecall(state_addr, buf_in_addr, buf_out_addr, bits_count); - p2.rest(ctx, CycleState::Decode) -} - -pub(crate) struct Checksum { - powers: [ExtVal; DIGEST_WORDS * 2 + 1], - pub zcheck: ExtVal, -} - -impl Checksum { - pub(crate) fn new(rand_z: &ExtVal) -> Self { - let mut cur = ExtVal::ONE; - let mut powers = [ExtVal::ZERO; DIGEST_WORDS * 2 + 1]; - for power in powers.iter_mut() { - *power = cur; - cur *= *rand_z; - } - // tracing::trace!("powers: {powers:?}"); - - Self { - powers, - zcheck: ExtVal::ZERO, - } - } - - pub(crate) fn start(&mut self) { - self.zcheck *= self.powers[16]; - } - - pub(crate) fn clear(&mut self) { - self.zcheck = ExtVal::ZERO; - } - - pub(crate) fn add(&mut self, tx_kind: u32, idx: usize, txn: &RawMemoryTransaction) { - let mut coeffs = match tx_kind { - tx::READ => (0, 1), - tx::PAGE_IN => (0, txn.cycle as i32 - txn.prev_cycle as i32), - tx::PAGE_OUT => ( - (txn.word & 0xffff) as i32 - (txn.prev_word & 0xffff) as i32, - (txn.word >> 16) as i32 - (txn.prev_word >> 16) as i32, - ), - _ => unreachable!(), - }; - if coeffs.0 < 0 { - coeffs.0 += baby_bear::P as i32; - } - if coeffs.1 < 0 { - coeffs.1 += baby_bear::P as i32; - } - let coeffs = (coeffs.0 as u32, coeffs.1 as u32); - self.zcheck += self.powers[2 * idx] * ExtVal::from_u32(coeffs.0); - self.zcheck += self.powers[2 * idx + 1] * ExtVal::from_u32(coeffs.1); - } -} diff --git a/risc0/circuit/rv32im-v2/src/prove/witgen/preflight.rs b/risc0/circuit/rv32im-v2/src/prove/witgen/preflight.rs deleted file mode 100644 index 62c2d3cf..00000000 --- a/risc0/circuit/rv32im-v2/src/prove/witgen/preflight.rs +++ /dev/null @@ -1,588 +0,0 @@ -// Copyright 2024 RISC Zero, Inc. -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -use std::collections::BTreeMap; - -use anyhow::{anyhow, bail, Result}; -use derive_more::Debug; -use num_traits::FromPrimitive as _; -use risc0_circuit_rv32im_v2_sys::{RawMemoryTransaction, RawPreflightCycle}; -use risc0_core::scope; -use risc0_zkp::core::digest::DIGEST_WORDS; - -use crate::{ - execute::{ - addr::{ByteAddr, WordAddr}, - pager::PagedMemory, - platform::*, - r0vm::{Risc0Context, Risc0Machine}, - rv32im::{DecodedInstruction, Emulator, InsnKind, Instruction}, - segment::Segment, - }, - zirgen::circuit::ExtVal, -}; - -use self::poseidon2::Checksum; - -use super::{node_addr_to_idx, node_idx_to_addr, poseidon2, Poseidon2State}; - -#[derive(Clone, Debug, Default)] -pub(crate) enum Back { - #[default] - None, - Ecall(u32, u32, u32), - #[debug("Poseidon2")] - Poseidon2(Poseidon2State), -} - -#[derive(Clone, Debug, Default)] -pub(crate) struct PreflightTrace { - #[debug("{}", cycles.len())] - pub cycles: Vec, - #[debug("{}", txns.len())] - pub txns: Vec, - #[debug("{}", backs.len())] - pub backs: Vec, - pub table_split_cycle: u32, - pub rand_z: ExtVal, -} - -pub(crate) struct Preflight<'a> { - pub trace: PreflightTrace, - segment: &'a Segment, - pager: PagedMemory, - pc: ByteAddr, - machine_mode: u32, - cur_write: usize, - cur_read: usize, - user_cycle: u32, - txn_idx: u32, - phys_cycles: u32, - orig_words: BTreeMap, - prev_cycle: BTreeMap, - page_memory: BTreeMap, -} - -impl Segment { - pub(crate) fn preflight(&self, rand_z: ExtVal) -> Result { - scope!("preflight"); - tracing::debug!("preflight: {self:#?}"); - - let mut preflight = Preflight::new(self, rand_z); - preflight.read_pages()?; - preflight.body()?; - preflight.write_pages()?; - preflight.generate_tables()?; - preflight.padding(); - preflight.wrap_memory_txns()?; - preflight.update_p2_zcheck()?; - - tracing::trace!("paging_cycles: {}", preflight.pager.cycles); - - Ok(preflight.trace) - } -} - -fn get_digest_addr(idx: u32) -> WordAddr { - MERKLE_TREE_START_ADDR + DIGEST_WORDS as u32 * (2 * MEMORY_PAGES as u32 - idx) -} - -impl<'a> Preflight<'a> { - fn new(segment: &'a Segment, rand_z: ExtVal) -> Self { - tracing::debug!("po2: {}", segment.po2); - - let mut page_memory = BTreeMap::new(); - for (&node_idx, digest) in segment.partial_image.digests.iter() { - let node_addr = node_idx_to_addr(node_idx); - for i in 0..DIGEST_WORDS { - page_memory.insert(node_addr + i, digest.as_words()[i]); - } - } - Self { - trace: PreflightTrace { - rand_z, - ..Default::default() - }, - segment, - pager: PagedMemory::new(segment.partial_image.clone()), - pc: ByteAddr(0), - machine_mode: 0, - cur_write: 0, - cur_read: 0, - txn_idx: 0, - user_cycle: 0, - phys_cycles: 0, - orig_words: BTreeMap::new(), - prev_cycle: BTreeMap::new(), - page_memory, - } - } - - // Do page in - pub fn read_pages(&mut self) -> Result<()> { - self.read_root()?; - let activity = self.pager.loaded_pages(); - poseidon2::read_start(self)?; - for node_idx in activity.nodes { - poseidon2::read_node(self, node_idx)?; - } - self.machine_mode = 1; - for page_idx in activity.pages { - poseidon2::read_page(self, page_idx)?; - } - self.machine_mode = 2; - poseidon2::read_done(self)?; - self.phys_cycles = 0; - Ok(()) - } - - // Run main execution - pub fn body(&mut self) -> Result<()> { - let mut emu = Emulator::new(); - Risc0Machine::resume(self)?; - while self.phys_cycles < self.segment.suspend_cycle { - Risc0Machine::step(&mut emu, self)?; - } - Risc0Machine::suspend(self) - } - - // Do page out - pub fn write_pages(&mut self) -> Result<()> { - let activity = self.pager.dirty_pages(); - self.pager.commit()?; - poseidon2::write_start(self)?; - for &page_idx in activity.pages.iter().rev() { - poseidon2::write_page(self, page_idx)?; - } - self.machine_mode = 4; - for &node_idx in activity.nodes.iter().rev() { - poseidon2::write_node(self, node_idx)?; - } - self.machine_mode = 5; - poseidon2::write_done(self)?; - self.machine_mode = 0; - self.write_root() - } - - // Do table reification - pub fn generate_tables(&mut self) -> Result<()> { - self.trace.table_split_cycle = self.trace.cycles.len() as u32; - self.fini(); - Ok(()) - } - - pub fn padding(&mut self) -> Result<()> { - let last_cycle = 1 << self.segment.po2; - for i in self.trace.cycles.len()..last_cycle { - self.add_cycle_special( - CycleState::ControlDone, - CycleState::ControlDone, - 0, - 0, - Back::None, - ); - } - Ok(()) - } - - // Now, go back and update memory transactions to wrap around - fn wrap_memory_txns(&mut self) -> Result<()> { - for txn in self.trace.txns.iter_mut() { - // tracing::trace!("{txn:?}"); - let addr = WordAddr(txn.addr); - if txn.prev_cycle == u32::MAX { - // If first cycle for a particular address, set 'prev_cycle' to final cycle - txn.prev_cycle = self.prev_cycle[&addr]; - } else { - // Otherwise, compute cycle diff and another diff - let diff = txn.cycle - txn.prev_cycle; - self.trace.cycles[diff as usize].diff_count += 1; - } - - // If last cycle, set final value to original value - if txn.cycle == self.prev_cycle[&addr] { - txn.word = self.orig_words[&addr]; - } - } - Ok(()) - } - - fn update_p2_zcheck(&mut self) -> Result<()> { - let mut checksum = Checksum::new(&self.trace.rand_z); - for (row, back) in self.trace.backs.iter_mut().enumerate() { - if let Back::Poseidon2(p2_state) = back { - let cycle = &self.trace.cycles[row]; - let next_cycle = &self.trace.cycles[row + 1]; - let state = CycleState::from_u32((cycle.major as u32 - 7) * 8 + cycle.minor as u32) - .unwrap(); - if state == CycleState::PoseidonLoadIn { - checksum.start(); - for (i, txn_idx) in (cycle.txn_idx..next_cycle.txn_idx).enumerate() { - let txn = &self.trace.txns[txn_idx as usize]; - checksum.add(p2_state.load_tx_type, i, txn); - } - } - match state { - CycleState::PoseidonLoadIn - | CycleState::PoseidonExtRound - | CycleState::PoseidonIntRound => { - p2_state.zcheck = checksum.zcheck; - } - _ => { - checksum.clear(); - } - } - } - } - - Ok(()) - } - - fn fini(&mut self) { - for i in (16..256).step_by(16) { - self.add_cycle_special( - CycleState::ControlTable, - CycleState::ControlTable, - i, - 0, - Back::None, - ); - } - self.machine_mode = 1; - for i in (0..64 * 1024).step_by(16) { - self.add_cycle_special( - CycleState::ControlTable, - CycleState::ControlTable, - i, - 0, - Back::None, - ); - } - self.machine_mode = 0; - self.add_cycle_special( - CycleState::ControlTable, - CycleState::ControlDone, - 0, - 0, - Back::None, - ); - self.add_cycle_special( - CycleState::ControlDone, - CycleState::ControlDone, - 0, - 0, - Back::None, - ); - } - - fn read_root(&mut self) -> Result<()> { - let addr = get_digest_addr(1); - for i in 0..DIGEST_WORDS { - self.load_u32(addr + i)?; - } - self.add_cycle_special( - CycleState::LoadRoot, - CycleState::PoseidonEntry, - 0, - 0, - Back::None, - ); - Ok(()) - } - - fn write_root(&mut self) -> Result<()> { - let addr = get_digest_addr(1); - for i in 0..DIGEST_WORDS { - self.load_u32(addr + i)?; - } - self.add_cycle_special( - CycleState::StoreRoot, - CycleState::ControlTable, - 0, - 0, - Back::None, - ); - Ok(()) - } - - fn add_cycle( - &mut self, - state: CycleState, - pc: u32, - major: u8, - minor: u8, - paging_idx: u32, - back: Back, - ) { - let cycle = RawPreflightCycle { - state: state as u32, - pc, - major, - minor, - machine_mode: self.machine_mode as u8, - padding: 0, - user_cycle: self.user_cycle, - txn_idx: self.txn_idx, - paging_idx, - diff_count: 0, - }; - // tracing::trace!("[{}]: {cycle:?}", self.trace.cycles.len()); - self.trace.cycles.push(cycle); - self.trace.backs.push(back); - self.txn_idx = self.trace.txns.len() as u32; - } - - fn add_cycle_insn(&mut self, state: CycleState, pc: u32, insn: InsnKind) { - match insn { - InsnKind::Eany => { - // Technically we need to switch on the machine mode *entering* the EANY - if self.trace.cycles.last().unwrap().machine_mode != 0 { - self.add_cycle( - state, - pc, - major::ECALL0, - ecall_minor::MACHINE_ECALL, - 0, - Back::None, - ); - } else { - self.add_cycle( - state, - pc, - major::CONTROL0, - control_minor::USER_ECALL, - 0, - Back::None, - ); - } - } - InsnKind::Mret => { - self.add_cycle( - state, - pc, - major::CONTROL0, - control_minor::MRET, - 0, - Back::None, - ); - } - _ => { - self.add_cycle(state, pc, insn.major(), insn.minor(), 0, Back::None); - } - } - } - - fn add_cycle_special( - &mut self, - cur_state: CycleState, - next_state: CycleState, - pc: u32, - paging_idx: u32, - back: Back, - ) { - let cur_state = cur_state as u32; - let major = (7 + cur_state / 8) as u8; - let minor = (cur_state % 8) as u8; - // tracing::trace!("add_cycle_special(cur_state: {cur_state}, next_state: {next_state}, major: {major}, minor: {minor})"); - self.add_cycle(next_state, pc, major, minor, paging_idx, back); - } - - pub(crate) fn on_poseidon2_cycle(&mut self, cur_state: CycleState, p2: &Poseidon2State) { - self.add_cycle_special( - cur_state, - p2.next_state, - self.pc.0, - node_addr_to_idx(WordAddr(p2.buf_out_addr)), - Back::Poseidon2(p2.clone()), - ); - self.phys_cycles += 1; - } - - pub(crate) fn load_u32_with_txn( - &mut self, - addr: WordAddr, - ) -> Result<(u32, RawMemoryTransaction)> { - let cycle = self.trace.cycles.len(); - let word = if addr >= MERKLE_TREE_START_ADDR { - *self - .page_memory - .get(&addr) - .ok_or(anyhow!("Invalid load from page memory"))? - } else { - self.pager.load(addr)? - }; - self.orig_words.entry(addr).or_insert(word); - let prev_cycle = *self.prev_cycle.get(&addr).unwrap_or(&u32::MAX); - let txn = RawMemoryTransaction { - addr: addr.0, - cycle: cycle as u32, - word, - prev_cycle, - prev_word: word, - }; - self.prev_cycle.insert(addr, txn.cycle); - self.trace.txns.push(txn.clone()); - Ok((word, txn)) - } -} - -impl<'a> Risc0Context for Preflight<'a> { - fn get_pc(&self) -> ByteAddr { - self.pc - } - - fn set_pc(&mut self, addr: ByteAddr) { - self.pc = addr; - } - - fn get_machine_mode(&self) -> u32 { - self.machine_mode - } - - fn set_machine_mode(&mut self, mode: u32) { - self.machine_mode = mode; - } - - fn resume(&mut self) -> Result<()> { - self.add_cycle_special( - CycleState::Resume, - CycleState::Resume, - self.pc.0, - 0, - Back::None, - ); - for i in 0..DIGEST_WORDS { - self.store_u32(GLOBAL_INPUT_ADDR.waddr() + i, 0)?; // FIXME! - } - self.add_cycle_special( - CycleState::Resume, - CycleState::Decode, - self.pc.0, - 0, - Back::None, - ); - Ok(()) - } - - fn suspend(&mut self) -> Result<()> { - self.pc = ByteAddr(0); - self.add_cycle_special(CycleState::Suspend, CycleState::Suspend, 0, 0, Back::None); - for i in 0..DIGEST_WORDS { - self.load_u32(GLOBAL_OUTPUT_ADDR.waddr() + i)?; - } - self.machine_mode = 3; - self.add_cycle_special( - CycleState::Suspend, - CycleState::PoseidonEntry, - 0, - 0, - Back::None, - ); - Ok(()) - } - - fn on_insn_start(&mut self, _insn: &Instruction, _decoded: &DecodedInstruction) -> Result<()> { - Ok(()) - } - - fn on_insn_end(&mut self, insn: &Instruction, _decoded: &DecodedInstruction) -> Result<()> { - self.add_cycle_insn(CycleState::Decode, self.pc.0, insn.kind); - self.user_cycle += 1; - self.phys_cycles += 1; - Ok(()) - } - - fn trap_rewind(&mut self) { - self.trace.txns.truncate(self.txn_idx as usize); - } - - fn peek_u32(&mut self, _addr: WordAddr) -> Result { - // no-op is OK - Ok(0) - } - - // Pass memory ops to pager + record - fn load_u32(&mut self, addr: WordAddr) -> Result { - let (word, _) = self.load_u32_with_txn(addr)?; - Ok(word) - } - - fn store_u32(&mut self, addr: WordAddr, word: u32) -> Result<()> { - let cycle = self.trace.cycles.len(); - let prev_word = if addr >= MEMORY_END_ADDR { - let prev_word = *self - .page_memory - .get(&addr) - .ok_or(anyhow!("Invalid store to page memory"))?; - self.page_memory.insert(addr, word); - prev_word - } else { - let prev_word = self.pager.load(addr)?; - self.pager.store(addr, word)?; - prev_word - }; - let prev_cycle = *self.prev_cycle.get(&addr).unwrap_or(&u32::MAX); - let txn = RawMemoryTransaction { - addr: addr.0, - cycle: cycle as u32, - word, - prev_cycle, - prev_word, - }; - self.prev_cycle.insert(addr, txn.cycle); - self.trace.txns.push(txn); - Ok(()) - } - - fn on_ecall_cycle( - &mut self, - cur_state: CycleState, - next_state: CycleState, - s0: u32, - s1: u32, - s2: u32, - ) -> Result<()> { - self.add_cycle_special(cur_state, next_state, self.pc.0, 0, Back::Ecall(s0, s1, s2)); - self.phys_cycles += 1; - if next_state == CycleState::PoseidonEntry { - poseidon2::ecall(self)?; - } - Ok(()) - } - - fn on_terminate(&mut self, _a0: u32, _a1: u32) { - // no-op - } - - fn host_read(&mut self, _fd: u32, buf: &mut [u8]) -> Result { - if self.cur_read >= self.segment.read_record.len() { - bail!("Invalid segment: unexpected read record"); - } - let record = &self.segment.read_record[self.cur_read]; - let rlen = record.len(); - if rlen > buf.len() { - bail!("Invalid segment: truncated read record"); - } - buf[..rlen].copy_from_slice(record); - Ok(rlen as u32) - } - - fn host_write(&mut self, _fd: u32, _buf: &[u8]) -> Result { - if self.cur_write >= self.segment.write_record.len() { - bail!("Invalid segment: unexpected write record"); - } - self.cur_write += 1; - Ok(self.segment.write_record[self.cur_write]) - } -} diff --git a/risc0/circuit/rv32im-v2/src/prove/witgen/tests.rs b/risc0/circuit/rv32im-v2/src/prove/witgen/tests.rs deleted file mode 100644 index 4aafeae3..00000000 --- a/risc0/circuit/rv32im-v2/src/prove/witgen/tests.rs +++ /dev/null @@ -1,182 +0,0 @@ -// Copyright 2024 RISC Zero, Inc. -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -use rand::thread_rng; -use risc0_binfmt::Program; -use risc0_zkp::{core::hash::poseidon2::Poseidon2HashSuite, field::Elem, hal::cpu::CpuHal}; -use std::rc::Rc; -use test_log::test; - -use crate::{ - execute::{ - image::MemoryImage2, - testutil::{self, NullSyscall, DEFAULT_SESSION_LIMIT}, - DEFAULT_SEGMENT_LIMIT_PO2, - }, - prove::{hal::StepMode, witgen::WitnessGenerator}, - zirgen::circuit::{ExtVal, REGCOUNT_DATA}, -}; - -#[test] -fn basic() { - let program = testutil::basic(); - let image = MemoryImage2::new(program); - - let result = testutil::execute( - image, - DEFAULT_SEGMENT_LIMIT_PO2, - DEFAULT_SESSION_LIMIT, - &NullSyscall, - None, - ) - .unwrap(); - let segments = result.segments; - let segment = segments.first().unwrap(); - - let mut rng = thread_rng(); - let rand_z = ExtVal::random(&mut rng); - - let mut trace = segment.preflight(rand_z).unwrap(); - // let expected_cycles = [ - // add_cycle(InsnKind::LUI, 0, Some(0x4000)), - // add_cycle(InsnKind::LUI, 3, Some(0x4004)), - // add_cycle(InsnKind::ADD, 6, Some(0x4008)), - // add_cycle(InsnKind::LUI, 9, Some(0x400c)), - // add_cycle(InsnKind::EANY, 12, None), - // ]; - // trace.body.cycles.truncate(expected_cycles.len()); - - // assert_slice_eq(&trace.body.cycles, &expected_cycles); - // assert_slice_eq( - // &trace.body.txns, - // &[ - // MemoryTransaction::new(0, ByteAddr(0x00004000), 0x1234b137), - // MemoryTransaction::new(0, ByteAddr(0x0c000024), 0), - // MemoryTransaction::new(0, ByteAddr(0x0c00000c), 0), - // MemoryTransaction::new(1, ByteAddr(0x00004004), 0xf387e1b7), - // MemoryTransaction::new(1, ByteAddr(0x0c00003c), 0), - // MemoryTransaction::new(1, ByteAddr(0x0c000060), 0), - // MemoryTransaction::new(2, ByteAddr(0x00004008), 0x003100b3), - // MemoryTransaction::new(2, ByteAddr(0x0c000008), 0x1234b000), - // MemoryTransaction::new(2, ByteAddr(0x0c00000c), 0xf387e000), - // MemoryTransaction::new(3, ByteAddr(0x0000400c), 0x000045b7), - // MemoryTransaction::new(3, ByteAddr(0x0c000000), 0), - // MemoryTransaction::new(3, ByteAddr(0x0c000000), 0), - // MemoryTransaction::new(4, ByteAddr(0x00004010), 0x00000073), - // MemoryTransaction::new(4, ByteAddr(0x0c000014), 0), - // MemoryTransaction::new(4, ByteAddr(0x0c00002c), 0x00004000), - // MemoryTransaction::new(4, ByteAddr(0x0c000028), 0x00000000), - // // reset(1) - // MemoryTransaction::new(4380, ByteAddr(0x00004000), 0x1234b137), - // MemoryTransaction::new(4380, ByteAddr(0x00004004), 0xf387e1b7), - // MemoryTransaction::new(4380, ByteAddr(0x00004008), 0x003100b3), - // MemoryTransaction::new(4380, ByteAddr(0x0000400c), 0x000045b7), - // MemoryTransaction::new(4381, ByteAddr(0x00004010), 0x00000073), - // MemoryTransaction::new(4381, ByteAddr(0x00004014), 0x00000000), - // MemoryTransaction::new(4381, ByteAddr(0x00004018), 0x00000000), - // MemoryTransaction::new(4381, ByteAddr(0x0000401c), 0x00000000), - // // reset(2) - // MemoryTransaction::new(4382, ByteAddr(0x0d6b5ac0), 0x2ea10cf3), - // MemoryTransaction::new(4382, ByteAddr(0x0d6b5ac4), 0x41559d09), - // MemoryTransaction::new(4382, ByteAddr(0x0d6b5ac8), 0x032b0b9e), - // MemoryTransaction::new(4382, ByteAddr(0x0d6b5acc), 0xda56a7af), - // MemoryTransaction::new(4383, ByteAddr(0x0d6b5ad0), 0x7c9d8024), - // MemoryTransaction::new(4383, ByteAddr(0x0d6b5ad4), 0x9bfea1c1), - // MemoryTransaction::new(4383, ByteAddr(0x0d6b5ad8), 0xc37b44c3), - // MemoryTransaction::new(4383, ByteAddr(0x0d6b5adc), 0x554f49f5), - // ], - // ); - - // assert_eq!(trace.body.extras.len(), 0); -} - -fn fwd_rev_ab_test(program: Program) { - let image = MemoryImage2::new(program); - - let session = testutil::execute( - image, - DEFAULT_SEGMENT_LIMIT_PO2, - testutil::DEFAULT_SESSION_LIMIT, - &testutil::NullSyscall, - None, - ) - .unwrap(); - - cfg_if::cfg_if! { - if #[cfg(feature = "cuda")] { - use risc0_zkp::hal::cuda::CudaHalPoseidon2; - use crate::prove::hal::cuda::CudaCircuitHalPoseidon2; - let hal = Rc::new(CudaHalPoseidon2::new()); - let circuit_hal = CudaCircuitHalPoseidon2::new(hal.clone()); - // } else if #[cfg(any(all(target_os = "macos", target_arch = "aarch64"), target_os = "ios"))] { - // use risc0_zkp::hal::metal::MetalHalSha256; - // use crate::prove::hal::metal::MetalCircuitHal; - // let hal = Rc::new(MetalHalSha256::new()); - // let circuit_hal = MetalCircuitHal::new(hal.clone()); - } else { - use crate::prove::hal::cpu::CpuCircuitHal; - let suite = Poseidon2HashSuite::new_suite(); - let hal = Rc::new(CpuHal::new(suite)); - let circuit_hal = CpuCircuitHal::new(); - } - } - - let mut rng = thread_rng(); - let rand_z = ExtVal::random(&mut rng); - - let segments = session.segments; - for segment in segments { - tracing::debug!("fwd"); - let fwd_witgen = WitnessGenerator::new( - hal.as_ref(), - &circuit_hal, - &segment, - StepMode::SeqForward, - rand_z, - ) - .unwrap(); - tracing::debug!("rev"); - let rev_witgen = WitnessGenerator::new( - hal.as_ref(), - &circuit_hal, - &segment, - StepMode::SeqReverse, - rand_z, - ) - .unwrap(); - let cycles = 1 << segment.po2; - let fwd_vec = fwd_witgen.data.to_vec(); - let rev_vec = rev_witgen.data.to_vec(); - for row in 0..cycles { - let fwd_row = &fwd_vec[row * REGCOUNT_DATA..row * REGCOUNT_DATA + REGCOUNT_DATA]; - let rev_row = &rev_vec[row * REGCOUNT_DATA..row * REGCOUNT_DATA + REGCOUNT_DATA]; - assert_eq!(fwd_row, rev_row, "cycle: {row}"); - } - } -} - -#[test] -fn fwd_rev_ab_basic() { - fwd_rev_ab_test(testutil::basic()); -} - -#[test] -fn fwd_rev_ab_split() { - fwd_rev_ab_test(testutil::simple_loop(2000)); -} - -// #[test] -// fn fwd_rev_ab_large_text() { -// fwd_rev_ab_test(testutil::large_text()); -// } diff --git a/risc0/circuit/rv32im-v2/src/riscv_tests.rs b/risc0/circuit/rv32im-v2/src/riscv_tests.rs deleted file mode 100644 index 1dc019f3..00000000 --- a/risc0/circuit/rv32im-v2/src/riscv_tests.rs +++ /dev/null @@ -1,124 +0,0 @@ -// Copyright 2024 RISC Zero, Inc. -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -use crate::micro_circuit::CircuitField; -use anyhow::Result; -use risc0_zkp::core::hash::sha::Sha256HashSuite; -use risc0_zkp::hal::{cpu::CpuHal, Hal}; -use risc0_zkvm::{ExecutorEnv, ExecutorImpl}; - -pub fn run_elf(elf: &[u8]) -> Result<()> { - let mut builder = ExecutorEnv::builder(); - let env = builder.build()?; - let mut exec = ExecutorImpl::from_elf(env, elf)?; - let session = exec.run()?; - - let hal = CpuHal::new(Sha256HashSuite::::new_suite()); - - for segment in session.segments { - let segment = segment.resolve()?; - let micro_hal = crate::cpu::MicroCircuitCpuHal::new(&segment); - let seal = crate::prove(&hal, µ_hal, &segment)?; - crate::verify(seal.as_slice(), hal.get_hash_suite())?; - } - Ok(()) -} - -fn run_test(test_name: &str) { - use std::io::Read; - - use flate2::read::GzDecoder; - use tar::Archive; - let bytes = include_bytes!("../testdata/riscv-tests.tgz"); - let gz = GzDecoder::new(&bytes[..]); - let mut tar = Archive::new(gz); - for entry in tar.entries().unwrap() { - let mut entry = entry.unwrap(); - if !entry.header().entry_type().is_file() { - continue; - } - let path = entry.path().unwrap(); - let filename = path.file_name().unwrap().to_str().unwrap(); - if filename != test_name { - continue; - } - let mut elf = Vec::new(); - entry.read_to_end(&mut elf).unwrap(); - - run_elf(elf.as_slice()).expect("Unable to execute elf"); - } -} - -macro_rules! test_case { - ($func_name:ident) => { - #[test_log::test] - #[ignore = "TODO: implement host support for circuit needs"] - #[cfg_attr(feature = "cuda", serial_test::serial)] - fn $func_name() { - if true { - // TODO: Figure out how to ignore this test without - // having cargo try to test it anyways with --ignored. - return; - } - run_test(stringify!($func_name)); - } - }; -} - -test_case!(add); -test_case!(addi); -test_case!(and); -test_case!(andi); -test_case!(auipc); -test_case!(beq); -test_case!(bge); -test_case!(bgeu); -test_case!(blt); -test_case!(bltu); -test_case!(bne); -test_case!(div); -test_case!(divu); -test_case!(jal); -test_case!(jalr); -test_case!(lb); -test_case!(lbu); -test_case!(lh); -test_case!(lhu); -test_case!(lui); -test_case!(lw); -test_case!(mul); -test_case!(mulh); -test_case!(mulhsu); -test_case!(mulhu); -test_case!(or); -test_case!(ori); -test_case!(rem); -test_case!(remu); -test_case!(sb); -test_case!(sh); -test_case!(simple); -test_case!(sll); -test_case!(slli); -test_case!(slt); -test_case!(slti); -test_case!(sltiu); -test_case!(sltu); -test_case!(sra); -test_case!(srai); -test_case!(srl); -test_case!(srli); -test_case!(sub); -test_case!(sw); -test_case!(xor); -test_case!(xori); diff --git a/risc0/circuit/rv32im-v2/src/zirgen/defs.rs.inc b/risc0/circuit/rv32im-v2/src/zirgen/defs.rs.inc deleted file mode 100644 index 72ccd0e7..00000000 --- a/risc0/circuit/rv32im-v2/src/zirgen/defs.rs.inc +++ /dev/null @@ -1,12 +0,0 @@ -set_field!(BabyBear); -define_buffer_list! { -all: [accum,code,data,global,mix,test,], -rows: [accum,code,data,test,], -taps: [accum,code,data,], -globals: [global,mix,],} -define_tap_buffer! {accum, /*count=*/76, /*groupId=*/0} -define_tap_buffer! {code, /*count=*/1, /*groupId=*/1} -define_tap_buffer! {data, /*count=*/192, /*groupId=*/2} -define_global_buffer! {global, /*count=*/73} -define_global_buffer! {mix, /*count=*/32} -define_buffer! {test, /*count=*/192} diff --git a/risc0/circuit/rv32im-v2/src/zirgen/info.rs b/risc0/circuit/rv32im-v2/src/zirgen/info.rs deleted file mode 100644 index f6698036..00000000 --- a/risc0/circuit/rv32im-v2/src/zirgen/info.rs +++ /dev/null @@ -1,58 +0,0 @@ -// Copyright 2024 RISC Zero, Inc. -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -// This code is automatically generated - -use risc0_zkp::adapter::{CircuitInfo, ProtocolInfo}; - -use super::CircuitImpl; - -impl CircuitInfo for CircuitImpl { - #[rustfmt::skip] - const CIRCUIT_INFO: ProtocolInfo = ProtocolInfo(*b"ZIRGEN_TEST_____"); - - #[rustfmt::skip] - const OUTPUT_SIZE: usize = 73; - - #[rustfmt::skip] - const MIX_SIZE: usize = 32; -} - -#[allow(dead_code)] -pub const NUM_POLY_MIX_POWERS: usize = 411; - -#[allow(dead_code)] -pub const POLY_MIX_POWERS: &[usize] = &[ - 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, - 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, - 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, - 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, - 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, - 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127, 128, 129, 130, 131, 132, 133, 134, 135, - 136, 137, 138, 139, 140, 141, 142, 143, 144, 145, 146, 147, 148, 149, 150, 151, 152, 153, 154, - 155, 156, 157, 158, 159, 160, 161, 162, 163, 164, 165, 166, 167, 173, 182, 183, 184, 188, 190, - 197, 198, 199, 200, 201, 202, 203, 204, 205, 206, 207, 208, 209, 210, 211, 212, 213, 214, 215, - 216, 217, 218, 219, 220, 221, 222, 223, 224, 225, 226, 227, 228, 229, 230, 231, 232, 235, 236, - 237, 238, 239, 240, 241, 242, 243, 244, 245, 246, 247, 248, 249, 250, 251, 252, 253, 254, 255, - 256, 257, 258, 259, 260, 261, 262, 263, 264, 265, 266, 267, 268, 269, 270, 271, 272, 273, 274, - 280, 284, 291, 295, 296, 297, 298, 299, 300, 301, 302, 303, 304, 305, 306, 307, 308, 309, 310, - 311, 312, 314, 323, 330, 332, 335, 341, 342, 343, 344, 345, 346, 347, 348, 349, 350, 351, 352, - 353, 354, 355, 356, 357, 358, 359, 360, 361, 362, 363, 364, 365, 366, 367, 368, 369, 370, 371, - 372, 373, 374, 375, 376, 377, 378, 379, 380, 381, 382, 383, 384, 385, 386, 387, 388, 389, 390, - 391, 392, 393, 394, 395, 396, 397, 398, 399, 400, 406, 411, 443, 463, 471, 515, 516, 517, 518, - 519, 520, 521, 522, 523, 524, 525, 526, 527, 528, 529, 530, 531, 532, 533, 534, 611, 704, 705, - 706, 707, 708, 709, 710, 711, 712, 713, 714, 715, 716, 717, 718, 719, 720, 721, 783, 815, 942, - 1013, 1092, 1171, 1343, 1446, 1719, 1853, 1878, 2020, 2168, 3040, 3353, 5207, 5614, 5615, 5616, - 5617, 5618, 5627, 5636, 5645, 5658, 5672, 5681, 5692, 5711, 5719, 5735, -]; diff --git a/risc0/circuit/rv32im-v2/src/zirgen/layout.rs.inc b/risc0/circuit/rv32im-v2/src/zirgen/layout.rs.inc deleted file mode 100644 index 4d2563e7..00000000 --- a/risc0/circuit/rv32im-v2/src/zirgen/layout.rs.inc +++ /dev/null @@ -1,14144 +0,0 @@ -pub const LAYOUT__3: &NondetRegLayout8LayoutArray = &[ - &NondetRegLayout { - _super: &Reg { offset: 19 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 20 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 21 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 22 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 23 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 24 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 25 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 26 }, - }, -]; -pub const LAYOUT__2: &OneHot_8_Layout = &OneHot_8_Layout { _super: LAYOUT__3 }; -pub const LAYOUT__1: &InstInputLayout = &InstInputLayout { - minor_onehot: LAYOUT__2, -}; -pub const LAYOUT__5: &NondetRegLayout11LayoutArray = &[ - &NondetRegLayout { - _super: &Reg { offset: 1 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 2 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 3 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 4 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 5 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 6 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 7 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 8 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 9 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 10 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 11 }, - }, -]; -pub const LAYOUT__4: &OneHot_11_Layout = &OneHot_11_Layout { _super: LAYOUT__5 }; -pub const LAYOUT__10: &NondetU16RegLayout = &NondetU16RegLayout { - arg: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 37 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 38 }, - }, - }, -}; -pub const LAYOUT__11: &NondetU16RegLayout = &NondetU16RegLayout { - arg: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 40 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 41 }, - }, - }, -}; -pub const LAYOUT__9: &NormalizeU32Layout = &NormalizeU32Layout { - low16: LAYOUT__10, - low_carry: &NondetRegLayout { - _super: &Reg { offset: 39 }, - }, - high16: LAYOUT__11, - high_carry: &NondetRegLayout { - _super: &Reg { offset: 42 }, - }, -}; -pub const LAYOUT__13: &NondetU16RegLayout = &NondetU16RegLayout { - arg: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 43 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 44 }, - }, - }, -}; -pub const LAYOUT__14: &NondetU16RegLayout = &NondetU16RegLayout { - arg: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 46 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 47 }, - }, - }, -}; -pub const LAYOUT__12: &NormalizeU32Layout = &NormalizeU32Layout { - low16: LAYOUT__13, - low_carry: &NondetRegLayout { - _super: &Reg { offset: 45 }, - }, - high16: LAYOUT__14, - high_carry: &NondetRegLayout { - _super: &Reg { offset: 48 }, - }, -}; -pub const LAYOUT__18: &MemoryArgLayout = &MemoryArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 53 }, - }, - addr: &NondetRegLayout { - _super: &Reg { offset: 52 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 54 }, - }, - data_low: &NondetRegLayout { - _super: &Reg { offset: 55 }, - }, - data_high: &NondetRegLayout { - _super: &Reg { offset: 56 }, - }, -}; -pub const LAYOUT__19: &MemoryArgLayout = &MemoryArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 57 }, - }, - addr: &NondetRegLayout { - _super: &Reg { offset: 52 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 0 }, - }, - data_low: &NondetRegLayout { - _super: &Reg { offset: 58 }, - }, - data_high: &NondetRegLayout { - _super: &Reg { offset: 59 }, - }, -}; -pub const LAYOUT__17: &MemoryIOLayout = &MemoryIOLayout { - old_txn: LAYOUT__18, - new_txn: LAYOUT__19, -}; -pub const LAYOUT__21: &IsCycleLayout = &IsCycleLayout { - arg: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 60 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 61 }, - }, - }, -}; -pub const LAYOUT__20: &IsForwardLayout = &IsForwardLayout { _0: LAYOUT__21 }; -pub const LAYOUT__16: &MemoryWriteLayout = &MemoryWriteLayout { - io: LAYOUT__17, - _0: LAYOUT__20, -}; -pub const LAYOUT__15: &WriteRdLayout = &WriteRdLayout { - is_rd0: &IsZeroLayout { - _super: &NondetRegLayout { - _super: &Reg { offset: 49 }, - }, - inv: &NondetRegLayout { - _super: &Reg { offset: 50 }, - }, - }, - write_addr: &NondetRegLayout { - _super: &Reg { offset: 51 }, - }, - _0: LAYOUT__16, -}; -pub const LAYOUT__8: &FinalizeMiscLayout = &FinalizeMiscLayout { - write_data: LAYOUT__9, - pc_norm: LAYOUT__12, - _0: LAYOUT__15, -}; -pub const LAYOUT__24: &DecoderLayout = &DecoderLayout { - _f7_6: &NondetRegLayout { - _super: &Reg { offset: 62 }, - }, - _f7_45: &NondetRegLayout { - _super: &Reg { offset: 63 }, - }, - _f7_23: &NondetRegLayout { - _super: &Reg { offset: 64 }, - }, - _f7_01: &NondetRegLayout { - _super: &Reg { offset: 65 }, - }, - _rs2_34: &NondetRegLayout { - _super: &Reg { offset: 66 }, - }, - _rs2_12: &NondetRegLayout { - _super: &Reg { offset: 67 }, - }, - _rs2_0: &NondetRegLayout { - _super: &Reg { offset: 68 }, - }, - _rs1_34: &NondetRegLayout { - _super: &Reg { offset: 69 }, - }, - _rs1_12: &NondetRegLayout { - _super: &Reg { offset: 70 }, - }, - _rs1_0: &NondetRegLayout { - _super: &Reg { offset: 71 }, - }, - _f3_2: &NondetRegLayout { - _super: &Reg { offset: 72 }, - }, - _f3_01: &NondetRegLayout { - _super: &Reg { offset: 73 }, - }, - _rd_34: &NondetRegLayout { - _super: &Reg { offset: 74 }, - }, - _rd_12: &NondetRegLayout { - _super: &Reg { offset: 75 }, - }, - _rd_0: &NondetRegLayout { - _super: &Reg { offset: 76 }, - }, - opcode: &NondetRegLayout { - _super: &Reg { offset: 77 }, - }, -}; -pub const LAYOUT__27: &NondetU16RegLayout = &NondetU16RegLayout { - arg: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 80 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 81 }, - }, - }, -}; -pub const LAYOUT__26: &U16RegLayout = &U16RegLayout { ret: LAYOUT__27 }; -pub const LAYOUT__28: &NondetU16RegLayout = &NondetU16RegLayout { - arg: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 84 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 85 }, - }, - }, -}; -pub const LAYOUT__25: &AddrDecomposeLayout = &AddrDecomposeLayout { - low2: &NondetRegLayout { - _super: &Reg { offset: 79 }, - }, - upper_diff: LAYOUT__26, - _0: &IsZeroLayout { - _super: &NondetRegLayout { - _super: &Reg { offset: 82 }, - }, - inv: &NondetRegLayout { - _super: &Reg { offset: 83 }, - }, - }, - med14: LAYOUT__28, -}; -pub const LAYOUT__31: &MemoryArgLayout = &MemoryArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 87 }, - }, - addr: &NondetRegLayout { - _super: &Reg { offset: 86 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 88 }, - }, - data_low: &NondetRegLayout { - _super: &Reg { offset: 89 }, - }, - data_high: &NondetRegLayout { - _super: &Reg { offset: 90 }, - }, -}; -pub const LAYOUT__32: &MemoryArgLayout = &MemoryArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 91 }, - }, - addr: &NondetRegLayout { - _super: &Reg { offset: 86 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 0 }, - }, - data_low: &NondetRegLayout { - _super: &Reg { offset: 92 }, - }, - data_high: &NondetRegLayout { - _super: &Reg { offset: 93 }, - }, -}; -pub const LAYOUT__30: &MemoryIOLayout = &MemoryIOLayout { - old_txn: LAYOUT__31, - new_txn: LAYOUT__32, -}; -pub const LAYOUT__34: &IsCycleLayout = &IsCycleLayout { - arg: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 94 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 95 }, - }, - }, -}; -pub const LAYOUT__33: &IsForwardLayout = &IsForwardLayout { _0: LAYOUT__34 }; -pub const LAYOUT__29: &MemoryReadLayout = &MemoryReadLayout { - io: LAYOUT__30, - _0: LAYOUT__33, -}; -pub const LAYOUT__23: &DecodeInstLayout = &DecodeInstLayout { - _super: LAYOUT__24, - arg: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 78 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 0 }, - }, - }, - pc_addr: LAYOUT__25, - load_inst: LAYOUT__29, -}; -pub const LAYOUT__38: &MemoryArgLayout = &MemoryArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 97 }, - }, - addr: &NondetRegLayout { - _super: &Reg { offset: 96 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 98 }, - }, - data_low: &NondetRegLayout { - _super: &Reg { offset: 99 }, - }, - data_high: &NondetRegLayout { - _super: &Reg { offset: 100 }, - }, -}; -pub const LAYOUT__39: &MemoryArgLayout = &MemoryArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 101 }, - }, - addr: &NondetRegLayout { - _super: &Reg { offset: 96 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 0 }, - }, - data_low: &NondetRegLayout { - _super: &Reg { offset: 102 }, - }, - data_high: &NondetRegLayout { - _super: &Reg { offset: 103 }, - }, -}; -pub const LAYOUT__37: &MemoryIOLayout = &MemoryIOLayout { - old_txn: LAYOUT__38, - new_txn: LAYOUT__39, -}; -pub const LAYOUT__41: &IsCycleLayout = &IsCycleLayout { - arg: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 104 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 105 }, - }, - }, -}; -pub const LAYOUT__40: &IsForwardLayout = &IsForwardLayout { _0: LAYOUT__41 }; -pub const LAYOUT__36: &MemoryReadLayout = &MemoryReadLayout { - io: LAYOUT__37, - _0: LAYOUT__40, -}; -pub const LAYOUT__35: &ReadRegLayout = &ReadRegLayout { - _super: LAYOUT__36, - addr: &NondetRegLayout { - _super: &Reg { offset: 106 }, - }, -}; -pub const LAYOUT__45: &MemoryArgLayout = &MemoryArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 108 }, - }, - addr: &NondetRegLayout { - _super: &Reg { offset: 107 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 109 }, - }, - data_low: &NondetRegLayout { - _super: &Reg { offset: 110 }, - }, - data_high: &NondetRegLayout { - _super: &Reg { offset: 111 }, - }, -}; -pub const LAYOUT__46: &MemoryArgLayout = &MemoryArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 112 }, - }, - addr: &NondetRegLayout { - _super: &Reg { offset: 107 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 0 }, - }, - data_low: &NondetRegLayout { - _super: &Reg { offset: 113 }, - }, - data_high: &NondetRegLayout { - _super: &Reg { offset: 114 }, - }, -}; -pub const LAYOUT__44: &MemoryIOLayout = &MemoryIOLayout { - old_txn: LAYOUT__45, - new_txn: LAYOUT__46, -}; -pub const LAYOUT__48: &IsCycleLayout = &IsCycleLayout { - arg: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 115 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 116 }, - }, - }, -}; -pub const LAYOUT__47: &IsForwardLayout = &IsForwardLayout { _0: LAYOUT__48 }; -pub const LAYOUT__43: &MemoryReadLayout = &MemoryReadLayout { - io: LAYOUT__44, - _0: LAYOUT__47, -}; -pub const LAYOUT__42: &ReadRegLayout = &ReadRegLayout { - _super: LAYOUT__43, - addr: &NondetRegLayout { - _super: &Reg { offset: 117 }, - }, -}; -pub const LAYOUT__22: &MiscInputLayout = &MiscInputLayout { - decoded: LAYOUT__23, - rs1: LAYOUT__35, - rs2: LAYOUT__42, -}; -pub const LAYOUT__50: &ArgU16Layout5LayoutArray = &[ - &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 27 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 28 }, - }, - }, - &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 29 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 30 }, - }, - }, - &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 31 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 32 }, - }, - }, - &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 33 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 34 }, - }, - }, - &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 35 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 36 }, - }, - }, -]; -pub const LAYOUT__49: &_Arguments_Misc0MiscOutputLayout = &_Arguments_Misc0MiscOutputLayout { - arg_u16: LAYOUT__50, -}; -pub const LAYOUT__52: &Misc0MiscOutputArm0Layout = &Misc0MiscOutputArm0Layout { - _extra0: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 27 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 28 }, - }, - }, - _extra1: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 29 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 30 }, - }, - }, - _extra2: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 31 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 32 }, - }, - }, - _extra3: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 33 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 34 }, - }, - }, - _extra4: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 35 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 36 }, - }, - }, -}; -pub const LAYOUT__53: &Misc0MiscOutputArm1Layout = &Misc0MiscOutputArm1Layout { - _extra0: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 27 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 28 }, - }, - }, - _extra1: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 29 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 30 }, - }, - }, - _extra2: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 31 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 32 }, - }, - }, - _extra3: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 33 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 34 }, - }, - }, - _extra4: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 35 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 36 }, - }, - }, -}; -pub const LAYOUT__60: &NondetRegLayout16LayoutArray = &[ - &NondetRegLayout { - _super: &Reg { offset: 118 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 119 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 120 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 121 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 122 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 123 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 124 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 125 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 126 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 127 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 128 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 129 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 130 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 131 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 132 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 133 }, - }, -]; -pub const LAYOUT__59: &ToBits_16_Layout = &ToBits_16_Layout { _super: LAYOUT__60 }; -pub const LAYOUT__62: &NondetRegLayout16LayoutArray = &[ - &NondetRegLayout { - _super: &Reg { offset: 134 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 135 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 136 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 137 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 138 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 139 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 140 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 141 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 142 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 143 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 144 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 145 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 146 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 147 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 148 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 149 }, - }, -]; -pub const LAYOUT__61: &ToBits_16_Layout = &ToBits_16_Layout { _super: LAYOUT__62 }; -pub const LAYOUT__58: &BitwiseAndU16Layout = &BitwiseAndU16Layout { - bits_x: LAYOUT__59, - bits_y: LAYOUT__61, -}; -pub const LAYOUT__65: &NondetRegLayout16LayoutArray = &[ - &NondetRegLayout { - _super: &Reg { offset: 150 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 151 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 152 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 153 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 154 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 155 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 156 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 157 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 158 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 159 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 160 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 161 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 162 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 163 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 164 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 165 }, - }, -]; -pub const LAYOUT__64: &ToBits_16_Layout = &ToBits_16_Layout { _super: LAYOUT__65 }; -pub const LAYOUT__67: &NondetRegLayout16LayoutArray = &[ - &NondetRegLayout { - _super: &Reg { offset: 166 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 167 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 168 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 169 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 170 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 171 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 172 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 173 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 174 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 175 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 176 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 177 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 178 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 179 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 180 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 181 }, - }, -]; -pub const LAYOUT__66: &ToBits_16_Layout = &ToBits_16_Layout { _super: LAYOUT__67 }; -pub const LAYOUT__63: &BitwiseAndU16Layout = &BitwiseAndU16Layout { - bits_x: LAYOUT__64, - bits_y: LAYOUT__66, -}; -pub const LAYOUT__57: &BitwiseAndLayout = &BitwiseAndLayout { - _0: LAYOUT__58, - _1: LAYOUT__63, -}; -pub const LAYOUT__56: &BitwiseXorLayout = &BitwiseXorLayout { and_xy: LAYOUT__57 }; -pub const LAYOUT__55: &OpXORLayout = &OpXORLayout { _0: LAYOUT__56 }; -pub const LAYOUT__54: &Misc0MiscOutputArm2Layout = &Misc0MiscOutputArm2Layout { - _super: LAYOUT__55, - _extra0: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 27 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 28 }, - }, - }, - _extra1: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 29 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 30 }, - }, - }, - _extra2: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 31 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 32 }, - }, - }, - _extra3: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 33 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 34 }, - }, - }, - _extra4: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 35 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 36 }, - }, - }, -}; -pub const LAYOUT__70: &BitwiseOrLayout = &BitwiseOrLayout { and_xy: LAYOUT__57 }; -pub const LAYOUT__69: &OpORLayout = &OpORLayout { _0: LAYOUT__70 }; -pub const LAYOUT__68: &Misc0MiscOutputArm3Layout = &Misc0MiscOutputArm3Layout { - _super: LAYOUT__69, - _extra0: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 27 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 28 }, - }, - }, - _extra1: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 29 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 30 }, - }, - }, - _extra2: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 31 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 32 }, - }, - }, - _extra3: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 33 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 34 }, - }, - }, - _extra4: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 35 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 36 }, - }, - }, -}; -pub const LAYOUT__72: &OpANDLayout = &OpANDLayout { _0: LAYOUT__57 }; -pub const LAYOUT__71: &Misc0MiscOutputArm4Layout = &Misc0MiscOutputArm4Layout { - _super: LAYOUT__72, - _extra0: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 27 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 28 }, - }, - }, - _extra1: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 29 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 30 }, - }, - }, - _extra2: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 31 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 32 }, - }, - }, - _extra3: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 33 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 34 }, - }, - }, - _extra4: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 35 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 36 }, - }, - }, -}; -pub const LAYOUT__76: &NondetU16RegLayout = &NondetU16RegLayout { - arg: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 27 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 28 }, - }, - }, -}; -pub const LAYOUT__77: &NondetU16RegLayout = &NondetU16RegLayout { - arg: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 29 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 30 }, - }, - }, -}; -pub const LAYOUT__75: &NormalizeU32Layout = &NormalizeU32Layout { - low16: LAYOUT__76, - low_carry: &NondetRegLayout { - _super: &Reg { offset: 118 }, - }, - high16: LAYOUT__77, - high_carry: &NondetRegLayout { - _super: &Reg { offset: 119 }, - }, -}; -pub const LAYOUT__79: &NondetU16RegLayout = &NondetU16RegLayout { - arg: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 31 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 32 }, - }, - }, -}; -pub const LAYOUT__78: &GetSignU32Layout = &GetSignU32Layout { - _super: &NondetRegLayout { - _super: &Reg { offset: 120 }, - }, - rest_times_two: LAYOUT__79, -}; -pub const LAYOUT__81: &NondetU16RegLayout = &NondetU16RegLayout { - arg: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 33 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 34 }, - }, - }, -}; -pub const LAYOUT__80: &GetSignU32Layout = &GetSignU32Layout { - _super: &NondetRegLayout { - _super: &Reg { offset: 121 }, - }, - rest_times_two: LAYOUT__81, -}; -pub const LAYOUT__83: &NondetU16RegLayout = &NondetU16RegLayout { - arg: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 35 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 36 }, - }, - }, -}; -pub const LAYOUT__82: &GetSignU32Layout = &GetSignU32Layout { - _super: &NondetRegLayout { - _super: &Reg { offset: 122 }, - }, - rest_times_two: LAYOUT__83, -}; -pub const LAYOUT__74: &CmpLessThanLayout = &CmpLessThanLayout { - diff: LAYOUT__75, - s1: LAYOUT__78, - s2: LAYOUT__80, - s3: LAYOUT__82, - overflow: &NondetRegLayout { - _super: &Reg { offset: 123 }, - }, - is_less_than: &NondetRegLayout { - _super: &Reg { offset: 124 }, - }, -}; -pub const LAYOUT__73: &OpSLTLayout = &OpSLTLayout { cmp: LAYOUT__74 }; -pub const LAYOUT__86: &CmpLessThanUnsignedLayout = &CmpLessThanUnsignedLayout { diff: LAYOUT__75 }; -pub const LAYOUT__85: &OpSLTULayout = &OpSLTULayout { cmp: LAYOUT__86 }; -pub const LAYOUT__84: &Misc0MiscOutputArm6Layout = &Misc0MiscOutputArm6Layout { - _super: LAYOUT__85, - _extra0: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 31 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 32 }, - }, - }, - _extra1: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 33 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 34 }, - }, - }, - _extra2: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 35 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 36 }, - }, - }, -}; -pub const LAYOUT__87: &Misc0MiscOutputArm7Layout = &Misc0MiscOutputArm7Layout { - _extra0: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 27 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 28 }, - }, - }, - _extra1: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 29 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 30 }, - }, - }, - _extra2: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 31 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 32 }, - }, - }, - _extra3: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 33 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 34 }, - }, - }, - _extra4: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 35 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 36 }, - }, - }, -}; -pub const LAYOUT__51: &Misc0MiscOutputLayout = &Misc0MiscOutputLayout { - arm0: LAYOUT__52, - arm1: LAYOUT__53, - arm2: LAYOUT__54, - arm3: LAYOUT__68, - arm4: LAYOUT__71, - arm5: LAYOUT__73, - arm6: LAYOUT__84, - arm7: LAYOUT__87, -}; -pub const LAYOUT__7: &Misc0Layout = &Misc0Layout { - _super: LAYOUT__8, - input: LAYOUT__22, - _arguments_misc0_misc_output: LAYOUT__49, - misc_output: LAYOUT__51, -}; -pub const LAYOUT__89: &_Arguments_Misc1MiscOutputLayout = &_Arguments_Misc1MiscOutputLayout { - arg_u16: LAYOUT__50, -}; -pub const LAYOUT__92: &OpXORILayout = &OpXORILayout { _0: LAYOUT__56 }; -pub const LAYOUT__91: &Misc1MiscOutputArm0Layout = &Misc1MiscOutputArm0Layout { - _super: LAYOUT__92, - _extra0: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 27 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 28 }, - }, - }, - _extra1: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 29 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 30 }, - }, - }, - _extra2: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 31 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 32 }, - }, - }, - _extra3: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 33 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 34 }, - }, - }, - _extra4: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 35 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 36 }, - }, - }, -}; -pub const LAYOUT__94: &OpORILayout = &OpORILayout { _0: LAYOUT__70 }; -pub const LAYOUT__93: &Misc1MiscOutputArm1Layout = &Misc1MiscOutputArm1Layout { - _super: LAYOUT__94, - _extra0: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 27 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 28 }, - }, - }, - _extra1: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 29 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 30 }, - }, - }, - _extra2: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 31 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 32 }, - }, - }, - _extra3: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 33 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 34 }, - }, - }, - _extra4: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 35 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 36 }, - }, - }, -}; -pub const LAYOUT__96: &OpANDILayout = &OpANDILayout { _0: LAYOUT__57 }; -pub const LAYOUT__95: &Misc1MiscOutputArm2Layout = &Misc1MiscOutputArm2Layout { - _super: LAYOUT__96, - _extra0: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 27 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 28 }, - }, - }, - _extra1: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 29 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 30 }, - }, - }, - _extra2: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 31 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 32 }, - }, - }, - _extra3: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 33 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 34 }, - }, - }, - _extra4: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 35 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 36 }, - }, - }, -}; -pub const LAYOUT__97: &OpSLTILayout = &OpSLTILayout { cmp: LAYOUT__74 }; -pub const LAYOUT__99: &OpSLTIULayout = &OpSLTIULayout { cmp: LAYOUT__86 }; -pub const LAYOUT__98: &Misc1MiscOutputArm4Layout = &Misc1MiscOutputArm4Layout { - _super: LAYOUT__99, - _extra0: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 31 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 32 }, - }, - }, - _extra1: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 33 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 34 }, - }, - }, - _extra2: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 35 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 36 }, - }, - }, -}; -pub const LAYOUT__102: &CmpEqualLayout = &CmpEqualLayout { - low_same: &IsZeroLayout { - _super: &NondetRegLayout { - _super: &Reg { offset: 118 }, - }, - inv: &NondetRegLayout { - _super: &Reg { offset: 119 }, - }, - }, - high_same: &IsZeroLayout { - _super: &NondetRegLayout { - _super: &Reg { offset: 120 }, - }, - inv: &NondetRegLayout { - _super: &Reg { offset: 121 }, - }, - }, - is_equal: &NondetRegLayout { - _super: &Reg { offset: 122 }, - }, -}; -pub const LAYOUT__101: &OpBEQLayout = &OpBEQLayout { cmp: LAYOUT__102 }; -pub const LAYOUT__100: &Misc1MiscOutputArm5Layout = &Misc1MiscOutputArm5Layout { - _super: LAYOUT__101, - _extra0: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 27 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 28 }, - }, - }, - _extra1: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 29 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 30 }, - }, - }, - _extra2: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 31 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 32 }, - }, - }, - _extra3: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 33 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 34 }, - }, - }, - _extra4: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 35 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 36 }, - }, - }, -}; -pub const LAYOUT__104: &OpBNELayout = &OpBNELayout { cmp: LAYOUT__102 }; -pub const LAYOUT__103: &Misc1MiscOutputArm6Layout = &Misc1MiscOutputArm6Layout { - _super: LAYOUT__104, - _extra0: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 27 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 28 }, - }, - }, - _extra1: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 29 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 30 }, - }, - }, - _extra2: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 31 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 32 }, - }, - }, - _extra3: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 33 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 34 }, - }, - }, - _extra4: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 35 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 36 }, - }, - }, -}; -pub const LAYOUT__105: &OpBLTLayout = &OpBLTLayout { cmp: LAYOUT__74 }; -pub const LAYOUT__90: &Misc1MiscOutputLayout = &Misc1MiscOutputLayout { - arm0: LAYOUT__91, - arm1: LAYOUT__93, - arm2: LAYOUT__95, - arm3: LAYOUT__97, - arm4: LAYOUT__98, - arm5: LAYOUT__100, - arm6: LAYOUT__103, - arm7: LAYOUT__105, -}; -pub const LAYOUT__88: &Misc1Layout = &Misc1Layout { - _super: LAYOUT__8, - input: LAYOUT__22, - _arguments_misc1_misc_output: LAYOUT__89, - misc_output: LAYOUT__90, -}; -pub const LAYOUT__107: &_Arguments_Misc2MiscOutputLayout = &_Arguments_Misc2MiscOutputLayout { - arg_u16: LAYOUT__50, -}; -pub const LAYOUT__109: &OpBGELayout = &OpBGELayout { cmp: LAYOUT__74 }; -pub const LAYOUT__111: &OpBLTULayout = &OpBLTULayout { cmp: LAYOUT__86 }; -pub const LAYOUT__110: &Misc2MiscOutputArm1Layout = &Misc2MiscOutputArm1Layout { - _super: LAYOUT__111, - _extra0: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 31 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 32 }, - }, - }, - _extra1: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 33 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 34 }, - }, - }, - _extra2: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 35 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 36 }, - }, - }, -}; -pub const LAYOUT__113: &OpBGEULayout = &OpBGEULayout { cmp: LAYOUT__86 }; -pub const LAYOUT__112: &Misc2MiscOutputArm2Layout = &Misc2MiscOutputArm2Layout { - _super: LAYOUT__113, - _extra0: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 31 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 32 }, - }, - }, - _extra1: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 33 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 34 }, - }, - }, - _extra2: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 35 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 36 }, - }, - }, -}; -pub const LAYOUT__114: &Misc2MiscOutputArm3Layout = &Misc2MiscOutputArm3Layout { - _extra0: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 27 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 28 }, - }, - }, - _extra1: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 29 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 30 }, - }, - }, - _extra2: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 31 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 32 }, - }, - }, - _extra3: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 33 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 34 }, - }, - }, - _extra4: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 35 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 36 }, - }, - }, -}; -pub const LAYOUT__115: &Misc2MiscOutputArm4Layout = &Misc2MiscOutputArm4Layout { - _extra0: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 27 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 28 }, - }, - }, - _extra1: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 29 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 30 }, - }, - }, - _extra2: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 31 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 32 }, - }, - }, - _extra3: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 33 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 34 }, - }, - }, - _extra4: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 35 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 36 }, - }, - }, -}; -pub const LAYOUT__116: &Misc2MiscOutputArm5Layout = &Misc2MiscOutputArm5Layout { - _extra0: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 27 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 28 }, - }, - }, - _extra1: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 29 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 30 }, - }, - }, - _extra2: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 31 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 32 }, - }, - }, - _extra3: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 33 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 34 }, - }, - }, - _extra4: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 35 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 36 }, - }, - }, -}; -pub const LAYOUT__117: &Misc2MiscOutputArm6Layout = &Misc2MiscOutputArm6Layout { - _extra0: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 27 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 28 }, - }, - }, - _extra1: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 29 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 30 }, - }, - }, - _extra2: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 31 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 32 }, - }, - }, - _extra3: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 33 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 34 }, - }, - }, - _extra4: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 35 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 36 }, - }, - }, -}; -pub const LAYOUT__118: &Misc2MiscOutputArm7Layout = &Misc2MiscOutputArm7Layout { - _extra0: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 27 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 28 }, - }, - }, - _extra1: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 29 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 30 }, - }, - }, - _extra2: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 31 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 32 }, - }, - }, - _extra3: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 33 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 34 }, - }, - }, - _extra4: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 35 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 36 }, - }, - }, -}; -pub const LAYOUT__108: &Misc2MiscOutputLayout = &Misc2MiscOutputLayout { - arm0: LAYOUT__109, - arm1: LAYOUT__110, - arm2: LAYOUT__112, - arm3: LAYOUT__114, - arm4: LAYOUT__115, - arm5: LAYOUT__116, - arm6: LAYOUT__117, - arm7: LAYOUT__118, -}; -pub const LAYOUT__106: &Misc2Layout = &Misc2Layout { - _super: LAYOUT__8, - input: LAYOUT__22, - _arguments_misc2_misc_output: LAYOUT__107, - misc_output: LAYOUT__108, -}; -pub const LAYOUT__122: &DecoderLayout = &DecoderLayout { - _f7_6: &NondetRegLayout { - _super: &Reg { offset: 65 }, - }, - _f7_45: &NondetRegLayout { - _super: &Reg { offset: 66 }, - }, - _f7_23: &NondetRegLayout { - _super: &Reg { offset: 67 }, - }, - _f7_01: &NondetRegLayout { - _super: &Reg { offset: 68 }, - }, - _rs2_34: &NondetRegLayout { - _super: &Reg { offset: 69 }, - }, - _rs2_12: &NondetRegLayout { - _super: &Reg { offset: 70 }, - }, - _rs2_0: &NondetRegLayout { - _super: &Reg { offset: 71 }, - }, - _rs1_34: &NondetRegLayout { - _super: &Reg { offset: 72 }, - }, - _rs1_12: &NondetRegLayout { - _super: &Reg { offset: 73 }, - }, - _rs1_0: &NondetRegLayout { - _super: &Reg { offset: 74 }, - }, - _f3_2: &NondetRegLayout { - _super: &Reg { offset: 75 }, - }, - _f3_01: &NondetRegLayout { - _super: &Reg { offset: 76 }, - }, - _rd_34: &NondetRegLayout { - _super: &Reg { offset: 77 }, - }, - _rd_12: &NondetRegLayout { - _super: &Reg { offset: 78 }, - }, - _rd_0: &NondetRegLayout { - _super: &Reg { offset: 79 }, - }, - opcode: &NondetRegLayout { - _super: &Reg { offset: 80 }, - }, -}; -pub const LAYOUT__125: &NondetU16RegLayout = &NondetU16RegLayout { - arg: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 83 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 84 }, - }, - }, -}; -pub const LAYOUT__124: &U16RegLayout = &U16RegLayout { ret: LAYOUT__125 }; -pub const LAYOUT__126: &NondetU16RegLayout = &NondetU16RegLayout { - arg: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 87 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 88 }, - }, - }, -}; -pub const LAYOUT__123: &AddrDecomposeLayout = &AddrDecomposeLayout { - low2: &NondetRegLayout { - _super: &Reg { offset: 82 }, - }, - upper_diff: LAYOUT__124, - _0: &IsZeroLayout { - _super: &NondetRegLayout { - _super: &Reg { offset: 85 }, - }, - inv: &NondetRegLayout { - _super: &Reg { offset: 86 }, - }, - }, - med14: LAYOUT__126, -}; -pub const LAYOUT__129: &MemoryArgLayout = &MemoryArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 90 }, - }, - addr: &NondetRegLayout { - _super: &Reg { offset: 89 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 91 }, - }, - data_low: &NondetRegLayout { - _super: &Reg { offset: 92 }, - }, - data_high: &NondetRegLayout { - _super: &Reg { offset: 93 }, - }, -}; -pub const LAYOUT__130: &MemoryArgLayout = &MemoryArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 94 }, - }, - addr: &NondetRegLayout { - _super: &Reg { offset: 89 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 0 }, - }, - data_low: &NondetRegLayout { - _super: &Reg { offset: 95 }, - }, - data_high: &NondetRegLayout { - _super: &Reg { offset: 96 }, - }, -}; -pub const LAYOUT__128: &MemoryIOLayout = &MemoryIOLayout { - old_txn: LAYOUT__129, - new_txn: LAYOUT__130, -}; -pub const LAYOUT__132: &IsCycleLayout = &IsCycleLayout { - arg: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 97 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 98 }, - }, - }, -}; -pub const LAYOUT__131: &IsForwardLayout = &IsForwardLayout { _0: LAYOUT__132 }; -pub const LAYOUT__127: &MemoryReadLayout = &MemoryReadLayout { - io: LAYOUT__128, - _0: LAYOUT__131, -}; -pub const LAYOUT__121: &DecodeInstLayout = &DecodeInstLayout { - _super: LAYOUT__122, - arg: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 81 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 0 }, - }, - }, - pc_addr: LAYOUT__123, - load_inst: LAYOUT__127, -}; -pub const LAYOUT__136: &MemoryArgLayout = &MemoryArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 100 }, - }, - addr: &NondetRegLayout { - _super: &Reg { offset: 99 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 101 }, - }, - data_low: &NondetRegLayout { - _super: &Reg { offset: 102 }, - }, - data_high: &NondetRegLayout { - _super: &Reg { offset: 103 }, - }, -}; -pub const LAYOUT__137: &MemoryArgLayout = &MemoryArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 104 }, - }, - addr: &NondetRegLayout { - _super: &Reg { offset: 99 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 0 }, - }, - data_low: &NondetRegLayout { - _super: &Reg { offset: 105 }, - }, - data_high: &NondetRegLayout { - _super: &Reg { offset: 106 }, - }, -}; -pub const LAYOUT__135: &MemoryIOLayout = &MemoryIOLayout { - old_txn: LAYOUT__136, - new_txn: LAYOUT__137, -}; -pub const LAYOUT__139: &IsCycleLayout = &IsCycleLayout { - arg: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 107 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 108 }, - }, - }, -}; -pub const LAYOUT__138: &IsForwardLayout = &IsForwardLayout { _0: LAYOUT__139 }; -pub const LAYOUT__134: &MemoryReadLayout = &MemoryReadLayout { - io: LAYOUT__135, - _0: LAYOUT__138, -}; -pub const LAYOUT__133: &ReadRegLayout = &ReadRegLayout { - _super: LAYOUT__134, - addr: &NondetRegLayout { - _super: &Reg { offset: 109 }, - }, -}; -pub const LAYOUT__143: &MemoryArgLayout = &MemoryArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 111 }, - }, - addr: &NondetRegLayout { - _super: &Reg { offset: 110 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 112 }, - }, - data_low: &NondetRegLayout { - _super: &Reg { offset: 113 }, - }, - data_high: &NondetRegLayout { - _super: &Reg { offset: 114 }, - }, -}; -pub const LAYOUT__144: &MemoryArgLayout = &MemoryArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 115 }, - }, - addr: &NondetRegLayout { - _super: &Reg { offset: 110 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 0 }, - }, - data_low: &NondetRegLayout { - _super: &Reg { offset: 116 }, - }, - data_high: &NondetRegLayout { - _super: &Reg { offset: 117 }, - }, -}; -pub const LAYOUT__142: &MemoryIOLayout = &MemoryIOLayout { - old_txn: LAYOUT__143, - new_txn: LAYOUT__144, -}; -pub const LAYOUT__146: &IsCycleLayout = &IsCycleLayout { - arg: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 118 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 119 }, - }, - }, -}; -pub const LAYOUT__145: &IsForwardLayout = &IsForwardLayout { _0: LAYOUT__146 }; -pub const LAYOUT__141: &MemoryReadLayout = &MemoryReadLayout { - io: LAYOUT__142, - _0: LAYOUT__145, -}; -pub const LAYOUT__140: &ReadRegLayout = &ReadRegLayout { - _super: LAYOUT__141, - addr: &NondetRegLayout { - _super: &Reg { offset: 120 }, - }, -}; -pub const LAYOUT__120: &MulInputLayout = &MulInputLayout { - decoded: LAYOUT__121, - rs1: LAYOUT__133, - rs2: LAYOUT__140, -}; -pub const LAYOUT__148: &ArgU16Layout6LayoutArray = &[ - &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 27 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 28 }, - }, - }, - &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 29 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 30 }, - }, - }, - &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 31 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 32 }, - }, - }, - &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 33 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 34 }, - }, - }, - &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 35 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 36 }, - }, - }, - &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 37 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 38 }, - }, - }, -]; -pub const LAYOUT__149: &ArgU8Layout13LayoutArray = &[ - &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 39 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 40 }, - }, - }, - &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 41 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 42 }, - }, - }, - &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 43 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 44 }, - }, - }, - &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 45 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 46 }, - }, - }, - &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 47 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 48 }, - }, - }, - &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 49 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 50 }, - }, - }, - &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 51 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 52 }, - }, - }, - &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 53 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 54 }, - }, - }, - &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 55 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 56 }, - }, - }, - &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 57 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 58 }, - }, - }, - &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 59 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 60 }, - }, - }, - &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 61 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 62 }, - }, - }, - &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 63 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 64 }, - }, - }, -]; -pub const LAYOUT__147: &_Arguments_Mul0MulOutputLayout = &_Arguments_Mul0MulOutputLayout { - arg_u16: LAYOUT__148, - arg_u8: LAYOUT__149, -}; -pub const LAYOUT__154: &NondetRegLayout5LayoutArray = &[ - &NondetRegLayout { - _super: &Reg { offset: 121 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 122 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 123 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 124 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 125 }, - }, -]; -pub const LAYOUT__153: &ToBits_5_Layout = &ToBits_5_Layout { - _super: LAYOUT__154, -}; -pub const LAYOUT__152: &DynPo2Layout = &DynPo2Layout { - low5: LAYOUT__153, - check_u16: LAYOUT__76, - b3: &NondetRegLayout { - _super: &Reg { offset: 126 }, - }, - low: &NondetRegLayout { - _super: &Reg { offset: 127 }, - }, - high: &NondetRegLayout { - _super: &Reg { offset: 128 }, - }, -}; -pub const LAYOUT__158: &NondetU8RegLayout = &NondetU8RegLayout { - arg: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 39 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 40 }, - }, - }, -}; -pub const LAYOUT__159: &NondetU8RegLayout = &NondetU8RegLayout { - arg: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 41 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 42 }, - }, - }, -}; -pub const LAYOUT__160: &NondetU8RegLayout = &NondetU8RegLayout { - arg: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 43 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 44 }, - }, - }, -}; -pub const LAYOUT__161: &NondetU8RegLayout = &NondetU8RegLayout { - arg: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 45 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 46 }, - }, - }, -}; -pub const LAYOUT__162: &NondetU8RegLayout = &NondetU8RegLayout { - arg: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 47 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 48 }, - }, - }, -}; -pub const LAYOUT__157: &ExpandU32Layout = &ExpandU32Layout { - b0: LAYOUT__158, - b1: LAYOUT__159, - b2: LAYOUT__160, - b3: LAYOUT__161, - b3_top7times2: LAYOUT__162, - top_bit: &NondetRegLayout { - _super: &Reg { offset: 129 }, - }, -}; -pub const LAYOUT__164: &NondetU8RegLayout = &NondetU8RegLayout { - arg: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 49 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 50 }, - }, - }, -}; -pub const LAYOUT__165: &NondetU8RegLayout = &NondetU8RegLayout { - arg: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 51 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 52 }, - }, - }, -}; -pub const LAYOUT__166: &NondetU8RegLayout = &NondetU8RegLayout { - arg: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 53 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 54 }, - }, - }, -}; -pub const LAYOUT__167: &NondetU8RegLayout = &NondetU8RegLayout { - arg: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 55 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 56 }, - }, - }, -}; -pub const LAYOUT__168: &NondetU8RegLayout = &NondetU8RegLayout { - arg: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 57 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 58 }, - }, - }, -}; -pub const LAYOUT__163: &ExpandU32Layout = &ExpandU32Layout { - b0: LAYOUT__164, - b1: LAYOUT__165, - b2: LAYOUT__166, - b3: LAYOUT__167, - b3_top7times2: LAYOUT__168, - top_bit: &NondetRegLayout { - _super: &Reg { offset: 130 }, - }, -}; -pub const LAYOUT__170: &NondetU8RegLayout = &NondetU8RegLayout { - arg: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 59 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 60 }, - }, - }, -}; -pub const LAYOUT__169: &SplitTotalLayout = &SplitTotalLayout { - out: LAYOUT__79, - carry_byte: LAYOUT__170, - carry_extra: &NondetFakeTwitRegLayout { - reg0: &NondetRegLayout { - _super: &Reg { offset: 132 }, - }, - reg1: &NondetRegLayout { - _super: &Reg { offset: 133 }, - }, - }, -}; -pub const LAYOUT__172: &NondetU8RegLayout = &NondetU8RegLayout { - arg: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 61 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 62 }, - }, - }, -}; -pub const LAYOUT__171: &SplitTotalLayout = &SplitTotalLayout { - out: LAYOUT__81, - carry_byte: LAYOUT__172, - carry_extra: &NondetFakeTwitRegLayout { - reg0: &NondetRegLayout { - _super: &Reg { offset: 134 }, - }, - reg1: &NondetRegLayout { - _super: &Reg { offset: 135 }, - }, - }, -}; -pub const LAYOUT__174: &NondetU8RegLayout = &NondetU8RegLayout { - arg: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 63 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 64 }, - }, - }, -}; -pub const LAYOUT__173: &SplitTotalLayout = &SplitTotalLayout { - out: LAYOUT__83, - carry_byte: LAYOUT__174, - carry_extra: &NondetFakeTwitRegLayout { - reg0: &NondetRegLayout { - _super: &Reg { offset: 136 }, - }, - reg1: &NondetRegLayout { - _super: &Reg { offset: 137 }, - }, - }, -}; -pub const LAYOUT__156: &MultiplyAccumulateLayout = &MultiplyAccumulateLayout { - ax: LAYOUT__157, - bx: LAYOUT__163, - c_sign: &NondetRegLayout { - _super: &Reg { offset: 131 }, - }, - c_rest_times2: LAYOUT__77, - s0: LAYOUT__169, - s1: LAYOUT__171, - s2: LAYOUT__173, - s3_out: LAYOUT__10, - s3_carry: &NondetFakeTwitRegLayout { - reg0: &NondetRegLayout { - _super: &Reg { offset: 138 }, - }, - reg1: &NondetRegLayout { - _super: &Reg { offset: 139 }, - }, - }, -}; -pub const LAYOUT__155: &DoMulLayout = &DoMulLayout { mul: LAYOUT__156 }; -pub const LAYOUT__151: &OpSLLLayout = &OpSLLLayout { - shift_mul: LAYOUT__152, - _0: LAYOUT__155, -}; -pub const LAYOUT__175: &OpSLLILayout = &OpSLLILayout { - shift_mul: LAYOUT__152, - _0: LAYOUT__155, -}; -pub const LAYOUT__180: &ExpandU32Layout = &ExpandU32Layout { - b0: LAYOUT__158, - b1: LAYOUT__159, - b2: LAYOUT__160, - b3: LAYOUT__161, - b3_top7times2: LAYOUT__162, - top_bit: &NondetRegLayout { - _super: &Reg { offset: 121 }, - }, -}; -pub const LAYOUT__181: &ExpandU32Layout = &ExpandU32Layout { - b0: LAYOUT__164, - b1: LAYOUT__165, - b2: LAYOUT__166, - b3: LAYOUT__167, - b3_top7times2: LAYOUT__168, - top_bit: &NondetRegLayout { - _super: &Reg { offset: 122 }, - }, -}; -pub const LAYOUT__182: &SplitTotalLayout = &SplitTotalLayout { - out: LAYOUT__77, - carry_byte: LAYOUT__170, - carry_extra: &NondetFakeTwitRegLayout { - reg0: &NondetRegLayout { - _super: &Reg { offset: 124 }, - }, - reg1: &NondetRegLayout { - _super: &Reg { offset: 125 }, - }, - }, -}; -pub const LAYOUT__183: &SplitTotalLayout = &SplitTotalLayout { - out: LAYOUT__79, - carry_byte: LAYOUT__172, - carry_extra: &NondetFakeTwitRegLayout { - reg0: &NondetRegLayout { - _super: &Reg { offset: 126 }, - }, - reg1: &NondetRegLayout { - _super: &Reg { offset: 127 }, - }, - }, -}; -pub const LAYOUT__184: &SplitTotalLayout = &SplitTotalLayout { - out: LAYOUT__81, - carry_byte: LAYOUT__174, - carry_extra: &NondetFakeTwitRegLayout { - reg0: &NondetRegLayout { - _super: &Reg { offset: 128 }, - }, - reg1: &NondetRegLayout { - _super: &Reg { offset: 129 }, - }, - }, -}; -pub const LAYOUT__179: &MultiplyAccumulateLayout = &MultiplyAccumulateLayout { - ax: LAYOUT__180, - bx: LAYOUT__181, - c_sign: &NondetRegLayout { - _super: &Reg { offset: 123 }, - }, - c_rest_times2: LAYOUT__76, - s0: LAYOUT__182, - s1: LAYOUT__183, - s2: LAYOUT__184, - s3_out: LAYOUT__83, - s3_carry: &NondetFakeTwitRegLayout { - reg0: &NondetRegLayout { - _super: &Reg { offset: 130 }, - }, - reg1: &NondetRegLayout { - _super: &Reg { offset: 131 }, - }, - }, -}; -pub const LAYOUT__178: &DoMulLayout = &DoMulLayout { mul: LAYOUT__179 }; -pub const LAYOUT__177: &OpMULLayout = &OpMULLayout { _0: LAYOUT__178 }; -pub const LAYOUT__176: &Mul0MulOutputArm2Layout = &Mul0MulOutputArm2Layout { - _super: LAYOUT__177, - _extra0: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 37 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 38 }, - }, - }, -}; -pub const LAYOUT__186: &OpMULHLayout = &OpMULHLayout { _0: LAYOUT__178 }; -pub const LAYOUT__185: &Mul0MulOutputArm3Layout = &Mul0MulOutputArm3Layout { - _super: LAYOUT__186, - _extra0: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 37 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 38 }, - }, - }, -}; -pub const LAYOUT__188: &OpMULHSULayout = &OpMULHSULayout { _0: LAYOUT__178 }; -pub const LAYOUT__187: &Mul0MulOutputArm4Layout = &Mul0MulOutputArm4Layout { - _super: LAYOUT__188, - _extra0: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 37 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 38 }, - }, - }, -}; -pub const LAYOUT__190: &OpMULHULayout = &OpMULHULayout { _0: LAYOUT__178 }; -pub const LAYOUT__189: &Mul0MulOutputArm5Layout = &Mul0MulOutputArm5Layout { - _super: LAYOUT__190, - _extra0: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 37 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 38 }, - }, - }, -}; -pub const LAYOUT__191: &Mul0MulOutputArm6Layout = &Mul0MulOutputArm6Layout { - _extra0: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 27 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 28 }, - }, - }, - _extra1: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 29 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 30 }, - }, - }, - _extra2: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 31 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 32 }, - }, - }, - _extra3: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 33 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 34 }, - }, - }, - _extra4: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 35 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 36 }, - }, - }, - _extra5: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 37 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 38 }, - }, - }, - _extra6: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 39 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 40 }, - }, - }, - _extra7: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 41 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 42 }, - }, - }, - _extra8: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 43 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 44 }, - }, - }, - _extra9: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 45 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 46 }, - }, - }, - _extra10: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 47 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 48 }, - }, - }, - _extra11: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 49 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 50 }, - }, - }, - _extra12: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 51 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 52 }, - }, - }, - _extra13: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 53 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 54 }, - }, - }, - _extra14: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 55 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 56 }, - }, - }, - _extra15: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 57 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 58 }, - }, - }, - _extra16: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 59 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 60 }, - }, - }, - _extra17: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 61 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 62 }, - }, - }, - _extra18: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 63 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 64 }, - }, - }, -}; -pub const LAYOUT__192: &Mul0MulOutputArm7Layout = &Mul0MulOutputArm7Layout { - _extra0: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 27 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 28 }, - }, - }, - _extra1: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 29 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 30 }, - }, - }, - _extra2: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 31 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 32 }, - }, - }, - _extra3: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 33 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 34 }, - }, - }, - _extra4: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 35 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 36 }, - }, - }, - _extra5: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 37 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 38 }, - }, - }, - _extra6: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 39 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 40 }, - }, - }, - _extra7: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 41 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 42 }, - }, - }, - _extra8: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 43 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 44 }, - }, - }, - _extra9: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 45 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 46 }, - }, - }, - _extra10: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 47 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 48 }, - }, - }, - _extra11: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 49 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 50 }, - }, - }, - _extra12: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 51 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 52 }, - }, - }, - _extra13: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 53 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 54 }, - }, - }, - _extra14: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 55 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 56 }, - }, - }, - _extra15: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 57 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 58 }, - }, - }, - _extra16: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 59 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 60 }, - }, - }, - _extra17: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 61 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 62 }, - }, - }, - _extra18: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 63 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 64 }, - }, - }, -}; -pub const LAYOUT__150: &Mul0MulOutputLayout = &Mul0MulOutputLayout { - arm0: LAYOUT__151, - arm1: LAYOUT__175, - arm2: LAYOUT__176, - arm3: LAYOUT__185, - arm4: LAYOUT__187, - arm5: LAYOUT__189, - arm6: LAYOUT__191, - arm7: LAYOUT__192, -}; -pub const LAYOUT__196: &MemoryArgLayout = &MemoryArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 144 }, - }, - addr: &NondetRegLayout { - _super: &Reg { offset: 143 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 145 }, - }, - data_low: &NondetRegLayout { - _super: &Reg { offset: 146 }, - }, - data_high: &NondetRegLayout { - _super: &Reg { offset: 147 }, - }, -}; -pub const LAYOUT__197: &MemoryArgLayout = &MemoryArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 148 }, - }, - addr: &NondetRegLayout { - _super: &Reg { offset: 143 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 0 }, - }, - data_low: &NondetRegLayout { - _super: &Reg { offset: 149 }, - }, - data_high: &NondetRegLayout { - _super: &Reg { offset: 150 }, - }, -}; -pub const LAYOUT__195: &MemoryIOLayout = &MemoryIOLayout { - old_txn: LAYOUT__196, - new_txn: LAYOUT__197, -}; -pub const LAYOUT__199: &IsCycleLayout = &IsCycleLayout { - arg: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 151 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 152 }, - }, - }, -}; -pub const LAYOUT__198: &IsForwardLayout = &IsForwardLayout { _0: LAYOUT__199 }; -pub const LAYOUT__194: &MemoryWriteLayout = &MemoryWriteLayout { - io: LAYOUT__195, - _0: LAYOUT__198, -}; -pub const LAYOUT__193: &WriteRdLayout = &WriteRdLayout { - is_rd0: &IsZeroLayout { - _super: &NondetRegLayout { - _super: &Reg { offset: 140 }, - }, - inv: &NondetRegLayout { - _super: &Reg { offset: 141 }, - }, - }, - write_addr: &NondetRegLayout { - _super: &Reg { offset: 142 }, - }, - _0: LAYOUT__194, -}; -pub const LAYOUT__201: &NondetU16RegLayout = &NondetU16RegLayout { - arg: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 153 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 154 }, - }, - }, -}; -pub const LAYOUT__202: &NondetU16RegLayout = &NondetU16RegLayout { - arg: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 156 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 157 }, - }, - }, -}; -pub const LAYOUT__200: &NormalizeU32Layout = &NormalizeU32Layout { - low16: LAYOUT__201, - low_carry: &NondetRegLayout { - _super: &Reg { offset: 155 }, - }, - high16: LAYOUT__202, - high_carry: &NondetRegLayout { - _super: &Reg { offset: 158 }, - }, -}; -pub const LAYOUT__119: &Mul0Layout = &Mul0Layout { - input: LAYOUT__120, - _arguments_mul0_mul_output: LAYOUT__147, - mul_output: LAYOUT__150, - _0: LAYOUT__193, - pc_add: LAYOUT__200, -}; -pub const LAYOUT__206: &DecoderLayout = &DecoderLayout { - _f7_6: &NondetRegLayout { - _super: &Reg { offset: 71 }, - }, - _f7_45: &NondetRegLayout { - _super: &Reg { offset: 72 }, - }, - _f7_23: &NondetRegLayout { - _super: &Reg { offset: 73 }, - }, - _f7_01: &NondetRegLayout { - _super: &Reg { offset: 74 }, - }, - _rs2_34: &NondetRegLayout { - _super: &Reg { offset: 75 }, - }, - _rs2_12: &NondetRegLayout { - _super: &Reg { offset: 76 }, - }, - _rs2_0: &NondetRegLayout { - _super: &Reg { offset: 77 }, - }, - _rs1_34: &NondetRegLayout { - _super: &Reg { offset: 78 }, - }, - _rs1_12: &NondetRegLayout { - _super: &Reg { offset: 79 }, - }, - _rs1_0: &NondetRegLayout { - _super: &Reg { offset: 80 }, - }, - _f3_2: &NondetRegLayout { - _super: &Reg { offset: 81 }, - }, - _f3_01: &NondetRegLayout { - _super: &Reg { offset: 82 }, - }, - _rd_34: &NondetRegLayout { - _super: &Reg { offset: 83 }, - }, - _rd_12: &NondetRegLayout { - _super: &Reg { offset: 84 }, - }, - _rd_0: &NondetRegLayout { - _super: &Reg { offset: 85 }, - }, - opcode: &NondetRegLayout { - _super: &Reg { offset: 86 }, - }, -}; -pub const LAYOUT__209: &NondetU16RegLayout = &NondetU16RegLayout { - arg: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 89 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 90 }, - }, - }, -}; -pub const LAYOUT__208: &U16RegLayout = &U16RegLayout { ret: LAYOUT__209 }; -pub const LAYOUT__210: &NondetU16RegLayout = &NondetU16RegLayout { - arg: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 93 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 94 }, - }, - }, -}; -pub const LAYOUT__207: &AddrDecomposeLayout = &AddrDecomposeLayout { - low2: &NondetRegLayout { - _super: &Reg { offset: 88 }, - }, - upper_diff: LAYOUT__208, - _0: &IsZeroLayout { - _super: &NondetRegLayout { - _super: &Reg { offset: 91 }, - }, - inv: &NondetRegLayout { - _super: &Reg { offset: 92 }, - }, - }, - med14: LAYOUT__210, -}; -pub const LAYOUT__213: &MemoryArgLayout = &MemoryArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 96 }, - }, - addr: &NondetRegLayout { - _super: &Reg { offset: 95 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 97 }, - }, - data_low: &NondetRegLayout { - _super: &Reg { offset: 98 }, - }, - data_high: &NondetRegLayout { - _super: &Reg { offset: 99 }, - }, -}; -pub const LAYOUT__214: &MemoryArgLayout = &MemoryArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 100 }, - }, - addr: &NondetRegLayout { - _super: &Reg { offset: 95 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 0 }, - }, - data_low: &NondetRegLayout { - _super: &Reg { offset: 101 }, - }, - data_high: &NondetRegLayout { - _super: &Reg { offset: 102 }, - }, -}; -pub const LAYOUT__212: &MemoryIOLayout = &MemoryIOLayout { - old_txn: LAYOUT__213, - new_txn: LAYOUT__214, -}; -pub const LAYOUT__216: &IsCycleLayout = &IsCycleLayout { - arg: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 103 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 104 }, - }, - }, -}; -pub const LAYOUT__215: &IsForwardLayout = &IsForwardLayout { _0: LAYOUT__216 }; -pub const LAYOUT__211: &MemoryReadLayout = &MemoryReadLayout { - io: LAYOUT__212, - _0: LAYOUT__215, -}; -pub const LAYOUT__205: &DecodeInstLayout = &DecodeInstLayout { - _super: LAYOUT__206, - arg: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 87 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 0 }, - }, - }, - pc_addr: LAYOUT__207, - load_inst: LAYOUT__211, -}; -pub const LAYOUT__220: &MemoryArgLayout = &MemoryArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 106 }, - }, - addr: &NondetRegLayout { - _super: &Reg { offset: 105 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 107 }, - }, - data_low: &NondetRegLayout { - _super: &Reg { offset: 108 }, - }, - data_high: &NondetRegLayout { - _super: &Reg { offset: 109 }, - }, -}; -pub const LAYOUT__221: &MemoryArgLayout = &MemoryArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 110 }, - }, - addr: &NondetRegLayout { - _super: &Reg { offset: 105 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 0 }, - }, - data_low: &NondetRegLayout { - _super: &Reg { offset: 111 }, - }, - data_high: &NondetRegLayout { - _super: &Reg { offset: 112 }, - }, -}; -pub const LAYOUT__219: &MemoryIOLayout = &MemoryIOLayout { - old_txn: LAYOUT__220, - new_txn: LAYOUT__221, -}; -pub const LAYOUT__223: &IsCycleLayout = &IsCycleLayout { - arg: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 113 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 114 }, - }, - }, -}; -pub const LAYOUT__222: &IsForwardLayout = &IsForwardLayout { _0: LAYOUT__223 }; -pub const LAYOUT__218: &MemoryReadLayout = &MemoryReadLayout { - io: LAYOUT__219, - _0: LAYOUT__222, -}; -pub const LAYOUT__217: &ReadRegLayout = &ReadRegLayout { - _super: LAYOUT__218, - addr: &NondetRegLayout { - _super: &Reg { offset: 115 }, - }, -}; -pub const LAYOUT__227: &MemoryArgLayout = &MemoryArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 117 }, - }, - addr: &NondetRegLayout { - _super: &Reg { offset: 116 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 118 }, - }, - data_low: &NondetRegLayout { - _super: &Reg { offset: 119 }, - }, - data_high: &NondetRegLayout { - _super: &Reg { offset: 120 }, - }, -}; -pub const LAYOUT__228: &MemoryArgLayout = &MemoryArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 121 }, - }, - addr: &NondetRegLayout { - _super: &Reg { offset: 116 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 0 }, - }, - data_low: &NondetRegLayout { - _super: &Reg { offset: 122 }, - }, - data_high: &NondetRegLayout { - _super: &Reg { offset: 123 }, - }, -}; -pub const LAYOUT__226: &MemoryIOLayout = &MemoryIOLayout { - old_txn: LAYOUT__227, - new_txn: LAYOUT__228, -}; -pub const LAYOUT__230: &IsCycleLayout = &IsCycleLayout { - arg: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 124 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 125 }, - }, - }, -}; -pub const LAYOUT__229: &IsForwardLayout = &IsForwardLayout { _0: LAYOUT__230 }; -pub const LAYOUT__225: &MemoryReadLayout = &MemoryReadLayout { - io: LAYOUT__226, - _0: LAYOUT__229, -}; -pub const LAYOUT__224: &ReadRegLayout = &ReadRegLayout { - _super: LAYOUT__225, - addr: &NondetRegLayout { - _super: &Reg { offset: 126 }, - }, -}; -pub const LAYOUT__204: &DivInputLayout = &DivInputLayout { - decoded: LAYOUT__205, - rs1: LAYOUT__217, - rs2: LAYOUT__224, -}; -pub const LAYOUT__232: &ArgU16Layout9LayoutArray = &[ - &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 27 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 28 }, - }, - }, - &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 29 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 30 }, - }, - }, - &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 31 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 32 }, - }, - }, - &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 33 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 34 }, - }, - }, - &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 35 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 36 }, - }, - }, - &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 37 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 38 }, - }, - }, - &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 39 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 40 }, - }, - }, - &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 41 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 42 }, - }, - }, - &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 43 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 44 }, - }, - }, -]; -pub const LAYOUT__233: &ArgU8Layout13LayoutArray = &[ - &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 45 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 46 }, - }, - }, - &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 47 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 48 }, - }, - }, - &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 49 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 50 }, - }, - }, - &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 51 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 52 }, - }, - }, - &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 53 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 54 }, - }, - }, - &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 55 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 56 }, - }, - }, - &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 57 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 58 }, - }, - }, - &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 59 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 60 }, - }, - }, - &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 61 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 62 }, - }, - }, - &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 63 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 64 }, - }, - }, - &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 65 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 66 }, - }, - }, - &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 67 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 68 }, - }, - }, - &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 69 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 70 }, - }, - }, -]; -pub const LAYOUT__231: &_Arguments_Div0MulOutputLayout = &_Arguments_Div0MulOutputLayout { - arg_u16: LAYOUT__232, - arg_u8: LAYOUT__233, -}; -pub const LAYOUT__239: &NondetRegLayout5LayoutArray = &[ - &NondetRegLayout { - _super: &Reg { offset: 127 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 128 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 129 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 130 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 131 }, - }, -]; -pub const LAYOUT__238: &ToBits_5_Layout = &ToBits_5_Layout { - _super: LAYOUT__239, -}; -pub const LAYOUT__237: &DynPo2Layout = &DynPo2Layout { - low5: LAYOUT__238, - check_u16: LAYOUT__76, - b3: &NondetRegLayout { - _super: &Reg { offset: 132 }, - }, - low: &NondetRegLayout { - _super: &Reg { offset: 133 }, - }, - high: &NondetRegLayout { - _super: &Reg { offset: 134 }, - }, -}; -pub const LAYOUT__242: &ExpandU32Layout = &ExpandU32Layout { - b0: LAYOUT__161, - b1: LAYOUT__162, - b2: LAYOUT__164, - b3: LAYOUT__165, - b3_top7times2: LAYOUT__166, - top_bit: &NondetRegLayout { - _super: &Reg { offset: 137 }, - }, -}; -pub const LAYOUT__243: &ExpandU32Layout = &ExpandU32Layout { - b0: LAYOUT__167, - b1: LAYOUT__168, - b2: LAYOUT__170, - b3: LAYOUT__172, - b3_top7times2: LAYOUT__174, - top_bit: &NondetRegLayout { - _super: &Reg { offset: 138 }, - }, -}; -pub const LAYOUT__245: &NondetU8RegLayout = &NondetU8RegLayout { - arg: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 65 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 66 }, - }, - }, -}; -pub const LAYOUT__244: &SplitTotalLayout = &SplitTotalLayout { - out: LAYOUT__83, - carry_byte: LAYOUT__245, - carry_extra: &NondetFakeTwitRegLayout { - reg0: &NondetRegLayout { - _super: &Reg { offset: 140 }, - }, - reg1: &NondetRegLayout { - _super: &Reg { offset: 141 }, - }, - }, -}; -pub const LAYOUT__247: &NondetU8RegLayout = &NondetU8RegLayout { - arg: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 67 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 68 }, - }, - }, -}; -pub const LAYOUT__246: &SplitTotalLayout = &SplitTotalLayout { - out: LAYOUT__10, - carry_byte: LAYOUT__247, - carry_extra: &NondetFakeTwitRegLayout { - reg0: &NondetRegLayout { - _super: &Reg { offset: 142 }, - }, - reg1: &NondetRegLayout { - _super: &Reg { offset: 143 }, - }, - }, -}; -pub const LAYOUT__249: &NondetU16RegLayout = &NondetU16RegLayout { - arg: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 39 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 40 }, - }, - }, -}; -pub const LAYOUT__250: &NondetU8RegLayout = &NondetU8RegLayout { - arg: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 69 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 70 }, - }, - }, -}; -pub const LAYOUT__248: &SplitTotalLayout = &SplitTotalLayout { - out: LAYOUT__249, - carry_byte: LAYOUT__250, - carry_extra: &NondetFakeTwitRegLayout { - reg0: &NondetRegLayout { - _super: &Reg { offset: 144 }, - }, - reg1: &NondetRegLayout { - _super: &Reg { offset: 145 }, - }, - }, -}; -pub const LAYOUT__251: &NondetU16RegLayout = &NondetU16RegLayout { - arg: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 41 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 42 }, - }, - }, -}; -pub const LAYOUT__241: &MultiplyAccumulateLayout = &MultiplyAccumulateLayout { - ax: LAYOUT__242, - bx: LAYOUT__243, - c_sign: &NondetRegLayout { - _super: &Reg { offset: 139 }, - }, - c_rest_times2: LAYOUT__81, - s0: LAYOUT__244, - s1: LAYOUT__246, - s2: LAYOUT__248, - s3_out: LAYOUT__251, - s3_carry: &NondetFakeTwitRegLayout { - reg0: &NondetRegLayout { - _super: &Reg { offset: 146 }, - }, - reg1: &NondetRegLayout { - _super: &Reg { offset: 147 }, - }, - }, -}; -pub const LAYOUT__240: &DoDivLayout = &DoDivLayout { - quot_low: &NondetRegLayout { - _super: &Reg { offset: 135 }, - }, - quot_high: &NondetRegLayout { - _super: &Reg { offset: 136 }, - }, - rem_low: LAYOUT__77, - rem_high: LAYOUT__79, - mul: LAYOUT__241, - top_bit_type: &NondetRegLayout { - _super: &Reg { offset: 148 }, - }, -}; -pub const LAYOUT__236: &OpSRLLayout = &OpSRLLayout { - shift_mul: LAYOUT__237, - _0: LAYOUT__240, -}; -pub const LAYOUT__235: &Div0MulOutputArm0Layout = &Div0MulOutputArm0Layout { - _super: LAYOUT__236, - _extra0: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 43 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 44 }, - }, - }, -}; -pub const LAYOUT__253: &TopBitLayout = &TopBitLayout { - _super: &NondetRegLayout { - _super: &Reg { offset: 135 }, - }, - rest: LAYOUT__77, -}; -pub const LAYOUT__256: &ExpandU32Layout = &ExpandU32Layout { - b0: LAYOUT__161, - b1: LAYOUT__162, - b2: LAYOUT__164, - b3: LAYOUT__165, - b3_top7times2: LAYOUT__166, - top_bit: &NondetRegLayout { - _super: &Reg { offset: 138 }, - }, -}; -pub const LAYOUT__257: &ExpandU32Layout = &ExpandU32Layout { - b0: LAYOUT__167, - b1: LAYOUT__168, - b2: LAYOUT__170, - b3: LAYOUT__172, - b3_top7times2: LAYOUT__174, - top_bit: &NondetRegLayout { - _super: &Reg { offset: 139 }, - }, -}; -pub const LAYOUT__258: &SplitTotalLayout = &SplitTotalLayout { - out: LAYOUT__10, - carry_byte: LAYOUT__245, - carry_extra: &NondetFakeTwitRegLayout { - reg0: &NondetRegLayout { - _super: &Reg { offset: 141 }, - }, - reg1: &NondetRegLayout { - _super: &Reg { offset: 142 }, - }, - }, -}; -pub const LAYOUT__259: &SplitTotalLayout = &SplitTotalLayout { - out: LAYOUT__249, - carry_byte: LAYOUT__247, - carry_extra: &NondetFakeTwitRegLayout { - reg0: &NondetRegLayout { - _super: &Reg { offset: 143 }, - }, - reg1: &NondetRegLayout { - _super: &Reg { offset: 144 }, - }, - }, -}; -pub const LAYOUT__260: &SplitTotalLayout = &SplitTotalLayout { - out: LAYOUT__251, - carry_byte: LAYOUT__250, - carry_extra: &NondetFakeTwitRegLayout { - reg0: &NondetRegLayout { - _super: &Reg { offset: 145 }, - }, - reg1: &NondetRegLayout { - _super: &Reg { offset: 146 }, - }, - }, -}; -pub const LAYOUT__255: &MultiplyAccumulateLayout = &MultiplyAccumulateLayout { - ax: LAYOUT__256, - bx: LAYOUT__257, - c_sign: &NondetRegLayout { - _super: &Reg { offset: 140 }, - }, - c_rest_times2: LAYOUT__83, - s0: LAYOUT__258, - s1: LAYOUT__259, - s2: LAYOUT__260, - s3_out: LAYOUT__13, - s3_carry: &NondetFakeTwitRegLayout { - reg0: &NondetRegLayout { - _super: &Reg { offset: 147 }, - }, - reg1: &NondetRegLayout { - _super: &Reg { offset: 148 }, - }, - }, -}; -pub const LAYOUT__254: &DoDivLayout = &DoDivLayout { - quot_low: &NondetRegLayout { - _super: &Reg { offset: 136 }, - }, - quot_high: &NondetRegLayout { - _super: &Reg { offset: 137 }, - }, - rem_low: LAYOUT__79, - rem_high: LAYOUT__81, - mul: LAYOUT__255, - top_bit_type: &NondetRegLayout { - _super: &Reg { offset: 149 }, - }, -}; -pub const LAYOUT__252: &OpSRALayout = &OpSRALayout { - shift_mul: LAYOUT__237, - flip: LAYOUT__253, - _0: LAYOUT__254, -}; -pub const LAYOUT__262: &OpSRLILayout = &OpSRLILayout { - shift_mul: LAYOUT__237, - _0: LAYOUT__240, -}; -pub const LAYOUT__261: &Div0MulOutputArm2Layout = &Div0MulOutputArm2Layout { - _super: LAYOUT__262, - _extra0: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 43 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 44 }, - }, - }, -}; -pub const LAYOUT__263: &OpSRAILayout = &OpSRAILayout { - shift_mul: LAYOUT__237, - flip: LAYOUT__253, - _0: LAYOUT__254, -}; -pub const LAYOUT__268: &ExpandU32Layout = &ExpandU32Layout { - b0: LAYOUT__161, - b1: LAYOUT__162, - b2: LAYOUT__164, - b3: LAYOUT__165, - b3_top7times2: LAYOUT__166, - top_bit: &NondetRegLayout { - _super: &Reg { offset: 129 }, - }, -}; -pub const LAYOUT__269: &ExpandU32Layout = &ExpandU32Layout { - b0: LAYOUT__167, - b1: LAYOUT__168, - b2: LAYOUT__170, - b3: LAYOUT__172, - b3_top7times2: LAYOUT__174, - top_bit: &NondetRegLayout { - _super: &Reg { offset: 130 }, - }, -}; -pub const LAYOUT__270: &SplitTotalLayout = &SplitTotalLayout { - out: LAYOUT__81, - carry_byte: LAYOUT__245, - carry_extra: &NondetFakeTwitRegLayout { - reg0: &NondetRegLayout { - _super: &Reg { offset: 132 }, - }, - reg1: &NondetRegLayout { - _super: &Reg { offset: 133 }, - }, - }, -}; -pub const LAYOUT__271: &SplitTotalLayout = &SplitTotalLayout { - out: LAYOUT__83, - carry_byte: LAYOUT__247, - carry_extra: &NondetFakeTwitRegLayout { - reg0: &NondetRegLayout { - _super: &Reg { offset: 134 }, - }, - reg1: &NondetRegLayout { - _super: &Reg { offset: 135 }, - }, - }, -}; -pub const LAYOUT__272: &SplitTotalLayout = &SplitTotalLayout { - out: LAYOUT__10, - carry_byte: LAYOUT__250, - carry_extra: &NondetFakeTwitRegLayout { - reg0: &NondetRegLayout { - _super: &Reg { offset: 136 }, - }, - reg1: &NondetRegLayout { - _super: &Reg { offset: 137 }, - }, - }, -}; -pub const LAYOUT__267: &MultiplyAccumulateLayout = &MultiplyAccumulateLayout { - ax: LAYOUT__268, - bx: LAYOUT__269, - c_sign: &NondetRegLayout { - _super: &Reg { offset: 131 }, - }, - c_rest_times2: LAYOUT__79, - s0: LAYOUT__270, - s1: LAYOUT__271, - s2: LAYOUT__272, - s3_out: LAYOUT__249, - s3_carry: &NondetFakeTwitRegLayout { - reg0: &NondetRegLayout { - _super: &Reg { offset: 138 }, - }, - reg1: &NondetRegLayout { - _super: &Reg { offset: 139 }, - }, - }, -}; -pub const LAYOUT__266: &DoDivLayout = &DoDivLayout { - quot_low: &NondetRegLayout { - _super: &Reg { offset: 127 }, - }, - quot_high: &NondetRegLayout { - _super: &Reg { offset: 128 }, - }, - rem_low: LAYOUT__76, - rem_high: LAYOUT__77, - mul: LAYOUT__267, - top_bit_type: &NondetRegLayout { - _super: &Reg { offset: 140 }, - }, -}; -pub const LAYOUT__265: &OpDIVLayout = &OpDIVLayout { _0: LAYOUT__266 }; -pub const LAYOUT__264: &Div0MulOutputArm4Layout = &Div0MulOutputArm4Layout { - _super: LAYOUT__265, - _extra0: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 41 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 42 }, - }, - }, - _extra1: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 43 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 44 }, - }, - }, -}; -pub const LAYOUT__274: &OpDIVULayout = &OpDIVULayout { _0: LAYOUT__266 }; -pub const LAYOUT__273: &Div0MulOutputArm5Layout = &Div0MulOutputArm5Layout { - _super: LAYOUT__274, - _extra0: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 41 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 42 }, - }, - }, - _extra1: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 43 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 44 }, - }, - }, -}; -pub const LAYOUT__276: &OpREMLayout = &OpREMLayout { _0: LAYOUT__266 }; -pub const LAYOUT__275: &Div0MulOutputArm6Layout = &Div0MulOutputArm6Layout { - _super: LAYOUT__276, - _extra0: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 41 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 42 }, - }, - }, - _extra1: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 43 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 44 }, - }, - }, -}; -pub const LAYOUT__278: &OpREMULayout = &OpREMULayout { _0: LAYOUT__266 }; -pub const LAYOUT__277: &Div0MulOutputArm7Layout = &Div0MulOutputArm7Layout { - _super: LAYOUT__278, - _extra0: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 41 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 42 }, - }, - }, - _extra1: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 43 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 44 }, - }, - }, -}; -pub const LAYOUT__234: &Div0MulOutputLayout = &Div0MulOutputLayout { - arm0: LAYOUT__235, - arm1: LAYOUT__252, - arm2: LAYOUT__261, - arm3: LAYOUT__263, - arm4: LAYOUT__264, - arm5: LAYOUT__273, - arm6: LAYOUT__275, - arm7: LAYOUT__277, -}; -pub const LAYOUT__282: &MemoryArgLayout = &MemoryArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 154 }, - }, - addr: &NondetRegLayout { - _super: &Reg { offset: 153 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 155 }, - }, - data_low: &NondetRegLayout { - _super: &Reg { offset: 156 }, - }, - data_high: &NondetRegLayout { - _super: &Reg { offset: 157 }, - }, -}; -pub const LAYOUT__283: &MemoryArgLayout = &MemoryArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 158 }, - }, - addr: &NondetRegLayout { - _super: &Reg { offset: 153 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 0 }, - }, - data_low: &NondetRegLayout { - _super: &Reg { offset: 159 }, - }, - data_high: &NondetRegLayout { - _super: &Reg { offset: 160 }, - }, -}; -pub const LAYOUT__281: &MemoryIOLayout = &MemoryIOLayout { - old_txn: LAYOUT__282, - new_txn: LAYOUT__283, -}; -pub const LAYOUT__285: &IsCycleLayout = &IsCycleLayout { - arg: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 161 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 162 }, - }, - }, -}; -pub const LAYOUT__284: &IsForwardLayout = &IsForwardLayout { _0: LAYOUT__285 }; -pub const LAYOUT__280: &MemoryWriteLayout = &MemoryWriteLayout { - io: LAYOUT__281, - _0: LAYOUT__284, -}; -pub const LAYOUT__279: &WriteRdLayout = &WriteRdLayout { - is_rd0: &IsZeroLayout { - _super: &NondetRegLayout { - _super: &Reg { offset: 150 }, - }, - inv: &NondetRegLayout { - _super: &Reg { offset: 151 }, - }, - }, - write_addr: &NondetRegLayout { - _super: &Reg { offset: 152 }, - }, - _0: LAYOUT__280, -}; -pub const LAYOUT__287: &NondetU16RegLayout = &NondetU16RegLayout { - arg: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 163 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 164 }, - }, - }, -}; -pub const LAYOUT__288: &NondetU16RegLayout = &NondetU16RegLayout { - arg: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 166 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 167 }, - }, - }, -}; -pub const LAYOUT__286: &NormalizeU32Layout = &NormalizeU32Layout { - low16: LAYOUT__287, - low_carry: &NondetRegLayout { - _super: &Reg { offset: 165 }, - }, - high16: LAYOUT__288, - high_carry: &NondetRegLayout { - _super: &Reg { offset: 168 }, - }, -}; -pub const LAYOUT__203: &Div0Layout = &Div0Layout { - input: LAYOUT__204, - _arguments_div0_mul_output: LAYOUT__231, - mul_output: LAYOUT__234, - _0: LAYOUT__279, - pc_add: LAYOUT__286, -}; -pub const LAYOUT__292: &DecoderLayout = &DecoderLayout { - _f7_6: &NondetRegLayout { - _super: &Reg { offset: 33 }, - }, - _f7_45: &NondetRegLayout { - _super: &Reg { offset: 34 }, - }, - _f7_23: &NondetRegLayout { - _super: &Reg { offset: 35 }, - }, - _f7_01: &NondetRegLayout { - _super: &Reg { offset: 36 }, - }, - _rs2_34: &NondetRegLayout { - _super: &Reg { offset: 37 }, - }, - _rs2_12: &NondetRegLayout { - _super: &Reg { offset: 38 }, - }, - _rs2_0: &NondetRegLayout { - _super: &Reg { offset: 39 }, - }, - _rs1_34: &NondetRegLayout { - _super: &Reg { offset: 40 }, - }, - _rs1_12: &NondetRegLayout { - _super: &Reg { offset: 41 }, - }, - _rs1_0: &NondetRegLayout { - _super: &Reg { offset: 42 }, - }, - _f3_2: &NondetRegLayout { - _super: &Reg { offset: 43 }, - }, - _f3_01: &NondetRegLayout { - _super: &Reg { offset: 44 }, - }, - _rd_34: &NondetRegLayout { - _super: &Reg { offset: 45 }, - }, - _rd_12: &NondetRegLayout { - _super: &Reg { offset: 46 }, - }, - _rd_0: &NondetRegLayout { - _super: &Reg { offset: 47 }, - }, - opcode: &NondetRegLayout { - _super: &Reg { offset: 48 }, - }, -}; -pub const LAYOUT__295: &NondetU16RegLayout = &NondetU16RegLayout { - arg: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 51 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 52 }, - }, - }, -}; -pub const LAYOUT__294: &U16RegLayout = &U16RegLayout { ret: LAYOUT__295 }; -pub const LAYOUT__296: &NondetU16RegLayout = &NondetU16RegLayout { - arg: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 55 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 56 }, - }, - }, -}; -pub const LAYOUT__293: &AddrDecomposeLayout = &AddrDecomposeLayout { - low2: &NondetRegLayout { - _super: &Reg { offset: 50 }, - }, - upper_diff: LAYOUT__294, - _0: &IsZeroLayout { - _super: &NondetRegLayout { - _super: &Reg { offset: 53 }, - }, - inv: &NondetRegLayout { - _super: &Reg { offset: 54 }, - }, - }, - med14: LAYOUT__296, -}; -pub const LAYOUT__299: &MemoryArgLayout = &MemoryArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 58 }, - }, - addr: &NondetRegLayout { - _super: &Reg { offset: 57 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 59 }, - }, - data_low: &NondetRegLayout { - _super: &Reg { offset: 60 }, - }, - data_high: &NondetRegLayout { - _super: &Reg { offset: 61 }, - }, -}; -pub const LAYOUT__300: &MemoryArgLayout = &MemoryArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 62 }, - }, - addr: &NondetRegLayout { - _super: &Reg { offset: 57 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 0 }, - }, - data_low: &NondetRegLayout { - _super: &Reg { offset: 63 }, - }, - data_high: &NondetRegLayout { - _super: &Reg { offset: 64 }, - }, -}; -pub const LAYOUT__298: &MemoryIOLayout = &MemoryIOLayout { - old_txn: LAYOUT__299, - new_txn: LAYOUT__300, -}; -pub const LAYOUT__302: &IsCycleLayout = &IsCycleLayout { - arg: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 65 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 66 }, - }, - }, -}; -pub const LAYOUT__301: &IsForwardLayout = &IsForwardLayout { _0: LAYOUT__302 }; -pub const LAYOUT__297: &MemoryReadLayout = &MemoryReadLayout { - io: LAYOUT__298, - _0: LAYOUT__301, -}; -pub const LAYOUT__291: &DecodeInstLayout = &DecodeInstLayout { - _super: LAYOUT__292, - arg: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 49 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 0 }, - }, - }, - pc_addr: LAYOUT__293, - load_inst: LAYOUT__297, -}; -pub const LAYOUT__306: &MemoryArgLayout = &MemoryArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 68 }, - }, - addr: &NondetRegLayout { - _super: &Reg { offset: 67 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 69 }, - }, - data_low: &NondetRegLayout { - _super: &Reg { offset: 70 }, - }, - data_high: &NondetRegLayout { - _super: &Reg { offset: 71 }, - }, -}; -pub const LAYOUT__307: &MemoryArgLayout = &MemoryArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 72 }, - }, - addr: &NondetRegLayout { - _super: &Reg { offset: 67 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 0 }, - }, - data_low: &NondetRegLayout { - _super: &Reg { offset: 73 }, - }, - data_high: &NondetRegLayout { - _super: &Reg { offset: 74 }, - }, -}; -pub const LAYOUT__305: &MemoryIOLayout = &MemoryIOLayout { - old_txn: LAYOUT__306, - new_txn: LAYOUT__307, -}; -pub const LAYOUT__309: &IsCycleLayout = &IsCycleLayout { - arg: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 75 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 76 }, - }, - }, -}; -pub const LAYOUT__308: &IsForwardLayout = &IsForwardLayout { _0: LAYOUT__309 }; -pub const LAYOUT__304: &MemoryReadLayout = &MemoryReadLayout { - io: LAYOUT__305, - _0: LAYOUT__308, -}; -pub const LAYOUT__303: &ReadRegLayout = &ReadRegLayout { - _super: LAYOUT__304, - addr: &NondetRegLayout { - _super: &Reg { offset: 77 }, - }, -}; -pub const LAYOUT__311: &NondetU16RegLayout = &NondetU16RegLayout { - arg: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 78 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 79 }, - }, - }, -}; -pub const LAYOUT__312: &NondetU16RegLayout = &NondetU16RegLayout { - arg: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 81 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 82 }, - }, - }, -}; -pub const LAYOUT__310: &NormalizeU32Layout = &NormalizeU32Layout { - low16: LAYOUT__311, - low_carry: &NondetRegLayout { - _super: &Reg { offset: 80 }, - }, - high16: LAYOUT__312, - high_carry: &NondetRegLayout { - _super: &Reg { offset: 83 }, - }, -}; -pub const LAYOUT__315: &NondetU16RegLayout = &NondetU16RegLayout { - arg: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 86 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 87 }, - }, - }, -}; -pub const LAYOUT__314: &U16RegLayout = &U16RegLayout { ret: LAYOUT__315 }; -pub const LAYOUT__316: &NondetU16RegLayout = &NondetU16RegLayout { - arg: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 90 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 91 }, - }, - }, -}; -pub const LAYOUT__313: &AddrDecomposeBitsLayout = &AddrDecomposeBitsLayout { - low0: &NondetRegLayout { - _super: &Reg { offset: 84 }, - }, - low1: &NondetRegLayout { - _super: &Reg { offset: 85 }, - }, - upper_diff: LAYOUT__314, - _0: &IsZeroLayout { - _super: &NondetRegLayout { - _super: &Reg { offset: 88 }, - }, - inv: &NondetRegLayout { - _super: &Reg { offset: 89 }, - }, - }, - med14: LAYOUT__316, -}; -pub const LAYOUT__319: &MemoryArgLayout = &MemoryArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 93 }, - }, - addr: &NondetRegLayout { - _super: &Reg { offset: 92 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 94 }, - }, - data_low: &NondetRegLayout { - _super: &Reg { offset: 95 }, - }, - data_high: &NondetRegLayout { - _super: &Reg { offset: 96 }, - }, -}; -pub const LAYOUT__320: &MemoryArgLayout = &MemoryArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 97 }, - }, - addr: &NondetRegLayout { - _super: &Reg { offset: 92 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 0 }, - }, - data_low: &NondetRegLayout { - _super: &Reg { offset: 98 }, - }, - data_high: &NondetRegLayout { - _super: &Reg { offset: 99 }, - }, -}; -pub const LAYOUT__318: &MemoryIOLayout = &MemoryIOLayout { - old_txn: LAYOUT__319, - new_txn: LAYOUT__320, -}; -pub const LAYOUT__322: &IsCycleLayout = &IsCycleLayout { - arg: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 100 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 101 }, - }, - }, -}; -pub const LAYOUT__321: &IsForwardLayout = &IsForwardLayout { _0: LAYOUT__322 }; -pub const LAYOUT__317: &MemoryReadLayout = &MemoryReadLayout { - io: LAYOUT__318, - _0: LAYOUT__321, -}; -pub const LAYOUT__290: &MemLoadInputLayout = &MemLoadInputLayout { - decoded: LAYOUT__291, - rs1: LAYOUT__303, - addr_u32: LAYOUT__310, - addr: LAYOUT__313, - data_0: LAYOUT__317, -}; -pub const LAYOUT__324: &ArgU8Layout3LayoutArray = &[ - &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 27 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 28 }, - }, - }, - &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 29 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 30 }, - }, - }, - &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 31 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 32 }, - }, - }, -]; -pub const LAYOUT__323: &_Arguments_Mem0OutputLayout = &_Arguments_Mem0OutputLayout { - arg_u8: LAYOUT__324, -}; -pub const LAYOUT__328: &NondetU8RegLayout = &NondetU8RegLayout { - arg: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 27 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 28 }, - }, - }, -}; -pub const LAYOUT__329: &NondetU8RegLayout = &NondetU8RegLayout { - arg: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 29 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 30 }, - }, - }, -}; -pub const LAYOUT__327: &SplitWordLayout = &SplitWordLayout { - byte0: LAYOUT__328, - byte1: LAYOUT__329, -}; -pub const LAYOUT__330: &NondetU8RegLayout = &NondetU8RegLayout { - arg: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 31 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 32 }, - }, - }, -}; -pub const LAYOUT__326: &OpLBLayout = &OpLBLayout { - bytes: LAYOUT__327, - high_bit: &NondetRegLayout { - _super: &Reg { offset: 102 }, - }, - low7x2: LAYOUT__330, -}; -pub const LAYOUT__332: &OpLHLayout = &OpLHLayout { - high_bit: &NondetRegLayout { - _super: &Reg { offset: 102 }, - }, - low15x2: LAYOUT__328, -}; -pub const LAYOUT__331: &Mem0OutputArm1Layout = &Mem0OutputArm1Layout { - _super: LAYOUT__332, - _extra0: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 29 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 30 }, - }, - }, - _extra1: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 31 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 32 }, - }, - }, -}; -pub const LAYOUT__333: &Mem0OutputArm2Layout = &Mem0OutputArm2Layout { - _extra0: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 27 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 28 }, - }, - }, - _extra1: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 29 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 30 }, - }, - }, - _extra2: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 31 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 32 }, - }, - }, -}; -pub const LAYOUT__335: &OpLBULayout = &OpLBULayout { bytes: LAYOUT__327 }; -pub const LAYOUT__334: &Mem0OutputArm3Layout = &Mem0OutputArm3Layout { - _super: LAYOUT__335, - _extra0: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 31 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 32 }, - }, - }, -}; -pub const LAYOUT__336: &Mem0OutputArm4Layout = &Mem0OutputArm4Layout { - _extra0: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 27 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 28 }, - }, - }, - _extra1: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 29 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 30 }, - }, - }, - _extra2: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 31 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 32 }, - }, - }, -}; -pub const LAYOUT__337: &Mem0OutputArm5Layout = &Mem0OutputArm5Layout { - _extra0: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 27 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 28 }, - }, - }, - _extra1: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 29 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 30 }, - }, - }, - _extra2: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 31 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 32 }, - }, - }, -}; -pub const LAYOUT__338: &Mem0OutputArm6Layout = &Mem0OutputArm6Layout { - _extra0: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 27 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 28 }, - }, - }, - _extra1: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 29 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 30 }, - }, - }, - _extra2: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 31 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 32 }, - }, - }, -}; -pub const LAYOUT__339: &Mem0OutputArm7Layout = &Mem0OutputArm7Layout { - _extra0: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 27 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 28 }, - }, - }, - _extra1: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 29 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 30 }, - }, - }, - _extra2: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 31 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 32 }, - }, - }, -}; -pub const LAYOUT__325: &Mem0OutputLayout = &Mem0OutputLayout { - arm0: LAYOUT__326, - arm1: LAYOUT__331, - arm2: LAYOUT__333, - arm3: LAYOUT__334, - arm4: LAYOUT__336, - arm5: LAYOUT__337, - arm6: LAYOUT__338, - arm7: LAYOUT__339, -}; -pub const LAYOUT__343: &MemoryArgLayout = &MemoryArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 107 }, - }, - addr: &NondetRegLayout { - _super: &Reg { offset: 106 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 108 }, - }, - data_low: &NondetRegLayout { - _super: &Reg { offset: 109 }, - }, - data_high: &NondetRegLayout { - _super: &Reg { offset: 110 }, - }, -}; -pub const LAYOUT__344: &MemoryArgLayout = &MemoryArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 111 }, - }, - addr: &NondetRegLayout { - _super: &Reg { offset: 106 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 0 }, - }, - data_low: &NondetRegLayout { - _super: &Reg { offset: 112 }, - }, - data_high: &NondetRegLayout { - _super: &Reg { offset: 113 }, - }, -}; -pub const LAYOUT__342: &MemoryIOLayout = &MemoryIOLayout { - old_txn: LAYOUT__343, - new_txn: LAYOUT__344, -}; -pub const LAYOUT__346: &IsCycleLayout = &IsCycleLayout { - arg: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 114 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 115 }, - }, - }, -}; -pub const LAYOUT__345: &IsForwardLayout = &IsForwardLayout { _0: LAYOUT__346 }; -pub const LAYOUT__341: &MemoryWriteLayout = &MemoryWriteLayout { - io: LAYOUT__342, - _0: LAYOUT__345, -}; -pub const LAYOUT__340: &WriteRdLayout = &WriteRdLayout { - is_rd0: &IsZeroLayout { - _super: &NondetRegLayout { - _super: &Reg { offset: 103 }, - }, - inv: &NondetRegLayout { - _super: &Reg { offset: 104 }, - }, - }, - write_addr: &NondetRegLayout { - _super: &Reg { offset: 105 }, - }, - _0: LAYOUT__341, -}; -pub const LAYOUT__348: &NondetU16RegLayout = &NondetU16RegLayout { - arg: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 116 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 117 }, - }, - }, -}; -pub const LAYOUT__349: &NondetU16RegLayout = &NondetU16RegLayout { - arg: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 119 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 120 }, - }, - }, -}; -pub const LAYOUT__347: &NormalizeU32Layout = &NormalizeU32Layout { - low16: LAYOUT__348, - low_carry: &NondetRegLayout { - _super: &Reg { offset: 118 }, - }, - high16: LAYOUT__349, - high_carry: &NondetRegLayout { - _super: &Reg { offset: 121 }, - }, -}; -pub const LAYOUT__289: &Mem0Layout = &Mem0Layout { - input: LAYOUT__290, - _arguments_mem0_output: LAYOUT__323, - output: LAYOUT__325, - _0: LAYOUT__340, - pc_add: LAYOUT__347, -}; -pub const LAYOUT__353: &DecoderLayout = &DecoderLayout { - _f7_6: &NondetRegLayout { - _super: &Reg { offset: 35 }, - }, - _f7_45: &NondetRegLayout { - _super: &Reg { offset: 36 }, - }, - _f7_23: &NondetRegLayout { - _super: &Reg { offset: 37 }, - }, - _f7_01: &NondetRegLayout { - _super: &Reg { offset: 38 }, - }, - _rs2_34: &NondetRegLayout { - _super: &Reg { offset: 39 }, - }, - _rs2_12: &NondetRegLayout { - _super: &Reg { offset: 40 }, - }, - _rs2_0: &NondetRegLayout { - _super: &Reg { offset: 41 }, - }, - _rs1_34: &NondetRegLayout { - _super: &Reg { offset: 42 }, - }, - _rs1_12: &NondetRegLayout { - _super: &Reg { offset: 43 }, - }, - _rs1_0: &NondetRegLayout { - _super: &Reg { offset: 44 }, - }, - _f3_2: &NondetRegLayout { - _super: &Reg { offset: 45 }, - }, - _f3_01: &NondetRegLayout { - _super: &Reg { offset: 46 }, - }, - _rd_34: &NondetRegLayout { - _super: &Reg { offset: 47 }, - }, - _rd_12: &NondetRegLayout { - _super: &Reg { offset: 48 }, - }, - _rd_0: &NondetRegLayout { - _super: &Reg { offset: 49 }, - }, - opcode: &NondetRegLayout { - _super: &Reg { offset: 50 }, - }, -}; -pub const LAYOUT__356: &NondetU16RegLayout = &NondetU16RegLayout { - arg: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 53 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 54 }, - }, - }, -}; -pub const LAYOUT__355: &U16RegLayout = &U16RegLayout { ret: LAYOUT__356 }; -pub const LAYOUT__357: &NondetU16RegLayout = &NondetU16RegLayout { - arg: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 57 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 58 }, - }, - }, -}; -pub const LAYOUT__354: &AddrDecomposeLayout = &AddrDecomposeLayout { - low2: &NondetRegLayout { - _super: &Reg { offset: 52 }, - }, - upper_diff: LAYOUT__355, - _0: &IsZeroLayout { - _super: &NondetRegLayout { - _super: &Reg { offset: 55 }, - }, - inv: &NondetRegLayout { - _super: &Reg { offset: 56 }, - }, - }, - med14: LAYOUT__357, -}; -pub const LAYOUT__360: &MemoryArgLayout = &MemoryArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 60 }, - }, - addr: &NondetRegLayout { - _super: &Reg { offset: 59 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 61 }, - }, - data_low: &NondetRegLayout { - _super: &Reg { offset: 62 }, - }, - data_high: &NondetRegLayout { - _super: &Reg { offset: 63 }, - }, -}; -pub const LAYOUT__361: &MemoryArgLayout = &MemoryArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 64 }, - }, - addr: &NondetRegLayout { - _super: &Reg { offset: 59 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 0 }, - }, - data_low: &NondetRegLayout { - _super: &Reg { offset: 65 }, - }, - data_high: &NondetRegLayout { - _super: &Reg { offset: 66 }, - }, -}; -pub const LAYOUT__359: &MemoryIOLayout = &MemoryIOLayout { - old_txn: LAYOUT__360, - new_txn: LAYOUT__361, -}; -pub const LAYOUT__363: &IsCycleLayout = &IsCycleLayout { - arg: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 67 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 68 }, - }, - }, -}; -pub const LAYOUT__362: &IsForwardLayout = &IsForwardLayout { _0: LAYOUT__363 }; -pub const LAYOUT__358: &MemoryReadLayout = &MemoryReadLayout { - io: LAYOUT__359, - _0: LAYOUT__362, -}; -pub const LAYOUT__352: &DecodeInstLayout = &DecodeInstLayout { - _super: LAYOUT__353, - arg: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 51 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 0 }, - }, - }, - pc_addr: LAYOUT__354, - load_inst: LAYOUT__358, -}; -pub const LAYOUT__367: &MemoryArgLayout = &MemoryArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 70 }, - }, - addr: &NondetRegLayout { - _super: &Reg { offset: 69 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 71 }, - }, - data_low: &NondetRegLayout { - _super: &Reg { offset: 72 }, - }, - data_high: &NondetRegLayout { - _super: &Reg { offset: 73 }, - }, -}; -pub const LAYOUT__368: &MemoryArgLayout = &MemoryArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 74 }, - }, - addr: &NondetRegLayout { - _super: &Reg { offset: 69 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 0 }, - }, - data_low: &NondetRegLayout { - _super: &Reg { offset: 75 }, - }, - data_high: &NondetRegLayout { - _super: &Reg { offset: 76 }, - }, -}; -pub const LAYOUT__366: &MemoryIOLayout = &MemoryIOLayout { - old_txn: LAYOUT__367, - new_txn: LAYOUT__368, -}; -pub const LAYOUT__370: &IsCycleLayout = &IsCycleLayout { - arg: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 77 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 78 }, - }, - }, -}; -pub const LAYOUT__369: &IsForwardLayout = &IsForwardLayout { _0: LAYOUT__370 }; -pub const LAYOUT__365: &MemoryReadLayout = &MemoryReadLayout { - io: LAYOUT__366, - _0: LAYOUT__369, -}; -pub const LAYOUT__364: &ReadRegLayout = &ReadRegLayout { - _super: LAYOUT__365, - addr: &NondetRegLayout { - _super: &Reg { offset: 79 }, - }, -}; -pub const LAYOUT__374: &MemoryArgLayout = &MemoryArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 81 }, - }, - addr: &NondetRegLayout { - _super: &Reg { offset: 80 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 82 }, - }, - data_low: &NondetRegLayout { - _super: &Reg { offset: 83 }, - }, - data_high: &NondetRegLayout { - _super: &Reg { offset: 84 }, - }, -}; -pub const LAYOUT__375: &MemoryArgLayout = &MemoryArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 85 }, - }, - addr: &NondetRegLayout { - _super: &Reg { offset: 80 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 0 }, - }, - data_low: &NondetRegLayout { - _super: &Reg { offset: 86 }, - }, - data_high: &NondetRegLayout { - _super: &Reg { offset: 87 }, - }, -}; -pub const LAYOUT__373: &MemoryIOLayout = &MemoryIOLayout { - old_txn: LAYOUT__374, - new_txn: LAYOUT__375, -}; -pub const LAYOUT__377: &IsCycleLayout = &IsCycleLayout { - arg: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 88 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 89 }, - }, - }, -}; -pub const LAYOUT__376: &IsForwardLayout = &IsForwardLayout { _0: LAYOUT__377 }; -pub const LAYOUT__372: &MemoryReadLayout = &MemoryReadLayout { - io: LAYOUT__373, - _0: LAYOUT__376, -}; -pub const LAYOUT__371: &ReadRegLayout = &ReadRegLayout { - _super: LAYOUT__372, - addr: &NondetRegLayout { - _super: &Reg { offset: 90 }, - }, -}; -pub const LAYOUT__379: &NondetU16RegLayout = &NondetU16RegLayout { - arg: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 91 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 92 }, - }, - }, -}; -pub const LAYOUT__380: &NondetU16RegLayout = &NondetU16RegLayout { - arg: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 94 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 95 }, - }, - }, -}; -pub const LAYOUT__378: &NormalizeU32Layout = &NormalizeU32Layout { - low16: LAYOUT__379, - low_carry: &NondetRegLayout { - _super: &Reg { offset: 93 }, - }, - high16: LAYOUT__380, - high_carry: &NondetRegLayout { - _super: &Reg { offset: 96 }, - }, -}; -pub const LAYOUT__383: &NondetU16RegLayout = &NondetU16RegLayout { - arg: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 99 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 100 }, - }, - }, -}; -pub const LAYOUT__382: &U16RegLayout = &U16RegLayout { ret: LAYOUT__383 }; -pub const LAYOUT__384: &NondetU16RegLayout = &NondetU16RegLayout { - arg: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 103 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 104 }, - }, - }, -}; -pub const LAYOUT__381: &AddrDecomposeBitsLayout = &AddrDecomposeBitsLayout { - low0: &NondetRegLayout { - _super: &Reg { offset: 97 }, - }, - low1: &NondetRegLayout { - _super: &Reg { offset: 98 }, - }, - upper_diff: LAYOUT__382, - _0: &IsZeroLayout { - _super: &NondetRegLayout { - _super: &Reg { offset: 101 }, - }, - inv: &NondetRegLayout { - _super: &Reg { offset: 102 }, - }, - }, - med14: LAYOUT__384, -}; -pub const LAYOUT__351: &MemStoreInputLayout = &MemStoreInputLayout { - decoded: LAYOUT__352, - rs1: LAYOUT__364, - rs2: LAYOUT__371, - addr_u32: LAYOUT__378, - addr: LAYOUT__381, - data_0: LAYOUT__218, -}; -pub const LAYOUT__386: &ArgU8Layout4LayoutArray = &[ - &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 27 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 28 }, - }, - }, - &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 29 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 30 }, - }, - }, - &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 31 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 32 }, - }, - }, - &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 33 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 34 }, - }, - }, -]; -pub const LAYOUT__385: &_Arguments_Mem1OutputLayout = &_Arguments_Mem1OutputLayout { - arg_u8: LAYOUT__386, -}; -pub const LAYOUT__390: &NondetU8RegLayout = &NondetU8RegLayout { - arg: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 33 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 34 }, - }, - }, -}; -pub const LAYOUT__389: &SplitWordLayout = &SplitWordLayout { - byte0: LAYOUT__330, - byte1: LAYOUT__390, -}; -pub const LAYOUT__388: &OpSBLayout = &OpSBLayout { - orig_bytes: LAYOUT__327, - new_bytes: LAYOUT__389, -}; -pub const LAYOUT__391: &Mem1OutputArm1Layout = &Mem1OutputArm1Layout { - _extra0: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 27 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 28 }, - }, - }, - _extra1: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 29 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 30 }, - }, - }, - _extra2: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 31 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 32 }, - }, - }, - _extra3: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 33 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 34 }, - }, - }, -}; -pub const LAYOUT__392: &Mem1OutputArm2Layout = &Mem1OutputArm2Layout { - _extra0: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 27 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 28 }, - }, - }, - _extra1: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 29 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 30 }, - }, - }, - _extra2: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 31 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 32 }, - }, - }, - _extra3: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 33 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 34 }, - }, - }, -}; -pub const LAYOUT__393: &Mem1OutputArm3Layout = &Mem1OutputArm3Layout { - _extra0: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 27 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 28 }, - }, - }, - _extra1: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 29 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 30 }, - }, - }, - _extra2: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 31 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 32 }, - }, - }, - _extra3: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 33 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 34 }, - }, - }, -}; -pub const LAYOUT__394: &Mem1OutputArm4Layout = &Mem1OutputArm4Layout { - _extra0: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 27 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 28 }, - }, - }, - _extra1: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 29 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 30 }, - }, - }, - _extra2: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 31 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 32 }, - }, - }, - _extra3: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 33 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 34 }, - }, - }, -}; -pub const LAYOUT__395: &Mem1OutputArm5Layout = &Mem1OutputArm5Layout { - _extra0: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 27 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 28 }, - }, - }, - _extra1: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 29 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 30 }, - }, - }, - _extra2: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 31 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 32 }, - }, - }, - _extra3: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 33 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 34 }, - }, - }, -}; -pub const LAYOUT__396: &Mem1OutputArm6Layout = &Mem1OutputArm6Layout { - _extra0: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 27 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 28 }, - }, - }, - _extra1: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 29 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 30 }, - }, - }, - _extra2: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 31 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 32 }, - }, - }, - _extra3: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 33 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 34 }, - }, - }, -}; -pub const LAYOUT__397: &Mem1OutputArm7Layout = &Mem1OutputArm7Layout { - _extra0: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 27 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 28 }, - }, - }, - _extra1: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 29 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 30 }, - }, - }, - _extra2: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 31 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 32 }, - }, - }, - _extra3: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 33 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 34 }, - }, - }, -}; -pub const LAYOUT__387: &Mem1OutputLayout = &Mem1OutputLayout { - arm0: LAYOUT__388, - arm1: LAYOUT__391, - arm2: LAYOUT__392, - arm3: LAYOUT__393, - arm4: LAYOUT__394, - arm5: LAYOUT__395, - arm6: LAYOUT__396, - arm7: LAYOUT__397, -}; -pub const LAYOUT__401: &MemoryArgLayout = &MemoryArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 116 }, - }, - addr: &NondetRegLayout { - _super: &Reg { offset: 115 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 117 }, - }, - data_low: &NondetRegLayout { - _super: &Reg { offset: 118 }, - }, - data_high: &NondetRegLayout { - _super: &Reg { offset: 119 }, - }, -}; -pub const LAYOUT__402: &MemoryArgLayout = &MemoryArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 120 }, - }, - addr: &NondetRegLayout { - _super: &Reg { offset: 115 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 0 }, - }, - data_low: &NondetRegLayout { - _super: &Reg { offset: 121 }, - }, - data_high: &NondetRegLayout { - _super: &Reg { offset: 122 }, - }, -}; -pub const LAYOUT__400: &MemoryIOLayout = &MemoryIOLayout { - old_txn: LAYOUT__401, - new_txn: LAYOUT__402, -}; -pub const LAYOUT__404: &IsCycleLayout = &IsCycleLayout { - arg: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 123 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 124 }, - }, - }, -}; -pub const LAYOUT__403: &IsForwardLayout = &IsForwardLayout { _0: LAYOUT__404 }; -pub const LAYOUT__399: &MemoryWriteLayout = &MemoryWriteLayout { - io: LAYOUT__400, - _0: LAYOUT__403, -}; -pub const LAYOUT__398: &MemStoreFinalizeLayout = &MemStoreFinalizeLayout { _0: LAYOUT__399 }; -pub const LAYOUT__406: &NondetU16RegLayout = &NondetU16RegLayout { - arg: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 125 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 126 }, - }, - }, -}; -pub const LAYOUT__407: &NondetU16RegLayout = &NondetU16RegLayout { - arg: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 128 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 129 }, - }, - }, -}; -pub const LAYOUT__405: &NormalizeU32Layout = &NormalizeU32Layout { - low16: LAYOUT__406, - low_carry: &NondetRegLayout { - _super: &Reg { offset: 127 }, - }, - high16: LAYOUT__407, - high_carry: &NondetRegLayout { - _super: &Reg { offset: 130 }, - }, -}; -pub const LAYOUT__350: &Mem1Layout = &Mem1Layout { - input: LAYOUT__351, - _arguments_mem1_output: LAYOUT__385, - output: LAYOUT__387, - _0: LAYOUT__398, - pc_add: LAYOUT__405, -}; -pub const LAYOUT__416: &MemoryArgLayout = &MemoryArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 27 }, - }, - addr: &NondetRegLayout { - _super: &Reg { offset: 28 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 29 }, - }, - data_low: &NondetRegLayout { - _super: &Reg { offset: 30 }, - }, - data_high: &NondetRegLayout { - _super: &Reg { offset: 31 }, - }, -}; -pub const LAYOUT__417: &MemoryArgLayout = &MemoryArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 32 }, - }, - addr: &NondetRegLayout { - _super: &Reg { offset: 28 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 0 }, - }, - data_low: &NondetRegLayout { - _super: &Reg { offset: 33 }, - }, - data_high: &NondetRegLayout { - _super: &Reg { offset: 34 }, - }, -}; -pub const LAYOUT__415: &MemoryIOLayout = &MemoryIOLayout { - old_txn: LAYOUT__416, - new_txn: LAYOUT__417, -}; -pub const LAYOUT__414: &MemoryPageInLayout = &MemoryPageInLayout { io: LAYOUT__415 }; -pub const LAYOUT__413: &ControlLoadRoot__0_SuperLayout = - &ControlLoadRoot__0_SuperLayout { mem: LAYOUT__414 }; -pub const LAYOUT__421: &MemoryArgLayout = &MemoryArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 35 }, - }, - addr: &NondetRegLayout { - _super: &Reg { offset: 36 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 37 }, - }, - data_low: &NondetRegLayout { - _super: &Reg { offset: 38 }, - }, - data_high: &NondetRegLayout { - _super: &Reg { offset: 39 }, - }, -}; -pub const LAYOUT__422: &MemoryArgLayout = &MemoryArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 40 }, - }, - addr: &NondetRegLayout { - _super: &Reg { offset: 36 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 0 }, - }, - data_low: &NondetRegLayout { - _super: &Reg { offset: 41 }, - }, - data_high: &NondetRegLayout { - _super: &Reg { offset: 42 }, - }, -}; -pub const LAYOUT__420: &MemoryIOLayout = &MemoryIOLayout { - old_txn: LAYOUT__421, - new_txn: LAYOUT__422, -}; -pub const LAYOUT__419: &MemoryPageInLayout = &MemoryPageInLayout { io: LAYOUT__420 }; -pub const LAYOUT__418: &ControlLoadRoot__0_SuperLayout = - &ControlLoadRoot__0_SuperLayout { mem: LAYOUT__419 }; -pub const LAYOUT__426: &MemoryArgLayout = &MemoryArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 43 }, - }, - addr: &NondetRegLayout { - _super: &Reg { offset: 44 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 45 }, - }, - data_low: &NondetRegLayout { - _super: &Reg { offset: 46 }, - }, - data_high: &NondetRegLayout { - _super: &Reg { offset: 47 }, - }, -}; -pub const LAYOUT__427: &MemoryArgLayout = &MemoryArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 48 }, - }, - addr: &NondetRegLayout { - _super: &Reg { offset: 44 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 0 }, - }, - data_low: &NondetRegLayout { - _super: &Reg { offset: 49 }, - }, - data_high: &NondetRegLayout { - _super: &Reg { offset: 50 }, - }, -}; -pub const LAYOUT__425: &MemoryIOLayout = &MemoryIOLayout { - old_txn: LAYOUT__426, - new_txn: LAYOUT__427, -}; -pub const LAYOUT__424: &MemoryPageInLayout = &MemoryPageInLayout { io: LAYOUT__425 }; -pub const LAYOUT__423: &ControlLoadRoot__0_SuperLayout = - &ControlLoadRoot__0_SuperLayout { mem: LAYOUT__424 }; -pub const LAYOUT__431: &MemoryArgLayout = &MemoryArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 51 }, - }, - addr: &NondetRegLayout { - _super: &Reg { offset: 52 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 53 }, - }, - data_low: &NondetRegLayout { - _super: &Reg { offset: 54 }, - }, - data_high: &NondetRegLayout { - _super: &Reg { offset: 55 }, - }, -}; -pub const LAYOUT__432: &MemoryArgLayout = &MemoryArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 56 }, - }, - addr: &NondetRegLayout { - _super: &Reg { offset: 52 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 0 }, - }, - data_low: &NondetRegLayout { - _super: &Reg { offset: 57 }, - }, - data_high: &NondetRegLayout { - _super: &Reg { offset: 58 }, - }, -}; -pub const LAYOUT__430: &MemoryIOLayout = &MemoryIOLayout { - old_txn: LAYOUT__431, - new_txn: LAYOUT__432, -}; -pub const LAYOUT__429: &MemoryPageInLayout = &MemoryPageInLayout { io: LAYOUT__430 }; -pub const LAYOUT__428: &ControlLoadRoot__0_SuperLayout = - &ControlLoadRoot__0_SuperLayout { mem: LAYOUT__429 }; -pub const LAYOUT__436: &MemoryArgLayout = &MemoryArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 59 }, - }, - addr: &NondetRegLayout { - _super: &Reg { offset: 60 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 61 }, - }, - data_low: &NondetRegLayout { - _super: &Reg { offset: 62 }, - }, - data_high: &NondetRegLayout { - _super: &Reg { offset: 63 }, - }, -}; -pub const LAYOUT__437: &MemoryArgLayout = &MemoryArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 64 }, - }, - addr: &NondetRegLayout { - _super: &Reg { offset: 60 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 0 }, - }, - data_low: &NondetRegLayout { - _super: &Reg { offset: 65 }, - }, - data_high: &NondetRegLayout { - _super: &Reg { offset: 66 }, - }, -}; -pub const LAYOUT__435: &MemoryIOLayout = &MemoryIOLayout { - old_txn: LAYOUT__436, - new_txn: LAYOUT__437, -}; -pub const LAYOUT__434: &MemoryPageInLayout = &MemoryPageInLayout { io: LAYOUT__435 }; -pub const LAYOUT__433: &ControlLoadRoot__0_SuperLayout = - &ControlLoadRoot__0_SuperLayout { mem: LAYOUT__434 }; -pub const LAYOUT__441: &MemoryArgLayout = &MemoryArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 67 }, - }, - addr: &NondetRegLayout { - _super: &Reg { offset: 68 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 69 }, - }, - data_low: &NondetRegLayout { - _super: &Reg { offset: 70 }, - }, - data_high: &NondetRegLayout { - _super: &Reg { offset: 71 }, - }, -}; -pub const LAYOUT__442: &MemoryArgLayout = &MemoryArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 72 }, - }, - addr: &NondetRegLayout { - _super: &Reg { offset: 68 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 0 }, - }, - data_low: &NondetRegLayout { - _super: &Reg { offset: 73 }, - }, - data_high: &NondetRegLayout { - _super: &Reg { offset: 74 }, - }, -}; -pub const LAYOUT__440: &MemoryIOLayout = &MemoryIOLayout { - old_txn: LAYOUT__441, - new_txn: LAYOUT__442, -}; -pub const LAYOUT__439: &MemoryPageInLayout = &MemoryPageInLayout { io: LAYOUT__440 }; -pub const LAYOUT__438: &ControlLoadRoot__0_SuperLayout = - &ControlLoadRoot__0_SuperLayout { mem: LAYOUT__439 }; -pub const LAYOUT__446: &MemoryArgLayout = &MemoryArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 75 }, - }, - addr: &NondetRegLayout { - _super: &Reg { offset: 76 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 77 }, - }, - data_low: &NondetRegLayout { - _super: &Reg { offset: 78 }, - }, - data_high: &NondetRegLayout { - _super: &Reg { offset: 79 }, - }, -}; -pub const LAYOUT__447: &MemoryArgLayout = &MemoryArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 80 }, - }, - addr: &NondetRegLayout { - _super: &Reg { offset: 76 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 0 }, - }, - data_low: &NondetRegLayout { - _super: &Reg { offset: 81 }, - }, - data_high: &NondetRegLayout { - _super: &Reg { offset: 82 }, - }, -}; -pub const LAYOUT__445: &MemoryIOLayout = &MemoryIOLayout { - old_txn: LAYOUT__446, - new_txn: LAYOUT__447, -}; -pub const LAYOUT__444: &MemoryPageInLayout = &MemoryPageInLayout { io: LAYOUT__445 }; -pub const LAYOUT__443: &ControlLoadRoot__0_SuperLayout = - &ControlLoadRoot__0_SuperLayout { mem: LAYOUT__444 }; -pub const LAYOUT__451: &MemoryArgLayout = &MemoryArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 83 }, - }, - addr: &NondetRegLayout { - _super: &Reg { offset: 84 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 85 }, - }, - data_low: &NondetRegLayout { - _super: &Reg { offset: 86 }, - }, - data_high: &NondetRegLayout { - _super: &Reg { offset: 87 }, - }, -}; -pub const LAYOUT__452: &MemoryArgLayout = &MemoryArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 88 }, - }, - addr: &NondetRegLayout { - _super: &Reg { offset: 84 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 0 }, - }, - data_low: &NondetRegLayout { - _super: &Reg { offset: 89 }, - }, - data_high: &NondetRegLayout { - _super: &Reg { offset: 90 }, - }, -}; -pub const LAYOUT__450: &MemoryIOLayout = &MemoryIOLayout { - old_txn: LAYOUT__451, - new_txn: LAYOUT__452, -}; -pub const LAYOUT__449: &MemoryPageInLayout = &MemoryPageInLayout { io: LAYOUT__450 }; -pub const LAYOUT__448: &ControlLoadRoot__0_SuperLayout = - &ControlLoadRoot__0_SuperLayout { mem: LAYOUT__449 }; -pub const LAYOUT__412: &ControlLoadRoot__0_SuperLayout8LayoutArray = &[ - LAYOUT__413, - LAYOUT__418, - LAYOUT__423, - LAYOUT__428, - LAYOUT__433, - LAYOUT__438, - LAYOUT__443, - LAYOUT__448, -]; -pub const LAYOUT__411: &ControlLoadRootLayout = &ControlLoadRootLayout { _1: LAYOUT__412 }; -pub const LAYOUT__410: &Control0_SuperArm0Layout = &Control0_SuperArm0Layout { - _super: LAYOUT__411, - _extra0: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 91 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 92 }, - }, - }, - _extra1: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 93 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 94 }, - }, - }, - _extra2: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 95 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 96 }, - }, - }, - _extra3: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 97 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 98 }, - }, - }, - _extra4: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 99 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 100 }, - }, - }, - _extra5: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 101 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 102 }, - }, - }, - _extra6: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 103 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 104 }, - }, - }, - _extra7: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 105 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 106 }, - }, - }, - _extra8: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 107 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 108 }, - }, - }, - _extra9: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 109 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 110 }, - }, - }, - _extra10: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 111 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 112 }, - }, - }, - _extra11: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 113 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 114 }, - }, - }, - _extra12: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 115 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 116 }, - }, - }, - _extra13: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 117 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 118 }, - }, - }, - _extra14: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 119 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 120 }, - }, - }, - _extra15: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 121 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 122 }, - }, - }, - _extra16: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 123 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 124 }, - }, - }, - _extra17: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 125 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 126 }, - }, - }, - _extra18: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 127 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 128 }, - }, - }, - _extra19: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 129 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 130 }, - }, - }, - _extra20: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 131 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 132 }, - }, - }, - _extra21: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 133 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 134 }, - }, - }, - _extra22: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 135 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 136 }, - }, - }, - _extra23: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 137 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 138 }, - }, - }, - _extra24: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 139 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 140 }, - }, - }, - _extra25: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 141 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 142 }, - }, - }, - _extra26: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 143 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 144 }, - }, - }, - _extra27: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 145 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 146 }, - }, - }, - _extra28: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 147 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 148 }, - }, - }, - _extra29: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 149 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 150 }, - }, - }, - _extra30: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 151 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 152 }, - }, - }, - _extra31: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 153 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 154 }, - }, - }, - _extra32: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 155 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 156 }, - }, - }, - _extra33: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 157 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 158 }, - }, - }, - _extra34: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 159 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 160 }, - }, - }, - _extra35: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 161 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 162 }, - }, - }, - _extra36: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 163 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 164 }, - }, - }, - _extra37: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 165 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 166 }, - }, - }, - _extra38: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 167 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 168 }, - }, - }, - _extra39: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 169 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 170 }, - }, - }, -}; -pub const LAYOUT__460: &IsCycleLayout = &IsCycleLayout { - arg: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 91 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 92 }, - }, - }, -}; -pub const LAYOUT__459: &IsForwardLayout = &IsForwardLayout { _0: LAYOUT__460 }; -pub const LAYOUT__458: &MemoryReadLayout = &MemoryReadLayout { - io: LAYOUT__415, - _0: LAYOUT__459, -}; -pub const LAYOUT__463: &IsCycleLayout = &IsCycleLayout { - arg: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 93 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 94 }, - }, - }, -}; -pub const LAYOUT__462: &IsForwardLayout = &IsForwardLayout { _0: LAYOUT__463 }; -pub const LAYOUT__461: &MemoryReadLayout = &MemoryReadLayout { - io: LAYOUT__420, - _0: LAYOUT__462, -}; -pub const LAYOUT__457: &ControlResume_SuperArm0_SuperLayout = - &ControlResume_SuperArm0_SuperLayout { - pc: LAYOUT__458, - mode: LAYOUT__461, - }; -pub const LAYOUT__456: &ControlResume_SuperArm0Layout = &ControlResume_SuperArm0Layout { - _super: LAYOUT__457, - _extra0: LAYOUT__426, - _extra1: LAYOUT__427, - _extra2: LAYOUT__431, - _extra3: LAYOUT__432, - _extra4: LAYOUT__436, - _extra5: LAYOUT__437, - _extra6: LAYOUT__441, - _extra7: LAYOUT__442, - _extra8: LAYOUT__446, - _extra9: LAYOUT__447, - _extra10: LAYOUT__451, - _extra11: LAYOUT__452, - _extra12: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 95 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 96 }, - }, - }, - _extra13: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 97 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 98 }, - }, - }, - _extra14: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 99 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 100 }, - }, - }, - _extra15: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 101 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 102 }, - }, - }, - _extra16: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 103 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 104 }, - }, - }, - _extra17: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 105 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 106 }, - }, - }, -}; -pub const LAYOUT__467: &MemoryWriteLayout = &MemoryWriteLayout { - io: LAYOUT__415, - _0: LAYOUT__459, -}; -pub const LAYOUT__466: &ControlResume_SuperArm1_Super__0_SuperLayout = - &ControlResume_SuperArm1_Super__0_SuperLayout { _0: LAYOUT__467 }; -pub const LAYOUT__469: &MemoryWriteLayout = &MemoryWriteLayout { - io: LAYOUT__420, - _0: LAYOUT__462, -}; -pub const LAYOUT__468: &ControlResume_SuperArm1_Super__0_SuperLayout = - &ControlResume_SuperArm1_Super__0_SuperLayout { _0: LAYOUT__469 }; -pub const LAYOUT__473: &IsCycleLayout = &IsCycleLayout { - arg: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 95 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 96 }, - }, - }, -}; -pub const LAYOUT__472: &IsForwardLayout = &IsForwardLayout { _0: LAYOUT__473 }; -pub const LAYOUT__471: &MemoryWriteLayout = &MemoryWriteLayout { - io: LAYOUT__425, - _0: LAYOUT__472, -}; -pub const LAYOUT__470: &ControlResume_SuperArm1_Super__0_SuperLayout = - &ControlResume_SuperArm1_Super__0_SuperLayout { _0: LAYOUT__471 }; -pub const LAYOUT__475: &MemoryWriteLayout = &MemoryWriteLayout { - io: LAYOUT__430, - _0: LAYOUT__131, -}; -pub const LAYOUT__474: &ControlResume_SuperArm1_Super__0_SuperLayout = - &ControlResume_SuperArm1_Super__0_SuperLayout { _0: LAYOUT__475 }; -pub const LAYOUT__479: &IsCycleLayout = &IsCycleLayout { - arg: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 99 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 100 }, - }, - }, -}; -pub const LAYOUT__478: &IsForwardLayout = &IsForwardLayout { _0: LAYOUT__479 }; -pub const LAYOUT__477: &MemoryWriteLayout = &MemoryWriteLayout { - io: LAYOUT__435, - _0: LAYOUT__478, -}; -pub const LAYOUT__476: &ControlResume_SuperArm1_Super__0_SuperLayout = - &ControlResume_SuperArm1_Super__0_SuperLayout { _0: LAYOUT__477 }; -pub const LAYOUT__483: &IsCycleLayout = &IsCycleLayout { - arg: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 101 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 102 }, - }, - }, -}; -pub const LAYOUT__482: &IsForwardLayout = &IsForwardLayout { _0: LAYOUT__483 }; -pub const LAYOUT__481: &MemoryWriteLayout = &MemoryWriteLayout { - io: LAYOUT__440, - _0: LAYOUT__482, -}; -pub const LAYOUT__480: &ControlResume_SuperArm1_Super__0_SuperLayout = - &ControlResume_SuperArm1_Super__0_SuperLayout { _0: LAYOUT__481 }; -pub const LAYOUT__485: &MemoryWriteLayout = &MemoryWriteLayout { - io: LAYOUT__445, - _0: LAYOUT__215, -}; -pub const LAYOUT__484: &ControlResume_SuperArm1_Super__0_SuperLayout = - &ControlResume_SuperArm1_Super__0_SuperLayout { _0: LAYOUT__485 }; -pub const LAYOUT__489: &IsCycleLayout = &IsCycleLayout { - arg: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 105 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 106 }, - }, - }, -}; -pub const LAYOUT__488: &IsForwardLayout = &IsForwardLayout { _0: LAYOUT__489 }; -pub const LAYOUT__487: &MemoryWriteLayout = &MemoryWriteLayout { - io: LAYOUT__450, - _0: LAYOUT__488, -}; -pub const LAYOUT__486: &ControlResume_SuperArm1_Super__0_SuperLayout = - &ControlResume_SuperArm1_Super__0_SuperLayout { _0: LAYOUT__487 }; -pub const LAYOUT__465: &ControlResume_SuperArm1_Super__0_SuperLayout8LayoutArray = &[ - LAYOUT__466, - LAYOUT__468, - LAYOUT__470, - LAYOUT__474, - LAYOUT__476, - LAYOUT__480, - LAYOUT__484, - LAYOUT__486, -]; -pub const LAYOUT__464: &ControlResume_SuperArm1_SuperLayout = - &ControlResume_SuperArm1_SuperLayout { _1: LAYOUT__465 }; -pub const LAYOUT__455: &ControlResume_SuperLayout = &ControlResume_SuperLayout { - arm0: LAYOUT__456, - arm1: LAYOUT__464, -}; -pub const LAYOUT__491: &MemoryArgLayout16LayoutArray = &[ - LAYOUT__416, - LAYOUT__417, - LAYOUT__421, - LAYOUT__422, - LAYOUT__426, - LAYOUT__427, - LAYOUT__431, - LAYOUT__432, - LAYOUT__436, - LAYOUT__437, - LAYOUT__441, - LAYOUT__442, - LAYOUT__446, - LAYOUT__447, - LAYOUT__451, - LAYOUT__452, -]; -pub const LAYOUT__492: &CycleArgLayout8LayoutArray = &[ - &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 91 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 92 }, - }, - }, - &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 93 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 94 }, - }, - }, - &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 95 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 96 }, - }, - }, - &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 97 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 98 }, - }, - }, - &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 99 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 100 }, - }, - }, - &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 101 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 102 }, - }, - }, - &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 103 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 104 }, - }, - }, - &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 105 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 106 }, - }, - }, -]; -pub const LAYOUT__490: &_Arguments_ControlResume_SuperLayout = - &_Arguments_ControlResume_SuperLayout { - memory_arg: LAYOUT__491, - cycle_arg: LAYOUT__492, - }; -pub const LAYOUT__454: &ControlResumeLayout = &ControlResumeLayout { - _super: LAYOUT__455, - pc_zero: &IsZeroLayout { - _super: &NondetRegLayout { - _super: &Reg { offset: 171 }, - }, - inv: &NondetRegLayout { - _super: &Reg { offset: 172 }, - }, - }, - _arguments_control_resume__super: LAYOUT__490, -}; -pub const LAYOUT__453: &Control0_SuperArm1Layout = &Control0_SuperArm1Layout { - _super: LAYOUT__454, - _extra0: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 107 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 108 }, - }, - }, - _extra1: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 109 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 110 }, - }, - }, - _extra2: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 111 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 112 }, - }, - }, - _extra3: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 113 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 114 }, - }, - }, - _extra4: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 115 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 116 }, - }, - }, - _extra5: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 117 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 118 }, - }, - }, - _extra6: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 119 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 120 }, - }, - }, - _extra7: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 121 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 122 }, - }, - }, - _extra8: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 123 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 124 }, - }, - }, - _extra9: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 125 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 126 }, - }, - }, - _extra10: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 127 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 128 }, - }, - }, - _extra11: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 129 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 130 }, - }, - }, - _extra12: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 131 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 132 }, - }, - }, - _extra13: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 133 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 134 }, - }, - }, - _extra14: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 135 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 136 }, - }, - }, - _extra15: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 137 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 138 }, - }, - }, - _extra16: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 139 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 140 }, - }, - }, - _extra17: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 141 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 142 }, - }, - }, - _extra18: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 143 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 144 }, - }, - }, - _extra19: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 145 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 146 }, - }, - }, - _extra20: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 147 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 148 }, - }, - }, - _extra21: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 149 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 150 }, - }, - }, - _extra22: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 151 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 152 }, - }, - }, - _extra23: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 153 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 154 }, - }, - }, - _extra24: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 155 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 156 }, - }, - }, - _extra25: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 157 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 158 }, - }, - }, - _extra26: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 159 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 160 }, - }, - }, - _extra27: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 161 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 162 }, - }, - }, - _extra28: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 163 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 164 }, - }, - }, - _extra29: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 165 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 166 }, - }, - }, - _extra30: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 167 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 168 }, - }, - }, - _extra31: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 169 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 170 }, - }, - }, -}; -pub const LAYOUT__497: &NondetU16RegLayout = &NondetU16RegLayout { - arg: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 107 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 108 }, - }, - }, -}; -pub const LAYOUT__496: &U16RegLayout = &U16RegLayout { ret: LAYOUT__497 }; -pub const LAYOUT__498: &NondetU16RegLayout = &NondetU16RegLayout { - arg: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 109 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 110 }, - }, - }, -}; -pub const LAYOUT__495: &AddrDecomposeBitsLayout = &AddrDecomposeBitsLayout { - low0: &NondetRegLayout { - _super: &Reg { offset: 172 }, - }, - low1: &NondetRegLayout { - _super: &Reg { offset: 173 }, - }, - upper_diff: LAYOUT__496, - _0: &IsZeroLayout { - _super: &NondetRegLayout { - _super: &Reg { offset: 174 }, - }, - inv: &NondetRegLayout { - _super: &Reg { offset: 175 }, - }, - }, - med14: LAYOUT__498, -}; -pub const LAYOUT__500: &NondetU16RegLayout = &NondetU16RegLayout { - arg: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 111 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 112 }, - }, - }, -}; -pub const LAYOUT__499: &U16RegLayout = &U16RegLayout { ret: LAYOUT__500 }; -pub const LAYOUT__501: &MemoryReadLayout = &MemoryReadLayout { - io: LAYOUT__425, - _0: LAYOUT__472, -}; -pub const LAYOUT__494: &ControlUserECALLLayout = &ControlUserECALLLayout { - safe_mode: &NondetRegLayout { - _super: &Reg { offset: 171 }, - }, - pc_addr: LAYOUT__495, - load_inst: LAYOUT__458, - dispatch_idx: LAYOUT__461, - _0: LAYOUT__499, - new_pc_addr: LAYOUT__501, - _1: LAYOUT__475, -}; -pub const LAYOUT__493: &Control0_SuperArm2Layout = &Control0_SuperArm2Layout { - _super: LAYOUT__494, - _extra0: LAYOUT__436, - _extra1: LAYOUT__437, - _extra2: LAYOUT__441, - _extra3: LAYOUT__442, - _extra4: LAYOUT__446, - _extra5: LAYOUT__447, - _extra6: LAYOUT__451, - _extra7: LAYOUT__452, - _extra8: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 99 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 100 }, - }, - }, - _extra9: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 101 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 102 }, - }, - }, - _extra10: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 103 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 104 }, - }, - }, - _extra11: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 105 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 106 }, - }, - }, - _extra12: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 113 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 114 }, - }, - }, - _extra13: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 115 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 116 }, - }, - }, - _extra14: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 117 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 118 }, - }, - }, - _extra15: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 119 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 120 }, - }, - }, - _extra16: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 121 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 122 }, - }, - }, - _extra17: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 123 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 124 }, - }, - }, - _extra18: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 125 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 126 }, - }, - }, - _extra19: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 127 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 128 }, - }, - }, - _extra20: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 129 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 130 }, - }, - }, - _extra21: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 131 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 132 }, - }, - }, - _extra22: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 133 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 134 }, - }, - }, - _extra23: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 135 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 136 }, - }, - }, - _extra24: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 137 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 138 }, - }, - }, - _extra25: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 139 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 140 }, - }, - }, - _extra26: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 141 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 142 }, - }, - }, - _extra27: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 143 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 144 }, - }, - }, - _extra28: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 145 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 146 }, - }, - }, - _extra29: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 147 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 148 }, - }, - }, - _extra30: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 149 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 150 }, - }, - }, - _extra31: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 151 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 152 }, - }, - }, - _extra32: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 153 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 154 }, - }, - }, - _extra33: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 155 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 156 }, - }, - }, - _extra34: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 157 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 158 }, - }, - }, - _extra35: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 159 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 160 }, - }, - }, - _extra36: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 161 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 162 }, - }, - }, - _extra37: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 163 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 164 }, - }, - }, - _extra38: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 165 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 166 }, - }, - }, - _extra39: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 167 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 168 }, - }, - }, - _extra40: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 169 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 170 }, - }, - }, -}; -pub const LAYOUT__505: &NondetU16RegLayout = &NondetU16RegLayout { - arg: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 113 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 114 }, - }, - }, -}; -pub const LAYOUT__504: &NormalizeU32Layout = &NormalizeU32Layout { - low16: LAYOUT__500, - low_carry: &NondetRegLayout { - _super: &Reg { offset: 176 }, - }, - high16: LAYOUT__505, - high_carry: &NondetRegLayout { - _super: &Reg { offset: 177 }, - }, -}; -pub const LAYOUT__503: &ControlMRETLayout = &ControlMRETLayout { - safe_mode: &NondetRegLayout { - _super: &Reg { offset: 171 }, - }, - pc_addr: LAYOUT__495, - load_inst: LAYOUT__458, - pc: LAYOUT__461, - pc_add: LAYOUT__504, -}; -pub const LAYOUT__502: &Control0_SuperArm3Layout = &Control0_SuperArm3Layout { - _super: LAYOUT__503, - _extra0: LAYOUT__426, - _extra1: LAYOUT__427, - _extra2: LAYOUT__431, - _extra3: LAYOUT__432, - _extra4: LAYOUT__436, - _extra5: LAYOUT__437, - _extra6: LAYOUT__441, - _extra7: LAYOUT__442, - _extra8: LAYOUT__446, - _extra9: LAYOUT__447, - _extra10: LAYOUT__451, - _extra11: LAYOUT__452, - _extra12: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 95 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 96 }, - }, - }, - _extra13: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 97 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 98 }, - }, - }, - _extra14: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 99 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 100 }, - }, - }, - _extra15: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 101 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 102 }, - }, - }, - _extra16: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 103 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 104 }, - }, - }, - _extra17: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 105 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 106 }, - }, - }, - _extra18: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 115 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 116 }, - }, - }, - _extra19: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 117 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 118 }, - }, - }, - _extra20: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 119 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 120 }, - }, - }, - _extra21: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 121 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 122 }, - }, - }, - _extra22: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 123 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 124 }, - }, - }, - _extra23: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 125 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 126 }, - }, - }, - _extra24: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 127 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 128 }, - }, - }, - _extra25: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 129 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 130 }, - }, - }, - _extra26: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 131 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 132 }, - }, - }, - _extra27: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 133 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 134 }, - }, - }, - _extra28: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 135 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 136 }, - }, - }, - _extra29: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 137 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 138 }, - }, - }, - _extra30: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 139 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 140 }, - }, - }, - _extra31: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 141 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 142 }, - }, - }, - _extra32: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 143 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 144 }, - }, - }, - _extra33: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 145 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 146 }, - }, - }, - _extra34: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 147 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 148 }, - }, - }, - _extra35: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 149 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 150 }, - }, - }, - _extra36: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 151 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 152 }, - }, - }, - _extra37: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 153 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 154 }, - }, - }, - _extra38: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 155 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 156 }, - }, - }, - _extra39: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 157 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 158 }, - }, - }, - _extra40: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 159 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 160 }, - }, - }, - _extra41: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 161 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 162 }, - }, - }, - _extra42: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 163 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 164 }, - }, - }, - _extra43: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 165 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 166 }, - }, - }, - _extra44: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 167 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 168 }, - }, - }, - _extra45: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 169 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 170 }, - }, - }, -}; -pub const LAYOUT__511: &MemoryReadLayout = &MemoryReadLayout { - io: LAYOUT__430, - _0: LAYOUT__131, -}; -pub const LAYOUT__512: &MemoryReadLayout = &MemoryReadLayout { - io: LAYOUT__435, - _0: LAYOUT__478, -}; -pub const LAYOUT__513: &MemoryReadLayout = &MemoryReadLayout { - io: LAYOUT__440, - _0: LAYOUT__482, -}; -pub const LAYOUT__514: &MemoryReadLayout = &MemoryReadLayout { - io: LAYOUT__445, - _0: LAYOUT__215, -}; -pub const LAYOUT__515: &MemoryReadLayout = &MemoryReadLayout { - io: LAYOUT__450, - _0: LAYOUT__488, -}; -pub const LAYOUT__510: &MemoryReadLayout8LayoutArray = &[ - LAYOUT__458, - LAYOUT__461, - LAYOUT__501, - LAYOUT__511, - LAYOUT__512, - LAYOUT__513, - LAYOUT__514, - LAYOUT__515, -]; -pub const LAYOUT__509: &ControlSuspend_SuperArm0_SuperLayout = - &ControlSuspend_SuperArm0_SuperLayout { _1: LAYOUT__510 }; -pub const LAYOUT__517: &ControlSuspend_SuperArm1_SuperLayout = - &ControlSuspend_SuperArm1_SuperLayout { - state: &NondetRegLayout { - _super: &Reg { offset: 171 }, - }, - _0: LAYOUT__467, - _1: LAYOUT__469, - }; -pub const LAYOUT__516: &ControlSuspend_SuperArm1Layout = &ControlSuspend_SuperArm1Layout { - _super: LAYOUT__517, - _extra0: LAYOUT__426, - _extra1: LAYOUT__427, - _extra2: LAYOUT__431, - _extra3: LAYOUT__432, - _extra4: LAYOUT__436, - _extra5: LAYOUT__437, - _extra6: LAYOUT__441, - _extra7: LAYOUT__442, - _extra8: LAYOUT__446, - _extra9: LAYOUT__447, - _extra10: LAYOUT__451, - _extra11: LAYOUT__452, - _extra12: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 95 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 96 }, - }, - }, - _extra13: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 97 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 98 }, - }, - }, - _extra14: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 99 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 100 }, - }, - }, - _extra15: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 101 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 102 }, - }, - }, - _extra16: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 103 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 104 }, - }, - }, - _extra17: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 105 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 106 }, - }, - }, -}; -pub const LAYOUT__508: &ControlSuspend_SuperLayout = &ControlSuspend_SuperLayout { - arm0: LAYOUT__509, - arm1: LAYOUT__516, -}; -pub const LAYOUT__518: &_Arguments_ControlSuspend_SuperLayout = - &_Arguments_ControlSuspend_SuperLayout { - memory_arg: LAYOUT__491, - cycle_arg: LAYOUT__492, - }; -pub const LAYOUT__507: &ControlSuspendLayout = &ControlSuspendLayout { - _super: LAYOUT__508, - pc_zero: &IsZeroLayout { - _super: &NondetRegLayout { - _super: &Reg { offset: 172 }, - }, - inv: &NondetRegLayout { - _super: &Reg { offset: 173 }, - }, - }, - _arguments_control_suspend__super: LAYOUT__518, -}; -pub const LAYOUT__506: &Control0_SuperArm4Layout = &Control0_SuperArm4Layout { - _super: LAYOUT__507, - _extra0: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 107 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 108 }, - }, - }, - _extra1: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 109 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 110 }, - }, - }, - _extra2: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 111 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 112 }, - }, - }, - _extra3: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 113 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 114 }, - }, - }, - _extra4: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 115 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 116 }, - }, - }, - _extra5: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 117 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 118 }, - }, - }, - _extra6: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 119 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 120 }, - }, - }, - _extra7: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 121 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 122 }, - }, - }, - _extra8: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 123 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 124 }, - }, - }, - _extra9: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 125 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 126 }, - }, - }, - _extra10: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 127 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 128 }, - }, - }, - _extra11: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 129 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 130 }, - }, - }, - _extra12: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 131 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 132 }, - }, - }, - _extra13: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 133 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 134 }, - }, - }, - _extra14: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 135 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 136 }, - }, - }, - _extra15: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 137 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 138 }, - }, - }, - _extra16: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 139 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 140 }, - }, - }, - _extra17: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 141 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 142 }, - }, - }, - _extra18: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 143 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 144 }, - }, - }, - _extra19: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 145 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 146 }, - }, - }, - _extra20: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 147 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 148 }, - }, - }, - _extra21: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 149 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 150 }, - }, - }, - _extra22: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 151 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 152 }, - }, - }, - _extra23: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 153 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 154 }, - }, - }, - _extra24: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 155 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 156 }, - }, - }, - _extra25: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 157 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 158 }, - }, - }, - _extra26: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 159 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 160 }, - }, - }, - _extra27: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 161 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 162 }, - }, - }, - _extra28: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 163 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 164 }, - }, - }, - _extra29: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 165 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 166 }, - }, - }, - _extra30: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 167 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 168 }, - }, - }, - _extra31: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 169 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 170 }, - }, - }, -}; -pub const LAYOUT__522: &MemoryPageOutLayout = &MemoryPageOutLayout { - io: LAYOUT__415, - _0: LAYOUT__459, -}; -pub const LAYOUT__523: &MemoryPageOutLayout = &MemoryPageOutLayout { - io: LAYOUT__420, - _0: LAYOUT__462, -}; -pub const LAYOUT__524: &MemoryPageOutLayout = &MemoryPageOutLayout { - io: LAYOUT__425, - _0: LAYOUT__472, -}; -pub const LAYOUT__525: &MemoryPageOutLayout = &MemoryPageOutLayout { - io: LAYOUT__430, - _0: LAYOUT__131, -}; -pub const LAYOUT__526: &MemoryPageOutLayout = &MemoryPageOutLayout { - io: LAYOUT__435, - _0: LAYOUT__478, -}; -pub const LAYOUT__527: &MemoryPageOutLayout = &MemoryPageOutLayout { - io: LAYOUT__440, - _0: LAYOUT__482, -}; -pub const LAYOUT__528: &MemoryPageOutLayout = &MemoryPageOutLayout { - io: LAYOUT__445, - _0: LAYOUT__215, -}; -pub const LAYOUT__529: &MemoryPageOutLayout = &MemoryPageOutLayout { - io: LAYOUT__450, - _0: LAYOUT__488, -}; -pub const LAYOUT__521: &MemoryPageOutLayout8LayoutArray = &[ - LAYOUT__522, - LAYOUT__523, - LAYOUT__524, - LAYOUT__525, - LAYOUT__526, - LAYOUT__527, - LAYOUT__528, - LAYOUT__529, -]; -pub const LAYOUT__520: &ControlStoreRootLayout = &ControlStoreRootLayout { _1: LAYOUT__521 }; -pub const LAYOUT__519: &Control0_SuperArm5Layout = &Control0_SuperArm5Layout { - _super: LAYOUT__520, - _extra0: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 107 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 108 }, - }, - }, - _extra1: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 109 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 110 }, - }, - }, - _extra2: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 111 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 112 }, - }, - }, - _extra3: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 113 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 114 }, - }, - }, - _extra4: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 115 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 116 }, - }, - }, - _extra5: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 117 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 118 }, - }, - }, - _extra6: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 119 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 120 }, - }, - }, - _extra7: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 121 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 122 }, - }, - }, - _extra8: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 123 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 124 }, - }, - }, - _extra9: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 125 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 126 }, - }, - }, - _extra10: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 127 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 128 }, - }, - }, - _extra11: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 129 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 130 }, - }, - }, - _extra12: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 131 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 132 }, - }, - }, - _extra13: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 133 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 134 }, - }, - }, - _extra14: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 135 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 136 }, - }, - }, - _extra15: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 137 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 138 }, - }, - }, - _extra16: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 139 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 140 }, - }, - }, - _extra17: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 141 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 142 }, - }, - }, - _extra18: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 143 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 144 }, - }, - }, - _extra19: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 145 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 146 }, - }, - }, - _extra20: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 147 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 148 }, - }, - }, - _extra21: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 149 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 150 }, - }, - }, - _extra22: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 151 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 152 }, - }, - }, - _extra23: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 153 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 154 }, - }, - }, - _extra24: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 155 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 156 }, - }, - }, - _extra25: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 157 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 158 }, - }, - }, - _extra26: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 159 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 160 }, - }, - }, - _extra27: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 161 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 162 }, - }, - }, - _extra28: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 163 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 164 }, - }, - }, - _extra29: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 165 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 166 }, - }, - }, - _extra30: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 167 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 168 }, - }, - }, - _extra31: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 169 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 170 }, - }, - }, -}; -pub const LAYOUT__536: &ControlTable_SuperArm0_Super__0_SuperLayout = - &ControlTable_SuperArm0_Super__0_SuperLayout { - arg: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 107 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 108 }, - }, - }, - }; -pub const LAYOUT__537: &ControlTable_SuperArm0_Super__0_SuperLayout = - &ControlTable_SuperArm0_Super__0_SuperLayout { - arg: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 109 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 110 }, - }, - }, - }; -pub const LAYOUT__538: &ControlTable_SuperArm0_Super__0_SuperLayout = - &ControlTable_SuperArm0_Super__0_SuperLayout { - arg: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 111 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 112 }, - }, - }, - }; -pub const LAYOUT__539: &ControlTable_SuperArm0_Super__0_SuperLayout = - &ControlTable_SuperArm0_Super__0_SuperLayout { - arg: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 113 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 114 }, - }, - }, - }; -pub const LAYOUT__540: &ControlTable_SuperArm0_Super__0_SuperLayout = - &ControlTable_SuperArm0_Super__0_SuperLayout { - arg: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 115 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 116 }, - }, - }, - }; -pub const LAYOUT__541: &ControlTable_SuperArm0_Super__0_SuperLayout = - &ControlTable_SuperArm0_Super__0_SuperLayout { - arg: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 117 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 118 }, - }, - }, - }; -pub const LAYOUT__542: &ControlTable_SuperArm0_Super__0_SuperLayout = - &ControlTable_SuperArm0_Super__0_SuperLayout { - arg: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 119 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 120 }, - }, - }, - }; -pub const LAYOUT__543: &ControlTable_SuperArm0_Super__0_SuperLayout = - &ControlTable_SuperArm0_Super__0_SuperLayout { - arg: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 121 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 122 }, - }, - }, - }; -pub const LAYOUT__544: &ControlTable_SuperArm0_Super__0_SuperLayout = - &ControlTable_SuperArm0_Super__0_SuperLayout { - arg: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 123 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 124 }, - }, - }, - }; -pub const LAYOUT__545: &ControlTable_SuperArm0_Super__0_SuperLayout = - &ControlTable_SuperArm0_Super__0_SuperLayout { - arg: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 125 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 126 }, - }, - }, - }; -pub const LAYOUT__546: &ControlTable_SuperArm0_Super__0_SuperLayout = - &ControlTable_SuperArm0_Super__0_SuperLayout { - arg: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 127 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 128 }, - }, - }, - }; -pub const LAYOUT__547: &ControlTable_SuperArm0_Super__0_SuperLayout = - &ControlTable_SuperArm0_Super__0_SuperLayout { - arg: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 129 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 130 }, - }, - }, - }; -pub const LAYOUT__548: &ControlTable_SuperArm0_Super__0_SuperLayout = - &ControlTable_SuperArm0_Super__0_SuperLayout { - arg: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 131 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 132 }, - }, - }, - }; -pub const LAYOUT__549: &ControlTable_SuperArm0_Super__0_SuperLayout = - &ControlTable_SuperArm0_Super__0_SuperLayout { - arg: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 133 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 134 }, - }, - }, - }; -pub const LAYOUT__550: &ControlTable_SuperArm0_Super__0_SuperLayout = - &ControlTable_SuperArm0_Super__0_SuperLayout { - arg: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 135 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 136 }, - }, - }, - }; -pub const LAYOUT__551: &ControlTable_SuperArm0_Super__0_SuperLayout = - &ControlTable_SuperArm0_Super__0_SuperLayout { - arg: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 137 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 138 }, - }, - }, - }; -pub const LAYOUT__535: &ControlTable_SuperArm0_Super__0_SuperLayout16LayoutArray = &[ - LAYOUT__536, - LAYOUT__537, - LAYOUT__538, - LAYOUT__539, - LAYOUT__540, - LAYOUT__541, - LAYOUT__542, - LAYOUT__543, - LAYOUT__544, - LAYOUT__545, - LAYOUT__546, - LAYOUT__547, - LAYOUT__548, - LAYOUT__549, - LAYOUT__550, - LAYOUT__551, -]; -pub const LAYOUT__534: &ControlTable_SuperArm0_SuperLayout = &ControlTable_SuperArm0_SuperLayout { - _1: LAYOUT__535, - done: &IsZeroLayout { - _super: &NondetRegLayout { - _super: &Reg { offset: 171 }, - }, - inv: &NondetRegLayout { - _super: &Reg { offset: 172 }, - }, - }, -}; -pub const LAYOUT__533: &ControlTable_SuperArm0Layout = &ControlTable_SuperArm0Layout { - _super: LAYOUT__534, - _extra0: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 139 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 140 }, - }, - }, - _extra1: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 141 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 142 }, - }, - }, - _extra2: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 143 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 144 }, - }, - }, - _extra3: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 145 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 146 }, - }, - }, - _extra4: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 147 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 148 }, - }, - }, - _extra5: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 149 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 150 }, - }, - }, - _extra6: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 151 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 152 }, - }, - }, - _extra7: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 153 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 154 }, - }, - }, - _extra8: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 155 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 156 }, - }, - }, - _extra9: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 157 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 158 }, - }, - }, - _extra10: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 159 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 160 }, - }, - }, - _extra11: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 161 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 162 }, - }, - }, - _extra12: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 163 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 164 }, - }, - }, - _extra13: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 165 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 166 }, - }, - }, - _extra14: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 167 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 168 }, - }, - }, - _extra15: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 169 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 170 }, - }, - }, -}; -pub const LAYOUT__555: &ControlTable_SuperArm1_Super__0_SuperLayout = - &ControlTable_SuperArm1_Super__0_SuperLayout { - arg: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 139 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 140 }, - }, - }, - }; -pub const LAYOUT__556: &ControlTable_SuperArm1_Super__0_SuperLayout = - &ControlTable_SuperArm1_Super__0_SuperLayout { - arg: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 141 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 142 }, - }, - }, - }; -pub const LAYOUT__557: &ControlTable_SuperArm1_Super__0_SuperLayout = - &ControlTable_SuperArm1_Super__0_SuperLayout { - arg: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 143 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 144 }, - }, - }, - }; -pub const LAYOUT__558: &ControlTable_SuperArm1_Super__0_SuperLayout = - &ControlTable_SuperArm1_Super__0_SuperLayout { - arg: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 145 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 146 }, - }, - }, - }; -pub const LAYOUT__559: &ControlTable_SuperArm1_Super__0_SuperLayout = - &ControlTable_SuperArm1_Super__0_SuperLayout { - arg: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 147 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 148 }, - }, - }, - }; -pub const LAYOUT__560: &ControlTable_SuperArm1_Super__0_SuperLayout = - &ControlTable_SuperArm1_Super__0_SuperLayout { - arg: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 149 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 150 }, - }, - }, - }; -pub const LAYOUT__561: &ControlTable_SuperArm1_Super__0_SuperLayout = - &ControlTable_SuperArm1_Super__0_SuperLayout { - arg: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 151 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 152 }, - }, - }, - }; -pub const LAYOUT__562: &ControlTable_SuperArm1_Super__0_SuperLayout = - &ControlTable_SuperArm1_Super__0_SuperLayout { - arg: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 153 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 154 }, - }, - }, - }; -pub const LAYOUT__563: &ControlTable_SuperArm1_Super__0_SuperLayout = - &ControlTable_SuperArm1_Super__0_SuperLayout { - arg: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 155 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 156 }, - }, - }, - }; -pub const LAYOUT__564: &ControlTable_SuperArm1_Super__0_SuperLayout = - &ControlTable_SuperArm1_Super__0_SuperLayout { - arg: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 157 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 158 }, - }, - }, - }; -pub const LAYOUT__565: &ControlTable_SuperArm1_Super__0_SuperLayout = - &ControlTable_SuperArm1_Super__0_SuperLayout { - arg: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 159 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 160 }, - }, - }, - }; -pub const LAYOUT__566: &ControlTable_SuperArm1_Super__0_SuperLayout = - &ControlTable_SuperArm1_Super__0_SuperLayout { - arg: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 161 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 162 }, - }, - }, - }; -pub const LAYOUT__567: &ControlTable_SuperArm1_Super__0_SuperLayout = - &ControlTable_SuperArm1_Super__0_SuperLayout { - arg: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 163 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 164 }, - }, - }, - }; -pub const LAYOUT__568: &ControlTable_SuperArm1_Super__0_SuperLayout = - &ControlTable_SuperArm1_Super__0_SuperLayout { - arg: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 165 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 166 }, - }, - }, - }; -pub const LAYOUT__569: &ControlTable_SuperArm1_Super__0_SuperLayout = - &ControlTable_SuperArm1_Super__0_SuperLayout { - arg: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 167 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 168 }, - }, - }, - }; -pub const LAYOUT__570: &ControlTable_SuperArm1_Super__0_SuperLayout = - &ControlTable_SuperArm1_Super__0_SuperLayout { - arg: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 169 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 170 }, - }, - }, - }; -pub const LAYOUT__554: &ControlTable_SuperArm1_Super__0_SuperLayout16LayoutArray = &[ - LAYOUT__555, - LAYOUT__556, - LAYOUT__557, - LAYOUT__558, - LAYOUT__559, - LAYOUT__560, - LAYOUT__561, - LAYOUT__562, - LAYOUT__563, - LAYOUT__564, - LAYOUT__565, - LAYOUT__566, - LAYOUT__567, - LAYOUT__568, - LAYOUT__569, - LAYOUT__570, -]; -pub const LAYOUT__553: &ControlTable_SuperArm1_SuperLayout = &ControlTable_SuperArm1_SuperLayout { - _1: LAYOUT__554, - done: &IsZeroLayout { - _super: &NondetRegLayout { - _super: &Reg { offset: 171 }, - }, - inv: &NondetRegLayout { - _super: &Reg { offset: 172 }, - }, - }, -}; -pub const LAYOUT__552: &ControlTable_SuperArm1Layout = &ControlTable_SuperArm1Layout { - _super: LAYOUT__553, - _extra0: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 107 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 108 }, - }, - }, - _extra1: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 109 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 110 }, - }, - }, - _extra2: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 111 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 112 }, - }, - }, - _extra3: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 113 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 114 }, - }, - }, - _extra4: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 115 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 116 }, - }, - }, - _extra5: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 117 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 118 }, - }, - }, - _extra6: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 119 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 120 }, - }, - }, - _extra7: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 121 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 122 }, - }, - }, - _extra8: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 123 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 124 }, - }, - }, - _extra9: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 125 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 126 }, - }, - }, - _extra10: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 127 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 128 }, - }, - }, - _extra11: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 129 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 130 }, - }, - }, - _extra12: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 131 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 132 }, - }, - }, - _extra13: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 133 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 134 }, - }, - }, - _extra14: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 135 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 136 }, - }, - }, - _extra15: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 137 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 138 }, - }, - }, -}; -pub const LAYOUT__532: &ControlTable_SuperLayout = &ControlTable_SuperLayout { - arm0: LAYOUT__533, - arm1: LAYOUT__552, -}; -pub const LAYOUT__572: &ArgU16Layout16LayoutArray = &[ - &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 107 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 108 }, - }, - }, - &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 109 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 110 }, - }, - }, - &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 111 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 112 }, - }, - }, - &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 113 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 114 }, - }, - }, - &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 115 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 116 }, - }, - }, - &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 117 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 118 }, - }, - }, - &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 119 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 120 }, - }, - }, - &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 121 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 122 }, - }, - }, - &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 123 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 124 }, - }, - }, - &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 125 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 126 }, - }, - }, - &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 127 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 128 }, - }, - }, - &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 129 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 130 }, - }, - }, - &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 131 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 132 }, - }, - }, - &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 133 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 134 }, - }, - }, - &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 135 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 136 }, - }, - }, - &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 137 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 138 }, - }, - }, -]; -pub const LAYOUT__573: &ArgU8Layout16LayoutArray = &[ - &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 139 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 140 }, - }, - }, - &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 141 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 142 }, - }, - }, - &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 143 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 144 }, - }, - }, - &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 145 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 146 }, - }, - }, - &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 147 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 148 }, - }, - }, - &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 149 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 150 }, - }, - }, - &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 151 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 152 }, - }, - }, - &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 153 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 154 }, - }, - }, - &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 155 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 156 }, - }, - }, - &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 157 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 158 }, - }, - }, - &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 159 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 160 }, - }, - }, - &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 161 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 162 }, - }, - }, - &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 163 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 164 }, - }, - }, - &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 165 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 166 }, - }, - }, - &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 167 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 168 }, - }, - }, - &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 169 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 170 }, - }, - }, -]; -pub const LAYOUT__571: &_Arguments_ControlTable_SuperLayout = - &_Arguments_ControlTable_SuperLayout { - arg_u16: LAYOUT__572, - arg_u8: LAYOUT__573, - }; -pub const LAYOUT__531: &ControlTableLayout = &ControlTableLayout { - _super: LAYOUT__532, - entry: &NondetRegLayout { - _super: &Reg { offset: 173 }, - }, - mode: &NondetRegLayout { - _super: &Reg { offset: 174 }, - }, - _arguments_control_table__super: LAYOUT__571, -}; -pub const LAYOUT__530: &Control0_SuperArm6Layout = &Control0_SuperArm6Layout { - _super: LAYOUT__531, - _extra0: LAYOUT__416, - _extra1: LAYOUT__417, - _extra2: LAYOUT__421, - _extra3: LAYOUT__422, - _extra4: LAYOUT__426, - _extra5: LAYOUT__427, - _extra6: LAYOUT__431, - _extra7: LAYOUT__432, - _extra8: LAYOUT__436, - _extra9: LAYOUT__437, - _extra10: LAYOUT__441, - _extra11: LAYOUT__442, - _extra12: LAYOUT__446, - _extra13: LAYOUT__447, - _extra14: LAYOUT__451, - _extra15: LAYOUT__452, - _extra16: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 91 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 92 }, - }, - }, - _extra17: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 93 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 94 }, - }, - }, - _extra18: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 95 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 96 }, - }, - }, - _extra19: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 97 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 98 }, - }, - }, - _extra20: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 99 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 100 }, - }, - }, - _extra21: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 101 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 102 }, - }, - }, - _extra22: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 103 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 104 }, - }, - }, - _extra23: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 105 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 106 }, - }, - }, -}; -pub const LAYOUT__574: &Control0_SuperArm7Layout = &Control0_SuperArm7Layout { - _extra0: LAYOUT__416, - _extra1: LAYOUT__417, - _extra2: LAYOUT__421, - _extra3: LAYOUT__422, - _extra4: LAYOUT__426, - _extra5: LAYOUT__427, - _extra6: LAYOUT__431, - _extra7: LAYOUT__432, - _extra8: LAYOUT__436, - _extra9: LAYOUT__437, - _extra10: LAYOUT__441, - _extra11: LAYOUT__442, - _extra12: LAYOUT__446, - _extra13: LAYOUT__447, - _extra14: LAYOUT__451, - _extra15: LAYOUT__452, - _extra16: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 91 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 92 }, - }, - }, - _extra17: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 93 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 94 }, - }, - }, - _extra18: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 95 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 96 }, - }, - }, - _extra19: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 97 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 98 }, - }, - }, - _extra20: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 99 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 100 }, - }, - }, - _extra21: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 101 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 102 }, - }, - }, - _extra22: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 103 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 104 }, - }, - }, - _extra23: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 105 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 106 }, - }, - }, - _extra24: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 107 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 108 }, - }, - }, - _extra25: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 109 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 110 }, - }, - }, - _extra26: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 111 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 112 }, - }, - }, - _extra27: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 113 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 114 }, - }, - }, - _extra28: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 115 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 116 }, - }, - }, - _extra29: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 117 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 118 }, - }, - }, - _extra30: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 119 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 120 }, - }, - }, - _extra31: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 121 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 122 }, - }, - }, - _extra32: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 123 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 124 }, - }, - }, - _extra33: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 125 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 126 }, - }, - }, - _extra34: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 127 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 128 }, - }, - }, - _extra35: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 129 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 130 }, - }, - }, - _extra36: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 131 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 132 }, - }, - }, - _extra37: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 133 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 134 }, - }, - }, - _extra38: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 135 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 136 }, - }, - }, - _extra39: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 137 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 138 }, - }, - }, - _extra40: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 139 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 140 }, - }, - }, - _extra41: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 141 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 142 }, - }, - }, - _extra42: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 143 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 144 }, - }, - }, - _extra43: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 145 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 146 }, - }, - }, - _extra44: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 147 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 148 }, - }, - }, - _extra45: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 149 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 150 }, - }, - }, - _extra46: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 151 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 152 }, - }, - }, - _extra47: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 153 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 154 }, - }, - }, - _extra48: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 155 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 156 }, - }, - }, - _extra49: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 157 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 158 }, - }, - }, - _extra50: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 159 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 160 }, - }, - }, - _extra51: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 161 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 162 }, - }, - }, - _extra52: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 163 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 164 }, - }, - }, - _extra53: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 165 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 166 }, - }, - }, - _extra54: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 167 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 168 }, - }, - }, - _extra55: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 169 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 170 }, - }, - }, -}; -pub const LAYOUT__409: &Control0_SuperLayout = &Control0_SuperLayout { - arm0: LAYOUT__410, - arm1: LAYOUT__453, - arm2: LAYOUT__493, - arm3: LAYOUT__502, - arm4: LAYOUT__506, - arm5: LAYOUT__519, - arm6: LAYOUT__530, - arm7: LAYOUT__574, -}; -pub const LAYOUT__575: &_Arguments_Control0_SuperLayout = &_Arguments_Control0_SuperLayout { - memory_arg: LAYOUT__491, - cycle_arg: LAYOUT__492, - arg_u16: LAYOUT__572, - arg_u8: LAYOUT__573, -}; -pub const LAYOUT__408: &Control0Layout = &Control0Layout { - _super: LAYOUT__409, - arg: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 178 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 0 }, - }, - }, - _arguments_control0__super: LAYOUT__575, -}; -pub const LAYOUT__579: &NondetU16RegLayout = &NondetU16RegLayout { - arg: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 76 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 77 }, - }, - }, -}; -pub const LAYOUT__578: &U16RegLayout = &U16RegLayout { ret: LAYOUT__579 }; -pub const LAYOUT__577: &AddrDecomposeBitsLayout = &AddrDecomposeBitsLayout { - low0: &NondetRegLayout { - _super: &Reg { offset: 74 }, - }, - low1: &NondetRegLayout { - _super: &Reg { offset: 75 }, - }, - upper_diff: LAYOUT__578, - _0: &IsZeroLayout { - _super: &NondetRegLayout { - _super: &Reg { offset: 78 }, - }, - inv: &NondetRegLayout { - _super: &Reg { offset: 79 }, - }, - }, - med14: LAYOUT__27, -}; -pub const LAYOUT__581: &MemoryArgLayout8LayoutArray = &[ - LAYOUT__416, - LAYOUT__417, - LAYOUT__421, - LAYOUT__422, - LAYOUT__426, - LAYOUT__427, - LAYOUT__431, - LAYOUT__432, -]; -pub const LAYOUT__582: &CycleArgLayout4LayoutArray = &[ - &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 59 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 60 }, - }, - }, - &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 61 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 62 }, - }, - }, - &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 63 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 64 }, - }, - }, - &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 65 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 66 }, - }, - }, -]; -pub const LAYOUT__583: &ArgU16Layout2LayoutArray = &[ - &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 67 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 68 }, - }, - }, - &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 69 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 70 }, - }, - }, -]; -pub const LAYOUT__580: &_Arguments_ECall0OutputLayout = &_Arguments_ECall0OutputLayout { - memory_arg: LAYOUT__581, - cycle_arg: LAYOUT__582, - arg_u16: LAYOUT__583, -}; -pub const LAYOUT__589: &IsCycleLayout = &IsCycleLayout { - arg: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 59 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 60 }, - }, - }, -}; -pub const LAYOUT__588: &IsForwardLayout = &IsForwardLayout { _0: LAYOUT__589 }; -pub const LAYOUT__587: &MemoryReadLayout = &MemoryReadLayout { - io: LAYOUT__415, - _0: LAYOUT__588, -}; -pub const LAYOUT__592: &IsCycleLayout = &IsCycleLayout { - arg: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 61 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 62 }, - }, - }, -}; -pub const LAYOUT__591: &IsForwardLayout = &IsForwardLayout { _0: LAYOUT__592 }; -pub const LAYOUT__590: &MemoryReadLayout = &MemoryReadLayout { - io: LAYOUT__420, - _0: LAYOUT__591, -}; -pub const LAYOUT__594: &NondetRegLayout4LayoutArray = &[ - &NondetRegLayout { - _super: &Reg { offset: 82 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 83 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 84 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 85 }, - }, -]; -pub const LAYOUT__593: &OneHot_4_Layout = &OneHot_4_Layout { - _super: LAYOUT__594, -}; -pub const LAYOUT__586: &MachineECallLayout = &MachineECallLayout { - load_inst: LAYOUT__587, - dispatch_idx: LAYOUT__590, - dispatch: LAYOUT__593, -}; -pub const LAYOUT__585: &ECall0OutputArm0Layout = &ECall0OutputArm0Layout { - _super: LAYOUT__586, - _extra0: LAYOUT__426, - _extra1: LAYOUT__427, - _extra2: LAYOUT__431, - _extra3: LAYOUT__432, - _extra4: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 63 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 64 }, - }, - }, - _extra5: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 65 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 66 }, - }, - }, - _extra6: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 67 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 68 }, - }, - }, - _extra7: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 69 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 70 }, - }, - }, -}; -pub const LAYOUT__596: &ECallTerminateLayout = &ECallTerminateLayout { - a0: LAYOUT__587, - a1: LAYOUT__590, -}; -pub const LAYOUT__595: &ECall0OutputArm1Layout = &ECall0OutputArm1Layout { - _super: LAYOUT__596, - _extra0: LAYOUT__426, - _extra1: LAYOUT__427, - _extra2: LAYOUT__431, - _extra3: LAYOUT__432, - _extra4: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 63 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 64 }, - }, - }, - _extra5: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 65 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 66 }, - }, - }, - _extra6: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 67 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 68 }, - }, - }, - _extra7: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 69 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 70 }, - }, - }, -}; -pub const LAYOUT__600: &IsCycleLayout = &IsCycleLayout { - arg: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 63 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 64 }, - }, - }, -}; -pub const LAYOUT__599: &IsForwardLayout = &IsForwardLayout { _0: LAYOUT__600 }; -pub const LAYOUT__598: &MemoryReadLayout = &MemoryReadLayout { - io: LAYOUT__425, - _0: LAYOUT__599, -}; -pub const LAYOUT__601: &NondetU16RegLayout = &NondetU16RegLayout { - arg: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 67 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 68 }, - }, - }, -}; -pub const LAYOUT__603: &NondetU16RegLayout = &NondetU16RegLayout { - arg: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 69 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 70 }, - }, - }, -}; -pub const LAYOUT__602: &U16RegLayout = &U16RegLayout { ret: LAYOUT__603 }; -pub const LAYOUT__604: &MemoryWriteLayout = &MemoryWriteLayout { - io: LAYOUT__430, - _0: LAYOUT__301, -}; -pub const LAYOUT__607: &NondetRegLayout4LayoutArray = &[ - &NondetRegLayout { - _super: &Reg { offset: 84 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 85 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 86 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 87 }, - }, -]; -pub const LAYOUT__606: &OneHot_4_Layout = &OneHot_4_Layout { - _super: LAYOUT__607, -}; -pub const LAYOUT__605: &DecomposeLow2Layout = &DecomposeLow2Layout { - high: &NondetRegLayout { - _super: &Reg { offset: 82 }, - }, - low2: &NondetRegLayout { - _super: &Reg { offset: 83 }, - }, - low2_hot: LAYOUT__606, - high_zero: &IsZeroLayout { - _super: &NondetRegLayout { - _super: &Reg { offset: 88 }, - }, - inv: &NondetRegLayout { - _super: &Reg { offset: 89 }, - }, - }, - is_zero: &NondetRegLayout { - _super: &Reg { offset: 90 }, - }, -}; -pub const LAYOUT__610: &NondetRegLayout4LayoutArray = &[ - &NondetRegLayout { - _super: &Reg { offset: 93 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 94 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 95 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 96 }, - }, -]; -pub const LAYOUT__609: &OneHot_4_Layout = &OneHot_4_Layout { - _super: LAYOUT__610, -}; -pub const LAYOUT__608: &DecomposeLow2Layout = &DecomposeLow2Layout { - high: &NondetRegLayout { - _super: &Reg { offset: 91 }, - }, - low2: &NondetRegLayout { - _super: &Reg { offset: 92 }, - }, - low2_hot: LAYOUT__609, - high_zero: &IsZeroLayout { - _super: &NondetRegLayout { - _super: &Reg { offset: 97 }, - }, - inv: &NondetRegLayout { - _super: &Reg { offset: 98 }, - }, - }, - is_zero: &NondetRegLayout { - _super: &Reg { offset: 99 }, - }, -}; -pub const LAYOUT__597: &ECallHostReadSetupLayout = &ECallHostReadSetupLayout { - fd: LAYOUT__587, - ptr: LAYOUT__590, - len: LAYOUT__598, - new_len: LAYOUT__601, - diff: LAYOUT__602, - _0: LAYOUT__604, - ptr_decomp: LAYOUT__605, - len_decomp: LAYOUT__608, - len123: &NondetRegLayout { - _super: &Reg { offset: 100 }, - }, - uneven: &NondetRegLayout { - _super: &Reg { offset: 101 }, - }, -}; -pub const LAYOUT__611: &ECallHostWriteLayout = &ECallHostWriteLayout { - fd: LAYOUT__587, - ptr: LAYOUT__590, - len: LAYOUT__598, - new_len: LAYOUT__601, - diff: LAYOUT__602, - _0: LAYOUT__604, -}; -pub const LAYOUT__612: &ECall0OutputArm4Layout = &ECall0OutputArm4Layout { - _extra0: LAYOUT__416, - _extra1: LAYOUT__417, - _extra2: LAYOUT__421, - _extra3: LAYOUT__422, - _extra4: LAYOUT__426, - _extra5: LAYOUT__427, - _extra6: LAYOUT__431, - _extra7: LAYOUT__432, - _extra8: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 59 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 60 }, - }, - }, - _extra9: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 61 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 62 }, - }, - }, - _extra10: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 63 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 64 }, - }, - }, - _extra11: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 65 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 66 }, - }, - }, - _extra12: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 67 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 68 }, - }, - }, - _extra13: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 69 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 70 }, - }, - }, -}; -pub const LAYOUT__617: &MemoryWriteUnconstrainedLayout = &MemoryWriteUnconstrainedLayout { - io: LAYOUT__415, - _0: LAYOUT__588, -}; -pub const LAYOUT__616: &ECallHostReadWords__0_SuperLayout = &ECallHostReadWords__0_SuperLayout { - addr: &NondetRegLayout { - _super: &Reg { offset: 100 }, - }, - _0: LAYOUT__617, -}; -pub const LAYOUT__619: &MemoryWriteUnconstrainedLayout = &MemoryWriteUnconstrainedLayout { - io: LAYOUT__420, - _0: LAYOUT__591, -}; -pub const LAYOUT__618: &ECallHostReadWords__0_SuperLayout = &ECallHostReadWords__0_SuperLayout { - addr: &NondetRegLayout { - _super: &Reg { offset: 101 }, - }, - _0: LAYOUT__619, -}; -pub const LAYOUT__621: &MemoryWriteUnconstrainedLayout = &MemoryWriteUnconstrainedLayout { - io: LAYOUT__425, - _0: LAYOUT__599, -}; -pub const LAYOUT__620: &ECallHostReadWords__0_SuperLayout = &ECallHostReadWords__0_SuperLayout { - addr: &NondetRegLayout { - _super: &Reg { offset: 102 }, - }, - _0: LAYOUT__621, -}; -pub const LAYOUT__623: &MemoryWriteUnconstrainedLayout = &MemoryWriteUnconstrainedLayout { - io: LAYOUT__430, - _0: LAYOUT__301, -}; -pub const LAYOUT__622: &ECallHostReadWords__0_SuperLayout = &ECallHostReadWords__0_SuperLayout { - addr: &NondetRegLayout { - _super: &Reg { offset: 103 }, - }, - _0: LAYOUT__623, -}; -pub const LAYOUT__615: &ECallHostReadWords__0_SuperLayout4LayoutArray = - &[LAYOUT__616, LAYOUT__618, LAYOUT__620, LAYOUT__622]; -pub const LAYOUT__614: &ECallHostReadWordsLayout = &ECallHostReadWordsLayout { - len_decomp: LAYOUT__605, - words_decomp: LAYOUT__608, - _1: LAYOUT__615, - len_zero: &IsZeroLayout { - _super: &NondetRegLayout { - _super: &Reg { offset: 104 }, - }, - inv: &NondetRegLayout { - _super: &Reg { offset: 105 }, - }, - }, -}; -pub const LAYOUT__613: &ECall0OutputArm5Layout = &ECall0OutputArm5Layout { - _super: LAYOUT__614, - _extra0: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 67 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 68 }, - }, - }, - _extra1: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 69 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 70 }, - }, - }, -}; -pub const LAYOUT__624: &ECall0OutputArm6Layout = &ECall0OutputArm6Layout { - _extra0: LAYOUT__416, - _extra1: LAYOUT__417, - _extra2: LAYOUT__421, - _extra3: LAYOUT__422, - _extra4: LAYOUT__426, - _extra5: LAYOUT__427, - _extra6: LAYOUT__431, - _extra7: LAYOUT__432, - _extra8: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 59 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 60 }, - }, - }, - _extra9: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 61 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 62 }, - }, - }, - _extra10: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 63 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 64 }, - }, - }, - _extra11: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 65 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 66 }, - }, - }, - _extra12: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 67 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 68 }, - }, - }, - _extra13: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 69 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 70 }, - }, - }, -}; -pub const LAYOUT__625: &ECall0OutputArm7Layout = &ECall0OutputArm7Layout { - _extra0: LAYOUT__416, - _extra1: LAYOUT__417, - _extra2: LAYOUT__421, - _extra3: LAYOUT__422, - _extra4: LAYOUT__426, - _extra5: LAYOUT__427, - _extra6: LAYOUT__431, - _extra7: LAYOUT__432, - _extra8: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 59 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 60 }, - }, - }, - _extra9: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 61 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 62 }, - }, - }, - _extra10: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 63 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 64 }, - }, - }, - _extra11: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 65 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 66 }, - }, - }, - _extra12: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 67 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 68 }, - }, - }, - _extra13: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 69 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 70 }, - }, - }, -}; -pub const LAYOUT__584: &ECall0OutputLayout = &ECall0OutputLayout { - arm0: LAYOUT__585, - arm1: LAYOUT__595, - arm2: LAYOUT__597, - arm3: LAYOUT__611, - arm4: LAYOUT__612, - arm5: LAYOUT__613, - arm6: LAYOUT__624, - arm7: LAYOUT__625, -}; -pub const LAYOUT__627: &NondetU16RegLayout = &NondetU16RegLayout { - arg: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 110 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 111 }, - }, - }, -}; -pub const LAYOUT__626: &NormalizeU32Layout = &NormalizeU32Layout { - low16: LAYOUT__627, - low_carry: &NondetRegLayout { - _super: &Reg { offset: 112 }, - }, - high16: LAYOUT__505, - high_carry: &NondetRegLayout { - _super: &Reg { offset: 115 }, - }, -}; -pub const LAYOUT__576: &ECall0Layout = &ECall0Layout { - s0: &NondetRegLayout { - _super: &Reg { offset: 71 }, - }, - s1: &NondetRegLayout { - _super: &Reg { offset: 72 }, - }, - s2: &NondetRegLayout { - _super: &Reg { offset: 73 }, - }, - pc_addr: LAYOUT__577, - _arguments_e_call0_output: LAYOUT__580, - output: LAYOUT__584, - is_decode: &IsZeroLayout { - _super: &NondetRegLayout { - _super: &Reg { offset: 106 }, - }, - inv: &NondetRegLayout { - _super: &Reg { offset: 107 }, - }, - }, - is_p2_entry: &IsZeroLayout { - _super: &NondetRegLayout { - _super: &Reg { offset: 108 }, - }, - inv: &NondetRegLayout { - _super: &Reg { offset: 109 }, - }, - }, - add_pc: LAYOUT__626, - arg: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 116 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 0 }, - }, - }, -}; -pub const LAYOUT__630: &NondetRegLayout24LayoutArray = &[ - &NondetRegLayout { - _super: &Reg { offset: 38 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 39 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 40 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 41 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 42 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 43 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 44 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 45 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 46 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 47 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 48 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 49 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 50 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 51 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 52 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 53 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 54 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 55 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 56 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 57 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 58 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 59 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 60 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 61 }, - }, -]; -pub const LAYOUT__629: &PoseidonStateLayout = &PoseidonStateLayout { - has_state: &NondetRegLayout { - _super: &Reg { offset: 27 }, - }, - state_addr: &NondetRegLayout { - _super: &Reg { offset: 28 }, - }, - buf_out_addr: &NondetRegLayout { - _super: &Reg { offset: 29 }, - }, - is_elem: &NondetRegLayout { - _super: &Reg { offset: 30 }, - }, - check_out: &NondetRegLayout { - _super: &Reg { offset: 31 }, - }, - load_tx_type: &NondetRegLayout { - _super: &Reg { offset: 32 }, - }, - next_state: &NondetRegLayout { - _super: &Reg { offset: 33 }, - }, - sub_state: &NondetRegLayout { - _super: &Reg { offset: 34 }, - }, - buf_in_addr: &NondetRegLayout { - _super: &Reg { offset: 35 }, - }, - count: &NondetRegLayout { - _super: &Reg { offset: 36 }, - }, - mode: &NondetRegLayout { - _super: &Reg { offset: 37 }, - }, - inner: LAYOUT__630, - zcheck: &NondetExtRegLayout { - _super: &Reg { offset: 62 }, - }, -}; -pub const LAYOUT__633: &MemoryArgLayout = &MemoryArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 66 }, - }, - addr: &NondetRegLayout { - _super: &Reg { offset: 67 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 68 }, - }, - data_low: &NondetRegLayout { - _super: &Reg { offset: 69 }, - }, - data_high: &NondetRegLayout { - _super: &Reg { offset: 70 }, - }, -}; -pub const LAYOUT__634: &MemoryArgLayout = &MemoryArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 71 }, - }, - addr: &NondetRegLayout { - _super: &Reg { offset: 67 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 0 }, - }, - data_low: &NondetRegLayout { - _super: &Reg { offset: 72 }, - }, - data_high: &NondetRegLayout { - _super: &Reg { offset: 73 }, - }, -}; -pub const LAYOUT__635: &MemoryArgLayout = &MemoryArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 74 }, - }, - addr: &NondetRegLayout { - _super: &Reg { offset: 75 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 76 }, - }, - data_low: &NondetRegLayout { - _super: &Reg { offset: 77 }, - }, - data_high: &NondetRegLayout { - _super: &Reg { offset: 78 }, - }, -}; -pub const LAYOUT__636: &MemoryArgLayout = &MemoryArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 79 }, - }, - addr: &NondetRegLayout { - _super: &Reg { offset: 75 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 0 }, - }, - data_low: &NondetRegLayout { - _super: &Reg { offset: 80 }, - }, - data_high: &NondetRegLayout { - _super: &Reg { offset: 81 }, - }, -}; -pub const LAYOUT__637: &MemoryArgLayout = &MemoryArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 82 }, - }, - addr: &NondetRegLayout { - _super: &Reg { offset: 83 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 84 }, - }, - data_low: &NondetRegLayout { - _super: &Reg { offset: 85 }, - }, - data_high: &NondetRegLayout { - _super: &Reg { offset: 86 }, - }, -}; -pub const LAYOUT__638: &MemoryArgLayout = &MemoryArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 87 }, - }, - addr: &NondetRegLayout { - _super: &Reg { offset: 83 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 0 }, - }, - data_low: &NondetRegLayout { - _super: &Reg { offset: 88 }, - }, - data_high: &NondetRegLayout { - _super: &Reg { offset: 89 }, - }, -}; -pub const LAYOUT__639: &MemoryArgLayout = &MemoryArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 90 }, - }, - addr: &NondetRegLayout { - _super: &Reg { offset: 91 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 92 }, - }, - data_low: &NondetRegLayout { - _super: &Reg { offset: 93 }, - }, - data_high: &NondetRegLayout { - _super: &Reg { offset: 94 }, - }, -}; -pub const LAYOUT__640: &MemoryArgLayout = &MemoryArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 95 }, - }, - addr: &NondetRegLayout { - _super: &Reg { offset: 91 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 0 }, - }, - data_low: &NondetRegLayout { - _super: &Reg { offset: 96 }, - }, - data_high: &NondetRegLayout { - _super: &Reg { offset: 97 }, - }, -}; -pub const LAYOUT__641: &MemoryArgLayout = &MemoryArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 98 }, - }, - addr: &NondetRegLayout { - _super: &Reg { offset: 99 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 100 }, - }, - data_low: &NondetRegLayout { - _super: &Reg { offset: 101 }, - }, - data_high: &NondetRegLayout { - _super: &Reg { offset: 102 }, - }, -}; -pub const LAYOUT__642: &MemoryArgLayout = &MemoryArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 103 }, - }, - addr: &NondetRegLayout { - _super: &Reg { offset: 99 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 0 }, - }, - data_low: &NondetRegLayout { - _super: &Reg { offset: 104 }, - }, - data_high: &NondetRegLayout { - _super: &Reg { offset: 105 }, - }, -}; -pub const LAYOUT__643: &MemoryArgLayout = &MemoryArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 106 }, - }, - addr: &NondetRegLayout { - _super: &Reg { offset: 107 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 108 }, - }, - data_low: &NondetRegLayout { - _super: &Reg { offset: 109 }, - }, - data_high: &NondetRegLayout { - _super: &Reg { offset: 110 }, - }, -}; -pub const LAYOUT__644: &MemoryArgLayout = &MemoryArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 111 }, - }, - addr: &NondetRegLayout { - _super: &Reg { offset: 107 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 0 }, - }, - data_low: &NondetRegLayout { - _super: &Reg { offset: 112 }, - }, - data_high: &NondetRegLayout { - _super: &Reg { offset: 113 }, - }, -}; -pub const LAYOUT__645: &MemoryArgLayout = &MemoryArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 114 }, - }, - addr: &NondetRegLayout { - _super: &Reg { offset: 115 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 116 }, - }, - data_low: &NondetRegLayout { - _super: &Reg { offset: 117 }, - }, - data_high: &NondetRegLayout { - _super: &Reg { offset: 118 }, - }, -}; -pub const LAYOUT__646: &MemoryArgLayout = &MemoryArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 119 }, - }, - addr: &NondetRegLayout { - _super: &Reg { offset: 115 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 0 }, - }, - data_low: &NondetRegLayout { - _super: &Reg { offset: 120 }, - }, - data_high: &NondetRegLayout { - _super: &Reg { offset: 121 }, - }, -}; -pub const LAYOUT__647: &MemoryArgLayout = &MemoryArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 122 }, - }, - addr: &NondetRegLayout { - _super: &Reg { offset: 123 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 124 }, - }, - data_low: &NondetRegLayout { - _super: &Reg { offset: 125 }, - }, - data_high: &NondetRegLayout { - _super: &Reg { offset: 126 }, - }, -}; -pub const LAYOUT__648: &MemoryArgLayout = &MemoryArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 127 }, - }, - addr: &NondetRegLayout { - _super: &Reg { offset: 123 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 0 }, - }, - data_low: &NondetRegLayout { - _super: &Reg { offset: 128 }, - }, - data_high: &NondetRegLayout { - _super: &Reg { offset: 129 }, - }, -}; -pub const LAYOUT__632: &MemoryArgLayout16LayoutArray = &[ - LAYOUT__633, - LAYOUT__634, - LAYOUT__635, - LAYOUT__636, - LAYOUT__637, - LAYOUT__638, - LAYOUT__639, - LAYOUT__640, - LAYOUT__641, - LAYOUT__642, - LAYOUT__643, - LAYOUT__644, - LAYOUT__645, - LAYOUT__646, - LAYOUT__647, - LAYOUT__648, -]; -pub const LAYOUT__649: &CycleArgLayout8LayoutArray = &[ - &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 130 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 131 }, - }, - }, - &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 132 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 133 }, - }, - }, - &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 134 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 135 }, - }, - }, - &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 136 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 137 }, - }, - }, - &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 138 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 139 }, - }, - }, - &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 140 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 141 }, - }, - }, - &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 142 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 143 }, - }, - }, - &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 144 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 145 }, - }, - }, -]; -pub const LAYOUT__650: &ArgU16Layout16LayoutArray = &[ - &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 146 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 147 }, - }, - }, - &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 148 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 149 }, - }, - }, - &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 150 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 151 }, - }, - }, - &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 152 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 153 }, - }, - }, - &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 154 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 155 }, - }, - }, - &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 156 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 157 }, - }, - }, - &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 158 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 159 }, - }, - }, - &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 160 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 161 }, - }, - }, - &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 162 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 163 }, - }, - }, - &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 164 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 165 }, - }, - }, - &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 166 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 167 }, - }, - }, - &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 168 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 169 }, - }, - }, - &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 170 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 171 }, - }, - }, - &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 172 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 173 }, - }, - }, - &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 174 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 175 }, - }, - }, - &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 176 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 177 }, - }, - }, -]; -pub const LAYOUT__651: &ArgU8Layout2LayoutArray = &[ - &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 178 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 179 }, - }, - }, - &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 180 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 181 }, - }, - }, -]; -pub const LAYOUT__631: &_Arguments_Poseidon0StateLayout = &_Arguments_Poseidon0StateLayout { - memory_arg: LAYOUT__632, - cycle_arg: LAYOUT__649, - arg_u16: LAYOUT__650, - arg_u8: LAYOUT__651, -}; -pub const LAYOUT__656: &PoseidonEntry_SuperArm0Layout = &PoseidonEntry_SuperArm0Layout { - _super: LAYOUT__629, - _extra0: LAYOUT__633, - _extra1: LAYOUT__634, - _extra2: LAYOUT__635, - _extra3: LAYOUT__636, - _extra4: LAYOUT__637, - _extra5: LAYOUT__638, - _extra6: LAYOUT__639, - _extra7: LAYOUT__640, - _extra8: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 130 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 131 }, - }, - }, - _extra9: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 132 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 133 }, - }, - }, - _extra10: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 134 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 135 }, - }, - }, - _extra11: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 136 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 137 }, - }, - }, -}; -pub const LAYOUT__660: &MemoryIOLayout = &MemoryIOLayout { - old_txn: LAYOUT__633, - new_txn: LAYOUT__634, -}; -pub const LAYOUT__662: &IsCycleLayout = &IsCycleLayout { - arg: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 130 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 131 }, - }, - }, -}; -pub const LAYOUT__661: &IsForwardLayout = &IsForwardLayout { _0: LAYOUT__662 }; -pub const LAYOUT__659: &MemoryReadLayout = &MemoryReadLayout { - io: LAYOUT__660, - _0: LAYOUT__661, -}; -pub const LAYOUT__658: &ReadAddrLayout = &ReadAddrLayout { - addr32: LAYOUT__659, -}; -pub const LAYOUT__665: &MemoryIOLayout = &MemoryIOLayout { - old_txn: LAYOUT__635, - new_txn: LAYOUT__636, -}; -pub const LAYOUT__667: &IsCycleLayout = &IsCycleLayout { - arg: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 132 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 133 }, - }, - }, -}; -pub const LAYOUT__666: &IsForwardLayout = &IsForwardLayout { _0: LAYOUT__667 }; -pub const LAYOUT__664: &MemoryReadLayout = &MemoryReadLayout { - io: LAYOUT__665, - _0: LAYOUT__666, -}; -pub const LAYOUT__663: &ReadAddrLayout = &ReadAddrLayout { - addr32: LAYOUT__664, -}; -pub const LAYOUT__670: &MemoryIOLayout = &MemoryIOLayout { - old_txn: LAYOUT__637, - new_txn: LAYOUT__638, -}; -pub const LAYOUT__672: &IsCycleLayout = &IsCycleLayout { - arg: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 134 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 135 }, - }, - }, -}; -pub const LAYOUT__671: &IsForwardLayout = &IsForwardLayout { _0: LAYOUT__672 }; -pub const LAYOUT__669: &MemoryReadLayout = &MemoryReadLayout { - io: LAYOUT__670, - _0: LAYOUT__671, -}; -pub const LAYOUT__668: &ReadAddrLayout = &ReadAddrLayout { - addr32: LAYOUT__669, -}; -pub const LAYOUT__674: &MemoryIOLayout = &MemoryIOLayout { - old_txn: LAYOUT__639, - new_txn: LAYOUT__640, -}; -pub const LAYOUT__676: &IsCycleLayout = &IsCycleLayout { - arg: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 136 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 137 }, - }, - }, -}; -pub const LAYOUT__675: &IsForwardLayout = &IsForwardLayout { _0: LAYOUT__676 }; -pub const LAYOUT__673: &MemoryReadLayout = &MemoryReadLayout { - io: LAYOUT__674, - _0: LAYOUT__675, -}; -pub const LAYOUT__657: &PoseidonEcallLayout = &PoseidonEcallLayout { - _super: LAYOUT__629, - state_addr: LAYOUT__658, - buf_in_addr: LAYOUT__663, - buf_out_addr: LAYOUT__668, - bits_and_count: LAYOUT__673, - _0: &IsZeroLayout { - _super: &NondetRegLayout { - _super: &Reg { offset: 182 }, - }, - inv: &NondetRegLayout { - _super: &Reg { offset: 183 }, - }, - }, - is_elem: &NondetRegLayout { - _super: &Reg { offset: 184 }, - }, - check_out: &NondetRegLayout { - _super: &Reg { offset: 185 }, - }, - count_zero: &IsZeroLayout { - _super: &NondetRegLayout { - _super: &Reg { offset: 186 }, - }, - inv: &NondetRegLayout { - _super: &Reg { offset: 187 }, - }, - }, -}; -pub const LAYOUT__655: &PoseidonEntry_SuperLayout = &PoseidonEntry_SuperLayout { - _super: LAYOUT__629, - arm0: LAYOUT__656, - arm1: LAYOUT__657, -}; -pub const LAYOUT__678: &MemoryArgLayout8LayoutArray = &[ - LAYOUT__633, - LAYOUT__634, - LAYOUT__635, - LAYOUT__636, - LAYOUT__637, - LAYOUT__638, - LAYOUT__639, - LAYOUT__640, -]; -pub const LAYOUT__679: &CycleArgLayout4LayoutArray = &[ - &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 130 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 131 }, - }, - }, - &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 132 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 133 }, - }, - }, - &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 134 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 135 }, - }, - }, - &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 136 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 137 }, - }, - }, -]; -pub const LAYOUT__677: &_Arguments_PoseidonEntry_SuperLayout = - &_Arguments_PoseidonEntry_SuperLayout { - memory_arg: LAYOUT__678, - cycle_arg: LAYOUT__679, - }; -pub const LAYOUT__654: &PoseidonEntryLayout = &PoseidonEntryLayout { - _super: LAYOUT__655, - pc_zero: &IsZeroLayout { - _super: &NondetRegLayout { - _super: &Reg { offset: 188 }, - }, - inv: &NondetRegLayout { - _super: &Reg { offset: 189 }, - }, - }, - _arguments_poseidon_entry__super: LAYOUT__677, -}; -pub const LAYOUT__653: &Poseidon0StateArm0Layout = &Poseidon0StateArm0Layout { - _super: LAYOUT__654, - _extra0: LAYOUT__641, - _extra1: LAYOUT__642, - _extra2: LAYOUT__643, - _extra3: LAYOUT__644, - _extra4: LAYOUT__645, - _extra5: LAYOUT__646, - _extra6: LAYOUT__647, - _extra7: LAYOUT__648, - _extra8: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 138 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 139 }, - }, - }, - _extra9: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 140 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 141 }, - }, - }, - _extra10: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 142 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 143 }, - }, - }, - _extra11: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 144 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 145 }, - }, - }, - _extra12: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 146 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 147 }, - }, - }, - _extra13: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 148 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 149 }, - }, - }, - _extra14: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 150 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 151 }, - }, - }, - _extra15: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 152 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 153 }, - }, - }, - _extra16: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 154 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 155 }, - }, - }, - _extra17: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 156 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 157 }, - }, - }, - _extra18: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 158 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 159 }, - }, - }, - _extra19: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 160 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 161 }, - }, - }, - _extra20: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 162 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 163 }, - }, - }, - _extra21: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 164 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 165 }, - }, - }, - _extra22: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 166 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 167 }, - }, - }, - _extra23: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 168 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 169 }, - }, - }, - _extra24: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 170 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 171 }, - }, - }, - _extra25: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 172 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 173 }, - }, - }, - _extra26: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 174 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 175 }, - }, - }, - _extra27: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 176 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 177 }, - }, - }, - _extra28: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 178 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 179 }, - }, - }, - _extra29: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 180 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 181 }, - }, - }, -}; -pub const LAYOUT__683: &ReadElemLayout = &ReadElemLayout { - elem32: LAYOUT__659, -}; -pub const LAYOUT__684: &ReadElemLayout = &ReadElemLayout { - elem32: LAYOUT__664, -}; -pub const LAYOUT__685: &ReadElemLayout = &ReadElemLayout { - elem32: LAYOUT__669, -}; -pub const LAYOUT__686: &ReadElemLayout = &ReadElemLayout { - elem32: LAYOUT__673, -}; -pub const LAYOUT__689: &MemoryIOLayout = &MemoryIOLayout { - old_txn: LAYOUT__641, - new_txn: LAYOUT__642, -}; -pub const LAYOUT__691: &IsCycleLayout = &IsCycleLayout { - arg: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 138 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 139 }, - }, - }, -}; -pub const LAYOUT__690: &IsForwardLayout = &IsForwardLayout { _0: LAYOUT__691 }; -pub const LAYOUT__688: &MemoryReadLayout = &MemoryReadLayout { - io: LAYOUT__689, - _0: LAYOUT__690, -}; -pub const LAYOUT__687: &ReadElemLayout = &ReadElemLayout { - elem32: LAYOUT__688, -}; -pub const LAYOUT__694: &MemoryIOLayout = &MemoryIOLayout { - old_txn: LAYOUT__643, - new_txn: LAYOUT__644, -}; -pub const LAYOUT__696: &IsCycleLayout = &IsCycleLayout { - arg: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 140 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 141 }, - }, - }, -}; -pub const LAYOUT__695: &IsForwardLayout = &IsForwardLayout { _0: LAYOUT__696 }; -pub const LAYOUT__693: &MemoryReadLayout = &MemoryReadLayout { - io: LAYOUT__694, - _0: LAYOUT__695, -}; -pub const LAYOUT__692: &ReadElemLayout = &ReadElemLayout { - elem32: LAYOUT__693, -}; -pub const LAYOUT__699: &MemoryIOLayout = &MemoryIOLayout { - old_txn: LAYOUT__645, - new_txn: LAYOUT__646, -}; -pub const LAYOUT__701: &IsCycleLayout = &IsCycleLayout { - arg: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 142 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 143 }, - }, - }, -}; -pub const LAYOUT__700: &IsForwardLayout = &IsForwardLayout { _0: LAYOUT__701 }; -pub const LAYOUT__698: &MemoryReadLayout = &MemoryReadLayout { - io: LAYOUT__699, - _0: LAYOUT__700, -}; -pub const LAYOUT__697: &ReadElemLayout = &ReadElemLayout { - elem32: LAYOUT__698, -}; -pub const LAYOUT__704: &MemoryIOLayout = &MemoryIOLayout { - old_txn: LAYOUT__647, - new_txn: LAYOUT__648, -}; -pub const LAYOUT__706: &IsCycleLayout = &IsCycleLayout { - arg: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 144 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 145 }, - }, - }, -}; -pub const LAYOUT__705: &IsForwardLayout = &IsForwardLayout { _0: LAYOUT__706 }; -pub const LAYOUT__703: &MemoryReadLayout = &MemoryReadLayout { - io: LAYOUT__704, - _0: LAYOUT__705, -}; -pub const LAYOUT__702: &ReadElemLayout = &ReadElemLayout { - elem32: LAYOUT__703, -}; -pub const LAYOUT__682: &ReadElemLayout8LayoutArray = &[ - LAYOUT__683, - LAYOUT__684, - LAYOUT__685, - LAYOUT__686, - LAYOUT__687, - LAYOUT__692, - LAYOUT__697, - LAYOUT__702, -]; -pub const LAYOUT__681: &PoseidonLoadStateLayout = &PoseidonLoadStateLayout { - _super: LAYOUT__629, - load_list: LAYOUT__682, -}; -pub const LAYOUT__680: &Poseidon0StateArm1Layout = &Poseidon0StateArm1Layout { - _super: LAYOUT__681, - _extra0: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 146 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 147 }, - }, - }, - _extra1: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 148 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 149 }, - }, - }, - _extra2: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 150 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 151 }, - }, - }, - _extra3: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 152 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 153 }, - }, - }, - _extra4: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 154 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 155 }, - }, - }, - _extra5: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 156 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 157 }, - }, - }, - _extra6: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 158 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 159 }, - }, - }, - _extra7: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 160 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 161 }, - }, - }, - _extra8: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 162 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 163 }, - }, - }, - _extra9: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 164 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 165 }, - }, - }, - _extra10: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 166 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 167 }, - }, - }, - _extra11: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 168 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 169 }, - }, - }, - _extra12: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 170 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 171 }, - }, - }, - _extra13: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 172 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 173 }, - }, - }, - _extra14: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 174 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 175 }, - }, - }, - _extra15: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 176 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 177 }, - }, - }, - _extra16: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 178 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 179 }, - }, - }, - _extra17: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 180 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 181 }, - }, - }, -}; -pub const LAYOUT__711: &OneHot_3_Layout = &OneHot_3_Layout { - _super: &[ - &NondetRegLayout { - _super: &Reg { offset: 182 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 183 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 184 }, - }, - ], -}; -pub const LAYOUT__716: &MemoryPageInLayout = &MemoryPageInLayout { io: LAYOUT__660 }; -pub const LAYOUT__715: &MemoryGet_SuperArm1Layout = &MemoryGet_SuperArm1Layout { - _super: LAYOUT__716, - _extra0: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 130 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 131 }, - }, - }, -}; -pub const LAYOUT__717: &MemoryPageOutLayout = &MemoryPageOutLayout { - io: LAYOUT__660, - _0: LAYOUT__661, -}; -pub const LAYOUT__714: &MemoryGet_SuperLayout = &MemoryGet_SuperLayout { - arm0: LAYOUT__659, - arm1: LAYOUT__715, - arm2: LAYOUT__717, -}; -pub const LAYOUT__719: &MemoryArgLayout2LayoutArray = &[LAYOUT__633, LAYOUT__634]; -pub const LAYOUT__718: &_Arguments_MemoryGet_SuperLayout = &_Arguments_MemoryGet_SuperLayout { - memory_arg: LAYOUT__719, - cycle_arg: &[&CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 130 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 131 }, - }, - }], -}; -pub const LAYOUT__713: &MemoryGetLayout = &MemoryGetLayout { - _super: LAYOUT__714, - _arguments_memory_get__super: LAYOUT__718, -}; -pub const LAYOUT__723: &MemoryPageInLayout = &MemoryPageInLayout { io: LAYOUT__665 }; -pub const LAYOUT__722: &MemoryGet_SuperArm1Layout = &MemoryGet_SuperArm1Layout { - _super: LAYOUT__723, - _extra0: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 132 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 133 }, - }, - }, -}; -pub const LAYOUT__724: &MemoryPageOutLayout = &MemoryPageOutLayout { - io: LAYOUT__665, - _0: LAYOUT__666, -}; -pub const LAYOUT__721: &MemoryGet_SuperLayout = &MemoryGet_SuperLayout { - arm0: LAYOUT__664, - arm1: LAYOUT__722, - arm2: LAYOUT__724, -}; -pub const LAYOUT__726: &MemoryArgLayout2LayoutArray = &[LAYOUT__635, LAYOUT__636]; -pub const LAYOUT__725: &_Arguments_MemoryGet_SuperLayout = &_Arguments_MemoryGet_SuperLayout { - memory_arg: LAYOUT__726, - cycle_arg: &[&CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 132 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 133 }, - }, - }], -}; -pub const LAYOUT__720: &MemoryGetLayout = &MemoryGetLayout { - _super: LAYOUT__721, - _arguments_memory_get__super: LAYOUT__725, -}; -pub const LAYOUT__730: &MemoryPageInLayout = &MemoryPageInLayout { io: LAYOUT__670 }; -pub const LAYOUT__729: &MemoryGet_SuperArm1Layout = &MemoryGet_SuperArm1Layout { - _super: LAYOUT__730, - _extra0: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 134 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 135 }, - }, - }, -}; -pub const LAYOUT__731: &MemoryPageOutLayout = &MemoryPageOutLayout { - io: LAYOUT__670, - _0: LAYOUT__671, -}; -pub const LAYOUT__728: &MemoryGet_SuperLayout = &MemoryGet_SuperLayout { - arm0: LAYOUT__669, - arm1: LAYOUT__729, - arm2: LAYOUT__731, -}; -pub const LAYOUT__733: &MemoryArgLayout2LayoutArray = &[LAYOUT__637, LAYOUT__638]; -pub const LAYOUT__732: &_Arguments_MemoryGet_SuperLayout = &_Arguments_MemoryGet_SuperLayout { - memory_arg: LAYOUT__733, - cycle_arg: &[&CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 134 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 135 }, - }, - }], -}; -pub const LAYOUT__727: &MemoryGetLayout = &MemoryGetLayout { - _super: LAYOUT__728, - _arguments_memory_get__super: LAYOUT__732, -}; -pub const LAYOUT__737: &MemoryPageInLayout = &MemoryPageInLayout { io: LAYOUT__674 }; -pub const LAYOUT__736: &MemoryGet_SuperArm1Layout = &MemoryGet_SuperArm1Layout { - _super: LAYOUT__737, - _extra0: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 136 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 137 }, - }, - }, -}; -pub const LAYOUT__738: &MemoryPageOutLayout = &MemoryPageOutLayout { - io: LAYOUT__674, - _0: LAYOUT__675, -}; -pub const LAYOUT__735: &MemoryGet_SuperLayout = &MemoryGet_SuperLayout { - arm0: LAYOUT__673, - arm1: LAYOUT__736, - arm2: LAYOUT__738, -}; -pub const LAYOUT__740: &MemoryArgLayout2LayoutArray = &[LAYOUT__639, LAYOUT__640]; -pub const LAYOUT__739: &_Arguments_MemoryGet_SuperLayout = &_Arguments_MemoryGet_SuperLayout { - memory_arg: LAYOUT__740, - cycle_arg: &[&CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 136 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 137 }, - }, - }], -}; -pub const LAYOUT__734: &MemoryGetLayout = &MemoryGetLayout { - _super: LAYOUT__735, - _arguments_memory_get__super: LAYOUT__739, -}; -pub const LAYOUT__744: &MemoryPageInLayout = &MemoryPageInLayout { io: LAYOUT__689 }; -pub const LAYOUT__743: &MemoryGet_SuperArm1Layout = &MemoryGet_SuperArm1Layout { - _super: LAYOUT__744, - _extra0: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 138 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 139 }, - }, - }, -}; -pub const LAYOUT__745: &MemoryPageOutLayout = &MemoryPageOutLayout { - io: LAYOUT__689, - _0: LAYOUT__690, -}; -pub const LAYOUT__742: &MemoryGet_SuperLayout = &MemoryGet_SuperLayout { - arm0: LAYOUT__688, - arm1: LAYOUT__743, - arm2: LAYOUT__745, -}; -pub const LAYOUT__747: &MemoryArgLayout2LayoutArray = &[LAYOUT__641, LAYOUT__642]; -pub const LAYOUT__746: &_Arguments_MemoryGet_SuperLayout = &_Arguments_MemoryGet_SuperLayout { - memory_arg: LAYOUT__747, - cycle_arg: &[&CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 138 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 139 }, - }, - }], -}; -pub const LAYOUT__741: &MemoryGetLayout = &MemoryGetLayout { - _super: LAYOUT__742, - _arguments_memory_get__super: LAYOUT__746, -}; -pub const LAYOUT__751: &MemoryPageInLayout = &MemoryPageInLayout { io: LAYOUT__694 }; -pub const LAYOUT__750: &MemoryGet_SuperArm1Layout = &MemoryGet_SuperArm1Layout { - _super: LAYOUT__751, - _extra0: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 140 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 141 }, - }, - }, -}; -pub const LAYOUT__752: &MemoryPageOutLayout = &MemoryPageOutLayout { - io: LAYOUT__694, - _0: LAYOUT__695, -}; -pub const LAYOUT__749: &MemoryGet_SuperLayout = &MemoryGet_SuperLayout { - arm0: LAYOUT__693, - arm1: LAYOUT__750, - arm2: LAYOUT__752, -}; -pub const LAYOUT__754: &MemoryArgLayout2LayoutArray = &[LAYOUT__643, LAYOUT__644]; -pub const LAYOUT__753: &_Arguments_MemoryGet_SuperLayout = &_Arguments_MemoryGet_SuperLayout { - memory_arg: LAYOUT__754, - cycle_arg: &[&CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 140 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 141 }, - }, - }], -}; -pub const LAYOUT__748: &MemoryGetLayout = &MemoryGetLayout { - _super: LAYOUT__749, - _arguments_memory_get__super: LAYOUT__753, -}; -pub const LAYOUT__758: &MemoryPageInLayout = &MemoryPageInLayout { io: LAYOUT__699 }; -pub const LAYOUT__757: &MemoryGet_SuperArm1Layout = &MemoryGet_SuperArm1Layout { - _super: LAYOUT__758, - _extra0: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 142 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 143 }, - }, - }, -}; -pub const LAYOUT__759: &MemoryPageOutLayout = &MemoryPageOutLayout { - io: LAYOUT__699, - _0: LAYOUT__700, -}; -pub const LAYOUT__756: &MemoryGet_SuperLayout = &MemoryGet_SuperLayout { - arm0: LAYOUT__698, - arm1: LAYOUT__757, - arm2: LAYOUT__759, -}; -pub const LAYOUT__761: &MemoryArgLayout2LayoutArray = &[LAYOUT__645, LAYOUT__646]; -pub const LAYOUT__760: &_Arguments_MemoryGet_SuperLayout = &_Arguments_MemoryGet_SuperLayout { - memory_arg: LAYOUT__761, - cycle_arg: &[&CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 142 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 143 }, - }, - }], -}; -pub const LAYOUT__755: &MemoryGetLayout = &MemoryGetLayout { - _super: LAYOUT__756, - _arguments_memory_get__super: LAYOUT__760, -}; -pub const LAYOUT__765: &MemoryPageInLayout = &MemoryPageInLayout { io: LAYOUT__704 }; -pub const LAYOUT__764: &MemoryGet_SuperArm1Layout = &MemoryGet_SuperArm1Layout { - _super: LAYOUT__765, - _extra0: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 144 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 145 }, - }, - }, -}; -pub const LAYOUT__766: &MemoryPageOutLayout = &MemoryPageOutLayout { - io: LAYOUT__704, - _0: LAYOUT__705, -}; -pub const LAYOUT__763: &MemoryGet_SuperLayout = &MemoryGet_SuperLayout { - arm0: LAYOUT__703, - arm1: LAYOUT__764, - arm2: LAYOUT__766, -}; -pub const LAYOUT__768: &MemoryArgLayout2LayoutArray = &[LAYOUT__647, LAYOUT__648]; -pub const LAYOUT__767: &_Arguments_MemoryGet_SuperLayout = &_Arguments_MemoryGet_SuperLayout { - memory_arg: LAYOUT__768, - cycle_arg: &[&CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 144 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 145 }, - }, - }], -}; -pub const LAYOUT__762: &MemoryGetLayout = &MemoryGetLayout { - _super: LAYOUT__763, - _arguments_memory_get__super: LAYOUT__767, -}; -pub const LAYOUT__712: &MemoryGetLayout8LayoutArray = &[ - LAYOUT__713, - LAYOUT__720, - LAYOUT__727, - LAYOUT__734, - LAYOUT__741, - LAYOUT__748, - LAYOUT__755, - LAYOUT__762, -]; -pub const LAYOUT__710: &PoseidonLoadInShortLayout = &PoseidonLoadInShortLayout { - _super: LAYOUT__629, - tx_type: LAYOUT__711, - load_list: LAYOUT__712, -}; -pub const LAYOUT__769: &PoseidonLoadInLowLayout = &PoseidonLoadInLowLayout { - _super: LAYOUT__629, - tx_type: LAYOUT__711, - load_list: LAYOUT__712, -}; -pub const LAYOUT__770: &PoseidonLoadInHighLayout = &PoseidonLoadInHighLayout { - _super: LAYOUT__629, - tx_type: LAYOUT__711, - load_list: LAYOUT__712, -}; -pub const LAYOUT__709: &PoseidonLoadIn_SuperLayout = &PoseidonLoadIn_SuperLayout { - _super: LAYOUT__629, - arm0: LAYOUT__710, - arm1: LAYOUT__769, - arm2: LAYOUT__770, -}; -pub const LAYOUT__771: &OneHot_3_Layout = &OneHot_3_Layout { - _super: &[ - &NondetRegLayout { - _super: &Reg { offset: 185 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 186 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 187 }, - }, - ], -}; -pub const LAYOUT__772: &_Arguments_PoseidonLoadIn_SuperLayout = - &_Arguments_PoseidonLoadIn_SuperLayout { - memory_arg: LAYOUT__632, - cycle_arg: LAYOUT__649, - }; -pub const LAYOUT__708: &PoseidonLoadInLayout = &PoseidonLoadInLayout { - _super: LAYOUT__709, - _0: LAYOUT__771, - _arguments_poseidon_load_in__super: LAYOUT__772, -}; -pub const LAYOUT__707: &Poseidon0StateArm2Layout = &Poseidon0StateArm2Layout { - _super: LAYOUT__708, - _extra0: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 146 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 147 }, - }, - }, - _extra1: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 148 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 149 }, - }, - }, - _extra2: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 150 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 151 }, - }, - }, - _extra3: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 152 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 153 }, - }, - }, - _extra4: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 154 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 155 }, - }, - }, - _extra5: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 156 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 157 }, - }, - }, - _extra6: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 158 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 159 }, - }, - }, - _extra7: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 160 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 161 }, - }, - }, - _extra8: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 162 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 163 }, - }, - }, - _extra9: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 164 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 165 }, - }, - }, - _extra10: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 166 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 167 }, - }, - }, - _extra11: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 168 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 169 }, - }, - }, - _extra12: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 170 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 171 }, - }, - }, - _extra13: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 172 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 173 }, - }, - }, - _extra14: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 174 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 175 }, - }, - }, - _extra15: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 176 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 177 }, - }, - }, - _extra16: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 178 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 179 }, - }, - }, - _extra17: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 180 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 181 }, - }, - }, -}; -pub const LAYOUT__773: &Poseidon0StateArm3Layout = &Poseidon0StateArm3Layout { - _super: LAYOUT__629, - _extra0: LAYOUT__633, - _extra1: LAYOUT__634, - _extra2: LAYOUT__635, - _extra3: LAYOUT__636, - _extra4: LAYOUT__637, - _extra5: LAYOUT__638, - _extra6: LAYOUT__639, - _extra7: LAYOUT__640, - _extra8: LAYOUT__641, - _extra9: LAYOUT__642, - _extra10: LAYOUT__643, - _extra11: LAYOUT__644, - _extra12: LAYOUT__645, - _extra13: LAYOUT__646, - _extra14: LAYOUT__647, - _extra15: LAYOUT__648, - _extra16: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 130 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 131 }, - }, - }, - _extra17: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 132 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 133 }, - }, - }, - _extra18: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 134 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 135 }, - }, - }, - _extra19: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 136 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 137 }, - }, - }, - _extra20: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 138 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 139 }, - }, - }, - _extra21: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 140 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 141 }, - }, - }, - _extra22: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 142 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 143 }, - }, - }, - _extra23: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 144 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 145 }, - }, - }, - _extra24: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 146 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 147 }, - }, - }, - _extra25: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 148 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 149 }, - }, - }, - _extra26: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 150 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 151 }, - }, - }, - _extra27: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 152 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 153 }, - }, - }, - _extra28: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 154 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 155 }, - }, - }, - _extra29: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 156 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 157 }, - }, - }, - _extra30: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 158 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 159 }, - }, - }, - _extra31: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 160 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 161 }, - }, - }, - _extra32: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 162 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 163 }, - }, - }, - _extra33: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 164 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 165 }, - }, - }, - _extra34: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 166 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 167 }, - }, - }, - _extra35: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 168 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 169 }, - }, - }, - _extra36: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 170 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 171 }, - }, - }, - _extra37: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 172 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 173 }, - }, - }, - _extra38: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 174 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 175 }, - }, - }, - _extra39: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 176 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 177 }, - }, - }, - _extra40: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 178 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 179 }, - }, - }, - _extra41: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 180 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 181 }, - }, - }, -}; -pub const LAYOUT__774: &Poseidon0StateArm4Layout = &Poseidon0StateArm4Layout { - _super: LAYOUT__629, - _extra0: LAYOUT__633, - _extra1: LAYOUT__634, - _extra2: LAYOUT__635, - _extra3: LAYOUT__636, - _extra4: LAYOUT__637, - _extra5: LAYOUT__638, - _extra6: LAYOUT__639, - _extra7: LAYOUT__640, - _extra8: LAYOUT__641, - _extra9: LAYOUT__642, - _extra10: LAYOUT__643, - _extra11: LAYOUT__644, - _extra12: LAYOUT__645, - _extra13: LAYOUT__646, - _extra14: LAYOUT__647, - _extra15: LAYOUT__648, - _extra16: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 130 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 131 }, - }, - }, - _extra17: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 132 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 133 }, - }, - }, - _extra18: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 134 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 135 }, - }, - }, - _extra19: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 136 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 137 }, - }, - }, - _extra20: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 138 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 139 }, - }, - }, - _extra21: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 140 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 141 }, - }, - }, - _extra22: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 142 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 143 }, - }, - }, - _extra23: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 144 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 145 }, - }, - }, - _extra24: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 146 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 147 }, - }, - }, - _extra25: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 148 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 149 }, - }, - }, - _extra26: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 150 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 151 }, - }, - }, - _extra27: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 152 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 153 }, - }, - }, - _extra28: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 154 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 155 }, - }, - }, - _extra29: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 156 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 157 }, - }, - }, - _extra30: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 158 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 159 }, - }, - }, - _extra31: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 160 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 161 }, - }, - }, - _extra32: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 162 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 163 }, - }, - }, - _extra33: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 164 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 165 }, - }, - }, - _extra34: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 166 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 167 }, - }, - }, - _extra35: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 168 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 169 }, - }, - }, - _extra36: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 170 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 171 }, - }, - }, - _extra37: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 172 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 173 }, - }, - }, - _extra38: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 174 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 175 }, - }, - }, - _extra39: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 176 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 177 }, - }, - }, - _extra40: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 178 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 179 }, - }, - }, - _extra41: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 180 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 181 }, - }, - }, -}; -pub const LAYOUT__781: &PoseidonCheckOut__0_SuperLayout = - &PoseidonCheckOut__0_SuperLayout { goal: LAYOUT__683 }; -pub const LAYOUT__782: &PoseidonCheckOut__0_SuperLayout = - &PoseidonCheckOut__0_SuperLayout { goal: LAYOUT__684 }; -pub const LAYOUT__783: &PoseidonCheckOut__0_SuperLayout = - &PoseidonCheckOut__0_SuperLayout { goal: LAYOUT__685 }; -pub const LAYOUT__784: &PoseidonCheckOut__0_SuperLayout = - &PoseidonCheckOut__0_SuperLayout { goal: LAYOUT__686 }; -pub const LAYOUT__785: &PoseidonCheckOut__0_SuperLayout = - &PoseidonCheckOut__0_SuperLayout { goal: LAYOUT__687 }; -pub const LAYOUT__786: &PoseidonCheckOut__0_SuperLayout = - &PoseidonCheckOut__0_SuperLayout { goal: LAYOUT__692 }; -pub const LAYOUT__787: &PoseidonCheckOut__0_SuperLayout = - &PoseidonCheckOut__0_SuperLayout { goal: LAYOUT__697 }; -pub const LAYOUT__788: &PoseidonCheckOut__0_SuperLayout = - &PoseidonCheckOut__0_SuperLayout { goal: LAYOUT__702 }; -pub const LAYOUT__780: &PoseidonCheckOut__0_SuperLayout8LayoutArray = &[ - LAYOUT__781, - LAYOUT__782, - LAYOUT__783, - LAYOUT__784, - LAYOUT__785, - LAYOUT__786, - LAYOUT__787, - LAYOUT__788, -]; -pub const LAYOUT__779: &PoseidonCheckOutLayout = &PoseidonCheckOutLayout { - _super: LAYOUT__629, - _1: LAYOUT__780, - is_normal: &IsZeroLayout { - _super: &NondetRegLayout { - _super: &Reg { offset: 182 }, - }, - inv: &NondetRegLayout { - _super: &Reg { offset: 183 }, - }, - }, - ext_inv: &NondetExtRegLayout { - _super: &Reg { offset: 184 }, - }, -}; -pub const LAYOUT__778: &PoseidonDoOut_SuperArm0Layout = &PoseidonDoOut_SuperArm0Layout { - _super: LAYOUT__779, - _extra0: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 146 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 147 }, - }, - }, - _extra1: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 148 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 149 }, - }, - }, - _extra2: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 150 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 151 }, - }, - }, - _extra3: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 152 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 153 }, - }, - }, - _extra4: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 154 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 155 }, - }, - }, - _extra5: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 156 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 157 }, - }, - }, - _extra6: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 158 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 159 }, - }, - }, - _extra7: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 160 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 161 }, - }, - }, - _extra8: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 162 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 163 }, - }, - }, - _extra9: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 164 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 165 }, - }, - }, - _extra10: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 166 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 167 }, - }, - }, - _extra11: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 168 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 169 }, - }, - }, - _extra12: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 170 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 171 }, - }, - }, - _extra13: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 172 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 173 }, - }, - }, - _extra14: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 174 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 175 }, - }, - }, - _extra15: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 176 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 177 }, - }, - }, -}; -pub const LAYOUT__792: &NondetU16RegLayout = &NondetU16RegLayout { - arg: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 146 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 147 }, - }, - }, -}; -pub const LAYOUT__794: &NondetU16RegLayout = &NondetU16RegLayout { - arg: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 148 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 149 }, - }, - }, -}; -pub const LAYOUT__793: &U16RegLayout = &U16RegLayout { ret: LAYOUT__794 }; -pub const LAYOUT__795: &MemoryWriteLayout = &MemoryWriteLayout { - io: LAYOUT__660, - _0: LAYOUT__661, -}; -pub const LAYOUT__791: &PoseidonStoreOut__0_SuperLayout = &PoseidonStoreOut__0_SuperLayout { - low: LAYOUT__792, - high: LAYOUT__793, - _0: LAYOUT__795, -}; -pub const LAYOUT__797: &NondetU16RegLayout = &NondetU16RegLayout { - arg: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 150 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 151 }, - }, - }, -}; -pub const LAYOUT__799: &NondetU16RegLayout = &NondetU16RegLayout { - arg: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 152 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 153 }, - }, - }, -}; -pub const LAYOUT__798: &U16RegLayout = &U16RegLayout { ret: LAYOUT__799 }; -pub const LAYOUT__800: &MemoryWriteLayout = &MemoryWriteLayout { - io: LAYOUT__665, - _0: LAYOUT__666, -}; -pub const LAYOUT__796: &PoseidonStoreOut__0_SuperLayout = &PoseidonStoreOut__0_SuperLayout { - low: LAYOUT__797, - high: LAYOUT__798, - _0: LAYOUT__800, -}; -pub const LAYOUT__802: &NondetU16RegLayout = &NondetU16RegLayout { - arg: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 154 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 155 }, - }, - }, -}; -pub const LAYOUT__803: &U16RegLayout = &U16RegLayout { ret: LAYOUT__202 }; -pub const LAYOUT__804: &MemoryWriteLayout = &MemoryWriteLayout { - io: LAYOUT__670, - _0: LAYOUT__671, -}; -pub const LAYOUT__801: &PoseidonStoreOut__0_SuperLayout = &PoseidonStoreOut__0_SuperLayout { - low: LAYOUT__802, - high: LAYOUT__803, - _0: LAYOUT__804, -}; -pub const LAYOUT__806: &NondetU16RegLayout = &NondetU16RegLayout { - arg: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 158 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 159 }, - }, - }, -}; -pub const LAYOUT__808: &NondetU16RegLayout = &NondetU16RegLayout { - arg: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 160 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 161 }, - }, - }, -}; -pub const LAYOUT__807: &U16RegLayout = &U16RegLayout { ret: LAYOUT__808 }; -pub const LAYOUT__809: &MemoryWriteLayout = &MemoryWriteLayout { - io: LAYOUT__674, - _0: LAYOUT__675, -}; -pub const LAYOUT__805: &PoseidonStoreOut__0_SuperLayout = &PoseidonStoreOut__0_SuperLayout { - low: LAYOUT__806, - high: LAYOUT__807, - _0: LAYOUT__809, -}; -pub const LAYOUT__811: &NondetU16RegLayout = &NondetU16RegLayout { - arg: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 162 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 163 }, - }, - }, -}; -pub const LAYOUT__813: &NondetU16RegLayout = &NondetU16RegLayout { - arg: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 164 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 165 }, - }, - }, -}; -pub const LAYOUT__812: &U16RegLayout = &U16RegLayout { ret: LAYOUT__813 }; -pub const LAYOUT__814: &MemoryWriteLayout = &MemoryWriteLayout { - io: LAYOUT__689, - _0: LAYOUT__690, -}; -pub const LAYOUT__810: &PoseidonStoreOut__0_SuperLayout = &PoseidonStoreOut__0_SuperLayout { - low: LAYOUT__811, - high: LAYOUT__812, - _0: LAYOUT__814, -}; -pub const LAYOUT__817: &NondetU16RegLayout = &NondetU16RegLayout { - arg: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 168 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 169 }, - }, - }, -}; -pub const LAYOUT__816: &U16RegLayout = &U16RegLayout { ret: LAYOUT__817 }; -pub const LAYOUT__818: &MemoryWriteLayout = &MemoryWriteLayout { - io: LAYOUT__694, - _0: LAYOUT__695, -}; -pub const LAYOUT__815: &PoseidonStoreOut__0_SuperLayout = &PoseidonStoreOut__0_SuperLayout { - low: LAYOUT__288, - high: LAYOUT__816, - _0: LAYOUT__818, -}; -pub const LAYOUT__820: &NondetU16RegLayout = &NondetU16RegLayout { - arg: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 170 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 171 }, - }, - }, -}; -pub const LAYOUT__822: &NondetU16RegLayout = &NondetU16RegLayout { - arg: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 172 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 173 }, - }, - }, -}; -pub const LAYOUT__821: &U16RegLayout = &U16RegLayout { ret: LAYOUT__822 }; -pub const LAYOUT__823: &MemoryWriteLayout = &MemoryWriteLayout { - io: LAYOUT__699, - _0: LAYOUT__700, -}; -pub const LAYOUT__819: &PoseidonStoreOut__0_SuperLayout = &PoseidonStoreOut__0_SuperLayout { - low: LAYOUT__820, - high: LAYOUT__821, - _0: LAYOUT__823, -}; -pub const LAYOUT__825: &NondetU16RegLayout = &NondetU16RegLayout { - arg: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 174 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 175 }, - }, - }, -}; -pub const LAYOUT__827: &NondetU16RegLayout = &NondetU16RegLayout { - arg: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 176 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 177 }, - }, - }, -}; -pub const LAYOUT__826: &U16RegLayout = &U16RegLayout { ret: LAYOUT__827 }; -pub const LAYOUT__828: &MemoryWriteLayout = &MemoryWriteLayout { - io: LAYOUT__704, - _0: LAYOUT__705, -}; -pub const LAYOUT__824: &PoseidonStoreOut__0_SuperLayout = &PoseidonStoreOut__0_SuperLayout { - low: LAYOUT__825, - high: LAYOUT__826, - _0: LAYOUT__828, -}; -pub const LAYOUT__790: &PoseidonStoreOut__0_SuperLayout8LayoutArray = &[ - LAYOUT__791, - LAYOUT__796, - LAYOUT__801, - LAYOUT__805, - LAYOUT__810, - LAYOUT__815, - LAYOUT__819, - LAYOUT__824, -]; -pub const LAYOUT__789: &PoseidonStoreOutLayout = &PoseidonStoreOutLayout { - _super: LAYOUT__629, - _1: LAYOUT__790, - is_normal: &IsZeroLayout { - _super: &NondetRegLayout { - _super: &Reg { offset: 182 }, - }, - inv: &NondetRegLayout { - _super: &Reg { offset: 183 }, - }, - }, - ext_inv: &NondetExtRegLayout { - _super: &Reg { offset: 184 }, - }, -}; -pub const LAYOUT__777: &PoseidonDoOut_SuperLayout = &PoseidonDoOut_SuperLayout { - _super: LAYOUT__629, - arm0: LAYOUT__778, - arm1: LAYOUT__789, -}; -pub const LAYOUT__829: &_Arguments_PoseidonDoOut_SuperLayout = - &_Arguments_PoseidonDoOut_SuperLayout { - memory_arg: LAYOUT__632, - cycle_arg: LAYOUT__649, - arg_u16: LAYOUT__650, - }; -pub const LAYOUT__776: &PoseidonDoOutLayout = &PoseidonDoOutLayout { - _super: LAYOUT__777, - _arguments_poseidon_do_out__super: LAYOUT__829, -}; -pub const LAYOUT__775: &Poseidon0StateArm5Layout = &Poseidon0StateArm5Layout { - _super: LAYOUT__776, - _extra0: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 178 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 179 }, - }, - }, - _extra1: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 180 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 181 }, - }, - }, -}; -pub const LAYOUT__832: &PoseidonPaging_SuperLayout = &PoseidonPaging_SuperLayout { - _super: LAYOUT__629, - arm0: LAYOUT__629, - arm1: LAYOUT__629, - arm2: LAYOUT__629, - arm3: LAYOUT__629, - arm4: LAYOUT__629, - arm5: LAYOUT__629, -}; -pub const LAYOUT__834: &NondetRegLayout6LayoutArray = &[ - &NondetRegLayout { - _super: &Reg { offset: 184 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 185 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 186 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 187 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 188 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 189 }, - }, -]; -pub const LAYOUT__833: &OneHot_6_Layout = &OneHot_6_Layout { - _super: LAYOUT__834, -}; -pub const LAYOUT__837: &NondetU8RegLayout = &NondetU8RegLayout { - arg: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 178 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 179 }, - }, - }, -}; -pub const LAYOUT__836: &U8RegLayout = &U8RegLayout { ret: LAYOUT__837 }; -pub const LAYOUT__835: &IsU24Layout = &IsU24Layout { - low16: LAYOUT__792, - _0: LAYOUT__836, -}; -pub const LAYOUT__838: &_Arguments_PoseidonPaging__1Layout = &_Arguments_PoseidonPaging__1Layout { - arg_u16: &[&ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 148 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 149 }, - }, - }], - arg_u8: &[&ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 180 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 181 }, - }, - }], -}; -pub const LAYOUT__843: &NondetU8RegLayout = &NondetU8RegLayout { - arg: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 180 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 181 }, - }, - }, -}; -pub const LAYOUT__842: &U8RegLayout = &U8RegLayout { ret: LAYOUT__843 }; -pub const LAYOUT__841: &IsU24Layout = &IsU24Layout { - low16: LAYOUT__794, - _0: LAYOUT__842, -}; -pub const LAYOUT__840: &PoseidonPaging__1Arm0_SuperLayout = - &PoseidonPaging__1Arm0_SuperLayout { _0: LAYOUT__841 }; -pub const LAYOUT__844: &PoseidonPaging__1Arm1_SuperLayout = - &PoseidonPaging__1Arm1_SuperLayout { _0: LAYOUT__841 }; -pub const LAYOUT__839: &PoseidonPaging__1Layout = &PoseidonPaging__1Layout { - arm0: LAYOUT__840, - arm1: LAYOUT__844, -}; -pub const LAYOUT__831: &PoseidonPagingLayout = &PoseidonPagingLayout { - _super: LAYOUT__832, - cur_idx: &NondetRegLayout { - _super: &Reg { offset: 182 }, - }, - cur_mode: &NondetRegLayout { - _super: &Reg { offset: 183 }, - }, - mode_split: LAYOUT__833, - _0: LAYOUT__835, - _arguments_poseidon_paging__1: LAYOUT__838, - _3: LAYOUT__839, - _4: &NondetRegLayout { - _super: &Reg { offset: 190 }, - }, -}; -pub const LAYOUT__830: &Poseidon0StateArm6Layout = &Poseidon0StateArm6Layout { - _super: LAYOUT__831, - _extra0: LAYOUT__633, - _extra1: LAYOUT__634, - _extra2: LAYOUT__635, - _extra3: LAYOUT__636, - _extra4: LAYOUT__637, - _extra5: LAYOUT__638, - _extra6: LAYOUT__639, - _extra7: LAYOUT__640, - _extra8: LAYOUT__641, - _extra9: LAYOUT__642, - _extra10: LAYOUT__643, - _extra11: LAYOUT__644, - _extra12: LAYOUT__645, - _extra13: LAYOUT__646, - _extra14: LAYOUT__647, - _extra15: LAYOUT__648, - _extra16: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 130 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 131 }, - }, - }, - _extra17: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 132 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 133 }, - }, - }, - _extra18: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 134 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 135 }, - }, - }, - _extra19: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 136 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 137 }, - }, - }, - _extra20: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 138 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 139 }, - }, - }, - _extra21: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 140 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 141 }, - }, - }, - _extra22: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 142 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 143 }, - }, - }, - _extra23: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 144 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 145 }, - }, - }, - _extra24: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 150 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 151 }, - }, - }, - _extra25: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 152 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 153 }, - }, - }, - _extra26: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 154 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 155 }, - }, - }, - _extra27: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 156 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 157 }, - }, - }, - _extra28: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 158 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 159 }, - }, - }, - _extra29: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 160 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 161 }, - }, - }, - _extra30: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 162 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 163 }, - }, - }, - _extra31: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 164 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 165 }, - }, - }, - _extra32: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 166 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 167 }, - }, - }, - _extra33: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 168 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 169 }, - }, - }, - _extra34: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 170 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 171 }, - }, - }, - _extra35: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 172 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 173 }, - }, - }, - _extra36: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 174 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 175 }, - }, - }, - _extra37: &ArgU16Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 176 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 177 }, - }, - }, -}; -pub const LAYOUT__848: &PoseidonStoreState__0_SuperLayout = &PoseidonStoreState__0_SuperLayout { - low: LAYOUT__792, - high: LAYOUT__793, - _0: LAYOUT__795, -}; -pub const LAYOUT__849: &PoseidonStoreState__0_SuperLayout = &PoseidonStoreState__0_SuperLayout { - low: LAYOUT__797, - high: LAYOUT__798, - _0: LAYOUT__800, -}; -pub const LAYOUT__850: &PoseidonStoreState__0_SuperLayout = &PoseidonStoreState__0_SuperLayout { - low: LAYOUT__802, - high: LAYOUT__803, - _0: LAYOUT__804, -}; -pub const LAYOUT__851: &PoseidonStoreState__0_SuperLayout = &PoseidonStoreState__0_SuperLayout { - low: LAYOUT__806, - high: LAYOUT__807, - _0: LAYOUT__809, -}; -pub const LAYOUT__852: &PoseidonStoreState__0_SuperLayout = &PoseidonStoreState__0_SuperLayout { - low: LAYOUT__811, - high: LAYOUT__812, - _0: LAYOUT__814, -}; -pub const LAYOUT__853: &PoseidonStoreState__0_SuperLayout = &PoseidonStoreState__0_SuperLayout { - low: LAYOUT__288, - high: LAYOUT__816, - _0: LAYOUT__818, -}; -pub const LAYOUT__854: &PoseidonStoreState__0_SuperLayout = &PoseidonStoreState__0_SuperLayout { - low: LAYOUT__820, - high: LAYOUT__821, - _0: LAYOUT__823, -}; -pub const LAYOUT__855: &PoseidonStoreState__0_SuperLayout = &PoseidonStoreState__0_SuperLayout { - low: LAYOUT__825, - high: LAYOUT__826, - _0: LAYOUT__828, -}; -pub const LAYOUT__847: &PoseidonStoreState__0_SuperLayout8LayoutArray = &[ - LAYOUT__848, - LAYOUT__849, - LAYOUT__850, - LAYOUT__851, - LAYOUT__852, - LAYOUT__853, - LAYOUT__854, - LAYOUT__855, -]; -pub const LAYOUT__846: &PoseidonStoreStateLayout = &PoseidonStoreStateLayout { - _super: LAYOUT__629, - _1: LAYOUT__847, -}; -pub const LAYOUT__845: &Poseidon0StateArm7Layout = &Poseidon0StateArm7Layout { - _super: LAYOUT__846, - _extra0: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 178 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 179 }, - }, - }, - _extra1: &ArgU8Layout { - count: &NondetRegLayout { - _super: &Reg { offset: 180 }, - }, - val: &NondetRegLayout { - _super: &Reg { offset: 181 }, - }, - }, -}; -pub const LAYOUT__652: &Poseidon0StateLayout = &Poseidon0StateLayout { - _super: LAYOUT__629, - arm0: LAYOUT__653, - arm1: LAYOUT__680, - arm2: LAYOUT__707, - arm3: LAYOUT__773, - arm4: LAYOUT__774, - arm5: LAYOUT__775, - arm6: LAYOUT__830, - arm7: LAYOUT__845, -}; -pub const LAYOUT__628: &Poseidon0Layout = &Poseidon0Layout { - state: LAYOUT__629, - _arguments_poseidon0_state: LAYOUT__631, - state_redef: LAYOUT__652, - arg: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 191 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 0 }, - }, - }, -}; -pub const LAYOUT__861: &SBoxLayout24LayoutArray = &[ - &SBoxLayout { - _super: &NondetRegLayout { - _super: &Reg { offset: 72 }, - }, - cubed: &NondetRegLayout { - _super: &Reg { offset: 73 }, - }, - }, - &SBoxLayout { - _super: &NondetRegLayout { - _super: &Reg { offset: 74 }, - }, - cubed: &NondetRegLayout { - _super: &Reg { offset: 75 }, - }, - }, - &SBoxLayout { - _super: &NondetRegLayout { - _super: &Reg { offset: 76 }, - }, - cubed: &NondetRegLayout { - _super: &Reg { offset: 77 }, - }, - }, - &SBoxLayout { - _super: &NondetRegLayout { - _super: &Reg { offset: 78 }, - }, - cubed: &NondetRegLayout { - _super: &Reg { offset: 79 }, - }, - }, - &SBoxLayout { - _super: &NondetRegLayout { - _super: &Reg { offset: 80 }, - }, - cubed: &NondetRegLayout { - _super: &Reg { offset: 81 }, - }, - }, - &SBoxLayout { - _super: &NondetRegLayout { - _super: &Reg { offset: 82 }, - }, - cubed: &NondetRegLayout { - _super: &Reg { offset: 83 }, - }, - }, - &SBoxLayout { - _super: &NondetRegLayout { - _super: &Reg { offset: 84 }, - }, - cubed: &NondetRegLayout { - _super: &Reg { offset: 85 }, - }, - }, - &SBoxLayout { - _super: &NondetRegLayout { - _super: &Reg { offset: 86 }, - }, - cubed: &NondetRegLayout { - _super: &Reg { offset: 87 }, - }, - }, - &SBoxLayout { - _super: &NondetRegLayout { - _super: &Reg { offset: 88 }, - }, - cubed: &NondetRegLayout { - _super: &Reg { offset: 89 }, - }, - }, - &SBoxLayout { - _super: &NondetRegLayout { - _super: &Reg { offset: 90 }, - }, - cubed: &NondetRegLayout { - _super: &Reg { offset: 91 }, - }, - }, - &SBoxLayout { - _super: &NondetRegLayout { - _super: &Reg { offset: 92 }, - }, - cubed: &NondetRegLayout { - _super: &Reg { offset: 93 }, - }, - }, - &SBoxLayout { - _super: &NondetRegLayout { - _super: &Reg { offset: 94 }, - }, - cubed: &NondetRegLayout { - _super: &Reg { offset: 95 }, - }, - }, - &SBoxLayout { - _super: &NondetRegLayout { - _super: &Reg { offset: 96 }, - }, - cubed: &NondetRegLayout { - _super: &Reg { offset: 97 }, - }, - }, - &SBoxLayout { - _super: &NondetRegLayout { - _super: &Reg { offset: 98 }, - }, - cubed: &NondetRegLayout { - _super: &Reg { offset: 99 }, - }, - }, - &SBoxLayout { - _super: &NondetRegLayout { - _super: &Reg { offset: 100 }, - }, - cubed: &NondetRegLayout { - _super: &Reg { offset: 101 }, - }, - }, - &SBoxLayout { - _super: &NondetRegLayout { - _super: &Reg { offset: 102 }, - }, - cubed: &NondetRegLayout { - _super: &Reg { offset: 103 }, - }, - }, - &SBoxLayout { - _super: &NondetRegLayout { - _super: &Reg { offset: 104 }, - }, - cubed: &NondetRegLayout { - _super: &Reg { offset: 105 }, - }, - }, - &SBoxLayout { - _super: &NondetRegLayout { - _super: &Reg { offset: 106 }, - }, - cubed: &NondetRegLayout { - _super: &Reg { offset: 107 }, - }, - }, - &SBoxLayout { - _super: &NondetRegLayout { - _super: &Reg { offset: 108 }, - }, - cubed: &NondetRegLayout { - _super: &Reg { offset: 109 }, - }, - }, - &SBoxLayout { - _super: &NondetRegLayout { - _super: &Reg { offset: 110 }, - }, - cubed: &NondetRegLayout { - _super: &Reg { offset: 111 }, - }, - }, - &SBoxLayout { - _super: &NondetRegLayout { - _super: &Reg { offset: 112 }, - }, - cubed: &NondetRegLayout { - _super: &Reg { offset: 113 }, - }, - }, - &SBoxLayout { - _super: &NondetRegLayout { - _super: &Reg { offset: 114 }, - }, - cubed: &NondetRegLayout { - _super: &Reg { offset: 115 }, - }, - }, - &SBoxLayout { - _super: &NondetRegLayout { - _super: &Reg { offset: 116 }, - }, - cubed: &NondetRegLayout { - _super: &Reg { offset: 117 }, - }, - }, - &SBoxLayout { - _super: &NondetRegLayout { - _super: &Reg { offset: 118 }, - }, - cubed: &NondetRegLayout { - _super: &Reg { offset: 119 }, - }, - }, -]; -pub const LAYOUT__860: &DoExtRoundLayout = &DoExtRoundLayout { _1: LAYOUT__861 }; -pub const LAYOUT__863: &NondetRegLayout8LayoutArray = &[ - &NondetRegLayout { - _super: &Reg { offset: 120 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 121 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 122 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 123 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 124 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 125 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 126 }, - }, - &NondetRegLayout { - _super: &Reg { offset: 127 }, - }, -]; -pub const LAYOUT__862: &OneHot_8_Layout = &OneHot_8_Layout { - _super: LAYOUT__863, -}; -pub const LAYOUT__859: &DoExtRoundByIdxLayout = &DoExtRoundByIdxLayout { - _super: LAYOUT__860, - idx_hot: LAYOUT__862, -}; -pub const LAYOUT__858: &PoseidonExtRoundLayout = &PoseidonExtRoundLayout { - _super: LAYOUT__629, - is_round3: &IsZeroLayout { - _super: &NondetRegLayout { - _super: &Reg { offset: 66 }, - }, - inv: &NondetRegLayout { - _super: &Reg { offset: 67 }, - }, - }, - is_round7: &IsZeroLayout { - _super: &NondetRegLayout { - _super: &Reg { offset: 68 }, - }, - inv: &NondetRegLayout { - _super: &Reg { offset: 69 }, - }, - }, - last_block: &IsZeroLayout { - _super: &NondetRegLayout { - _super: &Reg { offset: 70 }, - }, - inv: &NondetRegLayout { - _super: &Reg { offset: 71 }, - }, - }, - next_inner: LAYOUT__859, -}; -pub const LAYOUT__867: &DoIntRoundLayout = &DoIntRoundLayout { - sbox: &SBoxLayout { - _super: &NondetRegLayout { - _super: &Reg { offset: 66 }, - }, - cubed: &NondetRegLayout { - _super: &Reg { offset: 67 }, - }, - }, -}; -pub const LAYOUT__868: &DoIntRoundLayout = &DoIntRoundLayout { - sbox: &SBoxLayout { - _super: &NondetRegLayout { - _super: &Reg { offset: 68 }, - }, - cubed: &NondetRegLayout { - _super: &Reg { offset: 69 }, - }, - }, -}; -pub const LAYOUT__869: &DoIntRoundLayout = &DoIntRoundLayout { - sbox: &SBoxLayout { - _super: &NondetRegLayout { - _super: &Reg { offset: 70 }, - }, - cubed: &NondetRegLayout { - _super: &Reg { offset: 71 }, - }, - }, -}; -pub const LAYOUT__870: &DoIntRoundLayout = &DoIntRoundLayout { - sbox: &SBoxLayout { - _super: &NondetRegLayout { - _super: &Reg { offset: 72 }, - }, - cubed: &NondetRegLayout { - _super: &Reg { offset: 73 }, - }, - }, -}; -pub const LAYOUT__871: &DoIntRoundLayout = &DoIntRoundLayout { - sbox: &SBoxLayout { - _super: &NondetRegLayout { - _super: &Reg { offset: 74 }, - }, - cubed: &NondetRegLayout { - _super: &Reg { offset: 75 }, - }, - }, -}; -pub const LAYOUT__872: &DoIntRoundLayout = &DoIntRoundLayout { - sbox: &SBoxLayout { - _super: &NondetRegLayout { - _super: &Reg { offset: 76 }, - }, - cubed: &NondetRegLayout { - _super: &Reg { offset: 77 }, - }, - }, -}; -pub const LAYOUT__873: &DoIntRoundLayout = &DoIntRoundLayout { - sbox: &SBoxLayout { - _super: &NondetRegLayout { - _super: &Reg { offset: 78 }, - }, - cubed: &NondetRegLayout { - _super: &Reg { offset: 79 }, - }, - }, -}; -pub const LAYOUT__874: &DoIntRoundLayout = &DoIntRoundLayout { - sbox: &SBoxLayout { - _super: &NondetRegLayout { - _super: &Reg { offset: 80 }, - }, - cubed: &NondetRegLayout { - _super: &Reg { offset: 81 }, - }, - }, -}; -pub const LAYOUT__875: &DoIntRoundLayout = &DoIntRoundLayout { - sbox: &SBoxLayout { - _super: &NondetRegLayout { - _super: &Reg { offset: 82 }, - }, - cubed: &NondetRegLayout { - _super: &Reg { offset: 83 }, - }, - }, -}; -pub const LAYOUT__876: &DoIntRoundLayout = &DoIntRoundLayout { - sbox: &SBoxLayout { - _super: &NondetRegLayout { - _super: &Reg { offset: 84 }, - }, - cubed: &NondetRegLayout { - _super: &Reg { offset: 85 }, - }, - }, -}; -pub const LAYOUT__877: &DoIntRoundLayout = &DoIntRoundLayout { - sbox: &SBoxLayout { - _super: &NondetRegLayout { - _super: &Reg { offset: 86 }, - }, - cubed: &NondetRegLayout { - _super: &Reg { offset: 87 }, - }, - }, -}; -pub const LAYOUT__878: &DoIntRoundLayout = &DoIntRoundLayout { - sbox: &SBoxLayout { - _super: &NondetRegLayout { - _super: &Reg { offset: 88 }, - }, - cubed: &NondetRegLayout { - _super: &Reg { offset: 89 }, - }, - }, -}; -pub const LAYOUT__879: &DoIntRoundLayout = &DoIntRoundLayout { - sbox: &SBoxLayout { - _super: &NondetRegLayout { - _super: &Reg { offset: 90 }, - }, - cubed: &NondetRegLayout { - _super: &Reg { offset: 91 }, - }, - }, -}; -pub const LAYOUT__880: &DoIntRoundLayout = &DoIntRoundLayout { - sbox: &SBoxLayout { - _super: &NondetRegLayout { - _super: &Reg { offset: 92 }, - }, - cubed: &NondetRegLayout { - _super: &Reg { offset: 93 }, - }, - }, -}; -pub const LAYOUT__881: &DoIntRoundLayout = &DoIntRoundLayout { - sbox: &SBoxLayout { - _super: &NondetRegLayout { - _super: &Reg { offset: 94 }, - }, - cubed: &NondetRegLayout { - _super: &Reg { offset: 95 }, - }, - }, -}; -pub const LAYOUT__882: &DoIntRoundLayout = &DoIntRoundLayout { - sbox: &SBoxLayout { - _super: &NondetRegLayout { - _super: &Reg { offset: 96 }, - }, - cubed: &NondetRegLayout { - _super: &Reg { offset: 97 }, - }, - }, -}; -pub const LAYOUT__883: &DoIntRoundLayout = &DoIntRoundLayout { - sbox: &SBoxLayout { - _super: &NondetRegLayout { - _super: &Reg { offset: 98 }, - }, - cubed: &NondetRegLayout { - _super: &Reg { offset: 99 }, - }, - }, -}; -pub const LAYOUT__884: &DoIntRoundLayout = &DoIntRoundLayout { - sbox: &SBoxLayout { - _super: &NondetRegLayout { - _super: &Reg { offset: 100 }, - }, - cubed: &NondetRegLayout { - _super: &Reg { offset: 101 }, - }, - }, -}; -pub const LAYOUT__885: &DoIntRoundLayout = &DoIntRoundLayout { - sbox: &SBoxLayout { - _super: &NondetRegLayout { - _super: &Reg { offset: 102 }, - }, - cubed: &NondetRegLayout { - _super: &Reg { offset: 103 }, - }, - }, -}; -pub const LAYOUT__886: &DoIntRoundLayout = &DoIntRoundLayout { - sbox: &SBoxLayout { - _super: &NondetRegLayout { - _super: &Reg { offset: 104 }, - }, - cubed: &NondetRegLayout { - _super: &Reg { offset: 105 }, - }, - }, -}; -pub const LAYOUT__887: &DoIntRoundLayout = &DoIntRoundLayout { - sbox: &SBoxLayout { - _super: &NondetRegLayout { - _super: &Reg { offset: 106 }, - }, - cubed: &NondetRegLayout { - _super: &Reg { offset: 107 }, - }, - }, -}; -pub const LAYOUT__866: &DoIntRoundLayout21LayoutArray = &[ - LAYOUT__867, - LAYOUT__868, - LAYOUT__869, - LAYOUT__870, - LAYOUT__871, - LAYOUT__872, - LAYOUT__873, - LAYOUT__874, - LAYOUT__875, - LAYOUT__876, - LAYOUT__877, - LAYOUT__878, - LAYOUT__879, - LAYOUT__880, - LAYOUT__881, - LAYOUT__882, - LAYOUT__883, - LAYOUT__884, - LAYOUT__885, - LAYOUT__886, - LAYOUT__887, -]; -pub const LAYOUT__865: &DoIntRoundsLayout = &DoIntRoundsLayout { - _super: LAYOUT__866, -}; -pub const LAYOUT__864: &PoseidonIntRoundsLayout = &PoseidonIntRoundsLayout { - _super: LAYOUT__629, - next_inner: LAYOUT__865, -}; -pub const LAYOUT__857: &Poseidon1StateLayout = &Poseidon1StateLayout { - _super: LAYOUT__629, - arm0: LAYOUT__858, - arm1: LAYOUT__864, - arm2: LAYOUT__629, - arm3: LAYOUT__629, - arm4: LAYOUT__629, - arm5: LAYOUT__629, - arm6: LAYOUT__629, - arm7: LAYOUT__629, -}; -pub const LAYOUT__856: &Poseidon1Layout = &Poseidon1Layout { - state: LAYOUT__629, - state_redef: LAYOUT__857, - arg: &CycleArgLayout { - count: &NondetRegLayout { - _super: &Reg { offset: 128 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 0 }, - }, - }, -}; -pub const LAYOUT__6: &TopInstResultLayout = &TopInstResultLayout { - _selector: LAYOUT__5, - arm0: LAYOUT__7, - arm1: LAYOUT__88, - arm2: LAYOUT__106, - arm3: LAYOUT__119, - arm4: LAYOUT__203, - arm5: LAYOUT__289, - arm6: LAYOUT__350, - arm7: LAYOUT__408, - arm8: LAYOUT__576, - arm9: LAYOUT__628, - arm10: LAYOUT__856, -}; -pub const LAYOUT__0: &TopLayout = &TopLayout { - next_pc_low: &NondetRegLayout { - _super: &Reg { offset: 12 }, - }, - next_pc_high: &NondetRegLayout { - _super: &Reg { offset: 13 }, - }, - next_state_0: &NondetRegLayout { - _super: &Reg { offset: 14 }, - }, - next_machine_mode: &NondetRegLayout { - _super: &Reg { offset: 15 }, - }, - is_first_cycle: &NondetRegLayout { - _super: &Reg { offset: 16 }, - }, - cycle_nd: &NondetRegLayout { - _super: &Reg { offset: 0 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 0 }, - }, - major: &NondetRegLayout { - _super: &Reg { offset: 17 }, - }, - minor: &NondetRegLayout { - _super: &Reg { offset: 18 }, - }, - inst_input: LAYOUT__1, - major_onehot: LAYOUT__4, - inst_result: LAYOUT__6, -}; -pub const LAYOUT__889: &DigestRegValues_SuperLayout8LayoutArray = &[ - &DigestRegValues_SuperLayout { - low: &NondetRegLayout { - _super: &Reg { offset: 0 }, - }, - high: &NondetRegLayout { - _super: &Reg { offset: 1 }, - }, - }, - &DigestRegValues_SuperLayout { - low: &NondetRegLayout { - _super: &Reg { offset: 2 }, - }, - high: &NondetRegLayout { - _super: &Reg { offset: 3 }, - }, - }, - &DigestRegValues_SuperLayout { - low: &NondetRegLayout { - _super: &Reg { offset: 4 }, - }, - high: &NondetRegLayout { - _super: &Reg { offset: 5 }, - }, - }, - &DigestRegValues_SuperLayout { - low: &NondetRegLayout { - _super: &Reg { offset: 6 }, - }, - high: &NondetRegLayout { - _super: &Reg { offset: 7 }, - }, - }, - &DigestRegValues_SuperLayout { - low: &NondetRegLayout { - _super: &Reg { offset: 8 }, - }, - high: &NondetRegLayout { - _super: &Reg { offset: 9 }, - }, - }, - &DigestRegValues_SuperLayout { - low: &NondetRegLayout { - _super: &Reg { offset: 10 }, - }, - high: &NondetRegLayout { - _super: &Reg { offset: 11 }, - }, - }, - &DigestRegValues_SuperLayout { - low: &NondetRegLayout { - _super: &Reg { offset: 12 }, - }, - high: &NondetRegLayout { - _super: &Reg { offset: 13 }, - }, - }, - &DigestRegValues_SuperLayout { - low: &NondetRegLayout { - _super: &Reg { offset: 14 }, - }, - high: &NondetRegLayout { - _super: &Reg { offset: 15 }, - }, - }, -]; -pub const LAYOUT__888: &DigestRegLayout = &DigestRegLayout { - values: LAYOUT__889, -}; -pub const LAYOUT__891: &DigestRegValues_SuperLayout8LayoutArray = &[ - &DigestRegValues_SuperLayout { - low: &NondetRegLayout { - _super: &Reg { offset: 17 }, - }, - high: &NondetRegLayout { - _super: &Reg { offset: 18 }, - }, - }, - &DigestRegValues_SuperLayout { - low: &NondetRegLayout { - _super: &Reg { offset: 19 }, - }, - high: &NondetRegLayout { - _super: &Reg { offset: 20 }, - }, - }, - &DigestRegValues_SuperLayout { - low: &NondetRegLayout { - _super: &Reg { offset: 21 }, - }, - high: &NondetRegLayout { - _super: &Reg { offset: 22 }, - }, - }, - &DigestRegValues_SuperLayout { - low: &NondetRegLayout { - _super: &Reg { offset: 23 }, - }, - high: &NondetRegLayout { - _super: &Reg { offset: 24 }, - }, - }, - &DigestRegValues_SuperLayout { - low: &NondetRegLayout { - _super: &Reg { offset: 25 }, - }, - high: &NondetRegLayout { - _super: &Reg { offset: 26 }, - }, - }, - &DigestRegValues_SuperLayout { - low: &NondetRegLayout { - _super: &Reg { offset: 27 }, - }, - high: &NondetRegLayout { - _super: &Reg { offset: 28 }, - }, - }, - &DigestRegValues_SuperLayout { - low: &NondetRegLayout { - _super: &Reg { offset: 29 }, - }, - high: &NondetRegLayout { - _super: &Reg { offset: 30 }, - }, - }, - &DigestRegValues_SuperLayout { - low: &NondetRegLayout { - _super: &Reg { offset: 31 }, - }, - high: &NondetRegLayout { - _super: &Reg { offset: 32 }, - }, - }, -]; -pub const LAYOUT__890: &DigestRegLayout = &DigestRegLayout { - values: LAYOUT__891, -}; -pub const LAYOUT__893: &DigestRegValues_SuperLayout8LayoutArray = &[ - &DigestRegValues_SuperLayout { - low: &NondetRegLayout { - _super: &Reg { offset: 37 }, - }, - high: &NondetRegLayout { - _super: &Reg { offset: 38 }, - }, - }, - &DigestRegValues_SuperLayout { - low: &NondetRegLayout { - _super: &Reg { offset: 39 }, - }, - high: &NondetRegLayout { - _super: &Reg { offset: 40 }, - }, - }, - &DigestRegValues_SuperLayout { - low: &NondetRegLayout { - _super: &Reg { offset: 41 }, - }, - high: &NondetRegLayout { - _super: &Reg { offset: 42 }, - }, - }, - &DigestRegValues_SuperLayout { - low: &NondetRegLayout { - _super: &Reg { offset: 43 }, - }, - high: &NondetRegLayout { - _super: &Reg { offset: 44 }, - }, - }, - &DigestRegValues_SuperLayout { - low: &NondetRegLayout { - _super: &Reg { offset: 45 }, - }, - high: &NondetRegLayout { - _super: &Reg { offset: 46 }, - }, - }, - &DigestRegValues_SuperLayout { - low: &NondetRegLayout { - _super: &Reg { offset: 47 }, - }, - high: &NondetRegLayout { - _super: &Reg { offset: 48 }, - }, - }, - &DigestRegValues_SuperLayout { - low: &NondetRegLayout { - _super: &Reg { offset: 49 }, - }, - high: &NondetRegLayout { - _super: &Reg { offset: 50 }, - }, - }, - &DigestRegValues_SuperLayout { - low: &NondetRegLayout { - _super: &Reg { offset: 51 }, - }, - high: &NondetRegLayout { - _super: &Reg { offset: 52 }, - }, - }, -]; -pub const LAYOUT__892: &DigestRegLayout = &DigestRegLayout { - values: LAYOUT__893, -}; -pub const LAYOUT__895: &DigestRegValues_SuperLayout8LayoutArray = &[ - &DigestRegValues_SuperLayout { - low: &NondetRegLayout { - _super: &Reg { offset: 53 }, - }, - high: &NondetRegLayout { - _super: &Reg { offset: 54 }, - }, - }, - &DigestRegValues_SuperLayout { - low: &NondetRegLayout { - _super: &Reg { offset: 55 }, - }, - high: &NondetRegLayout { - _super: &Reg { offset: 56 }, - }, - }, - &DigestRegValues_SuperLayout { - low: &NondetRegLayout { - _super: &Reg { offset: 57 }, - }, - high: &NondetRegLayout { - _super: &Reg { offset: 58 }, - }, - }, - &DigestRegValues_SuperLayout { - low: &NondetRegLayout { - _super: &Reg { offset: 59 }, - }, - high: &NondetRegLayout { - _super: &Reg { offset: 60 }, - }, - }, - &DigestRegValues_SuperLayout { - low: &NondetRegLayout { - _super: &Reg { offset: 61 }, - }, - high: &NondetRegLayout { - _super: &Reg { offset: 62 }, - }, - }, - &DigestRegValues_SuperLayout { - low: &NondetRegLayout { - _super: &Reg { offset: 63 }, - }, - high: &NondetRegLayout { - _super: &Reg { offset: 64 }, - }, - }, - &DigestRegValues_SuperLayout { - low: &NondetRegLayout { - _super: &Reg { offset: 65 }, - }, - high: &NondetRegLayout { - _super: &Reg { offset: 66 }, - }, - }, - &DigestRegValues_SuperLayout { - low: &NondetRegLayout { - _super: &Reg { offset: 67 }, - }, - high: &NondetRegLayout { - _super: &Reg { offset: 68 }, - }, - }, -]; -pub const LAYOUT__894: &DigestRegLayout = &DigestRegLayout { - values: LAYOUT__895, -}; -pub const LAYOUT__896: &_accumLayout = &_accumLayout { - arg_u8: &Arg_ArgU8Layout { - val: &Reg { offset: 0 }, - }, - arg_u16: &Arg_ArgU16Layout { - val: &Reg { offset: 4 }, - }, - memory_arg: &Arg_MemoryArgLayout { - addr: &Reg { offset: 8 }, - cycle: &Reg { offset: 12 }, - data_low: &Reg { offset: 16 }, - data_high: &Reg { offset: 20 }, - }, - cycle_arg: &Arg_CycleArgLayout { - cycle: &Reg { offset: 24 }, - }, - _offset: &Reg { offset: 28 }, -}; -pub const LAYOUT_TEST_SUCC_RUN_ACCUM: &LayoutAccumLayout = &LayoutAccumLayout { - columns: &[ - &Reg { offset: 0 }, - &Reg { offset: 4 }, - &Reg { offset: 8 }, - &Reg { offset: 12 }, - &Reg { offset: 16 }, - &Reg { offset: 20 }, - &Reg { offset: 24 }, - &Reg { offset: 28 }, - &Reg { offset: 32 }, - &Reg { offset: 36 }, - &Reg { offset: 40 }, - &Reg { offset: 44 }, - &Reg { offset: 48 }, - &Reg { offset: 52 }, - &Reg { offset: 56 }, - &Reg { offset: 60 }, - &Reg { offset: 64 }, - &Reg { offset: 68 }, - &Reg { offset: 72 }, - ], -}; -pub const LAYOUT_TOP_ACCUM: &LayoutAccumLayout = &LayoutAccumLayout { - columns: &[ - &Reg { offset: 0 }, - &Reg { offset: 4 }, - &Reg { offset: 8 }, - &Reg { offset: 12 }, - &Reg { offset: 16 }, - &Reg { offset: 20 }, - &Reg { offset: 24 }, - &Reg { offset: 28 }, - &Reg { offset: 32 }, - &Reg { offset: 36 }, - &Reg { offset: 40 }, - &Reg { offset: 44 }, - &Reg { offset: 48 }, - &Reg { offset: 52 }, - &Reg { offset: 56 }, - &Reg { offset: 60 }, - &Reg { offset: 64 }, - &Reg { offset: 68 }, - &Reg { offset: 72 }, - ], -}; -pub const LAYOUT_TEST_SUCC_RUN: &TestSuccRunLayout = &TestSuccRunLayout { _0: LAYOUT__0 }; -pub const LAYOUT_TOP: &TopLayout = &TopLayout { - next_pc_low: &NondetRegLayout { - _super: &Reg { offset: 12 }, - }, - next_pc_high: &NondetRegLayout { - _super: &Reg { offset: 13 }, - }, - next_state_0: &NondetRegLayout { - _super: &Reg { offset: 14 }, - }, - next_machine_mode: &NondetRegLayout { - _super: &Reg { offset: 15 }, - }, - is_first_cycle: &NondetRegLayout { - _super: &Reg { offset: 16 }, - }, - cycle_nd: &NondetRegLayout { - _super: &Reg { offset: 0 }, - }, - cycle: &NondetRegLayout { - _super: &Reg { offset: 0 }, - }, - major: &NondetRegLayout { - _super: &Reg { offset: 17 }, - }, - minor: &NondetRegLayout { - _super: &Reg { offset: 18 }, - }, - inst_input: LAYOUT__1, - major_onehot: LAYOUT__4, - inst_result: LAYOUT__6, -}; -pub const LAYOUT_GLOBAL: &_globalLayout = &_globalLayout { - input: LAYOUT__888, - is_terminate: &NondetRegLayout { - _super: &Reg { offset: 16 }, - }, - output: LAYOUT__890, - rng: &NondetExtRegLayout { - _super: &Reg { offset: 33 }, - }, - state_in: LAYOUT__892, - state_out: LAYOUT__894, - term_a0high: &NondetRegLayout { - _super: &Reg { offset: 69 }, - }, - term_a0low: &NondetRegLayout { - _super: &Reg { offset: 70 }, - }, - term_a1high: &NondetRegLayout { - _super: &Reg { offset: 71 }, - }, - term_a1low: &NondetRegLayout { - _super: &Reg { offset: 72 }, - }, -}; -pub const LAYOUT_MIX: &_mixLayout = &_mixLayout { - randomness: LAYOUT__896, -}; diff --git a/risc0/circuit/rv32im-v2/src/zirgen/mod.rs b/risc0/circuit/rv32im-v2/src/zirgen/mod.rs deleted file mode 100644 index 52945f8a..00000000 --- a/risc0/circuit/rv32im-v2/src/zirgen/mod.rs +++ /dev/null @@ -1,90 +0,0 @@ -// Copyright 2024 RISC Zero, Inc. -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -use risc0_zkp::{ - adapter::{CircuitCoreDef, TapsProvider}, - field::baby_bear::BabyBear, - taps::TapSet, -}; - -pub(crate) mod info; -pub(crate) mod poly_ext; -pub(crate) mod taps; - -pub(crate) struct CircuitImpl; - -#[allow(unused)] -#[allow(non_camel_case_types)] -#[allow(non_snake_case)] -pub(crate) mod circuit { - use risc0_zkp::layout::Reg; - - macro_rules! set_field { - ($field:ident) => { - paste::paste! { - pub type CircuitField = risc0_core::field::[<$field:snake>]::$field; - pub type Val = ::Elem; - pub type ExtVal = ::ExtElem; - pub type MixState = risc0_zkp::adapter::MixState; - pub type PolyMix = ExtVal; - } - }; - } - - macro_rules! define_buffer_list { - ( - all: [ $( $name:ident ,)* ], - rows: [ $( $rows_name:ident ,)* ], - taps: [ $( $taps_name:ident ,)* ], - globals: [ $( $globals_name:ident ,)* ], - ) => {}; - } - - macro_rules! define_tap_buffer { - ($name:ident, $size:literal, $reg_group_id:literal) => { - paste::paste! { - pub const [< REGCOUNT_ $name:upper >] : usize = $size; - pub const [< REGISTER_GROUP_ $name:upper >] : usize = $reg_group_id; - } - }; - } - - macro_rules! define_global_buffer { - ($name:ident, $size:literal) => { - paste::paste! { - pub const [< REGCOUNT_ $name:upper >] : usize = $size; - } - }; - } - - macro_rules! define_buffer { - ($name:ident, $size:literal) => { - paste::paste! { - pub const [< REGCOUNT_ $name:upper >] : usize = $size; - } - }; - } - - include! {"types.rs.inc"} - include! {"defs.rs.inc"} - include! {"layout.rs.inc"} -} - -impl CircuitCoreDef for CircuitImpl {} - -impl TapsProvider for CircuitImpl { - fn get_taps(&self) -> &'static TapSet<'static> { - self::taps::TAPSET - } -} diff --git a/risc0/circuit/rv32im-v2/src/zirgen/poly_ext.rs b/risc0/circuit/rv32im-v2/src/zirgen/poly_ext.rs deleted file mode 100644 index 600f4aaa..00000000 --- a/risc0/circuit/rv32im-v2/src/zirgen/poly_ext.rs +++ /dev/null @@ -1,13770 +0,0 @@ -// Copyright 2024 RISC Zero, Inc. -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -// This code is automatically generated - -use risc0_zkp::{ - adapter::{MixState, PolyExt, PolyExtStep, PolyExtStepDef}, - field::baby_bear::{BabyBear, BabyBearElem, BabyBearExtElem}, -}; - -use super::CircuitImpl; - -#[allow(missing_docs)] -#[rustfmt::skip] -pub const DEF: PolyExtStepDef = PolyExtStepDef { - block: &[PolyExtStep::Const(1), // loc(unknown) -PolyExtStep::Const(7), // loc(unknown) -PolyExtStep::Const(6), // loc(unknown) -PolyExtStep::Const(5), // loc(unknown) -PolyExtStep::Const(4), // loc(unknown) -PolyExtStep::Const(3), // loc(unknown) -PolyExtStep::Const(2), // loc(unknown) -PolyExtStep::Const(0), // loc(unknown) -PolyExtStep::Const(10), // loc(unknown) -PolyExtStep::Const(9), // loc(unknown) -PolyExtStep::Const(8), // loc(unknown) -PolyExtStep::Const(32), // loc(unknown) -PolyExtStep::Const(16384), // loc(unknown) -PolyExtStep::Const(49151), // loc(unknown) -PolyExtStep::Const(65535), // loc(unknown) -PolyExtStep::Const(2013265920), // loc(unknown) -PolyExtStep::Const(61440), // loc(unknown) -PolyExtStep::Const(64), // loc(unknown) -PolyExtStep::Const(256), // loc(unknown) -PolyExtStep::Const(1024), // loc(unknown) -PolyExtStep::Const(4096), // loc(unknown) -PolyExtStep::Const(16), // loc(unknown) -PolyExtStep::Const(128), // loc(unknown) -PolyExtStep::Const(512), // loc(unknown) -PolyExtStep::Const(2048), // loc(unknown) -PolyExtStep::Const(8192), // loc(unknown) -PolyExtStep::Const(32768), // loc(unknown) -PolyExtStep::Const(1073725440), // loc(unknown) -PolyExtStep::Const(1073725472), // loc(unknown) -PolyExtStep::Const(51), // loc(unknown) -PolyExtStep::Const(65536), // loc(unknown) -PolyExtStep::Const(11), // loc(unknown) -PolyExtStep::Const(12), // loc(unknown) -PolyExtStep::Const(13), // loc(unknown) -PolyExtStep::Const(14), // loc(unknown) -PolyExtStep::Const(15), // loc(unknown) -PolyExtStep::Const(1006632961), // loc(unknown) -PolyExtStep::Const(19), // loc(unknown) -PolyExtStep::Const(99), // loc(unknown) -PolyExtStep::Const(65520), // loc(unknown) -PolyExtStep::Const(111), // loc(unknown) -PolyExtStep::Const(103), // loc(unknown) -PolyExtStep::Const(55), // loc(unknown) -PolyExtStep::Const(23), // loc(unknown) -PolyExtStep::Const(115), // loc(unknown) -PolyExtStep::Const(131070), // loc(unknown) -PolyExtStep::Const(131072), // loc(unknown) -PolyExtStep::Const(16777216), // loc(unknown) -PolyExtStep::Const(2013235201), // loc(unknown) -PolyExtStep::Const(65280), // loc(unknown) -PolyExtStep::Const(35), // loc(unknown) -PolyExtStep::Const(1140850680), // loc(unknown) -PolyExtStep::Const(1140850681), // loc(unknown) -PolyExtStep::Const(1140850682), // loc(unknown) -PolyExtStep::Const(1140850683), // loc(unknown) -PolyExtStep::Const(1140850684), // loc(unknown) -PolyExtStep::Const(1140850685), // loc(unknown) -PolyExtStep::Const(1140850686), // loc(unknown) -PolyExtStep::Const(1140850687), // loc(unknown) -PolyExtStep::Const(1073725489), // loc(unknown) -PolyExtStep::Const(1073726464), // loc(unknown) -PolyExtStep::Const(1073725568), // loc(unknown) -PolyExtStep::Const(12320), // loc(unknown) -PolyExtStep::Const(1073725457), // loc(unknown) -PolyExtStep::Const(1073725482), // loc(unknown) -PolyExtStep::Const(1073725483), // loc(unknown) -PolyExtStep::Const(1073725450), // loc(unknown) -PolyExtStep::Const(1073725451), // loc(unknown) -PolyExtStep::Const(1073725452), // loc(unknown) -PolyExtStep::Const(1073725504), // loc(unknown) -PolyExtStep::Const(1140850688), // loc(unknown) -PolyExtStep::Const(1073741824), // loc(unknown) -PolyExtStep::Const(1342177281), // loc(unknown) -PolyExtStep::Const(22), // loc(unknown) -PolyExtStep::ConstExt(0,0,0,0), // loc(unknown) -PolyExtStep::Const(17), // loc(unknown) -PolyExtStep::Const(18), // loc(unknown) -PolyExtStep::Const(21), // loc(unknown) -PolyExtStep::Const(1509949441), // loc(unknown) -PolyExtStep::Const(1073725453), // loc(unknown) -PolyExtStep::ConstExt(1,0,0,0), // loc(unknown) -PolyExtStep::Const(24), // loc(unknown) -PolyExtStep::Const(1761607681), // loc(unknown) -PolyExtStep::Const(4194304), // loc(unknown) -PolyExtStep::Const(25), // loc(unknown) -PolyExtStep::Const(262278199), // loc(unknown) -PolyExtStep::Const(127253399), // loc(unknown) -PolyExtStep::Const(314968988), // loc(unknown) -PolyExtStep::Const(246143118), // loc(unknown) -PolyExtStep::Const(157582794), // loc(unknown) -PolyExtStep::Const(118043943), // loc(unknown) -PolyExtStep::Const(454905424), // loc(unknown) -PolyExtStep::Const(815798990), // loc(unknown) -PolyExtStep::Const(1004040026), // loc(unknown) -PolyExtStep::Const(1773108264), // loc(unknown) -PolyExtStep::Const(1066694495), // loc(unknown) -PolyExtStep::Const(1930780904), // loc(unknown) -PolyExtStep::Const(1180307149), // loc(unknown) -PolyExtStep::Const(1464793095), // loc(unknown) -PolyExtStep::Const(1660766320), // loc(unknown) -PolyExtStep::Const(1389166148), // loc(unknown) -PolyExtStep::Const(343354132), // loc(unknown) -PolyExtStep::Const(1307439985), // loc(unknown) -PolyExtStep::Const(638242172), // loc(unknown) -PolyExtStep::Const(525458520), // loc(unknown) -PolyExtStep::Const(1964135730), // loc(unknown) -PolyExtStep::Const(1751797115), // loc(unknown) -PolyExtStep::Const(1421525369), // loc(unknown) -PolyExtStep::Const(831813382), // loc(unknown) -PolyExtStep::Const(989176635), // loc(unknown) -PolyExtStep::Const(241306552), // loc(unknown) -PolyExtStep::Const(1507936940), // loc(unknown) -PolyExtStep::Const(1687379185), // loc(unknown) -PolyExtStep::Const(1150912935), // loc(unknown) -PolyExtStep::Const(1917549072), // loc(unknown) -PolyExtStep::Const(1201063290), // loc(unknown) -PolyExtStep::Const(395622276), // loc(unknown) -PolyExtStep::Const(1997503974), // loc(unknown) -PolyExtStep::Const(716894289), // loc(unknown) -PolyExtStep::Const(897025192), // loc(unknown) -PolyExtStep::Const(1282239129), // loc(unknown) -PolyExtStep::Const(1737016378), // loc(unknown) -PolyExtStep::Const(686842369), // loc(unknown) -PolyExtStep::Const(622609176), // loc(unknown) -PolyExtStep::Const(1339793538), // loc(unknown) -PolyExtStep::Const(1518763784), // loc(unknown) -PolyExtStep::Const(1989924532), // loc(unknown) -PolyExtStep::Const(1170029417), // loc(unknown) -PolyExtStep::Const(1917861751), // loc(unknown) -PolyExtStep::Const(1333667262), // loc(unknown) -PolyExtStep::Const(540703332), // loc(unknown) -PolyExtStep::Const(1845603984), // loc(unknown) -PolyExtStep::Const(695835963), // loc(unknown) -PolyExtStep::Const(862495875), // loc(unknown) -PolyExtStep::Const(447555988), // loc(unknown) -PolyExtStep::Const(1910423126), // loc(unknown) -PolyExtStep::Const(1099252725), // loc(unknown) -PolyExtStep::Const(1584033957), // loc(unknown) -PolyExtStep::Const(1079030649), // loc(unknown) -PolyExtStep::Const(1622328571), // loc(unknown) -PolyExtStep::Const(1908416316), // loc(unknown) -PolyExtStep::Const(1549062383), // loc(unknown) -PolyExtStep::Const(623051854), // loc(unknown) -PolyExtStep::Const(162510541), // loc(unknown) -PolyExtStep::Const(1608853840), // loc(unknown) -PolyExtStep::Const(538103555), // loc(unknown) -PolyExtStep::Const(1424297384), // loc(unknown) -PolyExtStep::Const(552696906), // loc(unknown) -PolyExtStep::Const(946500736), // loc(unknown) -PolyExtStep::Const(1215259350), // loc(unknown) -PolyExtStep::Const(855276054), // loc(unknown) -PolyExtStep::Const(1664590951), // loc(unknown) -PolyExtStep::Const(217046702), // loc(unknown) -PolyExtStep::Const(142102402), // loc(unknown) -PolyExtStep::Const(1257820264), // loc(unknown) -PolyExtStep::Const(27129487), // loc(unknown) -PolyExtStep::Const(1147522062), // loc(unknown) -PolyExtStep::Const(1291790245), // loc(unknown) -PolyExtStep::Const(1781980094), // loc(unknown) -PolyExtStep::Const(273790406), // loc(unknown) -PolyExtStep::Const(1239734761), // loc(unknown) -PolyExtStep::Const(1221257987), // loc(unknown) -PolyExtStep::Const(51256176), // loc(unknown) -PolyExtStep::Const(172614232), // loc(unknown) -PolyExtStep::Const(306391314), // loc(unknown) -PolyExtStep::Const(1647670797), // loc(unknown) -PolyExtStep::Const(53007114), // loc(unknown) -PolyExtStep::Const(1269493554), // loc(unknown) -PolyExtStep::Const(1338899225), // loc(unknown) -PolyExtStep::Const(1740472809), // loc(unknown) -PolyExtStep::Const(1454563174), // loc(unknown) -PolyExtStep::Const(204228775), // loc(unknown) -PolyExtStep::Const(588764636), // loc(unknown) -PolyExtStep::Const(1718628547), // loc(unknown) -PolyExtStep::Const(427731030), // loc(unknown) -PolyExtStep::Const(825405577), // loc(unknown) -PolyExtStep::Const(342857858), // loc(unknown) -PolyExtStep::Const(1290028279), // loc(unknown) -PolyExtStep::Const(608401422), // loc(unknown) -PolyExtStep::Const(1587822577), // loc(unknown) -PolyExtStep::Const(128479034), // loc(unknown) -PolyExtStep::Const(1040977421), // loc(unknown) -PolyExtStep::Const(1792450386), // loc(unknown) -PolyExtStep::Const(1470845646), // loc(unknown) -PolyExtStep::Const(1363837384), // loc(unknown) -PolyExtStep::Const(1878280202), // loc(unknown) -PolyExtStep::Const(434078361), // loc(unknown) -PolyExtStep::Const(1946596189), // loc(unknown) -PolyExtStep::Const(875839332), // loc(unknown) -PolyExtStep::Const(463976218), // loc(unknown) -PolyExtStep::Const(976057819), // loc(unknown) -PolyExtStep::Const(48375137), // loc(unknown) -PolyExtStep::Const(1549779579), // loc(unknown) -PolyExtStep::Const(1679178250), // loc(unknown) -PolyExtStep::Const(530151394), // loc(unknown) -PolyExtStep::Const(1629316321), // loc(unknown) -PolyExtStep::Const(1854174607), // loc(unknown) -PolyExtStep::Const(720724951), // loc(unknown) -PolyExtStep::Const(14387587), // loc(unknown) -PolyExtStep::Const(1883820770), // loc(unknown) -PolyExtStep::Const(205609311), // loc(unknown) -PolyExtStep::Const(1136469704), // loc(unknown) -PolyExtStep::Const(1439947916), // loc(unknown) -PolyExtStep::Const(723038058), // loc(unknown) -PolyExtStep::Const(53041581), // loc(unknown) -PolyExtStep::Const(150307788), // loc(unknown) -PolyExtStep::Const(755691969), // loc(unknown) -PolyExtStep::Const(1715719711), // loc(unknown) -PolyExtStep::Const(1545325389), // loc(unknown) -PolyExtStep::Const(989618631), // loc(unknown) -PolyExtStep::Const(1401020792), // loc(unknown) -PolyExtStep::Const(930036496), // loc(unknown) -PolyExtStep::Const(238616145), // loc(unknown) -PolyExtStep::Const(1006235079), // loc(unknown) -PolyExtStep::Const(942439428), // loc(unknown) -PolyExtStep::Const(1649953458), // loc(unknown) -PolyExtStep::Const(1647665372), // loc(unknown) -PolyExtStep::Const(708123747), // loc(unknown) -PolyExtStep::Const(925018226), // loc(unknown) -PolyExtStep::Const(78845751), // loc(unknown) -PolyExtStep::Const(1889603648), // loc(unknown) -PolyExtStep::Const(993455846), // loc(unknown) -PolyExtStep::Const(140621810), // loc(unknown) -PolyExtStep::Const(117294666), // loc(unknown) -PolyExtStep::Const(790726260), // loc(unknown) -PolyExtStep::Const(1213686459), // loc(unknown) -PolyExtStep::Const(390340387), // loc(unknown) -PolyExtStep::Const(714957516), // loc(unknown) -PolyExtStep::Const(1209164052), // loc(unknown) -PolyExtStep::Const(1827572010), // loc(unknown) -PolyExtStep::Const(1507649755), // loc(unknown) -PolyExtStep::Const(1042892522), // loc(unknown) -PolyExtStep::Const(760115692), // loc(unknown) -PolyExtStep::Const(1841795381), // loc(unknown) -PolyExtStep::Const(457372011), // loc(unknown) -PolyExtStep::Const(1748789933), // loc(unknown) -PolyExtStep::Const(1478577620), // loc(unknown) -PolyExtStep::Const(76770019), // loc(unknown) -PolyExtStep::Const(1293938517), // loc(unknown) -PolyExtStep::Const(1150410028), // loc(unknown) -PolyExtStep::Const(1065075039), // loc(unknown) -PolyExtStep::Const(1198261138), // loc(unknown) -PolyExtStep::Const(59510015), // loc(unknown) -PolyExtStep::Const(1402624179), // loc(unknown) -PolyExtStep::Const(158646617), // loc(unknown) -PolyExtStep::Const(890243564), // loc(unknown) -PolyExtStep::Const(1463323727), // loc(unknown) -PolyExtStep::Const(1080533265), // loc(unknown) -PolyExtStep::Const(192082241), // loc(unknown) -PolyExtStep::Const(1891637550), // loc(unknown) -PolyExtStep::Const(1950429111), // loc(unknown) -PolyExtStep::Const(1663353317), // loc(unknown) -PolyExtStep::Const(1567618575), // loc(unknown) -PolyExtStep::Const(1380248020), // loc(unknown) -PolyExtStep::Const(1608891156), // loc(unknown) -PolyExtStep::Const(1672219447), // loc(unknown) -PolyExtStep::Const(1262312258), // loc(unknown) -PolyExtStep::Const(162506101), // loc(unknown) -PolyExtStep::Const(809508074), // loc(unknown) -PolyExtStep::Const(1303271640), // loc(unknown) -PolyExtStep::Const(1393671120), // loc(unknown) -PolyExtStep::Const(641665156), // loc(unknown) -PolyExtStep::Const(1090783436), // loc(unknown) -PolyExtStep::Const(1111203133), // loc(unknown) -PolyExtStep::Const(1296144415), // loc(unknown) -PolyExtStep::Const(202271745), // loc(unknown) -PolyExtStep::Const(459826664), // loc(unknown) -PolyExtStep::Const(781141772), // loc(unknown) -PolyExtStep::Const(1832911930), // loc(unknown) -PolyExtStep::Const(228520958), // loc(unknown) -PolyExtStep::Const(813674331), // loc(unknown) -PolyExtStep::Const(1889898), // loc(unknown) -PolyExtStep::Const(1124078057), // loc(unknown) -PolyExtStep::Const(738091882), // loc(unknown) -PolyExtStep::Const(1003792297), // loc(unknown) -PolyExtStep::Const(1896271507), // loc(unknown) -PolyExtStep::Const(1206940496), // loc(unknown) -PolyExtStep::Const(497520322), // loc(unknown) -PolyExtStep::Const(1930103076), // loc(unknown) -PolyExtStep::Const(1052077299), // loc(unknown) -PolyExtStep::Const(1540960371), // loc(unknown) -PolyExtStep::Const(924863639), // loc(unknown) -PolyExtStep::Const(1365519753), // loc(unknown) -PolyExtStep::Const(1726563304), // loc(unknown) -PolyExtStep::Const(440300254), // loc(unknown) -PolyExtStep::Const(1891545577), // loc(unknown) -PolyExtStep::Const(822033215), // loc(unknown) -PolyExtStep::Const(1111544260), // loc(unknown) -PolyExtStep::Const(308575117), // loc(unknown) -PolyExtStep::Const(1708681573), // loc(unknown) -PolyExtStep::Const(1240419708), // loc(unknown) -PolyExtStep::Const(1199068823), // loc(unknown) -PolyExtStep::Const(1186174623), // loc(unknown) -PolyExtStep::Const(1551596046), // loc(unknown) -PolyExtStep::Const(1886977120), // loc(unknown) -PolyExtStep::Const(1327682690), // loc(unknown) -PolyExtStep::Const(1210751726), // loc(unknown) -PolyExtStep::Const(1810596765), // loc(unknown) -PolyExtStep::Const(1083257840), // loc(unknown) -PolyExtStep::Const(375892129), // loc(unknown) -PolyExtStep::Const(111593398), // loc(unknown) -PolyExtStep::Const(1867716110), // loc(unknown) -PolyExtStep::Const(658182609), // loc(unknown) -PolyExtStep::Const(51866717), // loc(unknown) -PolyExtStep::Const(1928969209), // loc(unknown) -PolyExtStep::Const(1942928017), // loc(unknown) -PolyExtStep::Const(1558116381), // loc(unknown) -PolyExtStep::Const(20525701), // loc(unknown) -PolyExtStep::Const(1188752902), // loc(unknown) -PolyExtStep::Const(106789798), // loc(unknown) -PolyExtStep::Const(1389833583), // loc(unknown) -PolyExtStep::Const(98371040), // loc(unknown) -PolyExtStep::Const(1001081699), // loc(unknown) -PolyExtStep::Const(1792686146), // loc(unknown) -PolyExtStep::Const(801504236), // loc(unknown) -PolyExtStep::Const(1997365680), // loc(unknown) -PolyExtStep::Const(1461037801), // loc(unknown) -PolyExtStep::Const(65998480), // loc(unknown) -PolyExtStep::Const(1974912880), // loc(unknown) -PolyExtStep::Const(606789471), // loc(unknown) -PolyExtStep::Const(13683276), // loc(unknown) -PolyExtStep::Const(918610824), // loc(unknown) -PolyExtStep::Const(1073725572), // loc(unknown) -PolyExtStep::Const(1073725573), // loc(unknown) -PolyExtStep::Const(1073725592), // loc(unknown) -PolyExtStep::Const(1073725593), // loc(unknown) -PolyExtStep::Const(1073725594), // loc(unknown) -PolyExtStep::Const(1073725595), // loc(unknown) -PolyExtStep::Const(1073725596), // loc(unknown) -PolyExtStep::Const(1073725597), // loc(unknown) -PolyExtStep::Const(1073725598), // loc(unknown) -PolyExtStep::Const(1073725599), // loc(unknown) -PolyExtStep::Const(1073725584), // loc(unknown) -PolyExtStep::Const(1073725585), // loc(unknown) -PolyExtStep::Const(1073725586), // loc(unknown) -PolyExtStep::Const(1073725587), // loc(unknown) -PolyExtStep::Const(1073725588), // loc(unknown) -PolyExtStep::Const(1073725589), // loc(unknown) -PolyExtStep::Const(1073725590), // loc(unknown) -PolyExtStep::Const(1073725591), // loc(unknown) -PolyExtStep::Const(1797558858), // loc(unknown) -PolyExtStep::ConstExt(0,1,0,0), // loc(unknown) -PolyExtStep::True, // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Get(101), // loc(callsite(unknown at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :47:31) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Get(81), // loc(callsite(unknown at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :48:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(0, 7), // loc(callsite( Reg ( :5:7) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :49:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Sub(0, 342), // loc(callsite(unknown at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :52:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Get(94), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :52:48) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Mul(344, 345), // loc(callsite(unknown at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :52:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Get(96), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :53:50) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Mul(344, 347), // loc(callsite(unknown at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :53:34) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Get(98), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :56:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Mul(344, 349), // loc(callsite(unknown at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :56:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Get(100), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :58:60) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Mul(344, 351), // loc(callsite(unknown at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :58:39) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(352, 342), // loc(callsite(unknown at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :58:61) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Get(102), // loc(callsite(unknown at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :62:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Get(103), // loc(callsite(unknown at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :63:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Get(104), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(0, 356), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(356, 357), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1, 358), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Get(105), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(0, 359), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(359, 360), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(2, 361), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Get(106), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(0, 362), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(362, 363), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3, 364), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Get(107), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(0, 365), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(365, 366), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4, 367), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Get(108), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(0, 368), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(368, 369), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(5, 370), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Get(109), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(0, 371), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(371, 372), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(6, 373), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Get(110), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(0, 374), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(374, 375), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(7, 376), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Get(111), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(0, 377), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(377, 378), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(8, 379), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(356, 359), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:4) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(380, 362), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:4) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(381, 365), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:4) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(382, 368), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:4) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(383, 371), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:4) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(384, 374), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:4) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(385, 377), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:4) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(386, 0), // loc(callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:32) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(9, 387), // loc(callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:32) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Mul(362, 6), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:32) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(365, 5), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:32) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(368, 4), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:32) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(371, 3), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:32) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(374, 2), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:32) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(377, 1), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:32) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(359, 388), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:4) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(394, 389), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:4) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(395, 390), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:4) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(396, 391), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:4) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(397, 392), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:4) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(398, 393), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:4) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(399, 355), // loc(callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:56) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(10, 400), // loc(callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:56) at callsite( InstInput ( zirgen/circuit/rv32im/v2/dsl/inst.zir :15:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :66:27) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Get(82), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(0, 401), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(401, 402), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(11, 403), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Get(83), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(0, 404), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(404, 405), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(12, 406), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Get(84), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(0, 407), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(407, 408), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(13, 409), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Get(85), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(0, 410), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(410, 411), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(14, 412), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Get(86), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(0, 413), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(413, 414), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(15, 415), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Get(87), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(0, 416), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(416, 417), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(16, 418), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Get(88), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(0, 419), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(419, 420), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(17, 421), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Get(89), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(0, 422), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(422, 423), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(18, 424), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Get(90), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(0, 425), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(425, 426), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(19, 427), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Get(91), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(0, 428), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(428, 429), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(20, 430), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Get(92), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(0, 431), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(431, 432), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(21, 433), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(401, 404), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:4) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Add(434, 407), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:4) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Add(435, 410), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:4) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Add(436, 413), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:4) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Add(437, 416), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:4) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Add(438, 419), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:4) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Add(439, 422), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:4) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Add(440, 425), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:4) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Add(441, 428), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:4) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Add(442, 431), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:4) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Sub(443, 0), // loc(callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(22, 444), // loc(callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Mul(407, 6), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Mul(410, 5), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Mul(413, 4), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Mul(416, 3), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Mul(419, 2), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Mul(422, 1), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Mul(425, 10), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Mul(428, 9), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Mul(431, 8), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Add(404, 445), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:4) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Add(454, 446), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:4) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Add(455, 447), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:4) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Add(456, 448), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:4) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Add(457, 449), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:4) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Add(458, 450), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:4) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Add(459, 451), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:4) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Add(460, 452), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:4) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Add(461, 453), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:4) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Sub(462, 354), // loc(callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:56) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(23, 463), // loc(callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:56) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :68:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Sub(350, 11), // loc(callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :7:21) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Mul(353, 14), // loc(callsite(unknown at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :65:24) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(0, 353), // loc(callsite(unknown at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :65:41) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(466, 13), // loc(callsite(unknown at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :65:49) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(465, 467), // loc(callsite(unknown at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :65:31) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(468, 348), // loc(callsite(unknown at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :65:53) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(348, 12), // loc(callsite(unknown at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :73:12) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(353, 27), // loc(callsite(unknown at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :34:22) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(466, 28), // loc(callsite(unknown at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :34:63) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(471, 472), // loc(callsite(unknown at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :34:44) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(346, 4), // loc(callsite(unknown at callsite( AddU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :27:21) at callsite( SimpleOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :74:20) at callsite( OpADD ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :87:12) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :31:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(474, 356), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Mul(474, 359), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Mul(474, 362), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Mul(474, 365), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Mul(474, 368), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Mul(474, 371), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Mul(474, 374), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Mul(474, 377), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(475, 476), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(483, 477), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(484, 478), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(485, 479), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(486, 480), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(487, 481), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(488, 482), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Mul(348, 356), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Mul(348, 359), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Mul(348, 362), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Mul(348, 365), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Mul(348, 368), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Mul(348, 371), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Mul(348, 374), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Mul(348, 377), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(490, 491), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(498, 492), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(499, 493), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(500, 494), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(501, 495), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(502, 496), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(503, 497), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(0, 464), // loc(callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :7:21) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(25, 7), // loc(callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :22:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Get(204), // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :63:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(0, 505), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:11) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :63:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(505, 506), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:4) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :63:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(6, 505), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:23) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :63:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(507, 508), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:18) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :63:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(5, 505), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:35) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :63:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(509, 510), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :63:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(26, 511), // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :63:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Get(205), // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :28:29) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :65:23) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(206), // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :65:23) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Sub(512, 0), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :65:23) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(27, 514), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :65:23) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(513, 469), // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :65:23) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(28, 515), // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :65:23) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Get(207), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :8:23) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Get(208), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :11:20) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(0, 516), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(516, 518), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(29, 519), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(348, 517), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:4) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(520, 518), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(30, 521), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(516, 348), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:4) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(31, 522), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:17) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(516, 517), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:4) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(32, 523), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:17) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(33, 516), // loc(callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:19) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Get(209), // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :28:29) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :69:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Get(210), // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :69:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(524, 0), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :69:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(34, 526), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :69:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(525, 4), // loc(callsite(unknown at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :71:4) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(527, 505), // loc(callsite(unknown at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :71:12) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(528, 346), // loc(callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :71:21) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(35, 529), // loc(callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :71:21) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(470, 525), // loc(callsite(unknown at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :73:23) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(36, 505), // loc(callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :26:17) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Get(212), // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :25:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Get(211), // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :26:28) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Get(213), // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :27:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Get(214), // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Get(215), // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Get(216), // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :25:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Get(217), // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Get(218), // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(531, 15), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(37, 539), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(536, 0), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(38, 540), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(39, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(40, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(532, 530), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(41, 541), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(534, 537), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(42, 542), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(535, 538), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(43, 543), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(343, 533), // loc(callsite(unknown at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Get(219), // loc(callsite(unknown at callsite( CycleArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :54:29) at callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :60:19) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(220), // loc(callsite(unknown at callsite( CycleArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :55:29) at callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :60:19) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Sub(545, 0), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(44, 547), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(546, 544), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(45, 548), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Get(181), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :15:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(0, 549), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :15:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(549, 550), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :15:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(46, 551), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :15:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Get(183), // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :16:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(0, 552), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:11) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :16:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(552, 553), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:4) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :16:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(6, 552), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:23) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :16:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(554, 555), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:18) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :16:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(5, 552), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:35) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :16:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(556, 557), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :16:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(47, 558), // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :16:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Get(185), // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :17:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(0, 559), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:11) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :17:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(559, 560), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:4) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :17:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(6, 559), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:23) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :17:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(561, 562), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:18) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :17:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(5, 559), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:35) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :17:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(563, 564), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :17:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(48, 565), // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :17:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Get(187), // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :18:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(0, 566), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:11) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :18:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(566, 567), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:4) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :18:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(6, 566), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:23) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :18:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(568, 569), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:18) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :18:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(5, 566), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:35) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :18:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(570, 571), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :18:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(49, 572), // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :18:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Get(189), // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :19:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(0, 573), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:11) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :19:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(573, 574), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:4) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :19:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(6, 573), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:23) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :19:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(575, 576), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:18) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :19:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(5, 573), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:35) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :19:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(577, 578), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :19:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(50, 579), // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :19:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Get(190), // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :20:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(0, 580), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:11) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :20:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(580, 581), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:4) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :20:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(6, 580), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:23) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :20:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(582, 583), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:18) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :20:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(5, 580), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:35) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :20:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(584, 585), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :20:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(51, 586), // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :20:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Get(191), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :21:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(0, 587), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :21:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(587, 588), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :21:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(52, 589), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :21:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Get(192), // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :22:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(0, 590), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:11) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :22:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(590, 591), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:4) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :22:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(6, 590), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:23) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :22:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(592, 593), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:18) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :22:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(5, 590), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:35) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :22:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(594, 595), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :22:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(53, 596), // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :22:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Get(193), // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :23:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(0, 597), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:11) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :23:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(597, 598), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:4) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :23:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(6, 597), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:23) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :23:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(599, 600), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:18) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :23:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(5, 597), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:35) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :23:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(601, 602), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :23:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(54, 603), // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :23:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Get(194), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :24:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(0, 604), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :24:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(604, 605), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :24:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(55, 606), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :24:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Get(196), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :25:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(0, 607), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :25:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(607, 608), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :25:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(56, 609), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :25:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Get(197), // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :26:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(0, 610), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:11) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :26:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(610, 611), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:4) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :26:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(6, 610), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:23) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :26:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(612, 613), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:18) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :26:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(5, 610), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:35) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :26:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(614, 615), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :26:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(57, 616), // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :26:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Get(199), // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :27:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(0, 617), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:11) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :27:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(617, 618), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:4) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :27:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(6, 617), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:23) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :27:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(619, 620), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:18) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :27:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(5, 617), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:35) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :27:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(621, 622), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :27:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(58, 623), // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :27:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Get(200), // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(0, 624), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:11) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(624, 625), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:4) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(6, 624), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:23) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(626, 627), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:18) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(5, 624), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:35) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(628, 629), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(59, 630), // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Get(201), // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :29:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(0, 631), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:11) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :29:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(631, 632), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:4) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :29:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(6, 631), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:23) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :29:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(633, 634), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:18) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :29:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(5, 631), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:35) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :29:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(635, 636), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :29:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(60, 637), // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :29:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Get(202), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :34:30) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(549, 26), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :37:16) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(552, 25), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :38:16) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(639, 640), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :37:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(559, 24), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :39:16) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(641, 642), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :38:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(566, 23), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :40:16) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(643, 644), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :39:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(573, 22), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :41:16) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(645, 646), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :40:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(580, 11), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :42:16) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(647, 648), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :41:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(587, 21), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :43:16) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(649, 650), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :42:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(590, 4), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :44:16) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(651, 652), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :43:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(653, 597), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :44:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(538, 654), // loc(callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :37:14) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(61, 655), // loc(callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :37:14) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(604, 26), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :46:15) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(607, 12), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :47:15) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(656, 657), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :46:24) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(610, 20), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :48:15) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(658, 659), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :47:24) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(617, 19), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :49:15) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(660, 661), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :48:24) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(624, 18), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :50:15) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(662, 663), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :49:24) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(631, 22), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :51:15) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(664, 665), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :50:24) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(666, 638), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :51:24) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(537, 667), // loc(callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :46:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(62, 668), // loc(callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :46:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(590, 10), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :55:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(597, 6), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :55:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(669, 670), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :55:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(671, 604), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :55:42) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(573, 10), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :56:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(580, 6), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :56:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(673, 674), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :56:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(675, 587), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :56:42) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(617, 10), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :57:17) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(624, 6), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :57:30) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(677, 678), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :57:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(679, 631), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :57:39) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(552, 21), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :58:23) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(559, 4), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :58:38) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(681, 682), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :58:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(683, 566), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :58:47) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(549, 17), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :59:20) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(685, 684), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :59:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(607, 4), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :60:20) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(687, 610), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :60:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(549, 16), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :66:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(686, 11), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :66:45) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(689, 690), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :66:36) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(691, 676), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :66:53) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(549, 14), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :66:63) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(473, 672), // loc(callsite(unknown at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :34:79) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Get(231), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :34:15) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(694, 695), // loc(callsite( Reg ( :5:7) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :34:15) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(63, 696), // loc(callsite( Reg ( :5:7) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :34:15) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Get(222), // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :25:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Get(221), // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :26:28) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Get(223), // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :27:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Get(224), // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Get(225), // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Get(226), // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :25:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Get(227), // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Get(228), // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(697, 15), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(64, 705), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(702, 0), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(65, 706), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(66, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(67, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(698, 695), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(68, 707), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(700, 703), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(69, 708), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(701, 704), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(70, 709), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(343, 699), // loc(callsite(unknown at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Get(229), // loc(callsite(unknown at callsite( CycleArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :54:29) at callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :60:19) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(230), // loc(callsite(unknown at callsite( CycleArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :55:29) at callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :60:19) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Sub(711, 0), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(71, 713), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(712, 710), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(72, 714), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :10:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(473, 676), // loc(callsite(unknown at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :34:79) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Get(242), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :34:15) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(715, 716), // loc(callsite( Reg ( :5:7) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :34:15) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(73, 717), // loc(callsite( Reg ( :5:7) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :34:15) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Get(233), // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :25:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Get(232), // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :26:28) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Get(234), // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :27:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Get(235), // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Get(236), // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Get(237), // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :25:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Get(238), // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Get(239), // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(718, 15), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(74, 726), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(723, 0), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(75, 727), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(76, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(77, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(719, 716), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(78, 728), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(721, 724), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(79, 729), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(722, 725), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(80, 730), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(343, 720), // loc(callsite(unknown at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Get(240), // loc(callsite(unknown at callsite( CycleArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :54:29) at callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :60:19) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(241), // loc(callsite(unknown at callsite( CycleArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :55:29) at callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :60:19) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Sub(732, 0), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(81, 734), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(733, 731), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(82, 735), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :11:25) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :29:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(638, 29), // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :62:19) at callsite( OpADD ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :86:20) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :31:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(0, 736), // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :62:19) at callsite( OpADD ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :86:20) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :31:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(84, 688), // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at callsite( OpADD ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :86:20) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :31:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(85, 686), // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at callsite( OpADD ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :86:20) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :31:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Get(112), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(86, 737), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Get(116), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(87, 738), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Get(120), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(88, 739), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Get(124), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(89, 740), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Get(127), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(90, 741), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndCond(83, 356, 91), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Sub(686, 11), // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at callsite( OpSUB ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :91:20) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :32:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(85, 742), // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at callsite( OpSUB ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :91:20) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :32:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(93, 737), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(94, 738), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(95, 739), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(96, 740), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(97, 741), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndCond(92, 359, 98), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Sub(688, 4), // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :96:20) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(84, 743), // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :96:20) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(100, 686), // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :96:20) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Get(243), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Sub(0, 744), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::Mul(744, 745), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::AndEqz(101, 746), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(244), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Sub(0, 747), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::Mul(747, 748), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::AndEqz(102, 749), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(245), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Sub(0, 750), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::Mul(750, 751), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::AndEqz(103, 752), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(246), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Sub(0, 753), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::Mul(753, 754), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::AndEqz(104, 755), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(247), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Sub(0, 756), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::Mul(756, 757), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::AndEqz(105, 758), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(248), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Sub(0, 759), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::Mul(759, 760), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::AndEqz(106, 761), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(249), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Sub(0, 762), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::Mul(762, 763), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::AndEqz(107, 764), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(250), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Sub(0, 765), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::Mul(765, 766), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::AndEqz(108, 767), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(251), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Sub(0, 768), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::Mul(768, 769), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::AndEqz(109, 770), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(252), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Sub(0, 771), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::Mul(771, 772), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::AndEqz(110, 773), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(253), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Sub(0, 774), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::Mul(774, 775), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::AndEqz(111, 776), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(254), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Sub(0, 777), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::Mul(777, 778), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::AndEqz(112, 779), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(255), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Sub(0, 780), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::Mul(780, 781), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::AndEqz(113, 782), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(256), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Sub(0, 783), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::Mul(783, 784), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::AndEqz(114, 785), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(257), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Sub(0, 786), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::Mul(786, 787), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::AndEqz(115, 788), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(258), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Sub(0, 789), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::Mul(789, 790), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::AndEqz(116, 791), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Mul(747, 6), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(750, 4), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(753, 10), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(756, 21), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(759, 11), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(762, 17), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(765, 22), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(768, 18), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(771, 23), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(774, 19), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(777, 24), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(780, 20), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(783, 25), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(786, 12), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(789, 26), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(744, 792), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(807, 793), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(808, 794), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(809, 795), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(810, 796), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(811, 797), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(812, 798), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(813, 799), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(814, 800), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(815, 801), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(816, 802), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(817, 803), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(818, 804), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(819, 805), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(820, 806), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(703, 821), // loc(callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:6) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(117, 822), // loc(callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:6) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Get(259), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Sub(0, 823), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::Mul(823, 824), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::AndEqz(118, 825), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(260), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Sub(0, 826), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::Mul(826, 827), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::AndEqz(119, 828), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(261), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Sub(0, 829), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::Mul(829, 830), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::AndEqz(120, 831), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(262), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Sub(0, 832), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::Mul(832, 833), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::AndEqz(121, 834), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(263), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Sub(0, 835), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::Mul(835, 836), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::AndEqz(122, 837), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(264), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Sub(0, 838), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::Mul(838, 839), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::AndEqz(123, 840), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(265), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Sub(0, 841), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::Mul(841, 842), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::AndEqz(124, 843), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(266), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Sub(0, 844), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::Mul(844, 845), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::AndEqz(125, 846), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(267), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Sub(0, 847), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::Mul(847, 848), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::AndEqz(126, 849), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(268), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Sub(0, 850), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::Mul(850, 851), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::AndEqz(127, 852), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(269), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Sub(0, 853), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::Mul(853, 854), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::AndEqz(128, 855), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(270), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Sub(0, 856), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::Mul(856, 857), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::AndEqz(129, 858), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(271), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Sub(0, 859), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::Mul(859, 860), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::AndEqz(130, 861), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(272), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Sub(0, 862), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::Mul(862, 863), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::AndEqz(131, 864), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(273), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Sub(0, 865), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::Mul(865, 866), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::AndEqz(132, 867), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(274), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Sub(0, 868), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::Mul(868, 869), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::AndEqz(133, 870), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Mul(826, 6), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(829, 4), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(832, 10), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(835, 21), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(838, 11), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(841, 17), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(844, 22), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(847, 18), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(850, 23), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(853, 19), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(856, 24), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(859, 20), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(862, 25), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(865, 12), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(868, 26), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(823, 871), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(886, 872), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(887, 873), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(888, 874), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(889, 875), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(890, 876), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(891, 877), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(892, 878), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(893, 879), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(894, 880), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(895, 881), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(896, 882), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(897, 883), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(898, 884), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(899, 885), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(724, 900), // loc(callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:6) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(134, 901), // loc(callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:6) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Get(275), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Sub(0, 902), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::Mul(902, 903), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::AndEqz(135, 904), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(276), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Sub(0, 905), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::Mul(905, 906), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::AndEqz(136, 907), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(277), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Sub(0, 908), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::Mul(908, 909), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::AndEqz(137, 910), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(278), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Sub(0, 911), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::Mul(911, 912), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::AndEqz(138, 913), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(279), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Sub(0, 914), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::Mul(914, 915), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::AndEqz(139, 916), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(280), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Sub(0, 917), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::Mul(917, 918), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::AndEqz(140, 919), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(281), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Sub(0, 920), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::Mul(920, 921), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::AndEqz(141, 922), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(282), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Sub(0, 923), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::Mul(923, 924), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::AndEqz(142, 925), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(283), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Sub(0, 926), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::Mul(926, 927), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::AndEqz(143, 928), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(284), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Sub(0, 929), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::Mul(929, 930), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::AndEqz(144, 931), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(285), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Sub(0, 932), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::Mul(932, 933), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::AndEqz(145, 934), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(286), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Sub(0, 935), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::Mul(935, 936), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::AndEqz(146, 937), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(287), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Sub(0, 938), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::Mul(938, 939), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::AndEqz(147, 940), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(288), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Sub(0, 941), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::Mul(941, 942), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::AndEqz(148, 943), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(289), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Sub(0, 944), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::Mul(944, 945), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::AndEqz(149, 946), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(290), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Sub(0, 947), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::Mul(947, 948), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::AndEqz(150, 949), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Mul(905, 6), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(908, 4), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(911, 10), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(914, 21), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(917, 11), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(920, 17), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(923, 22), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(926, 18), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(929, 23), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(932, 19), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(935, 24), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(938, 20), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(941, 25), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(944, 12), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(947, 26), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(902, 950), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(965, 951), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(966, 952), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(967, 953), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(968, 954), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(969, 955), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(970, 956), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(971, 957), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(972, 958), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(973, 959), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(974, 960), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(975, 961), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(976, 962), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(977, 963), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(978, 964), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(704, 979), // loc(callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:6) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(151, 980), // loc(callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:6) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Get(291), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Sub(0, 981), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::Mul(981, 982), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::AndEqz(152, 983), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(292), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Sub(0, 984), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::Mul(984, 985), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::AndEqz(153, 986), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(293), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Sub(0, 987), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::Mul(987, 988), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::AndEqz(154, 989), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(294), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Sub(0, 990), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::Mul(990, 991), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::AndEqz(155, 992), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(295), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Sub(0, 993), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::Mul(993, 994), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::AndEqz(156, 995), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(296), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Sub(0, 996), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::Mul(996, 997), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::AndEqz(157, 998), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(297), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Sub(0, 999), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::Mul(999, 1000), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::AndEqz(158, 1001), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(298), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Sub(0, 1002), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::Mul(1002, 1003), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::AndEqz(159, 1004), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(299), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Sub(0, 1005), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::Mul(1005, 1006), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::AndEqz(160, 1007), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(300), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Sub(0, 1008), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::Mul(1008, 1009), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::AndEqz(161, 1010), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(301), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Sub(0, 1011), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::Mul(1011, 1012), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::AndEqz(162, 1013), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(302), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Sub(0, 1014), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::Mul(1014, 1015), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::AndEqz(163, 1016), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(303), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Sub(0, 1017), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::Mul(1017, 1018), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::AndEqz(164, 1019), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(304), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Sub(0, 1020), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::Mul(1020, 1021), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::AndEqz(165, 1022), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(305), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Sub(0, 1023), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::Mul(1023, 1024), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::AndEqz(166, 1025), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(306), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Sub(0, 1026), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::Mul(1026, 1027), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))))) -PolyExtStep::AndEqz(167, 1028), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Mul(984, 6), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(987, 4), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(990, 10), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(993, 21), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(996, 11), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(999, 17), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(1002, 22), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(1005, 18), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(1008, 23), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(1011, 19), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(1014, 24), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(1017, 20), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(1020, 25), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(1023, 12), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(1026, 26), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(981, 1029), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(1044, 1030), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(1045, 1031), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(1046, 1032), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(1047, 1033), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(1048, 1034), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(1049, 1035), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(1050, 1036), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(1051, 1037), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(1052, 1038), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(1053, 1039), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(1054, 1040), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(1055, 1041), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(1056, 1042), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(1057, 1043), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:20) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(725, 1058), // loc(callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:6) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(168, 1059), // loc(callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:6) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(169, 737), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(170, 738), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(171, 739), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(172, 740), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(173, 741), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndCond(99, 362, 174), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Sub(688, 2), // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :101:20) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(84, 1060), // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :101:20) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(176, 686), // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :101:20) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(177, 746), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(178, 749), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(179, 752), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(180, 755), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(181, 758), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(182, 761), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(183, 764), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(184, 767), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(185, 770), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(186, 773), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(187, 776), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(188, 779), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(189, 782), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(190, 785), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(191, 788), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(192, 791), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(193, 822), // loc(callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:6) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(194, 825), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(195, 828), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(196, 831), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(197, 834), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(198, 837), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(199, 840), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(200, 843), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(201, 846), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(202, 849), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(203, 852), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(204, 855), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(205, 858), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(206, 861), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(207, 864), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(208, 867), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(209, 870), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(210, 901), // loc(callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:6) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(211, 904), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(212, 907), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(213, 910), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(214, 913), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(215, 916), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(216, 919), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(217, 922), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(218, 925), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(219, 928), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(220, 931), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(221, 934), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(222, 937), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(223, 940), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(224, 943), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(225, 946), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(226, 949), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(227, 980), // loc(callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:6) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(228, 983), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(229, 986), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(230, 989), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(231, 992), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(232, 995), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(233, 998), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(234, 1001), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(235, 1004), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(236, 1007), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(237, 1010), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(238, 1013), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(239, 1016), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(240, 1019), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(241, 1022), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(242, 1025), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(243, 1028), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(244, 1059), // loc(callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:6) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(245, 737), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(246, 738), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(247, 739), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(248, 740), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(249, 741), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndCond(175, 365, 250), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Sub(688, 1), // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :106:20) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(84, 1061), // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :106:20) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(252, 686), // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :106:20) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(253, 746), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(254, 749), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(255, 752), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(256, 755), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(257, 758), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(258, 761), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(259, 764), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(260, 767), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(261, 770), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(262, 773), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(263, 776), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(264, 779), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(265, 782), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(266, 785), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(267, 788), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(268, 791), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(269, 822), // loc(callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:6) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(270, 825), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(271, 828), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(272, 831), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(273, 834), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(274, 837), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(275, 840), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(276, 843), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(277, 846), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(278, 849), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(279, 852), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(280, 855), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(281, 858), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(282, 861), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(283, 864), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(284, 867), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(285, 870), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(286, 901), // loc(callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:6) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(287, 904), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(288, 907), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(289, 910), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(290, 913), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(291, 916), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(292, 919), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(293, 922), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(294, 925), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(295, 928), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(296, 931), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(297, 934), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(298, 937), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(299, 940), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(300, 943), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(301, 946), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(302, 949), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(303, 980), // loc(callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:6) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(304, 983), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(305, 986), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(306, 989), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(307, 992), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(308, 995), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(309, 998), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(310, 1001), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(311, 1004), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(312, 1007), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(313, 1010), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(314, 1013), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(315, 1016), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(316, 1019), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(317, 1022), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(318, 1025), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(319, 1028), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(320, 1059), // loc(callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:6) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :107:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :35:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(321, 737), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(322, 738), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(323, 739), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(324, 740), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(325, 741), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndCond(251, 368, 326), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Sub(688, 6), // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :111:20) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(703, 30), // loc(callsite(unknown at callsite( SubU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :33:19) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:31) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(1063, 724), // loc(callsite(unknown at callsite( SubU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :33:31) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:31) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(704, 14), // loc(callsite(unknown at callsite( SubU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :33:44) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:31) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(1065, 725), // loc(callsite(unknown at callsite( SubU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :33:55) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:31) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(84, 1062), // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :111:20) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(328, 686), // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :111:20) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Get(114), // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(737, 0), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(329, 1068), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(330, 746), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :45:28) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(744, 30), // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:12) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1069, 1067), // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:23) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(1064, 1070), // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:10) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(331, 1071), // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:10) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(1066, 744), // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :48:14) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Get(118), // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(738, 0), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(332, 1074), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(333, 749), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :51:29) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(747, 30), // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:11) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1075, 1073), // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:23) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(1072, 1076), // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:9) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(334, 1077), // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:9) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(335, 752), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :125:24) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :134:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Get(122), // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :126:34) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :134:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(739, 0), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :126:34) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :134:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(336, 1079), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :126:34) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :134:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(750, 26), // loc(callsite(unknown at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :127:13) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :134:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1078, 36), // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :127:29) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :134:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(1080, 1081), // loc(callsite(unknown at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :127:22) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :134:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(704, 1082), // loc(callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :127:11) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :134:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(337, 1083), // loc(callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :127:11) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :134:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(338, 755), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :125:24) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :135:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Get(125), // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :126:34) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :135:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(740, 0), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :126:34) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :135:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(339, 1085), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :126:34) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :135:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(753, 26), // loc(callsite(unknown at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :127:13) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :135:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1084, 36), // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :127:29) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :135:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(1086, 1087), // loc(callsite(unknown at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :127:22) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :135:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(725, 1088), // loc(callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :127:11) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :135:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(340, 1089), // loc(callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :127:11) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :135:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(341, 758), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :125:24) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :136:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Get(129), // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :126:34) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :136:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(741, 0), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :126:34) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :136:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(342, 1091), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :126:34) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :136:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(756, 26), // loc(callsite(unknown at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :127:13) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :136:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1090, 36), // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :127:29) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :136:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(1092, 1093), // loc(callsite(unknown at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :127:22) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :136:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(1073, 1094), // loc(callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :127:11) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :136:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(343, 1095), // loc(callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :127:11) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :136:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(750, 754), // loc(callsite(unknown at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :138:20) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(1096, 757), // loc(callsite(unknown at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :138:32) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(751, 753), // loc(callsite(unknown at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :138:54) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(1098, 756), // loc(callsite(unknown at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :138:58) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(1097, 1099), // loc(callsite(unknown at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :138:43) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(1100, 759), // loc(callsite( Reg ( :5:7) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :138:19) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(344, 1101), // loc(callsite( Reg ( :5:7) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :138:19) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(759, 756), // loc(callsite(unknown at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :140:31) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(759, 6), // loc(callsite(unknown at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :140:47) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(1103, 756), // loc(callsite(unknown at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :140:51) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(1102, 1104), // loc(callsite(unknown at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :140:42) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(1105, 762), // loc(callsite( Reg ( :5:7) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :140:30) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(345, 1106), // loc(callsite( Reg ( :5:7) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :140:30) at callsite( OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :112:22) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :36:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndCond(327, 371, 346), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Sub(688, 5), // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at callsite( OpSLTU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :117:20) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :37:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(84, 1107), // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at callsite( OpSLTU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :117:20) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :37:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(348, 686), // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at callsite( OpSLTU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :117:20) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :37:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(349, 1068), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( CmpLessThanUnsigned ( zirgen/circuit/rv32im/v2/dsl/u32.zir :119:24) at callsite( OpSLTU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :118:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :37:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(350, 746), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :45:28) at callsite( CmpLessThanUnsigned ( zirgen/circuit/rv32im/v2/dsl/u32.zir :119:24) at callsite( OpSLTU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :118:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :37:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(351, 1071), // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:10) at callsite( CmpLessThanUnsigned ( zirgen/circuit/rv32im/v2/dsl/u32.zir :119:24) at callsite( OpSLTU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :118:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :37:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(352, 1074), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( CmpLessThanUnsigned ( zirgen/circuit/rv32im/v2/dsl/u32.zir :119:24) at callsite( OpSLTU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :118:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :37:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(353, 749), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :51:29) at callsite( CmpLessThanUnsigned ( zirgen/circuit/rv32im/v2/dsl/u32.zir :119:24) at callsite( OpSLTU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :118:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :37:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(354, 1077), // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:9) at callsite( CmpLessThanUnsigned ( zirgen/circuit/rv32im/v2/dsl/u32.zir :119:24) at callsite( OpSLTU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :118:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :37:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(355, 739), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(356, 740), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(357, 741), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndCond(347, 374, 358), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Sub(638, 37), // loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :57:19) at callsite( OpADDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :123:18) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :38:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(0, 1108), // loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :57:19) at callsite( OpADDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :123:18) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :38:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(360, 688), // loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at callsite( OpADDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :123:18) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :38:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(361, 737), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(362, 738), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(363, 739), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(364, 740), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(365, 741), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndCond(359, 377, 366), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(703, 724), // loc(callsite(unknown at callsite( AddU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :27:21) at callsite( OpADD ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :87:26) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :31:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(1109, 356), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Mul(1064, 359), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Get(243), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(244), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(245), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(246), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(247), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(248), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(249), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(250), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(251), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(252), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(253), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(254), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(255), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(256), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(257), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(258), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(259), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(260), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(261), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(262), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(263), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(264), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(265), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(266), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(267), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(268), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(269), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(270), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(271), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(272), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(273), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(274), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Mul(1112, 1128), // loc(callsite(unknown at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :148:38) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(1113, 1129), // loc(callsite(unknown at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :148:38) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(1114, 1130), // loc(callsite(unknown at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :148:38) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(1115, 1131), // loc(callsite(unknown at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :148:38) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(1116, 1132), // loc(callsite(unknown at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :148:38) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(1117, 1133), // loc(callsite(unknown at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :148:38) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(1118, 1134), // loc(callsite(unknown at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :148:38) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(1119, 1135), // loc(callsite(unknown at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :148:38) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(1120, 1136), // loc(callsite(unknown at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :148:38) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(1121, 1137), // loc(callsite(unknown at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :148:38) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(1122, 1138), // loc(callsite(unknown at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :148:38) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(1123, 1139), // loc(callsite(unknown at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :148:38) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(1124, 1140), // loc(callsite(unknown at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :148:38) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(1125, 1141), // loc(callsite(unknown at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :148:38) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(1126, 1142), // loc(callsite(unknown at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :148:38) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(1127, 1143), // loc(callsite(unknown at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :148:38) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(1145, 6), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(1146, 4), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(1147, 10), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(1148, 21), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(1149, 11), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(1150, 17), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(1151, 22), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(1152, 18), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(1153, 23), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(1154, 19), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(1155, 24), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(1156, 20), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(1157, 25), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(1158, 12), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(1159, 26), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(1144, 1160), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(1175, 1161), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(1176, 1162), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(1177, 1163), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(1178, 1164), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(1179, 1165), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(1180, 1166), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(1181, 1167), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(1182, 1168), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(1183, 1169), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(1184, 1170), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(1185, 1171), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(1186, 1172), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(1187, 1173), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(1188, 1174), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(1189, 6), // loc(callsite(unknown at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :165:27) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(1109, 1190), // loc(callsite(unknown at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :165:21) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(1191, 362), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Sub(1109, 1189), // loc(callsite(unknown at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :160:21) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(1193, 365), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Mul(1189, 368), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Mul(1118, 371), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Sub(0, 1113), // loc(callsite(unknown at callsite( CmpLessThanUnsigned ( zirgen/circuit/rv32im/v2/dsl/u32.zir :120:27) at callsite( OpSLTU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :118:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :37:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(1197, 374), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(703, 692), // loc(callsite(unknown at callsite( AddU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :27:21) at callsite( OpADDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :124:26) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :38:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(1199, 377), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(1110, 1111), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(1201, 1192), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(1202, 1194), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(1203, 1195), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(1204, 1196), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(1205, 1198), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(1206, 1200), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(704, 725), // loc(callsite(unknown at callsite( AddU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :27:36) at callsite( OpADD ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :87:26) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :31:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(1208, 356), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Mul(1066, 359), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Get(275), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(276), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(277), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(278), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(279), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(280), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(281), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(282), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(283), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(284), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(285), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(286), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(287), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(288), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(289), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(290), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(291), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(292), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(293), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(294), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(295), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(296), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(297), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(298), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(299), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(300), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(301), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(302), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(303), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(304), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(305), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(306), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Mul(1211, 1227), // loc(callsite(unknown at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :148:38) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(1212, 1228), // loc(callsite(unknown at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :148:38) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(1213, 1229), // loc(callsite(unknown at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :148:38) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(1214, 1230), // loc(callsite(unknown at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :148:38) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(1215, 1231), // loc(callsite(unknown at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :148:38) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(1216, 1232), // loc(callsite(unknown at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :148:38) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(1217, 1233), // loc(callsite(unknown at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :148:38) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(1218, 1234), // loc(callsite(unknown at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :148:38) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(1219, 1235), // loc(callsite(unknown at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :148:38) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(1220, 1236), // loc(callsite(unknown at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :148:38) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(1221, 1237), // loc(callsite(unknown at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :148:38) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(1222, 1238), // loc(callsite(unknown at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :148:38) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(1223, 1239), // loc(callsite(unknown at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :148:38) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(1224, 1240), // loc(callsite(unknown at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :148:38) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(1225, 1241), // loc(callsite(unknown at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :148:38) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(1226, 1242), // loc(callsite(unknown at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :148:38) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(1244, 6), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(1245, 4), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(1246, 10), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(1247, 21), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(1248, 11), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(1249, 17), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(1250, 22), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(1251, 18), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(1252, 23), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(1253, 19), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(1254, 24), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(1255, 20), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(1256, 25), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(1257, 12), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(1258, 26), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(1243, 1259), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(1274, 1260), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(1275, 1261), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(1276, 1262), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(1277, 1263), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(1278, 1264), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(1279, 1265), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(1280, 1266), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(1281, 1267), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(1282, 1268), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(1283, 1269), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(1284, 1270), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(1285, 1271), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(1286, 1272), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(1287, 1273), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :149:21) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(1288, 6), // loc(callsite(unknown at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :165:59) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(1208, 1289), // loc(callsite(unknown at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :165:52) at callsite( OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :97:37) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(1290, 362), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Sub(1208, 1288), // loc(callsite(unknown at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :160:50) at callsite( OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :102:36) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :34:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(1292, 365), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Mul(1288, 368), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(704, 693), // loc(callsite(unknown at callsite( AddU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :27:36) at callsite( OpADDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :124:26) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :38:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(1295, 377), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(1209, 1210), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(1297, 1291), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(1298, 1293), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(1299, 1294), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(1300, 1296), // loc(callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :30:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Get(131), // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :28:29) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Get(133), // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(1302, 0), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(367, 1304), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Get(135), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :45:28) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(0, 1305), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :45:28) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(1305, 1306), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :45:28) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(368, 1307), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :45:28) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1305, 30), // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:12) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(1308, 1303), // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:23) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(1207, 1309), // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:10) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(369, 1310), // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:10) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(1301, 1305), // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :48:14) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Get(137), // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :28:29) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Get(139), // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(1312, 0), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(370, 1314), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Get(141), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :51:29) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(0, 1315), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :51:29) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(1315, 1316), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :51:29) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(371, 1317), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :51:29) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1315, 30), // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:11) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(1318, 1313), // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:23) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(1311, 1319), // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:9) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(372, 1320), // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:9) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Get(143), // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :28:29) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Get(145), // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(1321, 0), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(373, 1323), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Get(147), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :45:28) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(0, 1324), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :45:28) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(1324, 1325), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :45:28) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(374, 1326), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :45:28) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1324, 30), // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:12) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(1327, 1322), // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:23) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(489, 1328), // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:10) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(375, 1329), // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:10) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(504, 1324), // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :48:14) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Get(149), // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :28:29) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Get(151), // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(1331, 0), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(376, 1333), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Get(153), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :51:29) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(0, 1334), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :51:29) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(1334, 1335), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :51:29) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(377, 1336), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :51:29) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1334, 30), // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:11) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(1337, 1332), // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:23) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(1330, 1338), // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:9) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(378, 1339), // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:9) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Get(155), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :8:23) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Get(157), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :11:20) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(0, 1340), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(1340, 1342), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(379, 1343), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(680, 1341), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:4) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(1344, 1342), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(380, 1345), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(1340, 680), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:4) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(381, 1346), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:17) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(1340, 1341), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:4) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(382, 1347), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:17) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(1342, 386), // loc(callsite(unknown at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :40:26) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(1348, 680), // loc(callsite(unknown at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :41:11) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(0, 1348), // loc(callsite(unknown at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :42:90) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(1350, 17), // loc(callsite(unknown at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :42:102) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(473, 1351), // loc(callsite(unknown at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :42:85) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(1352, 1349), // loc(callsite(unknown at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :42:106) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Get(159), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :42:21) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(1353, 1354), // loc(callsite( Reg ( :5:7) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :42:21) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(383, 1355), // loc(callsite( Reg ( :5:7) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :42:21) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Get(163), // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :25:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Get(161), // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :26:28) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Get(165), // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :27:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Get(171), // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :25:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Get(173), // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Get(175), // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(1356, 15), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(384, 1362), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(1359, 0), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(385, 1363), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(386, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(387, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(1357, 1354), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(388, 1364), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(343, 1358), // loc(callsite(unknown at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:22) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Get(177), // loc(callsite(unknown at callsite( CycleArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :54:29) at callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :60:19) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(179), // loc(callsite(unknown at callsite( CycleArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :55:29) at callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :60:19) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Sub(1366, 0), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(389, 1368), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(1367, 1365), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(390, 1369), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(1360, 1303), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(391, 1370), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(1361, 1313), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(392, 1371), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndCond(24, 401, 393), // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Mul(631, 24), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :68:45) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :44:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(689, 1372), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :68:36) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :44:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(684, 11), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :68:61) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :44:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1373, 1374), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :68:53) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :44:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1375, 677), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :68:72) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :44:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1376, 678), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :68:86) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :44:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(360, 743), // loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :128:18) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(395, 746), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(396, 749), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(397, 752), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(398, 755), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(399, 758), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(400, 761), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(401, 764), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(402, 767), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(403, 770), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(404, 773), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(405, 776), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(406, 779), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(407, 782), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(408, 785), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(409, 788), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(410, 791), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(411, 822), // loc(callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:6) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(412, 825), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(413, 828), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(414, 831), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(415, 834), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(416, 837), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(417, 840), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(418, 843), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(419, 846), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(420, 849), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(421, 852), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(422, 855), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(423, 858), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(424, 861), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(425, 864), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(426, 867), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(427, 870), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Sub(692, 900), // loc(callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:6) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(428, 1378), // loc(callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:6) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(429, 904), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(430, 907), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(431, 910), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(432, 913), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(433, 916), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(434, 919), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(435, 922), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(436, 925), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(437, 928), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(438, 931), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(439, 934), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(440, 937), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(441, 940), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(442, 943), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(443, 946), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(444, 949), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(445, 980), // loc(callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:6) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(446, 983), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(447, 986), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(448, 989), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(449, 992), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(450, 995), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(451, 998), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(452, 1001), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(453, 1004), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(454, 1007), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(455, 1010), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(456, 1013), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(457, 1016), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(458, 1019), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(459, 1022), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(460, 1025), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(461, 1028), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Sub(693, 1058), // loc(callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:6) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(462, 1379), // loc(callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:6) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :164:24) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(463, 737), // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(464, 738), // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(465, 739), // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(466, 740), // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(467, 741), // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndCond(83, 356, 468), // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(360, 1060), // loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :133:18) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(470, 746), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(471, 749), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(472, 752), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(473, 755), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(474, 758), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(475, 761), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(476, 764), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(477, 767), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(478, 770), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(479, 773), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(480, 776), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(481, 779), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(482, 782), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(483, 785), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(484, 788), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(485, 791), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(486, 822), // loc(callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:6) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(487, 825), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(488, 828), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(489, 831), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(490, 834), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(491, 837), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(492, 840), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(493, 843), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(494, 846), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(495, 849), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(496, 852), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(497, 855), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(498, 858), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(499, 861), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(500, 864), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(501, 867), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(502, 870), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(503, 1378), // loc(callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:6) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(504, 904), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(505, 907), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(506, 910), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(507, 913), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(508, 916), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(509, 919), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(510, 922), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(511, 925), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(512, 928), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(513, 931), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(514, 934), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(515, 937), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(516, 940), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(517, 943), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(518, 946), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(519, 949), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(520, 980), // loc(callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:6) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(521, 983), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(522, 986), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(523, 989), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(524, 992), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(525, 995), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(526, 998), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(527, 1001), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(528, 1004), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(529, 1007), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(530, 1010), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(531, 1013), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(532, 1016), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(533, 1019), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(534, 1022), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(535, 1025), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(536, 1028), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(537, 1379), // loc(callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:6) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :159:24) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(538, 737), // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(539, 738), // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(540, 739), // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(541, 740), // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(542, 741), // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndCond(469, 359, 543), // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(360, 1061), // loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :138:18) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(545, 746), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(546, 749), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(547, 752), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(548, 755), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(549, 758), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(550, 761), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(551, 764), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(552, 767), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(553, 770), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(554, 773), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(555, 776), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(556, 779), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(557, 782), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(558, 785), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(559, 788), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(560, 791), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(561, 822), // loc(callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:6) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(562, 825), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(563, 828), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(564, 831), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(565, 834), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(566, 837), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(567, 840), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(568, 843), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(569, 846), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(570, 849), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(571, 852), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(572, 855), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(573, 858), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(574, 861), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(575, 864), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(576, 867), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(577, 870), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(578, 1378), // loc(callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:6) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:24) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(579, 904), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(580, 907), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(581, 910), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(582, 913), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(583, 916), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(584, 919), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(585, 922), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(586, 925), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(587, 928), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(588, 931), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(589, 934), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(590, 937), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(591, 940), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(592, 943), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(593, 946), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(594, 949), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :144:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(595, 980), // loc(callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :145:6) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(596, 983), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(597, 986), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(598, 989), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(599, 992), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(600, 995), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(601, 998), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(602, 1001), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(603, 1004), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(604, 1007), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(605, 1010), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(606, 1013), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(607, 1016), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(608, 1019), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(609, 1022), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(610, 1025), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(611, 1028), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :146:24) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(612, 1379), // loc(callsite( BitwiseAndU16 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :147:6) at callsite( BitwiseAnd ( zirgen/circuit/rv32im/v2/dsl/u32.zir :155:53) at callsite( OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :139:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :48:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(613, 737), // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(614, 738), // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(615, 739), // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(616, 740), // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(617, 741), // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndCond(544, 362, 618), // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Sub(1063, 692), // loc(callsite(unknown at callsite( SubU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :33:31) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:31) at callsite( OpSLTI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :144:22) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :49:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(1065, 693), // loc(callsite(unknown at callsite( SubU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :33:55) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:31) at callsite( OpSLTI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :144:22) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :49:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(360, 1062), // loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at callsite( OpSLTI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :143:18) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :49:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(620, 1068), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpSLTI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :144:22) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :49:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(621, 746), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :45:28) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpSLTI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :144:22) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :49:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(1380, 1070), // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:10) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpSLTI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :144:22) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :49:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(622, 1382), // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:10) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpSLTI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :144:22) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :49:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(1381, 744), // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :48:14) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpSLTI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :144:22) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :49:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(623, 1074), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpSLTI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :144:22) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :49:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(624, 749), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :51:29) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpSLTI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :144:22) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :49:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(1383, 1076), // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:9) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpSLTI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :144:22) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :49:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(625, 1384), // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:9) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpSLTI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :144:22) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :49:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(626, 752), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :125:24) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :134:20) at callsite( OpSLTI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :144:22) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :49:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(627, 1079), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :126:34) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :134:20) at callsite( OpSLTI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :144:22) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :49:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(628, 1083), // loc(callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :127:11) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :134:20) at callsite( OpSLTI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :144:22) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :49:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(629, 755), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :125:24) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :135:20) at callsite( OpSLTI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :144:22) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :49:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(630, 1085), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :126:34) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :135:20) at callsite( OpSLTI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :144:22) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :49:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(693, 1088), // loc(callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :127:11) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :135:20) at callsite( OpSLTI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :144:22) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :49:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(631, 1385), // loc(callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :127:11) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :135:20) at callsite( OpSLTI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :144:22) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :49:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(632, 758), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :125:24) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :136:20) at callsite( OpSLTI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :144:22) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :49:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(633, 1091), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :126:34) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :136:20) at callsite( OpSLTI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :144:22) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :49:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(634, 1095), // loc(callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :127:11) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :136:20) at callsite( OpSLTI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :144:22) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :49:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(635, 1101), // loc(callsite( Reg ( :5:7) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :138:19) at callsite( OpSLTI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :144:22) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :49:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(636, 1106), // loc(callsite( Reg ( :5:7) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :140:30) at callsite( OpSLTI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :144:22) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :49:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndCond(619, 365, 637), // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(360, 1107), // loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at callsite( OpSLTIU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :149:18) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :50:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(639, 1068), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( CmpLessThanUnsigned ( zirgen/circuit/rv32im/v2/dsl/u32.zir :119:24) at callsite( OpSLTIU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :150:30) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :50:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(640, 746), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :45:28) at callsite( CmpLessThanUnsigned ( zirgen/circuit/rv32im/v2/dsl/u32.zir :119:24) at callsite( OpSLTIU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :150:30) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :50:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(641, 1382), // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:10) at callsite( CmpLessThanUnsigned ( zirgen/circuit/rv32im/v2/dsl/u32.zir :119:24) at callsite( OpSLTIU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :150:30) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :50:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(642, 1074), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( CmpLessThanUnsigned ( zirgen/circuit/rv32im/v2/dsl/u32.zir :119:24) at callsite( OpSLTIU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :150:30) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :50:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(643, 749), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :51:29) at callsite( CmpLessThanUnsigned ( zirgen/circuit/rv32im/v2/dsl/u32.zir :119:24) at callsite( OpSLTIU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :150:30) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :50:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(644, 1384), // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:9) at callsite( CmpLessThanUnsigned ( zirgen/circuit/rv32im/v2/dsl/u32.zir :119:24) at callsite( OpSLTIU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :150:30) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :50:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(645, 739), // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(646, 740), // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(647, 741), // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndCond(638, 368, 648), // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Sub(638, 38), // loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :57:19) at callsite( OpBEQ ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :155:18) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :51:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(703, 724), // loc(callsite(unknown at callsite( CmpEqual ( zirgen/circuit/rv32im/v2/dsl/u32.zir :112:25) at callsite( OpBEQ ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :156:19) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :51:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(704, 725), // loc(callsite(unknown at callsite( CmpEqual ( zirgen/circuit/rv32im/v2/dsl/u32.zir :113:26) at callsite( OpBEQ ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :156:19) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :51:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(0, 1386), // loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :57:19) at callsite( OpBEQ ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :155:18) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :51:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(650, 688), // loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at callsite( OpBEQ ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :155:18) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :51:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(651, 746), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( CmpEqual ( zirgen/circuit/rv32im/v2/dsl/u32.zir :112:22) at callsite( OpBEQ ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :156:19) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :51:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1387, 747), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:4) at callsite( CmpEqual ( zirgen/circuit/rv32im/v2/dsl/u32.zir :112:22) at callsite( OpBEQ ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :156:19) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :51:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(1389, 745), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( CmpEqual ( zirgen/circuit/rv32im/v2/dsl/u32.zir :112:22) at callsite( OpBEQ ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :156:19) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :51:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(652, 1390), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( CmpEqual ( zirgen/circuit/rv32im/v2/dsl/u32.zir :112:22) at callsite( OpBEQ ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :156:19) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :51:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(744, 1387), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:4) at callsite( CmpEqual ( zirgen/circuit/rv32im/v2/dsl/u32.zir :112:22) at callsite( OpBEQ ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :156:19) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :51:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(653, 1391), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:17) at callsite( CmpEqual ( zirgen/circuit/rv32im/v2/dsl/u32.zir :112:22) at callsite( OpBEQ ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :156:19) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :51:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(744, 747), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:4) at callsite( CmpEqual ( zirgen/circuit/rv32im/v2/dsl/u32.zir :112:22) at callsite( OpBEQ ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :156:19) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :51:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(654, 1392), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:17) at callsite( CmpEqual ( zirgen/circuit/rv32im/v2/dsl/u32.zir :112:22) at callsite( OpBEQ ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :156:19) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :51:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(655, 752), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( CmpEqual ( zirgen/circuit/rv32im/v2/dsl/u32.zir :113:23) at callsite( OpBEQ ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :156:19) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :51:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1388, 753), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:4) at callsite( CmpEqual ( zirgen/circuit/rv32im/v2/dsl/u32.zir :113:23) at callsite( OpBEQ ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :156:19) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :51:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(1393, 751), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( CmpEqual ( zirgen/circuit/rv32im/v2/dsl/u32.zir :113:23) at callsite( OpBEQ ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :156:19) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :51:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(656, 1394), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( CmpEqual ( zirgen/circuit/rv32im/v2/dsl/u32.zir :113:23) at callsite( OpBEQ ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :156:19) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :51:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(750, 1388), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:4) at callsite( CmpEqual ( zirgen/circuit/rv32im/v2/dsl/u32.zir :113:23) at callsite( OpBEQ ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :156:19) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :51:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(657, 1395), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:17) at callsite( CmpEqual ( zirgen/circuit/rv32im/v2/dsl/u32.zir :113:23) at callsite( OpBEQ ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :156:19) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :51:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(750, 753), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:4) at callsite( CmpEqual ( zirgen/circuit/rv32im/v2/dsl/u32.zir :113:23) at callsite( OpBEQ ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :156:19) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :51:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(658, 1396), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:17) at callsite( CmpEqual ( zirgen/circuit/rv32im/v2/dsl/u32.zir :113:23) at callsite( OpBEQ ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :156:19) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :51:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(744, 750), // loc(callsite(unknown at callsite( CmpEqual ( zirgen/circuit/rv32im/v2/dsl/u32.zir :114:27) at callsite( OpBEQ ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :156:19) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :51:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(1397, 756), // loc(callsite( Reg ( :5:7) at callsite( CmpEqual ( zirgen/circuit/rv32im/v2/dsl/u32.zir :114:26) at callsite( OpBEQ ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :156:19) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :51:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(659, 1398), // loc(callsite( Reg ( :5:7) at callsite( CmpEqual ( zirgen/circuit/rv32im/v2/dsl/u32.zir :114:26) at callsite( OpBEQ ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :156:19) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :51:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(660, 737), // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(661, 738), // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(662, 739), // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(663, 740), // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(664, 741), // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndCond(649, 371, 665), // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Sub(688, 0), // loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at callsite( OpBNE ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :161:18) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :52:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(650, 1399), // loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at callsite( OpBNE ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :161:18) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :52:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(667, 746), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( CmpEqual ( zirgen/circuit/rv32im/v2/dsl/u32.zir :112:22) at callsite( OpBNE ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :162:19) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :52:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(668, 1390), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( CmpEqual ( zirgen/circuit/rv32im/v2/dsl/u32.zir :112:22) at callsite( OpBNE ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :162:19) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :52:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(669, 1391), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:17) at callsite( CmpEqual ( zirgen/circuit/rv32im/v2/dsl/u32.zir :112:22) at callsite( OpBNE ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :162:19) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :52:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(670, 1392), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:17) at callsite( CmpEqual ( zirgen/circuit/rv32im/v2/dsl/u32.zir :112:22) at callsite( OpBNE ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :162:19) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :52:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(671, 752), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( CmpEqual ( zirgen/circuit/rv32im/v2/dsl/u32.zir :113:23) at callsite( OpBNE ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :162:19) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :52:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(672, 1394), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( CmpEqual ( zirgen/circuit/rv32im/v2/dsl/u32.zir :113:23) at callsite( OpBNE ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :162:19) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :52:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(673, 1395), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:17) at callsite( CmpEqual ( zirgen/circuit/rv32im/v2/dsl/u32.zir :113:23) at callsite( OpBNE ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :162:19) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :52:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(674, 1396), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:17) at callsite( CmpEqual ( zirgen/circuit/rv32im/v2/dsl/u32.zir :113:23) at callsite( OpBNE ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :162:19) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :52:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(675, 1398), // loc(callsite( Reg ( :5:7) at callsite( CmpEqual ( zirgen/circuit/rv32im/v2/dsl/u32.zir :114:26) at callsite( OpBNE ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :162:19) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :52:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(676, 737), // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(677, 738), // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(678, 739), // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(679, 740), // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(680, 741), // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndCond(666, 374, 681), // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(650, 743), // loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at callsite( OpBLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :167:18) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :53:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(683, 1068), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpBLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :168:22) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :53:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(684, 746), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :45:28) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpBLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :168:22) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :53:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(685, 1071), // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:10) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpBLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :168:22) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :53:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(686, 1074), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpBLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :168:22) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :53:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(687, 749), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :51:29) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpBLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :168:22) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :53:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(688, 1077), // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:9) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpBLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :168:22) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :53:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(689, 752), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :125:24) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :134:20) at callsite( OpBLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :168:22) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :53:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(690, 1079), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :126:34) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :134:20) at callsite( OpBLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :168:22) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :53:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(691, 1083), // loc(callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :127:11) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :134:20) at callsite( OpBLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :168:22) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :53:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(692, 755), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :125:24) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :135:20) at callsite( OpBLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :168:22) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :53:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(693, 1085), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :126:34) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :135:20) at callsite( OpBLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :168:22) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :53:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(694, 1089), // loc(callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :127:11) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :135:20) at callsite( OpBLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :168:22) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :53:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(695, 758), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :125:24) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :136:20) at callsite( OpBLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :168:22) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :53:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(696, 1091), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :126:34) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :136:20) at callsite( OpBLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :168:22) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :53:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(697, 1095), // loc(callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :127:11) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :136:20) at callsite( OpBLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :168:22) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :53:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(698, 1101), // loc(callsite( Reg ( :5:7) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :138:19) at callsite( OpBLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :168:22) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :53:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(699, 1106), // loc(callsite( Reg ( :5:7) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :140:30) at callsite( OpBLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :168:22) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :53:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndCond(682, 377, 700), // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Sub(1199, 1190), // loc(callsite(unknown at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :165:21) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(1400, 356), // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Sub(1199, 1189), // loc(callsite(unknown at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :160:21) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(1402, 359), // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Mul(1189, 362), // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Mul(1118, 365), // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Mul(1197, 368), // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(1401, 1403), // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(1407, 1404), // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(1408, 1405), // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(1409, 1406), // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Sub(1295, 1289), // loc(callsite(unknown at callsite( BitwiseXor ( zirgen/circuit/rv32im/v2/dsl/u32.zir :165:52) at callsite( OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :129:37) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :46:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(1411, 356), // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Sub(1295, 1288), // loc(callsite(unknown at callsite( BitwiseOr ( zirgen/circuit/rv32im/v2/dsl/u32.zir :160:50) at callsite( OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :134:36) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :47:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(1413, 359), // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Mul(1288, 362), // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(1412, 1414), // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(1416, 1415), // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(346, 1377), // loc(callsite(unknown at callsite( AddU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :27:21) at callsite( CmpOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :80:12) at callsite( OpBEQ ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :157:9) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :51:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1116, 1418), // loc(callsite(unknown at callsite( CondDenormed ( zirgen/circuit/rv32im/v2/dsl/u32.zir :101:8) at callsite( CmpOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :79:26) at callsite( OpBEQ ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :157:9) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :51:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(0, 1116), // loc(callsite(unknown at callsite( CondDenormed ( zirgen/circuit/rv32im/v2/dsl/u32.zir :101:24) at callsite( CmpOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :79:26) at callsite( OpBEQ ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :157:9) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :51:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1420, 474), // loc(callsite(unknown at callsite( CondDenormed ( zirgen/circuit/rv32im/v2/dsl/u32.zir :101:32) at callsite( CmpOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :79:26) at callsite( OpBEQ ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :157:9) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :51:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1419, 1421), // loc(callsite(unknown at callsite( CondDenormed ( zirgen/circuit/rv32im/v2/dsl/u32.zir :101:17) at callsite( CmpOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :79:26) at callsite( OpBEQ ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :157:9) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :51:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1422, 371), // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Mul(1420, 1418), // loc(callsite(unknown at callsite( CondDenormed ( zirgen/circuit/rv32im/v2/dsl/u32.zir :101:8) at callsite( CmpOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :79:26) at callsite( OpBNE ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :163:9) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :52:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(0, 1420), // loc(callsite(unknown at callsite( CondDenormed ( zirgen/circuit/rv32im/v2/dsl/u32.zir :101:24) at callsite( CmpOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :79:26) at callsite( OpBNE ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :163:9) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :52:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1425, 474), // loc(callsite(unknown at callsite( CondDenormed ( zirgen/circuit/rv32im/v2/dsl/u32.zir :101:32) at callsite( CmpOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :79:26) at callsite( OpBNE ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :163:9) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :52:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1424, 1426), // loc(callsite(unknown at callsite( CondDenormed ( zirgen/circuit/rv32im/v2/dsl/u32.zir :101:17) at callsite( CmpOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :79:26) at callsite( OpBNE ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :163:9) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :52:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1427, 374), // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Mul(1118, 1418), // loc(callsite(unknown at callsite( CondDenormed ( zirgen/circuit/rv32im/v2/dsl/u32.zir :101:8) at callsite( CmpOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :79:26) at callsite( OpBLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :169:9) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :53:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(0, 1118), // loc(callsite(unknown at callsite( CondDenormed ( zirgen/circuit/rv32im/v2/dsl/u32.zir :101:24) at callsite( CmpOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :79:26) at callsite( OpBLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :169:9) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :53:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1430, 474), // loc(callsite(unknown at callsite( CondDenormed ( zirgen/circuit/rv32im/v2/dsl/u32.zir :101:32) at callsite( CmpOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :79:26) at callsite( OpBLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :169:9) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :53:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1429, 1431), // loc(callsite(unknown at callsite( CondDenormed ( zirgen/circuit/rv32im/v2/dsl/u32.zir :101:17) at callsite( CmpOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :79:26) at callsite( OpBLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :169:9) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :53:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1432, 377), // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(486, 1423), // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(1434, 1428), // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(1435, 1433), // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(348, 693), // loc(callsite(unknown at callsite( AddU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :27:36) at callsite( CmpOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :80:12) at callsite( OpBEQ ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :157:9) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :51:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1116, 1437), // loc(callsite(unknown at callsite( CondDenormed ( zirgen/circuit/rv32im/v2/dsl/u32.zir :102:8) at callsite( CmpOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :79:26) at callsite( OpBEQ ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :157:9) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :51:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1420, 348), // loc(callsite(unknown at callsite( CondDenormed ( zirgen/circuit/rv32im/v2/dsl/u32.zir :102:33) at callsite( CmpOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :79:26) at callsite( OpBEQ ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :157:9) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :51:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1438, 1439), // loc(callsite(unknown at callsite( CondDenormed ( zirgen/circuit/rv32im/v2/dsl/u32.zir :102:17) at callsite( CmpOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :79:26) at callsite( OpBEQ ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :157:9) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :51:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1440, 371), // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Mul(1420, 1437), // loc(callsite(unknown at callsite( CondDenormed ( zirgen/circuit/rv32im/v2/dsl/u32.zir :102:8) at callsite( CmpOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :79:26) at callsite( OpBNE ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :163:9) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :52:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1425, 348), // loc(callsite(unknown at callsite( CondDenormed ( zirgen/circuit/rv32im/v2/dsl/u32.zir :102:33) at callsite( CmpOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :79:26) at callsite( OpBNE ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :163:9) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :52:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1442, 1443), // loc(callsite(unknown at callsite( CondDenormed ( zirgen/circuit/rv32im/v2/dsl/u32.zir :102:17) at callsite( CmpOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :79:26) at callsite( OpBNE ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :163:9) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :52:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1444, 374), // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Mul(1118, 1437), // loc(callsite(unknown at callsite( CondDenormed ( zirgen/circuit/rv32im/v2/dsl/u32.zir :102:8) at callsite( CmpOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :79:26) at callsite( OpBLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :169:9) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :53:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1430, 348), // loc(callsite(unknown at callsite( CondDenormed ( zirgen/circuit/rv32im/v2/dsl/u32.zir :102:33) at callsite( CmpOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :79:26) at callsite( OpBLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :169:9) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :53:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1446, 1447), // loc(callsite(unknown at callsite( CondDenormed ( zirgen/circuit/rv32im/v2/dsl/u32.zir :102:17) at callsite( CmpOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :79:26) at callsite( OpBLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :169:9) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :53:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1448, 377), // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(501, 1441), // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(1450, 1445), // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(1451, 1449), // loc(callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :45:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(701, 1304), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :55:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(702, 1307), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :45:28) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :55:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(1410, 1309), // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:10) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :55:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(703, 1453), // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:10) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :55:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(1417, 1305), // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :48:14) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :55:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(704, 1314), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :55:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(705, 1317), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :51:29) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :55:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(1454, 1319), // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:9) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :55:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(706, 1455), // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:9) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :55:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(707, 1323), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :55:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(708, 1326), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :45:28) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :55:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(1436, 1328), // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:10) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :55:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(709, 1456), // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:10) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :55:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(1452, 1324), // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :48:14) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :55:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(710, 1333), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :55:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(711, 1336), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :51:29) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :55:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(1457, 1338), // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:9) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :55:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(712, 1458), // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:9) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :55:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(713, 1343), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :55:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(714, 1345), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :55:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(715, 1346), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:17) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :55:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(716, 1347), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:17) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :55:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(1342, 383), // loc(callsite(unknown at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :40:26) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :55:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(1459, 680), // loc(callsite(unknown at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :41:11) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :55:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(0, 1459), // loc(callsite(unknown at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :42:90) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :55:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(1461, 17), // loc(callsite(unknown at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :42:102) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :55:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(473, 1462), // loc(callsite(unknown at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :42:85) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :55:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(1463, 1460), // loc(callsite(unknown at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :42:106) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :55:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(1464, 1354), // loc(callsite( Reg ( :5:7) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :42:21) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :55:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(717, 1465), // loc(callsite( Reg ( :5:7) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :42:21) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :55:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(718, 1362), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :55:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(719, 1363), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :55:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(720, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :55:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(721, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :55:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(722, 1364), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :55:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(723, 1368), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :55:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(724, 1369), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :55:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(725, 1370), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :55:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(726, 1371), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc1 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :55:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :71:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndCond(394, 404, 727), // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Add(365, 368), // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(1466, 371), // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(1467, 374), // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(478, 479), // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(493, 494), // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Mul(346, 377), // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Mul(688, 20), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :71:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :59:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(656, 1472), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :71:16) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :59:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(587, 24), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :71:42) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :59:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1473, 1474), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :71:33) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :59:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1475, 1374), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :71:51) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :59:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1476, 673), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :71:70) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :59:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1477, 674), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :71:85) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :59:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(549, 39), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :72:7) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :59:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1479, 652), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :72:17) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :59:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1480, 597), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :72:36) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MiscInput ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :9:32) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :59:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(688, 3), // loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at callsite( OpBGE ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :173:18) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :61:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(650, 1482), // loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at callsite( OpBGE ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :173:18) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :61:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(729, 1068), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpBGE ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :174:22) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :61:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(730, 746), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :45:28) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpBGE ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :174:22) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :61:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(731, 1071), // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:10) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpBGE ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :174:22) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :61:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(732, 1074), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpBGE ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :174:22) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :61:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(733, 749), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :51:29) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpBGE ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :174:22) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :61:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(734, 1077), // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:9) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :133:24) at callsite( OpBGE ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :174:22) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :61:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(735, 752), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :125:24) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :134:20) at callsite( OpBGE ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :174:22) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :61:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(736, 1079), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :126:34) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :134:20) at callsite( OpBGE ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :174:22) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :61:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(737, 1083), // loc(callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :127:11) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :134:20) at callsite( OpBGE ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :174:22) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :61:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(738, 755), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :125:24) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :135:20) at callsite( OpBGE ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :174:22) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :61:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(739, 1085), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :126:34) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :135:20) at callsite( OpBGE ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :174:22) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :61:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(740, 1089), // loc(callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :127:11) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :135:20) at callsite( OpBGE ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :174:22) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :61:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(741, 758), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :125:24) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :136:20) at callsite( OpBGE ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :174:22) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :61:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(742, 1091), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :126:34) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :136:20) at callsite( OpBGE ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :174:22) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :61:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(743, 1095), // loc(callsite( GetSignU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :127:11) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :136:20) at callsite( OpBGE ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :174:22) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :61:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(744, 1101), // loc(callsite( Reg ( :5:7) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :138:19) at callsite( OpBGE ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :174:22) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :61:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(745, 1106), // loc(callsite( Reg ( :5:7) at callsite( CmpLessThan ( zirgen/circuit/rv32im/v2/dsl/u32.zir :140:30) at callsite( OpBGE ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :174:22) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :61:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndCond(83, 356, 746), // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(650, 1060), // loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at callsite( OpBLTU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :179:18) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :62:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(748, 1068), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( CmpLessThanUnsigned ( zirgen/circuit/rv32im/v2/dsl/u32.zir :119:24) at callsite( OpBLTU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :180:30) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :62:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(749, 746), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :45:28) at callsite( CmpLessThanUnsigned ( zirgen/circuit/rv32im/v2/dsl/u32.zir :119:24) at callsite( OpBLTU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :180:30) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :62:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(750, 1071), // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:10) at callsite( CmpLessThanUnsigned ( zirgen/circuit/rv32im/v2/dsl/u32.zir :119:24) at callsite( OpBLTU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :180:30) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :62:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(751, 1074), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( CmpLessThanUnsigned ( zirgen/circuit/rv32im/v2/dsl/u32.zir :119:24) at callsite( OpBLTU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :180:30) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :62:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(752, 749), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :51:29) at callsite( CmpLessThanUnsigned ( zirgen/circuit/rv32im/v2/dsl/u32.zir :119:24) at callsite( OpBLTU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :180:30) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :62:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(753, 1077), // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:9) at callsite( CmpLessThanUnsigned ( zirgen/circuit/rv32im/v2/dsl/u32.zir :119:24) at callsite( OpBLTU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :180:30) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :62:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(754, 739), // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(755, 740), // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(756, 741), // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndCond(747, 359, 757), // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(650, 1061), // loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at callsite( OpBGEU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :185:18) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :63:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(759, 1068), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( CmpLessThanUnsigned ( zirgen/circuit/rv32im/v2/dsl/u32.zir :119:24) at callsite( OpBGEU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :186:30) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :63:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(760, 746), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :45:28) at callsite( CmpLessThanUnsigned ( zirgen/circuit/rv32im/v2/dsl/u32.zir :119:24) at callsite( OpBGEU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :186:30) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :63:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(761, 1071), // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:10) at callsite( CmpLessThanUnsigned ( zirgen/circuit/rv32im/v2/dsl/u32.zir :119:24) at callsite( OpBGEU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :186:30) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :63:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(762, 1074), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( CmpLessThanUnsigned ( zirgen/circuit/rv32im/v2/dsl/u32.zir :119:24) at callsite( OpBGEU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :186:30) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :63:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(763, 749), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :51:29) at callsite( CmpLessThanUnsigned ( zirgen/circuit/rv32im/v2/dsl/u32.zir :119:24) at callsite( OpBGEU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :186:30) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :63:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(764, 1077), // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:9) at callsite( CmpLessThanUnsigned ( zirgen/circuit/rv32im/v2/dsl/u32.zir :119:24) at callsite( OpBGEU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :186:30) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :63:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(765, 739), // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(766, 740), // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(767, 741), // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndCond(758, 362, 768), // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Sub(638, 40), // loc(callsite( VerifyOpcode ( zirgen/circuit/rv32im/v2/dsl/inst.zir :53:19) at callsite( OpJAL ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :191:16) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :64:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(0, 1483), // loc(callsite( VerifyOpcode ( zirgen/circuit/rv32im/v2/dsl/inst.zir :53:19) at callsite( OpJAL ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :191:16) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :64:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(770, 737), // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(771, 738), // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(772, 739), // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(773, 740), // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(774, 741), // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndCond(769, 365, 775), // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Sub(638, 41), // loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :57:19) at callsite( OpJALR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :198:18) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :65:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(0, 1484), // loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :57:19) at callsite( OpJALR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :198:18) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :65:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(777, 688), // loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at callsite( OpJALR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :198:18) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :65:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(778, 737), // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(779, 738), // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(780, 739), // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(781, 740), // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(782, 741), // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndCond(776, 368, 783), // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Sub(638, 42), // loc(callsite( VerifyOpcode ( zirgen/circuit/rv32im/v2/dsl/inst.zir :53:19) at callsite( OpLUI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :205:16) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :66:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(0, 1485), // loc(callsite( VerifyOpcode ( zirgen/circuit/rv32im/v2/dsl/inst.zir :53:19) at callsite( OpLUI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :205:16) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :66:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(785, 737), // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(786, 738), // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(787, 739), // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(788, 740), // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(789, 741), // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndCond(784, 371, 790), // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Sub(638, 43), // loc(callsite( VerifyOpcode ( zirgen/circuit/rv32im/v2/dsl/inst.zir :53:19) at callsite( OpAUIPC ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :210:16) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :67:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(0, 1486), // loc(callsite( VerifyOpcode ( zirgen/circuit/rv32im/v2/dsl/inst.zir :53:19) at callsite( OpAUIPC ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :210:16) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :67:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(792, 737), // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(793, 738), // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(794, 739), // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(795, 740), // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(796, 741), // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndCond(791, 374, 797), // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Sub(638, 44), // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :62:19) at callsite( OpECALL ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :216:20) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :68:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(0, 1487), // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :62:19) at callsite( OpECALL ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :216:20) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :68:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(799, 688), // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at callsite( OpECALL ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :216:20) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :68:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(800, 686), // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at callsite( OpECALL ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :216:20) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :68:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(801, 737), // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(802, 738), // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(803, 739), // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(804, 740), // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(805, 741), // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndCond(798, 377, 806), // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Mul(660, 371), // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(346, 660), // loc(callsite(unknown at callsite( AddU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :27:21) at callsite( OpAUIPC ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :211:26) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :67:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(1489, 374), // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(1469, 1488), // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(1491, 1490), // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Mul(538, 371), // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(348, 538), // loc(callsite(unknown at callsite( AddU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :27:36) at callsite( OpAUIPC ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :211:26) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :67:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(1494, 374), // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(1470, 1493), // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(1496, 1495), // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Mul(1430, 1418), // loc(callsite(unknown at callsite( CondDenormed ( zirgen/circuit/rv32im/v2/dsl/u32.zir :101:8) at callsite( CmpOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :79:26) at callsite( OpBGE ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :175:9) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :61:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(0, 1430), // loc(callsite(unknown at callsite( CondDenormed ( zirgen/circuit/rv32im/v2/dsl/u32.zir :101:24) at callsite( CmpOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :79:26) at callsite( OpBGE ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :175:9) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :61:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1499, 474), // loc(callsite(unknown at callsite( CondDenormed ( zirgen/circuit/rv32im/v2/dsl/u32.zir :101:32) at callsite( CmpOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :79:26) at callsite( OpBGE ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :175:9) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :61:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1498, 1500), // loc(callsite(unknown at callsite( CondDenormed ( zirgen/circuit/rv32im/v2/dsl/u32.zir :101:17) at callsite( CmpOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :79:26) at callsite( OpBGE ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :175:9) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :61:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1501, 356), // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Mul(1197, 1418), // loc(callsite(unknown at callsite( CondDenormed ( zirgen/circuit/rv32im/v2/dsl/u32.zir :101:8) at callsite( CmpOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :79:26) at callsite( OpBLTU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :181:9) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :62:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(0, 1197), // loc(callsite(unknown at callsite( CondDenormed ( zirgen/circuit/rv32im/v2/dsl/u32.zir :101:24) at callsite( CmpOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :79:26) at callsite( OpBLTU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :181:9) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :62:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1504, 474), // loc(callsite(unknown at callsite( CondDenormed ( zirgen/circuit/rv32im/v2/dsl/u32.zir :101:32) at callsite( CmpOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :79:26) at callsite( OpBLTU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :181:9) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :62:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1503, 1505), // loc(callsite(unknown at callsite( CondDenormed ( zirgen/circuit/rv32im/v2/dsl/u32.zir :101:17) at callsite( CmpOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :79:26) at callsite( OpBLTU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :181:9) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :62:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1506, 359), // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Mul(1504, 1418), // loc(callsite(unknown at callsite( CondDenormed ( zirgen/circuit/rv32im/v2/dsl/u32.zir :101:8) at callsite( CmpOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :79:26) at callsite( OpBGEU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :187:9) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :63:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(0, 1504), // loc(callsite(unknown at callsite( CondDenormed ( zirgen/circuit/rv32im/v2/dsl/u32.zir :101:24) at callsite( CmpOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :79:26) at callsite( OpBGEU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :187:9) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :63:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1509, 474), // loc(callsite(unknown at callsite( CondDenormed ( zirgen/circuit/rv32im/v2/dsl/u32.zir :101:32) at callsite( CmpOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :79:26) at callsite( OpBGEU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :187:9) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :63:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1508, 1510), // loc(callsite(unknown at callsite( CondDenormed ( zirgen/circuit/rv32im/v2/dsl/u32.zir :101:17) at callsite( CmpOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :79:26) at callsite( OpBGEU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :187:9) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :63:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1511, 362), // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(346, 1478), // loc(callsite(unknown at callsite( AddU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :27:21) at callsite( OpJAL ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :194:12) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :64:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(1513, 365), // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Mul(1199, 368), // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(1502, 1507), // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(1516, 1512), // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(1517, 1514), // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(1518, 1515), // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(1519, 480), // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(1520, 481), // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(1521, 1471), // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Mul(1430, 1437), // loc(callsite(unknown at callsite( CondDenormed ( zirgen/circuit/rv32im/v2/dsl/u32.zir :102:8) at callsite( CmpOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :79:26) at callsite( OpBGE ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :175:9) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :61:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1499, 348), // loc(callsite(unknown at callsite( CondDenormed ( zirgen/circuit/rv32im/v2/dsl/u32.zir :102:33) at callsite( CmpOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :79:26) at callsite( OpBGE ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :175:9) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :61:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1523, 1524), // loc(callsite(unknown at callsite( CondDenormed ( zirgen/circuit/rv32im/v2/dsl/u32.zir :102:17) at callsite( CmpOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :79:26) at callsite( OpBGE ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :175:9) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :61:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1525, 356), // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Mul(1197, 1437), // loc(callsite(unknown at callsite( CondDenormed ( zirgen/circuit/rv32im/v2/dsl/u32.zir :102:8) at callsite( CmpOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :79:26) at callsite( OpBLTU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :181:9) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :62:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1504, 348), // loc(callsite(unknown at callsite( CondDenormed ( zirgen/circuit/rv32im/v2/dsl/u32.zir :102:33) at callsite( CmpOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :79:26) at callsite( OpBLTU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :181:9) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :62:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1527, 1528), // loc(callsite(unknown at callsite( CondDenormed ( zirgen/circuit/rv32im/v2/dsl/u32.zir :102:17) at callsite( CmpOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :79:26) at callsite( OpBLTU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :181:9) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :62:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1529, 359), // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Mul(1504, 1437), // loc(callsite(unknown at callsite( CondDenormed ( zirgen/circuit/rv32im/v2/dsl/u32.zir :102:8) at callsite( CmpOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :79:26) at callsite( OpBGEU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :187:9) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :63:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1509, 348), // loc(callsite(unknown at callsite( CondDenormed ( zirgen/circuit/rv32im/v2/dsl/u32.zir :102:33) at callsite( CmpOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :79:26) at callsite( OpBGEU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :187:9) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :63:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1531, 1532), // loc(callsite(unknown at callsite( CondDenormed ( zirgen/circuit/rv32im/v2/dsl/u32.zir :102:17) at callsite( CmpOp ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :79:26) at callsite( OpBGEU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :187:9) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :63:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1533, 362), // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(348, 1481), // loc(callsite(unknown at callsite( AddU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :27:36) at callsite( OpJAL ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :194:12) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :64:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(1535, 365), // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Mul(1295, 368), // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(1526, 1530), // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(1538, 1534), // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(1539, 1536), // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(1540, 1537), // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(1541, 495), // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(1542, 496), // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(1543, 497), // loc(callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :60:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(807, 1304), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :70:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(808, 1307), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :45:28) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :70:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(1492, 1309), // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:10) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :70:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(809, 1545), // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:10) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :70:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(1497, 1305), // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :48:14) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :70:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(810, 1314), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :70:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(811, 1317), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :51:29) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :70:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(1546, 1319), // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:9) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :70:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(812, 1547), // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:9) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :22:30) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :70:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(813, 1323), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :70:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(814, 1326), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :45:28) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :70:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(1522, 1328), // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:10) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :70:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(815, 1548), // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:10) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :70:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(1544, 1324), // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :48:14) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :70:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(816, 1333), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :70:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(817, 1336), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :51:29) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :70:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(1549, 1338), // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:9) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :70:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(818, 1550), // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:9) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :70:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(819, 1343), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :70:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(820, 1345), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :70:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(821, 1346), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:17) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :70:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(822, 1347), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:17) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :70:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(1342, 1468), // loc(callsite(unknown at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :40:26) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :70:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(1551, 680), // loc(callsite(unknown at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :41:11) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :70:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(0, 1551), // loc(callsite(unknown at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :42:90) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :70:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(1553, 17), // loc(callsite(unknown at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :42:102) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :70:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(473, 1554), // loc(callsite(unknown at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :42:85) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :70:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(1555, 1552), // loc(callsite(unknown at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :42:106) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :70:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(1556, 1354), // loc(callsite( Reg ( :5:7) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :42:21) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :70:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(823, 1557), // loc(callsite( Reg ( :5:7) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :42:21) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :70:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(824, 1362), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :70:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(825, 1363), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :70:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(826, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :70:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(827, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :70:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(828, 1364), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :70:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(829, 1368), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :70:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(830, 1369), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :70:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(831, 1370), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :70:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(832, 1371), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :24:11) at callsite( Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :70:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :72:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndCond(728, 407, 833), // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Sub(6, 516), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:23) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :63:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(519, 1558), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:18) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :63:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(5, 516), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:35) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :63:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(1559, 1560), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :63:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(26, 1561), // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :63:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(517, 0), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :65:23) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(835, 1562), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :65:23) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(524, 469), // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :65:23) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(836, 1563), // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :65:23) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(0, 525), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(525, 1564), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(837, 1565), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(348, 532), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:4) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(1566, 1564), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(838, 1567), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(525, 348), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:4) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(839, 1568), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:17) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(525, 532), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:4) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(840, 1569), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:17) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(841, 525), // loc(callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:19) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(531, 0), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :69:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(842, 1570), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :69:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(533, 4), // loc(callsite(unknown at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :71:4) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1571, 516), // loc(callsite(unknown at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :71:12) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(1572, 346), // loc(callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :71:21) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(843, 1573), // loc(callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :71:21) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(470, 533), // loc(callsite(unknown at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :73:23) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(844, 516), // loc(callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :26:17) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(535, 15), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(845, 1575), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(846, 547), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(847, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(848, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(534, 1574), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(849, 1576), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(537, 546), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(850, 1577), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(538, 698), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(851, 1578), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(343, 536), // loc(callsite(unknown at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(697, 0), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(852, 1580), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(699, 1579), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(853, 1581), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(854, 568), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :15:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(855, 579), // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :16:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(856, 586), // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :17:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(6, 587), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:23) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :18:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(589, 1582), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:18) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :18:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(5, 587), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:35) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :18:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(1583, 1584), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :18:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(857, 1585), // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :18:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(858, 596), // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :19:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(859, 603), // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :20:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(860, 606), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :21:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(6, 607), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:23) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :22:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(609, 1586), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:18) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :22:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(5, 607), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:35) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :22:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(1587, 1588), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :22:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(861, 1589), // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :22:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(862, 616), // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :23:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(863, 619), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :24:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(864, 626), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :25:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(865, 637), // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :26:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(0, 638), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:11) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :27:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(638, 1590), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:4) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :27:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(6, 638), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:23) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :27:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(1591, 1592), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:18) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :27:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(5, 638), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:35) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :27:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(1593, 1594), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :27:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(866, 1595), // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :27:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Get(203), // loc(callsite(unknown at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :48:20) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(0, 1596), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:11) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(1596, 1597), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:4) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(6, 1596), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:23) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(1598, 1599), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:18) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(5, 1596), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:35) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(1600, 1601), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(867, 1602), // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(868, 511), // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :29:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(566, 26), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :37:16) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(573, 25), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :38:16) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1603, 1604), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :37:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(580, 24), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :39:16) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1605, 1606), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :38:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(587, 23), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :40:16) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1607, 1608), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :39:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(590, 22), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :41:16) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1609, 1610), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :40:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(597, 11), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :42:16) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1611, 1612), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :41:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(604, 21), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :43:16) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1613, 1614), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :42:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1615, 687), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :43:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1616, 610), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :44:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(698, 1617), // loc(callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :37:14) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(869, 1618), // loc(callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :37:14) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(617, 26), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :46:15) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(624, 12), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :47:15) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1619, 1620), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :46:24) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(631, 20), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :48:15) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1621, 1622), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :47:24) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(638, 19), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :49:15) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1623, 1624), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :48:24) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1596, 18), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :50:15) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1625, 1626), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :49:24) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(505, 22), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :51:15) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1627, 1628), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :50:24) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1629, 512), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :51:24) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(546, 1630), // loc(callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :46:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(870, 1631), // loc(callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :46:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(607, 10), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :55:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(610, 6), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :55:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1632, 1633), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :55:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1634, 617), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :55:42) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(638, 10), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :57:17) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1596, 6), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :57:30) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1636, 1637), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :57:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1638, 505), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :57:39) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(573, 21), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :58:23) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(580, 4), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :58:38) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1640, 1641), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :58:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1642, 587), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :58:47) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(566, 17), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :59:20) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1644, 1643), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :59:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(624, 4), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :60:20) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1646, 631), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :60:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :10:32) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(473, 1635), // loc(callsite(unknown at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :34:79) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :11:25) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(1648, 720), // loc(callsite( Reg ( :5:7) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :34:15) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :11:25) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(871, 1649), // loc(callsite( Reg ( :5:7) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :34:15) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :11:25) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(701, 15), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :11:25) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(872, 1650), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :11:25) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(873, 713), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :11:25) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(874, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :11:25) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(875, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :11:25) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(700, 720), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :11:25) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(876, 1651), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :11:25) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(703, 712), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :11:25) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(877, 1652), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :11:25) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(704, 695), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :11:25) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(878, 1653), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :11:25) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(343, 702), // loc(callsite(unknown at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :11:25) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(719, 0), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :11:25) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(879, 1655), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :11:25) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(718, 1654), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :11:25) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(880, 1656), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :11:25) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(694, 750), // loc(callsite( Reg ( :5:7) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :34:15) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :12:25) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(881, 1657), // loc(callsite( Reg ( :5:7) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :34:15) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :12:25) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(722, 15), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :12:25) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(882, 1658), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :12:25) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(883, 734), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :12:25) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(884, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :12:25) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(885, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :12:25) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(721, 750), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :12:25) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(886, 1659), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :12:25) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(724, 733), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :12:25) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(887, 1660), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :12:25) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(725, 716), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :12:25) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(888, 1661), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :12:25) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(343, 723), // loc(callsite(unknown at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :12:25) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(744, 0), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :12:25) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(889, 1663), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :12:25) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(747, 1662), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :12:25) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(890, 1664), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MulInput ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :12:25) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(512, 29), // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :62:19) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :46:20) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(1647, 0), // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :46:20) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(0, 1665), // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :62:19) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :46:20) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(892, 1666), // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :46:20) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(893, 1645), // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :46:20) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(894, 755), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :44:21) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :47:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(895, 758), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :44:21) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :47:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(896, 761), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :44:21) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :47:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(897, 764), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :44:21) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :47:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(898, 767), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :44:21) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :47:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(756, 6), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :45:27) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :47:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(759, 4), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :45:27) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :47:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(762, 10), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :45:27) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :47:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(765, 21), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :45:27) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :47:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(753, 1667), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :45:27) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :47:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1671, 1668), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :45:27) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :47:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1672, 1669), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :45:27) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :47:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1673, 1670), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :45:27) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :47:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(899, 1068), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :46:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :47:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(1067, 11), // loc(callsite(unknown at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :47:4) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :47:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(1675, 1674), // loc(callsite(unknown at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :47:16) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :47:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(1676, 733), // loc(callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :47:30) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :47:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(900, 1677), // loc(callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :47:30) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :47:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(753, 6), // loc(callsite(unknown at callsite( CondMul ( zirgen/circuit/rv32im/v2/dsl/po2.zir :39:11) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :48:17) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :47:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1678, 754), // loc(callsite(unknown at callsite( CondMul ( zirgen/circuit/rv32im/v2/dsl/po2.zir :39:16) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :48:17) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :47:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(756, 1679), // loc(callsite(unknown at callsite( CondMul ( zirgen/circuit/rv32im/v2/dsl/po2.zir :39:4) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :49:17) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :47:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1680, 4), // loc(callsite(unknown at callsite( CondMul ( zirgen/circuit/rv32im/v2/dsl/po2.zir :39:11) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :49:17) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :47:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(757, 1679), // loc(callsite(unknown at callsite( CondMul ( zirgen/circuit/rv32im/v2/dsl/po2.zir :39:31) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :49:17) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :47:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1681, 1682), // loc(callsite(unknown at callsite( CondMul ( zirgen/circuit/rv32im/v2/dsl/po2.zir :39:16) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :49:17) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :47:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(759, 1683), // loc(callsite(unknown at callsite( CondMul ( zirgen/circuit/rv32im/v2/dsl/po2.zir :39:4) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :50:21) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :47:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1684, 21), // loc(callsite(unknown at callsite( CondMul ( zirgen/circuit/rv32im/v2/dsl/po2.zir :39:11) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :50:21) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :47:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(760, 1683), // loc(callsite(unknown at callsite( CondMul ( zirgen/circuit/rv32im/v2/dsl/po2.zir :39:31) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :50:21) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :47:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1685, 1686), // loc(callsite(unknown at callsite( CondMul ( zirgen/circuit/rv32im/v2/dsl/po2.zir :39:16) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :50:21) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :47:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(1687, 768), // loc(callsite( Reg ( :5:7) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :50:13) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :47:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(901, 1688), // loc(callsite( Reg ( :5:7) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :50:13) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :47:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(762, 768), // loc(callsite(unknown at callsite( CondMul ( zirgen/circuit/rv32im/v2/dsl/po2.zir :39:4) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :51:17) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :47:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1689, 18), // loc(callsite(unknown at callsite( CondMul ( zirgen/circuit/rv32im/v2/dsl/po2.zir :39:11) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :51:17) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :47:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(763, 768), // loc(callsite(unknown at callsite( CondMul ( zirgen/circuit/rv32im/v2/dsl/po2.zir :39:31) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :51:17) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :47:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1690, 1691), // loc(callsite(unknown at callsite( CondMul ( zirgen/circuit/rv32im/v2/dsl/po2.zir :39:16) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :51:17) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :47:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(766, 1692), // loc(callsite(unknown at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :52:27) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :47:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(1693, 771), // loc(callsite( Reg ( :5:7) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :52:14) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :47:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(902, 1694), // loc(callsite( Reg ( :5:7) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :52:14) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :47:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(765, 1692), // loc(callsite(unknown at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :53:22) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :47:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(1695, 774), // loc(callsite( Reg ( :5:7) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :53:15) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :47:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(903, 1696), // loc(callsite( Reg ( :5:7) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :53:15) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :47:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(1305, 0), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :50:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(904, 1697), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :50:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(1313, 0), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :51:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(905, 1698), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :51:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(906, 1323), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :52:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(1324, 0), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :53:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(907, 1699), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :53:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(1332, 0), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :59:31) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(908, 1700), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :59:31) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(909, 779), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :60:26) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(1315, 18), // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :62:17) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(1312, 1701), // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :62:12) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(712, 1702), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :62:10) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(910, 1703), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :62:10) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1334, 22), // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:18) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(1322, 1704), // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:13) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(777, 26), // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:40) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(1705, 1706), // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:33) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(695, 1707), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:11) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(911, 1708), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:11) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1334, 36), // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:9) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(777, 22), // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(1709, 1710), // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:24) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(1331, 1711), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:7) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(912, 1712), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:7) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(1340, 0), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :50:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(913, 1713), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :50:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(1354, 0), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :51:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(914, 1714), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :51:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(1356, 0), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :52:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(915, 1715), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :52:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Get(167), // loc(callsite(unknown at callsite( ArgU8 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :8:29) at callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :15:16) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :53:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Get(169), // loc(callsite(unknown at callsite( ArgU8 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :9:27) at callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :15:16) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :53:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Sub(1716, 0), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :53:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(916, 1718), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :53:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(917, 1363), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :59:31) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(918, 782), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :60:26) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(1357, 18), // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :62:17) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(1341, 1719), // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :62:12) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(771, 1720), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :62:10) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(919, 1721), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :62:10) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1360, 22), // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:18) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(1358, 1722), // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:13) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(780, 26), // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:40) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(1723, 1724), // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:33) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(774, 1725), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:11) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(920, 1726), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:11) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1360, 36), // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:9) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(780, 22), // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(1727, 1728), // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:24) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(1717, 1729), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:7) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(921, 1730), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:7) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(922, 785), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :118:25) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(923, 1074), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :119:31) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(783, 26), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :120:13) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1073, 36), // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :120:30) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(1731, 1732), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :120:21) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(7, 1733), // loc(callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :120:11) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(924, 1734), // loc(callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :120:11) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(1312, 1341), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :124:11) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1312, 1357), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :125:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1315, 1341), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :125:36) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1736, 1737), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :125:28) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1738, 18), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :125:8) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1735, 1739), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :124:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(925, 1079), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :97:30) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(1361, 0), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(926, 1741), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(927, 788), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(928, 791), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Mul(789, 6), // loc(callsite(unknown at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :57:4) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(1742, 786), // loc(callsite(unknown at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :57:11) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(1743, 47), // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:8) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(1366, 30), // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:33) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(1744, 1745), // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:21) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(1746, 1078), // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:45) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(1740, 1747), // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(929, 1748), // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1743, 18), // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :101:20) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(1749, 1366), // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :101:33) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(1312, 1358), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :131:11) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1750, 1751), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :130:11) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1315, 1357), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :131:27) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1752, 1753), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :131:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1322, 1341), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :131:43) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1754, 1755), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :131:35) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1312, 1717), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :132:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1315, 1358), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :132:36) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1757, 1758), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :132:28) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1322, 1357), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :132:52) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1759, 1760), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :132:44) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1331, 1341), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :132:68) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1761, 1762), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :132:60) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1763, 18), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :132:8) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1756, 1764), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :131:51) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(930, 1085), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :97:30) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(1367, 0), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(931, 1766), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(932, 825), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(933, 828), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Mul(886, 47), // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:8) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(549, 30), // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:33) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(1767, 1768), // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:21) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(1769, 1084), // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:45) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(1765, 1770), // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(934, 1771), // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(886, 18), // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :101:20) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(1772, 549), // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :101:33) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(1773, 46), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :138:42) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1315, 1717), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :140:11) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1774, 1775), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :139:82) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1322, 1358), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :140:27) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1776, 1777), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :140:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1331, 1357), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :140:43) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1778, 1779), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :140:35) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1322, 1717), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :141:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1331, 1358), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :141:36) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1781, 1782), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :141:28) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1783, 18), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :141:8) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1780, 1784), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :140:51) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(935, 1091), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :97:30) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(552, 0), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(936, 1786), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(937, 831), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(938, 834), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Mul(832, 6), // loc(callsite(unknown at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :57:4) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(1787, 829), // loc(callsite(unknown at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :57:11) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(1788, 47), // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:8) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(559, 30), // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:33) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(1789, 1790), // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:21) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(1791, 1090), // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:45) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(1785, 1792), // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(939, 1793), // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1788, 18), // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :101:20) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(1794, 559), // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :101:33) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(1795, 45), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :147:42) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1331, 1717), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :149:11) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1796, 1797), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :148:82) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(940, 1304), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :150:25) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(1798, 1303), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:28) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1799, 48), // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:41) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(941, 837), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :67:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(942, 840), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :67:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Mul(838, 6), // loc(callsite(unknown at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :57:4) at callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :67:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(1801, 835), // loc(callsite(unknown at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :57:11) at callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :67:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(1800, 1802), // loc(callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :68:8) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(943, 1803), // loc(callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :68:8) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndCond(891, 356, 944), // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Sub(512, 37), // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :62:19) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :52:20) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(0, 1804), // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :62:19) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :52:20) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(946, 1666), // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :52:20) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(947, 1645), // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :52:20) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(948, 755), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :44:21) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :53:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(949, 758), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :44:21) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :53:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(950, 761), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :44:21) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :53:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(951, 764), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :44:21) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :53:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(952, 767), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :44:21) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :53:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(953, 1068), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :46:29) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :53:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(1676, 672), // loc(callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :47:30) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :53:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(954, 1805), // loc(callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :47:30) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :53:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(955, 1688), // loc(callsite( Reg ( :5:7) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :50:13) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :53:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(956, 1694), // loc(callsite( Reg ( :5:7) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :52:14) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :53:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(957, 1696), // loc(callsite( Reg ( :5:7) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :53:15) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :53:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(958, 1697), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :50:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :54:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(959, 1698), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :51:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :54:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(960, 1323), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :52:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :54:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(961, 1699), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :53:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :54:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(962, 1700), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :59:31) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :54:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(963, 779), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :60:26) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :54:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(964, 1703), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :62:10) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :54:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(965, 1708), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:11) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :54:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(966, 1712), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:7) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :54:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(967, 1713), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :50:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :54:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(968, 1714), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :51:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :54:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(969, 1715), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :52:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :54:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(970, 1718), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :53:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :54:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(971, 1363), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :59:31) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :54:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(972, 782), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :60:26) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :54:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(973, 1721), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :62:10) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :54:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(974, 1726), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:11) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :54:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(975, 1730), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:7) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :54:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(976, 785), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :118:25) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :54:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(977, 1074), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :119:31) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :54:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(978, 1734), // loc(callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :120:11) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :54:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(979, 1079), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :97:30) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :54:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(980, 1741), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :54:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(981, 788), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :54:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(982, 791), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :54:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(983, 1748), // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :54:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(984, 1085), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :97:30) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :54:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(985, 1766), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :54:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(986, 825), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :54:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(987, 828), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :54:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(988, 1771), // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :54:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(989, 1091), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :97:30) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :54:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(990, 1786), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :54:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(991, 831), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :54:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(992, 834), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :54:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(993, 1793), // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :54:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(994, 1304), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :150:25) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :54:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(995, 837), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :67:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :54:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(996, 840), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :67:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :54:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(997, 1803), // loc(callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :68:8) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :54:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :25:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndCond(945, 359, 998), // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Sub(1645, 0), // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :58:20) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(892, 1647), // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :58:20) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(1000, 1806), // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :58:20) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(1001, 1697), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :50:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1002, 1698), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :51:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1003, 1323), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :52:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1004, 1699), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :53:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1005, 1700), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :59:31) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1006, 755), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :60:26) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(1007, 1703), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :62:10) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1705, 1086), // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:33) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(695, 1807), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:11) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1008, 1808), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:11) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(753, 22), // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(1709, 1809), // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:24) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(1331, 1810), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:7) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1009, 1811), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:7) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1010, 1713), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :50:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1011, 1714), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :51:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1012, 1715), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :52:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1013, 1718), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :53:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1014, 1363), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :59:31) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1015, 758), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :60:26) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(733, 1720), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :62:10) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1016, 1812), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :62:10) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1723, 1092), // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:33) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(716, 1813), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:11) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1017, 1814), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:11) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(756, 22), // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(1727, 1815), // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:24) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(1717, 1816), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:7) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1018, 1817), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:7) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1019, 761), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :118:25) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1020, 1068), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :119:31) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(759, 26), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :120:13) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1067, 36), // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :120:30) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(1818, 1819), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :120:21) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(7, 1820), // loc(callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :120:11) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1021, 1821), // loc(callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :120:11) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1022, 1074), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :97:30) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1023, 1741), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1024, 764), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(1025, 767), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Mul(765, 6), // loc(callsite(unknown at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :57:4) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(1822, 762), // loc(callsite(unknown at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :57:11) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(1823, 47), // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:8) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(1824, 1745), // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:21) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(1825, 1073), // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:45) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(1740, 1826), // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1026, 1827), // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1823, 18), // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :101:20) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(1828, 1366), // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :101:33) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(1829, 1751), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :130:11) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1830, 1753), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :131:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1831, 1755), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :131:35) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1832, 1764), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :131:51) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1027, 1079), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :97:30) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1028, 1766), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1029, 770), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(1030, 773), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Mul(771, 6), // loc(callsite(unknown at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :57:4) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(1834, 768), // loc(callsite(unknown at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :57:11) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(1835, 47), // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:8) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(1836, 1768), // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:21) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(1837, 1078), // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:45) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(1833, 1838), // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1031, 1839), // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1835, 18), // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :101:20) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(1840, 549), // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :101:33) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(1841, 46), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :138:42) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1842, 1775), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :139:82) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1843, 1777), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :140:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1844, 1779), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :140:35) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1845, 1784), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :140:51) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1032, 1085), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :97:30) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1033, 1786), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1034, 776), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(1035, 779), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Mul(777, 6), // loc(callsite(unknown at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :57:4) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(1847, 774), // loc(callsite(unknown at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :57:11) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(1848, 47), // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:8) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(1849, 1790), // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:21) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(1850, 1084), // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:45) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(1846, 1851), // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1036, 1852), // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1848, 18), // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :101:20) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(1853, 559), // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :101:33) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(1854, 45), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :147:42) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1855, 1797), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :148:82) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1037, 1091), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :150:25) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(1856, 1090), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:28) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1857, 48), // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:41) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1038, 782), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :67:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(1039, 785), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :67:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Mul(783, 6), // loc(callsite(unknown at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :57:4) at callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :67:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(1859, 780), // loc(callsite(unknown at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :57:11) at callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :67:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(1858, 1860), // loc(callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :68:8) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1040, 1861), // loc(callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :68:8) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1041, 1302), // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndCond(999, 362, 1042), // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(893, 1806), // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :63:20) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(1044, 1697), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :50:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1045, 1698), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :51:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1046, 1323), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :52:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1047, 1699), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :53:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1048, 1700), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :59:31) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1049, 755), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :60:26) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(1050, 1703), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :62:10) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1051, 1808), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:11) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1052, 1811), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:7) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1053, 1713), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :50:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1054, 1714), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :51:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1055, 1715), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :52:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1056, 1718), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :53:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1057, 1363), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :59:31) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1058, 758), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :60:26) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(1059, 1812), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :62:10) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1060, 1814), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:11) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1061, 1817), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:7) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1062, 761), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :118:25) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1063, 1068), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :119:31) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1064, 1821), // loc(callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :120:11) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1065, 1074), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :97:30) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1066, 1741), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1067, 764), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(1068, 767), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(1069, 1827), // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1070, 1079), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :97:30) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1071, 1766), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1072, 770), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(1073, 773), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(1074, 1839), // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1702, 756), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :139:40) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(1842, 1862), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :139:8) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1720, 753), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :139:75) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(1863, 1864), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :139:47) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1865, 1775), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :139:82) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1866, 1777), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :140:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1867, 1779), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :140:35) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1868, 1784), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :140:51) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1075, 1085), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :97:30) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1076, 1786), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1077, 776), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(1078, 779), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Sub(1869, 1851), // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1079, 1870), // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1331, 18), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :148:30) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1322, 1871), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :148:22) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1872, 756), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :148:40) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(1855, 1873), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :148:8) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1717, 18), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :148:65) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1358, 1875), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :148:57) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1876, 753), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :148:75) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(1874, 1877), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :148:47) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1878, 1797), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :148:82) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1080, 1091), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :150:25) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(1879, 1090), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:28) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1880, 48), // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:41) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1081, 782), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :67:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(1082, 785), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :67:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Sub(1881, 1860), // loc(callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :68:8) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1083, 1882), // loc(callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :68:8) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1084, 1302), // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndCond(1043, 365, 1085), // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Sub(1647, 6), // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :68:20) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(892, 1883), // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :68:20) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(1087, 1806), // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :68:20) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(1088, 1697), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :50:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1089, 1698), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :51:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1090, 1323), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :52:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1091, 1699), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :53:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1092, 1700), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :59:31) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1093, 755), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :60:26) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(1094, 1703), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :62:10) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1095, 1808), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:11) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1096, 1811), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:7) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1097, 1713), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :50:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1098, 1714), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :51:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1099, 1715), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :52:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1100, 1718), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :53:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1101, 1363), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :59:31) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1102, 758), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :60:26) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(1103, 1812), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :62:10) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1104, 1814), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:11) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1105, 1817), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:7) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1106, 761), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :118:25) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1107, 1068), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :119:31) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1108, 1821), // loc(callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :120:11) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1109, 1074), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :97:30) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1110, 1741), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1111, 764), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(1112, 767), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(1113, 1827), // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1114, 1079), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :97:30) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1115, 1766), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1116, 770), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(1117, 773), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(1118, 1839), // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(1842, 1864), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :139:47) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1884, 1775), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :139:82) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1885, 1777), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :140:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1886, 1779), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :140:35) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1887, 1784), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :140:51) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1119, 1085), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :97:30) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1120, 1786), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1121, 776), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(1122, 779), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Sub(1888, 1851), // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1123, 1889), // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(1855, 1877), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :148:47) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1890, 1797), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :148:82) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1124, 1091), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :150:25) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(1891, 1090), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:28) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1892, 48), // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:41) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1125, 782), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :67:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(1126, 785), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :67:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Sub(1893, 1860), // loc(callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :68:8) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1127, 1894), // loc(callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :68:8) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :69:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :28:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1128, 1302), // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndCond(1086, 368, 1129), // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Sub(1647, 5), // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at callsite( OpMULHU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :73:20) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :29:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(892, 1895), // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at callsite( OpMULHU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :73:20) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :29:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(1131, 1806), // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at callsite( OpMULHU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :73:20) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :29:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(1132, 1697), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :50:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :74:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :29:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1133, 1698), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :51:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :74:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :29:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1134, 1323), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :52:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :74:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :29:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1135, 1699), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :53:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :74:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :29:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1136, 1700), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :59:31) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :74:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :29:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1137, 755), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :60:26) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :74:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :29:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(1138, 1703), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :62:10) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :74:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :29:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1139, 1808), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:11) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :74:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :29:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1140, 1811), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:7) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :74:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :29:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1141, 1713), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :50:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :74:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :29:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1142, 1714), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :51:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :74:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :29:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1143, 1715), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :52:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :74:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :29:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1144, 1718), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :53:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :74:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :29:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1145, 1363), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :59:31) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :74:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :29:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1146, 758), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :60:26) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :74:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :29:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(1147, 1812), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :62:10) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :74:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :29:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1148, 1814), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:11) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :74:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :29:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1149, 1817), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:7) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :74:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :29:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1150, 761), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :118:25) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :74:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :29:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1151, 1068), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :119:31) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :74:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :29:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1152, 1821), // loc(callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :120:11) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :74:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :29:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1153, 1074), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :97:30) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :74:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :29:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1154, 1741), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :74:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :29:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1155, 764), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :74:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :29:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(1156, 767), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :74:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :29:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(1157, 1827), // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :74:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :29:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1158, 1079), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :97:30) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :74:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :29:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1159, 1766), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :74:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :29:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1160, 770), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :74:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :29:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(1161, 773), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :74:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :29:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(1162, 1839), // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :74:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :29:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1163, 1085), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :97:30) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :74:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :29:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1164, 1786), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :74:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :29:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1165, 776), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :74:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :29:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(1166, 779), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :74:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :29:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(1167, 1852), // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :74:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :29:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1168, 1091), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :150:25) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :74:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :29:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1169, 782), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :67:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :74:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :29:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(1170, 785), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :67:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :74:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :29:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(1171, 1861), // loc(callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :68:8) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULHU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :74:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :29:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1172, 1302), // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndCond(1130, 371, 1173), // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(0, 15), // loc(callsite( IllegalMulOp ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :17:6) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :30:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(1175, 737), // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(1176, 738), // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(1177, 739), // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(1178, 740), // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(1179, 741), // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(1180, 1302), // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(1181, 1305), // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(1182, 1313), // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(1183, 1321), // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(1184, 1324), // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(1185, 1332), // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(1186, 1340), // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(1187, 1354), // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(1188, 1356), // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(1189, 1716), // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(1190, 1359), // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(1191, 1361), // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(1192, 1367), // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(1193, 552), // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndCond(1174, 374, 1194), // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndCond(1195, 377, 1194), // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Get(122), // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :97:30) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :48:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Mul(1896, 356), // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Mul(1896, 359), // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Get(118), // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :97:30) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :59:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :26:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Mul(1899, 362), // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Get(125), // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :97:30) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Mul(1901, 365), // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Mul(1901, 368), // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Mul(1901, 371), // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(1897, 1898), // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(1905, 1900), // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(1906, 1902), // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(1907, 1903), // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(1908, 1904), // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Mul(1901, 356), // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Mul(1901, 359), // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Mul(1896, 362), // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Get(129), // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :150:25) at callsite( DoMul ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :40:29) at callsite( OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :64:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(1913, 365), // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Mul(1913, 368), // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Mul(1913, 371), // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(1910, 1911), // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(1917, 1912), // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(1918, 1914), // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(1919, 1915), // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(1920, 1916), // loc(callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(1196, 843), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(1639, 844), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:4) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(1922, 842), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(1197, 1923), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(841, 1639), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:4) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1198, 1924), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:17) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(841, 844), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:4) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1199, 1925), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:17) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(842, 1639), // loc(callsite(unknown at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :41:11) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(0, 842), // loc(callsite(unknown at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :42:90) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(1927, 17), // loc(callsite(unknown at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :42:102) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(473, 1928), // loc(callsite(unknown at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :42:85) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(1929, 1926), // loc(callsite(unknown at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :42:106) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(1930, 847), // loc(callsite( Reg ( :5:7) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :42:21) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(1200, 1931), // loc(callsite( Reg ( :5:7) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :42:21) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(853, 15), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1201, 1932), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(865, 0), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1202, 1933), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1203, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1204, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(850, 847), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1205, 1934), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(343, 856), // loc(callsite(unknown at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:22) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(905, 0), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1206, 1936), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(908, 1935), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1207, 1937), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(868, 1909), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(1208, 1938), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(902, 1921), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(1209, 1939), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(911, 0), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :34:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(1210, 1940), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :34:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(1211, 919), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :45:28) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :34:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(917, 30), // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:12) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :34:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(1941, 914), // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :34:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(474, 1942), // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:10) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :34:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(1212, 1943), // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:10) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :34:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Add(348, 917), // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :48:14) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :34:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(920, 0), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :34:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(1213, 1945), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :34:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(1214, 928), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :51:29) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :34:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(926, 30), // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:11) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :34:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(1946, 923), // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:23) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :34:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(1944, 1947), // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :34:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(1215, 1948), // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:9) at callsite( Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :34:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :73:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndCond(834, 410, 1216), // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Sub(0, 533), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:11) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :63:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(533, 1949), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:4) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :63:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(6, 533), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:23) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :63:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(1950, 1951), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:18) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :63:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(5, 533), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:35) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :63:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(1952, 1953), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :63:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(26, 1954), // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :63:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(534, 0), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :65:23) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1218, 1955), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :65:23) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(535, 469), // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :65:23) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1219, 1956), // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :65:23) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(0, 536), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(536, 1957), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(1220, 1958), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(348, 537), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:4) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(1959, 1957), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1221, 1960), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(536, 348), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:4) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1222, 1961), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:17) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(536, 537), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:4) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1223, 1962), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:17) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1224, 536), // loc(callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:19) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(538, 0), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :69:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1225, 1963), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :69:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(545, 4), // loc(callsite(unknown at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :71:4) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1964, 533), // loc(callsite(unknown at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :71:12) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(1965, 346), // loc(callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :71:21) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1226, 1966), // loc(callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :71:21) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(470, 545), // loc(callsite(unknown at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :73:23) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1227, 533), // loc(callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :26:17) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(698, 15), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1228, 1968), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(701, 0), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1229, 1969), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1230, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1231, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(546, 1967), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1232, 1970), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(699, 702), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1233, 1971), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1234, 708), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(343, 697), // loc(callsite(unknown at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(704, 0), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1235, 1973), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(711, 1972), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1236, 1974), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1237, 606), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :15:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1238, 1589), // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :16:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1239, 616), // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :17:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1240, 623), // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :18:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1241, 630), // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :19:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1242, 637), // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :20:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1243, 1591), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :21:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1244, 1602), // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :22:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1245, 511), // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :23:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(0, 512), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :24:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(512, 1975), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :24:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(1246, 1976), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :24:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(0, 513), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :25:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(513, 1977), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :25:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(1247, 1978), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :25:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1248, 1561), // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :26:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(0, 517), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:11) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :27:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(517, 1979), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:4) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :27:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(6, 517), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:23) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :27:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(1980, 1981), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:18) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :27:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(5, 517), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:35) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :27:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(1982, 1983), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :27:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(1249, 1984), // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :27:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(0, 524), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:11) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(524, 1985), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:4) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(6, 524), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:23) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(1986, 1987), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:18) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(5, 524), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:35) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(1988, 1989), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(1250, 1990), // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(6, 525), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:23) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :29:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(1565, 1991), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:18) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :29:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(5, 525), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:35) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :29:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(1992, 1993), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :29:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(1251, 1994), // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :29:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(607, 25), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :38:16) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(656, 1995), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :37:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(610, 24), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :39:16) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1996, 1997), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :38:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(617, 23), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :40:16) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1998, 1999), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :39:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(624, 22), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :41:16) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2000, 2001), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :40:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(631, 11), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :42:16) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2002, 2003), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :41:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(638, 21), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :43:16) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2004, 2005), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :42:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1596, 4), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :44:16) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2006, 2007), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :43:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2008, 505), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :44:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(703, 2009), // loc(callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :37:14) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1252, 2010), // loc(callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :37:14) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(512, 26), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :46:15) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(513, 12), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :47:15) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2011, 2012), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :46:24) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(516, 20), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :48:15) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2013, 2014), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :47:24) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(517, 19), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :49:15) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2015, 2016), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :48:24) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(524, 18), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :50:15) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2017, 2018), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :49:24) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(525, 22), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :51:15) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2019, 2020), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :50:24) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2021, 532), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :51:24) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(702, 2022), // loc(callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :46:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1253, 2023), // loc(callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :46:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(1596, 10), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :55:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(505, 6), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :55:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2024, 2025), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :55:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2026, 512), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :55:42) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(624, 10), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :56:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(631, 6), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :56:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2028, 2029), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :56:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2030, 638), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :56:42) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(517, 10), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :57:17) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(524, 6), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :57:30) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2032, 2033), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :57:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2034, 525), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :57:39) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(607, 21), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :58:23) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(610, 4), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :58:38) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2036, 2037), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :58:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2038, 617), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :58:47) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(604, 17), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :59:20) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2040, 2039), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :59:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(513, 4), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :60:20) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2042, 516), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :60:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :10:32) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(473, 2027), // loc(callsite(unknown at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :34:79) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :11:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(2044, 732), // loc(callsite( Reg ( :5:7) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :34:15) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :11:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1254, 2045), // loc(callsite( Reg ( :5:7) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :34:15) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :11:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(695, 15), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :11:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1255, 2046), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :11:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(721, 0), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :11:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1256, 2047), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :11:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1257, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :11:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1258, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :11:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(712, 732), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :11:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1259, 2048), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :11:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(718, 722), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :11:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1260, 2049), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :11:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(720, 723), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :11:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1261, 2050), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :11:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(343, 719), // loc(callsite(unknown at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :11:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(724, 0), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :11:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1262, 2052), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :11:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(725, 2051), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :11:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1263, 2053), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :11:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(473, 2031), // loc(callsite(unknown at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :34:79) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :12:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(2054, 768), // loc(callsite( Reg ( :5:7) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :34:15) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :12:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1264, 2055), // loc(callsite( Reg ( :5:7) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :34:15) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :12:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(716, 15), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :12:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1265, 2056), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :12:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(753, 0), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :12:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1266, 2057), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :12:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1267, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :12:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1268, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :12:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(733, 768), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :12:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1269, 2058), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :12:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(747, 756), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :12:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1270, 2059), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :12:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(750, 759), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :12:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1271, 2060), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :12:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(343, 744), // loc(callsite(unknown at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :12:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(762, 0), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :12:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1272, 2062), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :12:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(765, 2061), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :12:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1273, 2063), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( DivInput ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :12:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :22:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(532, 29), // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :62:19) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :85:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(2043, 3), // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :85:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(0, 2064), // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :62:19) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :85:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(1275, 2065), // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :85:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(1276, 2041), // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :85:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(1277, 773), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :44:21) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :86:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1278, 776), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :44:21) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :86:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1279, 779), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :44:21) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :86:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1280, 782), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :44:21) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :86:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1281, 785), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :44:21) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :86:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(774, 6), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :45:27) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :86:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(777, 4), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :45:27) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :86:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(780, 10), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :45:27) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :86:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(783, 21), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:31) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :45:27) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :86:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(771, 2066), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :45:27) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :86:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2070, 2067), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :45:27) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :86:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2071, 2068), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :45:27) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :86:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2072, 2069), // loc(callsite(unknown at callsite( FromBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :35:4) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :45:27) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :86:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1282, 1068), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :46:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :86:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(1675, 2073), // loc(callsite(unknown at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :47:16) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :86:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(2074, 756), // loc(callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :47:30) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :86:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(1283, 2075), // loc(callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :47:30) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :86:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(1834, 772), // loc(callsite(unknown at callsite( CondMul ( zirgen/circuit/rv32im/v2/dsl/po2.zir :39:16) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :48:17) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :86:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(774, 2076), // loc(callsite(unknown at callsite( CondMul ( zirgen/circuit/rv32im/v2/dsl/po2.zir :39:4) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :49:17) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :86:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(2077, 4), // loc(callsite(unknown at callsite( CondMul ( zirgen/circuit/rv32im/v2/dsl/po2.zir :39:11) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :49:17) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :86:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(775, 2076), // loc(callsite(unknown at callsite( CondMul ( zirgen/circuit/rv32im/v2/dsl/po2.zir :39:31) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :49:17) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :86:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2078, 2079), // loc(callsite(unknown at callsite( CondMul ( zirgen/circuit/rv32im/v2/dsl/po2.zir :39:16) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :49:17) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :86:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(777, 2080), // loc(callsite(unknown at callsite( CondMul ( zirgen/circuit/rv32im/v2/dsl/po2.zir :39:4) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :50:21) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :86:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(2081, 21), // loc(callsite(unknown at callsite( CondMul ( zirgen/circuit/rv32im/v2/dsl/po2.zir :39:11) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :50:21) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :86:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(778, 2080), // loc(callsite(unknown at callsite( CondMul ( zirgen/circuit/rv32im/v2/dsl/po2.zir :39:31) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :50:21) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :86:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2082, 2083), // loc(callsite(unknown at callsite( CondMul ( zirgen/circuit/rv32im/v2/dsl/po2.zir :39:16) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :50:21) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :86:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(2084, 786), // loc(callsite( Reg ( :5:7) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :50:13) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :86:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1284, 2085), // loc(callsite( Reg ( :5:7) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :50:13) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :86:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(780, 786), // loc(callsite(unknown at callsite( CondMul ( zirgen/circuit/rv32im/v2/dsl/po2.zir :39:4) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :51:17) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :86:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(2086, 18), // loc(callsite(unknown at callsite( CondMul ( zirgen/circuit/rv32im/v2/dsl/po2.zir :39:11) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :51:17) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :86:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(781, 786), // loc(callsite(unknown at callsite( CondMul ( zirgen/circuit/rv32im/v2/dsl/po2.zir :39:31) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :51:17) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :86:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2087, 2088), // loc(callsite(unknown at callsite( CondMul ( zirgen/circuit/rv32im/v2/dsl/po2.zir :39:16) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :51:17) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :86:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(784, 2089), // loc(callsite(unknown at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :52:27) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :86:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(2090, 789), // loc(callsite( Reg ( :5:7) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :52:14) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :86:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1285, 2091), // loc(callsite( Reg ( :5:7) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :52:14) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :86:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(783, 2089), // loc(callsite(unknown at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :53:22) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :86:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(2092, 823), // loc(callsite( Reg ( :5:7) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :53:15) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :86:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1286, 2093), // loc(callsite( Reg ( :5:7) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :53:15) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :86:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1287, 1074), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :54:27) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1288, 1079), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :55:27) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1289, 1699), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :50:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1290, 1700), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :51:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1291, 1713), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :52:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1292, 1714), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :53:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1293, 1715), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :59:31) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1294, 834), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :60:26) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(1334, 18), // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :62:17) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(1331, 2094), // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :62:12) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(826, 2095), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :62:10) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1295, 2096), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :62:10) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1358, 22), // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:18) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(1341, 2097), // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:13) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(832, 26), // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:40) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(2098, 2099), // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:33) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(829, 2100), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:11) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1296, 2101), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:11) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1358, 36), // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:9) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(832, 22), // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(2102, 2103), // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:24) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(1357, 2104), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:7) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1297, 2105), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:7) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1298, 1718), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :50:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1299, 1363), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :51:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1300, 1741), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :52:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1301, 1766), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :53:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1302, 1786), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :59:31) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1303, 837), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :60:26) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(1360, 18), // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :62:17) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(1717, 2106), // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :62:12) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(789, 2107), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :62:10) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1304, 2108), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :62:10) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(559, 22), // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:18) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(1366, 2109), // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:13) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(835, 26), // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:40) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(2110, 2111), // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:33) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(823, 2112), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:11) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1305, 2113), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:11) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(559, 36), // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:9) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(835, 22), // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(2114, 2115), // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:24) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(549, 2116), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:7) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1306, 2117), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:7) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1307, 840), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :118:25) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1308, 1085), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :119:31) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(838, 26), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :120:13) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2118, 1087), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :120:21) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(1078, 2119), // loc(callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :120:11) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1309, 2120), // loc(callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :120:11) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(1073, 1797), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :123:10) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1331, 1360), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :125:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1334, 1717), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :125:36) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2122, 2123), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :125:28) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(2124, 18), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :125:8) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2121, 2125), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :124:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1310, 1091), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :97:30) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(566, 0), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1311, 2127), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1312, 843), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(1313, 846), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Mul(844, 6), // loc(callsite(unknown at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :57:4) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(2128, 841), // loc(callsite(unknown at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :57:11) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(2129, 47), // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:8) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(573, 30), // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:33) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(2130, 2131), // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:21) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(2132, 1090), // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:45) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(2126, 2133), // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1314, 2134), // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(2129, 18), // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :101:20) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(2135, 573), // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :101:33) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(1078, 2136), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :129:10) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1331, 1366), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :131:11) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2137, 2138), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :130:11) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1334, 1360), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :131:27) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2139, 2140), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :131:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1341, 1717), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :131:43) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2141, 2142), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :131:35) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1331, 549), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :132:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1334, 1366), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :132:36) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2144, 2145), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :132:28) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1341, 1360), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :132:52) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2146, 2147), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :132:44) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1357, 1717), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :132:68) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2148, 2149), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :132:60) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(2150, 18), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :132:8) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2143, 2151), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :131:51) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1315, 1304), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :97:30) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(580, 0), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1316, 2153), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1317, 849), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(1318, 852), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Mul(850, 6), // loc(callsite(unknown at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :57:4) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(2154, 847), // loc(callsite(unknown at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :57:11) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(2155, 47), // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:8) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(587, 30), // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:33) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(2156, 2157), // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:21) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(2158, 1303), // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:45) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(2152, 2159), // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1319, 2160), // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(2155, 18), // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :101:20) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(2161, 587), // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :101:33) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(2162, 46), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :138:42) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1334, 549), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :140:11) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2163, 2164), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :139:82) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1341, 1366), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :140:27) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2165, 2166), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :140:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1357, 1360), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :140:43) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2167, 2168), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :140:35) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1341, 549), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :141:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1357, 1366), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :141:36) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2170, 2171), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :141:28) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(2172, 18), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :141:8) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2169, 2173), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :140:51) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1320, 1697), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :97:30) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(590, 0), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1321, 2175), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1322, 855), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(1323, 858), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Mul(856, 6), // loc(callsite(unknown at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :57:4) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(2176, 853), // loc(callsite(unknown at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :57:11) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(2177, 47), // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:8) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(597, 30), // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:33) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(2178, 2179), // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:21) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(2180, 1312), // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:45) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(2174, 2181), // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1324, 2182), // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(2177, 18), // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :101:20) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(2183, 597), // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :101:33) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(2184, 45), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :147:42) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1357, 549), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :149:11) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2185, 2186), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :148:82) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1325, 1698), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :150:25) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(2187, 1315), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:28) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(2188, 48), // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:41) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1326, 861), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :67:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(1327, 864), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :67:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Mul(862, 6), // loc(callsite(unknown at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :57:4) at callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :67:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(2190, 859), // loc(callsite(unknown at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :57:11) at callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :67:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(2189, 2191), // loc(callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :68:8) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1328, 2192), // loc(callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :68:8) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(1090, 722), // loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :106:10) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :62:15) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1329, 2193), // loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :106:10) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :62:15) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(1303, 723), // loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :107:11) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :62:15) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1330, 2194), // loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :107:11) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :62:15) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1331, 867), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :64:30) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(865, 14), // loc(callsite(unknown at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :65:36) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(1312, 2195), // loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :106:10) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :65:15) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1332, 2196), // loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :106:10) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :65:15) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(1315, 2195), // loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :107:11) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :65:15) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1333, 2197), // loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :107:11) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :65:15) at callsite( OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :87:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :24:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1334, 1321), // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndCond(1274, 356, 1335), // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Sub(2041, 11), // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :91:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(14, 722), // loc(callsite(unknown at callsite( FlipU16 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :77:14) at callsite( FlipU32 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :81:18) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:28) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(14, 723), // loc(callsite(unknown at callsite( FlipU16 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :77:14) at callsite( FlipU32 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :81:42) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:28) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1276, 2198), // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :91:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(1337, 773), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :44:21) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :92:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1338, 776), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :44:21) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :92:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1339, 779), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :44:21) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :92:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1340, 782), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :44:21) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :92:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1341, 785), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :44:21) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :92:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1342, 1068), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :46:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :92:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1343, 2075), // loc(callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :47:30) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :92:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(1344, 2085), // loc(callsite( Reg ( :5:7) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :50:13) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :92:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1345, 2091), // loc(callsite( Reg ( :5:7) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :52:14) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :92:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1346, 2093), // loc(callsite( Reg ( :5:7) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :53:15) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :92:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1347, 828), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( TopBit ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :70:26) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :93:18) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1348, 1074), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( TopBit ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :71:24) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :93:18) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(826, 26), // loc(callsite(unknown at callsite( TopBit ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :72:24) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :93:18) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(1732, 2201), // loc(callsite(unknown at callsite( TopBit ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :72:20) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :93:18) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(723, 2202), // loc(callsite( TopBit ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :72:11) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :93:18) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(1349, 2203), // loc(callsite( TopBit ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :72:11) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :93:18) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(826, 2199), // loc(callsite(unknown at callsite( FlipU16 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :77:4) at callsite( FlipU32 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :81:18) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:28) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(827, 722), // loc(callsite(unknown at callsite( FlipU16 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :77:39) at callsite( FlipU32 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :81:18) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:28) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2204, 2205), // loc(callsite(unknown at callsite( FlipU16 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :77:24) at callsite( FlipU32 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :81:18) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:28) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(826, 2200), // loc(callsite(unknown at callsite( FlipU16 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :77:4) at callsite( FlipU32 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :81:42) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:28) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(827, 723), // loc(callsite(unknown at callsite( FlipU16 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :77:39) at callsite( FlipU32 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :81:42) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:28) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2207, 2208), // loc(callsite(unknown at callsite( FlipU16 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :77:24) at callsite( FlipU32 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :81:42) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:28) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1350, 1079), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :54:27) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1351, 1085), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :55:27) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1352, 1699), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :50:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1353, 1700), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :51:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1354, 1713), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :52:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1355, 1714), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :53:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1356, 1715), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :59:31) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1357, 837), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :60:26) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(829, 2095), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :62:10) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1358, 2210), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :62:10) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2098, 2111), // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:33) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(832, 2211), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:11) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1359, 2212), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:11) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2102, 2115), // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:24) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(1357, 2213), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:7) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1360, 2214), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:7) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1361, 1718), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :50:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1362, 1363), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :51:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1363, 1741), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :52:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1364, 1766), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :53:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1365, 1786), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :59:31) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1366, 840), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :60:26) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(1367, 2108), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :62:10) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2110, 2118), // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:33) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(823, 2215), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:11) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1368, 2216), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:11) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(838, 22), // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(2114, 2217), // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:24) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(549, 2218), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:7) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1369, 2219), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:7) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1370, 843), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :118:25) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1371, 1091), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :119:31) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(841, 26), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :120:13) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2220, 1093), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :120:21) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(1084, 2221), // loc(callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :120:11) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1372, 2222), // loc(callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :120:11) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(1078, 1797), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :123:10) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2223, 2125), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :124:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1373, 1304), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :97:30) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1374, 2127), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1375, 846), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(1376, 849), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Mul(847, 6), // loc(callsite(unknown at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :57:4) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(2225, 844), // loc(callsite(unknown at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :57:11) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(2226, 47), // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:8) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(2227, 2131), // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:21) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(2228, 1303), // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:45) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(2224, 2229), // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1377, 2230), // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(2226, 18), // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :101:20) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(2231, 573), // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :101:33) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(1084, 2232), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :129:10) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2233, 2138), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :130:11) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2234, 2140), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :131:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2235, 2142), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :131:35) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2236, 2151), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :131:51) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1378, 1697), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :97:30) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1379, 2153), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1380, 852), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(1381, 855), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Mul(853, 6), // loc(callsite(unknown at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :57:4) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(2238, 850), // loc(callsite(unknown at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :57:11) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(2239, 47), // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:8) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(2240, 2157), // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:21) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(2241, 1312), // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:45) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(2237, 2242), // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1382, 2243), // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(2239, 18), // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :101:20) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(2244, 587), // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :101:33) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(2245, 46), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :138:42) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2246, 2164), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :139:82) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2247, 2166), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :140:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2248, 2168), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :140:35) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2249, 2173), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :140:51) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1383, 1698), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :97:30) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1384, 2175), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1385, 858), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(1386, 861), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Mul(859, 6), // loc(callsite(unknown at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :57:4) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(2251, 856), // loc(callsite(unknown at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :57:11) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(2252, 47), // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:8) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(2253, 2179), // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:21) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(2254, 1315), // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:45) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(2250, 2255), // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1387, 2256), // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(2252, 18), // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :101:20) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(2257, 597), // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :101:33) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(2258, 45), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :147:42) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2259, 2186), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :148:82) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1388, 1323), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :150:25) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(2260, 1322), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:28) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(2261, 48), // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:41) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1389, 864), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :67:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(1390, 867), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :67:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Mul(865, 6), // loc(callsite(unknown at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :57:4) at callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :67:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(2263, 862), // loc(callsite(unknown at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :57:11) at callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :67:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(2262, 2264), // loc(callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :68:8) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1391, 2265), // loc(callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :68:8) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(1303, 2206), // loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :106:10) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :62:15) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1392, 2266), // loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :106:10) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :62:15) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(1312, 2209), // loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :107:11) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :62:15) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1393, 2267), // loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :107:11) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :62:15) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1394, 870), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :64:30) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(868, 14), // loc(callsite(unknown at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :65:36) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(1315, 2268), // loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :106:10) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :65:15) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1395, 2269), // loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :106:10) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :65:15) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(1322, 2268), // loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :107:11) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :65:15) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1396, 2270), // loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :107:11) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :65:15) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :94:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndCond(1336, 359, 1397), // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Sub(532, 37), // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :62:19) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :99:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(0, 2271), // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :62:19) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :99:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(1399, 2065), // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :99:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(1400, 2041), // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :99:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(1401, 773), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :44:21) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :100:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1402, 776), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :44:21) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :100:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1403, 779), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :44:21) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :100:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1404, 782), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :44:21) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :100:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1405, 785), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :44:21) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :100:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1406, 1068), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :46:29) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :100:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(2074, 2031), // loc(callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :47:30) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :100:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(1407, 2272), // loc(callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :47:30) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :100:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(1408, 2085), // loc(callsite( Reg ( :5:7) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :50:13) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :100:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1409, 2091), // loc(callsite( Reg ( :5:7) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :52:14) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :100:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1410, 2093), // loc(callsite( Reg ( :5:7) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :53:15) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :100:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1411, 1074), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :54:27) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :101:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1412, 1079), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :55:27) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :101:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1413, 1699), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :50:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :101:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1414, 1700), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :51:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :101:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1415, 1713), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :52:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :101:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1416, 1714), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :53:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :101:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1417, 1715), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :59:31) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :101:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1418, 834), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :60:26) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :101:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(1419, 2096), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :62:10) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :101:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1420, 2101), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:11) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :101:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1421, 2105), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:7) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :101:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1422, 1718), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :50:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :101:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1423, 1363), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :51:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :101:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1424, 1741), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :52:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :101:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1425, 1766), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :53:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :101:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1426, 1786), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :59:31) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :101:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1427, 837), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :60:26) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :101:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(1428, 2108), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :62:10) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :101:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1429, 2113), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:11) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :101:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1430, 2117), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:7) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :101:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1431, 840), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :118:25) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :101:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1432, 1085), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :119:31) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :101:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1433, 2120), // loc(callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :120:11) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :101:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1434, 1091), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :97:30) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :101:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1435, 2127), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :101:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1436, 843), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :101:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(1437, 846), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :101:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(1438, 2134), // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :101:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1439, 1304), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :97:30) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :101:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1440, 2153), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :101:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1441, 849), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :101:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(1442, 852), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :101:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(1443, 2160), // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :101:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1444, 1697), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :97:30) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :101:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1445, 2175), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :101:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1446, 855), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :101:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(1447, 858), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :101:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(1448, 2182), // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :101:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1449, 1698), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :150:25) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :101:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1450, 861), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :67:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :101:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(1451, 864), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :67:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :101:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(1452, 2192), // loc(callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :68:8) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :101:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1453, 2193), // loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :106:10) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :62:15) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :101:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1454, 2194), // loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :107:11) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :62:15) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :101:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1455, 867), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :64:30) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :101:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1456, 2196), // loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :106:10) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :65:15) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :101:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1457, 2197), // loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :107:11) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :65:15) at callsite( OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :101:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :26:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1458, 1321), // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndCond(1398, 362, 1459), // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(1400, 2198), // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :105:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(1461, 773), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :44:21) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :106:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1462, 776), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :44:21) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :106:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1463, 779), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :44:21) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :106:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1464, 782), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :44:21) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :106:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1465, 785), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:31) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :44:21) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :106:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1466, 1068), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :46:29) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :106:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1467, 2272), // loc(callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :47:30) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :106:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(1468, 2085), // loc(callsite( Reg ( :5:7) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :50:13) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :106:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1469, 2091), // loc(callsite( Reg ( :5:7) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :52:14) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :106:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1470, 2093), // loc(callsite( Reg ( :5:7) at callsite( DynPo2 ( zirgen/circuit/rv32im/v2/dsl/po2.zir :53:15) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :106:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1471, 828), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( TopBit ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :70:26) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :107:18) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1472, 1074), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( TopBit ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :71:24) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :107:18) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1473, 2203), // loc(callsite( TopBit ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :72:11) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :107:18) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(1474, 1079), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :54:27) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :108:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1475, 1085), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :55:27) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :108:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1476, 1699), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :50:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :108:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1477, 1700), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :51:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :108:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1478, 1713), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :52:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :108:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1479, 1714), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :53:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :108:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1480, 1715), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :59:31) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :108:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1481, 837), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :60:26) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :108:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(1482, 2210), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :62:10) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :108:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1483, 2212), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:11) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :108:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1484, 2214), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:7) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :108:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1485, 1718), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :50:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :108:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1486, 1363), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :51:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :108:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1487, 1741), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :52:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :108:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1488, 1766), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :53:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :108:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1489, 1786), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :59:31) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :108:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1490, 840), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :60:26) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :108:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(1491, 2108), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :62:10) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :108:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1492, 2216), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:11) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :108:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1493, 2219), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:7) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :108:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1494, 843), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :118:25) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :108:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1495, 1091), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :119:31) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :108:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1496, 2222), // loc(callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :120:11) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :108:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1497, 1304), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :97:30) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :108:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1498, 2127), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :108:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1499, 846), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :108:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(1500, 849), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :108:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(1501, 2230), // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :108:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1502, 1697), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :97:30) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :108:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1503, 2153), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :108:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1504, 852), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :108:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(1505, 855), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :108:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(1506, 2243), // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :108:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1507, 1698), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :97:30) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :108:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1508, 2175), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :108:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1509, 858), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :108:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(1510, 861), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :108:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(1511, 2256), // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :108:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1512, 1323), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :150:25) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :108:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1513, 864), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :67:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :108:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(1514, 867), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :67:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :108:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(1515, 2265), // loc(callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :68:8) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :108:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1516, 2266), // loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :106:10) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :62:15) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :108:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1517, 2267), // loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :107:11) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :62:15) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :108:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1518, 870), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :64:30) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :108:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1519, 2269), // loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :106:10) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :65:15) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :108:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1520, 2270), // loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :107:11) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :65:15) at callsite( OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :108:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :27:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndCond(1460, 365, 1521), // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Sub(2043, 4), // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :113:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(2041, 0), // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :113:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(1275, 2273), // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :113:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(1523, 2274), // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :113:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(1524, 1068), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :54:27) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1525, 1074), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :55:27) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1526, 1699), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :50:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1527, 1700), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :51:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1528, 1713), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :52:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1529, 1714), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :53:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1530, 1715), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :59:31) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1531, 779), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :60:26) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(771, 2095), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :62:10) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1532, 2275), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :62:10) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2098, 1706), // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:33) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(774, 2276), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:11) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1533, 2277), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:11) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2102, 1710), // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:24) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(1357, 2278), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:7) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1534, 2279), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:7) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1535, 1718), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :50:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1536, 1363), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :51:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1537, 1741), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :52:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1538, 1766), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :53:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1539, 1786), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :59:31) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1540, 782), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :60:26) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(756, 2107), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :62:10) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1541, 2280), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :62:10) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2110, 1724), // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:33) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(759, 2281), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:11) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1542, 2282), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:11) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2114, 1728), // loc(callsite(unknown at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:24) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(549, 2283), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:7) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1543, 2284), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:7) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1544, 785), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :118:25) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1545, 1079), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :119:31) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1731, 1081), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :120:21) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(1073, 2285), // loc(callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :120:11) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1546, 2286), // loc(callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :120:11) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(1067, 1797), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :123:10) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2287, 2125), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :124:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1547, 1085), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :97:30) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1548, 2127), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1549, 788), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(1550, 791), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Add(1744, 2131), // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:21) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(2289, 1084), // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:45) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(2288, 2290), // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1551, 2291), // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1749, 573), // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :101:33) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(1073, 2292), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :129:10) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2293, 2138), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :130:11) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2294, 2140), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :131:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2295, 2142), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :131:35) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2296, 2151), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :131:51) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1552, 1091), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :97:30) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1553, 2153), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1554, 825), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(1555, 828), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Add(1767, 2157), // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:21) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(2298, 1090), // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:45) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(2297, 2299), // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1556, 2300), // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1772, 587), // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :101:33) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(783, 14), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :138:9) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2301, 2302), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :137:11) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2303, 46), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :138:42) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(2095, 780), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :139:40) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(2304, 2305), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :139:8) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(2107, 777), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :139:75) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(2306, 2307), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :139:47) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2308, 2164), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :139:82) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2309, 2166), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :140:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2310, 2168), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :140:35) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2311, 2173), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :140:51) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1557, 1304), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :97:30) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1558, 2175), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1559, 831), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(1560, 834), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Add(1789, 2179), // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:21) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(2313, 1303), // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:45) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(2312, 2314), // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1561, 2315), // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1794, 597), // loc(callsite(unknown at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :101:33) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(2316, 2302), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :146:16) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2317, 45), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :147:42) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1720, 780), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :148:40) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(2318, 2319), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :148:8) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(549, 18), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :148:65) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1366, 2321), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :148:57) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(2322, 777), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :148:75) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(2320, 2323), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :148:47) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2324, 2186), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :148:82) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1562, 1697), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :150:25) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(2325, 1312), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:28) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(2326, 48), // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:41) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1563, 837), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :67:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(1564, 840), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :67:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Sub(2327, 1802), // loc(callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :68:8) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1565, 2328), // loc(callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :68:8) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(1084, 722), // loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :106:10) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :62:15) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1566, 2329), // loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :106:10) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :62:15) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(1090, 723), // loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :107:11) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :62:15) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1567, 2330), // loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :107:11) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :62:15) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1568, 843), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :64:30) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(841, 14), // loc(callsite(unknown at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :65:36) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(1303, 2331), // loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :106:10) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :65:15) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1569, 2332), // loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :106:10) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :65:15) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(1312, 2331), // loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :107:11) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :65:15) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1570, 2333), // loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :107:11) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :65:15) at callsite( OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :114:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :28:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1571, 1313), // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(1572, 1321), // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndCond(1522, 368, 1573), // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(1276, 2274), // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :118:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(1575, 1068), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :54:27) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1576, 1074), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :55:27) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1577, 1699), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :50:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1578, 1700), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :51:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1579, 1713), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :52:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1580, 1714), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :53:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1581, 1715), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :59:31) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1582, 779), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :60:26) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(1583, 2275), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :62:10) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1584, 2277), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:11) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1585, 2279), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:7) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1586, 1718), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :50:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1587, 1363), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :51:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1588, 1741), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :52:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1589, 1766), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :53:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1590, 1786), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :59:31) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1591, 782), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :60:26) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(1592, 2280), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :62:10) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1593, 2282), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:11) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1594, 2284), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:7) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1595, 785), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :118:25) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1596, 1079), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :119:31) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1597, 2286), // loc(callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :120:11) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1598, 1085), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :97:30) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1599, 2127), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1600, 788), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(1601, 791), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(1602, 2291), // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1603, 1091), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :97:30) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1604, 2153), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1605, 825), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(1606, 828), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(1607, 2300), // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2301, 46), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :138:42) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2334, 2164), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :139:82) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2335, 2166), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :140:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2336, 2168), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :140:35) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2337, 2173), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :140:51) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1608, 1304), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :97:30) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1609, 2175), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1610, 831), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(1611, 834), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Sub(2338, 2314), // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1612, 2339), // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2316, 45), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :147:42) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2340, 2186), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :148:82) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1613, 1697), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :150:25) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(2341, 1312), // loc(callsite(unknown at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:28) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(2342, 48), // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:41) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1614, 837), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :67:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(1615, 840), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :67:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Sub(2343, 1802), // loc(callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :68:8) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1616, 2344), // loc(callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :68:8) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1617, 2329), // loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :106:10) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :62:15) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1618, 2330), // loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :107:11) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :62:15) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1619, 843), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :64:30) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1620, 2332), // loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :106:10) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :65:15) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1621, 2333), // loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :107:11) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :65:15) at callsite( OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :119:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :29:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1622, 1313), // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(1623, 1321), // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndCond(1574, 371, 1624), // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Sub(2043, 2), // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :123:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(1275, 2345), // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :123:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(1626, 2274), // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :123:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(1627, 1068), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :54:27) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1628, 1074), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :55:27) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1629, 1699), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :50:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1630, 1700), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :51:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1631, 1713), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :52:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1632, 1714), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :53:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1633, 1715), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :59:31) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1634, 779), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :60:26) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(1635, 2275), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :62:10) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1636, 2277), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:11) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1637, 2279), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:7) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1638, 1718), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :50:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1639, 1363), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :51:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1640, 1741), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :52:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1641, 1766), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :53:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1642, 1786), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :59:31) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1643, 782), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :60:26) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(1644, 2280), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :62:10) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1645, 2282), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:11) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1646, 2284), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:7) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1647, 785), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :118:25) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1648, 1079), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :119:31) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1649, 2286), // loc(callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :120:11) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1650, 1085), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :97:30) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1651, 2127), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1652, 788), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(1653, 791), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(1654, 2291), // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1655, 1091), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :97:30) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1656, 2153), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1657, 825), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(1658, 828), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(1659, 2300), // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1660, 1304), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :97:30) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1661, 2175), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1662, 831), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(1663, 834), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(1664, 2315), // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1665, 1697), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :150:25) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1666, 837), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :67:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(1667, 840), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :67:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(1668, 2328), // loc(callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :68:8) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1669, 2329), // loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :106:10) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :62:15) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1670, 2330), // loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :107:11) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :62:15) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1671, 843), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :64:30) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1672, 2332), // loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :106:10) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :65:15) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1673, 2333), // loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :107:11) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :65:15) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1674, 1313), // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(1675, 1321), // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndCond(1625, 374, 1676), // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Sub(2043, 1), // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :128:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(1275, 2346), // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :128:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(1678, 2274), // loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :128:20) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(1679, 1068), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :54:27) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :129:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1680, 1074), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :55:27) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :129:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1681, 1699), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :50:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :129:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1682, 1700), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :51:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :129:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1683, 1713), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :52:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :129:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1684, 1714), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :53:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :129:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1685, 1715), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :59:31) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :129:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1686, 779), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :60:26) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :129:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(1687, 2275), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :62:10) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :129:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1688, 2277), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:11) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :129:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1689, 2279), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:7) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :115:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :129:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1690, 1718), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :50:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :129:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1691, 1363), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :51:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :129:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1692, 1741), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :52:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :129:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1693, 1766), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :53:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :129:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1694, 1786), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :59:31) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :129:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1695, 782), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :60:26) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :129:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(1696, 2280), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :62:10) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :129:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1697, 2282), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :63:11) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :129:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1698, 2284), // loc(callsite( ExpandU32 ( zirgen/circuit/rv32im/v2/dsl/mult.zir :67:7) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :116:19) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :129:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1699, 785), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :118:25) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :129:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1700, 1079), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :119:31) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :129:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1701, 2286), // loc(callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :120:11) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :129:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1702, 1085), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :97:30) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :129:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1703, 2127), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :129:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1704, 788), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :129:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(1705, 791), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :129:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(1706, 2291), // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :122:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :129:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1707, 1091), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :97:30) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :129:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1708, 2153), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :129:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1709, 825), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :129:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(1710, 828), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :129:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(1711, 2300), // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :128:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :129:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1712, 1304), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :97:30) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :129:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1713, 2175), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :98:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :129:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1714, 831), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :129:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(1715, 834), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :99:35) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :129:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(1716, 2339), // loc(callsite( SplitTotal ( zirgen/circuit/rv32im/v2/dsl/mult.zir :100:6) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :136:20) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :129:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1717, 1697), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :150:25) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :129:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1718, 837), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :55:24) at callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :67:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :129:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(1719, 840), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NondetFakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :56:24) at callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :67:28) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :129:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::AndEqz(1720, 2344), // loc(callsite( FakeTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :68:8) at callsite( MultiplyAccumulate ( zirgen/circuit/rv32im/v2/dsl/mult.zir :151:26) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :60:29) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :129:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1721, 2329), // loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :106:10) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :62:15) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :129:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1722, 2330), // loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :107:11) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :62:15) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :129:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1723, 843), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :64:30) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :129:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1724, 2332), // loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :106:10) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :65:15) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :129:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1725, 2333), // loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :107:11) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :65:15) at callsite( OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :129:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :31:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1726, 1313), // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(1727, 1321), // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndCond(1677, 377, 1728), // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Mul(1129, 356), // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Sub(14, 1130), // loc(callsite(unknown at callsite( FlipU16 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :77:14) at callsite( FlipU32 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :81:18) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :95:11) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1129, 2348), // loc(callsite(unknown at callsite( FlipU16 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :77:4) at callsite( FlipU32 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :81:18) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :95:11) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(0, 1129), // loc(callsite(unknown at callsite( FlipU16 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :77:29) at callsite( FlipU32 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :81:18) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :95:11) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(2350, 1130), // loc(callsite(unknown at callsite( FlipU16 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :77:39) at callsite( FlipU32 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :81:18) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :95:11) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2349, 2351), // loc(callsite(unknown at callsite( FlipU16 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :77:24) at callsite( FlipU32 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :81:18) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :95:11) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(2352, 359), // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Mul(1129, 362), // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Mul(2352, 365), // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Mul(1121, 368), // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Mul(1121, 371), // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Get(114), // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :54:27) at callsite( OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :124:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :30:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(2358, 374), // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Mul(2358, 377), // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(2347, 2353), // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(2361, 2354), // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(2362, 2355), // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(2363, 2356), // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(2364, 2357), // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(2365, 2359), // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(2366, 2360), // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Mul(1130, 356), // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Sub(14, 1131), // loc(callsite(unknown at callsite( FlipU16 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :77:14) at callsite( FlipU32 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :81:42) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :95:11) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1129, 2369), // loc(callsite(unknown at callsite( FlipU16 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :77:4) at callsite( FlipU32 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :81:42) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :95:11) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(2350, 1131), // loc(callsite(unknown at callsite( FlipU16 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :77:39) at callsite( FlipU32 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :81:42) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :95:11) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2370, 2371), // loc(callsite(unknown at callsite( FlipU16 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :77:24) at callsite( FlipU32 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :81:42) at callsite( OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :95:11) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :25:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(2372, 359), // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Mul(1130, 362), // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Mul(2372, 365), // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Mul(1122, 368), // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Mul(1122, 371), // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Mul(1899, 374), // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Mul(1899, 377), // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(2368, 2373), // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(2380, 2374), // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(2381, 2375), // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(2382, 2376), // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(2383, 2377), // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(2384, 2378), // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(2385, 2379), // loc(callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :23:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(1729, 904), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(2035, 905), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:4) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(2387, 903), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(1730, 2388), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(902, 2035), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:4) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1731, 2389), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:17) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(902, 905), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:4) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1732, 2390), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:17) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(903, 2035), // loc(callsite(unknown at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :41:11) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(0, 903), // loc(callsite(unknown at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :42:90) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(2392, 17), // loc(callsite(unknown at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :42:102) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(473, 2393), // loc(callsite(unknown at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :42:85) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(2394, 2391), // loc(callsite(unknown at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :42:106) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(2395, 908), // loc(callsite( Reg ( :5:7) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :42:21) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(1733, 2396), // loc(callsite( Reg ( :5:7) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :42:21) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(914, 15), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1734, 2397), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(926, 0), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1735, 2398), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1736, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1737, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(911, 908), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1738, 2399), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(343, 917), // loc(callsite(unknown at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:22) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(935, 0), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1739, 2401), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(938, 2400), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1740, 2402), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(929, 2367), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(1741, 2403), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(932, 2386), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(1742, 2404), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :33:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(941, 0), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :34:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(1743, 2405), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :34:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(1744, 949), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :45:28) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :34:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(947, 30), // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:12) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :34:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(2406, 944), // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :34:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(474, 2407), // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:10) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :34:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(1745, 2408), // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:10) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :34:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Add(348, 947), // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :48:14) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :34:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(981, 0), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :34:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(1746, 2410), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :34:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(1747, 989), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :51:29) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :34:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(987, 30), // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:11) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :34:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(2411, 984), // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:23) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :34:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(2409, 2412), // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :34:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(1748, 2413), // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:9) at callsite( Div0 ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :34:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :74:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndCond(1217, 413, 1749), // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Sub(0, 1341), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:11) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :63:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(1341, 2414), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:4) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :63:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(6, 1341), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:23) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :63:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(2415, 2416), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:18) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :63:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(5, 1341), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:35) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :63:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(2417, 2418), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :63:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(26, 2419), // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :63:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1751, 1714), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :65:23) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(1357, 469), // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :65:23) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1752, 2420), // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :65:23) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(0, 1356), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(1356, 2421), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(1753, 2422), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(348, 1358), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:4) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(2423, 2421), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1754, 2424), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1356, 348), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:4) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1755, 2425), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:17) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1356, 1358), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:4) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1756, 2426), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:17) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1757, 1356), // loc(callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:19) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1758, 1718), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :69:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1717, 4), // loc(callsite(unknown at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :71:4) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2427, 1341), // loc(callsite(unknown at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :71:12) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(2428, 346), // loc(callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :71:21) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1759, 2429), // loc(callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :71:21) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(470, 1717), // loc(callsite(unknown at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :73:23) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1760, 1341), // loc(callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :26:17) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(1360, 15), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1761, 2431), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(549, 0), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1762, 2432), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1763, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1764, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(1359, 2430), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1765, 2433), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(1366, 552), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1766, 2434), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(1367, 559), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1767, 2435), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(343, 1361), // loc(callsite(unknown at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1768, 2127), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(573, 2436), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1769, 2437), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(0, 740), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :15:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(740, 2438), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :15:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(1770, 2439), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :15:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(0, 1084), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:11) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :16:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(1084, 2440), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:4) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :16:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(6, 1084), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:23) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :16:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(2441, 2442), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:18) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :16:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(5, 1084), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:35) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :16:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(2443, 2444), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :16:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(1771, 2445), // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :16:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(0, 741), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:11) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :17:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(741, 2446), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:4) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :17:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(6, 741), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:23) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :17:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(2447, 2448), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:18) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :17:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(5, 741), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:35) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :17:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(2449, 2450), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :17:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(1772, 2451), // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :17:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(0, 1090), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:11) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :18:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(1090, 2452), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:4) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :18:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(6, 1090), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:23) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :18:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(2453, 2454), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:18) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :18:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(5, 1090), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:35) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :18:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(2455, 2456), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :18:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(1773, 2457), // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :18:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(0, 1302), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:11) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :19:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(1302, 2458), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:4) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :19:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(6, 1302), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:23) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :19:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(2459, 2460), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:18) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :19:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(5, 1302), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:35) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :19:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(2461, 2462), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :19:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(1774, 2463), // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :19:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(0, 1303), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:11) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :20:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(1303, 2464), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:4) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :20:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(6, 1303), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:23) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :20:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(2465, 2466), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:18) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :20:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(5, 1303), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:35) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :20:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(2467, 2468), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :20:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(1775, 2469), // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :20:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1776, 1307), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :21:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(0, 1312), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:11) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :22:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(1312, 2470), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:4) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :22:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(6, 1312), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:23) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :22:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(2471, 2472), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:18) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :22:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(5, 1312), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:35) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :22:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(2473, 2474), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :22:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(1777, 2475), // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :22:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(0, 1313), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:11) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :23:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(1313, 2476), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:4) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :23:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(6, 1313), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:23) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :23:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(2477, 2478), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:18) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :23:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(5, 1313), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:35) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :23:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(2479, 2480), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :23:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(1778, 2481), // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :23:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1779, 1317), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :24:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(0, 1321), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :25:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(1321, 2482), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :25:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(1780, 2483), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :25:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(0, 1322), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:11) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :26:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(1322, 2484), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:4) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :26:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(6, 1322), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:23) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :26:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(2485, 2486), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:18) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :26:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(5, 1322), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:35) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :26:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(2487, 2488), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :26:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(1781, 2489), // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :26:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(6, 1324), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:23) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :27:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(1326, 2490), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:18) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :27:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(5, 1324), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:35) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :27:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(2491, 2492), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :27:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(1782, 2493), // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :27:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(0, 1331), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:11) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(1331, 2494), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:4) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(6, 1331), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:23) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(2495, 2496), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:18) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(5, 1331), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:35) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(2497, 2498), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(1783, 2499), // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(0, 1332), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:11) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :29:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(1332, 2500), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:4) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :29:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(6, 1332), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:23) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :29:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(2501, 2502), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:18) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :29:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(5, 1332), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:35) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :29:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(2503, 2504), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :29:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(1784, 2505), // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :29:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(740, 26), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :37:16) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1084, 25), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :38:16) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2506, 2507), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :37:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(741, 24), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :39:16) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2508, 2509), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :38:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1090, 23), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :40:16) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2510, 2511), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :39:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1302, 22), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :41:16) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2512, 2513), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :40:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1303, 11), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :42:16) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2514, 2515), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :41:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1305, 21), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :43:16) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2516, 2517), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :42:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1312, 4), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :44:16) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2518, 2519), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :43:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2520, 1313), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :44:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(559, 2521), // loc(callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :37:14) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1785, 2522), // loc(callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :37:14) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(1315, 26), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :46:15) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1321, 12), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :47:15) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2523, 2524), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :46:24) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1322, 20), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :48:15) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2525, 2526), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :47:24) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1324, 19), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :49:15) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2527, 2528), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :48:24) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2529, 1871), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :49:24) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1332, 22), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :51:15) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2530, 2531), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :50:24) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2532, 1334), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :51:24) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(552, 2533), // loc(callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :46:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1786, 2534), // loc(callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :46:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(1312, 10), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :55:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1313, 6), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :55:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2535, 2536), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :55:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2537, 1315), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :55:42) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1302, 10), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :56:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1303, 6), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :56:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2539, 2540), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :56:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2541, 1305), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :56:42) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1324, 10), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :57:17) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1331, 6), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :57:30) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2543, 2544), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :57:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2545, 1332), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :57:39) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1084, 21), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :58:23) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(741, 4), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :58:38) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2547, 2548), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :58:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2549, 1090), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :58:47) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(740, 17), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :59:20) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2551, 2550), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :59:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1321, 4), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :60:20) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2553, 1322), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :60:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(740, 16), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :66:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(2552, 11), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :66:45) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2555, 2556), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :66:36) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2557, 2542), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :66:53) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(740, 14), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :66:63) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :10:32) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(473, 2538), // loc(callsite(unknown at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :34:79) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :11:25) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(2560, 638), // loc(callsite( Reg ( :5:7) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :34:15) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :11:25) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1787, 2561), // loc(callsite( Reg ( :5:7) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :34:15) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :11:25) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(587, 15), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :11:25) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1788, 2562), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :11:25) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(607, 0), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :11:25) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1789, 2563), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :11:25) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1790, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :11:25) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1791, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :11:25) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(580, 638), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :11:25) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1792, 2564), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :11:25) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(597, 610), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :11:25) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1793, 2565), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :11:25) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(604, 617), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :11:25) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1794, 2566), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :11:25) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(343, 590), // loc(callsite(unknown at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :11:25) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(624, 0), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :11:25) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1795, 2568), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :11:25) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(631, 2567), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :11:25) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1796, 2569), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :11:25) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(610, 2558), // loc(callsite(unknown at callsite( AddU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :27:21) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :12:35) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(617, 2559), // loc(callsite(unknown at callsite( AddU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :27:36) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :12:35) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(1596, 0), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :12:28) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1797, 2572), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :12:28) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1798, 1976), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :45:28) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :12:28) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(512, 30), // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:12) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :12:28) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(2573, 505), // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:23) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :12:28) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(2570, 2574), // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:10) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :12:28) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(1799, 2575), // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:10) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :12:28) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(2571, 512), // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :48:14) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :12:28) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(513, 0), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :12:28) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1800, 2577), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :12:28) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1801, 1980), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :51:29) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :12:28) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(517, 30), // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:11) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :12:28) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(2578, 516), // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:23) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :12:28) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(2576, 2579), // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:9) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :12:28) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(1802, 2580), // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:9) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :12:28) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(1803, 1986), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :81:31) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :13:36) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1804, 1565), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :82:31) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :13:36) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(525, 6), // loc(callsite(unknown at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :83:19) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :13:36) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(2581, 524), // loc(callsite(unknown at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :83:26) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :13:36) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(468, 516), // loc(callsite(unknown at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :85:53) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :13:36) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(532, 0), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :85:23) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :13:36) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1805, 2584), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :85:23) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :13:36) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(531, 2583), // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :85:23) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :13:36) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1806, 2585), // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :85:23) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :13:36) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1807, 1950), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :87:10) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :13:36) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(516, 534), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:4) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :87:10) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :13:36) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(2586, 1949), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :87:10) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :13:36) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1808, 2587), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :87:10) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :13:36) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(533, 516), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:4) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :87:10) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :13:36) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1809, 2588), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:17) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :87:10) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :13:36) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(533, 534), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:4) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :87:10) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :13:36) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1810, 2589), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:17) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :87:10) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :13:36) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1811, 533), // loc(callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :87:19) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :13:36) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(535, 0), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :89:25) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :13:36) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1812, 2590), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :89:25) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :13:36) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(536, 4), // loc(callsite(unknown at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :91:4) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :13:36) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(2591, 2582), // loc(callsite(unknown at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :91:12) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :13:36) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(2592, 505), // loc(callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :91:21) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :13:36) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(1813, 2593), // loc(callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :91:21) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :13:36) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(516, 12), // loc(callsite(unknown at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :93:19) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :13:36) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(2594, 536), // loc(callsite(unknown at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :93:30) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :13:36) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(538, 15), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :14:29) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1814, 2596), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :14:29) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1815, 1580), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :14:29) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1816, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :14:29) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1817, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :14:29) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(537, 2595), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :14:29) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1818, 2597), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :14:29) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(546, 699), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :14:29) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1819, 2598), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :14:29) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(698, 700), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :14:29) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1820, 2599), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :14:29) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(343, 545), // loc(callsite(unknown at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :14:29) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1821, 1969), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :14:29) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(702, 2600), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :14:29) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1822, 2601), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( MemLoadInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :14:29) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :49:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(1334, 5), // loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :57:19) at callsite( OpLB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :83:18) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :51:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(525, 700), // loc(callsite(unknown at callsite( OpLB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :84:24) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :51:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(1564, 699), // loc(callsite(unknown at callsite( OpLB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :84:69) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :51:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(2603, 2604), // loc(callsite(unknown at callsite( OpLB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :84:42) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :51:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(0, 2602), // loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :57:19) at callsite( OpLB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :83:18) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :51:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(1824, 2554), // loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at callsite( OpLB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :83:18) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :51:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(1825, 1068), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitWord ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :33:31) at callsite( OpLB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :85:22) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :51:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1826, 1074), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitWord ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :34:31) at callsite( OpLB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :85:22) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :51:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(1073, 18), // loc(callsite(unknown at callsite( SplitWord ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :35:11) at callsite( OpLB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :85:22) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :51:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(2606, 1067), // loc(callsite(unknown at callsite( SplitWord ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :35:19) at callsite( OpLB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :85:22) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :51:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(2605, 2607), // loc(callsite( SplitWord ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :35:9) at callsite( OpLB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :85:22) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :51:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(1827, 2608), // loc(callsite( SplitWord ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :35:9) at callsite( OpLB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :85:22) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :51:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(524, 1073), // loc(callsite(unknown at callsite( OpLB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :86:23) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :51:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(1985, 1067), // loc(callsite(unknown at callsite( OpLB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :86:64) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :51:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(2609, 2610), // loc(callsite(unknown at callsite( OpLB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :86:36) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :51:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(0, 703), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OpLB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :87:27) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :51:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(703, 2612), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OpLB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :87:27) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :51:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1828, 2613), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OpLB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :87:27) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :51:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1829, 1079), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( OpLB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :88:25) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :51:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(703, 22), // loc(callsite(unknown at callsite( OpLB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :89:11) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :51:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(2614, 1081), // loc(callsite(unknown at callsite( OpLB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :89:21) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :51:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(2611, 2615), // loc(callsite( OpLB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :89:9) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :51:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(1830, 2616), // loc(callsite( OpLB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :89:9) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :51:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndCond(1823, 356, 1831), // loc(callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :50:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Sub(2554, 0), // loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at callsite( OpLH ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :94:18) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :52:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(1824, 2617), // loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at callsite( OpLH ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :94:18) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :52:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(1833, 524), // loc(callsite( OpLH ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :95:20) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :52:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(1834, 2613), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OpLH ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :97:27) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :52:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1835, 1068), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( OpLH ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :98:26) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :52:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(703, 26), // loc(callsite(unknown at callsite( OpLH ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :99:12) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :52:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(2618, 1819), // loc(callsite(unknown at callsite( OpLH ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :99:22) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :52:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(2605, 2619), // loc(callsite( OpLH ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :99:10) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :52:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(1836, 2620), // loc(callsite( OpLH ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :99:10) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :52:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(1837, 738), // loc(callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :50:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(1838, 739), // loc(callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :50:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndCond(1832, 359, 1839), // loc(callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :50:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Sub(2554, 6), // loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at callsite( OpLW ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :104:18) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :53:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(1824, 2621), // loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at callsite( OpLW ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :104:18) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :53:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(1841, 524), // loc(callsite( OpLW ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :105:20) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :53:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(1842, 525), // loc(callsite( OpLW ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :106:20) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :53:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(1843, 737), // loc(callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :50:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(1844, 738), // loc(callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :50:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(1845, 739), // loc(callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :50:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndCond(1840, 362, 1846), // loc(callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :50:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Sub(2554, 4), // loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at callsite( OpLBU ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :111:18) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :54:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(1824, 2622), // loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at callsite( OpLBU ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :111:18) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :54:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(1848, 1068), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitWord ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :33:31) at callsite( OpLBU ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :113:22) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :54:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1849, 1074), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitWord ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :34:31) at callsite( OpLBU ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :113:22) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :54:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1850, 2608), // loc(callsite( SplitWord ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :35:9) at callsite( OpLBU ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :113:22) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :54:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(1851, 739), // loc(callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :50:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndCond(1847, 365, 1852), // loc(callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :50:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Sub(2554, 3), // loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at callsite( OpLHU ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :119:18) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :55:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(1824, 2623), // loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at callsite( OpLHU ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :119:18) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :55:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(1854, 524), // loc(callsite( OpLHU ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :120:20) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :55:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(1855, 737), // loc(callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :50:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(1856, 738), // loc(callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :50:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(1857, 739), // loc(callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :50:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndCond(1853, 368, 1858), // loc(callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :50:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndCond(1859, 371, 1178), // loc(callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :50:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndCond(1860, 374, 1178), // loc(callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :50:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndCond(1861, 377, 1178), // loc(callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :50:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Mul(524, 1899), // loc(callsite(unknown at callsite( OpLB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :86:23) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :51:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(1985, 2358), // loc(callsite(unknown at callsite( OpLB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :86:64) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :51:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(2624, 2625), // loc(callsite(unknown at callsite( OpLB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :86:36) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :51:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Get(227), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OpLB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :87:27) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :51:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(2627, 49), // loc(callsite(unknown at callsite( OpLB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :90:18) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :51:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(2626, 2628), // loc(callsite(unknown at callsite( OpLB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :90:11) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :51:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(2629, 356), // loc(callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :50:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Mul(2605, 359), // loc(callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :50:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Mul(699, 362), // loc(callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :50:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Mul(2626, 365), // loc(callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :50:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Mul(2605, 368), // loc(callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :50:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(2630, 2631), // loc(callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :50:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(2635, 2632), // loc(callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :50:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(2636, 2633), // loc(callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :50:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(2637, 2634), // loc(callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :50:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Mul(2627, 14), // loc(callsite(unknown at callsite( OpLB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :90:36) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :51:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(2639, 356), // loc(callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :50:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Mul(2639, 359), // loc(callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :50:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Mul(700, 362), // loc(callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :50:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(2640, 2641), // loc(callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :50:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(2643, 2642), // loc(callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :50:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Sub(0, 704), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :60:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(704, 2645), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :60:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1862, 2646), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :60:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(2546, 711), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:4) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :60:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(2647, 2645), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :60:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(1863, 2648), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :60:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(704, 2546), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:4) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :60:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1864, 2649), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:17) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :60:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(704, 711), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:4) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :60:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1865, 2650), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:17) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :39:19) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :60:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(2645, 2546), // loc(callsite(unknown at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :41:11) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :60:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(0, 2645), // loc(callsite(unknown at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :42:90) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :60:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(2652, 17), // loc(callsite(unknown at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :42:102) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :60:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(473, 2653), // loc(callsite(unknown at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :42:85) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :60:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(2654, 2651), // loc(callsite(unknown at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :42:106) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :60:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(2655, 712), // loc(callsite( Reg ( :5:7) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :42:21) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :60:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(1866, 2656), // loc(callsite( Reg ( :5:7) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :42:21) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :60:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(719, 15), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :60:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1867, 2657), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :60:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(722, 0), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :60:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1868, 2658), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :60:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1869, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :60:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1870, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :60:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(695, 712), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :60:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1871, 2659), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :60:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(343, 718), // loc(callsite(unknown at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:22) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :60:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(725, 0), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :60:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1872, 2661), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :60:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(732, 2660), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :60:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1873, 2662), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :60:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(723, 2638), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :60:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(1874, 2663), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :60:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(724, 2644), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :60:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(1875, 2664), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( WriteRd ( zirgen/circuit/rv32im/v2/dsl/inst.zir :43:15) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :60:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(733, 0), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :61:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(1876, 2665), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :61:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(1877, 746), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :45:28) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :61:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(1069, 716), // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:23) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :61:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(474, 2666), // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:10) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :61:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(1878, 2667), // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:10) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :61:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Add(348, 744), // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :48:14) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :61:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(747, 0), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :61:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(1879, 2669), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :61:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(1880, 755), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :51:29) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :61:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(753, 30), // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:11) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :61:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(2670, 750), // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:23) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :61:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(2668, 2671), // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:9) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :61:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(1881, 2672), // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:9) at callsite( Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :61:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :75:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndCond(1750, 416, 1882), // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Sub(0, 1357), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:11) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :63:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(1357, 2673), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:4) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :63:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(6, 1357), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:23) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :63:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(2674, 2675), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:18) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :63:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(5, 1357), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:35) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :63:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(2676, 2677), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :63:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(26, 2678), // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :63:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1884, 1715), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :65:23) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(1358, 469), // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :65:23) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1885, 2679), // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :65:23) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(0, 1716), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(1716, 2680), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(1886, 2681), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(348, 1717), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:4) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(2682, 2680), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1887, 2683), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1716, 348), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:4) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1888, 2684), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:17) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1716, 1717), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:4) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1889, 2685), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:17) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1890, 1716), // loc(callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :67:19) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1891, 1363), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :69:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1360, 4), // loc(callsite(unknown at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :71:4) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2686, 1357), // loc(callsite(unknown at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :71:12) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(2687, 346), // loc(callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :71:21) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1892, 2688), // loc(callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :71:21) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(470, 1360), // loc(callsite(unknown at callsite( AddrDecompose ( zirgen/circuit/rv32im/v2/dsl/u32.zir :73:23) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :24:28) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1893, 1357), // loc(callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :26:17) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(1366, 15), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1894, 2690), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(559, 0), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1895, 2691), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1896, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1897, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(1361, 2689), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1898, 2692), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(549, 566), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1899, 2693), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(552, 573), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1900, 2694), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(343, 1367), // loc(callsite(unknown at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1901, 2153), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(587, 2695), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1902, 2696), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :28:27) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1903, 2447), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :15:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1904, 2457), // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :16:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1905, 2463), // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :17:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1906, 2469), // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :18:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(6, 1305), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:23) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :19:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(1307, 2697), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:18) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :19:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(5, 1305), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:35) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :19:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(2698, 2699), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :19:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(1907, 2700), // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :19:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1908, 2475), // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :20:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1909, 2477), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :21:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(6, 1315), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:23) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :22:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(1317, 2701), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:18) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :22:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(5, 1315), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:35) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :22:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(2702, 2703), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :22:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(1910, 2704), // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :22:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(6, 1321), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:23) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :23:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(2483, 2705), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:18) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :23:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(5, 1321), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:35) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :23:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(2706, 2707), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :23:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(1911, 2708), // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :23:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1912, 2485), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :24:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1913, 1326), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :25:25) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1914, 2499), // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :26:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1915, 2505), // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :27:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(6, 1334), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:23) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(1336, 2709), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:18) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(5, 1334), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:35) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(2710, 2711), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(1916, 2712), // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :28:27) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(6, 1340), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:23) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :29:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(1343, 2713), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:18) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :29:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(5, 1340), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:35) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :29:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(2714, 2715), // loc(callsite(unknown at callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:30) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :29:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(1917, 2716), // loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at callsite( NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14) at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :29:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(741, 26), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :37:16) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1090, 25), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :38:16) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2717, 2718), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :37:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1302, 24), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :39:16) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2719, 2720), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :38:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1303, 23), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :40:16) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2721, 2722), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :39:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1305, 22), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :41:16) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2723, 2724), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :40:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1312, 11), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :42:16) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2725, 2726), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :41:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1313, 21), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :43:16) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2727, 2728), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :42:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1315, 4), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :44:16) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2729, 2730), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :43:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2731, 1321), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :44:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(573, 2732), // loc(callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :37:14) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1918, 2733), // loc(callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :37:14) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(1322, 26), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :46:15) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1324, 12), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :47:15) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2734, 2735), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :46:24) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1331, 20), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :48:15) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2736, 2737), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :47:24) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1332, 19), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :49:15) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2738, 2739), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :48:24) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2740, 2094), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :49:24) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1340, 22), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :51:15) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2741, 2742), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :50:24) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2743, 1341), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :51:24) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(566, 2744), // loc(callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :46:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1919, 2745), // loc(callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :46:13) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(1315, 10), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :55:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1321, 6), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :55:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2746, 2747), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :55:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2748, 1322), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :55:42) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1305, 10), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :56:18) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1312, 6), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :56:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2750, 2751), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :56:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2752, 1313), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :56:42) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1332, 10), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :57:17) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1334, 6), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :57:30) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2754, 2755), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :57:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2756, 1340), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :57:39) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1090, 21), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :58:23) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1302, 4), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :58:38) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2758, 2759), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :58:32) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2760, 1303), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :58:47) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(741, 17), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :59:20) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2762, 2761), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :59:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1324, 4), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :60:20) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2764, 1331), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :60:28) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(741, 16), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :67:26) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(2763, 11), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :67:45) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2766, 2767), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :67:36) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(2768, 2757), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :67:53) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(741, 14), // loc(callsite(unknown at callsite( Decoder ( zirgen/circuit/rv32im/v2/dsl/decode.zir :67:62) at callsite( DecodeInst ( zirgen/circuit/rv32im/v2/dsl/inst.zir :30:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :20:32) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(473, 2749), // loc(callsite(unknown at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :34:79) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :21:25) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(2771, 505), // loc(callsite( Reg ( :5:7) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :34:15) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :21:25) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1920, 2772), // loc(callsite( Reg ( :5:7) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :34:15) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :21:25) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(597, 15), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :21:25) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1921, 2773), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :21:25) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(617, 0), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :21:25) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1922, 2774), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :21:25) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1923, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :21:25) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1924, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :21:25) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(590, 505), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :21:25) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1925, 2775), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :21:25) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(607, 624), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :21:25) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1926, 2776), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :21:25) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(610, 631), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :21:25) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1927, 2777), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :21:25) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(343, 604), // loc(callsite(unknown at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :21:25) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(638, 0), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :21:25) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1928, 2779), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :21:25) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(1596, 2778), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :21:25) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1929, 2780), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :21:25) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(473, 2753), // loc(callsite(unknown at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :34:79) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :22:25) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(2781, 535), // loc(callsite( Reg ( :5:7) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :34:15) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :22:25) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1930, 2782), // loc(callsite( Reg ( :5:7) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :34:15) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :22:25) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(513, 15), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :22:25) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1931, 2783), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :22:25) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(525, 0), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :22:25) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1932, 2784), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :22:25) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1933, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :22:25) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1934, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :22:25) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(512, 535), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :22:25) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1935, 2785), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :22:25) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(517, 532), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :22:25) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1936, 2786), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :22:25) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(524, 531), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :22:25) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1937, 2787), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :22:25) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(343, 516), // loc(callsite(unknown at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :22:25) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(533, 0), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :22:25) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1938, 2789), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :22:25) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(534, 2788), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :22:25) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1939, 2790), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadReg ( zirgen/circuit/rv32im/v2/dsl/inst.zir :35:14) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :22:25) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(624, 2769), // loc(callsite(unknown at callsite( AddU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :27:21) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :23:35) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(631, 2770), // loc(callsite(unknown at callsite( AddU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :27:36) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :23:35) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1940, 540), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :23:28) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(0, 538), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :45:28) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :23:28) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(538, 2793), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :45:28) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :23:28) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1941, 2794), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :45:28) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :23:28) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(538, 30), // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:12) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :23:28) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(2795, 537), // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:23) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :23:28) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(2791, 2796), // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:10) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :23:28) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(1942, 2797), // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:10) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :23:28) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(2792, 538), // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :48:14) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :23:28) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1943, 547), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :23:28) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(0, 698), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :51:29) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :23:28) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(698, 2799), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :51:29) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :23:28) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1944, 2800), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :51:29) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :23:28) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(698, 30), // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:11) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :23:28) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(2801, 546), // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:23) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :23:28) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(2798, 2802), // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:9) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :23:28) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(1945, 2803), // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:9) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :23:28) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(0, 697), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :81:31) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :24:36) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(697, 2804), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :81:31) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :24:36) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1946, 2805), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :81:31) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :24:36) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(0, 699), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :82:31) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :24:36) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(699, 2806), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :82:31) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :24:36) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1947, 2807), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :82:31) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :24:36) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(699, 6), // loc(callsite(unknown at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :83:19) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :24:36) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(2808, 697), // loc(callsite(unknown at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :83:26) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :24:36) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(468, 546), // loc(callsite(unknown at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :85:53) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :24:36) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(700, 0), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :85:23) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :24:36) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1948, 2811), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :85:23) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :24:36) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(701, 2810), // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :85:23) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :24:36) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1949, 2812), // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :85:23) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :24:36) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(0, 702), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :87:10) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :24:36) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(702, 2813), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :87:10) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :24:36) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(1950, 2814), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :87:10) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :24:36) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(546, 703), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:4) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :87:10) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :24:36) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(2815, 2813), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :87:10) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :24:36) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1951, 2816), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :87:10) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :24:36) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(702, 546), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:4) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :87:10) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :24:36) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1952, 2817), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:17) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :87:10) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :24:36) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(702, 703), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:4) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :87:10) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :24:36) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1953, 2818), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:17) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :87:10) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :24:36) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1954, 702), // loc(callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :87:19) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :24:36) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(1955, 1973), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :89:25) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :24:36) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(711, 4), // loc(callsite(unknown at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :91:4) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :24:36) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(2819, 2809), // loc(callsite(unknown at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :91:12) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :24:36) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(2820, 537), // loc(callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :91:21) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :24:36) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(1956, 2821), // loc(callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :91:21) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :24:36) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(546, 12), // loc(callsite(unknown at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :93:19) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :24:36) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(2822, 711), // loc(callsite(unknown at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :93:30) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :24:36) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1957, 2046), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :25:29) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1958, 2047), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :25:29) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1959, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :25:29) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1960, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :25:29) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(712, 2823), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :25:29) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1961, 2824), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :25:29) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1962, 2049), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :25:29) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1963, 2050), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :25:29) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1964, 2052), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :25:29) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(1965, 2053), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( MemStoreInput ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :25:29) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :66:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(1341, 50), // loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :57:19) at callsite( OpSB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :126:18) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :68:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(699, 723), // loc(callsite(unknown at callsite( OpSB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :127:24) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :68:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(2806, 722), // loc(callsite(unknown at callsite( OpSB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :127:69) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :68:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(2826, 2827), // loc(callsite(unknown at callsite( OpSB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :127:42) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :68:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(0, 2825), // loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :57:19) at callsite( OpSB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :126:18) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :68:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(1967, 2765), // loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at callsite( OpSB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :126:18) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :68:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(1968, 1068), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitWord ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :33:31) at callsite( OpSB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :128:27) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :68:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1969, 1074), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitWord ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :34:31) at callsite( OpSB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :128:27) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :68:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(2828, 2607), // loc(callsite( SplitWord ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :35:9) at callsite( OpSB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :128:27) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :68:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(1970, 2829), // loc(callsite( SplitWord ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :35:9) at callsite( OpSB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :128:27) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :68:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(1971, 1079), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitWord ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :33:31) at callsite( OpSB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :129:26) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :68:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1972, 1085), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( SplitWord ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :34:31) at callsite( OpSB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :129:26) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :68:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(1084, 18), // loc(callsite(unknown at callsite( SplitWord ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :35:11) at callsite( OpSB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :129:26) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :68:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(2830, 1078), // loc(callsite(unknown at callsite( SplitWord ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :35:19) at callsite( OpSB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :129:26) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :68:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(532, 2831), // loc(callsite( SplitWord ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :35:9) at callsite( OpSB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :129:26) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :68:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(1973, 2832), // loc(callsite( SplitWord ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :35:9) at callsite( OpSB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :129:26) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :68:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndCond(1966, 356, 1974), // loc(callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :67:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Sub(2765, 0), // loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at callsite( OpSH ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :144:18) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :69:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(1967, 2833), // loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at callsite( OpSH ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :144:18) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :69:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(1976, 697), // loc(callsite( OpSH ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :145:20) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :69:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(1977, 737), // loc(callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :67:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(1978, 738), // loc(callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :67:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(1979, 739), // loc(callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :67:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(1980, 740), // loc(callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :67:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndCond(1975, 359, 1981), // loc(callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :67:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Sub(2765, 6), // loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at callsite( OpSW ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :156:18) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :70:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(1967, 2834), // loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at callsite( OpSW ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :156:18) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :70:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(1983, 697), // loc(callsite( OpSW ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :157:20) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :70:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(1984, 699), // loc(callsite( OpSW ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :158:20) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :70:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(1985, 737), // loc(callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :67:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(1986, 738), // loc(callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :67:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(1987, 739), // loc(callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :67:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(1988, 740), // loc(callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :67:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndCond(1982, 362, 1989), // loc(callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :67:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndCond(1990, 365, 1179), // loc(callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :67:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndCond(1991, 368, 1179), // loc(callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :67:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndCond(1992, 371, 1179), // loc(callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :67:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndCond(1993, 374, 1179), // loc(callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :67:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndCond(1994, 377, 1179), // loc(callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :67:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Mul(697, 2358), // loc(callsite(unknown at callsite( OpSB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :134:6) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :68:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(2804, 1896), // loc(callsite(unknown at callsite( OpSB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :134:37) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :68:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(2835, 2836), // loc(callsite(unknown at callsite( OpSB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :134:22) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :68:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(2804, 1899), // loc(callsite(unknown at callsite( OpSB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :135:20) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :68:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(697, 1896), // loc(callsite(unknown at callsite( OpSB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :135:44) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :68:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(2838, 2839), // loc(callsite(unknown at callsite( OpSB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :135:35) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :68:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(2840, 18), // loc(callsite(unknown at callsite( OpSB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :135:6) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :68:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(2837, 2841), // loc(callsite(unknown at callsite( OpSB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :134:41) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :68:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(699, 722), // loc(callsite(unknown at callsite( OpSB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :138:6) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :68:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(2806, 2842), // loc(callsite(unknown at callsite( OpSB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :138:28) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :68:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(2843, 2844), // loc(callsite(unknown at callsite( OpSB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :138:15) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :68:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(2845, 356), // loc(callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :67:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Mul(2806, 532), // loc(callsite(unknown at callsite( OpSH ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :150:28) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :69:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(2843, 2847), // loc(callsite(unknown at callsite( OpSH ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :150:15) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :69:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(2848, 359), // loc(callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :67:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Mul(532, 362), // loc(callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :67:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(2846, 2849), // loc(callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :67:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(2851, 2850), // loc(callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :67:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Mul(2806, 723), // loc(callsite(unknown at callsite( OpSB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :139:13) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :68:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(699, 2842), // loc(callsite(unknown at callsite( OpSB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :139:28) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :68:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(2853, 2854), // loc(callsite(unknown at callsite( OpSB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :139:21) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :68:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(2855, 356), // loc(callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :67:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Mul(699, 532), // loc(callsite(unknown at callsite( OpSH ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :151:28) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :69:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(2853, 2857), // loc(callsite(unknown at callsite( OpSH ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :151:21) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :69:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(2858, 359), // loc(callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :67:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Mul(531, 362), // loc(callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :67:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(2856, 2859), // loc(callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :67:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(2861, 2860), // loc(callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :67:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Sub(733, 15), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( MemStoreFinalize ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :29:15) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :77:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1995, 2863), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( MemStoreFinalize ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :29:15) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :77:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(750, 0), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( MemStoreFinalize ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :29:15) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :77:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1996, 2864), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( MemStoreFinalize ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :29:15) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :77:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1997, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( MemStoreFinalize ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :29:15) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :77:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1998, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( MemStoreFinalize ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :29:15) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :77:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(732, 2823), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( MemStoreFinalize ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :29:15) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :77:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(1999, 2865), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( MemStoreFinalize ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :29:15) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :77:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(343, 716), // loc(callsite(unknown at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:22) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( MemStoreFinalize ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :29:15) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :77:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(759, 0), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( MemStoreFinalize ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :29:15) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :77:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(2000, 2867), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( MemStoreFinalize ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :29:15) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :77:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(762, 2866), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( MemStoreFinalize ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :29:15) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :77:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(2001, 2868), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( MemStoreFinalize ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :29:15) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :77:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(753, 2852), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( MemStoreFinalize ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :29:15) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :77:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(2002, 2869), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( MemStoreFinalize ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :29:15) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :77:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(756, 2862), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( MemStoreFinalize ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :29:15) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :77:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(2003, 2870), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( MemStoreFinalize ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :29:15) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :77:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(765, 0), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :78:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(2004, 2871), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :78:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(2005, 773), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :45:28) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :78:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(771, 30), // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:12) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :78:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(2872, 768), // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:23) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :78:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(474, 2873), // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:10) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :78:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2006, 2874), // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:10) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :78:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Add(348, 771), // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :48:14) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :78:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(774, 0), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :78:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(2007, 2876), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :78:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(2008, 782), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :51:29) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :78:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(780, 30), // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:11) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :78:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(2877, 777), // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:23) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :78:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(2875, 2878), // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:9) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :78:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2009, 2879), // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:9) at callsite( Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :78:26) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :76:10) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndCond(1883, 419, 2010), // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Sub(350, 0), // loc(callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :31:13) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Add(346, 348), // loc(callsite(unknown at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :33:31) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(353, 0), // loc(callsite( ControlMRET ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :74:15) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :180:17) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Sub(350, 4), // loc(callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :81:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Sub(350, 3), // loc(callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :121:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Sub(350, 2), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :131:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Sub(350, 1), // loc(callsite( ControlDone ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :167:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :184:17) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(0, 350), // loc(callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :20:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Sub(737, 15), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2012, 2887), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(1078, 0), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2013, 2888), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2014, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2015, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(1067, 51), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2016, 2889), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(1073, 740), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2017, 2890), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(739, 1084), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2018, 2891), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::GetGlobal(0, 37), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :19:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(2892, 740), // loc(callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :24:28) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2019, 2893), // loc(callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :24:28) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::GetGlobal(0, 38), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :19:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(2894, 1084), // loc(callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :25:29) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2020, 2895), // loc(callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :25:29) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Sub(741, 15), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2021, 2896), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2022, 1314), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2023, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2024, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(1090, 52), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2025, 2897), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(1303, 1313), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2026, 2898), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(1305, 1315), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2027, 2899), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::GetGlobal(0, 39), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :19:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(2900, 1313), // loc(callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :24:28) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2028, 2901), // loc(callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :24:28) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::GetGlobal(0, 40), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :19:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(2902, 1315), // loc(callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :25:29) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2029, 2903), // loc(callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :25:29) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Sub(1321, 15), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2030, 2904), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(1334, 0), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2031, 2905), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2032, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2033, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(1322, 53), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2034, 2906), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(1331, 1340), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2035, 2907), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(1332, 1341), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2036, 2908), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::GetGlobal(0, 41), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :19:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(2909, 1340), // loc(callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :24:28) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2037, 2910), // loc(callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :24:28) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::GetGlobal(0, 42), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :19:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(2911, 1341), // loc(callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :25:29) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2038, 2912), // loc(callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :25:29) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Sub(1354, 15), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2039, 2913), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(1717, 0), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2040, 2914), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2041, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2042, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(1357, 54), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2043, 2915), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(1358, 1359), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2044, 2916), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(1716, 1360), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2045, 2917), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::GetGlobal(0, 43), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :19:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(2918, 1359), // loc(callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :24:28) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2046, 2919), // loc(callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :24:28) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::GetGlobal(0, 44), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :19:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(2920, 1360), // loc(callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :25:29) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2047, 2921), // loc(callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :25:29) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Sub(1361, 15), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2048, 2922), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2049, 2691), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2050, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2051, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(1366, 55), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2052, 2923), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2053, 2693), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2054, 2694), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::GetGlobal(0, 45), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :19:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(2924, 566), // loc(callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :24:28) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2055, 2925), // loc(callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :24:28) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::GetGlobal(0, 46), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :19:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(2926, 573), // loc(callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :25:29) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2056, 2927), // loc(callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :25:29) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Sub(580, 15), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2057, 2928), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2058, 2563), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2059, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2060, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(587, 56), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2061, 2929), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2062, 2565), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2063, 2566), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::GetGlobal(0, 47), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :19:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(2930, 610), // loc(callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :24:28) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2064, 2931), // loc(callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :24:28) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::GetGlobal(0, 48), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :19:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(2932, 617), // loc(callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :25:29) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2065, 2933), // loc(callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :25:29) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Sub(624, 15), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2066, 2934), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2067, 514), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2068, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2069, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(631, 57), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2070, 2935), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(1596, 513), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2071, 2936), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(505, 516), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2072, 2937), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::GetGlobal(0, 49), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :19:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(2938, 513), // loc(callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :24:28) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2073, 2939), // loc(callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :24:28) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::GetGlobal(0, 50), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :19:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(2940, 516), // loc(callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :25:29) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2074, 2941), // loc(callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :25:29) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Sub(517, 15), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2075, 2942), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2076, 2789), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2077, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2078, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(524, 58), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2079, 2943), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(532, 534), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2080, 2944), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(531, 535), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2081, 2945), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :23:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::GetGlobal(0, 51), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :19:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(2946, 534), // loc(callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :24:28) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2082, 2947), // loc(callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :24:28) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::GetGlobal(0, 52), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :19:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(2948, 535), // loc(callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :25:29) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2083, 2949), // loc(callsite( ControlLoadRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :25:29) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :177:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2084, 536), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2085, 538), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2086, 546), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2087, 697), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2088, 700), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2089, 702), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2090, 704), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2091, 712), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2092, 719), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2093, 720), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2094, 722), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2095, 724), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2096, 732), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2097, 716), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2098, 747), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2099, 753), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2100, 759), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2101, 765), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2102, 771), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2103, 777), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2104, 783), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2105, 789), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2106, 826), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2107, 832), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2108, 838), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2109, 844), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2110, 850), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2111, 856), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2112, 862), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2113, 868), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2114, 905), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2115, 911), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2116, 917), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2117, 923), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2118, 929), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2119, 935), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2120, 941), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2121, 947), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2122, 984), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2123, 990), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndCond(1, 356, 2124), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(0, 2880), // loc(callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :31:13) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2126, 998), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :33:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(2881, 999), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:4) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :33:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(2950, 997), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :33:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(2127, 2951), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :33:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(996, 2881), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:4) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :33:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2128, 2952), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:17) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :33:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(996, 999), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:4) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :33:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2129, 2953), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:17) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :33:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(0, 2887), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :36:22) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2131, 2888), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :36:22) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2132, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :36:22) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2133, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :36:22) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(1067, 322), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :36:22) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2134, 2954), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :36:22) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2135, 2890), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :36:22) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2136, 2891), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :36:22) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(343, 738), // loc(callsite(unknown at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :36:22) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(2137, 540), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :36:22) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(537, 2955), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :36:22) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(2138, 2956), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :36:22) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(2139, 2896), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :37:24) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2140, 1314), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :37:24) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2141, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :37:24) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2142, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :37:24) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(1090, 323), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :37:24) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2143, 2957), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :37:24) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2144, 2898), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :37:24) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2145, 2899), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :37:24) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(343, 1302), // loc(callsite(unknown at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :37:24) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(2146, 1963), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :37:24) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(545, 2958), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :37:24) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(2147, 2959), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :37:24) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(2148, 1321), // loc(callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :34:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2149, 1334), // loc(callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :34:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2150, 1354), // loc(callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :34:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2151, 1717), // loc(callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :34:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2152, 1361), // loc(callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :34:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2153, 559), // loc(callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :34:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2154, 580), // loc(callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :34:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2155, 607), // loc(callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :34:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2156, 624), // loc(callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :34:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2157, 512), // loc(callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :34:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2158, 517), // loc(callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :34:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2159, 533), // loc(callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :34:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2160, 546), // loc(callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :34:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2161, 697), // loc(callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :34:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2162, 700), // loc(callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :34:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2163, 702), // loc(callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :34:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2164, 704), // loc(callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :34:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2165, 712), // loc(callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :34:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndCond(2130, 996, 2166), // loc(callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :34:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::GetGlobal(0, 0), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :40:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::GetGlobal(0, 1), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :40:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(1067, 324), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2134, 2962), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2168, 540), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(2169, 2956), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(740, 2960), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(2170, 2963), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(1084, 2961), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(2171, 2964), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::GetGlobal(0, 2), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :40:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::GetGlobal(0, 3), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :40:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(2172, 2896), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2173, 1314), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2174, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2175, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(1090, 325), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2176, 2967), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2177, 1963), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(2178, 2959), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(1313, 2965), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(2179, 2968), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(1315, 2966), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(2180, 2969), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::GetGlobal(0, 4), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :40:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::GetGlobal(0, 5), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :40:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(2181, 2904), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2182, 2905), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2183, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2184, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(1322, 326), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2185, 2972), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(343, 1324), // loc(callsite(unknown at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:22) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(546, 0), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(2186, 2974), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(698, 2973), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(2187, 2975), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(1340, 2970), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(2188, 2976), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(1341, 2971), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(2189, 2977), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::GetGlobal(0, 6), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :40:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::GetGlobal(0, 7), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :40:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(2190, 2913), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2191, 2914), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2192, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2193, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(1357, 327), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2194, 2980), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(343, 1356), // loc(callsite(unknown at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:22) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(2195, 1580), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(699, 2981), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(2196, 2982), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(1359, 2978), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(2197, 2983), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(1360, 2979), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(2198, 2984), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::GetGlobal(0, 8), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :40:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::GetGlobal(0, 9), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :40:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(2199, 2922), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2200, 2691), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2201, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2202, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(1366, 328), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2203, 2987), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2204, 2811), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(701, 2695), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(2205, 2988), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(566, 2985), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(2206, 2989), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(573, 2986), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(2207, 2990), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::GetGlobal(0, 10), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :40:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::GetGlobal(0, 11), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :40:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(2208, 2928), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2209, 2563), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2210, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2211, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(587, 329), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2212, 2993), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2213, 706), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(703, 2567), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(2214, 2994), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(610, 2991), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(2215, 2995), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(617, 2992), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(2216, 2996), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::GetGlobal(0, 12), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :40:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::GetGlobal(0, 13), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :40:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(2217, 2934), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2218, 514), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2219, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2220, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(631, 330), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2221, 2999), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(343, 638), // loc(callsite(unknown at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:22) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(2222, 1973), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(711, 3000), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(2223, 3001), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(513, 2997), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(2224, 3002), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(516, 2998), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(2225, 3003), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::GetGlobal(0, 14), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :40:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::GetGlobal(0, 15), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :40:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(2226, 2942), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2227, 2789), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2228, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2229, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(524, 331), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2230, 3006), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(343, 525), // loc(callsite(unknown at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:22) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(712, 0), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(2231, 3008), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(695, 3007), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(2232, 3009), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(534, 3004), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(2233, 3010), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(535, 3005), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(2234, 3011), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :42:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndCond(2167, 997, 2235), // loc(callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :34:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2236, 719), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2237, 720), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2238, 722), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2239, 724), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2240, 732), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2241, 716), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2242, 747), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2243, 753), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2244, 759), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2245, 765), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2246, 771), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2247, 777), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2248, 783), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2249, 789), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2250, 826), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2251, 832), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2252, 838), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2253, 844), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2254, 850), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2255, 856), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2256, 862), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2257, 868), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2258, 905), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2259, 911), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2260, 917), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2261, 923), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2262, 929), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2263, 935), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2264, 941), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2265, 947), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2266, 984), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2267, 990), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndCond(2125, 359, 2268), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Sub(353, 996), // loc(callsite( Reg ( :5:7) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :50:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(0, 3012), // loc(callsite( Reg ( :5:7) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :50:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(2270, 1001), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :81:31) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :51:32) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(2271, 1004), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :82:31) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :51:32) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1002, 6), // loc(callsite(unknown at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :83:19) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :51:32) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3013, 999), // loc(callsite(unknown at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :83:26) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :51:32) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(996, 14), // loc(callsite(unknown at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :85:24) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :51:32) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(997, 13), // loc(callsite(unknown at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :85:49) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :51:32) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3015, 3016), // loc(callsite(unknown at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :85:31) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :51:32) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(3017, 348), // loc(callsite(unknown at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :85:53) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :51:32) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2272, 1655), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :85:23) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :51:32) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(718, 3018), // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :85:23) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :51:32) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2273, 3019), // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :85:23) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :51:32) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2274, 1007), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :87:10) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :51:32) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(348, 1008), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:4) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :87:10) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :51:32) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(3020, 1006), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :87:10) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :51:32) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2275, 3021), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :87:10) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :51:32) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(1005, 348), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:4) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :87:10) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :51:32) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(2276, 3022), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:17) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :87:10) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :51:32) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(1005, 1008), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:4) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :87:10) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :51:32) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(2277, 3023), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:17) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :87:10) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :51:32) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2278, 1005), // loc(callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :87:19) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :51:32) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(720, 0), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :89:25) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :51:32) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2279, 3024), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :89:25) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :51:32) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(721, 4), // loc(callsite(unknown at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :91:4) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :51:32) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3025, 3014), // loc(callsite(unknown at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :91:12) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :51:32) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(3026, 346), // loc(callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :91:21) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :51:32) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(2280, 3027), // loc(callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :91:21) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :51:32) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(470, 721), // loc(callsite(unknown at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :93:30) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :51:32) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2281, 3014), // loc(callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :52:17) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2282, 2887), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :53:27) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2283, 2888), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :53:27) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2284, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :53:27) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2285, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :53:27) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(1067, 3028), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :53:27) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2286, 3029), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :53:27) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2287, 2890), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :53:27) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2288, 2891), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :53:27) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2289, 540), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :53:27) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(2290, 2956), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :53:27) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(2291, 1084), // loc(callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :54:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Sub(740, 44), // loc(callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :55:18) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2292, 3030), // loc(callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :55:18) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2293, 464), // loc(callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :56:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2294, 353), // loc(callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :57:15) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2295, 2896), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :58:30) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2296, 1314), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :58:30) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2297, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :58:30) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2298, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :58:30) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(1090, 59), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :58:30) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2299, 3031), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :58:30) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2300, 2898), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :58:30) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2301, 2899), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :58:30) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2302, 1963), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :58:30) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(2303, 2959), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :58:30) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(2304, 1315), // loc(callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :59:22) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Mul(1313, 22), // loc(callsite(unknown at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :60:24) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(2305, 2658), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :60:10) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(723, 3032), // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :60:10) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(2306, 3033), // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :60:10) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(1313, 60), // loc(callsite(unknown at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :61:55) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(2307, 2904), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :61:29) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2308, 2905), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :61:29) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2309, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :61:29) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2310, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :61:29) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(1322, 3034), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :61:29) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2311, 3035), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :61:29) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2312, 2907), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :61:29) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2313, 2908), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :61:29) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2314, 2974), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :61:29) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(2315, 2975), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :61:29) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(2316, 2913), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :62:15) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2317, 2914), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :62:15) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2318, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :62:15) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2319, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :62:15) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(1357, 61), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :62:15) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2320, 3036), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :62:15) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2321, 1580), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :62:15) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(2322, 2982), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :62:15) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(1359, 346), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :62:15) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(2323, 3037), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :62:15) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(1360, 348), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :62:15) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(2324, 3038), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :62:15) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(2325, 1361), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2326, 559), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2327, 580), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2328, 607), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2329, 624), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2330, 512), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2331, 517), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2332, 533), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2333, 700), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2334, 702), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2335, 704), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2336, 712), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2337, 724), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2338, 732), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2339, 716), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2340, 747), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2341, 753), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2342, 759), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2343, 765), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2344, 771), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2345, 777), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2346, 783), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2347, 789), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2348, 826), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2349, 832), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2350, 838), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2351, 844), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2352, 850), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2353, 856), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2354, 862), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2355, 868), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2356, 905), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2357, 911), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2358, 917), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2359, 923), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2360, 929), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2361, 935), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2362, 941), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2363, 947), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2364, 984), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2365, 990), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndCond(2269, 362, 2366), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Sub(1084, 62), // loc(callsite( ControlMRET ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :71:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :180:17) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2291, 3039), // loc(callsite( ControlMRET ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :71:19) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :180:17) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2368, 3030), // loc(callsite( ControlMRET ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :72:18) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :180:17) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2369, 464), // loc(callsite( ControlMRET ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :73:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :180:17) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2370, 2882), // loc(callsite( ControlMRET ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :74:15) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :180:17) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2371, 2896), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlMRET ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :75:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :180:17) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2372, 1314), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlMRET ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :75:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :180:17) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2373, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlMRET ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :75:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :180:17) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2374, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlMRET ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :75:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :180:17) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(1090, 61), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlMRET ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :75:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :180:17) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2375, 3040), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlMRET ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :75:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :180:17) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2376, 2898), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ControlMRET ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :75:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :180:17) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2377, 2899), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ControlMRET ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :75:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :180:17) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2378, 1963), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ControlMRET ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :75:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :180:17) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(2379, 2959), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ControlMRET ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :75:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :180:17) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1313, 4), // loc(callsite(unknown at callsite( AddU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :27:21) at callsite( ControlMRET ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :76:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :180:17) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2380, 2658), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( ControlMRET ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :76:26) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :180:17) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2381, 1013), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :45:28) at callsite( ControlMRET ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :76:26) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :180:17) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1011, 30), // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:12) at callsite( ControlMRET ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :76:26) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :180:17) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3042, 723), // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:23) at callsite( ControlMRET ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :76:26) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :180:17) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(3041, 3043), // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:10) at callsite( ControlMRET ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :76:26) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :180:17) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(2382, 3044), // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:10) at callsite( ControlMRET ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :76:26) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :180:17) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(1315, 1011), // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :48:14) at callsite( ControlMRET ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :76:26) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :180:17) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2383, 2052), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( ControlMRET ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :76:26) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :180:17) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2384, 1016), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :51:29) at callsite( ControlMRET ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :76:26) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :180:17) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(1014, 30), // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:11) at callsite( ControlMRET ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :76:26) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :180:17) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3046, 725), // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:23) at callsite( ControlMRET ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :76:26) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :180:17) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(3045, 3047), // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:9) at callsite( ControlMRET ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :76:26) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :180:17) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(2385, 3048), // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:9) at callsite( ControlMRET ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :76:26) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :180:17) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(2386, 1321), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2387, 1334), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2388, 1354), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2389, 1717), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2390, 1361), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2391, 559), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2392, 580), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2393, 607), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2394, 624), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2395, 512), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2396, 517), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2397, 533), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2398, 546), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2399, 697), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2400, 700), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2401, 702), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2402, 704), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2403, 712), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2404, 732), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2405, 716), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2406, 747), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2407, 753), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2408, 759), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2409, 765), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2410, 771), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2411, 777), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2412, 783), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2413, 789), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2414, 826), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2415, 832), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2416, 838), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2417, 844), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2418, 850), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2419, 856), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2420, 862), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2421, 868), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2422, 905), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2423, 911), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2424, 917), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2425, 923), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2426, 929), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2427, 935), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2428, 941), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2429, 947), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2430, 984), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2431, 990), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndCond(2367, 365, 2432), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(0, 2883), // loc(callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :81:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2434, 1001), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :83:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(2881, 1002), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:4) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :83:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(3049, 1000), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :83:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(2435, 3050), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :83:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(2436, 2950), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:17) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :83:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(999, 1002), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:4) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :83:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2437, 3051), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:17) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :83:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(1067, 332), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2134, 3052), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2439, 2890), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2440, 2891), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2441, 540), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(2442, 2956), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(2443, 2896), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2444, 1314), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2445, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2446, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(1090, 333), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2447, 3053), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2448, 2898), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2449, 2899), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2450, 1963), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(2451, 2959), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(2452, 2904), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2453, 2905), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2454, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2455, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(1322, 334), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2456, 3054), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2457, 2907), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2458, 2908), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2459, 2974), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(2460, 2975), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(2461, 2913), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2462, 2914), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2463, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2464, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(1357, 335), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2465, 3055), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2466, 2916), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2467, 2917), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2468, 1580), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(2469, 2982), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(2470, 2922), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2471, 2691), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2472, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2473, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(1366, 336), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2474, 3056), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2475, 2693), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2476, 2694), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2477, 2811), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(2478, 2988), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(2479, 2928), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2480, 2563), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2481, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2482, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(587, 337), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2483, 3057), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2484, 2565), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2485, 2566), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2486, 706), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(2487, 2994), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(2488, 2934), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2489, 514), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2490, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2491, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(631, 338), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2492, 3058), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2493, 2936), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2494, 2937), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2495, 1973), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(2496, 3001), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(2497, 2942), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2498, 2789), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2499, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2500, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(524, 339), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2501, 3059), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2502, 2944), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2503, 2945), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2504, 3008), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(2505, 3009), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :89:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::GetGlobal(0, 17), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(740, 3060), // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2506, 3061), // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::GetGlobal(0, 18), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(1084, 3062), // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2507, 3063), // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::GetGlobal(0, 19), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(1313, 3064), // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2508, 3065), // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::GetGlobal(0, 20), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(1315, 3066), // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2509, 3067), // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::GetGlobal(0, 21), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(1340, 3068), // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2510, 3069), // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::GetGlobal(0, 22), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(1341, 3070), // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2511, 3071), // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::GetGlobal(0, 23), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(1359, 3072), // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2512, 3073), // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::GetGlobal(0, 24), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(1360, 3074), // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2513, 3075), // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::GetGlobal(0, 25), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(566, 3076), // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2514, 3077), // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::GetGlobal(0, 26), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(573, 3078), // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2515, 3079), // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::GetGlobal(0, 27), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(610, 3080), // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2516, 3081), // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::GetGlobal(0, 28), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(617, 3082), // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2517, 3083), // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::GetGlobal(0, 29), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(513, 3084), // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2518, 3085), // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::GetGlobal(0, 30), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(516, 3086), // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2519, 3087), // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::GetGlobal(0, 31), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(534, 3088), // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2520, 3089), // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::GetGlobal(0, 32), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(535, 3090), // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2521, 3091), // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :88:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::GetGlobal(0, 16), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :86:24) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(0, 3092), // loc(callsite(unknown at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :91:10) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::GetGlobal(0, 70), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :92:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(7, 3094), // loc(callsite( Reg ( :5:7) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :92:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(0, 3095), // loc(callsite( Reg ( :5:7) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :92:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::GetGlobal(0, 69), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :93:26) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(7, 3096), // loc(callsite( Reg ( :5:7) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :93:26) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(2523, 3097), // loc(callsite( Reg ( :5:7) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :93:26) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::GetGlobal(0, 72), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :94:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(7, 3098), // loc(callsite( Reg ( :5:7) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :94:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(2524, 3099), // loc(callsite( Reg ( :5:7) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :94:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::GetGlobal(0, 71), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :95:26) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(7, 3100), // loc(callsite( Reg ( :5:7) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :95:26) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(2525, 3101), // loc(callsite( Reg ( :5:7) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :95:26) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndCond(2522, 3093, 2526), // loc(callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :91:6) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndCond(2438, 999, 2527), // loc(callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :84:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Sub(350, 996), // loc(callsite( Reg ( :5:7) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :107:18) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(0, 3102), // loc(callsite( Reg ( :5:7) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :107:18) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(996, 11), // loc(callsite(unknown at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :108:7) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(996, 4), // loc(callsite(unknown at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :108:33) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(3103, 3104), // loc(callsite(unknown at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :108:28) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(2529, 3105), // loc(callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :108:57) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Mul(3103, 340), // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :111:54) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(3106, 3092), // loc(callsite( Reg ( :5:7) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :111:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(2530, 3107), // loc(callsite( Reg ( :5:7) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :111:25) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(2531, 2887), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :113:17) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2532, 2888), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :113:17) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2533, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :113:17) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2534, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :113:17) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2535, 2954), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :113:17) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2536, 540), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :113:17) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(2537, 2956), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :113:17) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(740, 346), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :113:17) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(2538, 3108), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :113:17) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(1084, 348), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :113:17) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(2539, 3109), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :113:17) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(2540, 2896), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :114:17) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2541, 1314), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :114:17) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2542, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :114:17) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2543, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :114:17) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2544, 2957), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :114:17) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2545, 1963), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :114:17) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(2546, 2959), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :114:17) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(1313, 353), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :114:17) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(2547, 3110), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :114:17) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(2548, 1315), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :114:17) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(2549, 1321), // loc(callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :84:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2550, 1334), // loc(callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :84:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2551, 1354), // loc(callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :84:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2552, 1717), // loc(callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :84:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2553, 1361), // loc(callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :84:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2554, 559), // loc(callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :84:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2555, 580), // loc(callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :84:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2556, 607), // loc(callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :84:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2557, 624), // loc(callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :84:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2558, 512), // loc(callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :84:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2559, 517), // loc(callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :84:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2560, 533), // loc(callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :84:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2561, 546), // loc(callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :84:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2562, 697), // loc(callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :84:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2563, 700), // loc(callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :84:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2564, 702), // loc(callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :84:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2565, 704), // loc(callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :84:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2566, 712), // loc(callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :84:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndCond(2528, 1000, 2567), // loc(callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :84:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2568, 719), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2569, 720), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2570, 722), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2571, 724), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2572, 732), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2573, 716), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2574, 747), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2575, 753), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2576, 759), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2577, 765), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2578, 771), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2579, 777), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2580, 783), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2581, 789), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2582, 826), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2583, 832), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2584, 838), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2585, 844), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2586, 850), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2587, 856), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2588, 862), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2589, 868), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2590, 905), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2591, 911), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2592, 917), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2593, 923), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2594, 929), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2595, 935), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2596, 941), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2597, 947), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2598, 984), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2599, 990), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndCond(2433, 368, 2600), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(0, 2884), // loc(callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :121:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2602, 2887), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2603, 2888), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2604, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2605, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2606, 2889), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2607, 540), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :121:13) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(2608, 2956), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :121:13) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(2609, 2896), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2610, 1314), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2611, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2612, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2613, 2897), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2614, 1963), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :121:13) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(2615, 2959), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :121:13) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(2616, 2904), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2617, 2905), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2618, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2619, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2620, 2906), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2621, 2974), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :121:13) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(2622, 2975), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :121:13) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(2623, 2913), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2624, 2914), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2625, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2626, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2627, 2915), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2628, 1580), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :121:13) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(2629, 2982), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :121:13) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(2630, 2922), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2631, 2691), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2632, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2633, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2634, 2923), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2635, 2811), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :121:13) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(2636, 2988), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :121:13) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(2637, 2928), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2638, 2563), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2639, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2640, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2641, 2929), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2642, 706), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :121:13) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(2643, 2994), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :121:13) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(2644, 2934), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2645, 514), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2646, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2647, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2648, 2935), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2649, 1973), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :121:13) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(2650, 3001), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :121:13) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(2651, 2942), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2652, 2789), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2653, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2654, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2655, 2943), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2656, 3008), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :121:13) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(2657, 3009), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :121:13) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :124:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::GetGlobal(0, 53), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(1073, 3111), // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2658, 3112), // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::GetGlobal(0, 54), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(739, 3113), // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2659, 3114), // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::GetGlobal(0, 55), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(1303, 3115), // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2660, 3116), // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::GetGlobal(0, 56), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(1305, 3117), // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2661, 3118), // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::GetGlobal(0, 57), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(1331, 3119), // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2662, 3120), // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::GetGlobal(0, 58), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(1332, 3121), // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2663, 3122), // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::GetGlobal(0, 59), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(1358, 3123), // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2664, 3124), // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::GetGlobal(0, 60), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(1716, 3125), // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2665, 3126), // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::GetGlobal(0, 61), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(549, 3127), // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2666, 3128), // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::GetGlobal(0, 62), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(552, 3129), // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2667, 3130), // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::GetGlobal(0, 63), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(597, 3131), // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2668, 3132), // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::GetGlobal(0, 64), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(604, 3133), // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2669, 3134), // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::GetGlobal(0, 65), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(1596, 3135), // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2670, 3136), // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::GetGlobal(0, 66), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(505, 3137), // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2671, 3138), // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::GetGlobal(0, 67), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(532, 3139), // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2672, 3140), // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :8:23) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::GetGlobal(0, 68), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(531, 3141), // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2673, 3142), // loc(callsite( Reg ( :5:7) at callsite( DigestReg ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :9:24) at callsite( ControlStoreRoot ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :122:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :182:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2674, 719), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2675, 720), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2676, 722), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2677, 724), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2678, 732), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2679, 716), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2680, 747), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2681, 753), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2682, 759), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2683, 765), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2684, 771), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2685, 777), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2686, 783), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2687, 789), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2688, 826), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2689, 832), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2690, 838), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2691, 844), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2692, 850), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2693, 856), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2694, 862), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2695, 868), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2696, 905), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2697, 911), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2698, 917), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2699, 923), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2700, 929), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2701, 935), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2702, 941), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2703, 947), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2704, 984), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2705, 990), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndCond(2601, 371, 2706), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(0, 2885), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :131:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Sub(346, 1002), // loc(callsite( Reg ( :5:7) at callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :132:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(2708, 3143), // loc(callsite( Reg ( :5:7) at callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :132:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(353, 1005), // loc(callsite( Reg ( :5:7) at callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :133:15) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(2709, 3144), // loc(callsite( Reg ( :5:7) at callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :133:15) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(1002, 0), // loc(callsite(unknown at callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :138:15) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(1002, 6), // loc(callsite(unknown at callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :138:15) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(1002, 5), // loc(callsite(unknown at callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :138:15) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(1002, 4), // loc(callsite(unknown at callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :138:15) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(1002, 3), // loc(callsite(unknown at callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :138:15) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(1002, 2), // loc(callsite(unknown at callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :138:15) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(1002, 1), // loc(callsite(unknown at callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :138:15) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(1002, 10), // loc(callsite(unknown at callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :138:15) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(1002, 9), // loc(callsite(unknown at callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :138:15) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(1002, 8), // loc(callsite(unknown at callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :138:15) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(1002, 31), // loc(callsite(unknown at callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :138:15) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(1002, 32), // loc(callsite(unknown at callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :138:15) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(1002, 33), // loc(callsite(unknown at callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :138:15) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(1002, 34), // loc(callsite(unknown at callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :138:15) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(1002, 35), // loc(callsite(unknown at callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :138:15) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(1002, 21), // loc(callsite(unknown at callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :142:14) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(3160, 30), // loc(callsite(unknown at callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :143:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(718, 1002), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :140:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(0, 3162), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :140:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Sub(721, 3145), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :140:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2711, 3163), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :140:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Sub(723, 3146), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :140:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2712, 3164), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :140:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Sub(725, 3147), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :140:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2713, 3165), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :140:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Sub(733, 3148), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :140:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2714, 3166), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :140:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Sub(744, 3149), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :140:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2715, 3167), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :140:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Sub(750, 3150), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :140:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2716, 3168), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :140:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Sub(756, 3151), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :140:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2717, 3169), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :140:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Sub(762, 3152), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :140:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2718, 3170), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :140:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Sub(768, 3153), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :140:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2719, 3171), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :140:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Sub(774, 3154), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :140:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2720, 3172), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :140:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Sub(780, 3155), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :140:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2721, 3173), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :140:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Sub(786, 3156), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :140:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2722, 3174), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :140:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Sub(823, 3157), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :140:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2723, 3175), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :140:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Sub(829, 3158), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :140:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2724, 3176), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :140:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Sub(835, 3159), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :140:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2725, 3177), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :140:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2726, 998), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :143:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(3161, 999), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:4) at callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :143:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(3178, 997), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :143:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(2727, 3179), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :143:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(996, 3161), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:4) at callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :143:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2728, 3180), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:17) at callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :143:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(2729, 2953), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:17) at callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :143:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(2730, 838), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :135:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2731, 844), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :135:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2732, 850), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :135:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2733, 856), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :135:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2734, 862), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :135:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2735, 868), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :135:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2736, 905), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :135:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2737, 911), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :135:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2738, 917), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :135:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2739, 923), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :135:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2740, 929), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :135:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2741, 935), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :135:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2742, 941), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :135:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2743, 947), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :135:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2744, 984), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :135:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2745, 990), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :135:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndCond(2710, 1005, 2746), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :135:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Sub(3160, 18), // loc(callsite(unknown at callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :157:21) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(841, 1002), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :154:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(0, 3182), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :154:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Sub(847, 3145), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :154:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2748, 3183), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :154:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Sub(853, 3146), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :154:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2749, 3184), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :154:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Sub(859, 3147), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :154:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2750, 3185), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :154:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Sub(865, 3148), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :154:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2751, 3186), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :154:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Sub(902, 3149), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :154:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2752, 3187), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :154:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Sub(908, 3150), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :154:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2753, 3188), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :154:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Sub(914, 3151), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :154:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2754, 3189), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :154:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Sub(920, 3152), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :154:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2755, 3190), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :154:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Sub(926, 3153), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :154:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2756, 3191), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :154:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Sub(932, 3154), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :154:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2757, 3192), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :154:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Sub(938, 3155), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :154:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2758, 3193), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :154:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Sub(944, 3156), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :154:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2759, 3194), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :154:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Sub(981, 3157), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :154:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2760, 3195), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :154:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Sub(987, 3158), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :154:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2761, 3196), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :154:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Sub(993, 3159), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :154:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2762, 3197), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :154:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2763, 998), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :157:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(3181, 999), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:4) at callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :157:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(3198, 997), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :157:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(2764, 3199), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :157:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(996, 3181), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:4) at callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :157:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2765, 3200), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:17) at callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :157:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(2766, 2953), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:17) at callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :157:20) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(2767, 719), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :135:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2768, 720), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :135:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2769, 722), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :135:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2770, 724), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :135:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2771, 732), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :135:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2772, 716), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :135:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2773, 747), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :135:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2774, 753), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :135:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2775, 759), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :135:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2776, 765), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :135:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2777, 771), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :135:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2778, 777), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :135:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2779, 783), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :135:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2780, 789), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :135:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2781, 826), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :135:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2782, 832), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :135:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndCond(2747, 1006, 2783), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :135:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2784, 737), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2785, 1078), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2786, 741), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2787, 1312), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2788, 1321), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2789, 1334), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2790, 1354), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2791, 1717), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2792, 1361), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2793, 559), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2794, 580), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2795, 607), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2796, 624), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2797, 512), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2798, 517), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2799, 533), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2800, 536), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2801, 538), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2802, 546), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2803, 697), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2804, 700), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2805, 702), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2806, 704), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2807, 712), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndCond(2707, 374, 2808), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(0, 2886), // loc(callsite( ControlDone ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :167:16) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :184:17) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2810, 737), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2811, 1078), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2812, 741), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2813, 1312), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2814, 1321), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2815, 1334), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2816, 1354), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2817, 1717), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2818, 1361), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2819, 559), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2820, 580), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2821, 607), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2822, 624), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2823, 512), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2824, 517), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2825, 533), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2826, 536), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2827, 538), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2828, 546), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2829, 697), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2830, 700), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2831, 702), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2832, 704), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2833, 712), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2834, 719), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2835, 720), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2836, 722), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2837, 724), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2838, 732), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2839, 716), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2840, 747), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2841, 753), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2842, 759), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2843, 765), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2844, 771), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2845, 777), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2846, 783), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2847, 789), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2848, 826), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2849, 832), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2850, 838), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2851, 844), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2852, 850), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2853, 856), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2854, 862), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2855, 868), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2856, 905), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2857, 911), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2858, 917), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2859, 923), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2860, 929), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2861, 935), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2862, 941), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2863, 947), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2864, 984), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2865, 990), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndCond(2809, 377, 2866), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndCond(2011, 422, 2867), // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Sub(350, 9), // loc(callsite( ECallTerminate ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :44:16) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :160:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Sub(350, 8), // loc(callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :67:16) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Sub(350, 31), // loc(callsite( ECallHostWrite ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :102:16) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :162:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Sub(350, 32), // loc(callsite( ECallHostReadBytes ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :121:16) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :163:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Sub(350, 33), // loc(callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :127:16) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Mul(359, 4), // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Mul(365, 11), // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Mul(368, 21), // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(0, 619), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :81:31) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :156:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2869, 626), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :82:31) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :156:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(678, 617), // loc(callsite(unknown at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :83:26) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :156:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(631, 0), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :85:23) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :156:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2870, 3210), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :85:23) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :156:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(638, 469), // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :85:23) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :156:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(2871, 3211), // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :85:23) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :156:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(2872, 1598), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :87:10) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :156:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(348, 505), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:4) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :87:10) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :156:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(3212, 1597), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :87:10) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :156:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(2873, 3213), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :87:10) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :156:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(1596, 348), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:4) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :87:10) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :156:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2874, 3214), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:17) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :87:10) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :156:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(1596, 505), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:4) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :87:10) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :156:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2875, 3215), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:17) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :87:10) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :156:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(2876, 1596), // loc(callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :87:19) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :156:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2877, 514), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :89:25) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :156:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(2042, 3209), // loc(callsite(unknown at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :91:12) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :156:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(3216, 346), // loc(callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :91:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :156:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2878, 3217), // loc(callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :91:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :156:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Add(470, 513), // loc(callsite(unknown at callsite( AddrDecomposeBits ( zirgen/circuit/rv32im/v2/dsl/u32.zir :93:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :156:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(2879, 3209), // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :157:17) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Sub(1067, 3218), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :26:27) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2134, 3219), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :26:27) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2881, 2890), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :26:27) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2882, 2891), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :26:27) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2883, 1741), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :26:27) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(1366, 2955), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :26:27) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(2884, 3220), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :26:27) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(2885, 464), // loc(callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :27:16) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2886, 1084), // loc(callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :28:19) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2887, 3030), // loc(callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :29:18) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2888, 2882), // loc(callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :30:15) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2889, 2896), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :31:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2890, 1314), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :31:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2891, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :31:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2892, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :31:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(1090, 63), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :31:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2893, 3221), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :31:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2894, 2898), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :31:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2895, 2899), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :31:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2896, 1766), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :31:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(549, 2958), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :31:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(2897, 3222), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :31:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(2898, 1315), // loc(callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :32:22) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2899, 519), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :33:25) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(2900, 1980), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :33:25) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(2901, 1986), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :33:25) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(2902, 1565), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :33:25) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(516, 517), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:4) at callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :33:25) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3223, 524), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:4) at callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :33:25) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3224, 525), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:4) at callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :33:25) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(3225, 0), // loc(callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:32) at callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :33:25) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(2903, 3226), // loc(callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:32) at callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :33:25) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(525, 5), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:32) at callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :33:25) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(517, 2033), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:4) at callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :33:25) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3228, 3227), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:4) at callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :33:25) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(3229, 1313), // loc(callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:56) at callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :33:25) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(2904, 3230), // loc(callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:56) at callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :33:25) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(2905, 1321), // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2906, 1334), // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2907, 1354), // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2908, 1717), // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2909, 552), // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2910, 566), // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2911, 580), // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2912, 590), // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndCond(2880, 356, 2913), // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(0, 3201), // loc(callsite( ECallTerminate ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :44:16) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :160:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2915, 2887), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ECallTerminate ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :45:20) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :160:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2916, 2888), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ECallTerminate ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :45:20) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :160:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2917, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ECallTerminate ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :45:20) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :160:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2918, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ECallTerminate ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :45:20) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :160:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(1067, 64), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ECallTerminate ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :45:20) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :160:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2919, 3231), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ECallTerminate ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :45:20) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :160:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2920, 2890), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ECallTerminate ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :45:20) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :160:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2921, 2891), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ECallTerminate ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :45:20) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :160:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2922, 1741), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ECallTerminate ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :45:20) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :160:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(2923, 3220), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ECallTerminate ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :45:20) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :160:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(2924, 2896), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ECallTerminate ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :46:20) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :160:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2925, 1314), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ECallTerminate ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :46:20) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :160:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2926, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ECallTerminate ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :46:20) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :160:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2927, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ECallTerminate ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :46:20) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :160:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(1090, 65), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ECallTerminate ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :46:20) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :160:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2928, 3232), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ECallTerminate ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :46:20) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :160:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2929, 2898), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ECallTerminate ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :46:20) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :160:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2930, 2899), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ECallTerminate ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :46:20) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :160:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2931, 1766), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ECallTerminate ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :46:20) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :160:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(2932, 3222), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ECallTerminate ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :46:20) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :160:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(740, 3094), // loc(callsite( Reg ( :5:7) at callsite( ECallTerminate ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :47:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :160:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(2933, 3233), // loc(callsite( Reg ( :5:7) at callsite( ECallTerminate ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :47:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :160:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(1084, 3096), // loc(callsite( Reg ( :5:7) at callsite( ECallTerminate ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :48:22) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :160:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(2934, 3234), // loc(callsite( Reg ( :5:7) at callsite( ECallTerminate ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :48:22) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :160:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(1313, 3098), // loc(callsite( Reg ( :5:7) at callsite( ECallTerminate ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :49:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :160:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(2935, 3235), // loc(callsite( Reg ( :5:7) at callsite( ECallTerminate ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :49:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :160:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(1315, 3100), // loc(callsite( Reg ( :5:7) at callsite( ECallTerminate ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :50:22) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :160:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(2936, 3236), // loc(callsite( Reg ( :5:7) at callsite( ECallTerminate ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :50:22) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :160:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(2937, 1321), // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2938, 1334), // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2939, 1354), // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2940, 1717), // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2941, 552), // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2942, 566), // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2943, 580), // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(2944, 590), // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndCond(2914, 359, 2945), // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(0, 3202), // loc(callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :67:16) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2947, 2887), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :69:20) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2948, 2888), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :69:20) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2949, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :69:20) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2950, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :69:20) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(1067, 66), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :69:20) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2951, 3237), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :69:20) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2952, 2890), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :69:20) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2953, 2891), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :69:20) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2954, 1741), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :69:20) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(2955, 3220), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :69:20) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(2956, 2896), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :70:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2957, 1314), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :70:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2958, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :70:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2959, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :70:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(1090, 67), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :70:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2960, 3238), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :70:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2961, 2898), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :70:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2962, 2899), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :70:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2963, 1766), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :70:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(2964, 3222), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :70:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(2965, 2904), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :71:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2966, 2905), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :71:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2967, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :71:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2968, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :71:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(1322, 68), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :71:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2969, 3239), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :71:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2970, 2907), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :71:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2971, 2908), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :71:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2972, 1786), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :71:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(559, 2973), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :71:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(2973, 3240), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :71:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(2974, 1084), // loc(callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :73:12) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2975, 1341), // loc(callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :75:13) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(2976, 2153), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :77:26) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(1340, 587), // loc(callsite(unknown at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :79:23) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(2977, 2175), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :79:18) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(597, 3241), // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :79:18) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(2978, 3242), // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :79:18) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(2979, 2913), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :81:15) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2980, 2914), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :81:15) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2981, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :81:15) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2982, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :81:15) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(1357, 66), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :81:15) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2983, 3243), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :81:15) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2984, 2127), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :81:15) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(573, 2981), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :81:15) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(2985, 3244), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :81:15) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(1359, 587), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :81:15) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(2986, 3245), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :81:15) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(2987, 1360), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :81:15) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(2988, 1986), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :83:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(2989, 1565), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :83:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(0, 532), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :83:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(532, 3246), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :83:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(2990, 3247), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :83:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(0, 531), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :83:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(531, 3248), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :83:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(2991, 3249), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :83:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(524, 525), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:4) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :83:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(3250, 532), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:4) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :83:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(3251, 531), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:4) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :83:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(3252, 0), // loc(callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:32) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :83:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2992, 3253), // loc(callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:32) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :83:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(532, 6), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:32) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :83:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(531, 5), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:32) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :83:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(525, 3254), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:4) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :83:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(3256, 3255), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:4) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :83:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(3257, 517), // loc(callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:56) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :83:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2993, 3258), // loc(callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:56) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :83:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2994, 1950), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :60:29) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :83:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(2995, 2587), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :60:29) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :83:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2996, 2588), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:17) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :60:29) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :83:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2997, 2589), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:17) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :60:29) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :83:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(533, 524), // loc(callsite(unknown at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :61:25) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :83:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(3259, 535), // loc(callsite( Reg ( :5:7) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :61:24) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :83:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2998, 3260), // loc(callsite( Reg ( :5:7) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :61:24) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :83:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(525, 532), // loc(callsite(unknown at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :63:35) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :83:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3261, 531), // loc(callsite(unknown at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :63:48) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :83:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(2999, 2794), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :85:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(0, 545), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :85:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(545, 3263), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :85:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(3000, 3264), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :85:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(0, 546), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :85:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(546, 3265), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :85:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(3001, 3266), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :85:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3002, 2800), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :85:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(538, 545), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:4) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :85:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(3267, 546), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:4) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :85:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(3268, 698), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:4) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :85:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(3269, 0), // loc(callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:32) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :85:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3003, 3270), // loc(callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:32) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :85:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(546, 6), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:32) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :85:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(698, 5), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:32) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :85:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(545, 3271), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:4) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :85:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(3273, 3272), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:4) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :85:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(3274, 537), // loc(callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:56) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :85:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3004, 3275), // loc(callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:56) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :85:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3005, 2805), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :60:29) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :85:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(536, 699), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:4) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :60:29) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :85:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(3276, 2804), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :60:29) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :85:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3006, 3277), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :60:29) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :85:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(697, 536), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:4) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :60:29) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :85:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3007, 3278), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:17) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :60:29) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :85:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(697, 699), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:4) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :60:29) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :85:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3008, 3279), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:17) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :60:29) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :85:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(697, 538), // loc(callsite(unknown at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :61:25) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :85:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(3280, 700), // loc(callsite( Reg ( :5:7) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :61:24) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :85:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3009, 3281), // loc(callsite( Reg ( :5:7) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :61:24) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :85:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(545, 546), // loc(callsite(unknown at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :63:35) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :85:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3282, 698), // loc(callsite(unknown at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :63:48) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :85:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(697, 3283), // loc(callsite(unknown at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :87:28) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(3284, 701), // loc(callsite( Reg ( :5:7) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :87:17) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(3010, 3285), // loc(callsite( Reg ( :5:7) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :87:17) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(701, 3262), // loc(callsite(unknown at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :89:18) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(3286, 702), // loc(callsite( Reg ( :5:7) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :89:17) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(3011, 3287), // loc(callsite( Reg ( :5:7) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :89:17) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndCond(2946, 362, 3012), // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(0, 3203), // loc(callsite( ECallHostWrite ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :102:16) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :162:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(3014, 2887), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ECallHostWrite ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :104:20) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :162:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3015, 2888), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ECallHostWrite ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :104:20) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :162:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3016, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ECallHostWrite ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :104:20) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :162:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3017, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ECallHostWrite ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :104:20) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :162:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3018, 3237), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ECallHostWrite ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :104:20) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :162:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3019, 2890), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ECallHostWrite ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :104:20) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :162:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3020, 2891), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ECallHostWrite ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :104:20) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :162:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3021, 1741), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ECallHostWrite ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :104:20) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :162:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3022, 3220), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ECallHostWrite ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :104:20) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :162:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3023, 2896), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ECallHostWrite ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :105:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :162:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3024, 1314), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ECallHostWrite ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :105:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :162:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3025, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ECallHostWrite ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :105:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :162:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3026, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ECallHostWrite ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :105:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :162:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3027, 3238), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ECallHostWrite ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :105:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :162:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3028, 2898), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ECallHostWrite ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :105:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :162:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3029, 2899), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ECallHostWrite ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :105:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :162:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3030, 1766), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ECallHostWrite ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :105:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :162:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3031, 3222), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ECallHostWrite ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :105:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :162:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3032, 2904), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ECallHostWrite ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :106:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :162:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3033, 2905), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ECallHostWrite ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :106:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :162:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3034, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ECallHostWrite ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :106:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :162:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3035, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ECallHostWrite ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :106:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :162:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3036, 3239), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ECallHostWrite ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :106:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :162:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3037, 2907), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ECallHostWrite ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :106:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :162:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3038, 2908), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ECallHostWrite ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :106:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :162:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3039, 1786), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ECallHostWrite ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :106:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :162:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3040, 3240), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ECallHostWrite ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :106:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :162:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3041, 1084), // loc(callsite( ECallHostWrite ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :107:12) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :162:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(3042, 1341), // loc(callsite( ECallHostWrite ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :108:13) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :162:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(3043, 2153), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( ECallHostWrite ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :110:26) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :162:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(3044, 2175), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( ECallHostWrite ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :112:18) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :162:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3045, 3242), // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( ECallHostWrite ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :112:18) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :162:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(3046, 2913), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ECallHostWrite ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :114:15) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :162:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3047, 2914), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ECallHostWrite ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :114:15) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :162:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3048, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ECallHostWrite ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :114:15) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :162:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3049, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ECallHostWrite ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :114:15) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :162:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3050, 3243), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( ECallHostWrite ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :114:15) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :162:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3051, 2127), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ECallHostWrite ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :114:15) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :162:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3052, 3244), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( ECallHostWrite ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :114:15) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :162:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3053, 3245), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( ECallHostWrite ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :114:15) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :162:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(3054, 1360), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( ECallHostWrite ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :114:15) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :162:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndCond(3013, 365, 3055), // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(0, 3204), // loc(callsite( ECallHostReadBytes ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :121:16) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :163:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(3057, 15), // loc(callsite( ECallHostReadBytes ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :122:6) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :163:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(3058, 737), // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3059, 1078), // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3060, 741), // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3061, 1312), // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3062, 1321), // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3063, 1334), // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3064, 1354), // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3065, 1717), // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3066, 1361), // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3067, 1367), // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3068, 552), // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3069, 566), // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3070, 580), // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3071, 590), // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndCond(3056, 368, 3072), // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Get(195), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Get(198), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:52) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(0, 3205), // loc(callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :127:16) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(3074, 1986), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :128:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3075, 1565), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :128:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3076, 3247), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :128:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3077, 3249), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :128:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3078, 3253), // loc(callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:32) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :128:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3079, 3258), // loc(callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:56) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :128:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3080, 1950), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :60:29) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :128:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3081, 2587), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :60:29) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :128:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3082, 2588), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:17) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :60:29) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :128:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3083, 2589), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:17) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :60:29) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :128:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3084, 3260), // loc(callsite( Reg ( :5:7) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :61:24) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :128:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3085, 2794), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :129:32) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3086, 3264), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :129:32) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3087, 3266), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :129:32) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3088, 2800), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :129:32) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3089, 3270), // loc(callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:32) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :129:32) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3090, 3275), // loc(callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:56) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :129:32) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3091, 2805), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :60:29) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :129:32) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3092, 3277), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :60:29) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :129:32) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3093, 3278), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:17) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :60:29) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :129:32) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3094, 3279), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:17) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :60:29) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :129:32) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3095, 3281), // loc(callsite( Reg ( :5:7) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :61:24) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :129:32) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(545, 697), // loc(callsite(unknown at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :131:27) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(546, 697), // loc(callsite(unknown at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :132:27) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(698, 697), // loc(callsite(unknown at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :133:27) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(3290, 3291), // loc(callsite(unknown at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :136:13) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(3293, 3292), // loc(callsite(unknown at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :136:13) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(3294, 2804), // loc(callsite(unknown at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :136:13) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(3290, 3288), // loc(callsite(unknown at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :138:26) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(0, 3290), // loc(callsite(unknown at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :138:47) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(3297, 69), // loc(callsite(unknown at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :138:60) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(3296, 3298), // loc(callsite(unknown at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :138:42) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(3299, 701), // loc(callsite( Reg ( :5:7) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :138:17) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(3096, 3300), // loc(callsite( Reg ( :5:7) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :138:17) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(3097, 2887), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryWriteUnconstrained ( zirgen/circuit/rv32im/v2/dsl/mem.zir :105:18) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :139:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3098, 2888), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWriteUnconstrained ( zirgen/circuit/rv32im/v2/dsl/mem.zir :105:18) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :139:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3099, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryWriteUnconstrained ( zirgen/circuit/rv32im/v2/dsl/mem.zir :105:18) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :139:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3100, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryWriteUnconstrained ( zirgen/circuit/rv32im/v2/dsl/mem.zir :105:18) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :139:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(1067, 701), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWriteUnconstrained ( zirgen/circuit/rv32im/v2/dsl/mem.zir :105:18) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :139:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3101, 3301), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWriteUnconstrained ( zirgen/circuit/rv32im/v2/dsl/mem.zir :105:18) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :139:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3102, 1741), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWriteUnconstrained ( zirgen/circuit/rv32im/v2/dsl/mem.zir :106:13) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :139:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3103, 3220), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWriteUnconstrained ( zirgen/circuit/rv32im/v2/dsl/mem.zir :106:13) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :139:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(3288, 0), // loc(callsite(unknown at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :138:31) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(3291, 3302), // loc(callsite(unknown at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :138:26) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(0, 3291), // loc(callsite(unknown at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :138:47) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(3304, 69), // loc(callsite(unknown at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :138:60) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(3303, 3305), // loc(callsite(unknown at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :138:42) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(3306, 702), // loc(callsite( Reg ( :5:7) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :138:17) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(3104, 3307), // loc(callsite( Reg ( :5:7) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :138:17) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(3105, 2896), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryWriteUnconstrained ( zirgen/circuit/rv32im/v2/dsl/mem.zir :105:18) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :139:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3106, 1314), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWriteUnconstrained ( zirgen/circuit/rv32im/v2/dsl/mem.zir :105:18) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :139:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3107, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryWriteUnconstrained ( zirgen/circuit/rv32im/v2/dsl/mem.zir :105:18) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :139:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3108, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryWriteUnconstrained ( zirgen/circuit/rv32im/v2/dsl/mem.zir :105:18) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :139:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(1090, 702), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWriteUnconstrained ( zirgen/circuit/rv32im/v2/dsl/mem.zir :105:18) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :139:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3109, 3308), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWriteUnconstrained ( zirgen/circuit/rv32im/v2/dsl/mem.zir :105:18) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :139:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3110, 1766), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWriteUnconstrained ( zirgen/circuit/rv32im/v2/dsl/mem.zir :106:13) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :139:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3111, 3222), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWriteUnconstrained ( zirgen/circuit/rv32im/v2/dsl/mem.zir :106:13) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :139:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(3288, 6), // loc(callsite(unknown at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :138:31) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(3292, 3309), // loc(callsite(unknown at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :138:26) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(0, 3292), // loc(callsite(unknown at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :138:47) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(3311, 69), // loc(callsite(unknown at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :138:60) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(3310, 3312), // loc(callsite(unknown at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :138:42) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(3313, 703), // loc(callsite( Reg ( :5:7) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :138:17) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(3112, 3314), // loc(callsite( Reg ( :5:7) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :138:17) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(3113, 2904), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryWriteUnconstrained ( zirgen/circuit/rv32im/v2/dsl/mem.zir :105:18) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :139:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3114, 2905), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWriteUnconstrained ( zirgen/circuit/rv32im/v2/dsl/mem.zir :105:18) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :139:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3115, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryWriteUnconstrained ( zirgen/circuit/rv32im/v2/dsl/mem.zir :105:18) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :139:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3116, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryWriteUnconstrained ( zirgen/circuit/rv32im/v2/dsl/mem.zir :105:18) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :139:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(1322, 703), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWriteUnconstrained ( zirgen/circuit/rv32im/v2/dsl/mem.zir :105:18) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :139:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3117, 3315), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWriteUnconstrained ( zirgen/circuit/rv32im/v2/dsl/mem.zir :105:18) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :139:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3118, 1786), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWriteUnconstrained ( zirgen/circuit/rv32im/v2/dsl/mem.zir :106:13) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :139:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3119, 3240), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWriteUnconstrained ( zirgen/circuit/rv32im/v2/dsl/mem.zir :106:13) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :139:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(3288, 5), // loc(callsite(unknown at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :138:31) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(2804, 3316), // loc(callsite(unknown at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :138:26) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(0, 2804), // loc(callsite(unknown at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :138:47) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(3318, 69), // loc(callsite(unknown at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :138:60) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(3317, 3319), // loc(callsite(unknown at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :138:42) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(3320, 704), // loc(callsite( Reg ( :5:7) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :138:17) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(3120, 3321), // loc(callsite( Reg ( :5:7) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :138:17) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(3121, 2913), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryWriteUnconstrained ( zirgen/circuit/rv32im/v2/dsl/mem.zir :105:18) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :139:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3122, 2914), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWriteUnconstrained ( zirgen/circuit/rv32im/v2/dsl/mem.zir :105:18) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :139:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3123, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryWriteUnconstrained ( zirgen/circuit/rv32im/v2/dsl/mem.zir :105:18) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :139:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3124, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryWriteUnconstrained ( zirgen/circuit/rv32im/v2/dsl/mem.zir :105:18) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :139:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(1357, 704), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWriteUnconstrained ( zirgen/circuit/rv32im/v2/dsl/mem.zir :105:18) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :139:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3125, 3322), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWriteUnconstrained ( zirgen/circuit/rv32im/v2/dsl/mem.zir :105:18) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :139:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3126, 2127), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWriteUnconstrained ( zirgen/circuit/rv32im/v2/dsl/mem.zir :106:13) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :139:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3127, 3244), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWriteUnconstrained ( zirgen/circuit/rv32im/v2/dsl/mem.zir :106:13) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :139:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(3295, 4), // loc(callsite(unknown at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :141:28) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(3289, 3323), // loc(callsite(unknown at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :141:22) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(0, 711), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :141:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(711, 3325), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :141:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3128, 3326), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :141:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(3324, 712), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:4) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :141:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(3327, 3325), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :141:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(3129, 3328), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :141:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(711, 3324), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:4) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :141:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3130, 3329), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:17) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :141:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(711, 712), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:4) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :141:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3131, 3330), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:17) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :141:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(3132, 580), // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3133, 590), // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndCond(3073, 371, 3134), // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(1176, 1078), // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3136, 741), // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3137, 1312), // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3138, 1321), // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3139, 1334), // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3140, 1354), // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3141, 1717), // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3142, 1361), // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3143, 1367), // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3144, 552), // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3145, 566), // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3146, 580), // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3147, 590), // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndCond(3135, 374, 3148), // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndCond(3149, 377, 3148), // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Get(207), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :33:25) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Get(208), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :33:25) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Get(209), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :33:25) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Get(210), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :33:25) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(3331, 9), // loc(callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :34:22) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Mul(3332, 8), // loc(callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :34:22) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Mul(3333, 31), // loc(callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :34:22) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Mul(3334, 21), // loc(callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :34:22) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Add(3335, 3336), // loc(callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :34:22) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Add(3339, 3337), // loc(callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :34:22) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Add(3340, 3338), // loc(callsite( MachineECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :34:22) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :159:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Mul(3341, 356), // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Get(224), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :61:24) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :85:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Get(226), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :89:17) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(3343, 11), // loc(callsite(unknown at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :93:16) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(0, 3343), // loc(callsite(unknown at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :95:7) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(3346, 3344), // loc(callsite(unknown at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :95:27) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(3347, 32), // loc(callsite(unknown at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :95:31) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(3345, 3348), // loc(callsite(unknown at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :93:37) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(0, 3344), // loc(callsite(unknown at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :97:32) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(3346, 3350), // loc(callsite(unknown at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :97:27) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(3351, 33), // loc(callsite(unknown at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :97:42) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(3349, 3352), // loc(callsite(unknown at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :95:59) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(3353, 362), // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Get(211), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :128:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Get(212), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :128:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(3334, 3355), // loc(callsite(unknown at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :63:35) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :128:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3357, 3356), // loc(callsite(unknown at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :63:48) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :128:30) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Get(229), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :8:23) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :141:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(3359, 11), // loc(callsite(unknown at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :144:6) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(0, 3359), // loc(callsite(unknown at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :146:7) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(3361, 3358), // loc(callsite(unknown at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :146:18) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(3362, 32), // loc(callsite(unknown at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :146:44) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(3360, 3363), // loc(callsite(unknown at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :144:28) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(0, 3358), // loc(callsite(unknown at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :148:23) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(3361, 3365), // loc(callsite(unknown at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :148:18) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(3366, 33), // loc(callsite(unknown at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :148:48) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(3364, 3367), // loc(callsite(unknown at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :146:67) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(3368, 371), // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(3342, 3206), // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(3370, 3354), // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(3371, 3207), // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(3372, 3208), // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(3373, 3369), // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Get(141), // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :70:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(3375, 12), // loc(callsite(unknown at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :84:19) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(3376, 3331), // loc(callsite(unknown at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :84:26) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(3377, 362), // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Get(195), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:46) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Get(219), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :129:32) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Get(220), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :129:32) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Get(221), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :59:31) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :129:32) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Get(222), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :8:23) at callsite( DecomposeLow2 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :60:29) at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :129:32) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(3380, 3383), // loc(callsite(unknown at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :131:27) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(3381, 3383), // loc(callsite(unknown at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :132:27) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(3382, 3383), // loc(callsite(unknown at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :133:27) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(0, 3383), // loc(callsite(unknown at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :134:7) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(3384, 3385), // loc(callsite(unknown at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :136:13) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(3388, 3386), // loc(callsite(unknown at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :136:13) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(3389, 3387), // loc(callsite(unknown at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :136:13) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(3379, 3390), // loc(callsite(unknown at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :149:27) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(3391, 371), // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(3378, 3392), // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Mul(3332, 362), // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Get(191), // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( ECallHostReadSetup ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :77:26) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :161:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(3395, 362), // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Get(198), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:52) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(3390, 4), // loc(callsite(unknown at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :149:53) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(3397, 3398), // loc(callsite(unknown at callsite( ECallHostReadWords ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :149:47) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :164:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(3399, 371), // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(3396, 3400), // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :158:38) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Sub(3393, 604), // loc(callsite( Reg ( :5:7) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :168:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(3150, 3402), // loc(callsite( Reg ( :5:7) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :168:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Sub(3394, 607), // loc(callsite( Reg ( :5:7) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :169:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(3151, 3403), // loc(callsite( Reg ( :5:7) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :169:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Sub(3401, 610), // loc(callsite( Reg ( :5:7) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :170:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(3152, 3404), // loc(callsite( Reg ( :5:7) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :170:13) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Sub(3374, 11), // loc(callsite(unknown at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :171:30) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Sub(0, 695), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :171:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(695, 3406), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :171:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3153, 3407), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :171:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(3405, 719), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:4) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :171:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(3408, 3406), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :171:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(3154, 3409), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :171:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Mul(695, 3405), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:4) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :171:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(3155, 3410), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:17) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :171:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Mul(695, 719), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:4) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :171:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(3156, 3411), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:17) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :171:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Sub(3374, 21), // loc(callsite(unknown at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :172:31) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Sub(0, 718), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :172:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(718, 3413), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :172:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3157, 3414), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :172:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(3412, 720), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:4) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :172:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(3415, 3413), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :172:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(3158, 3416), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :172:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Mul(718, 3412), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:4) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :172:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(3159, 3417), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:17) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :172:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Mul(718, 720), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:4) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :172:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(3160, 3418), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:17) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :172:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Add(695, 718), // loc(callsite(unknown at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :173:60) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Mul(3419, 4), // loc(callsite(unknown at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :173:80) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Add(346, 3420), // loc(callsite(unknown at callsite( AddU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :27:21) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :173:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(3161, 2047), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :173:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(0, 723), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :45:28) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :173:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(723, 3422), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :45:28) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :173:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3162, 3423), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :45:28) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :173:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(723, 30), // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:12) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :173:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(3424, 722), // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:23) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :173:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(3421, 3425), // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:10) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :173:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(3163, 3426), // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :46:10) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :173:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Add(348, 723), // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :48:14) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :173:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(3164, 2052), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :173:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(0, 732), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :51:29) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :173:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(732, 3428), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :51:29) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :173:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3165, 3429), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :51:29) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :173:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(732, 30), // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:11) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :173:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(3430, 725), // loc(callsite(unknown at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:23) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :173:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(3427, 3431), // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:9) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :173:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(3166, 3432), // loc(callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :52:9) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :173:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(3167, 7), // loc(callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :177:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndCond(2868, 425, 3168), // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Mul(353, 72), // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :110:15) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(3433, 71), // loc(callsite(unknown at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :114:22) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(0, 3433), // loc(callsite(unknown at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :114:46) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(3435, 70), // loc(callsite(unknown at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :114:57) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3434, 3436), // loc(callsite(unknown at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :114:32) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Get(313), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :8:23) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :131:20) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Get(314), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :11:20) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :131:20) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(0, 3438), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :131:20) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(3438, 3440), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :131:20) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(0, 3441), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :131:20) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(2881, 3439), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:4) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :131:20) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(3442, 3440), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :131:20) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(3170, 3443), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :131:20) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(3438, 2881), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:4) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :131:20) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3171, 3444), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :131:20) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(3438, 3439), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:4) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :131:20) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3172, 3445), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :131:20) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(7, 737), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :34:26) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(0, 3446), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :34:26) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(7, 1067), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :35:27) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3174, 3447), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :35:27) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(3437, 738), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :36:28) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3175, 3448), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :36:28) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(0, 1073), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :37:24) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3176, 3449), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :37:24) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(0, 739), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :38:26) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3177, 3450), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :38:26) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(0, 1078), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :39:28) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3178, 3451), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :39:28) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(73, 740), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :41:27) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3179, 3452), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :41:27) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(7, 1084), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :42:26) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3180, 3453), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :42:26) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(7, 741), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :43:27) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3181, 3454), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :43:27) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(7, 1090), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :44:23) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3182, 3455), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :44:23) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(353, 1302), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :45:22) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3183, 3456), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :45:22) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(7, 1303), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3184, 3457), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(7, 1305), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3185, 3458), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(7, 1312), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3186, 3459), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(7, 1313), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3187, 3460), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(7, 1315), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3188, 3461), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(7, 1321), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3189, 3462), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(7, 1322), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3190, 3463), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(7, 1324), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3191, 3464), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(7, 1331), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3192, 3465), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(7, 1332), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3193, 3466), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(7, 1334), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3194, 3467), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(7, 1340), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3195, 3468), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(7, 1341), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3196, 3469), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(7, 1354), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3197, 3470), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(7, 1357), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3198, 3471), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(7, 1356), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3199, 3472), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(7, 1358), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3200, 3473), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(7, 1716), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3201, 3474), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(7, 1717), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3202, 3475), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(7, 1359), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3203, 3476), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(7, 1360), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3204, 3477), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(7, 1361), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3205, 3478), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(7, 1366), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3206, 3479), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(7, 1367), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3207, 3480), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(566, 341), // loc(callsite(unknown at callsite( ExtReg ( :10:24) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :48:27) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(559, 3481), // loc(callsite(unknown at callsite( ExtReg ( :10:24) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :48:27) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(3482, 341), // loc(callsite(unknown at callsite( ExtReg ( :10:24) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :48:27) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(552, 3483), // loc(callsite(unknown at callsite( ExtReg ( :10:24) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :48:27) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(3484, 341), // loc(callsite(unknown at callsite( ExtReg ( :10:24) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :48:27) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(549, 3485), // loc(callsite(unknown at callsite( ExtReg ( :10:24) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :48:27) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(3486, 74), // loc(callsite(unknown at callsite( ExtReg ( :11:18) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :48:27) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3208, 3487), // loc(callsite(unknown at callsite( ExtReg ( :11:11) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :48:27) at callsite( PoseidonPagingEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :119:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :133:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3209, 573), // loc(callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :132:4) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(3210, 604), // loc(callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :132:4) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(3211, 617), // loc(callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :132:4) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(3212, 505), // loc(callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :132:4) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(3213, 516), // loc(callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :132:4) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(3214, 531), // loc(callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :132:4) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(3215, 535), // loc(callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :132:4) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(3216, 546), // loc(callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :132:4) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(3217, 780), // loc(callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :132:4) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(3218, 786), // loc(callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :132:4) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(3219, 823), // loc(callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :132:4) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(3220, 829), // loc(callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :132:4) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndCond(3173, 3438, 3221), // loc(callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :132:4) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Sub(573, 15), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :84:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(0, 3488), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :84:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(604, 0), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :84:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3223, 3489), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :84:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3224, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :84:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3225, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :84:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(580, 66), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :84:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3226, 3490), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :84:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(590, 607), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :84:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3227, 3491), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :84:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3228, 2565), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :84:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(343, 587), // loc(callsite(unknown at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :84:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(780, 0), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :84:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(3229, 3493), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :84:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(783, 3492), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :84:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(3230, 3494), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :84:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(610, 12), // loc(callsite(unknown at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :79:11) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :84:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(607, 78), // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :79:34) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :84:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(3495, 3496), // loc(callsite(unknown at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :79:18) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :84:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(617, 15), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :85:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3231, 3498), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :85:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(505, 0), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :85:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3232, 3499), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :85:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3233, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :85:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3234, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :85:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(624, 67), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :85:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3235, 3500), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :85:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(638, 512), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :85:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3236, 3501), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :85:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3237, 2936), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :85:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(343, 631), // loc(callsite(unknown at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :85:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(786, 0), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :85:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(3238, 3503), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :85:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(789, 3502), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :85:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(3239, 3504), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :85:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(512, 78), // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :79:34) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :85:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(2012, 3505), // loc(callsite(unknown at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :79:18) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :85:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(516, 15), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :86:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3240, 3507), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :86:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3241, 1570), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :86:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3242, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :86:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3243, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :86:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(517, 68), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :86:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3244, 3508), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :86:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(525, 533), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :86:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3245, 3509), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :86:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3246, 2944), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :86:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(343, 524), // loc(callsite(unknown at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :86:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(823, 0), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :86:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(3247, 3511), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :86:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(826, 3510), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :86:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(3248, 3512), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :78:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :86:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(534, 12), // loc(callsite(unknown at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :79:11) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :86:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(533, 78), // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :79:34) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :86:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(3513, 3514), // loc(callsite(unknown at callsite( ReadAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :79:18) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :86:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3249, 1575), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :87:30) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3250, 2974), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :87:30) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3251, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :87:30) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3252, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :87:30) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(536, 79), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :87:30) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3253, 3516), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :87:30) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3254, 1578), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :87:30) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(545, 697), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :87:30) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3255, 3517), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :87:30) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(343, 537), // loc(callsite(unknown at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :87:30) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(829, 0), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :87:30) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3256, 3519), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :87:30) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(832, 3518), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :87:30) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3257, 3520), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :87:30) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Get(307), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :8:23) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :90:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Get(308), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :11:20) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :90:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(0, 3521), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :90:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(3521, 3523), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :90:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3258, 3524), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :90:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(3497, 3522), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:4) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :90:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(3525, 3523), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :90:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3259, 3526), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :90:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(3521, 3497), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:4) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :90:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3260, 3527), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:17) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :90:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(3521, 3522), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:4) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :90:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3261, 3528), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:17) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :90:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Get(309), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :94:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(0, 3529), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :94:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(3529, 3530), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :94:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3262, 3531), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :94:26) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Get(310), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :95:28) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(0, 3532), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :95:28) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(3532, 3533), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :95:28) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3263, 3534), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :95:28) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(3529, 26), // loc(callsite(unknown at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :96:24) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(3532, 12), // loc(callsite(unknown at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :96:42) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3535, 3536), // loc(callsite(unknown at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :96:33) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(697, 3537), // loc(callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :96:22) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(3264, 3538), // loc(callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :96:22) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Get(311), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :8:23) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :99:23) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Get(312), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :11:20) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :99:23) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(0, 3539), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :99:23) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(3539, 3541), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :99:23) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3265, 3542), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :99:23) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(698, 3540), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:4) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :99:23) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(3543, 3541), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :99:23) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3266, 3544), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :99:23) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(3539, 698), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:4) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :99:23) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3267, 3545), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:17) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :99:23) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(3539, 3540), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:4) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :99:23) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3268, 3546), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:17) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :99:23) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(3539, 11), // loc(callsite(unknown at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :101:6) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(3541, 3523), // loc(callsite(unknown at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :102:20) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(3548, 75), // loc(callsite(unknown at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :102:24) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3547, 3549), // loc(callsite(unknown at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :101:30) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(0, 3523), // loc(callsite(unknown at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :103:25) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(3541, 3551), // loc(callsite(unknown at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :103:20) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(3552, 76), // loc(callsite(unknown at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :103:37) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3550, 3553), // loc(callsite(unknown at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :102:58) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(3523, 737), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :34:26) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :105:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3269, 3555), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :34:26) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :105:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(3497, 1067), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :35:27) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :105:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3270, 3556), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :35:27) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :105:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(3515, 738), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :36:28) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :105:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3271, 3557), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :36:28) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :105:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(3529, 1073), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :37:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :105:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3272, 3558), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :37:24) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :105:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(3532, 739), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :38:26) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :105:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3273, 3559), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :38:26) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :105:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(7, 1078), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :39:28) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :105:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3274, 3560), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :39:28) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :105:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(3554, 740), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :41:27) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :105:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3275, 3561), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :41:27) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :105:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3276, 3453), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :42:26) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :105:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(3506, 741), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :43:27) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :105:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3277, 3562), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :43:27) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :105:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(698, 1090), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :44:23) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :105:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3278, 3563), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :44:23) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :105:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3279, 3456), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :45:22) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :105:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3280, 3457), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :105:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3281, 3458), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :105:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3282, 3459), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :105:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3283, 3460), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :105:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3284, 3461), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :105:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3285, 3462), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :105:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3286, 3463), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :105:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3287, 3464), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :105:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3288, 3465), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :105:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3289, 3466), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :105:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3290, 3467), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :105:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3291, 3468), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :105:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3292, 3469), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :105:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3293, 3470), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :105:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3294, 3471), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :105:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3295, 3472), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :105:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3296, 3473), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :105:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3297, 3474), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :105:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3298, 3475), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :105:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3299, 3476), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :105:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3300, 3477), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :105:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3301, 3478), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :105:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3302, 3479), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :105:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3303, 3480), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :105:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3304, 3487), // loc(callsite(unknown at callsite( ExtReg ( :11:11) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :48:27) at callsite( PoseidonEcall ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :105:17) at callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :135:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndCond(3222, 3440, 3305), // loc(callsite( PoseidonEntry ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :132:4) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :449:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(3306, 699), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3307, 704), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3308, 695), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3309, 722), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3310, 725), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3311, 747), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3312, 756), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3313, 771), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3314, 835), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3315, 841), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3316, 847), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3317, 853), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3318, 859), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3319, 865), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3320, 902), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3321, 908), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3322, 914), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3323, 920), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3324, 926), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3325, 932), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3326, 938), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3327, 944), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3328, 981), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3329, 987), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3330, 993), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3331, 999), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3332, 1005), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3333, 1011), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3334, 1017), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3335, 1023), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndCond(0, 356, 3336), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Get(113), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :34:26) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Get(115), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :35:27) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Get(117), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :36:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Get(119), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :37:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Get(121), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :38:26) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Get(123), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :39:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Get(128), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :43:27) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Get(130), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :44:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Get(132), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :45:22) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:36) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(580, 3565), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3226, 3573), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3338, 3491), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3339, 2565), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3340, 3493), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3341, 3494), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(610, 30), // loc(callsite(unknown at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :141:11) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3574, 607), // loc(callsite(unknown at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :141:18) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3565, 0), // loc(callsite(unknown at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:27) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(3342, 3498), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3343, 3499), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3344, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3345, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(624, 3576), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3346, 3577), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3347, 3501), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3348, 2936), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3349, 3503), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3350, 3504), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(513, 30), // loc(callsite(unknown at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :141:11) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3578, 512), // loc(callsite(unknown at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :141:18) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3565, 6), // loc(callsite(unknown at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:27) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(3351, 3507), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3352, 1570), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3353, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3354, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(517, 3580), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3355, 3581), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3356, 3509), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3357, 2944), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3358, 3511), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3359, 3512), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(534, 30), // loc(callsite(unknown at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :141:11) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3582, 533), // loc(callsite(unknown at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :141:18) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3565, 5), // loc(callsite(unknown at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:27) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(3360, 1575), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3361, 2974), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3362, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3363, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(536, 3584), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3364, 3585), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3365, 1578), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3366, 3517), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3367, 3519), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3368, 3520), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(697, 30), // loc(callsite(unknown at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :141:11) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3586, 698), // loc(callsite(unknown at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :141:18) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3565, 4), // loc(callsite(unknown at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:27) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(699, 15), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3369, 3589), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3370, 1973), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3371, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3372, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(700, 3588), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3373, 3590), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(702, 711), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3374, 3591), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3375, 1652), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(343, 701), // loc(callsite(unknown at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(835, 0), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3376, 3593), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(838, 3592), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3377, 3594), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(712, 30), // loc(callsite(unknown at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :141:11) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3595, 711), // loc(callsite(unknown at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :141:18) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3565, 3), // loc(callsite(unknown at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:27) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(3378, 2046), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3379, 2658), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3380, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3381, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(719, 3597), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3382, 3598), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3383, 2050), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3384, 729), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(841, 0), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3385, 3599), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(844, 2660), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3386, 3600), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(724, 30), // loc(callsite(unknown at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :141:11) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3601, 723), // loc(callsite(unknown at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :141:18) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3565, 2), // loc(callsite(unknown at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:27) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(725, 15), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3387, 3604), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3388, 2669), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3389, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3390, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(732, 3603), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3391, 3605), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(716, 750), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3392, 3606), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(744, 753), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3393, 3607), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(343, 733), // loc(callsite(unknown at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(847, 0), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3394, 3609), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(850, 3608), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3395, 3610), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(3565, 1), // loc(callsite(unknown at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:27) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(756, 15), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3396, 3612), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(771, 0), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3397, 3613), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3398, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3399, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(759, 3611), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3400, 3614), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(765, 774), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3401, 3615), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(768, 777), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3402, 3616), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(343, 762), // loc(callsite(unknown at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(853, 0), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3403, 3618), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(856, 3617), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3404, 3619), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(777, 30), // loc(callsite(unknown at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :141:11) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3620, 774), // loc(callsite(unknown at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :141:18) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :147:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(3564, 737), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :34:26) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3405, 3622), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :34:26) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(3565, 1067), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :35:27) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3406, 3623), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :35:27) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(3566, 738), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :36:28) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3407, 3624), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :36:28) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(3567, 1073), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :37:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3408, 3625), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :37:24) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(3568, 739), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :38:26) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3409, 3626), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :38:26) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(3569, 1078), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :39:28) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3410, 3627), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :39:28) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(76, 740), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :41:27) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3411, 3628), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :41:27) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3412, 3453), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :42:26) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(3570, 741), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :43:27) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3413, 3629), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :43:27) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(3571, 1090), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :44:23) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3414, 3630), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :44:23) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(3572, 1302), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :45:22) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3415, 3631), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :45:22) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3416, 3457), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3417, 3458), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3418, 3459), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3419, 3460), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3420, 3461), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3421, 3462), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3422, 3463), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3423, 3464), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3424, 3465), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3425, 3466), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3426, 3467), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3427, 3468), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3428, 3469), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3429, 3470), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3430, 3471), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3431, 3472), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(3575, 1358), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3432, 3632), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(3579, 1716), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3433, 3633), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(3583, 1717), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3434, 3634), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(3587, 1359), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3435, 3635), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(3596, 1360), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3436, 3636), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(3602, 1361), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3437, 3637), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(2671, 1366), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3438, 3638), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(3621, 1367), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3439, 3639), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3440, 3487), // loc(callsite(unknown at callsite( ExtReg ( :11:11) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :48:27) at callsite( PoseidonLoadState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :156:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :450:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3441, 859), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3442, 865), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3443, 902), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3444, 908), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3445, 914), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3446, 920), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3447, 926), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3448, 932), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3449, 938), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3450, 944), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3451, 981), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3452, 987), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3453, 993), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3454, 999), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3455, 1005), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3456, 1011), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3457, 1017), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3458, 1023), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndCond(3337, 359, 3459), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Get(126), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :42:26) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Get(134), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Get(136), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Get(138), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Get(140), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Get(142), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Get(144), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Get(146), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Get(148), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Get(150), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Get(152), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Get(154), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Get(156), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Get(158), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Get(160), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Get(162), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Get(164), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Get(166), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Get(168), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Get(170), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Get(172), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Get(174), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Get(176), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Get(178), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Get(180), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Get(188), // loc(callsite(unknown at callsite( ExtReg ( :10:24) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :48:27) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Get(186), // loc(callsite(unknown at callsite( ExtReg ( :10:24) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :48:27) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(3665, 341), // loc(callsite(unknown at callsite( ExtReg ( :10:24) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :48:27) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3666, 3667), // loc(callsite(unknown at callsite( ExtReg ( :10:24) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :48:27) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Get(184), // loc(callsite(unknown at callsite( ExtReg ( :10:24) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :48:27) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(3668, 341), // loc(callsite(unknown at callsite( ExtReg ( :10:24) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :48:27) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3669, 3670), // loc(callsite(unknown at callsite( ExtReg ( :10:24) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :48:27) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Get(182), // loc(callsite(unknown at callsite( ExtReg ( :10:24) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :48:27) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(3671, 341), // loc(callsite(unknown at callsite( ExtReg ( :10:24) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :48:27) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3672, 3673), // loc(callsite(unknown at callsite( ExtReg ( :10:24) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :48:27) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:33) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3567, 3640), // loc(callsite(unknown at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :232:19) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(0, 3534), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :233:13) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3461, 3542), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :233:13) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(0, 3540), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :233:13) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(3540, 3676), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :233:13) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3462, 3677), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :233:13) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(3532, 3539), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:4) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :233:13) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3678, 3540), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:4) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :233:13) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(3679, 0), // loc(callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:32) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :233:13) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(3463, 3680), // loc(callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:32) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :233:13) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(3540, 6), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:32) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :233:13) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3539, 3681), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:4) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :233:13) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(3682, 3675), // loc(callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:56) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :233:13) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(3464, 3683), // loc(callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:56) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :233:13) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(3570, 0), // loc(callsite(unknown at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:28) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3570, 6), // loc(callsite(unknown at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:28) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3570, 5), // loc(callsite(unknown at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:28) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3570, 4), // loc(callsite(unknown at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:28) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3570, 3), // loc(callsite(unknown at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:28) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3570, 2), // loc(callsite(unknown at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:28) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3570, 1), // loc(callsite(unknown at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:28) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3570, 10), // loc(callsite(unknown at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:65) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3657, 3658), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :42:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(3659, 3660), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :43:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(3658, 6), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :44:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(3694, 3693), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :44:19) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(3660, 6), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :45:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(3696, 3692), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :45:19) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(3693, 4), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :46:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(3698, 3697), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :46:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(3692, 4), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :47:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(3700, 3695), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :47:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(3697, 3701), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :48:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(3695, 3699), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :49:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(3661, 3662), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :42:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(3663, 3664), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :43:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(3662, 6), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :44:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(3706, 3705), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :44:19) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(3664, 6), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :45:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(3708, 3704), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :45:19) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(3705, 4), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :46:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(3710, 3709), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :46:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(3704, 4), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :47:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(3712, 3707), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :47:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(3709, 3713), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :48:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(3707, 3711), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :49:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(0, 3524), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :176:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(0, 3522), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :176:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(3522, 3716), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :176:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(3466, 3717), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :176:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3467, 3531), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :176:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(3521, 3522), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:4) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :176:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(3718, 3529), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:4) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :176:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(3719, 0), // loc(callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:32) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :176:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3468, 3720), // loc(callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:32) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :176:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(3529, 6), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:32) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :176:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(3522, 3721), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:4) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :176:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(3722, 3569), // loc(callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:56) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :176:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3469, 3723), // loc(callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:56) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :176:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(580, 3570), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3226, 3724), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3471, 3491), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3472, 2565), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3473, 3493), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(3474, 3494), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndCond(3470, 3521, 3475), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3473, 780), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndCond(3476, 3522, 3477), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3471, 3493), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :121:13) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :131:19) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(3479, 3494), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :121:13) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :131:19) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndCond(3478, 3529, 3480), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Get(196), // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Mul(3725, 3521), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(3725, 3522), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Get(192), // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :131:19) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Mul(3728, 3529), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3726, 3727), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3730, 3729), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Get(197), // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Mul(3732, 3521), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(3732, 3522), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Get(193), // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :131:19) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Mul(3735, 3529), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3733, 3734), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3737, 3736), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(3725, 3728), // loc(callsite(unknown at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :122:33) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :131:19) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(3739, 3529), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Get(81), // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :27:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :130:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Sub(3741, 3395), // loc(callsite(unknown at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :114:36) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :130:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(3742, 3522), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(3732, 3735), // loc(callsite(unknown at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :123:16) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :131:19) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(3744, 3529), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3521, 3743), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3746, 3745), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(0, 3498), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3482, 3499), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3483, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3484, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(624, 3684), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3485, 3748), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3486, 3501), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3487, 2936), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3488, 3503), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(3489, 3504), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndCond(3481, 3521, 3490), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3488, 786), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndCond(3491, 3522, 3492), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3486, 3503), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :121:13) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :131:19) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(3494, 3504), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :121:13) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :131:19) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndCond(3493, 3529, 3495), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Get(205), // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Mul(3749, 3521), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(3749, 3522), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Get(202), // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :131:19) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Mul(3752, 3529), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3750, 3751), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3754, 3753), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Get(206), // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Mul(3756, 3521), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(3756, 3522), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Get(203), // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :131:19) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Mul(3759, 3529), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3757, 3758), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3761, 3760), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(3749, 3752), // loc(callsite(unknown at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :122:33) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :131:19) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(3763, 3529), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Get(201), // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :27:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :130:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Sub(3741, 3765), // loc(callsite(unknown at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :114:36) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :130:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(3766, 3522), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(3756, 3759), // loc(callsite(unknown at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :123:16) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :131:19) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(3768, 3529), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3521, 3767), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3770, 3769), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(0, 3507), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3497, 1570), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3498, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3499, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(517, 3685), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3500, 3772), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3501, 3509), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3502, 2944), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3503, 3511), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(3504, 3512), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndCond(3496, 3521, 3505), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3503, 823), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndCond(3506, 3522, 3507), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3501, 3511), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :121:13) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :131:19) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(3509, 3512), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :121:13) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :131:19) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndCond(3508, 3529, 3510), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Get(213), // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Mul(3773, 3521), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(3773, 3522), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(3334, 3529), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3774, 3775), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3777, 3776), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Get(214), // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Mul(3779, 3521), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(3779, 3522), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(3355, 3529), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3780, 3781), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3783, 3782), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(3773, 3334), // loc(callsite(unknown at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :122:33) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :131:19) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(3785, 3529), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(3741, 3333), // loc(callsite(unknown at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :114:36) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :130:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(3787, 3522), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(3779, 3355), // loc(callsite(unknown at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :123:16) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :131:19) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(3789, 3529), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3521, 3788), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3791, 3790), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(0, 1575), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3512, 2974), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3513, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3514, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(536, 3686), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3515, 3793), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3516, 1578), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3517, 3517), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3518, 3519), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(3519, 3520), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndCond(3511, 3521, 3520), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3518, 829), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndCond(3521, 3522, 3522), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3516, 3519), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :121:13) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :131:19) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(3524, 3520), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :121:13) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :131:19) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndCond(3523, 3529, 3525), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(3382, 3521), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(3382, 3522), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Get(218), // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :131:19) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Mul(3796, 3529), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3794, 3795), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3798, 3797), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(3383, 3521), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(3383, 3522), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(3380, 3529), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3800, 3801), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3803, 3802), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(3382, 3796), // loc(callsite(unknown at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :122:33) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :131:19) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(3805, 3529), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Get(217), // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :27:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :130:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Sub(3741, 3807), // loc(callsite(unknown at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :114:36) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :130:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(3808, 3522), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(3383, 3380), // loc(callsite(unknown at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :123:16) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :131:19) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(3810, 3529), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3521, 3809), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3812, 3811), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(0, 3589), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3527, 1973), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3528, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3529, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(700, 3687), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3530, 3814), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3531, 3591), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3532, 1652), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3533, 3593), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(3534, 3594), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndCond(3526, 3521, 3535), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3533, 835), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndCond(3536, 3522, 3537), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3531, 3593), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :121:13) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :131:19) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(3539, 3594), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :121:13) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :131:19) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndCond(3538, 3529, 3540), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(3359, 3521), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(3359, 3522), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(3344, 3529), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3815, 3816), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3818, 3817), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Get(230), // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Mul(3820, 3521), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(3820, 3522), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(2627, 3529), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3821, 3822), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3824, 3823), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(3359, 3344), // loc(callsite(unknown at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :122:33) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :131:19) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(3826, 3529), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Get(225), // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :27:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :130:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Sub(3741, 3828), // loc(callsite(unknown at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :114:36) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :130:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(3829, 3522), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(3820, 2627), // loc(callsite(unknown at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :123:16) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :131:19) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(3831, 3529), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3521, 3830), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3833, 3832), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(0, 2046), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3542, 2658), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3543, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3544, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(719, 3688), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3545, 3835), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3546, 2050), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3547, 729), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3548, 3599), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(3549, 3600), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndCond(3541, 3521, 3550), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3548, 841), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndCond(3551, 3522, 3552), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3546, 3599), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :121:13) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :131:19) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(3554, 3600), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :121:13) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :131:19) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndCond(3553, 3529, 3555), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Get(237), // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Mul(3836, 3521), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(3836, 3522), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Get(234), // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :131:19) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Mul(3839, 3529), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3837, 3838), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3841, 3840), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Get(238), // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Mul(3843, 3521), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(3843, 3522), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Get(235), // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :131:19) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Mul(3846, 3529), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3844, 3845), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3848, 3847), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(3836, 3839), // loc(callsite(unknown at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :122:33) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :131:19) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(3850, 3529), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Get(233), // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :27:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :130:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Sub(3741, 3852), // loc(callsite(unknown at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :114:36) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :130:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(3853, 3522), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(3843, 3846), // loc(callsite(unknown at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :123:16) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :131:19) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(3855, 3529), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3521, 3854), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3857, 3856), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(0, 3604), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3557, 2669), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3558, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3559, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(732, 3689), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3560, 3859), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3561, 3606), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3562, 3607), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3563, 3609), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(3564, 3610), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndCond(3556, 3521, 3565), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3563, 847), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndCond(3566, 3522, 3567), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3561, 3609), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :121:13) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :131:19) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(3569, 3610), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :121:13) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :131:19) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndCond(3568, 3529, 3570), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(1114, 3521), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(1114, 3522), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Get(242), // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :120:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :131:19) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Mul(3862, 3529), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3860, 3861), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3864, 3863), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(1115, 3521), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(1115, 3522), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(1112, 3529), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3866, 3867), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3869, 3868), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(1114, 3862), // loc(callsite(unknown at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :122:33) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :131:19) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(3871, 3529), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Get(241), // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :27:29) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :67:30) at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :112:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :130:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))))) -PolyExtStep::Sub(3741, 3873), // loc(callsite(unknown at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :114:36) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :130:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(3874, 3522), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(1115, 1112), // loc(callsite(unknown at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :123:16) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :131:19) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(3876, 3529), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3521, 3875), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3878, 3877), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(0, 3612), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3572, 3613), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3573, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3574, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(759, 3690), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3575, 3880), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3576, 3615), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3577, 3616), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3578, 3618), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(3579, 3619), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :129:16) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndCond(3571, 3521, 3580), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3578, 853), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndCond(3581, 3522, 3582), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3576, 3618), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :121:13) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :131:19) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(3584, 3619), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :121:13) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :131:19) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndCond(3583, 3529, 3585), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(1122, 3521), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(1122, 3522), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(1119, 3529), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3881, 3882), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3884, 3883), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(1123, 3521), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(1123, 3522), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(1120, 3529), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3886, 3887), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3889, 3888), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(1122, 1119), // loc(callsite(unknown at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :122:33) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :131:19) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(3891, 3529), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(3741, 1118), // loc(callsite(unknown at callsite( MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :114:36) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :130:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(3893, 3522), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(1123, 1120), // loc(callsite(unknown at callsite( MemoryPageOut ( zirgen/circuit/rv32im/v2/dsl/mem.zir :123:16) at callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :131:19) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(3895, 3529), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3521, 3894), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3897, 3896), // loc(callsite( MemoryGet ( zirgen/circuit/rv32im/v2/dsl/mem.zir :128:12) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :178:15) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::GetGlobal(0, 36), // loc(callsite(unknown at callsite( ExtReg ( :10:24) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :160:14) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::GetGlobal(0, 35), // loc(callsite(unknown at callsite( ExtReg ( :10:24) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :160:14) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(3899, 341), // loc(callsite(unknown at callsite( ExtReg ( :10:24) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :160:14) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(3900, 3901), // loc(callsite(unknown at callsite( ExtReg ( :10:24) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :160:14) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::GetGlobal(0, 34), // loc(callsite(unknown at callsite( ExtReg ( :10:24) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :160:14) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(3902, 341), // loc(callsite(unknown at callsite( ExtReg ( :10:24) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :160:14) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(3903, 3904), // loc(callsite(unknown at callsite( ExtReg ( :10:24) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :160:14) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::GetGlobal(0, 33), // loc(callsite(unknown at callsite( ExtReg ( :10:24) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :160:14) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(3905, 341), // loc(callsite(unknown at callsite( ExtReg ( :10:24) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :160:14) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(3906, 3907), // loc(callsite(unknown at callsite( ExtReg ( :10:24) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :160:14) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(3908, 80), // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:30) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(3740, 74), // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:81) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(3910, 80), // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:73) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(3911, 74), // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:55) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(3909, 3908), // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:30) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(3747, 74), // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:81) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(3914, 3909), // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:73) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(3912, 3915), // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:55) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(3913, 3908), // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:30) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(3764, 74), // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:81) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(3918, 3913), // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:73) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(3916, 3919), // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:55) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(3917, 3908), // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:30) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(3771, 74), // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:81) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(3922, 3917), // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:73) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(3920, 3923), // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:55) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(3921, 3908), // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:30) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(3786, 74), // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:81) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(3926, 3921), // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:73) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(3924, 3927), // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:55) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(3925, 3908), // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:30) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(3792, 74), // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:81) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(3930, 3925), // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:73) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(3928, 3931), // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:55) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(3929, 3908), // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:30) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(3806, 74), // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:81) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(3934, 3929), // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:73) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(3932, 3935), // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:55) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(3933, 3908), // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:30) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(3813, 74), // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:81) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(3938, 3933), // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:73) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(3936, 3939), // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:55) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(3937, 3908), // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:30) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(3827, 74), // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:81) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(3942, 3937), // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:73) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(3940, 3943), // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:55) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(3941, 3908), // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:30) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(3834, 74), // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:81) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(3946, 3941), // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:73) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(3944, 3947), // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:55) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(3945, 3908), // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:30) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(3851, 74), // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:81) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(3950, 3945), // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:73) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(3948, 3951), // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:55) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(3949, 3908), // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:30) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(3858, 74), // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:81) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(3954, 3949), // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:73) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(3952, 3955), // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:55) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(3953, 3908), // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:30) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(3872, 74), // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:81) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(3958, 3953), // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:73) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(3956, 3959), // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:55) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(3957, 3908), // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:30) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(3879, 74), // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:81) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(3962, 3957), // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:73) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(3960, 3963), // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:55) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(3961, 3908), // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:30) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(3892, 74), // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:81) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(3966, 3961), // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:73) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(3964, 3967), // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:55) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(3898, 74), // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:81) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(3969, 3965), // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:73) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(3968, 3970), // loc(callsite(unknown at callsite( PolyEvalStateReduce ( zirgen/circuit/rv32im/v2/dsl/poly.zir :14:55) at callsite( PolyEval ( zirgen/circuit/rv32im/v2/dsl/poly.zir :18:11) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :170:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(3965, 3908), // loc(callsite(unknown at callsite( Pow ( zirgen/circuit/rv32im/v2/dsl/poly.zir :10:4) at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :171:29) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(3674, 3972), // loc(callsite(unknown at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :171:17) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(3973, 3971), // loc(callsite(unknown at callsite( ShiftPoly ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :171:10) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :180:23) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(3731, 3738), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :42:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(3755, 3762), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :43:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(3738, 6), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :44:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(3977, 3976), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :44:19) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(3762, 6), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :45:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(3979, 3975), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :45:19) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(3976, 4), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :46:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(3981, 3980), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :46:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(3975, 4), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :47:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(3983, 3978), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :47:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(3980, 3984), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :48:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(3978, 3982), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :49:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(3778, 3784), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :42:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(3799, 3804), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :43:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(3784, 6), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :44:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(3989, 3988), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :44:19) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(3804, 6), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :45:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(3991, 3987), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :45:19) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(3988, 4), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :46:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(3993, 3992), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :46:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(3987, 4), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :47:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(3995, 3990), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :47:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(3992, 3996), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :48:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(3990, 3994), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :49:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(3819, 3825), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :42:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(3842, 3849), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :43:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(3825, 6), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :44:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(4001, 4000), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :44:19) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(3849, 6), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :45:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(4003, 3999), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :45:19) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(4000, 4), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :46:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(4005, 4004), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :46:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(3999, 4), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :47:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(4007, 4002), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :47:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(4004, 4008), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :48:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(4002, 4006), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :49:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(3865, 3870), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :42:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(3885, 3890), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :43:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(3870, 6), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :44:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(4013, 4012), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :44:19) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(3890, 6), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :45:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(4015, 4011), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :45:19) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(4012, 4), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :46:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(4017, 4016), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :46:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(4011, 4), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :47:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(4019, 4014), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :47:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(4016, 4020), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :48:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(4014, 4018), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :49:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(3985, 3997), // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(3984, 3996), // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(3986, 3998), // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(3982, 3994), // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(4023, 4009), // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(4024, 4008), // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(4025, 4010), // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(4026, 4006), // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(4027, 4021), // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(4028, 4020), // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(4029, 4022), // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(4030, 4018), // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(4031, 3702), // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(4032, 3701), // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(4033, 3703), // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(4034, 3699), // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(4035, 3714), // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(4036, 3713), // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(4037, 3715), // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(4038, 3711), // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(3985, 4039), // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(3984, 4040), // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(3986, 4041), // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(3982, 4042), // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(3997, 4039), // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(3996, 4040), // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(3998, 4041), // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(3994, 4042), // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4009, 4039), // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4008, 4040), // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4010, 4041), // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4006, 4042), // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4021, 4039), // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4020, 4040), // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4022, 4041), // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4018, 4042), // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(3702, 4039), // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(3701, 4040), // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(3703, 4041), // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(3699, 4042), // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(3714, 4039), // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(3713, 4040), // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(3715, 4041), // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(3711, 4042), // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3586, 3622), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :34:26) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3587, 3623), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :35:27) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3588, 3624), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :36:28) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3589, 3625), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :37:24) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3590, 3626), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :38:26) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3591, 3627), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :39:28) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(81, 740), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :41:27) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3592, 4067), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :41:27) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3593, 3453), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :42:26) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(3691, 741), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :43:27) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3594, 4068), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :43:27) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3595, 3630), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :44:23) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3596, 3631), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :45:22) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(4043, 1303), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3597, 4069), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(4044, 1305), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3598, 4070), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(4045, 1312), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3599, 4071), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(4046, 1313), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3600, 4072), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(4047, 1315), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3601, 4073), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(4048, 1321), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3602, 4074), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(4049, 1322), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3603, 4075), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(4050, 1324), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3604, 4076), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(4051, 1331), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3605, 4077), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(4052, 1332), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3606, 4078), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(4053, 1334), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3607, 4079), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(4054, 1340), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3608, 4080), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(4055, 1341), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3609, 4081), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(4056, 1354), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3610, 4082), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(4057, 1357), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3611, 4083), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(4058, 1356), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3612, 4084), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(4059, 1358), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3613, 4085), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(4060, 1716), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3614, 4086), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(4061, 1717), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3615, 4087), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(4062, 1359), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3616, 4088), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(4063, 1360), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3617, 4089), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(4064, 1361), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3618, 4090), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(4065, 1366), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3619, 4091), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(4066, 1367), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3620, 4092), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(3486, 3974), // loc(callsite(unknown at callsite( ExtReg ( :11:18) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :48:27) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3621, 4093), // loc(callsite(unknown at callsite( ExtReg ( :11:11) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :48:27) at callsite( PoseidonLoadInShort ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :194:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :234:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndCond(3465, 3532, 3622), // loc(callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :233:22) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Mul(3738, 30), // loc(callsite(unknown at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :206:8) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(4094, 3731), // loc(callsite(unknown at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :206:30) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(3762, 30), // loc(callsite(unknown at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :206:8) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(4096, 3755), // loc(callsite(unknown at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :206:30) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(3784, 30), // loc(callsite(unknown at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :206:8) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(4098, 3778), // loc(callsite(unknown at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :206:30) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(3804, 30), // loc(callsite(unknown at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :206:8) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(4100, 3799), // loc(callsite(unknown at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :206:30) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(3825, 30), // loc(callsite(unknown at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :206:8) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(4102, 3819), // loc(callsite(unknown at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :206:30) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(3849, 30), // loc(callsite(unknown at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :206:8) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(4104, 3842), // loc(callsite(unknown at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :206:30) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(3870, 30), // loc(callsite(unknown at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :206:8) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(4106, 3865), // loc(callsite(unknown at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :206:30) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(3890, 30), // loc(callsite(unknown at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :206:8) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(4108, 3885), // loc(callsite(unknown at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :206:30) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3592, 3628), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :41:27) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3624, 2440), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :42:26) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3625, 4068), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :43:27) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3626, 3630), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :44:23) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3627, 3631), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :45:22) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(4095, 1303), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3628, 4110), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(4097, 1305), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3629, 4111), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(4099, 1312), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3630, 4112), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(4101, 1313), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3631, 4113), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(4103, 1315), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3632, 4114), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(4105, 1321), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3633, 4115), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(4107, 1322), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3634, 4116), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(4109, 1324), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3635, 4117), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(3649, 1331), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3636, 4118), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(3650, 1332), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3637, 4119), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(3651, 1334), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3638, 4120), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(3652, 1340), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3639, 4121), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(3653, 1341), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3640, 4122), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(3654, 1354), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3641, 4123), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(3655, 1357), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3642, 4124), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(3656, 1356), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3643, 4125), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(3657, 1358), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3644, 4126), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(3658, 1716), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3645, 4127), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(3659, 1717), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3646, 4128), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(3660, 1359), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3647, 4129), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(3661, 1360), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3648, 4130), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(3662, 1361), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3649, 4131), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(3663, 1366), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3650, 4132), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(3664, 1367), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3651, 4133), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3652, 4093), // loc(callsite(unknown at callsite( ExtReg ( :11:11) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :48:27) at callsite( PoseidonLoadInLow ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :211:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :235:23) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndCond(3623, 3539, 3653), // loc(callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :233:22) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Add(3641, 3642), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :42:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(3643, 3644), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :43:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(3642, 6), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :44:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(4136, 4135), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :44:19) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(3644, 6), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :45:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(4138, 4134), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :45:19) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(4135, 4), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :46:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(4140, 4139), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :46:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(4134, 4), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :47:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(4142, 4137), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :47:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(4139, 4143), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :48:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(4137, 4141), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :49:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(3645, 3646), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :42:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(3647, 3648), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :43:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(3646, 6), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :44:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(4148, 4147), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :44:19) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(3648, 6), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :45:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(4150, 4146), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :45:19) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(4147, 4), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :46:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(4152, 4151), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :46:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(4146, 4), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :47:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(4154, 4149), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :47:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(4151, 4155), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :48:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(4149, 4153), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :49:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(4144, 4156), // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(4143, 4155), // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(4145, 4157), // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(4141, 4153), // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(4095, 4097), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :42:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(4099, 4101), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :43:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(4097, 6), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :44:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(4164, 4163), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :44:19) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(4101, 6), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :45:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(4166, 4162), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :45:19) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(4163, 4), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :46:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(4168, 4167), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :46:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(4162, 4), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :47:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(4170, 4165), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :47:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(4167, 4171), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :48:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(4165, 4169), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :49:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(4103, 4105), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :42:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(4107, 4109), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :43:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(4105, 6), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :44:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(4176, 4175), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :44:19) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(4109, 6), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :45:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(4178, 4174), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :45:19) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(4175, 4), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :46:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(4180, 4179), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :46:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(4174, 4), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :47:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(4182, 4177), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :47:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(4179, 4183), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :48:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(4177, 4181), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :49:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(4158, 4172), // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(4159, 4171), // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(4160, 4173), // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(4161, 4169), // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(4186, 4184), // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(4187, 4183), // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(4188, 4185), // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(4189, 4181), // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(4190, 3702), // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(4191, 3701), // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(4192, 3703), // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(4193, 3699), // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(4194, 3714), // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(4195, 3713), // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(4196, 3715), // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(4197, 3711), // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(4144, 4198), // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4143, 4199), // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4145, 4200), // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4141, 4201), // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4156, 4198), // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4155, 4199), // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4157, 4200), // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4153, 4201), // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4172, 4198), // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4171, 4199), // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4173, 4200), // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4169, 4201), // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4184, 4198), // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4183, 4199), // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4185, 4200), // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4181, 4201), // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(3702, 4198), // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(3701, 4199), // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(3703, 4200), // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(3699, 4201), // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(3714, 4198), // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(3713, 4199), // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(3715, 4200), // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(3711, 4201), // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:117) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(4202, 1303), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3597, 4226), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(4203, 1305), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3655, 4227), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(4204, 1312), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3656, 4228), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(4205, 1313), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3657, 4229), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(4206, 1315), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3658, 4230), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(4207, 1321), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3659, 4231), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(4208, 1322), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3660, 4232), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(4209, 1324), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3661, 4233), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(4210, 1331), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3662, 4234), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(4211, 1332), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3663, 4235), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(4212, 1334), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3664, 4236), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(4213, 1340), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3665, 4237), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(4214, 1341), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3666, 4238), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(4215, 1354), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3667, 4239), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(4216, 1357), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3668, 4240), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(4217, 1356), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3669, 4241), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(4218, 1358), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3670, 4242), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(4219, 1716), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3671, 4243), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(4220, 1717), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3672, 4244), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(4221, 1359), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3673, 4245), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(4222, 1360), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3674, 4246), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(4223, 1361), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3675, 4247), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(4224, 1366), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3676, 4248), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(4225, 1367), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3677, 4249), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3678, 4093), // loc(callsite(unknown at callsite( ExtReg ( :11:11) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :48:27) at callsite( PoseidonLoadInHigh ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :228:17) at callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :236:24) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndCond(3654, 3540, 3679), // loc(callsite( PoseidonLoadIn ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :233:22) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :451:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(3680, 859), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3681, 865), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3682, 902), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3683, 908), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3684, 914), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3685, 920), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3686, 926), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3687, 932), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3688, 938), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3689, 944), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3690, 981), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3691, 987), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3692, 993), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3693, 999), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3694, 1005), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3695, 1011), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3696, 1017), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3697, 1023), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndCond(3460, 362, 3698), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(1175, 3446), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :34:26) at callsite( PoseidonInvalid ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :61:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :452:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3700, 3447), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :35:27) at callsite( PoseidonInvalid ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :61:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :452:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(7, 738), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :36:28) at callsite( PoseidonInvalid ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :61:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :452:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3701, 4250), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :36:28) at callsite( PoseidonInvalid ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :61:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :452:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(7, 1073), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :37:24) at callsite( PoseidonInvalid ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :61:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :452:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3702, 4251), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :37:24) at callsite( PoseidonInvalid ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :61:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :452:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(7, 739), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :38:26) at callsite( PoseidonInvalid ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :61:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :452:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3703, 4252), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :38:26) at callsite( PoseidonInvalid ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :61:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :452:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3704, 3560), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :39:28) at callsite( PoseidonInvalid ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :61:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :452:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(7, 740), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :41:27) at callsite( PoseidonInvalid ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :61:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :452:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3705, 4253), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :41:27) at callsite( PoseidonInvalid ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :61:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :452:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3706, 3453), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :42:26) at callsite( PoseidonInvalid ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :61:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :452:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3707, 3454), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :43:27) at callsite( PoseidonInvalid ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :61:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :452:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3708, 3455), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :44:23) at callsite( PoseidonInvalid ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :61:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :452:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(7, 1302), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :45:22) at callsite( PoseidonInvalid ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :61:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :452:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3709, 4254), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :45:22) at callsite( PoseidonInvalid ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :61:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :452:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3710, 3457), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonInvalid ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :61:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :452:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3711, 3458), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonInvalid ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :61:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :452:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3712, 3459), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonInvalid ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :61:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :452:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3713, 3460), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonInvalid ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :61:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :452:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3714, 3461), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonInvalid ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :61:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :452:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3715, 3462), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonInvalid ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :61:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :452:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3716, 3463), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonInvalid ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :61:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :452:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3717, 3464), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonInvalid ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :61:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :452:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3718, 3465), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonInvalid ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :61:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :452:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3719, 3466), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonInvalid ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :61:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :452:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3720, 3467), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonInvalid ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :61:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :452:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3721, 3468), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonInvalid ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :61:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :452:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3722, 3469), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonInvalid ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :61:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :452:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3723, 3470), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonInvalid ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :61:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :452:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3724, 3471), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonInvalid ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :61:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :452:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3725, 3472), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonInvalid ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :61:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :452:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3726, 3473), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonInvalid ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :61:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :452:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3727, 3474), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonInvalid ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :61:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :452:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3728, 3475), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonInvalid ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :61:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :452:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3729, 3476), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonInvalid ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :61:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :452:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3730, 3477), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonInvalid ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :61:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :452:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3731, 3478), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonInvalid ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :61:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :452:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3732, 3479), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonInvalid ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :61:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :452:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3733, 3480), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonInvalid ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :61:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :452:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3734, 3487), // loc(callsite(unknown at callsite( ExtReg ( :11:11) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :48:27) at callsite( PoseidonInvalid ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :61:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :452:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3735, 573), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3736, 604), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3737, 617), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3738, 505), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3739, 516), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3740, 531), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3741, 535), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3742, 546), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3743, 699), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3744, 704), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3745, 695), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3746, 722), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3747, 725), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3748, 747), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3749, 756), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3750, 771), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3751, 780), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3752, 786), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3753, 823), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3754, 829), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3755, 835), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3756, 841), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3757, 847), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3758, 853), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3759, 859), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3760, 865), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3761, 902), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3762, 908), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3763, 914), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3764, 920), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3765, 926), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3766, 932), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3767, 938), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3768, 944), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3769, 981), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3770, 987), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3771, 993), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3772, 999), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3773, 1005), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3774, 1011), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3775, 1017), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(3776, 1023), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndCond(3699, 365, 3777), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndCond(3778, 368, 3777), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Sub(0, 3568), // loc(callsite(unknown at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:4) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(3566, 0), // loc(callsite(unknown at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:35) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3566, 6), // loc(callsite(unknown at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:35) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3566, 5), // loc(callsite(unknown at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:35) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3566, 4), // loc(callsite(unknown at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:35) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3566, 3), // loc(callsite(unknown at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:35) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3566, 2), // loc(callsite(unknown at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:35) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3566, 1), // loc(callsite(unknown at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:35) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(3564, 43), // loc(callsite(unknown at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :269:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(0, 3564), // loc(callsite(unknown at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :269:62) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(580, 3566), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3226, 4265), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3780, 3491), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3781, 2565), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3782, 3493), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(3783, 3494), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(3575, 3641), // loc(callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :265:11) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(3784, 4266), // loc(callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :265:11) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(3785, 3498), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3786, 3499), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3787, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3788, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(624, 4256), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3789, 4267), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3790, 3501), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3791, 2936), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3792, 3503), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(3793, 3504), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(3579, 3642), // loc(callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :265:11) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(3794, 4268), // loc(callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :265:11) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(3795, 3507), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3796, 1570), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3797, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3798, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(517, 4257), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3799, 4269), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3800, 3509), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3801, 2944), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3802, 3511), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(3803, 3512), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(3583, 3643), // loc(callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :265:11) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(3804, 4270), // loc(callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :265:11) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(3805, 1575), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3806, 2974), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3807, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3808, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(536, 4258), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3809, 4271), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3810, 1578), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3811, 3517), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3812, 3519), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(3813, 3520), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(3587, 3644), // loc(callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :265:11) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(3814, 4272), // loc(callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :265:11) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(3815, 3589), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3816, 1973), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3817, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3818, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(700, 4259), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3819, 4273), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3820, 3591), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3821, 1652), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3822, 3593), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(3823, 3594), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(3596, 3645), // loc(callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :265:11) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(3824, 4274), // loc(callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :265:11) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(3825, 2046), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3826, 2658), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3827, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3828, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(719, 4260), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3829, 4275), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3830, 2050), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3831, 729), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3832, 3599), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(3833, 3600), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(3602, 3646), // loc(callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :265:11) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(3834, 4276), // loc(callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :265:11) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(3835, 3604), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3836, 2669), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3837, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3838, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(732, 4261), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3839, 4277), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3840, 3606), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3841, 3607), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3842, 3609), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(3843, 3610), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(2671, 3647), // loc(callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :265:11) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(3844, 4278), // loc(callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :265:11) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(3845, 3612), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3846, 3613), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3847, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3848, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(759, 4262), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3849, 4279), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3850, 3615), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3851, 3616), // loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3852, 3618), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::AndEqz(3853, 3619), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :91:13) at callsite( ReadElem ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :140:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :264:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Sub(3621, 3648), // loc(callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :265:11) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(3854, 4280), // loc(callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :265:11) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(3855, 3524), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :267:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(3569, 3522), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:4) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :267:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(4281, 3523), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :267:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3856, 4282), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :267:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(3521, 3569), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:4) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :267:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3857, 4283), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:17) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :267:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3858, 3528), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:17) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :267:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(3521, 11), // loc(callsite(unknown at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :268:16) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(3523, 73), // loc(callsite(unknown at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :268:56) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(4284, 4285), // loc(callsite(unknown at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :268:39) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(4264, 4286), // loc(callsite(unknown at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :269:80) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(4263, 4287), // loc(callsite(unknown at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :269:57) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(3540, 341), // loc(callsite(unknown at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :274:26) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3539, 4289), // loc(callsite(unknown at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :274:26) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(4290, 341), // loc(callsite(unknown at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :274:26) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3532, 4291), // loc(callsite(unknown at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :274:26) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(4292, 341), // loc(callsite(unknown at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :274:26) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3529, 4293), // loc(callsite(unknown at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :274:26) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(4294, 3674), // loc(callsite(unknown at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :275:24) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(4295, 80), // loc(callsite(unknown at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :275:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3859, 4296), // loc(callsite(unknown at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :275:10) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3860, 3622), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :34:26) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :276:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3861, 3623), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :35:27) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :276:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3862, 3624), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :36:28) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :276:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3863, 3625), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :37:24) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :276:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3864, 3626), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :38:26) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :276:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3865, 3627), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :39:28) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :276:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(4288, 740), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :41:27) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :276:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3866, 4297), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :41:27) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :276:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3867, 3453), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :42:26) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :276:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3868, 3454), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :43:27) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :276:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3869, 3455), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :44:23) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :276:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3870, 3631), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :45:22) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :276:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(3641, 1303), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :276:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3871, 4298), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :276:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(3642, 1305), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :276:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3872, 4299), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :276:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(3643, 1312), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :276:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3873, 4300), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :276:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(3644, 1313), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :276:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3874, 4301), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :276:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(3645, 1315), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :276:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3875, 4302), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :276:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(3646, 1321), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :276:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3876, 4303), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :276:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(3647, 1322), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :276:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3877, 4304), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :276:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(3648, 1324), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :276:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3878, 4305), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :276:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3879, 4118), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :276:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3880, 4119), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :276:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3881, 4120), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :276:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3882, 4121), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :276:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3883, 4122), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :276:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3884, 4123), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :276:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3885, 4124), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :276:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3886, 4125), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :276:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3887, 4126), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :276:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3888, 4127), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :276:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3889, 4128), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :276:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3890, 4129), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :276:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3891, 4130), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :276:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3892, 4131), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :276:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3893, 4132), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :276:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3894, 4133), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :276:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3895, 3487), // loc(callsite(unknown at callsite( ExtReg ( :11:11) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :48:27) at callsite( PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :276:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:41) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3896, 859), // loc(callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:4) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(3897, 865), // loc(callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:4) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(3898, 902), // loc(callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:4) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(3899, 908), // loc(callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:4) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(3900, 914), // loc(callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:4) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(3901, 920), // loc(callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:4) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(3902, 926), // loc(callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:4) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(3903, 932), // loc(callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:4) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(3904, 938), // loc(callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:4) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(3905, 944), // loc(callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:4) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(3906, 981), // loc(callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:4) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(3907, 987), // loc(callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:4) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(3908, 993), // loc(callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:4) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(3909, 999), // loc(callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:4) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(3910, 1005), // loc(callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:4) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(3911, 1011), // loc(callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:4) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndCond(0, 3568, 3912), // loc(callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:4) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Sub(859, 0), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :282:25) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(0, 4306), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :282:25) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(3641, 862), // loc(callsite(unknown at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :283:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(4307, 48), // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :283:31) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3914, 1933), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :283:20) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(868, 4308), // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :283:20) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3915, 4309), // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :283:20) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3916, 3488), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3917, 3489), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3918, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3919, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3920, 4265), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3921, 3493), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3922, 3494), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(607, 862), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3923, 4310), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(610, 4308), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3924, 4311), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(902, 0), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :282:25) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3925, 4312), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :282:25) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(3642, 905), // loc(callsite(unknown at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :283:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(4313, 48), // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :283:31) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(908, 0), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :283:20) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3926, 4315), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :283:20) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(911, 4314), // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :283:20) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3927, 4316), // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :283:20) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3928, 3498), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3929, 3499), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3930, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3931, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3932, 4267), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3933, 3503), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3934, 3504), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(512, 905), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3935, 4317), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(513, 4314), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3936, 4318), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(914, 0), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :282:25) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3937, 4319), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :282:25) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(3643, 917), // loc(callsite(unknown at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :283:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(4320, 48), // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :283:31) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3938, 1945), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :283:20) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(923, 4321), // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :283:20) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3939, 4322), // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :283:20) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3940, 3507), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3941, 1570), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3942, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3943, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3944, 4269), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3945, 3511), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3946, 3512), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(533, 917), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3947, 4323), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(534, 4321), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3948, 4324), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3949, 2398), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :282:25) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(3644, 929), // loc(callsite(unknown at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :283:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(4325, 48), // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :283:31) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(932, 0), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :283:20) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3950, 4327), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :283:20) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(935, 4326), // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :283:20) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3951, 4328), // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :283:20) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3952, 1575), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3953, 2974), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3954, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3955, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3956, 4271), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3957, 3519), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3958, 3520), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(698, 929), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3959, 4329), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(697, 4326), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3960, 4330), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(938, 0), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :282:25) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3961, 4331), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :282:25) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(3645, 941), // loc(callsite(unknown at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :283:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(4332, 48), // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :283:31) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(944, 0), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :283:20) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3962, 4334), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :283:20) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(947, 4333), // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :283:20) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3963, 4335), // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :283:20) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3964, 3589), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3965, 1973), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3966, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3967, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3968, 4273), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3969, 3593), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3970, 3594), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(711, 941), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3971, 4336), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(712, 4333), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3972, 4337), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3973, 2410), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :282:25) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(3646, 984), // loc(callsite(unknown at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :283:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(4338, 48), // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :283:31) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(987, 0), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :283:20) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3974, 4340), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :283:20) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(990, 4339), // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :283:20) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3975, 4341), // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :283:20) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3976, 2046), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3977, 2658), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3978, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3979, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3980, 4275), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3981, 3599), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3982, 3600), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(723, 984), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3983, 4342), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(724, 4339), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3984, 4343), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(993, 0), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :282:25) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3985, 4344), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :282:25) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(3647, 996), // loc(callsite(unknown at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :283:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(4345, 48), // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :283:31) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(999, 0), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :283:20) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3986, 4347), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :283:20) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(1002, 4346), // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :283:20) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3987, 4348), // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :283:20) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3988, 3604), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3989, 2669), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3990, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3991, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3992, 4277), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3993, 3609), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(3994, 3610), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(750, 996), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3995, 4349), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(753, 4346), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3996, 4350), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(1005, 0), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :282:25) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3997, 4351), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :282:25) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(3648, 1008), // loc(callsite(unknown at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :283:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(4352, 48), // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :283:31) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(1011, 0), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :283:20) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3998, 4354), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :283:20) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(1014, 4353), // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :283:20) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(3999, 4355), // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :283:20) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4000, 3612), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4001, 3613), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4002, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4003, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4004, 4279), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4005, 3618), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4006, 3619), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(774, 1008), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4007, 4356), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(777, 4353), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4008, 4357), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :284:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4009, 3524), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :286:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4010, 4282), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :286:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4011, 4283), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:17) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :286:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4012, 3528), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:17) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :286:22) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4013, 3622), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :34:26) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :292:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4014, 3623), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :35:27) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :292:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4015, 3624), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :36:28) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :292:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4016, 3625), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :37:24) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :292:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4017, 3626), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :38:26) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :292:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4018, 3627), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :39:28) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :292:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4019, 4297), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :41:27) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :292:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4020, 3453), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :42:26) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :292:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4021, 3454), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :43:27) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :292:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4022, 3455), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :44:23) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :292:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4023, 3631), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :45:22) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :292:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4024, 4298), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :292:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4025, 4299), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :292:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4026, 4300), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :292:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4027, 4301), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :292:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4028, 4302), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :292:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4029, 4303), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :292:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4030, 4304), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :292:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4031, 4305), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :292:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4032, 4118), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :292:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4033, 4119), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :292:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4034, 4120), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :292:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4035, 4121), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :292:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4036, 4122), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :292:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4037, 4123), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :292:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4038, 4124), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :292:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4039, 4125), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :292:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4040, 4126), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :292:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4041, 4127), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :292:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4042, 4128), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :292:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4043, 4129), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :292:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4044, 4130), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :292:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4045, 4131), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :292:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4046, 4132), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :292:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4047, 4133), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :292:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4048, 3487), // loc(callsite(unknown at callsite( ExtReg ( :11:11) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :48:27) at callsite( PoseidonStoreOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :292:17) at callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:80) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndCond(3913, 4255, 4049), // loc(callsite( PoseidonDoOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :296:4) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :454:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(4050, 1017), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(4051, 1023), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndCond(3779, 371, 4052), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Sub(70, 3566), // loc(callsite(unknown at callsite( NodeAddrToIdx ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :316:40) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :421:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(4358, 82), // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( NodeAddrToIdx ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :316:57) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :421:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(0, 3531), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :425:26) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4054, 3534), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :425:26) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4055, 3542), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :425:26) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4056, 3677), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :425:26) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4057, 3441), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :425:26) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(0, 3439), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :425:26) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(3439, 4360), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :425:26) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4058, 4361), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :425:26) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(3529, 3532), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:4) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :425:26) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(4362, 3539), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:4) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :425:26) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(4363, 3540), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:4) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :425:26) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(4364, 3438), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:4) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :425:26) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(4365, 3439), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:4) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :425:26) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(4366, 0), // loc(callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:32) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :425:26) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(4059, 4367), // loc(callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:32) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :425:26) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(3539, 6), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:32) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :425:26) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(3540, 5), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:32) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :425:26) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(3438, 4), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:32) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :425:26) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(3439, 3), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:32) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :425:26) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(3532, 4368), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:4) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :425:26) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(4372, 4369), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:4) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :425:26) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(4373, 4370), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:4) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :425:26) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(4374, 4371), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:4) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :425:26) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(4375, 3522), // loc(callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:56) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :425:26) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(4060, 4376), // loc(callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:56) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :425:26) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(4061, 4306), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( IsU24 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :320:25) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :427:9) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(3521, 862), // loc(callsite(unknown at callsite( IsU24 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :321:11) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :427:9) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(4377, 48), // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( IsU24 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :321:20) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :427:9) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(1017, 0), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( U8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :22:22) at callsite( IsU24 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :321:9) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :427:9) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4062, 4379), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( U8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :22:22) at callsite( IsU24 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :321:9) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :427:9) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(1020, 4378), // loc(callsite( U8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :23:8) at callsite( IsU24 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :321:9) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :427:9) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4063, 4380), // loc(callsite( U8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :23:8) at callsite( IsU24 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :321:9) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :427:9) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(0, 4363), // loc(callsite(unknown at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :428:4) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(4359, 0), // loc(callsite(unknown at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :429:22) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(3521, 4382), // loc(callsite(unknown at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :429:12) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(0, 1933), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( IsU24 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :320:25) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :429:11) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(4383, 868), // loc(callsite(unknown at callsite( IsU24 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :321:11) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :429:11) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(4384, 48), // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( IsU24 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :321:20) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :429:11) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(1023, 0), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( U8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :22:22) at callsite( IsU24 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :321:9) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :429:11) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4065, 4386), // loc(callsite( NondetU8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :16:14) at callsite( U8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :22:22) at callsite( IsU24 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :321:9) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :429:11) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(1026, 4385), // loc(callsite( U8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :23:8) at callsite( IsU24 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :321:9) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :429:11) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4066, 4387), // loc(callsite( U8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :23:8) at callsite( IsU24 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :321:9) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :429:11) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndCond(4064, 4363, 4067), // loc(callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :428:4) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Sub(4359, 0), // loc(callsite(unknown at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :431:12) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(4388, 3521), // loc(callsite(unknown at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :431:22) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(4389, 868), // loc(callsite(unknown at callsite( IsU24 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :321:11) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :431:11) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(4390, 48), // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( IsU24 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :321:20) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :431:11) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(1026, 4391), // loc(callsite( U8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :23:8) at callsite( IsU24 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :321:9) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :431:11) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4066, 4392), // loc(callsite( U8Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :23:8) at callsite( IsU24 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :321:9) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :431:11) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndCond(4068, 4381, 4069), // loc(callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :428:4) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Sub(3522, 353), // loc(callsite(unknown at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :434:11) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Get(315), // loc(callsite(unknown at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :11:20) at callsite( BitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :17:23) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :434:10) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(0, 4394), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:11) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( BitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :17:23) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :434:10) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(4394, 4395), // loc(callsite(unknown at callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:4) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( BitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :17:23) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :434:10) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4070, 4396), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( BitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :17:23) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :434:10) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(4393, 4394), // loc(callsite( BitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :18:8) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :434:10) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(4071, 4397), // loc(callsite( BitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :18:8) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :434:10) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(3521, 10), // loc(callsite(unknown at callsite( NodeIdxToAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :317:51) at callsite( PoseidonPagingLoadNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :328:34) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :436:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(70, 4398), // loc(callsite(unknown at callsite( NodeIdxToAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :317:38) at callsite( PoseidonPagingLoadNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :328:34) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :436:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(3521, 6), // loc(callsite(unknown at callsite( PoseidonPagingLoadNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :337:34) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :436:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Add(4400, 0), // loc(callsite(unknown at callsite( PoseidonPagingLoadNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :337:38) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :436:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(4401, 10), // loc(callsite(unknown at callsite( NodeIdxToAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :317:51) at callsite( PoseidonPagingLoadNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :337:33) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :436:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(70, 4402), // loc(callsite(unknown at callsite( NodeIdxToAddr ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :317:38) at callsite( PoseidonPagingLoadNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :337:33) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :436:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(4399, 738), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :36:28) at callsite( PoseidonPagingLoadNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :333:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :436:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3175, 4404), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :36:28) at callsite( PoseidonPagingLoadNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :333:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :436:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4073, 3449), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :37:24) at callsite( PoseidonPagingLoadNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :333:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :436:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4074, 3450), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :38:26) at callsite( PoseidonPagingLoadNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :333:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :436:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4075, 3451), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :39:28) at callsite( PoseidonPagingLoadNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :333:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :436:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4076, 3628), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :41:27) at callsite( PoseidonPagingLoadNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :333:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :436:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4077, 3453), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :42:26) at callsite( PoseidonPagingLoadNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :333:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :436:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(4403, 741), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :43:27) at callsite( PoseidonPagingLoadNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :333:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :436:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4078, 4405), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :43:27) at callsite( PoseidonPagingLoadNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :333:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :436:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4079, 2452), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :44:23) at callsite( PoseidonPagingLoadNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :333:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :436:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4080, 4254), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :45:22) at callsite( PoseidonPagingLoadNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :333:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :436:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4081, 3457), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :333:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :436:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4082, 3458), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :333:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :436:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4083, 3459), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :333:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :436:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4084, 3460), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :333:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :436:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4085, 3461), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :333:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :436:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4086, 3462), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :333:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :436:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4087, 3463), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :333:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :436:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4088, 3464), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :333:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :436:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4089, 3465), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :333:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :436:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4090, 3466), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :333:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :436:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4091, 3467), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :333:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :436:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4092, 3468), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :333:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :436:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4093, 3469), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :333:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :436:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4094, 3470), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :333:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :436:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4095, 3471), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :333:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :436:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4096, 3472), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :333:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :436:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4097, 3473), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :333:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :436:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4098, 3474), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :333:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :436:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4099, 3475), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :333:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :436:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4100, 3476), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :333:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :436:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4101, 3477), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :333:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :436:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4102, 3478), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :333:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :436:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4103, 3479), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :333:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :436:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4104, 3480), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :333:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :436:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4105, 3487), // loc(callsite(unknown at callsite( ExtReg ( :11:11) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :48:27) at callsite( PoseidonPagingLoadNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :333:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :436:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndCond(4072, 3529, 4106), // loc(callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :435:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Sub(3521, 83), // loc(callsite(unknown at callsite( PoseidonPagingLoadPage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :346:13) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :437:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(4406, 18), // loc(callsite(unknown at callsite( PoseidonPagingLoadPage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :359:20) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :437:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4073, 4251), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :37:24) at callsite( PoseidonPagingLoadPage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :355:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :437:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4108, 3450), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :38:26) at callsite( PoseidonPagingLoadPage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :355:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :437:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4109, 3451), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :39:28) at callsite( PoseidonPagingLoadPage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :355:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :437:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4110, 3628), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :41:27) at callsite( PoseidonPagingLoadPage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :355:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :437:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4111, 3453), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :42:26) at callsite( PoseidonPagingLoadPage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :355:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :437:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(4407, 741), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :43:27) at callsite( PoseidonPagingLoadPage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :355:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :437:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4112, 4408), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :43:27) at callsite( PoseidonPagingLoadPage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :355:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :437:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(11, 1090), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :44:23) at callsite( PoseidonPagingLoadPage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :355:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :437:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4113, 4409), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :44:23) at callsite( PoseidonPagingLoadPage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :355:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :437:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4114, 2458), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :45:22) at callsite( PoseidonPagingLoadPage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :355:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :437:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4115, 3457), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadPage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :355:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :437:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4116, 3458), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadPage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :355:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :437:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4117, 3459), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadPage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :355:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :437:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4118, 3460), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadPage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :355:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :437:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4119, 3461), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadPage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :355:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :437:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4120, 3462), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadPage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :355:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :437:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4121, 3463), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadPage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :355:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :437:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4122, 3464), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadPage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :355:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :437:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4123, 3465), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadPage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :355:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :437:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4124, 3466), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadPage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :355:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :437:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4125, 3467), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadPage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :355:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :437:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4126, 3468), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadPage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :355:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :437:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4127, 3469), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadPage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :355:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :437:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4128, 3470), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadPage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :355:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :437:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4129, 3471), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadPage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :355:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :437:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4130, 3472), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadPage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :355:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :437:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4131, 3473), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadPage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :355:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :437:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4132, 3474), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadPage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :355:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :437:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4133, 3475), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadPage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :355:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :437:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4134, 3476), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadPage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :355:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :437:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4135, 3477), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadPage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :355:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :437:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4136, 3478), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadPage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :355:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :437:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4137, 3479), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadPage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :355:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :437:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4138, 3480), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadPage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :355:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :437:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4139, 3487), // loc(callsite(unknown at callsite( ExtReg ( :11:11) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :48:27) at callsite( PoseidonPagingLoadPage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :355:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :437:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndCond(4107, 3532, 4140), // loc(callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :435:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Sub(71, 738), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :36:28) at callsite( PoseidonPagingLoadDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :369:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :438:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3175, 4410), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :36:28) at callsite( PoseidonPagingLoadDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :369:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :438:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4142, 4251), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :37:24) at callsite( PoseidonPagingLoadDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :369:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :438:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4143, 4252), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :38:26) at callsite( PoseidonPagingLoadDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :369:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :438:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4144, 3560), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :39:28) at callsite( PoseidonPagingLoadDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :369:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :438:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4145, 2438), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :41:27) at callsite( PoseidonPagingLoadDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :369:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :438:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4146, 3453), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :42:26) at callsite( PoseidonPagingLoadDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :369:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :438:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4147, 3454), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :43:27) at callsite( PoseidonPagingLoadDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :369:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :438:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4148, 3455), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :44:23) at callsite( PoseidonPagingLoadDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :369:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :438:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4149, 2460), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :45:22) at callsite( PoseidonPagingLoadDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :369:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :438:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4150, 3457), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :369:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :438:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4151, 3458), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :369:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :438:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4152, 3459), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :369:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :438:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4153, 3460), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :369:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :438:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4154, 3461), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :369:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :438:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4155, 3462), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :369:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :438:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4156, 3463), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :369:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :438:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4157, 3464), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :369:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :438:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4158, 3465), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :369:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :438:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4159, 3466), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :369:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :438:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4160, 3467), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :369:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :438:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4161, 3468), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :369:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :438:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4162, 3469), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :369:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :438:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4163, 3470), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :369:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :438:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4164, 3471), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :369:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :438:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4165, 3472), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :369:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :438:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4166, 3473), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :369:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :438:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4167, 3474), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :369:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :438:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4168, 3475), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :369:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :438:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4169, 3476), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :369:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :438:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4170, 3477), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :369:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :438:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4171, 3478), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :369:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :438:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4172, 3479), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :369:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :438:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4173, 3480), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingLoadDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :369:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :438:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4174, 3487), // loc(callsite(unknown at callsite( ExtReg ( :11:11) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :48:27) at callsite( PoseidonPagingLoadDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :369:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :438:28) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndCond(4141, 3539, 4175), // loc(callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :435:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(4108, 4252), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :38:26) at callsite( PoseidonPagingStorePage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :403:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :439:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(6, 1078), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :39:28) at callsite( PoseidonPagingStorePage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :403:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :439:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4177, 4411), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :39:28) at callsite( PoseidonPagingStorePage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :403:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :439:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4178, 3628), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :41:27) at callsite( PoseidonPagingStorePage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :403:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :439:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4179, 3453), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :42:26) at callsite( PoseidonPagingStorePage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :403:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :439:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4180, 4408), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :43:27) at callsite( PoseidonPagingStorePage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :403:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :439:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4181, 4409), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :44:23) at callsite( PoseidonPagingStorePage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :403:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :439:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4182, 2462), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :45:22) at callsite( PoseidonPagingStorePage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :403:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :439:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4183, 3457), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStorePage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :403:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :439:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4184, 3458), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStorePage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :403:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :439:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4185, 3459), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStorePage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :403:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :439:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4186, 3460), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStorePage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :403:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :439:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4187, 3461), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStorePage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :403:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :439:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4188, 3462), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStorePage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :403:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :439:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4189, 3463), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStorePage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :403:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :439:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4190, 3464), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStorePage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :403:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :439:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4191, 3465), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStorePage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :403:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :439:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4192, 3466), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStorePage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :403:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :439:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4193, 3467), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStorePage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :403:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :439:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4194, 3468), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStorePage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :403:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :439:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4195, 3469), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStorePage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :403:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :439:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4196, 3470), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStorePage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :403:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :439:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4197, 3471), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStorePage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :403:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :439:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4198, 3472), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStorePage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :403:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :439:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4199, 3473), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStorePage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :403:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :439:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4200, 3474), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStorePage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :403:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :439:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4201, 3475), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStorePage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :403:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :439:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4202, 3476), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStorePage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :403:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :439:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4203, 3477), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStorePage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :403:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :439:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4204, 3478), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStorePage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :403:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :439:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4205, 3479), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStorePage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :403:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :439:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4206, 3480), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStorePage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :403:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :439:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4207, 3487), // loc(callsite(unknown at callsite( ExtReg ( :11:11) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :48:27) at callsite( PoseidonPagingStorePage ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :403:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :439:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndCond(4176, 3540, 4208), // loc(callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :435:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(4074, 4252), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :38:26) at callsite( PoseidonPagingStoreNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :381:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :440:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4210, 4411), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :39:28) at callsite( PoseidonPagingStoreNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :381:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :440:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4211, 3628), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :41:27) at callsite( PoseidonPagingStoreNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :381:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :440:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4212, 3453), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :42:26) at callsite( PoseidonPagingStoreNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :381:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :440:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4213, 4405), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :43:27) at callsite( PoseidonPagingStoreNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :381:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :440:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4214, 2452), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :44:23) at callsite( PoseidonPagingStoreNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :381:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :440:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(4, 1302), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :45:22) at callsite( PoseidonPagingStoreNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :381:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :440:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4215, 4412), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :45:22) at callsite( PoseidonPagingStoreNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :381:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :440:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4216, 3457), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :381:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :440:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4217, 3458), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :381:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :440:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4218, 3459), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :381:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :440:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4219, 3460), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :381:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :440:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4220, 3461), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :381:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :440:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4221, 3462), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :381:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :440:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4222, 3463), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :381:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :440:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4223, 3464), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :381:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :440:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4224, 3465), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :381:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :440:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4225, 3466), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :381:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :440:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4226, 3467), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :381:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :440:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4227, 3468), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :381:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :440:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4228, 3469), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :381:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :440:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4229, 3470), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :381:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :440:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4230, 3471), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :381:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :440:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4231, 3472), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :381:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :440:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4232, 3473), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :381:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :440:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4233, 3474), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :381:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :440:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4234, 3475), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :381:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :440:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4235, 3476), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :381:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :440:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4236, 3477), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :381:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :440:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4237, 3478), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :381:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :440:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4238, 3479), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :381:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :440:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4239, 3480), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :381:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :440:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4240, 3487), // loc(callsite(unknown at callsite( ExtReg ( :11:11) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :48:27) at callsite( PoseidonPagingStoreNode ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :381:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :440:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndCond(4209, 3438, 4241), // loc(callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :435:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Sub(70, 738), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :36:28) at callsite( PoseidonPagingStoreDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :417:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :441:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(3175, 4413), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :36:28) at callsite( PoseidonPagingStoreDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :417:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :441:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4243, 4251), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :37:24) at callsite( PoseidonPagingStoreDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :417:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :441:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4244, 4252), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :38:26) at callsite( PoseidonPagingStoreDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :417:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :441:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4245, 3560), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :39:28) at callsite( PoseidonPagingStoreDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :417:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :441:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(3, 740), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :41:27) at callsite( PoseidonPagingStoreDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :417:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :441:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4246, 4414), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :41:27) at callsite( PoseidonPagingStoreDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :417:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :441:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4247, 3453), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :42:26) at callsite( PoseidonPagingStoreDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :417:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :441:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4248, 3454), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :43:27) at callsite( PoseidonPagingStoreDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :417:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :441:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4249, 3455), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :44:23) at callsite( PoseidonPagingStoreDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :417:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :441:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(3, 1302), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :45:22) at callsite( PoseidonPagingStoreDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :417:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :441:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4250, 4415), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :45:22) at callsite( PoseidonPagingStoreDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :417:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :441:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4251, 3457), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :417:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :441:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4252, 3458), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :417:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :441:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4253, 3459), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :417:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :441:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4254, 3460), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :417:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :441:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4255, 3461), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :417:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :441:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4256, 3462), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :417:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :441:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4257, 3463), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :417:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :441:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4258, 3464), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :417:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :441:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4259, 3465), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :417:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :441:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4260, 3466), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :417:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :441:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4261, 3467), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :417:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :441:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4262, 3468), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :417:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :441:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4263, 3469), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :417:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :441:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4264, 3470), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :417:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :441:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4265, 3471), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :417:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :441:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4266, 3472), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :417:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :441:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4267, 3473), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :417:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :441:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4268, 3474), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :417:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :441:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4269, 3475), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :417:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :441:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4270, 3476), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :417:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :441:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4271, 3477), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :417:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :441:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4272, 3478), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :417:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :441:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4273, 3479), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :417:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :441:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4274, 3480), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonPagingStoreDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :417:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :441:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4275, 3487), // loc(callsite(unknown at callsite( ExtReg ( :11:11) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :48:27) at callsite( PoseidonPagingStoreDone ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :417:17) at callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :441:29) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndCond(4242, 3439, 4276), // loc(callsite( PoseidonPaging ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :435:14) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :455:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::AndEqz(4277, 573), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(4278, 604), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(4279, 617), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(4280, 505), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(4281, 516), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(4282, 531), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(4283, 535), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(4284, 546), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(4285, 699), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(4286, 704), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(4287, 695), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(4288, 722), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(4289, 725), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(4290, 747), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(4291, 756), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(4292, 771), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(4293, 780), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(4294, 786), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(4295, 823), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(4296, 829), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(4297, 835), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(4298, 841), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(4299, 847), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(4300, 853), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(4301, 902), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(4302, 908), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(4303, 914), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(4304, 920), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(4305, 926), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(4306, 932), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(4307, 938), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(4308, 944), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(4309, 981), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(4310, 987), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(4311, 993), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(4312, 999), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(4313, 1005), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(4314, 1011), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndCond(4053, 374, 4315), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Sub(3657, 862), // loc(callsite(unknown at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :303:22) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(4416, 48), // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :303:31) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(868, 4417), // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :303:20) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(3915, 4418), // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :303:20) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(4317, 3488), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4318, 3489), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4319, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4320, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4321, 3573), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4322, 3493), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4323, 3494), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4324, 4310), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(610, 4417), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(4325, 4419), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(4326, 4312), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :302:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(3658, 905), // loc(callsite(unknown at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :303:22) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(4420, 48), // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :303:31) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4327, 4315), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :303:20) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(911, 4421), // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :303:20) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(4328, 4422), // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :303:20) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(4329, 3498), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4330, 3499), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4331, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4332, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4333, 3577), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4334, 3503), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4335, 3504), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4336, 4317), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(513, 4421), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(4337, 4423), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(4338, 4319), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :302:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(3659, 917), // loc(callsite(unknown at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :303:22) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(4424, 48), // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :303:31) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4339, 1945), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :303:20) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(923, 4425), // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :303:20) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(4340, 4426), // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :303:20) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(4341, 3507), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4342, 1570), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4343, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4344, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4345, 3581), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4346, 3511), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4347, 3512), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4348, 4323), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(534, 4425), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(4349, 4427), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(4350, 2398), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :302:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(3660, 929), // loc(callsite(unknown at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :303:22) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(4428, 48), // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :303:31) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4351, 4327), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :303:20) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(935, 4429), // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :303:20) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(4352, 4430), // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :303:20) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(4353, 1575), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4354, 2974), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4355, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4356, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4357, 3585), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4358, 3519), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4359, 3520), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4360, 4329), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(697, 4429), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(4361, 4431), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(4362, 4331), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :302:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(3661, 941), // loc(callsite(unknown at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :303:22) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(4432, 48), // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :303:31) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4363, 4334), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :303:20) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(947, 4433), // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :303:20) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(4364, 4434), // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :303:20) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(4365, 3589), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4366, 1973), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4367, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4368, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4369, 3590), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4370, 3593), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4371, 3594), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4372, 4336), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(712, 4433), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(4373, 4435), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(4374, 2410), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :302:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(3662, 984), // loc(callsite(unknown at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :303:22) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(4436, 48), // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :303:31) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4375, 4340), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :303:20) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(990, 4437), // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :303:20) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(4376, 4438), // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :303:20) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(4377, 2046), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4378, 2658), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4379, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4380, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4381, 3598), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4382, 3599), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4383, 3600), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4384, 4342), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(724, 4437), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(4385, 4439), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(4386, 4344), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :302:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(3663, 996), // loc(callsite(unknown at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :303:22) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(4440, 48), // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :303:31) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4387, 4347), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :303:20) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(1002, 4441), // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :303:20) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(4388, 4442), // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :303:20) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(4389, 3604), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4390, 2669), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4391, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4392, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4393, 3605), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4394, 3609), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4395, 3610), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4396, 4349), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(753, 4441), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(4397, 4443), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(4398, 4351), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :302:25) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(3664, 1008), // loc(callsite(unknown at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :303:22) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(4444, 48), // loc(callsite(unknown at callsite( Div ( :19:5) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :303:31) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4399, 4354), // loc(callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :36:14) at callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :42:23) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :303:20) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(1014, 4445), // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :303:20) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(4400, 4446), // loc(callsite( U16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :43:8) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :303:20) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(4401, 3612), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :69:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4402, 3613), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :70:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4403, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :72:17) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4404, 7), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :74:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4405, 3614), // loc(callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :75:16) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :97:18) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4406, 3618), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :61:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4407, 3619), // loc(callsite( IsCycle ( zirgen/circuit/rv32im/v2/dsl/mem.zir :62:14) at callsite( IsForward ( zirgen/circuit/rv32im/v2/dsl/mem.zir :84:11) at callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :98:13) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4408, 4356), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :99:22) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(777, 4445), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(4409, 4447), // loc(callsite( MemoryWrite ( zirgen/circuit/rv32im/v2/dsl/mem.zir :100:23) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :304:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(4410, 3622), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :34:26) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :306:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4411, 3623), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :35:27) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :306:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4412, 3624), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :36:28) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :306:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4413, 3625), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :37:24) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :306:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4414, 3626), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :38:26) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :306:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4415, 3627), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :39:28) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :306:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(11, 740), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :41:27) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :306:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4416, 4448), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :41:27) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :306:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4417, 3453), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :42:26) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :306:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4418, 3454), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :43:27) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :306:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4419, 3455), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :44:23) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :306:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4420, 3631), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :45:22) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :306:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4421, 4298), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :306:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4422, 4299), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :306:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4423, 4300), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :306:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4424, 4301), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :306:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4425, 4302), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :306:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4426, 4303), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :306:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4427, 4304), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :306:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4428, 4305), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :306:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4429, 4118), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :306:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4430, 4119), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :306:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4431, 4120), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :306:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4432, 4121), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :306:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4433, 4122), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :306:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4434, 4123), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :306:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4435, 4124), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :306:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4436, 4125), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :306:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4437, 4126), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :306:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4438, 4127), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :306:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4439, 4128), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :306:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4440, 4129), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :306:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4441, 4130), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :306:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4442, 4131), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :306:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4443, 4132), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :306:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4444, 4133), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :306:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4445, 3487), // loc(callsite(unknown at callsite( ExtReg ( :11:11) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :48:27) at callsite( PoseidonStoreState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :306:17) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :456:24) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4446, 1017), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(4447, 1023), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndCond(4316, 377, 4448), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(4449, 7), // loc(callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :460:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndCond(3169, 428, 4450), // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Sub(3640, 5), // loc(callsite(unknown at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :241:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(0, 575), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :241:22) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(4449, 580), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:4) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :241:22) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(4450, 574), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :241:22) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(4452, 4451), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :241:22) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(573, 4449), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:4) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :241:22) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4453, 4452), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:17) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :241:22) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(573, 580), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:4) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :241:22) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4454, 4453), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:17) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :241:22) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(3640, 1), // loc(callsite(unknown at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :242:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(4455, 589), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :242:22) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(4454, 590), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:4) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :242:22) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(4455, 588), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :242:22) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(4456, 4456), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :242:22) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(587, 4454), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:4) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :242:22) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4457, 4457), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:17) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :242:22) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(587, 590), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:4) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :242:22) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4458, 4458), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:17) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :242:22) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(3571, 0), // loc(callsite(unknown at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :243:21) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(4459, 599), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :244:23) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(4459, 604), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:4) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :244:23) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(4460, 598), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :244:23) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(4460, 4461), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :16:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :244:23) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(597, 4459), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:4) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :244:23) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4461, 4462), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :18:17) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :244:23) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(597, 604), // loc(callsite(unknown at callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:4) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :244:23) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4462, 4463), // loc(callsite( IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :20:17) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :244:23) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(3571, 587), // loc(callsite(unknown at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :245:21) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(573, 84), // loc(callsite(unknown at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :247:6) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Sub(574, 587), // loc(callsite(unknown at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :248:11) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(4466, 81), // loc(callsite(unknown at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :248:30) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(4465, 4467), // loc(callsite(unknown at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :247:40) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(587, 598), // loc(callsite(unknown at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :249:6) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(4469, 76), // loc(callsite(unknown at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :249:31) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(4468, 4470), // loc(callsite(unknown at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :248:56) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(587, 597), // loc(callsite(unknown at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :250:6) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(4472, 77), // loc(callsite(unknown at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :250:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(4471, 4473), // loc(callsite(unknown at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :249:55) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(3640, 0), // loc(callsite(unknown at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :251:54) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(4466, 4475), // loc(callsite(unknown at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :251:44) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::AndEqz(4463, 752), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :115:23) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4464, 755), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :115:23) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4465, 758), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :115:23) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4466, 761), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :115:23) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4467, 764), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :115:23) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4468, 767), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :115:23) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4469, 770), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :115:23) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4470, 773), // loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at callsite( NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13) at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :7:46) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :115:23) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(750, 753), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:4) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :115:23) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4477, 756), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:4) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :115:23) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4478, 759), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:4) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :115:23) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4479, 762), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:4) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :115:23) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4480, 765), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:4) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :115:23) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4481, 768), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:4) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :115:23) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4482, 771), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:4) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :115:23) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(4483, 0), // loc(callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:32) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :115:23) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4471, 4484), // loc(callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :9:32) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :115:23) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(759, 5), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:32) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :115:23) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(762, 4), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:32) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :115:23) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(765, 3), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:32) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :115:23) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(768, 2), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:32) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :115:23) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(771, 1), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:32) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :115:23) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(1671, 4485), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:4) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :115:23) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4490, 4486), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:4) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :115:23) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4491, 4487), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:4) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :115:23) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4492, 4488), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:4) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :115:23) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4493, 4489), // loc(callsite(unknown at callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:4) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :115:23) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Sub(4494, 3640), // loc(callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:56) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :115:23) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4472, 4495), // loc(callsite( OneHot ( zirgen/circuit/rv32im/v2/dsl/one_hot.zir :11:56) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :115:23) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(750, 85), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(750, 86), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(750, 87), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(750, 88), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(750, 89), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(750, 90), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(750, 91), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(750, 92), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(750, 93), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(750, 94), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(750, 95), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(750, 96), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(750, 97), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(750, 98), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(750, 99), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(750, 100), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(750, 101), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(750, 102), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(750, 103), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(750, 104), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(750, 105), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(750, 106), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(750, 107), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(750, 108), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(753, 132), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(753, 131), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(753, 130), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(753, 129), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(753, 128), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(753, 127), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(753, 126), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(753, 125), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(753, 124), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(753, 123), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(753, 122), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(753, 121), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(753, 120), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(753, 119), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(753, 118), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(753, 117), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(753, 116), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(753, 115), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(753, 114), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(753, 113), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(753, 112), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(753, 111), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(753, 110), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(753, 109), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(756, 156), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(756, 155), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(756, 154), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(756, 153), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(756, 152), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(756, 151), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(756, 150), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(756, 149), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(756, 148), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(756, 147), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(756, 146), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(756, 145), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(756, 144), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(756, 143), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(756, 142), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(756, 141), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(756, 140), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(756, 139), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(756, 138), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(756, 137), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(756, 136), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(756, 135), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(756, 134), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(756, 133), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(759, 180), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(759, 179), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(759, 178), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(759, 177), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(759, 176), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(759, 175), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(759, 174), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(759, 173), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(759, 172), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(759, 171), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(759, 170), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(759, 169), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(759, 168), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(759, 167), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(759, 166), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(759, 165), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(759, 164), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(759, 163), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(759, 162), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(759, 161), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(759, 160), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(759, 159), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(759, 158), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(759, 157), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(762, 204), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(762, 203), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(762, 202), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(762, 201), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(762, 200), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(762, 199), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(762, 198), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(762, 197), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(762, 196), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(762, 195), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(762, 194), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(762, 193), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(762, 192), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(762, 191), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(762, 190), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(762, 189), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(762, 188), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(762, 187), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(762, 186), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(762, 185), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(762, 184), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(762, 183), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(762, 182), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(762, 181), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(765, 228), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(765, 227), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(765, 226), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(765, 225), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(765, 224), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(765, 223), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(765, 222), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(765, 221), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(765, 220), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(765, 219), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(765, 218), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(765, 217), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(765, 216), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(765, 215), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(765, 214), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(765, 213), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(765, 212), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(765, 211), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(765, 210), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(765, 209), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(765, 208), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(765, 207), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(765, 206), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(765, 205), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(768, 252), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(768, 251), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(768, 250), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(768, 249), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(768, 248), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(768, 247), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(768, 246), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(768, 245), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(768, 244), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(768, 243), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(768, 242), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(768, 241), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(768, 240), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(768, 239), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(768, 238), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(768, 237), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(768, 236), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(768, 235), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(768, 234), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(768, 233), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(768, 232), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(768, 231), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(768, 230), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(768, 229), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(771, 276), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(771, 275), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(771, 274), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(771, 273), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(771, 272), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(771, 271), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(771, 270), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(771, 269), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(771, 268), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(771, 267), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(771, 266), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(771, 265), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(771, 264), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(771, 263), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(771, 262), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(771, 261), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(771, 260), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(771, 259), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(771, 258), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(771, 257), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(771, 256), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(771, 255), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(771, 254), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(771, 253), // loc(callsite(unknown at callsite( MultBy ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :111:16) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :119:12) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4496, 4520), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4497, 4521), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4498, 4522), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4499, 4523), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4500, 4524), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4501, 4525), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4502, 4526), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4503, 4527), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4504, 4528), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4505, 4529), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4506, 4530), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4507, 4531), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4508, 4532), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4509, 4533), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4510, 4534), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4511, 4535), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4512, 4536), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4513, 4537), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4514, 4538), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4515, 4539), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4516, 4540), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4517, 4541), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4518, 4542), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4519, 4543), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4688, 4544), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4689, 4545), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4690, 4546), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4691, 4547), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4692, 4548), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4693, 4549), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4694, 4550), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4695, 4551), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4696, 4552), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4697, 4553), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4698, 4554), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4699, 4555), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4700, 4556), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4701, 4557), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4702, 4558), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4703, 4559), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4704, 4560), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4705, 4561), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4706, 4562), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4707, 4563), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4708, 4564), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4709, 4565), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4710, 4566), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4711, 4567), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4712, 4568), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4713, 4569), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4714, 4570), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4715, 4571), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4716, 4572), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4717, 4573), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4718, 4574), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4719, 4575), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4720, 4576), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4721, 4577), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4722, 4578), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4723, 4579), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4724, 4580), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4725, 4581), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4726, 4582), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4727, 4583), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4728, 4584), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4729, 4585), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4730, 4586), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4731, 4587), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4732, 4588), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4733, 4589), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4734, 4590), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4735, 4591), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4736, 4592), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4737, 4593), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4738, 4594), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4739, 4595), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4740, 4596), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4741, 4597), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4742, 4598), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4743, 4599), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4744, 4600), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4745, 4601), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4746, 4602), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4747, 4603), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4748, 4604), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4749, 4605), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4750, 4606), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4751, 4607), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4752, 4608), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4753, 4609), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4754, 4610), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4755, 4611), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4756, 4612), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4757, 4613), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4758, 4614), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4759, 4615), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4760, 4616), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4761, 4617), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4762, 4618), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4763, 4619), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4764, 4620), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4765, 4621), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4766, 4622), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4767, 4623), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4768, 4624), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4769, 4625), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4770, 4626), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4771, 4627), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4772, 4628), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4773, 4629), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4774, 4630), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4775, 4631), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4776, 4632), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4777, 4633), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4778, 4634), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4779, 4635), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4780, 4636), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4781, 4637), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4782, 4638), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4783, 4639), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4784, 4640), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4785, 4641), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4786, 4642), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4787, 4643), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4788, 4644), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4789, 4645), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4790, 4646), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4791, 4647), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4792, 4648), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4793, 4649), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4794, 4650), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4795, 4651), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4796, 4652), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4797, 4653), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4798, 4654), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4799, 4655), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4800, 4656), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4801, 4657), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4802, 4658), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4803, 4659), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4804, 4660), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4805, 4661), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4806, 4662), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4807, 4663), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4808, 4664), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4809, 4665), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4810, 4666), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4811, 4667), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4812, 4668), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4813, 4669), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4814, 4670), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4815, 4671), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4816, 4672), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4817, 4673), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4818, 4674), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4819, 4675), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4820, 4676), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4821, 4677), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4822, 4678), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4823, 4679), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4824, 4680), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4825, 4681), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4826, 4682), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4827, 4683), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4828, 4684), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4829, 4685), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4830, 4686), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(4831, 4687), // loc(callsite(unknown at callsite( AddConsts ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :107:23) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :118:19) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Add(3641, 4832), // loc(callsite(unknown at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:44) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(4856, 4856), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:17) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(4857, 4856), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:22) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(4858, 610), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4473, 4859), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(610, 610), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:15) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(4860, 4856), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:23) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(4861, 607), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4474, 4862), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(3642, 4833), // loc(callsite(unknown at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:44) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(4863, 4863), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:17) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(4864, 4863), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:22) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(4865, 624), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4475, 4866), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(624, 624), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:15) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(4867, 4863), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:23) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(4868, 617), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4476, 4869), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(3643, 4834), // loc(callsite(unknown at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:44) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(4870, 4870), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:17) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(4871, 4870), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:22) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(4872, 638), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4477, 4873), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(638, 638), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:15) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(4874, 4870), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:23) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(4875, 631), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4478, 4876), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(3644, 4835), // loc(callsite(unknown at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:44) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(4877, 4877), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:17) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(4878, 4877), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:22) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(4879, 505), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4479, 4880), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(505, 505), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:15) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(4881, 4877), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:23) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(4882, 1596), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4480, 4883), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(3645, 4836), // loc(callsite(unknown at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:44) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(4884, 4884), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:17) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(4885, 4884), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:22) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(4886, 513), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4481, 4887), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(513, 513), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:15) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(4888, 4884), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:23) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(4889, 512), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4482, 4890), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(3646, 4837), // loc(callsite(unknown at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:44) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(4891, 4891), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:17) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(4892, 4891), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:22) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(4893, 517), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4483, 4894), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(517, 517), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:15) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(4895, 4891), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:23) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(4896, 516), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4484, 4897), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(3647, 4838), // loc(callsite(unknown at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:44) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(4898, 4898), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:17) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(4899, 4898), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:22) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(4900, 525), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4485, 4901), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(525, 525), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:15) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(4902, 4898), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:23) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(4903, 524), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4486, 4904), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(3648, 4839), // loc(callsite(unknown at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:44) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(4905, 4905), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:17) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(4906, 4905), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:22) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(4907, 531), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4487, 4908), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(531, 531), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:15) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(4909, 4905), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:23) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(4910, 532), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4488, 4911), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(3649, 4840), // loc(callsite(unknown at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:44) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(4912, 4912), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:17) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(4913, 4912), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:22) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(4914, 534), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4489, 4915), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(534, 534), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:15) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(4916, 4912), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:23) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(4917, 533), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4490, 4918), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(3650, 4841), // loc(callsite(unknown at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:44) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(4919, 4919), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:17) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(4920, 4919), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:22) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(4921, 536), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4491, 4922), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(536, 536), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:15) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(4923, 4919), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:23) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(4924, 535), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4492, 4925), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(3651, 4842), // loc(callsite(unknown at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:44) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(4926, 4926), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:17) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(4927, 4926), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:22) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(4928, 538), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4493, 4929), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(538, 538), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:15) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(4930, 4926), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:23) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(4931, 537), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4494, 4932), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(3652, 4843), // loc(callsite(unknown at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:44) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(4933, 4933), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:17) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(4934, 4933), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:22) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(4935, 546), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4495, 4936), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(546, 546), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:15) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(4937, 4933), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:23) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(4938, 545), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4496, 4939), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(3653, 4844), // loc(callsite(unknown at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:44) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(4940, 4940), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:17) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(4941, 4940), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:22) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(4942, 697), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4497, 4943), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(697, 697), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:15) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(4944, 4940), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:23) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(4945, 698), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4498, 4946), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(3654, 4845), // loc(callsite(unknown at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:44) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(4947, 4947), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:17) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(4948, 4947), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:22) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(4949, 700), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4499, 4950), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(700, 700), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:15) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(4951, 4947), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:23) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(4952, 699), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4500, 4953), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(3655, 4846), // loc(callsite(unknown at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:44) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(4954, 4954), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:17) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(4955, 4954), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:22) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(4956, 702), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4501, 4957), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(702, 702), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:15) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(4958, 4954), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:23) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(4959, 701), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4502, 4960), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(3656, 4847), // loc(callsite(unknown at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:44) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(4961, 4961), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:17) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(4962, 4961), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:22) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(4963, 704), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4503, 4964), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(704, 704), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:15) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(4965, 4961), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:23) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(4966, 703), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4504, 4967), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(3657, 4848), // loc(callsite(unknown at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:44) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(4968, 4968), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:17) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(4969, 4968), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:22) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(4970, 712), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4505, 4971), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(712, 712), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:15) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(4972, 4968), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:23) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(4973, 711), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4506, 4974), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(3658, 4849), // loc(callsite(unknown at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:44) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(4975, 4975), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:17) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(4976, 4975), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:22) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(4977, 719), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4507, 4978), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(719, 719), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:15) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(4979, 4975), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:23) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(4980, 695), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4508, 4981), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(3659, 4850), // loc(callsite(unknown at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:44) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(4982, 4982), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:17) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(4983, 4982), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:22) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(4984, 720), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4509, 4985), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(720, 720), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:15) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(4986, 4982), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:23) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(4987, 718), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4510, 4988), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(3660, 4851), // loc(callsite(unknown at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:44) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(4989, 4989), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:17) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(4990, 4989), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:22) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(4991, 722), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4511, 4992), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(722, 722), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:15) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(4993, 4989), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:23) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(4994, 721), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4512, 4995), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(3661, 4852), // loc(callsite(unknown at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:44) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(4996, 4996), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:17) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(4997, 4996), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:22) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(4998, 724), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4513, 4999), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(724, 724), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:15) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5000, 4996), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:23) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(5001, 723), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4514, 5002), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(3662, 4853), // loc(callsite(unknown at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:44) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(5003, 5003), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:17) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5004, 5003), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:22) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(5005, 732), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4515, 5006), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(732, 732), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:15) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5007, 5003), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:23) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(5008, 725), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4516, 5009), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(3663, 4854), // loc(callsite(unknown at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:44) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(5010, 5010), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:17) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5011, 5010), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:22) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(5012, 716), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4517, 5013), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(716, 716), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:15) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5014, 5010), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:23) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(5015, 733), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4518, 5016), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(3664, 4855), // loc(callsite(unknown at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:44) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(5017, 5017), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:17) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5018, 5017), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:22) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(5019, 747), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4519, 5020), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(747, 747), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:15) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5021, 5017), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:23) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(5022, 744), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4520, 5023), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:39) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(607, 617), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :42:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(631, 1596), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :43:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(617, 6), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :44:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(5026, 5025), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :44:19) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(1637, 5024), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :45:19) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(5025, 4), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :46:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(5029, 5028), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :46:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(5024, 4), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :47:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(5031, 5027), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :47:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(5028, 5032), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :48:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(5027, 5030), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :49:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(512, 516), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :42:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(524, 532), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :43:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(516, 6), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :44:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(5037, 5036), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :44:19) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(3254, 5035), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :45:19) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(5036, 4), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :46:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(5040, 5039), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :46:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(5035, 4), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :47:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(5042, 5038), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :47:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(5039, 5043), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :48:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(5038, 5041), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :49:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(533, 535), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :42:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(537, 545), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :43:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(535, 6), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :44:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(5048, 5047), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :44:19) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(545, 6), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :45:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(5050, 5046), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :45:19) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(5047, 4), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :46:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(5052, 5051), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :46:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(5046, 4), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :47:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(5054, 5049), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :47:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(5051, 5055), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :48:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(5049, 5053), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :49:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(698, 699), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :42:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(701, 703), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :43:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(2808, 5059), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :44:19) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(703, 6), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :45:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(5061, 5058), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :45:19) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(5059, 4), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :46:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(5063, 5062), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :46:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(5058, 4), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :47:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(5065, 5060), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :47:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(5062, 5066), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :48:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(5060, 5064), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :49:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(711, 695), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :42:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(718, 721), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :43:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(695, 6), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :44:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(5071, 5070), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :44:19) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(721, 6), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :45:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(5073, 5069), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :45:19) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(5070, 4), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :46:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(5075, 5074), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :46:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(5069, 4), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :47:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(5077, 5072), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :47:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(5074, 5078), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :48:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(5072, 5076), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :49:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(723, 725), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :42:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(733, 744), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :43:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(725, 6), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :44:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(5083, 5082), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :44:19) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(744, 6), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :45:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(5085, 5081), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :45:19) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(5082, 4), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :46:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(5087, 5086), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :46:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Mul(5081, 4), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :47:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(5089, 5084), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :47:15) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(5086, 5090), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :48:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(5084, 5088), // loc(callsite(unknown at callsite( MultiplyByCirculant ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :49:11) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :61:25) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(5033, 5044), // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(5032, 5043), // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(5034, 5045), // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(5030, 5041), // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(5093, 5056), // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(5094, 5055), // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(5095, 5057), // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(5096, 5053), // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(5097, 5067), // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(5098, 5066), // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(5099, 5068), // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(5100, 5064), // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(5101, 5079), // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(5102, 5078), // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(5103, 5080), // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(5104, 5076), // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(5105, 5091), // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(5106, 5090), // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(5107, 5092), // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(5108, 5088), // loc(callsite(unknown at callsite( ReduceVec4 ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :54:22) at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :64:18) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))))) -PolyExtStep::Add(5033, 5109), // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5032, 5110), // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5034, 5111), // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5030, 5112), // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5044, 5109), // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5043, 5110), // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5045, 5111), // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5041, 5112), // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5056, 5109), // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5055, 5110), // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5057, 5111), // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5053, 5112), // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5067, 5109), // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5066, 5110), // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5068, 5111), // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5064, 5112), // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5079, 5109), // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5078, 5110), // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5080, 5111), // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5076, 5112), // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5091, 5109), // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5090, 5110), // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5092, 5111), // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5088, 5112), // loc(callsite(unknown at callsite( MultiplyByMExt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :69:18) at callsite( DoExtRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :103:18) at callsite( DoExtRoundByIdx ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :122:14) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :252:32) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4521, 3622), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :34:26) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4522, 3623), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :35:27) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4523, 3624), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :36:28) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4524, 3625), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :37:24) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4525, 3626), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :38:26) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4526, 3627), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :39:28) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(4474, 740), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :41:27) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4527, 5137), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :41:27) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(4476, 1084), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :42:26) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4528, 5138), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :42:26) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4529, 3629), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :43:27) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(4464, 1090), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :44:23) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4530, 5139), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :44:23) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4531, 3631), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :45:22) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(5113, 1303), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4532, 5140), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(5114, 1305), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4533, 5141), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(5115, 1312), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4534, 5142), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(5116, 1313), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4535, 5143), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(5117, 1315), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4536, 5144), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(5118, 1321), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4537, 5145), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(5119, 1322), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4538, 5146), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(5120, 1324), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4539, 5147), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(5121, 1331), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4540, 5148), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(5122, 1332), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4541, 5149), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(5123, 1334), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4542, 5150), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(5124, 1340), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4543, 5151), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(5125, 1341), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4544, 5152), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(5126, 1354), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4545, 5153), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(5127, 1357), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4546, 5154), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(5128, 1356), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4547, 5155), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(5129, 1358), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4548, 5156), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(5130, 1716), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4549, 5157), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(5131, 1717), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4550, 5158), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(5132, 1359), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4551, 5159), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(5133, 1360), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4552, 5160), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(5134, 1361), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4553, 5161), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(5135, 1366), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4554, 5162), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(5136, 1367), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4555, 5163), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(3486, 3674), // loc(callsite(unknown at callsite( ExtReg ( :11:18) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :48:27) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndEqz(4556, 5164), // loc(callsite(unknown at callsite( ExtReg ( :11:11) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :48:27) at callsite( PoseidonExtRound ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :253:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :468:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndCond(0, 356, 4557), // loc(callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :467:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(3641, 277), // loc(callsite(unknown at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :31:13) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(5165, 5165), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:17) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5166, 5165), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:22) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(5167, 580), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(0, 5168), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(580, 580), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:15) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5169, 5165), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:23) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(5170, 573), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4559, 5171), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(573, 3642), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5172, 3643), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5173, 3644), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5174, 3645), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5175, 3646), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5176, 3647), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5177, 3648), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5178, 3649), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5179, 3650), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5180, 3651), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5181, 3652), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5182, 3653), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5183, 3654), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5184, 3655), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5185, 3656), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5186, 3657), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5187, 3658), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5188, 3659), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5189, 3660), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5190, 3661), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5191, 3662), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5192, 3663), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5193, 3664), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(573, 298), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5194, 5195), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(3642, 299), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5194, 5197), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(3643, 300), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5194, 5199), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(3644, 301), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5194, 5201), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(3645, 302), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5194, 5203), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(3646, 303), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5194, 5205), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(3647, 304), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5194, 5207), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(3648, 305), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5194, 5209), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(3649, 306), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5194, 5211), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(3650, 307), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5194, 5213), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(3651, 308), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5194, 5215), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(3652, 309), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5194, 5217), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(3653, 310), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5194, 5219), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(3654, 311), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5194, 5221), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(3655, 312), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5194, 5223), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(3656, 313), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5194, 5225), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(3657, 314), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5194, 5227), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(3658, 315), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5194, 5229), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(3659, 316), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5194, 5231), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(3660, 317), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5194, 5233), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(3661, 318), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5194, 5235), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(3662, 319), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5194, 5237), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(3663, 320), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5194, 5239), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(3664, 321), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5194, 5241), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5196, 278), // loc(callsite(unknown at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :31:13) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(5243, 5243), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:17) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5244, 5243), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:22) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(5245, 590), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4560, 5246), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(590, 590), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:15) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5247, 5243), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:23) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(5248, 587), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4561, 5249), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(587, 5198), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5250, 5200), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5251, 5202), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5252, 5204), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5253, 5206), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5254, 5208), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5255, 5210), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5256, 5212), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5257, 5214), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5258, 5216), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5259, 5218), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5260, 5220), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5261, 5222), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5262, 5224), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5263, 5226), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5264, 5228), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5265, 5230), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5266, 5232), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5267, 5234), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5268, 5236), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5269, 5238), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5270, 5240), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5271, 5242), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(587, 298), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5272, 5273), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5198, 299), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5272, 5275), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5200, 300), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5272, 5277), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5202, 301), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5272, 5279), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5204, 302), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5272, 5281), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5206, 303), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5272, 5283), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5208, 304), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5272, 5285), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5210, 305), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5272, 5287), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5212, 306), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5272, 5289), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5214, 307), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5272, 5291), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5216, 308), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5272, 5293), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5218, 309), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5272, 5295), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5220, 310), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5272, 5297), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5222, 311), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5272, 5299), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5224, 312), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5272, 5301), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5226, 313), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5272, 5303), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5228, 314), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5272, 5305), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5230, 315), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5272, 5307), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5232, 316), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5272, 5309), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5234, 317), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5272, 5311), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5236, 318), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5272, 5313), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5238, 319), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5272, 5315), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5240, 320), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5272, 5317), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5242, 321), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5272, 5319), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5274, 279), // loc(callsite(unknown at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :31:13) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(5321, 5321), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:17) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5322, 5321), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:22) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(5323, 604), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4562, 5324), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(604, 604), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:15) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5325, 5321), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:23) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(5326, 597), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4563, 5327), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(597, 5276), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5328, 5278), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5329, 5280), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5330, 5282), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5331, 5284), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5332, 5286), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5333, 5288), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5334, 5290), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5335, 5292), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5336, 5294), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5337, 5296), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5338, 5298), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5339, 5300), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5340, 5302), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5341, 5304), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5342, 5306), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5343, 5308), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5344, 5310), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5345, 5312), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5346, 5314), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5347, 5316), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5348, 5318), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5349, 5320), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(597, 298), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5350, 5351), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5276, 299), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5350, 5353), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5278, 300), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5350, 5355), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5280, 301), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5350, 5357), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5282, 302), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5350, 5359), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5284, 303), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5350, 5361), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5286, 304), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5350, 5363), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5288, 305), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5350, 5365), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5290, 306), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5350, 5367), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5292, 307), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5350, 5369), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5294, 308), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5350, 5371), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5296, 309), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5350, 5373), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5298, 310), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5350, 5375), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5300, 311), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5350, 5377), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5302, 312), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5350, 5379), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5304, 313), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5350, 5381), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5306, 314), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5350, 5383), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5308, 315), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5350, 5385), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5310, 316), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5350, 5387), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5312, 317), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5350, 5389), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5314, 318), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5350, 5391), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5316, 319), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5350, 5393), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5318, 320), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5350, 5395), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5320, 321), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5350, 5397), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5352, 280), // loc(callsite(unknown at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :31:13) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(5399, 5399), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:17) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5400, 5399), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:22) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(5401, 610), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4564, 5402), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(4860, 5399), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:23) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(5403, 607), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4565, 5404), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(607, 5354), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5405, 5356), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5406, 5358), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5407, 5360), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5408, 5362), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5409, 5364), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5410, 5366), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5411, 5368), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5412, 5370), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5413, 5372), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5414, 5374), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5415, 5376), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5416, 5378), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5417, 5380), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5418, 5382), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5419, 5384), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5420, 5386), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5421, 5388), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5422, 5390), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5423, 5392), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5424, 5394), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5425, 5396), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5426, 5398), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(607, 298), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5427, 5428), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5354, 299), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5427, 5430), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5356, 300), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5427, 5432), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5358, 301), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5427, 5434), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5360, 302), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5427, 5436), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5362, 303), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5427, 5438), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5364, 304), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5427, 5440), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5366, 305), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5427, 5442), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5368, 306), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5427, 5444), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5370, 307), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5427, 5446), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5372, 308), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5427, 5448), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5374, 309), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5427, 5450), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5376, 310), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5427, 5452), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5378, 311), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5427, 5454), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5380, 312), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5427, 5456), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5382, 313), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5427, 5458), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5384, 314), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5427, 5460), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5386, 315), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5427, 5462), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5388, 316), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5427, 5464), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5390, 317), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5427, 5466), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5392, 318), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5427, 5468), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5394, 319), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5427, 5470), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5396, 320), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5427, 5472), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5398, 321), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5427, 5474), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5429, 281), // loc(callsite(unknown at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :31:13) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(5476, 5476), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:17) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5477, 5476), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:22) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(5478, 624), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4566, 5479), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(4867, 5476), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:23) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(5480, 617), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4567, 5481), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(617, 5431), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5482, 5433), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5483, 5435), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5484, 5437), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5485, 5439), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5486, 5441), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5487, 5443), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5488, 5445), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5489, 5447), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5490, 5449), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5491, 5451), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5492, 5453), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5493, 5455), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5494, 5457), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5495, 5459), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5496, 5461), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5497, 5463), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5498, 5465), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5499, 5467), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5500, 5469), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5501, 5471), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5502, 5473), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5503, 5475), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(617, 298), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5504, 5505), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5431, 299), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5504, 5507), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5433, 300), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5504, 5509), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5435, 301), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5504, 5511), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5437, 302), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5504, 5513), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5439, 303), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5504, 5515), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5441, 304), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5504, 5517), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5443, 305), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5504, 5519), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5445, 306), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5504, 5521), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5447, 307), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5504, 5523), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5449, 308), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5504, 5525), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5451, 309), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5504, 5527), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5453, 310), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5504, 5529), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5455, 311), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5504, 5531), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5457, 312), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5504, 5533), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5459, 313), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5504, 5535), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5461, 314), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5504, 5537), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5463, 315), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5504, 5539), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5465, 316), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5504, 5541), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5467, 317), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5504, 5543), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5469, 318), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5504, 5545), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5471, 319), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5504, 5547), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5473, 320), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5504, 5549), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5475, 321), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5504, 5551), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5506, 282), // loc(callsite(unknown at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :31:13) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(5553, 5553), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:17) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5554, 5553), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:22) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(5555, 638), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4568, 5556), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(4874, 5553), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:23) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(5557, 631), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4569, 5558), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(631, 5508), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5559, 5510), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5560, 5512), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5561, 5514), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5562, 5516), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5563, 5518), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5564, 5520), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5565, 5522), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5566, 5524), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5567, 5526), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5568, 5528), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5569, 5530), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5570, 5532), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5571, 5534), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5572, 5536), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5573, 5538), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5574, 5540), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5575, 5542), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5576, 5544), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5577, 5546), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5578, 5548), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5579, 5550), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5580, 5552), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(631, 298), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5581, 5582), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5508, 299), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5581, 5584), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5510, 300), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5581, 5586), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5512, 301), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5581, 5588), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5514, 302), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5581, 5590), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5516, 303), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5581, 5592), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5518, 304), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5581, 5594), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5520, 305), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5581, 5596), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5522, 306), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5581, 5598), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5524, 307), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5581, 5600), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5526, 308), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5581, 5602), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5528, 309), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5581, 5604), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5530, 310), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5581, 5606), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5532, 311), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5581, 5608), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5534, 312), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5581, 5610), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5536, 313), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5581, 5612), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5538, 314), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5581, 5614), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5540, 315), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5581, 5616), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5542, 316), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5581, 5618), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5544, 317), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5581, 5620), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5546, 318), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5581, 5622), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5548, 319), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5581, 5624), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5550, 320), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5581, 5626), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5552, 321), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5581, 5628), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5583, 283), // loc(callsite(unknown at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :31:13) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(5630, 5630), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:17) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5631, 5630), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:22) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(5632, 505), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4570, 5633), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(4881, 5630), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:23) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(5634, 1596), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4571, 5635), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(1596, 5585), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5636, 5587), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5637, 5589), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5638, 5591), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5639, 5593), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5640, 5595), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5641, 5597), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5642, 5599), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5643, 5601), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5644, 5603), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5645, 5605), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5646, 5607), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5647, 5609), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5648, 5611), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5649, 5613), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5650, 5615), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5651, 5617), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5652, 5619), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5653, 5621), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5654, 5623), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5655, 5625), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5656, 5627), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5657, 5629), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(1596, 298), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5658, 5659), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5585, 299), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5658, 5661), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5587, 300), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5658, 5663), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5589, 301), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5658, 5665), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5591, 302), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5658, 5667), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5593, 303), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5658, 5669), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5595, 304), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5658, 5671), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5597, 305), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5658, 5673), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5599, 306), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5658, 5675), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5601, 307), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5658, 5677), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5603, 308), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5658, 5679), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5605, 309), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5658, 5681), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5607, 310), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5658, 5683), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5609, 311), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5658, 5685), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5611, 312), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5658, 5687), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5613, 313), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5658, 5689), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5615, 314), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5658, 5691), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5617, 315), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5658, 5693), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5619, 316), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5658, 5695), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5621, 317), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5658, 5697), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5623, 318), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5658, 5699), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5625, 319), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5658, 5701), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5627, 320), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5658, 5703), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5629, 321), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5658, 5705), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5660, 284), // loc(callsite(unknown at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :31:13) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(5707, 5707), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:17) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5708, 5707), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:22) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(5709, 513), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4572, 5710), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(4888, 5707), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:23) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(5711, 512), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4573, 5712), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(512, 5662), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5713, 5664), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5714, 5666), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5715, 5668), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5716, 5670), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5717, 5672), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5718, 5674), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5719, 5676), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5720, 5678), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5721, 5680), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5722, 5682), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5723, 5684), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5724, 5686), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5725, 5688), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5726, 5690), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5727, 5692), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5728, 5694), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5729, 5696), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5730, 5698), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5731, 5700), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5732, 5702), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5733, 5704), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5734, 5706), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(512, 298), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5735, 5736), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5662, 299), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5735, 5738), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5664, 300), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5735, 5740), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5666, 301), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5735, 5742), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5668, 302), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5735, 5744), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5670, 303), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5735, 5746), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5672, 304), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5735, 5748), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5674, 305), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5735, 5750), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5676, 306), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5735, 5752), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5678, 307), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5735, 5754), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5680, 308), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5735, 5756), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5682, 309), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5735, 5758), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5684, 310), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5735, 5760), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5686, 311), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5735, 5762), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5688, 312), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5735, 5764), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5690, 313), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5735, 5766), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5692, 314), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5735, 5768), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5694, 315), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5735, 5770), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5696, 316), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5735, 5772), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5698, 317), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5735, 5774), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5700, 318), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5735, 5776), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5702, 319), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5735, 5778), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5704, 320), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5735, 5780), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5706, 321), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5735, 5782), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5737, 285), // loc(callsite(unknown at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :31:13) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(5784, 5784), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:17) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5785, 5784), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:22) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(5786, 517), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4574, 5787), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(4895, 5784), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:23) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(5788, 516), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4575, 5789), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(516, 5739), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5790, 5741), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5791, 5743), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5792, 5745), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5793, 5747), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5794, 5749), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5795, 5751), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5796, 5753), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5797, 5755), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5798, 5757), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5799, 5759), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5800, 5761), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5801, 5763), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5802, 5765), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5803, 5767), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5804, 5769), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5805, 5771), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5806, 5773), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5807, 5775), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5808, 5777), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5809, 5779), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5810, 5781), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5811, 5783), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(516, 298), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5812, 5813), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5739, 299), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5812, 5815), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5741, 300), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5812, 5817), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5743, 301), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5812, 5819), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5745, 302), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5812, 5821), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5747, 303), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5812, 5823), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5749, 304), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5812, 5825), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5751, 305), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5812, 5827), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5753, 306), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5812, 5829), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5755, 307), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5812, 5831), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5757, 308), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5812, 5833), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5759, 309), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5812, 5835), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5761, 310), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5812, 5837), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5763, 311), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5812, 5839), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5765, 312), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5812, 5841), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5767, 313), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5812, 5843), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5769, 314), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5812, 5845), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5771, 315), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5812, 5847), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5773, 316), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5812, 5849), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5775, 317), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5812, 5851), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5777, 318), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5812, 5853), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5779, 319), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5812, 5855), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5781, 320), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5812, 5857), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5783, 321), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5812, 5859), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5814, 286), // loc(callsite(unknown at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :31:13) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(5861, 5861), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:17) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5862, 5861), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:22) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(5863, 525), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4576, 5864), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(4902, 5861), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:23) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(5865, 524), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4577, 5866), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(524, 5816), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5867, 5818), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5868, 5820), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5869, 5822), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5870, 5824), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5871, 5826), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5872, 5828), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5873, 5830), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5874, 5832), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5875, 5834), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5876, 5836), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5877, 5838), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5878, 5840), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5879, 5842), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5880, 5844), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5881, 5846), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5882, 5848), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5883, 5850), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5884, 5852), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5885, 5854), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5886, 5856), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5887, 5858), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5888, 5860), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(524, 298), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5889, 5890), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5816, 299), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5889, 5892), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5818, 300), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5889, 5894), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5820, 301), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5889, 5896), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5822, 302), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5889, 5898), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5824, 303), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5889, 5900), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5826, 304), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5889, 5902), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5828, 305), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5889, 5904), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5830, 306), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5889, 5906), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5832, 307), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5889, 5908), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5834, 308), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5889, 5910), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5836, 309), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5889, 5912), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5838, 310), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5889, 5914), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5840, 311), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5889, 5916), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5842, 312), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5889, 5918), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5844, 313), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5889, 5920), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5846, 314), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5889, 5922), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5848, 315), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5889, 5924), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5850, 316), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5889, 5926), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5852, 317), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5889, 5928), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5854, 318), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5889, 5930), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5856, 319), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5889, 5932), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5858, 320), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5889, 5934), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5860, 321), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5889, 5936), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5891, 287), // loc(callsite(unknown at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :31:13) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(5938, 5938), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:17) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5939, 5938), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:22) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(5940, 531), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4578, 5941), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(4909, 5938), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:23) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(5942, 532), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4579, 5943), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(532, 5893), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5944, 5895), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5945, 5897), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5946, 5899), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5947, 5901), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5948, 5903), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5949, 5905), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5950, 5907), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5951, 5909), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5952, 5911), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5953, 5913), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5954, 5915), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5955, 5917), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5956, 5919), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5957, 5921), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5958, 5923), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5959, 5925), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5960, 5927), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5961, 5929), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5962, 5931), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5963, 5933), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5964, 5935), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5965, 5937), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(532, 298), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5966, 5967), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5893, 299), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5966, 5969), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5895, 300), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5966, 5971), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5897, 301), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5966, 5973), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5899, 302), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5966, 5975), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5901, 303), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5966, 5977), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5903, 304), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5966, 5979), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5905, 305), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5966, 5981), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5907, 306), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5966, 5983), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5909, 307), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5966, 5985), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5911, 308), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5966, 5987), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5913, 309), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5966, 5989), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5915, 310), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5966, 5991), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5917, 311), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5966, 5993), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5919, 312), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5966, 5995), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5921, 313), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5966, 5997), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5923, 314), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5966, 5999), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5925, 315), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5966, 6001), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5927, 316), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5966, 6003), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5929, 317), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5966, 6005), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5931, 318), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5966, 6007), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5933, 319), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5966, 6009), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5935, 320), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5966, 6011), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5937, 321), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5966, 6013), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(5968, 288), // loc(callsite(unknown at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :31:13) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(6015, 6015), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:17) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6016, 6015), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:22) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(6017, 534), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4580, 6018), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(4916, 6015), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:23) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(6019, 533), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4581, 6020), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(533, 5970), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6021, 5972), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6022, 5974), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6023, 5976), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6024, 5978), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6025, 5980), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6026, 5982), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6027, 5984), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6028, 5986), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6029, 5988), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6030, 5990), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6031, 5992), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6032, 5994), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6033, 5996), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6034, 5998), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6035, 6000), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6036, 6002), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6037, 6004), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6038, 6006), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6039, 6008), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6040, 6010), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6041, 6012), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6042, 6014), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(533, 298), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6043, 6044), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5970, 299), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6043, 6046), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5972, 300), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6043, 6048), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5974, 301), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6043, 6050), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5976, 302), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6043, 6052), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5978, 303), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6043, 6054), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5980, 304), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6043, 6056), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5982, 305), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6043, 6058), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5984, 306), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6043, 6060), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5986, 307), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6043, 6062), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5988, 308), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6043, 6064), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5990, 309), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6043, 6066), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5992, 310), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6043, 6068), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5994, 311), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6043, 6070), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5996, 312), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6043, 6072), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(5998, 313), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6043, 6074), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6000, 314), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6043, 6076), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6002, 315), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6043, 6078), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6004, 316), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6043, 6080), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6006, 317), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6043, 6082), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6008, 318), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6043, 6084), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6010, 319), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6043, 6086), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6012, 320), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6043, 6088), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6014, 321), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6043, 6090), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6045, 289), // loc(callsite(unknown at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :31:13) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(6092, 6092), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:17) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6093, 6092), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:22) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(6094, 536), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4582, 6095), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(4923, 6092), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:23) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(6096, 535), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4583, 6097), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(535, 6047), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6098, 6049), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6099, 6051), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6100, 6053), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6101, 6055), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6102, 6057), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6103, 6059), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6104, 6061), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6105, 6063), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6106, 6065), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6107, 6067), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6108, 6069), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6109, 6071), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6110, 6073), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6111, 6075), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6112, 6077), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6113, 6079), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6114, 6081), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6115, 6083), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6116, 6085), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6117, 6087), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6118, 6089), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6119, 6091), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(535, 298), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6120, 6121), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6047, 299), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6120, 6123), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6049, 300), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6120, 6125), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6051, 301), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6120, 6127), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6053, 302), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6120, 6129), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6055, 303), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6120, 6131), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6057, 304), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6120, 6133), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6059, 305), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6120, 6135), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6061, 306), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6120, 6137), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6063, 307), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6120, 6139), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6065, 308), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6120, 6141), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6067, 309), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6120, 6143), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6069, 310), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6120, 6145), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6071, 311), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6120, 6147), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6073, 312), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6120, 6149), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6075, 313), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6120, 6151), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6077, 314), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6120, 6153), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6079, 315), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6120, 6155), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6081, 316), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6120, 6157), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6083, 317), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6120, 6159), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6085, 318), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6120, 6161), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6087, 319), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6120, 6163), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6089, 320), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6120, 6165), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6091, 321), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6120, 6167), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6122, 290), // loc(callsite(unknown at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :31:13) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(6169, 6169), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:17) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6170, 6169), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:22) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(6171, 538), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4584, 6172), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(4930, 6169), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:23) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(6173, 537), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4585, 6174), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(537, 6124), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6175, 6126), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6176, 6128), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6177, 6130), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6178, 6132), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6179, 6134), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6180, 6136), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6181, 6138), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6182, 6140), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6183, 6142), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6184, 6144), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6185, 6146), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6186, 6148), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6187, 6150), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6188, 6152), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6189, 6154), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6190, 6156), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6191, 6158), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6192, 6160), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6193, 6162), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6194, 6164), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6195, 6166), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6196, 6168), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(537, 298), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6197, 6198), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6124, 299), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6197, 6200), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6126, 300), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6197, 6202), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6128, 301), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6197, 6204), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6130, 302), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6197, 6206), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6132, 303), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6197, 6208), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6134, 304), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6197, 6210), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6136, 305), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6197, 6212), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6138, 306), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6197, 6214), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6140, 307), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6197, 6216), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6142, 308), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6197, 6218), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6144, 309), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6197, 6220), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6146, 310), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6197, 6222), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6148, 311), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6197, 6224), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6150, 312), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6197, 6226), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6152, 313), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6197, 6228), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6154, 314), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6197, 6230), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6156, 315), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6197, 6232), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6158, 316), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6197, 6234), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6160, 317), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6197, 6236), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6162, 318), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6197, 6238), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6164, 319), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6197, 6240), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6166, 320), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6197, 6242), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6168, 321), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6197, 6244), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6199, 291), // loc(callsite(unknown at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :31:13) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(6246, 6246), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:17) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6247, 6246), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:22) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(6248, 546), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4586, 6249), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(4937, 6246), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:23) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(6250, 545), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4587, 6251), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(545, 6201), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6252, 6203), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6253, 6205), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6254, 6207), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6255, 6209), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6256, 6211), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6257, 6213), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6258, 6215), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6259, 6217), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6260, 6219), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6261, 6221), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6262, 6223), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6263, 6225), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6264, 6227), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6265, 6229), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6266, 6231), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6267, 6233), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6268, 6235), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6269, 6237), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6270, 6239), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6271, 6241), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6272, 6243), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6273, 6245), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(545, 298), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6274, 6275), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6201, 299), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6274, 6277), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6203, 300), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6274, 6279), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6205, 301), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6274, 6281), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6207, 302), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6274, 6283), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6209, 303), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6274, 6285), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6211, 304), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6274, 6287), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6213, 305), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6274, 6289), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6215, 306), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6274, 6291), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6217, 307), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6274, 6293), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6219, 308), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6274, 6295), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6221, 309), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6274, 6297), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6223, 310), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6274, 6299), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6225, 311), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6274, 6301), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6227, 312), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6274, 6303), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6229, 313), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6274, 6305), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6231, 314), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6274, 6307), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6233, 315), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6274, 6309), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6235, 316), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6274, 6311), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6237, 317), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6274, 6313), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6239, 318), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6274, 6315), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6241, 319), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6274, 6317), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6243, 320), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6274, 6319), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6245, 321), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6274, 6321), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6276, 292), // loc(callsite(unknown at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :31:13) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(6323, 6323), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:17) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6324, 6323), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:22) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(6325, 697), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4588, 6326), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(4944, 6323), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:23) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(6327, 698), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4589, 6328), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(698, 6278), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6329, 6280), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6330, 6282), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6331, 6284), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6332, 6286), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6333, 6288), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6334, 6290), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6335, 6292), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6336, 6294), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6337, 6296), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6338, 6298), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6339, 6300), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6340, 6302), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6341, 6304), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6342, 6306), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6343, 6308), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6344, 6310), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6345, 6312), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6346, 6314), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6347, 6316), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6348, 6318), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6349, 6320), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6350, 6322), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(698, 298), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6351, 6352), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6278, 299), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6351, 6354), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6280, 300), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6351, 6356), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6282, 301), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6351, 6358), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6284, 302), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6351, 6360), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6286, 303), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6351, 6362), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6288, 304), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6351, 6364), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6290, 305), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6351, 6366), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6292, 306), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6351, 6368), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6294, 307), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6351, 6370), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6296, 308), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6351, 6372), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6298, 309), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6351, 6374), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6300, 310), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6351, 6376), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6302, 311), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6351, 6378), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6304, 312), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6351, 6380), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6306, 313), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6351, 6382), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6308, 314), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6351, 6384), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6310, 315), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6351, 6386), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6312, 316), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6351, 6388), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6314, 317), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6351, 6390), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6316, 318), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6351, 6392), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6318, 319), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6351, 6394), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6320, 320), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6351, 6396), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6322, 321), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6351, 6398), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6353, 293), // loc(callsite(unknown at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :31:13) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(6400, 6400), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:17) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6401, 6400), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:22) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(6402, 700), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4590, 6403), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(4951, 6400), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:23) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(6404, 699), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4591, 6405), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(699, 6355), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6406, 6357), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6407, 6359), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6408, 6361), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6409, 6363), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6410, 6365), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6411, 6367), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6412, 6369), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6413, 6371), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6414, 6373), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6415, 6375), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6416, 6377), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6417, 6379), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6418, 6381), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6419, 6383), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6420, 6385), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6421, 6387), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6422, 6389), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6423, 6391), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6424, 6393), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6425, 6395), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6426, 6397), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6427, 6399), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(699, 298), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6428, 6429), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6355, 299), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6428, 6431), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6357, 300), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6428, 6433), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6359, 301), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6428, 6435), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6361, 302), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6428, 6437), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6363, 303), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6428, 6439), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6365, 304), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6428, 6441), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6367, 305), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6428, 6443), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6369, 306), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6428, 6445), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6371, 307), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6428, 6447), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6373, 308), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6428, 6449), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6375, 309), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6428, 6451), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6377, 310), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6428, 6453), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6379, 311), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6428, 6455), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6381, 312), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6428, 6457), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6383, 313), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6428, 6459), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6385, 314), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6428, 6461), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6387, 315), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6428, 6463), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6389, 316), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6428, 6465), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6391, 317), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6428, 6467), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6393, 318), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6428, 6469), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6395, 319), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6428, 6471), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6397, 320), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6428, 6473), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6399, 321), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6428, 6475), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6430, 294), // loc(callsite(unknown at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :31:13) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(6477, 6477), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:17) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6478, 6477), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:22) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(6479, 702), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4592, 6480), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(4958, 6477), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:23) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(6481, 701), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4593, 6482), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(701, 6432), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6483, 6434), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6484, 6436), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6485, 6438), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6486, 6440), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6487, 6442), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6488, 6444), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6489, 6446), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6490, 6448), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6491, 6450), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6492, 6452), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6493, 6454), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6494, 6456), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6495, 6458), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6496, 6460), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6497, 6462), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6498, 6464), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6499, 6466), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6500, 6468), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6501, 6470), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6502, 6472), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6503, 6474), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6504, 6476), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(701, 298), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6505, 6506), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6432, 299), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6505, 6508), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6434, 300), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6505, 6510), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6436, 301), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6505, 6512), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6438, 302), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6505, 6514), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6440, 303), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6505, 6516), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6442, 304), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6505, 6518), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6444, 305), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6505, 6520), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6446, 306), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6505, 6522), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6448, 307), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6505, 6524), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6450, 308), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6505, 6526), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6452, 309), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6505, 6528), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6454, 310), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6505, 6530), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6456, 311), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6505, 6532), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6458, 312), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6505, 6534), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6460, 313), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6505, 6536), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6462, 314), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6505, 6538), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6464, 315), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6505, 6540), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6466, 316), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6505, 6542), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6468, 317), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6505, 6544), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6470, 318), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6505, 6546), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6472, 319), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6505, 6548), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6474, 320), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6505, 6550), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6476, 321), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6505, 6552), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6507, 295), // loc(callsite(unknown at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :31:13) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(6554, 6554), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:17) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6555, 6554), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:22) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(6556, 704), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4594, 6557), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(4965, 6554), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:23) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(6558, 703), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4595, 6559), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(703, 6509), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6560, 6511), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6561, 6513), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6562, 6515), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6563, 6517), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6564, 6519), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6565, 6521), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6566, 6523), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6567, 6525), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6568, 6527), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6569, 6529), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6570, 6531), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6571, 6533), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6572, 6535), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6573, 6537), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6574, 6539), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6575, 6541), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6576, 6543), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6577, 6545), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6578, 6547), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6579, 6549), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6580, 6551), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6581, 6553), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(703, 298), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6582, 6583), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6509, 299), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6582, 6585), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6511, 300), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6582, 6587), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6513, 301), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6582, 6589), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6515, 302), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6582, 6591), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6517, 303), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6582, 6593), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6519, 304), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6582, 6595), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6521, 305), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6582, 6597), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6523, 306), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6582, 6599), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6525, 307), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6582, 6601), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6527, 308), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6582, 6603), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6529, 309), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6582, 6605), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6531, 310), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6582, 6607), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6533, 311), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6582, 6609), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6535, 312), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6582, 6611), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6537, 313), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6582, 6613), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6539, 314), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6582, 6615), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6541, 315), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6582, 6617), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6543, 316), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6582, 6619), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6545, 317), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6582, 6621), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6547, 318), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6582, 6623), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6549, 319), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6582, 6625), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6551, 320), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6582, 6627), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6553, 321), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6582, 6629), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6584, 296), // loc(callsite(unknown at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :31:13) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(6631, 6631), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:17) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6632, 6631), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:22) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(6633, 712), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4596, 6634), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(4972, 6631), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:23) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(6635, 711), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4597, 6636), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(711, 6586), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6637, 6588), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6638, 6590), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6639, 6592), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6640, 6594), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6641, 6596), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6642, 6598), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6643, 6600), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6644, 6602), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6645, 6604), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6646, 6606), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6647, 6608), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6648, 6610), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6649, 6612), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6650, 6614), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6651, 6616), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6652, 6618), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6653, 6620), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6654, 6622), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6655, 6624), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6656, 6626), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6657, 6628), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6658, 6630), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(711, 298), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6659, 6660), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6586, 299), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6659, 6662), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6588, 300), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6659, 6664), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6590, 301), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6659, 6666), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6592, 302), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6659, 6668), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6594, 303), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6659, 6670), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6596, 304), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6659, 6672), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6598, 305), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6659, 6674), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6600, 306), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6659, 6676), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6602, 307), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6659, 6678), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6604, 308), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6659, 6680), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6606, 309), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6659, 6682), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6608, 310), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6659, 6684), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6610, 311), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6659, 6686), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6612, 312), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6659, 6688), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6614, 313), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6659, 6690), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6616, 314), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6659, 6692), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6618, 315), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6659, 6694), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6620, 316), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6659, 6696), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6622, 317), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6659, 6698), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6624, 318), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6659, 6700), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6626, 319), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6659, 6702), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6628, 320), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6659, 6704), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6630, 321), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6659, 6706), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6661, 297), // loc(callsite(unknown at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :31:13) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(6708, 6708), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:17) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6709, 6708), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:22) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(6710, 719), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4598, 6711), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :25:16) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(4979, 6708), // loc(callsite(unknown at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:23) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Sub(6712, 695), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4599, 6713), // loc(callsite( Reg ( :5:7) at callsite( SBox ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :26:14) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :32:16) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(695, 6663), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6714, 6665), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6715, 6667), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6716, 6669), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6717, 6671), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6718, 6673), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6719, 6675), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6720, 6677), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6721, 6679), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6722, 6681), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6723, 6683), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6724, 6685), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6725, 6687), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6726, 6689), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6727, 6691), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6728, 6693), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6729, 6695), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6730, 6697), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6731, 6699), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6732, 6701), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6733, 6703), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6734, 6705), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6735, 6707), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :13:11) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(695, 298), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6736, 6737), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6663, 299), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6736, 6739), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6665, 300), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6736, 6741), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6667, 301), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6736, 6743), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6669, 302), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6736, 6745), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6671, 303), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6736, 6747), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6673, 304), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6736, 6749), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6675, 305), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6736, 6751), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6677, 306), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6736, 6753), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6679, 307), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6736, 6755), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6681, 308), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6736, 6757), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6683, 309), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6736, 6759), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6685, 310), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6736, 6761), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6687, 311), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6736, 6763), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6689, 312), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6736, 6765), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6691, 313), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6736, 6767), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6693, 314), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6736, 6769), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6695, 315), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6736, 6771), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6697, 316), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6736, 6773), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6699, 317), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6736, 6775), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6701, 318), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6736, 6777), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6703, 319), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6736, 6779), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6705, 320), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6736, 6781), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6707, 321), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:44) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Add(6736, 6783), // loc(callsite(unknown at callsite( MultiplyByMInt ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :14:20) at callsite( DoIntRound ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :34:18) at callsite( DoIntRounds ( zirgen/circuit/rv32im/v2/dsl/poseidon2.zir :38:4) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :257:28) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::AndEqz(4600, 3622), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :34:26) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4601, 3623), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :35:27) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4602, 3624), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :36:28) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4603, 3625), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :37:24) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4604, 3626), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :38:26) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4605, 3627), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :39:28) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4606, 4067), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :41:27) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(4, 1084), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :42:26) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4607, 6785), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :42:26) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4608, 3629), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :43:27) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4609, 3630), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :44:23) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4610, 3631), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :45:22) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(6738, 1303), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4611, 6786), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(6740, 1305), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4612, 6787), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(6742, 1312), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4613, 6788), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(6744, 1313), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4614, 6789), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(6746, 1315), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4615, 6790), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(6748, 1321), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4616, 6791), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(6750, 1322), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4617, 6792), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(6752, 1324), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4618, 6793), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(6754, 1331), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4619, 6794), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(6756, 1332), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4620, 6795), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(6758, 1334), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4621, 6796), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(6760, 1340), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4622, 6797), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(6762, 1341), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4623, 6798), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(6764, 1354), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4624, 6799), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(6766, 1357), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4625, 6800), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(6768, 1356), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4626, 6801), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(6770, 1358), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4627, 6802), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(6772, 1716), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4628, 6803), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(6774, 1717), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4629, 6804), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(6776, 1359), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4630, 6805), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(6778, 1360), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4631, 6806), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(6780, 1361), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4632, 6807), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(6782, 1366), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4633, 6808), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Sub(6784, 1367), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4634, 6809), // loc(callsite( Reg ( :5:7) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :47:39) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::AndEqz(4635, 5164), // loc(callsite(unknown at callsite( ExtReg ( :11:11) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :48:27) at callsite( PoseidonIntRounds ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :258:17) at callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :469:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::AndCond(4558, 359, 4636), // loc(callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :467:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndCond(4637, 362, 3735), // loc(callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :467:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndCond(4638, 365, 3735), // loc(callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :467:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndCond(4639, 368, 3735), // loc(callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :467:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndCond(4640, 371, 3735), // loc(callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :467:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndCond(4641, 374, 3735), // loc(callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :467:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndCond(4642, 377, 3735), // loc(callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :467:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(4643, 7), // loc(callsite( Poseidon1 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :479:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :80:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndCond(4451, 431, 4644), // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Get(145), // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6810, 401), // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Mul(6810, 404), // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Mul(6810, 407), // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Mul(1215, 410), // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Mul(1225, 413), // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Mul(3862, 416), // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Mul(1120, 419), // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Sub(0, 1232), // loc(callsite(unknown at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :34:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Get(124), // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :36:22) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6819, 1232), // loc(callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :34:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Mul(346, 6818), // loc(callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :34:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Add(6820, 6821), // loc(callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :34:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Mul(6822, 359), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Get(155), // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :61:29) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6824, 362), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Mul(3836, 365), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Sub(0, 1235), // loc(callsite(unknown at callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :135:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Add(1234, 21), // loc(callsite(unknown at callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :142:14) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(6828, 6818), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :144:6) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Mul(6829, 1235), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :135:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Mul(6829, 6827), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :135:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Add(6830, 6831), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :135:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Mul(6832, 374), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(6823, 6825), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(6834, 6826), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(6835, 6833), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Mul(6836, 422), // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Get(236), // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :44:25) at callsite( ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :173:25) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :78:12) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))))) -PolyExtStep::Mul(6838, 425), // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Mul(346, 428), // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Mul(346, 431), // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Add(6811, 6812), // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Add(6842, 6813), // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Add(6843, 6814), // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Add(6844, 6815), // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Add(6845, 6816), // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Add(6846, 6817), // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Add(6847, 6837), // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Add(6848, 6839), // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Add(6849, 6840), // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Add(6850, 6841), // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Get(151), // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( FinalizeMisc ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :23:27) at callsite( Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :40:16) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :70:11) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6852, 401), // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Mul(6852, 404), // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Mul(6852, 407), // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Mul(1218, 410), // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Mul(1228, 413), // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Mul(1114, 416), // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Mul(1123, 419), // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Mul(1901, 1232), // loc(callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :34:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Mul(348, 6818), // loc(callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :34:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Add(6860, 6861), // loc(callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :34:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Mul(6862, 359), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Get(157), // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :29:32) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlUserECALL ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :61:29) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :179:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6864, 362), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Get(239), // loc(callsite(unknown at callsite( ArgU16 ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :29:27) at callsite( NondetU16Reg ( zirgen/circuit/rv32im/v2/dsl/lookups.zir :35:17) at callsite( NormalizeU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :50:26) at callsite( ControlMRET ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :76:26) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :180:17) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6866, 365), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(6863, 6865), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(6868, 6867), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Mul(6869, 422), // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Mul(6866, 425), // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Mul(348, 428), // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Mul(348, 431), // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Add(6853, 6854), // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Add(6874, 6855), // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Add(6875, 6856), // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Add(6876, 6857), // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Add(6877, 6858), // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Add(6878, 6859), // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Add(6879, 6870), // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Add(6880, 6871), // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Add(6881, 6872), // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Add(6882, 6873), // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Mul(401, 11), // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Mul(404, 11), // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Mul(407, 11), // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Mul(410, 11), // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Mul(413, 11), // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Mul(416, 11), // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Mul(419, 11), // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Mul(356, 21), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Mul(6818, 11), // loc(callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :34:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Add(1232, 6892), // loc(callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :34:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Mul(6893, 359), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Mul(362, 11), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Sub(0, 1233), // loc(callsite(unknown at callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :84:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))))) -PolyExtStep::Mul(1233, 21), // loc(callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :84:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Mul(6896, 4), // loc(callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :84:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Add(6897, 6898), // loc(callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :84:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Mul(6899, 368), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Mul(371, 2), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Mul(1232, 1), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :144:6) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Mul(6818, 2), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :144:6) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Add(6902, 6903), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :144:6) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Mul(6904, 1235), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :135:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Mul(1232, 2), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :158:6) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Add(6906, 6903), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :158:6) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Mul(6907, 6827), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :135:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Add(6905, 6908), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :135:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Mul(6909, 374), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(6891, 6894), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(6911, 6895), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(6912, 3207), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(6913, 6900), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(6914, 6901), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(6915, 6910), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(6916, 393), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Mul(6917, 422), // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Mul(3374, 425), // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Mul(6819, 428), // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Mul(6819, 431), // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Add(6884, 6885), // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Add(6922, 6886), // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Add(6923, 6887), // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Add(6924, 6888), // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Add(6925, 6889), // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Add(6926, 6890), // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Add(6927, 6918), // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Add(6928, 6919), // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Add(6929, 6920), // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Add(6930, 6921), // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Mul(353, 401), // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Mul(353, 404), // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Mul(353, 407), // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Mul(353, 410), // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Mul(353, 413), // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Mul(353, 416), // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Mul(353, 419), // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Get(139), // loc(callsite(unknown at callsite( MemoryArg ( zirgen/circuit/rv32im/v2/dsl/mem.zir :28:31) at callsite( MemoryIO ( zirgen/circuit/rv32im/v2/dsl/mem.zir :68:30) at callsite( MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :89:18) at callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :37:24) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))))) -PolyExtStep::Mul(6939, 1232), // loc(callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :34:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Mul(353, 6818), // loc(callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :34:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Add(6940, 6941), // loc(callsite( ControlResume ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :34:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :178:19) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Mul(6942, 359), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Mul(1233, 5), // loc(callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :84:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Mul(353, 6896), // loc(callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :84:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Add(6944, 6945), // loc(callsite( ControlSuspend ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :84:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :181:20) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Mul(6946, 368), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Mul(6818, 1235), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :135:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Mul(1232, 6827), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :135:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Add(6948, 6949), // loc(callsite( ControlTable ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :135:4) at callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :183:18) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Mul(6950, 374), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(6943, 362), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(6952, 6947), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Add(6953, 6951), // loc(callsite( Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :176:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :77:14) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Mul(6954, 422), // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Get(131), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( PoseidonState ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :45:22) at callsite( Poseidon0 ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :448:37) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :79:15) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))))) -PolyExtStep::Mul(6956, 428), // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Mul(6956, 431), // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Add(6932, 6933), // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Add(6959, 6934), // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Add(6960, 6935), // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Add(6961, 6936), // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Add(6962, 6937), // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Add(6963, 6938), // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Add(6964, 6955), // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Add(6965, 425), // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Add(6966, 6957), // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Add(6967, 6958), // loc(callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :69:32) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))) -PolyExtStep::Get(93), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :85:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Sub(6851, 6969), // loc(callsite( Reg ( :5:7) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :85:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(4645, 6970), // loc(callsite( Reg ( :5:7) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :85:22) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Get(95), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :86:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Sub(6883, 6971), // loc(callsite( Reg ( :5:7) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :86:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(4646, 6972), // loc(callsite( Reg ( :5:7) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :86:23) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Get(97), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :87:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Sub(6931, 6973), // loc(callsite( Reg ( :5:7) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :87:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(4647, 6974), // loc(callsite( Reg ( :5:7) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :87:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::Get(99), // loc(callsite(unknown at callsite( Reg ( :4:21) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :88:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown))))) -PolyExtStep::Sub(6968, 6975), // loc(callsite( Reg ( :5:7) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :88:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::AndEqz(4648, 6976), // loc(callsite( Reg ( :5:7) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :88:28) at callsite( Top ( zirgen/circuit/rv32im/v2/dsl/top.zir :27:2) at unknown)))) -PolyExtStep::GetGlobal(1, 7), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::GetGlobal(1, 6), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6977, 341), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(6978, 6979), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::GetGlobal(1, 5), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6980, 341), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(6981, 6982), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::GetGlobal(1, 4), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6983, 341), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(6984, 6985), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::GetGlobal(1, 11), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::GetGlobal(1, 10), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6987, 341), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(6988, 6989), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::GetGlobal(1, 9), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6990, 341), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(6991, 6992), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::GetGlobal(1, 8), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6993, 341), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(6994, 6995), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::GetGlobal(1, 15), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::GetGlobal(1, 14), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6997, 341), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(6998, 6999), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::GetGlobal(1, 13), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7000, 341), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7001, 7002), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::GetGlobal(1, 12), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7003, 341), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7004, 7005), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::GetGlobal(1, 19), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::GetGlobal(1, 18), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7007, 341), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7008, 7009), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::GetGlobal(1, 17), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7010, 341), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7011, 7012), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::GetGlobal(1, 16), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7013, 341), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7014, 7015), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::GetGlobal(1, 23), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::GetGlobal(1, 22), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7017, 341), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7018, 7019), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::GetGlobal(1, 21), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7020, 341), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7021, 7022), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::GetGlobal(1, 20), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7023, 341), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7024, 7025), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::GetGlobal(1, 27), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::GetGlobal(1, 26), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7027, 341), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7028, 7029), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::GetGlobal(1, 25), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7030, 341), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7031, 7032), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::GetGlobal(1, 24), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7033, 341), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7034, 7035), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::GetGlobal(1, 31), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :84:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::GetGlobal(1, 30), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :84:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7037, 341), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :84:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7038, 7039), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :84:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::GetGlobal(1, 29), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :84:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7040, 341), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :84:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7041, 7042), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :84:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::GetGlobal(1, 28), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :84:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7043, 341), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :84:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7044, 7045), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :84:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Get(79), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :93:55 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Get(77), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :93:55 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7047, 341), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :93:55 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7048, 7049), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :93:55 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Get(75), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :93:55 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7050, 341), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :93:55 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7051, 7052), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :93:55 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Get(73), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :93:55 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7053, 341), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :93:55 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7054, 7055), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :93:55 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6986, 1303), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7057, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6986, 1313), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7059, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7058, 7060), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7058, 1312), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(1302, 7060), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6986, 1322), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7064, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7061, 7065), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7061, 1321), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7063, 7065), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7062, 7065), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Get(3), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Get(2), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7070, 341), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7071, 7072), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Get(1), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7073, 341), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7074, 7075), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Get(0), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7076, 341), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7077, 7078), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7079, 7056), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :177:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7080, 7066), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7081, 7068), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7082, 7069), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7083, 7067), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(0, 7084), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6986, 1332), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7085, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6996, 1357), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7006, 1358), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7087, 7088), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7016, 1716), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7089, 7090), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7026, 1717), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7091, 7092), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7093, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7086, 7094), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7086, 1356), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(1331, 7094), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7006, 343), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7087, 7098), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7016, 1360), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7099, 7100), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7026, 1361), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7101, 7102), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7103, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7095, 7104), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7095, 1359), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7097, 7104), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7096, 7104), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Get(7), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Get(6), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7109, 341), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7110, 7111), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Get(5), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7112, 341), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7113, 7114), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Get(4), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7115, 341), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7116, 7117), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7118, 7079), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :177:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7119, 7105), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7120, 7107), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7121, 7108), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7122, 7106), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(4650, 7123), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7036, 1367), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7124, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7036, 343), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7126, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7125, 7127), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7125, 1596), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(1366, 7127), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6986, 513), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7131, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7128, 7132), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7128, 512), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7130, 7132), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7129, 7132), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Get(11), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Get(10), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7137, 341), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7138, 7139), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Get(9), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7140, 341), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7141, 7142), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Get(8), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7143, 341), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7144, 7145), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7146, 7118), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :177:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7147, 7133), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7148, 7135), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7149, 7136), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7150, 7134), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(4651, 7151), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6986, 525), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7152, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6996, 532), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7006, 533), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7154, 7155), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7016, 534), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7156, 7157), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7026, 535), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7158, 7159), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7160, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7153, 7161), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7153, 531), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(524, 7161), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7154, 7098), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7016, 537), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7165, 7166), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7026, 538), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7167, 7168), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7169, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7162, 7170), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7162, 536), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7164, 7170), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7163, 7170), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Get(15), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Get(14), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7175, 341), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7176, 7177), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Get(13), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7178, 341), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7179, 7180), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Get(12), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7181, 341), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7182, 7183), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7184, 7146), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :177:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7185, 7171), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7186, 7173), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7187, 7174), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7188, 7172), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(4652, 7189), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7036, 546), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7190, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6996, 698), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7006, 699), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7192, 7193), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7016, 700), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7194, 7195), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7026, 701), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7196, 7197), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7198, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7191, 7199), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7191, 697), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(545, 7199), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7192, 7098), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7016, 703), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7203, 7204), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7026, 704), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7205, 7206), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7207, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7200, 7208), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7200, 702), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7202, 7208), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7201, 7208), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Get(19), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Get(18), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7213, 341), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7214, 7215), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Get(17), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7216, 341), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7217, 7218), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Get(16), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7219, 341), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7220, 7221), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7222, 7184), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :177:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7223, 7209), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7224, 7211), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7225, 7212), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7226, 7210), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(4653, 7227), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7036, 712), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7228, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6996, 719), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7006, 720), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7230, 7231), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7016, 721), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7232, 7233), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7026, 722), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7234, 7235), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7236, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7229, 7237), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7229, 718), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(711, 7237), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7230, 7098), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7016, 724), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7241, 7242), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7026, 725), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7243, 7244), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7245, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7238, 7246), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7238, 723), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7240, 7246), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7239, 7246), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Get(23), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Get(22), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7251, 341), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7252, 7253), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Get(21), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7254, 341), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7255, 7256), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Get(20), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7257, 341), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7258, 7259), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7260, 7222), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :177:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7261, 7247), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7262, 7249), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7263, 7250), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7264, 7248), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(4654, 7265), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7036, 733), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7266, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6986, 1067), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7268, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7267, 7269), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7267, 737), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(732, 7269), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6986, 1073), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7273, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7270, 7274), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7270, 738), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7272, 7274), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7271, 7274), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Get(27), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Get(26), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7279, 341), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7280, 7281), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Get(25), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7282, 341), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7283, 7284), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Get(24), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7285, 341), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7286, 7287), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7288, 7260), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :177:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7289, 7275), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7290, 7277), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7291, 7278), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7292, 7276), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(4655, 7293), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6986, 1078), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7294, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6986, 1084), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7296, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7295, 7297), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7295, 740), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(739, 7297), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6986, 1090), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7301, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7298, 7302), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7298, 741), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7300, 7302), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7299, 7302), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Get(31), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Get(30), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7307, 341), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7308, 7309), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Get(29), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7310, 341), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7311, 7312), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Get(28), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7313, 341), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7314, 7315), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7316, 7288), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :177:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7317, 7303), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7318, 7305), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7319, 7306), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7320, 7304), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(4656, 7321), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Get(78), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :123:43 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Get(76), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :123:43 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7322, 341), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :123:43 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7323, 7324), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :123:43 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Get(74), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :123:43 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7325, 341), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :123:43 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7326, 7327), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :123:43 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Get(72), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :123:43 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7328, 341), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :123:43 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7329, 7330), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :123:43 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7331, 7316), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :124:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(4657, 7332), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :125:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndCond(4649, 401, 4658), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :590:9 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndCond(4659, 404, 4658), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :590:9 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndCond(4660, 407, 4658), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :590:9 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::GetGlobal(1, 3), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::GetGlobal(1, 2), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7333, 341), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7334, 7335), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::GetGlobal(1, 1), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7336, 341), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7337, 7338), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::GetGlobal(1, 0), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7339, 341), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7340, 7341), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :47:44 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6986, 524), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7343, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7127, 7344), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7127, 517), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(513, 7344), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6986, 533), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7348, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7345, 7349), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7345, 531), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7347, 7349), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7346, 7349), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7080, 7350), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7354, 7352), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7355, 7353), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7356, 7351), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(0, 7357), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6996, 534), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7006, 536), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7358, 7359), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7360, 7166), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7361, 7168), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7362, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7358, 7098), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7016, 546), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7364, 7365), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7026, 698), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7366, 7367), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7368, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7363, 7369), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7363, 545), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(535, 7369), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7036, 699), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7373, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7370, 7374), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7370, 697), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7372, 7374), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7371, 7374), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7119, 7375), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7379, 7377), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7380, 7378), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7381, 7376), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(4662, 7382), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6996, 700), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7006, 702), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7383, 7384), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7385, 7204), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7386, 7206), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7387, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7383, 7098), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7016, 712), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7389, 7390), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7026, 695), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7391, 7392), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7393, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7388, 7394), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7388, 711), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(701, 7394), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7036, 718), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7398, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7395, 7399), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7395, 719), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7397, 7399), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7396, 7399), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7147, 7400), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7404, 7402), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7405, 7403), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7406, 7401), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(4663, 7407), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6996, 721), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7006, 723), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7408, 7409), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7410, 7242), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7411, 7244), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7412, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7408, 7098), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7016, 733), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7414, 7415), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7026, 716), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7416, 7417), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7418, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7413, 7419), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7413, 732), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(722, 7419), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7036, 747), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7423, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7420, 7424), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7420, 744), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7422, 7424), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7421, 7424), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7185, 7425), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7429, 7427), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7430, 7428), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7431, 7426), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(4664, 7432), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7269, 7274), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7269, 738), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(737, 7274), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7433, 7295), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7433, 739), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7435, 7295), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7434, 7295), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7223, 7436), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7440, 7438), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7441, 7439), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7442, 7437), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(4665, 7443), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7297, 7302), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7297, 741), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(740, 7302), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7444, 7058), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7444, 1302), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7446, 7058), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7445, 7058), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7261, 7447), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7451, 7449), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7452, 7450), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7453, 7448), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(4666, 7454), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7342, 1312), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7455, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7342, 1315), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7457, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7456, 7458), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7456, 1313), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(1305, 7458), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7342, 1322), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7462, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7459, 7463), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7459, 1321), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7461, 7463), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7460, 7463), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7289, 7464), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7468, 7466), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7469, 7467), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7470, 7465), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(4667, 7471), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7342, 1331), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7472, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7342, 1334), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7474, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7473, 7475), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7473, 1332), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(1324, 7475), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7342, 1341), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7479, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7476, 7480), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7476, 1340), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7478, 7480), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7477, 7480), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7317, 7481), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7485, 7483), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7486, 7484), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7487, 7482), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(4668, 7488), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7342, 1357), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7489, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7342, 1358), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7491, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7490, 7492), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7490, 1356), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(1354, 7492), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7342, 1717), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7496, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7493, 7497), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7493, 1716), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7495, 7497), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7494, 7497), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Get(35), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Get(34), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7502, 341), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7503, 7504), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Get(33), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7505, 341), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7506, 7507), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Get(32), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7508, 341), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7509, 7510), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7511, 7316), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :177:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7512, 7498), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7513, 7500), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7514, 7501), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7515, 7499), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(4669, 7516), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7342, 1360), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7517, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7342, 1366), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7519, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7518, 7520), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7518, 1361), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(1359, 7520), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7342, 549), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7524, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7521, 7525), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7521, 1367), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7523, 7525), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7522, 7525), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Get(39), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Get(38), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7530, 341), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7531, 7532), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Get(37), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7533, 341), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7534, 7535), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Get(36), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7536, 341), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7537, 7538), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7539, 7511), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :177:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7540, 7526), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7541, 7528), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7542, 7529), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7543, 7527), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(4670, 7544), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7342, 559), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7545, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6996, 850), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7006, 856), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7547, 7548), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7016, 859), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7549, 7550), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7026, 862), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7551, 7552), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7553, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7546, 7554), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7546, 853), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(552, 7554), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7547, 7098), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7016, 868), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7558, 7559), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7026, 902), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7560, 7561), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7562, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7555, 7563), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7555, 865), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7557, 7563), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7556, 7563), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Get(43), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Get(42), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7568, 341), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7569, 7570), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Get(41), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7571, 341), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7572, 7573), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Get(40), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7574, 341), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7575, 7576), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7577, 7539), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :177:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7578, 7564), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7579, 7566), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7580, 7567), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7581, 7565), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(4671, 7582), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7036, 908), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7583, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6986, 914), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7585, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7584, 7586), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7584, 911), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(905, 7586), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6986, 923), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7590, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7587, 7591), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7587, 920), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7589, 7591), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7588, 7591), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Get(47), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Get(46), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7596, 341), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7597, 7598), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Get(45), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7599, 341), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7600, 7601), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Get(44), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7602, 341), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7603, 7604), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7605, 7577), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :177:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7606, 7592), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7607, 7594), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7608, 7595), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7609, 7593), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(4672, 7610), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7331, 7605), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :124:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(4673, 7611), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :125:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndCond(4661, 410, 4674), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :590:9 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6986, 535), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7612, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7127, 7613), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7127, 534), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(531, 7613), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6986, 545), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7617, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7614, 7618), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7614, 538), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7616, 7618), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7615, 7618), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7080, 7619), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7623, 7621), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7624, 7622), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7625, 7620), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(0, 7626), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6996, 546), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7006, 697), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7627, 7628), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7016, 699), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7629, 7630), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7026, 700), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7631, 7632), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7633, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7627, 7098), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7016, 702), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7635, 7636), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7026, 703), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7637, 7638), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7639, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7634, 7640), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7634, 701), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(698, 7640), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7036, 711), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7644, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7641, 7645), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7641, 704), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7643, 7645), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7642, 7645), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7119, 7646), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7650, 7648), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7651, 7649), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7652, 7647), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(4676, 7653), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6996, 712), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7006, 719), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7654, 7655), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7016, 718), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7656, 7657), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7026, 720), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7658, 7659), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7660, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7654, 7098), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7016, 722), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7662, 7663), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7026, 723), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7664, 7665), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7666, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7661, 7667), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7661, 721), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(695, 7667), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7036, 725), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7671, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7668, 7672), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7668, 724), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7670, 7672), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7669, 7672), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7147, 7673), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7677, 7675), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7678, 7676), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7679, 7674), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(4677, 7680), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6996, 733), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7006, 744), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7681, 7682), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7016, 747), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7683, 7684), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7026, 750), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7685, 7686), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7687, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7681, 7098), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7016, 756), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7689, 7690), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7026, 759), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7691, 7692), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7693, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7688, 7694), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7688, 753), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(716, 7694), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7036, 765), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7698, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7695, 7699), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7695, 762), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7697, 7699), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7696, 7699), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7185, 7700), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7704, 7702), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7705, 7703), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7706, 7701), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(4678, 7707), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(4679, 7443), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(4680, 7454), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6986, 1312), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7708, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6986, 1315), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7710, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7709, 7711), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7709, 1313), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(1305, 7711), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7712, 7065), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7712, 1321), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7714, 7065), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7713, 7065), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7289, 7715), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7719, 7717), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7720, 7718), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7721, 7716), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(4681, 7722), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(4682, 7488), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(4683, 7516), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(4684, 7544), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7342, 573), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7723, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7546, 7724), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7546, 566), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(552, 7724), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7342, 587), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7728, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7725, 7729), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7725, 580), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7727, 7729), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7726, 7729), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7578, 7730), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7734, 7732), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7735, 7733), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7736, 7731), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(4685, 7737), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7342, 597), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7738, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6996, 911), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7006, 917), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7740, 7741), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7016, 920), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7742, 7743), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7026, 923), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7744, 7745), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7746, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7739, 7747), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7739, 914), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(590, 7747), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7740, 7098), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7016, 929), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7751, 7752), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7026, 932), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7753, 7754), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7755, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7748, 7756), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7748, 926), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7750, 7756), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7749, 7756), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7606, 7757), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7761, 7759), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7762, 7760), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7763, 7758), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(4686, 7764), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7036, 938), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7765, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6986, 944), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7767, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7766, 7768), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7766, 941), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(935, 7768), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6986, 984), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7772, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7769, 7773), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7769, 981), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7771, 7773), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7770, 7773), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Get(51), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Get(50), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7778, 341), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7779, 7780), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Get(49), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7781, 341), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7782, 7783), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Get(48), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7784, 341), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7785, 7786), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7787, 7605), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :177:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7788, 7774), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7789, 7776), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7790, 7777), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7791, 7775), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(4687, 7792), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7331, 7787), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :124:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(4688, 7793), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :125:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndCond(4675, 413, 4689), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :590:9 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6986, 1357), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7794, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7127, 7795), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7127, 1354), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(1340, 7795), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6986, 1717), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7799, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7796, 7800), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7796, 1716), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7798, 7800), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7797, 7800), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7080, 7801), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7805, 7803), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7806, 7804), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7807, 7802), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(0, 7808), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6996, 1359), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7006, 1361), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7809, 7810), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7016, 1366), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7811, 7812), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7026, 1367), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7813, 7814), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7815, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7809, 7098), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7016, 552), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7817, 7818), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7026, 559), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7819, 7820), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7821, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7816, 7822), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7816, 549), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(1360, 7822), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7036, 573), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7826, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7823, 7827), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7823, 566), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7825, 7827), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7824, 7827), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7119, 7828), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7832, 7830), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7833, 7831), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7834, 7829), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(4691, 7835), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6996, 580), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7006, 590), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7836, 7837), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7016, 597), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7838, 7839), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7026, 604), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7840, 7841), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7842, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7836, 7098), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7016, 610), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7844, 7845), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7026, 617), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7846, 7847), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7848, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7843, 7849), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7843, 607), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(587, 7849), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7036, 631), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7853, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7850, 7854), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7850, 624), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7852, 7854), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7851, 7854), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7147, 7855), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7859, 7857), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7860, 7858), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7861, 7856), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(4692, 7862), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6986, 505), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7863, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6986, 516), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7865, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7864, 7866), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7864, 513), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(1596, 7866), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6986, 531), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7870, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7867, 7871), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7867, 532), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7869, 7871), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7868, 7871), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7185, 7872), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7876, 7874), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7877, 7875), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7878, 7873), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(4693, 7879), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6986, 536), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7880, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6996, 537), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7006, 545), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7882, 7883), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7884, 7365), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7885, 7367), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7886, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7881, 7887), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7881, 538), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(535, 7887), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7882, 7098), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7891, 7630), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7892, 7632), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7893, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7888, 7894), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7888, 697), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7890, 7894), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7889, 7894), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7223, 7895), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7899, 7897), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7900, 7898), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7901, 7896), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(4694, 7902), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7036, 702), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7903, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7342, 1067), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7905, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7904, 7906), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7904, 737), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(701, 7906), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7342, 1073), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7910, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7907, 7911), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7907, 738), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7909, 7911), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7908, 7911), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7261, 7912), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7916, 7914), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7917, 7915), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7918, 7913), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(4695, 7919), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7342, 1078), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7920, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6996, 695), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7006, 718), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7922, 7923), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7016, 720), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7924, 7925), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7026, 721), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7926, 7927), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7928, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7921, 7929), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7921, 719), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(739, 7929), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7922, 7098), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7016, 723), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7933, 7934), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7026, 724), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7935, 7936), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7937, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7930, 7938), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7930, 722), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7932, 7938), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7931, 7938), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7289, 7939), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7943, 7941), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7944, 7942), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7945, 7940), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(4696, 7946), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7036, 732), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7947, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6986, 716), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7949, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7948, 7950), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7948, 733), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(725, 7950), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6986, 750), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7954, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7951, 7955), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7951, 747), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7953, 7955), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7952, 7955), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7317, 7956), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7960, 7958), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7961, 7959), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7962, 7957), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(4697, 7963), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(4698, 7332), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :125:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndCond(4690, 416, 4699), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :590:9 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6986, 1358), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7964, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7127, 7965), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7127, 1356), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(1354, 7965), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6986, 1360), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7969, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7966, 7970), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7966, 1359), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7968, 7970), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7967, 7970), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7080, 7971), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7975, 7973), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7976, 7974), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7977, 7972), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(0, 7978), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6996, 1361), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7006, 1367), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7979, 7980), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7016, 549), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7981, 7982), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7026, 552), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7983, 7984), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7985, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7979, 7098), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7016, 566), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7987, 7988), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7026, 573), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7989, 7990), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7991, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7986, 7992), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7986, 559), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(1366, 7992), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7036, 587), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7996, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7993, 7997), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7993, 580), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7995, 7997), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7994, 7997), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7119, 7998), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8002, 8000), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8003, 8001), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8004, 7999), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(4701, 8005), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6996, 590), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7006, 604), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8006, 8007), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7016, 607), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8008, 8009), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7026, 610), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8010, 8011), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8012, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8006, 7098), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7016, 624), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8014, 8015), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7026, 631), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8016, 8017), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8018, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8013, 8019), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8013, 617), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(597, 8019), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7036, 1596), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8023, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8020, 8024), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8020, 638), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8022, 8024), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8021, 8024), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7147, 8025), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8029, 8027), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8030, 8028), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8031, 8026), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(4702, 8032), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6996, 512), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7006, 516), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8033, 8034), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7016, 517), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8035, 8036), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7026, 524), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8037, 8038), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8039, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8033, 7098), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7016, 532), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8041, 8042), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7026, 531), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8043, 8044), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8045, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8040, 8046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8040, 525), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(513, 8046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7036, 534), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8050, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8047, 8051), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8047, 533), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8049, 8051), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8048, 8051), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7185, 8052), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8056, 8054), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8057, 8055), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8058, 8053), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(4703, 8059), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6986, 537), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8060, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6986, 546), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8062, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8061, 8063), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8061, 545), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(536, 8063), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6986, 701), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8067, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8064, 8068), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8064, 700), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8066, 8068), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8065, 8068), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7223, 8069), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8073, 8071), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8074, 8072), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8075, 8070), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(4704, 8076), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6986, 711), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8077, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8078, 7661), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8078, 695), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(704, 7661), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8079, 7667), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8079, 721), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8081, 7667), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8080, 7667), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7261, 8082), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8086, 8084), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8087, 8085), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8088, 8083), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(4705, 8089), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7672, 7906), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7672, 737), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(724, 7906), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8090, 7911), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8090, 738), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8092, 7911), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8091, 7911), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7289, 8093), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8097, 8095), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8098, 8096), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8099, 8094), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(4706, 8100), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7342, 1084), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8101, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7921, 8102), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7921, 740), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(739, 8102), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6996, 732), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7006, 716), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8106, 8107), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7016, 744), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8108, 8109), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7026, 747), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8110, 8111), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8112, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8103, 8113), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8103, 733), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8105, 8113), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8104, 8113), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7317, 8114), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8118, 8116), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8119, 8117), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8120, 8115), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(4707, 8121), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8106, 7098), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7016, 753), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8122, 8123), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7026, 756), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8124, 8125), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8126, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7036, 762), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8128, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8127, 8129), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8127, 759), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(750, 8129), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6986, 768), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8133, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8130, 8134), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8130, 765), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8132, 8134), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8131, 8134), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7512, 8135), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8139, 8137), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8140, 8138), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8141, 8136), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(4708, 8142), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6986, 777), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8143, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7540, 8144), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8145, 774), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(4709, 8146), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7331, 7539), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :124:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(4710, 8147), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :125:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndCond(4700, 419, 4711), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :590:9 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6996, 1067), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7006, 738), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8148, 8149), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7016, 1073), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8150, 8151), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7026, 739), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8152, 8153), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8154, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7127, 8155), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7127, 737), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(1017, 8155), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8148, 7098), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7016, 740), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8159, 8160), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7026, 1084), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8161, 8162), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8163, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8156, 8164), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8156, 1078), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8158, 8164), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8157, 8164), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7080, 8165), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8169, 8167), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8170, 8168), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8171, 8166), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(0, 8172), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6996, 1090), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7006, 1302), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8173, 8174), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7016, 1303), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8175, 8176), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7026, 1305), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8177, 8178), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8179, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8173, 7098), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7016, 1313), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8181, 8182), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7026, 1315), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8183, 8184), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8185, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8180, 8186), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8180, 1312), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(741, 8186), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6996, 1322), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7006, 1324), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8190, 8191), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7016, 1331), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8192, 8193), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7026, 1332), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8194, 8195), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8196, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8187, 8197), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8187, 1321), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8189, 8197), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8188, 8197), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7119, 8198), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8202, 8200), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8203, 8201), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8204, 8199), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(4713, 8205), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8190, 7098), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7016, 1340), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8206, 8207), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7026, 1341), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8208, 8209), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8210, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7006, 1356), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7087, 8212), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7016, 1358), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8213, 8214), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7026, 1716), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8215, 8216), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8217, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8211, 8218), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8211, 1354), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(1334, 8218), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7016, 1359), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7099, 8222), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7026, 1360), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8223, 8224), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8225, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8219, 8226), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8219, 1717), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8221, 8226), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8220, 8226), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7147, 8227), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8231, 8229), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8232, 8230), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8233, 8228), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(4714, 8234), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6996, 1366), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8235, 7980), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8236, 7982), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8237, 7984), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8238, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8235, 7098), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8240, 7988), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8241, 7990), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8242, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8239, 8243), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8239, 559), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(1361, 8243), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6996, 587), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8247, 7837), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8248, 7839), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8249, 7841), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8250, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8244, 8251), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8244, 580), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8246, 8251), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8245, 8251), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7185, 8252), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8256, 8254), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8257, 8255), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8258, 8253), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(4715, 8259), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8247, 7098), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8260, 7845), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8261, 7847), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8262, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6996, 631), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7006, 638), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8264, 8265), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7016, 1596), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8266, 8267), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7026, 505), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8268, 8269), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8270, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8263, 8271), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8263, 624), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(607, 8271), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8264, 7098), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7016, 513), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8275, 8276), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7026, 516), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8277, 8278), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8279, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8272, 8280), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8272, 512), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8274, 8280), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8273, 8280), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7223, 8281), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8285, 8283), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8286, 8284), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8287, 8282), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(4716, 8288), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6996, 524), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7006, 525), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8289, 8290), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8291, 8042), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8292, 8044), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8293, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8289, 7098), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8295, 7157), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8296, 7159), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8297, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8294, 8298), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8294, 533), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(517, 8298), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7036, 537), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8302, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8299, 8303), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8299, 536), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8301, 8303), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8300, 8303), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7261, 8304), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8308, 8306), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8309, 8307), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8310, 8305), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(4717, 8311), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7036, 545), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8312, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7036, 698), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8314, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8313, 8315), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8313, 546), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(538, 8315), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8316, 7374), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8316, 697), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8318, 7374), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8317, 7374), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7289, 8319), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8323, 8321), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8324, 8322), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8325, 8320), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(4718, 8326), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7036, 701), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8327, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7036, 703), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8329, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8328, 8330), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8328, 702), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(700, 8330), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8331, 7645), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8331, 704), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8333, 7645), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8332, 7645), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7317, 8334), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8338, 8336), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8339, 8337), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8340, 8335), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(4719, 8341), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7036, 695), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8342, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6986, 718), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8344, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8343, 8345), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8343, 719), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(712, 8345), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6986, 721), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8349, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8346, 8350), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8346, 720), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8348, 8350), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8347, 8350), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7512, 8351), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8355, 8353), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8356, 8354), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8357, 8352), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(4720, 8358), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6986, 723), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8359, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6986, 725), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8361, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8360, 8362), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8360, 724), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(722, 8362), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6986, 733), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8366, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8363, 8367), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8363, 732), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8365, 8367), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8364, 8367), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7540, 8368), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8372, 8370), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8373, 8371), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8374, 8369), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(4721, 8375), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6986, 744), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8376, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8377, 7955), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8377, 747), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(716, 7955), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6986, 756), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8381, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8378, 8382), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8378, 753), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8380, 8382), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8379, 8382), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7578, 8383), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8387, 8385), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8388, 8386), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8389, 8384), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(4722, 8390), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6986, 762), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8391, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8392, 8134), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8392, 765), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(759, 8134), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6986, 774), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8396, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8393, 8397), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8393, 771), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8395, 8397), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8394, 8397), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7606, 8398), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8402, 8400), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8403, 8401), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8404, 8399), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(4723, 8405), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6986, 780), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8406, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6986, 786), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8408, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8407, 8409), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8407, 783), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(777, 8409), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6986, 823), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8413, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8410, 8414), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8410, 789), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8412, 8414), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8411, 8414), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7788, 8415), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8419, 8417), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8420, 8418), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8421, 8416), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(4724, 8422), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6986, 829), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8423, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6986, 835), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8425, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8424, 8426), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8424, 832), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(826, 8426), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7342, 841), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8430, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8427, 8431), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8427, 838), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8429, 8431), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8428, 8431), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Get(55), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Get(54), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8436, 341), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8437, 8438), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Get(53), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8439, 341), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8440, 8441), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Get(52), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8442, 341), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8443, 8444), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8445, 7787), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :177:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8446, 8432), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8447, 8434), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8448, 8435), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8449, 8433), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(4725, 8450), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7342, 847), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8451, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7342, 853), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8453, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8452, 8454), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8452, 850), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(844, 8454), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7342, 859), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8458, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8455, 8459), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8455, 856), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8457, 8459), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8456, 8459), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Get(59), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Get(58), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8464, 341), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8465, 8466), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Get(57), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8467, 341), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8468, 8469), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Get(56), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8470, 341), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8471, 8472), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8473, 8445), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :177:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8474, 8460), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8475, 8462), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8476, 8463), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8477, 8461), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(4726, 8478), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7342, 865), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8479, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7342, 902), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8481, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8480, 8482), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8480, 868), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(862, 8482), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7342, 908), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8486, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8483, 8487), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8483, 905), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8485, 8487), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8484, 8487), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Get(63), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Get(62), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8492, 341), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8493, 8494), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Get(61), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8495, 341), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8496, 8497), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Get(60), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8498, 341), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8499, 8500), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8501, 8473), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :177:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8502, 8488), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8503, 8490), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8504, 8491), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8505, 8489), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(4727, 8506), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7342, 914), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8507, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7342, 920), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8509, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8508, 8510), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8508, 917), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(911, 8510), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7342, 926), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8514, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8511, 8515), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8511, 923), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8513, 8515), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8512, 8515), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Get(67), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Get(66), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8520, 341), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8521, 8522), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Get(65), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8523, 341), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8524, 8525), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Get(64), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8526, 341), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8527, 8528), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8529, 8501), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :177:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8530, 8516), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8531, 8518), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8532, 8519), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8533, 8517), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(4728, 8534), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7342, 932), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8535, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7342, 938), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8537, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8536, 8538), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8536, 935), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(929, 8538), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7342, 944), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8542, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8539, 8543), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8539, 941), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8541, 8543), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8540, 8543), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Get(71), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Get(70), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8548, 341), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8549, 8550), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Get(69), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8551, 341), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8552, 8553), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Get(68), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8554, 341), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8555, 8556), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :190:50 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8557, 8529), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :177:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8558, 8544), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8559, 8546), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8560, 8547), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8561, 8545), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(4729, 8562), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7342, 981), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8563, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7342, 987), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8565, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8564, 8566), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8564, 984), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(947, 8566), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7342, 993), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8570, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8567, 8571), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8567, 990), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8569, 8571), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8568, 8571), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7331, 8557), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :177:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8576, 8572), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8577, 8574), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8578, 8575), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8579, 8573), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(4730, 8580), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndCond(4712, 422, 4731), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :590:9 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6986, 638), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8581, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8582, 7132), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8582, 512), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(631, 7132), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8583, 8155), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8583, 737), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8585, 8155), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8584, 8155), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7080, 8586), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8590, 8588), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8591, 8589), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8592, 8587), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(0, 8593), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8164, 8180), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8164, 741), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(1078, 8180), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8594, 8186), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8594, 1312), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8596, 8186), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8595, 8186), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7119, 8597), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8601, 8599), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8602, 8600), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8603, 8598), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(4733, 8604), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8197, 8211), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8197, 1334), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(1321, 8211), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8605, 8218), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8605, 1354), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8607, 8218), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8606, 8218), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7147, 8608), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8612, 8610), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8613, 8611), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8614, 8609), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(4734, 8615), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7036, 1366), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8616, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8226, 8617), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8226, 1361), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(1717, 8617), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7036, 549), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8621, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8618, 8622), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8618, 1367), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8620, 8622), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8619, 8622), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7185, 8623), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8627, 8625), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8628, 8626), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8629, 8624), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(4735, 8630), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7036, 559), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8631, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8632, 7827), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8632, 566), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(552, 7827), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6986, 587), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8636, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8633, 8637), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8633, 580), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8635, 8637), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8634, 8637), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7223, 8638), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8642, 8640), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8643, 8641), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8644, 8639), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(4736, 8645), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6986, 597), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8646, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6986, 722), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8648, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8647, 8649), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8647, 721), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(590, 8649), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8650, 8362), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8650, 724), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8652, 8362), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8651, 8362), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7261, 8653), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8657, 8655), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8658, 8656), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8659, 8654), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(4737, 8660), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7289, 7127), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8661, 733), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(4738, 8662), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7331, 7288), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :124:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(4739, 8663), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :125:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndCond(4732, 425, 4740), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :590:9 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7006, 587), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7836, 8664), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7016, 590), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8665, 8666), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7026, 597), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8667, 8668), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8669, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7844, 8009), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8671, 8011), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8672, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8670, 8673), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8670, 604), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(573, 8673), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6996, 624), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7006, 631), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8677, 8678), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7016, 638), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8679, 8680), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7026, 1596), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8681, 8682), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8683, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8674, 8684), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8674, 617), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8676, 8684), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8675, 8684), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7080, 8685), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8689, 8687), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8690, 8688), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8691, 8686), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(0, 8692), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8677, 7098), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7016, 512), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8693, 8694), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7026, 513), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8695, 8696), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8697, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6996, 517), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7006, 524), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8699, 8700), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7016, 525), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8701, 8702), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7026, 532), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8703, 8704), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8705, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8698, 8706), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8698, 516), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(505, 8706), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8699, 7098), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7016, 533), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8710, 8711), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7026, 534), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8712, 8713), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8714, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8707, 8715), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8707, 531), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8709, 8715), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8708, 8715), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7119, 8716), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8720, 8718), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8721, 8719), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8722, 8717), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(4742, 8723), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6996, 536), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7006, 537), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8724, 8725), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7016, 538), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8726, 8727), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7026, 545), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8728, 8729), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8730, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8724, 7098), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7016, 698), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8732, 8733), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7026, 697), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8734, 8735), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8736, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8731, 8737), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8731, 546), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(535, 8737), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7006, 701), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7383, 8741), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8742, 7636), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8743, 7638), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8744, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8738, 8745), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8738, 699), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8740, 8745), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8739, 8745), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7147, 8746), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8750, 8748), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8751, 8749), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8752, 8747), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(4743, 8753), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7016, 711), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7389, 8754), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7026, 712), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8755, 8756), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8757, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7230, 7923), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8759, 7925), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8760, 7927), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8761, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8758, 8762), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8758, 695), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(704, 8762), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(7241, 7934), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8766, 7936), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8767, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8763, 8768), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8763, 722), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8765, 8768), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8764, 8768), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7185, 8769), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8773, 8771), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8774, 8772), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8775, 8770), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(4744, 8776), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7006, 733), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8106, 8777), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7016, 716), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8778, 8779), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7026, 744), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8780, 8781), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8782, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7016, 750), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8122, 8784), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7026, 753), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8785, 8786), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8787, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8783, 8788), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8783, 747), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(725, 8788), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6996, 759), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7006, 762), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8792, 8793), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7016, 765), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8794, 8795), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7026, 768), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8796, 8797), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8798, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8789, 8799), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8789, 756), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8791, 8799), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8790, 8799), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7223, 8800), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8804, 8802), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8805, 8803), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8806, 8801), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(4745, 8807), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8792, 7098), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7016, 774), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8808, 8809), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7026, 777), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8810, 8811), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :157:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8812, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7036, 783), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8814, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8813, 8815), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8813, 780), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(771, 8815), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7036, 789), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8819, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8816, 8820), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8816, 786), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8818, 8820), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8817, 8820), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7261, 8821), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8825, 8823), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8826, 8824), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8827, 8822), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(4746, 8828), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7036, 826), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8829, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7036, 832), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8831, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8830, 8832), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8830, 829), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(823, 8832), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7036, 838), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8836, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8833, 8837), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8833, 835), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8835, 8837), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8834, 8837), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7289, 8838), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8842, 8840), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8843, 8841), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8844, 8839), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(4747, 8845), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7036, 844), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8846, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7036, 850), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8848, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8847, 8849), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8847, 847), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(841, 8849), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7036, 856), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8853, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8850, 8854), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8850, 853), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8852, 8854), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8851, 8854), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7317, 8855), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8859, 8857), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8860, 8858), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8861, 8856), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(4748, 8862), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6986, 862), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8863, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6986, 868), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8865, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8864, 8866), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8864, 865), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(859, 8866), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6986, 905), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8870, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8867, 8871), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8867, 902), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8869, 8871), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8868, 8871), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7512, 8872), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8876, 8874), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8877, 8875), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8878, 8873), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(4749, 8879), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6986, 911), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8880, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6986, 917), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8882, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8881, 8883), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8881, 914), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(908, 8883), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8884, 7591), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8884, 920), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8886, 7591), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8885, 7591), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7540, 8887), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8891, 8889), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8892, 8890), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8893, 8888), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(4750, 8894), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6986, 929), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8895, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6986, 935), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8897, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8896, 8898), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8896, 932), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(926, 8898), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6986, 941), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8902, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8899, 8903), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8899, 938), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8901, 8903), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8900, 8903), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7578, 8904), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8908, 8906), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8909, 8907), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8910, 8905), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(4751, 8911), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6986, 947), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8912, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8913, 7773), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8913, 981), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(944, 7773), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6986, 990), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8917, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8914, 8918), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8914, 987), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8916, 8918), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8915, 8918), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7606, 8919), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8923, 8921), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8924, 8922), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8925, 8920), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(4752, 8926), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6986, 996), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8927, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6986, 1002), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8929, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8928, 8930), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8928, 999), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(993, 8930), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6986, 1008), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8934, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8931, 8935), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8931, 1005), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8933, 8935), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8932, 8935), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7788, 8936), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8940, 8938), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8941, 8939), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8942, 8937), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(4753, 8943), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(6986, 1014), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8944, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7342, 1020), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8946, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8945, 8947), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8945, 1017), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(1011, 8947), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7342, 1026), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :146:36 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Add(8951, 7046), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :238:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8948, 8952), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :217:45 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8948, 1023), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :219:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8950, 8952), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8949, 8952), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :223:37 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8446, 8953), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8957, 8955), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8958, 8956), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8959, 8954), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(4754, 8960), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Get(316), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :236:47 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(8474, 7127), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8962, 8961), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(4755, 8963), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7331, 8473), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :124:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(4756, 8964), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :125:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndCond(4741, 428, 4757), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :590:9 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Mul(7080, 7127), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :178:46 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(8965, 774), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :180:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(0, 8966), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :182:33 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::Sub(7331, 7079), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :124:42 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndEqz(4759, 8967), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :125:35 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -PolyExtStep::AndCond(4758, 431, 4760), // loc(callsite( zirgen/dsl/passes/GenerateAccum.cpp :590:9 at callsite( zirgen/dsl/passes/GenerateAccum.cpp :526:9 at unknown))) -], - ret: 4761, -}; - -impl PolyExt for CircuitImpl { - fn poly_ext( - &self, - mix: &BabyBearExtElem, - u: &[BabyBearExtElem], - args: &[&[BabyBearElem]], - ) -> MixState { - DEF.step::(mix, u, args) - } -} diff --git a/risc0/circuit/rv32im-v2/src/zirgen/steps.rs.inc b/risc0/circuit/rv32im-v2/src/zirgen/steps.rs.inc deleted file mode 100644 index 06132bed..00000000 --- a/risc0/circuit/rv32im-v2/src/zirgen/steps.rs.inc +++ /dev/null @@ -1,20652 +0,0 @@ -pub fn back_nondet_reg<'a>( - ctx: &'a ExecContext, - distance0: Index, - layout1: BoundLayout<'a, NondetRegLayout, Val>, -) -> Result { - let x2: NondetRegStruct = NondetRegStruct { - _super: (layout1.map(|c| c._super)).load(ctx, distance0), - }; - return Ok(x2); -} -pub fn exec_nondet_reg<'a>( - ctx: &'a ExecContext, - arg0: Val, - layout1: BoundLayout<'a, NondetRegLayout, Val>, -) -> Result { - let x2: BoundLayout = (layout1.map(|c| c._super)); - x2.store(ctx, arg0); - return Ok(NondetRegStruct { - _super: x2.load(ctx, 0), - }); -} -pub fn back_nondet_ext_reg<'a>( - ctx: &'a ExecContext, - distance0: Index, - layout1: BoundLayout<'a, NondetExtRegLayout, Val>, -) -> Result { - let x2: NondetExtRegStruct = NondetExtRegStruct { - _super: (layout1.map(|c| c._super)).load_ext::(ctx, distance0), - }; - return Ok(x2); -} -pub fn exec_nondet_ext_reg<'a>( - ctx: &'a ExecContext, - arg0: ExtVal, - layout1: BoundLayout<'a, NondetExtRegLayout, Val>, -) -> Result { - let x2: BoundLayout = (layout1.map(|c| c._super)); - x2.store_ext(ctx, arg0); - return Ok(NondetExtRegStruct { - _super: x2.load_ext::(ctx, 0), - }); -} -pub fn back_reg<'a>( - ctx: &'a ExecContext, - distance0: Index, - layout1: BoundLayout<'a, NondetRegLayout, Val>, -) -> Result { - // Reg(:4) - let x2: NondetRegStruct = back_nondet_reg(ctx, distance0, layout1)?; - return Ok(RegStruct { _super: x2 }); -} -pub fn exec_reg<'a>( - ctx: &'a ExecContext, - arg0: Val, - layout1: BoundLayout<'a, NondetRegLayout, Val>, -) -> Result { - let x2: NondetRegStruct = exec_nondet_reg(ctx, arg0, layout1)?; - // Reg(:5) - eqz!((arg0 - x2._super), "Reg(:5)"); - return Ok(RegStruct { _super: x2 }); -} -pub fn back_ext_reg<'a>( - ctx: &'a ExecContext, - distance0: Index, - layout1: BoundLayout<'a, NondetExtRegLayout, Val>, -) -> Result { - // ExtReg(:10) - let x2: NondetExtRegStruct = back_nondet_ext_reg(ctx, distance0, layout1)?; - return Ok(x2); -} -pub fn exec_ext_reg<'a>( - ctx: &'a ExecContext, - arg0: ExtVal, - layout1: BoundLayout<'a, NondetExtRegLayout, Val>, -) -> Result { - let x2: NondetExtRegStruct = exec_nondet_ext_reg(ctx, arg0, layout1)?; - // ExtReg(:11) - eqz!( - (x2._super - arg0), - "loc(callsite(unknown at ExtReg ( :11:11)))" - ); - return Ok(x2); -} -pub fn exec_nondet_bit_reg<'a>( - ctx: &'a ExecContext, - arg0: Val, - layout1: BoundLayout<'a, NondetRegLayout, Val>, -) -> Result { - // NondetBitReg(zirgen/circuit/rv32im/v2/dsl/bits.zir:11) - let x2: NondetRegStruct = exec_nondet_reg(ctx, arg0, layout1)?; - let x3: Val = x2._super; - // AssertBit(zirgen/circuit/rv32im/v2/dsl/bits.zir:6) - // NondetBitReg(zirgen/circuit/rv32im/v2/dsl/bits.zir:12) - eqz!((x3 * (Val::new(1) - x3)), "loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at NondetBitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :12:13)))"); - return Ok(x2); -} -pub fn exec_bit_reg<'a>( - ctx: &'a ExecContext, - arg0: Val, - layout1: BoundLayout<'a, NondetRegLayout, Val>, -) -> Result { - // BitReg(zirgen/circuit/rv32im/v2/dsl/bits.zir:17) - let x2: NondetRegStruct = exec_nondet_bit_reg(ctx, arg0, layout1)?; - // BitReg(zirgen/circuit/rv32im/v2/dsl/bits.zir:18) - eqz!( - (arg0 - x2._super), - "BitReg(zirgen/circuit/rv32im/v2/dsl/bits.zir:18)" - ); - return Ok(BitRegStruct {}); -} -pub fn exec_nondet_twit_reg<'a>( - ctx: &'a ExecContext, - arg0: Val, - layout1: BoundLayout<'a, NondetRegLayout, Val>, -) -> Result { - // NondetTwitReg(zirgen/circuit/rv32im/v2/dsl/bits.zir:48) - let x2: NondetRegStruct = exec_nondet_reg(ctx, arg0, layout1)?; - let x3: Val = x2._super; - // AssertTwit(zirgen/circuit/rv32im/v2/dsl/bits.zir:35) - // NondetTwitReg(zirgen/circuit/rv32im/v2/dsl/bits.zir:49) - let x4: Val = ((x3 * (Val::new(1) - x3)) * (Val::new(2) - x3)); - eqz!((x4 * (Val::new(3) - x3)), "loc(callsite( AssertTwit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :35:44) at NondetTwitReg ( zirgen/circuit/rv32im/v2/dsl/bits.zir :49:14)))"); - return Ok(x2); -} -pub fn exec_nondet_fake_twit_reg<'a>( - ctx: &'a ExecContext, - arg0: Val, - layout1: BoundLayout<'a, NondetFakeTwitRegLayout, Val>, -) -> Result { - // NondetFakeTwitReg(zirgen/circuit/rv32im/v2/dsl/bits.zir:55) - let x2: NondetRegStruct = - exec_nondet_bit_reg(ctx, bit_and(arg0, Val::new(1))?, (layout1.map(|c| c.reg0)))?; - // NondetFakeTwitReg(zirgen/circuit/rv32im/v2/dsl/bits.zir:56) - let x3: NondetRegStruct = exec_nondet_bit_reg( - ctx, - (bit_and(arg0, Val::new(2))? * Val::new(1006632961)), - (layout1.map(|c| c.reg1)), - )?; - // NondetFakeTwitReg(zirgen/circuit/rv32im/v2/dsl/bits.zir:57) - let x4: Val = ((x3._super * Val::new(2)) + x2._super); - return Ok(NondetFakeTwitRegStruct { _super: x4 }); -} -pub fn exec_fake_twit_reg<'a>( - ctx: &'a ExecContext, - arg0: Val, - layout1: BoundLayout<'a, NondetFakeTwitRegLayout, Val>, -) -> Result { - // FakeTwitReg(zirgen/circuit/rv32im/v2/dsl/bits.zir:67) - let x2: NondetFakeTwitRegStruct = exec_nondet_fake_twit_reg(ctx, arg0, layout1)?; - // FakeTwitReg(zirgen/circuit/rv32im/v2/dsl/bits.zir:68) - eqz!( - (arg0 - x2._super), - "FakeTwitReg(zirgen/circuit/rv32im/v2/dsl/bits.zir:68)" - ); - return Ok(FakeTwitRegStruct {}); -} -pub fn exec_is_zero<'a>( - ctx: &'a ExecContext, - arg0: Val, - layout1: BoundLayout<'a, IsZeroLayout, Val>, -) -> Result { - // IsZero(zirgen/circuit/rv32im/v2/dsl/is_zero.zir:8) - let x2: NondetRegStruct = exec_nondet_reg(ctx, isz(arg0)?, (layout1.map(|c| c._super)))?; - // IsZero(zirgen/circuit/rv32im/v2/dsl/is_zero.zir:11) - let x3: NondetRegStruct = exec_nondet_reg(ctx, inv_0(arg0)?, (layout1.map(|c| c.inv)))?; - // IsZero(zirgen/circuit/rv32im/v2/dsl/is_zero.zir:8) - let x4: Val = x2._super; - // AssertBit(zirgen/circuit/rv32im/v2/dsl/bits.zir:6) - // IsZero(zirgen/circuit/rv32im/v2/dsl/is_zero.zir:14) - let x5: Val = (Val::new(1) - x4); - eqz!((x4 * x5), "loc(callsite( AssertBit ( zirgen/circuit/rv32im/v2/dsl/bits.zir :6:20) at IsZero ( zirgen/circuit/rv32im/v2/dsl/is_zero.zir :14:13)))"); - // IsZero(zirgen/circuit/rv32im/v2/dsl/is_zero.zir:11) - let x6: Val = x3._super; - // IsZero(zirgen/circuit/rv32im/v2/dsl/is_zero.zir:16) - eqz!( - ((arg0 * x6) - x5), - "IsZero(zirgen/circuit/rv32im/v2/dsl/is_zero.zir:16)" - ); - // IsZero(zirgen/circuit/rv32im/v2/dsl/is_zero.zir:18) - eqz!( - (x4 * arg0), - "IsZero(zirgen/circuit/rv32im/v2/dsl/is_zero.zir:18)" - ); - // IsZero(zirgen/circuit/rv32im/v2/dsl/is_zero.zir:20) - eqz!( - (x4 * x6), - "IsZero(zirgen/circuit/rv32im/v2/dsl/is_zero.zir:20)" - ); - return Ok(x2); -} -pub fn exec_arg_u8<'a>( - ctx: &'a ExecContext, - arg0: Val, - arg1: Val, - layout2: BoundLayout<'a, ArgU8Layout, Val>, -) -> Result { - // ArgU8(zirgen/circuit/rv32im/v2/dsl/lookups.zir:8) - let x3: NondetRegStruct = exec_nondet_reg(ctx, arg0, (layout2.map(|c| c.count)))?; - // ArgU8(zirgen/circuit/rv32im/v2/dsl/lookups.zir:9) - let x4: NondetRegStruct = exec_nondet_reg(ctx, arg1, (layout2.map(|c| c.val)))?; - // LookupDelta(zirgen/circuit/rv32im/v2/dsl/lookups.zir:4) - // ArgU8(zirgen/circuit/rv32im/v2/dsl/lookups.zir:10) - invoke_extern!(ctx, lookup_delta, Val::new(8), x4._super, x3._super); - return Ok(ArgU8Struct { count: x3, val: x4 }); -} -pub fn exec_nondet_u8_reg<'a>( - ctx: &'a ExecContext, - arg0: Val, - layout1: BoundLayout<'a, NondetU8RegLayout, Val>, -) -> Result { - // NondetU8Reg(zirgen/circuit/rv32im/v2/dsl/lookups.zir:15) - let x2: ArgU8Struct = exec_arg_u8(ctx, Val::new(1), arg0, (layout1.map(|c| c.arg)))?; - // NondetU8Reg(zirgen/circuit/rv32im/v2/dsl/lookups.zir:16) - let x3: Val = (x2.count._super - Val::new(1)); - eqz!( - x3, - "NondetU8Reg(zirgen/circuit/rv32im/v2/dsl/lookups.zir:16)" - ); - return Ok(x2.val); -} -pub fn exec_u8_reg<'a>( - ctx: &'a ExecContext, - arg0: Val, - layout1: BoundLayout<'a, U8RegLayout, Val>, -) -> Result { - // U8Reg(zirgen/circuit/rv32im/v2/dsl/lookups.zir:22) - let x2: NondetRegStruct = exec_nondet_u8_reg(ctx, arg0, (layout1.map(|c| c.ret)))?; - // U8Reg(zirgen/circuit/rv32im/v2/dsl/lookups.zir:23) - eqz!( - (x2._super - arg0), - "U8Reg(zirgen/circuit/rv32im/v2/dsl/lookups.zir:23)" - ); - return Ok(U8RegStruct {}); -} -pub fn exec_arg_u16<'a>( - ctx: &'a ExecContext, - arg0: Val, - arg1: Val, - layout2: BoundLayout<'a, ArgU16Layout, Val>, -) -> Result { - // ArgU16(zirgen/circuit/rv32im/v2/dsl/lookups.zir:28) - let x3: NondetRegStruct = exec_nondet_reg(ctx, arg0, (layout2.map(|c| c.count)))?; - // ArgU16(zirgen/circuit/rv32im/v2/dsl/lookups.zir:29) - let x4: NondetRegStruct = exec_nondet_reg(ctx, arg1, (layout2.map(|c| c.val)))?; - // LookupDelta(zirgen/circuit/rv32im/v2/dsl/lookups.zir:4) - // ArgU16(zirgen/circuit/rv32im/v2/dsl/lookups.zir:30) - invoke_extern!(ctx, lookup_delta, Val::new(16), x4._super, x3._super); - return Ok(ArgU16Struct { count: x3, val: x4 }); -} -pub fn exec_nondet_u16_reg<'a>( - ctx: &'a ExecContext, - arg0: Val, - layout1: BoundLayout<'a, NondetU16RegLayout, Val>, -) -> Result { - // NondetU16Reg(zirgen/circuit/rv32im/v2/dsl/lookups.zir:35) - let x2: ArgU16Struct = exec_arg_u16(ctx, Val::new(1), arg0, (layout1.map(|c| c.arg)))?; - // NondetU16Reg(zirgen/circuit/rv32im/v2/dsl/lookups.zir:36) - let x3: Val = (x2.count._super - Val::new(1)); - eqz!( - x3, - "NondetU16Reg(zirgen/circuit/rv32im/v2/dsl/lookups.zir:36)" - ); - return Ok(x2.val); -} -pub fn exec_u16_reg<'a>( - ctx: &'a ExecContext, - arg0: Val, - layout1: BoundLayout<'a, U16RegLayout, Val>, -) -> Result { - // U16Reg(zirgen/circuit/rv32im/v2/dsl/lookups.zir:42) - let x2: NondetRegStruct = exec_nondet_u16_reg(ctx, arg0, (layout1.map(|c| c.ret)))?; - // U16Reg(zirgen/circuit/rv32im/v2/dsl/lookups.zir:43) - eqz!( - (x2._super - arg0), - "U16Reg(zirgen/circuit/rv32im/v2/dsl/lookups.zir:43)" - ); - return Ok(U16RegStruct { _super: arg0 }); -} -pub fn exec_to_bits_5_<'a>( - ctx: &'a ExecContext, - arg0: Val, - layout1: BoundLayout<'a, ToBits_5_Layout, Val>, -) -> Result { - // ToBits(zirgen/circuit/rv32im/v2/dsl/po2.zir:31) - let x2: NondetRegStruct5Array = map_layout( - [ - Val::new(0), - Val::new(1), - Val::new(2), - Val::new(3), - Val::new(4), - ], - (layout1.map(|c| c._super)), - |x3, x4| { - // Div(:16) - let x5: Val = inv_0( - [ - Val::new(1), - Val::new(2), - Val::new(4), - Val::new(8), - Val::new(16), - Val::new(32), - Val::new(64), - Val::new(128), - Val::new(256), - Val::new(512), - Val::new(1024), - Val::new(2048), - Val::new(4096), - Val::new(8192), - Val::new(16384), - Val::new(32768), - ][to_usize(x3)], - )?; - // Div(:17) - eqz!(((x5 * [Val::new(1), Val::new(2), Val::new(4), Val::new(8), Val::new(16), Val::new(32), Val::new(64), Val::new(128), Val::new(256), Val::new(512), Val::new(1024), Val::new(2048), Val::new(4096), Val::new(8192), Val::new(16384), Val::new(32768)][to_usize(x3)]) - Val::new(1)), "loc(callsite( Div ( :17:22) at ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:43)))"); - let x6: NondetRegStruct = exec_nondet_bit_reg( - ctx, - (x5 * bit_and( - arg0, - [ - Val::new(1), - Val::new(2), - Val::new(4), - Val::new(8), - Val::new(16), - Val::new(32), - Val::new(64), - Val::new(128), - Val::new(256), - Val::new(512), - Val::new(1024), - Val::new(2048), - Val::new(4096), - Val::new(8192), - Val::new(16384), - Val::new(32768), - ][to_usize(x3)], - )?), - x4, - )?; - return Ok(x6); - }, - )?; - return Ok(ToBits_5_Struct { _super: x2 }); -} -pub fn exec_dyn_po2<'a>( - ctx: &'a ExecContext, - arg0: Val, - layout1: BoundLayout<'a, DynPo2Layout, Val>, -) -> Result { - // DynPo2(zirgen/circuit/rv32im/v2/dsl/po2.zir:44) - let x2: ToBits_5_Struct = exec_to_bits_5_(ctx, arg0, (layout1.map(|c| c.low5)))?; - let x3: NondetRegStruct5Array = x2._super; - let x4: Val = x3[to_usize(Val::new(0))]._super; - let x5: Val = x3[to_usize(Val::new(1))]._super; - let x6: Val = x3[to_usize(Val::new(2))]._super; - let x7: Val = x3[to_usize(Val::new(3))]._super; - let x8: Val = x3[to_usize(Val::new(4))]._super; - // FromBits(zirgen/circuit/rv32im/v2/dsl/po2.zir:35) - // DynPo2(zirgen/circuit/rv32im/v2/dsl/po2.zir:45) - let x9: Val = (((x4 + (x5 * Val::new(2))) + (x6 * Val::new(4))) + (x7 * Val::new(8))); - let x10: Val = (x9 + (x8 * Val::new(16))); - // DynPo2(zirgen/circuit/rv32im/v2/dsl/po2.zir:46) - let x11: NondetRegStruct = exec_nondet_u16_reg( - ctx, - ((arg0 - x10) * Val::new(1950351361)), - (layout1.map(|c| c.check_u16)), - )?; - // DynPo2(zirgen/circuit/rv32im/v2/dsl/po2.zir:47) - let x12: Val = ((x11._super * Val::new(32)) + x10); - eqz!( - (x12 - arg0), - "DynPo2(zirgen/circuit/rv32im/v2/dsl/po2.zir:47)" - ); - // CondMul(zirgen/circuit/rv32im/v2/dsl/po2.zir:39) - // DynPo2(zirgen/circuit/rv32im/v2/dsl/po2.zir:48) - let x13: Val = ((x4 * Val::new(2)) + (Val::new(1) - x4)); - // DynPo2(zirgen/circuit/rv32im/v2/dsl/po2.zir:49) - let x14: Val = ((Val::new(1) - x5) * x13); - let x15: Val = (((x5 * x13) * Val::new(4)) + x14); - // DynPo2(zirgen/circuit/rv32im/v2/dsl/po2.zir:50) - let x16: Val = ((Val::new(1) - x6) * x15); - let x17: Val = (((x6 * x15) * Val::new(16)) + x16); - let x18: RegStruct = exec_reg(ctx, x17, (layout1.map(|c| c.b3)))?; - let x19: Val = x18._super._super; - // CondMul(zirgen/circuit/rv32im/v2/dsl/po2.zir:39) - // DynPo2(zirgen/circuit/rv32im/v2/dsl/po2.zir:51) - let x20: Val = ((Val::new(1) - x7) * x19); - let x21: Val = (((x7 * x19) * Val::new(256)) + x20); - // DynPo2(zirgen/circuit/rv32im/v2/dsl/po2.zir:52) - let x22: Val = ((Val::new(1) - x8) * x21); - let x23: RegStruct = exec_reg(ctx, x22, (layout1.map(|c| c.low)))?; - // DynPo2(zirgen/circuit/rv32im/v2/dsl/po2.zir:53) - let x24: RegStruct = exec_reg(ctx, (x8 * x21), (layout1.map(|c| c.high)))?; - // ValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:10) - // DynPo2(zirgen/circuit/rv32im/v2/dsl/po2.zir:54) - let x25: ValU32Struct = ValU32Struct { - low: x23._super._super, - high: x24._super._super, - }; - return Ok(x25); -} -pub fn exec_normalize_u32<'a>( - ctx: &'a ExecContext, - arg0: &DenormedValU32Struct, - layout1: BoundLayout<'a, NormalizeU32Layout, Val>, -) -> Result { - // NormalizeU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:42) - let x2: Val = arg0.low; - // NormalizeU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:44) - let x3: NondetRegStruct = exec_nondet_u16_reg( - ctx, - bit_and(x2, Val::new(65535))?, - (layout1.map(|c| c.low16)), - )?; - // NormalizeU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:45) - let x4: NondetRegStruct = exec_nondet_bit_reg( - ctx, - (bit_and(x2, Val::new(65536))? * Val::new(2013235201)), - (layout1.map(|c| c.low_carry)), - )?; - let x5: Val = x4._super; - // NormalizeU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:44) - let x6: Val = x3._super; - // NormalizeU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:46) - eqz!( - (x2 - ((x5 * Val::new(65536)) + x6)), - "NormalizeU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:46)" - ); - // NormalizeU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:48) - let x7: Val = (arg0.high + x5); - // NormalizeU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:50) - let x8: NondetRegStruct = exec_nondet_u16_reg( - ctx, - bit_and(x7, Val::new(65535))?, - (layout1.map(|c| c.high16)), - )?; - // NormalizeU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:51) - let x9: NondetRegStruct = exec_nondet_bit_reg( - ctx, - (bit_and(x7, Val::new(65536))? * Val::new(2013235201)), - (layout1.map(|c| c.high_carry)), - )?; - // NormalizeU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:50) - let x10: Val = x8._super; - // NormalizeU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:52) - let x11: Val = ((x9._super * Val::new(65536)) + x10); - eqz!( - (x7 - x11), - "NormalizeU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:52)" - ); - return Ok(NormalizeU32Struct { - _super: ValU32Struct { low: x6, high: x10 }, - carry: x9, - }); -} -pub fn exec_addr_decompose<'a>( - ctx: &'a ExecContext, - arg0: &ValU32Struct, - arg1: Val, - layout2: BoundLayout<'a, AddrDecomposeLayout, Val>, -) -> Result { - // AddrDecompose(zirgen/circuit/rv32im/v2/dsl/u32.zir:61) - let x3: Val = arg0.low; - // AddrDecompose(zirgen/circuit/rv32im/v2/dsl/u32.zir:63) - let x4: NondetRegStruct = - exec_nondet_twit_reg(ctx, bit_and(x3, Val::new(3))?, (layout2.map(|c| c.low2)))?; - // AddrDecompose(zirgen/circuit/rv32im/v2/dsl/u32.zir:65) - let x5: Val = ((Val::new(1) - arg1) * Val::new(49151)); - // AddrDecompose(zirgen/circuit/rv32im/v2/dsl/u32.zir:61) - let x6: Val = arg0.high; - // AddrDecompose(zirgen/circuit/rv32im/v2/dsl/u32.zir:65) - let x7: Val = (((arg1 * Val::new(65535)) + x5) - x6); - let x8: U16RegStruct = exec_u16_reg(ctx, x7, (layout2.map(|c| c.upper_diff)))?; - // AddrDecompose(zirgen/circuit/rv32im/v2/dsl/u32.zir:67) - let x9: NondetRegStruct = exec_is_zero(ctx, x6, (layout2.map(|c| c._0)))?; - eqz!( - x9._super, - "AddrDecompose(zirgen/circuit/rv32im/v2/dsl/u32.zir:67)" - ); - // AddrDecompose(zirgen/circuit/rv32im/v2/dsl/u32.zir:63) - let x10: Val = x4._super; - // AddrDecompose(zirgen/circuit/rv32im/v2/dsl/u32.zir:69) - let x11: NondetRegStruct = exec_nondet_u16_reg( - ctx, - ((x3 - x10) * Val::new(1509949441)), - (layout2.map(|c| c.med14)), - )?; - let x12: Val = x11._super; - // AddrDecompose(zirgen/circuit/rv32im/v2/dsl/u32.zir:71) - let x13: Val = (((x12 * Val::new(4)) + x10) - x3); - eqz!( - x13, - "AddrDecompose(zirgen/circuit/rv32im/v2/dsl/u32.zir:71)" - ); - // AddrDecompose(zirgen/circuit/rv32im/v2/dsl/u32.zir:61) - let x14: AddrDecomposeStruct = AddrDecomposeStruct { - _super: ((x6 * Val::new(16384)) + x12), - low2: x4, - }; - return Ok(x14); -} -pub fn exec_addr_decompose_bits<'a>( - ctx: &'a ExecContext, - arg0: &ValU32Struct, - arg1: Val, - layout2: BoundLayout<'a, AddrDecomposeBitsLayout, Val>, -) -> Result { - // AddrDecomposeBits(zirgen/circuit/rv32im/v2/dsl/u32.zir:79) - let x3: Val = arg0.low; - // AddrDecomposeBits(zirgen/circuit/rv32im/v2/dsl/u32.zir:81) - let x4: NondetRegStruct = - exec_nondet_bit_reg(ctx, bit_and(x3, Val::new(1))?, (layout2.map(|c| c.low0)))?; - // AddrDecomposeBits(zirgen/circuit/rv32im/v2/dsl/u32.zir:82) - let x5: NondetRegStruct = exec_nondet_bit_reg( - ctx, - (bit_and(x3, Val::new(2))? * Val::new(1006632961)), - (layout2.map(|c| c.low1)), - )?; - // AddrDecomposeBits(zirgen/circuit/rv32im/v2/dsl/u32.zir:83) - let x6: Val = ((x5._super * Val::new(2)) + x4._super); - // AddrDecomposeBits(zirgen/circuit/rv32im/v2/dsl/u32.zir:85) - let x7: Val = ((Val::new(1) - arg1) * Val::new(49151)); - // AddrDecomposeBits(zirgen/circuit/rv32im/v2/dsl/u32.zir:79) - let x8: Val = arg0.high; - // AddrDecomposeBits(zirgen/circuit/rv32im/v2/dsl/u32.zir:85) - let x9: Val = (((arg1 * Val::new(65535)) + x7) - x8); - let x10: U16RegStruct = exec_u16_reg(ctx, x9, (layout2.map(|c| c.upper_diff)))?; - // AddrDecomposeBits(zirgen/circuit/rv32im/v2/dsl/u32.zir:87) - let x11: NondetRegStruct = exec_is_zero(ctx, x8, (layout2.map(|c| c._0)))?; - eqz!( - x11._super, - "AddrDecomposeBits(zirgen/circuit/rv32im/v2/dsl/u32.zir:87)" - ); - // AddrDecomposeBits(zirgen/circuit/rv32im/v2/dsl/u32.zir:89) - let x12: NondetRegStruct = exec_nondet_u16_reg( - ctx, - ((x3 - x6) * Val::new(1509949441)), - (layout2.map(|c| c.med14)), - )?; - let x13: Val = x12._super; - // AddrDecomposeBits(zirgen/circuit/rv32im/v2/dsl/u32.zir:91) - let x14: Val = (((x13 * Val::new(4)) + x6) - x3); - eqz!( - x14, - "AddrDecomposeBits(zirgen/circuit/rv32im/v2/dsl/u32.zir:91)" - ); - // AddrDecomposeBits(zirgen/circuit/rv32im/v2/dsl/u32.zir:93) - let x15: Val = ((x8 * Val::new(16384)) + x13); - return Ok(AddrDecomposeBitsStruct { - _super: x15, - low0: x4, - low1: x5, - low2: x6, - addr: x15, - }); -} -pub fn exec_cmp_equal<'a>( - ctx: &'a ExecContext, - arg0: &ValU32Struct, - arg1: &ValU32Struct, - layout2: BoundLayout<'a, CmpEqualLayout, Val>, -) -> Result { - // CmpEqual(zirgen/circuit/rv32im/v2/dsl/u32.zir:112) - let x3: NondetRegStruct = - exec_is_zero(ctx, (arg0.low - arg1.low), (layout2.map(|c| c.low_same)))?; - // CmpEqual(zirgen/circuit/rv32im/v2/dsl/u32.zir:113) - let x4: NondetRegStruct = - exec_is_zero(ctx, (arg0.high - arg1.high), (layout2.map(|c| c.high_same)))?; - // CmpEqual(zirgen/circuit/rv32im/v2/dsl/u32.zir:114) - let x5: RegStruct = exec_reg(ctx, (x3._super * x4._super), (layout2.map(|c| c.is_equal)))?; - return Ok(CmpEqualStruct { is_equal: x5 }); -} -pub fn exec_cmp_less_than_unsigned<'a>( - ctx: &'a ExecContext, - arg0: &ValU32Struct, - arg1: &ValU32Struct, - layout2: BoundLayout<'a, CmpLessThanUnsignedLayout, Val>, -) -> Result { - // SubU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:33) - // CmpLessThanUnsigned(zirgen/circuit/rv32im/v2/dsl/u32.zir:119) - let x3: Val = ((arg0.low + Val::new(65536)) - arg1.low); - let x4: Val = ((arg0.high + Val::new(65535)) - arg1.high); - let x5: NormalizeU32Struct = exec_normalize_u32( - ctx, - &DenormedValU32Struct { low: x3, high: x4 }, - (layout2.map(|c| c.diff)), - )?; - // CmpLessThanUnsigned(zirgen/circuit/rv32im/v2/dsl/u32.zir:120) - let x6: Val = (Val::new(1) - x5.carry._super); - return Ok(CmpLessThanUnsignedStruct { is_less_than: x6 }); -} -pub fn exec_get_sign_u32<'a>( - ctx: &'a ExecContext, - arg0: &ValU32Struct, - layout1: BoundLayout<'a, GetSignU32Layout, Val>, -) -> Result { - // GetSignU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:124) - let x2: Val = arg0.high; - // GetSignU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:125) - let x3: NondetRegStruct = exec_nondet_bit_reg( - ctx, - (bit_and(x2, Val::new(32768))? * Val::new(2013204481)), - (layout1.map(|c| c._super)), - )?; - // GetSignU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:126) - let x4: NondetRegStruct = exec_nondet_u16_reg( - ctx, - (bit_and(x2, Val::new(32767))? * Val::new(2)), - (layout1.map(|c| c.rest_times_two)), - )?; - // GetSignU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:127) - let x5: Val = ((x3._super * Val::new(32768)) + (x4._super * Val::new(1006632961))); - eqz!( - (x2 - x5), - "GetSignU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:127)" - ); - return Ok(x3); -} -pub fn exec_cmp_less_than<'a>( - ctx: &'a ExecContext, - arg0: &ValU32Struct, - arg1: &ValU32Struct, - layout2: BoundLayout<'a, CmpLessThanLayout, Val>, -) -> Result { - // SubU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:33) - // CmpLessThan(zirgen/circuit/rv32im/v2/dsl/u32.zir:133) - let x3: Val = ((arg0.low + Val::new(65536)) - arg1.low); - let x4: Val = ((arg0.high + Val::new(65535)) - arg1.high); - let x5: NormalizeU32Struct = exec_normalize_u32( - ctx, - &DenormedValU32Struct { low: x3, high: x4 }, - (layout2.map(|c| c.diff)), - )?; - // CmpLessThan(zirgen/circuit/rv32im/v2/dsl/u32.zir:134) - let x6: NondetRegStruct = exec_get_sign_u32(ctx, arg0, (layout2.map(|c| c.s1)))?; - // CmpLessThan(zirgen/circuit/rv32im/v2/dsl/u32.zir:135) - let x7: NondetRegStruct = exec_get_sign_u32(ctx, arg1, (layout2.map(|c| c.s2)))?; - // CmpLessThan(zirgen/circuit/rv32im/v2/dsl/u32.zir:136) - let x8: NondetRegStruct = exec_get_sign_u32(ctx, &x5._super, (layout2.map(|c| c.s3)))?; - // CmpLessThan(zirgen/circuit/rv32im/v2/dsl/u32.zir:135) - let x9: Val = x7._super; - // CmpLessThan(zirgen/circuit/rv32im/v2/dsl/u32.zir:134) - let x10: Val = x6._super; - // CmpLessThan(zirgen/circuit/rv32im/v2/dsl/u32.zir:136) - let x11: Val = x8._super; - // CmpLessThan(zirgen/circuit/rv32im/v2/dsl/u32.zir:138) - let x12: Val = ((x10 * (Val::new(1) - x9)) * (Val::new(1) - x11)); - let x13: Val = ((Val::new(1) - x10) * x9); - let x14: RegStruct = exec_reg(ctx, (x12 + (x13 * x11)), (layout2.map(|c| c.overflow)))?; - let x15: Val = x14._super._super; - // CmpLessThan(zirgen/circuit/rv32im/v2/dsl/u32.zir:140) - let x16: Val = ((x15 + x11) - ((x15 * Val::new(2)) * x11)); - let x17: RegStruct = exec_reg(ctx, x16, (layout2.map(|c| c.is_less_than)))?; - return Ok(CmpLessThanStruct { is_less_than: x17 }); -} -pub fn exec_to_bits_16_<'a>( - ctx: &'a ExecContext, - arg0: Val, - layout1: BoundLayout<'a, ToBits_16_Layout, Val>, -) -> Result { - // ToBits(zirgen/circuit/rv32im/v2/dsl/po2.zir:31) - let x2: NondetRegStruct16Array = map_layout( - [ - Val::new(0), - Val::new(1), - Val::new(2), - Val::new(3), - Val::new(4), - Val::new(5), - Val::new(6), - Val::new(7), - Val::new(8), - Val::new(9), - Val::new(10), - Val::new(11), - Val::new(12), - Val::new(13), - Val::new(14), - Val::new(15), - ], - (layout1.map(|c| c._super)), - |x3, x4| { - // Div(:16) - let x5: Val = inv_0( - [ - Val::new(1), - Val::new(2), - Val::new(4), - Val::new(8), - Val::new(16), - Val::new(32), - Val::new(64), - Val::new(128), - Val::new(256), - Val::new(512), - Val::new(1024), - Val::new(2048), - Val::new(4096), - Val::new(8192), - Val::new(16384), - Val::new(32768), - ][to_usize(x3)], - )?; - // Div(:17) - eqz!(((x5 * [Val::new(1), Val::new(2), Val::new(4), Val::new(8), Val::new(16), Val::new(32), Val::new(64), Val::new(128), Val::new(256), Val::new(512), Val::new(1024), Val::new(2048), Val::new(4096), Val::new(8192), Val::new(16384), Val::new(32768)][to_usize(x3)]) - Val::new(1)), "loc(callsite( Div ( :17:22) at ToBits ( zirgen/circuit/rv32im/v2/dsl/po2.zir :31:43)))"); - let x6: NondetRegStruct = exec_nondet_bit_reg( - ctx, - (x5 * bit_and( - arg0, - [ - Val::new(1), - Val::new(2), - Val::new(4), - Val::new(8), - Val::new(16), - Val::new(32), - Val::new(64), - Val::new(128), - Val::new(256), - Val::new(512), - Val::new(1024), - Val::new(2048), - Val::new(4096), - Val::new(8192), - Val::new(16384), - Val::new(32768), - ][to_usize(x3)], - )?), - x4, - )?; - return Ok(x6); - }, - )?; - return Ok(ToBits_16_Struct { _super: x2 }); -} -pub fn exec_bitwise_and_u16<'a>( - ctx: &'a ExecContext, - arg0: Val, - arg1: Val, - layout2: BoundLayout<'a, BitwiseAndU16Layout, Val>, -) -> Result { - // BitwiseAndU16(zirgen/circuit/rv32im/v2/dsl/u32.zir:144) - let x3: ToBits_16_Struct = exec_to_bits_16_(ctx, arg0, (layout2.map(|c| c.bits_x)))?; - let x4: NondetRegStruct16Array = x3._super; - let x5: Val = x4[to_usize(Val::new(0))]._super; - let x6: Val = x4[to_usize(Val::new(1))]._super; - let x7: Val = x4[to_usize(Val::new(2))]._super; - let x8: Val = x4[to_usize(Val::new(3))]._super; - let x9: Val = x4[to_usize(Val::new(4))]._super; - let x10: Val = x4[to_usize(Val::new(5))]._super; - let x11: Val = x4[to_usize(Val::new(6))]._super; - let x12: Val = x4[to_usize(Val::new(7))]._super; - let x13: Val = x4[to_usize(Val::new(8))]._super; - let x14: Val = x4[to_usize(Val::new(9))]._super; - let x15: Val = x4[to_usize(Val::new(10))]._super; - let x16: Val = x4[to_usize(Val::new(11))]._super; - let x17: Val = x4[to_usize(Val::new(12))]._super; - let x18: Val = x4[to_usize(Val::new(13))]._super; - let x19: Val = x4[to_usize(Val::new(14))]._super; - let x20: Val = x4[to_usize(Val::new(15))]._super; - // FromBits(zirgen/circuit/rv32im/v2/dsl/po2.zir:35) - // BitwiseAndU16(zirgen/circuit/rv32im/v2/dsl/u32.zir:145) - let x21: Val = (((x5 + (x6 * Val::new(2))) + (x7 * Val::new(4))) + (x8 * Val::new(8))); - let x22: Val = (((x21 + (x9 * Val::new(16))) + (x10 * Val::new(32))) + (x11 * Val::new(64))); - let x23: Val = - (((x22 + (x12 * Val::new(128))) + (x13 * Val::new(256))) + (x14 * Val::new(512))); - let x24: Val = - (((x23 + (x15 * Val::new(1024))) + (x16 * Val::new(2048))) + (x17 * Val::new(4096))); - let x25: Val = - (((x24 + (x18 * Val::new(8192))) + (x19 * Val::new(16384))) + (x20 * Val::new(32768))); - eqz!( - (arg0 - x25), - "BitwiseAndU16(zirgen/circuit/rv32im/v2/dsl/u32.zir:145)" - ); - // BitwiseAndU16(zirgen/circuit/rv32im/v2/dsl/u32.zir:146) - let x26: ToBits_16_Struct = exec_to_bits_16_(ctx, arg1, (layout2.map(|c| c.bits_y)))?; - let x27: NondetRegStruct16Array = x26._super; - let x28: Val = x27[to_usize(Val::new(0))]._super; - let x29: Val = x27[to_usize(Val::new(1))]._super; - let x30: Val = x27[to_usize(Val::new(2))]._super; - let x31: Val = x27[to_usize(Val::new(3))]._super; - let x32: Val = x27[to_usize(Val::new(4))]._super; - let x33: Val = x27[to_usize(Val::new(5))]._super; - let x34: Val = x27[to_usize(Val::new(6))]._super; - let x35: Val = x27[to_usize(Val::new(7))]._super; - let x36: Val = x27[to_usize(Val::new(8))]._super; - let x37: Val = x27[to_usize(Val::new(9))]._super; - let x38: Val = x27[to_usize(Val::new(10))]._super; - let x39: Val = x27[to_usize(Val::new(11))]._super; - let x40: Val = x27[to_usize(Val::new(12))]._super; - let x41: Val = x27[to_usize(Val::new(13))]._super; - let x42: Val = x27[to_usize(Val::new(14))]._super; - let x43: Val = x27[to_usize(Val::new(15))]._super; - // FromBits(zirgen/circuit/rv32im/v2/dsl/po2.zir:35) - // BitwiseAndU16(zirgen/circuit/rv32im/v2/dsl/u32.zir:147) - let x44: Val = (((x28 + (x29 * Val::new(2))) + (x30 * Val::new(4))) + (x31 * Val::new(8))); - let x45: Val = (((x44 + (x32 * Val::new(16))) + (x33 * Val::new(32))) + (x34 * Val::new(64))); - let x46: Val = - (((x45 + (x35 * Val::new(128))) + (x36 * Val::new(256))) + (x37 * Val::new(512))); - let x47: Val = - (((x46 + (x38 * Val::new(1024))) + (x39 * Val::new(2048))) + (x40 * Val::new(4096))); - let x48: Val = - (((x47 + (x41 * Val::new(8192))) + (x42 * Val::new(16384))) + (x43 * Val::new(32768))); - eqz!( - (arg1 - x48), - "BitwiseAndU16(zirgen/circuit/rv32im/v2/dsl/u32.zir:147)" - ); - // FromBits(zirgen/circuit/rv32im/v2/dsl/po2.zir:35) - // BitwiseAndU16(zirgen/circuit/rv32im/v2/dsl/u32.zir:149) - let x49: Val = ((x5 * x28) + ((x6 * x29) * Val::new(2))); - let x50: Val = ((x49 + ((x7 * x30) * Val::new(4))) + ((x8 * x31) * Val::new(8))); - let x51: Val = ((x50 + ((x9 * x32) * Val::new(16))) + ((x10 * x33) * Val::new(32))); - let x52: Val = ((x51 + ((x11 * x34) * Val::new(64))) + ((x12 * x35) * Val::new(128))); - let x53: Val = ((x52 + ((x13 * x36) * Val::new(256))) + ((x14 * x37) * Val::new(512))); - let x54: Val = ((x53 + ((x15 * x38) * Val::new(1024))) + ((x16 * x39) * Val::new(2048))); - let x55: Val = ((x54 + ((x17 * x40) * Val::new(4096))) + ((x18 * x41) * Val::new(8192))); - let x56: Val = ((x55 + ((x19 * x42) * Val::new(16384))) + ((x20 * x43) * Val::new(32768))); - return Ok(FromBits_16_Struct { _super: x56 }); -} -pub fn exec_bitwise_and<'a>( - ctx: &'a ExecContext, - arg0: &ValU32Struct, - arg1: &ValU32Struct, - layout2: BoundLayout<'a, BitwiseAndLayout, Val>, -) -> Result { - // BitwiseAnd(zirgen/circuit/rv32im/v2/dsl/u32.zir:155) - let x3: FromBits_16_Struct = - exec_bitwise_and_u16(ctx, arg0.low, arg1.low, (layout2.map(|c| c._0)))?; - let x4: FromBits_16_Struct = - exec_bitwise_and_u16(ctx, arg0.high, arg1.high, (layout2.map(|c| c._1)))?; - return Ok(ValU32Struct { - low: x3._super, - high: x4._super, - }); -} -pub fn exec_bitwise_or<'a>( - ctx: &'a ExecContext, - arg0: &ValU32Struct, - arg1: &ValU32Struct, - layout2: BoundLayout<'a, BitwiseOrLayout, Val>, -) -> Result { - // BitwiseOr(zirgen/circuit/rv32im/v2/dsl/u32.zir:159) - let x3: ValU32Struct = exec_bitwise_and(ctx, arg0, arg1, (layout2.map(|c| c.and_xy)))?; - // BitwiseOr(zirgen/circuit/rv32im/v2/dsl/u32.zir:160) - let x4: Val = ((arg0.low + arg1.low) - x3.low); - let x5: Val = ((arg0.high + arg1.high) - x3.high); - return Ok(ValU32Struct { low: x4, high: x5 }); -} -pub fn exec_bitwise_xor<'a>( - ctx: &'a ExecContext, - arg0: &ValU32Struct, - arg1: &ValU32Struct, - layout2: BoundLayout<'a, BitwiseXorLayout, Val>, -) -> Result { - // BitwiseXor(zirgen/circuit/rv32im/v2/dsl/u32.zir:164) - let x3: ValU32Struct = exec_bitwise_and(ctx, arg0, arg1, (layout2.map(|c| c.and_xy)))?; - // BitwiseXor(zirgen/circuit/rv32im/v2/dsl/u32.zir:165) - let x4: Val = ((arg0.low + arg1.low) - (x3.low * Val::new(2))); - let x5: Val = ((arg0.high + arg1.high) - (x3.high * Val::new(2))); - return Ok(ValU32Struct { low: x4, high: x5 }); -} -pub fn exec_decoder<'a>( - ctx: &'a ExecContext, - arg0: &ValU32Struct, - layout1: BoundLayout<'a, DecoderLayout, Val>, -) -> Result { - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:9) - let x2: Val = arg0.high; - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:15) - let x3: NondetRegStruct = exec_nondet_bit_reg( - ctx, - (bit_and(x2, Val::new(32768))? * Val::new(2013204481)), - (layout1.map(|c| c._f7_6)), - )?; - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:16) - let x4: NondetRegStruct = exec_nondet_twit_reg( - ctx, - (bit_and(x2, Val::new(24576))? * Val::new(2013020161)), - (layout1.map(|c| c._f7_45)), - )?; - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:17) - let x5: NondetRegStruct = exec_nondet_twit_reg( - ctx, - (bit_and(x2, Val::new(6144))? * Val::new(2012282881)), - (layout1.map(|c| c._f7_23)), - )?; - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:18) - let x6: NondetRegStruct = exec_nondet_twit_reg( - ctx, - (bit_and(x2, Val::new(1536))? * Val::new(2009333761)), - (layout1.map(|c| c._f7_01)), - )?; - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:19) - let x7: NondetRegStruct = exec_nondet_twit_reg( - ctx, - (bit_and(x2, Val::new(384))? * Val::new(1997537281)), - (layout1.map(|c| c._rs2_34)), - )?; - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:20) - let x8: NondetRegStruct = exec_nondet_twit_reg( - ctx, - (bit_and(x2, Val::new(96))? * Val::new(1950351361)), - (layout1.map(|c| c._rs2_12)), - )?; - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:21) - let x9: NondetRegStruct = exec_nondet_bit_reg( - ctx, - (bit_and(x2, Val::new(16))? * Val::new(1887436801)), - (layout1.map(|c| c._rs2_0)), - )?; - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:22) - let x10: NondetRegStruct = exec_nondet_twit_reg( - ctx, - (bit_and(x2, Val::new(12))? * Val::new(1509949441)), - (layout1.map(|c| c._rs1_34)), - )?; - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:23) - let x11: NondetRegStruct = - exec_nondet_twit_reg(ctx, bit_and(x2, Val::new(3))?, (layout1.map(|c| c._rs1_12)))?; - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:9) - let x12: Val = arg0.low; - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:24) - let x13: NondetRegStruct = exec_nondet_bit_reg( - ctx, - (bit_and(x12, Val::new(32768))? * Val::new(2013204481)), - (layout1.map(|c| c._rs1_0)), - )?; - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:25) - let x14: NondetRegStruct = exec_nondet_bit_reg( - ctx, - (bit_and(x12, Val::new(16384))? * Val::new(2013143041)), - (layout1.map(|c| c._f3_2)), - )?; - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:26) - let x15: NondetRegStruct = exec_nondet_twit_reg( - ctx, - (bit_and(x12, Val::new(12288))? * Val::new(2012774401)), - (layout1.map(|c| c._f3_01)), - )?; - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:27) - let x16: NondetRegStruct = exec_nondet_twit_reg( - ctx, - (bit_and(x12, Val::new(3072))? * Val::new(2011299841)), - (layout1.map(|c| c._rd_34)), - )?; - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:28) - let x17: NondetRegStruct = exec_nondet_twit_reg( - ctx, - (bit_and(x12, Val::new(768))? * Val::new(2005401601)), - (layout1.map(|c| c._rd_12)), - )?; - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:29) - let x18: NondetRegStruct = exec_nondet_twit_reg( - ctx, - (bit_and(x12, Val::new(128))? * Val::new(1997537281)), - (layout1.map(|c| c._rd_0)), - )?; - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:34) - let x19: NondetRegStruct = exec_nondet_reg( - ctx, - bit_and(x12, Val::new(127))?, - (layout1.map(|c| c.opcode)), - )?; - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:15) - let x20: Val = x3._super; - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:16) - let x21: Val = x4._super; - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:17) - let x22: Val = x5._super; - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:38) - let x23: Val = (((x20 * Val::new(32768)) + (x21 * Val::new(8192))) + (x22 * Val::new(2048))); - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:18) - let x24: Val = x6._super; - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:19) - let x25: Val = x7._super; - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:20) - let x26: Val = x8._super; - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:41) - let x27: Val = (((x23 + (x24 * Val::new(512))) + (x25 * Val::new(128))) + (x26 * Val::new(32))); - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:21) - let x28: Val = x9._super; - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:22) - let x29: Val = x10._super; - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:44) - let x30: Val = (x29 * Val::new(4)); - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:23) - let x31: Val = x11._super; - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:44) - let x32: Val = (((x27 + (x28 * Val::new(16))) + x30) + x31); - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:37) - eqz!( - (x2 - x32), - "Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:37)" - ); - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:24) - let x33: Val = x13._super; - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:46) - let x34: Val = (x33 * Val::new(32768)); - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:25) - let x35: Val = x14._super; - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:26) - let x36: Val = x15._super; - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:47) - let x37: Val = ((x34 + (x35 * Val::new(16384))) + (x36 * Val::new(4096))); - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:27) - let x38: Val = x16._super; - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:28) - let x39: Val = x17._super; - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:29) - let x40: Val = x18._super; - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:50) - let x41: Val = - (((x37 + (x38 * Val::new(1024))) + (x39 * Val::new(256))) + (x40 * Val::new(128))); - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:46) - eqz!( - (x12 - (x41 + x19._super)), - "Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:46)" - ); - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:55) - let x42: Val = (((x29 * Val::new(8)) + (x31 * Val::new(2))) + x33); - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:56) - let x43: Val = (x25 * Val::new(8)); - let x44: Val = (x26 * Val::new(2)); - let x45: Val = ((x43 + x44) + x28); - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:57) - let x46: Val = (x38 * Val::new(8)); - let x47: Val = (x39 * Val::new(2)); - let x48: Val = ((x46 + x47) + x40); - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:58) - let x49: Val = (((x21 * Val::new(16)) + (x22 * Val::new(4))) + x24); - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:59) - let x50: Val = ((x20 * Val::new(64)) + x49); - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:60) - let x51: Val = ((x35 * Val::new(4)) + x36); - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:66) - let x52: Val = (x20 * Val::new(61440)); - let x53: Val = (x52 + (x50 * Val::new(32))); - let x54: Val = (x20 * Val::new(65535)); - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:68) - let x55: Val = (x49 * Val::new(32)); - let x56: Val = (((x52 + (x40 * Val::new(2048))) + x55) + x46); - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:71) - let x57: Val = (((x34 + (x51 * Val::new(4096))) + (x28 * Val::new(2048))) + x55); - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:72) - let x58: Val = (((x20 * Val::new(65520)) + x30) + x31); - // ValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:10) - // Decoder(zirgen/circuit/rv32im/v2/dsl/decode.zir:70) - let x59: ValU32Struct = ValU32Struct { - low: ((x57 + x43) + x44), - high: x58, - }; - return Ok(DecoderStruct { - opcode: x19, - rs1: x42, - rs2: x45, - rd: x48, - func7: x50, - func3: x51, - imm_i: ValU32Struct { - low: (x53 + x45), - high: x54, - }, - imm_s: ValU32Struct { - low: (x53 + x48), - high: x54, - }, - imm_b: ValU32Struct { - low: (x56 + x47), - high: x54, - }, - imm_u: ValU32Struct { low: x37, high: x2 }, - imm_j: x59, - }); -} -pub fn exec_memory_arg<'a>( - ctx: &'a ExecContext, - arg0: Val, - arg1: Val, - arg2: Val, - arg3: &ValU32Struct, - layout4: BoundLayout<'a, MemoryArgLayout, Val>, -) -> Result { - // MemoryArg(zirgen/circuit/rv32im/v2/dsl/mem.zir:25) - let x5: NondetRegStruct = exec_nondet_reg(ctx, arg0, (layout4.map(|c| c.count)))?; - // MemoryArg(zirgen/circuit/rv32im/v2/dsl/mem.zir:26) - let x6: NondetRegStruct = exec_nondet_reg(ctx, arg1, (layout4.map(|c| c.addr)))?; - // MemoryArg(zirgen/circuit/rv32im/v2/dsl/mem.zir:27) - let x7: NondetRegStruct = exec_nondet_reg(ctx, arg2, (layout4.map(|c| c.cycle)))?; - // MemoryArg(zirgen/circuit/rv32im/v2/dsl/mem.zir:28) - let x8: NondetRegStruct = exec_nondet_reg(ctx, arg3.low, (layout4.map(|c| c.data_low)))?; - // MemoryArg(zirgen/circuit/rv32im/v2/dsl/mem.zir:29) - let x9: NondetRegStruct = exec_nondet_reg(ctx, arg3.high, (layout4.map(|c| c.data_high)))?; - // MemoryDelta(zirgen/circuit/rv32im/v2/dsl/mem.zir:21) - // MemoryArg(zirgen/circuit/rv32im/v2/dsl/mem.zir:30) - invoke_extern!( - ctx, - memory_delta, - x6._super, - x7._super, - x8._super, - x9._super, - x5._super - ); - return Ok(MemoryArgStruct { - count: x5, - addr: x6, - cycle: x7, - data_low: x8, - data_high: x9, - }); -} -pub fn exec_cycle_arg<'a>( - ctx: &'a ExecContext, - arg0: Val, - arg1: Val, - layout2: BoundLayout<'a, CycleArgLayout, Val>, -) -> Result { - // CycleArg(zirgen/circuit/rv32im/v2/dsl/mem.zir:54) - let x3: NondetRegStruct = exec_nondet_reg(ctx, arg0, (layout2.map(|c| c.count)))?; - // CycleArg(zirgen/circuit/rv32im/v2/dsl/mem.zir:55) - let x4: NondetRegStruct = exec_nondet_reg(ctx, arg1, (layout2.map(|c| c.cycle)))?; - // LookupDelta(zirgen/circuit/rv32im/v2/dsl/lookups.zir:4) - // CycleArg(zirgen/circuit/rv32im/v2/dsl/mem.zir:56) - invoke_extern!(ctx, lookup_delta, Val::new(0), x4._super, x3._super); - return Ok(CycleArgStruct { - count: x3, - cycle: x4, - }); -} -pub fn exec_is_cycle<'a>( - ctx: &'a ExecContext, - arg0: Val, - layout1: BoundLayout<'a, IsCycleLayout, Val>, -) -> Result { - // IsCycle(zirgen/circuit/rv32im/v2/dsl/mem.zir:60) - let x2: CycleArgStruct = exec_cycle_arg(ctx, Val::new(1), arg0, (layout1.map(|c| c.arg)))?; - // IsCycle(zirgen/circuit/rv32im/v2/dsl/mem.zir:61) - let x3: Val = (x2.count._super - Val::new(1)); - eqz!(x3, "IsCycle(zirgen/circuit/rv32im/v2/dsl/mem.zir:61)"); - // IsCycle(zirgen/circuit/rv32im/v2/dsl/mem.zir:62) - let x4: Val = (x2.cycle._super - arg0); - eqz!(x4, "IsCycle(zirgen/circuit/rv32im/v2/dsl/mem.zir:62)"); - return Ok(IsCycleStruct {}); -} -pub fn exec_memory_io<'a>( - ctx: &'a ExecContext, - arg0: &RegStruct, - arg1: Val, - layout2: BoundLayout<'a, MemoryIOLayout, Val>, -) -> Result { - // GetMemoryTxn(zirgen/circuit/rv32im/v2/dsl/mem.zir:51) - // MemoryIO(zirgen/circuit/rv32im/v2/dsl/mem.zir:66) - let (x3, x4, x5, x6, x7) = invoke_extern!(ctx, get_memory_txn, arg1); - // MemoryIO(zirgen/circuit/rv32im/v2/dsl/mem.zir:67) - let x8: MemoryArgStruct = exec_memory_arg( - ctx, - Val::new(2013265920), - arg1, - x3, - &ValU32Struct { low: x4, high: x5 }, - (layout2.map(|c| c.old_txn)), - )?; - // MemoryIO(zirgen/circuit/rv32im/v2/dsl/mem.zir:65) - let x9: Val = arg0._super._super; - // MemoryIO(zirgen/circuit/rv32im/v2/dsl/mem.zir:68) - let x10: MemoryArgStruct = exec_memory_arg( - ctx, - Val::new(1), - arg1, - x9, - &ValU32Struct { low: x6, high: x7 }, - (layout2.map(|c| c.new_txn)), - )?; - // MemoryIO(zirgen/circuit/rv32im/v2/dsl/mem.zir:69) - let x11: Val = (x8.count._super - Val::new(2013265920)); - eqz!(x11, "MemoryIO(zirgen/circuit/rv32im/v2/dsl/mem.zir:69)"); - // MemoryIO(zirgen/circuit/rv32im/v2/dsl/mem.zir:70) - let x12: Val = (x10.count._super - Val::new(1)); - eqz!(x12, "MemoryIO(zirgen/circuit/rv32im/v2/dsl/mem.zir:70)"); - // MemoryIO(zirgen/circuit/rv32im/v2/dsl/mem.zir:72) - let x13: Val = (x10.cycle._super - x9); - eqz!(x13, "MemoryIO(zirgen/circuit/rv32im/v2/dsl/mem.zir:72)"); - // MemoryIO(zirgen/circuit/rv32im/v2/dsl/mem.zir:68) - let x14: Val = x10.addr._super; - // MemoryIO(zirgen/circuit/rv32im/v2/dsl/mem.zir:74) - let x15: Val = (x8.addr._super - x14); - eqz!(x15, "MemoryIO(zirgen/circuit/rv32im/v2/dsl/mem.zir:74)"); - // MemoryIO(zirgen/circuit/rv32im/v2/dsl/mem.zir:75) - eqz!( - (x14 - arg1), - "MemoryIO(zirgen/circuit/rv32im/v2/dsl/mem.zir:75)" - ); - return Ok(MemoryIOStruct { - old_txn: x8, - new_txn: x10, - }); -} -pub fn exec_is_forward<'a>( - ctx: &'a ExecContext, - arg0: &MemoryIOStruct, - layout1: BoundLayout<'a, IsForwardLayout, Val>, -) -> Result { - // IsForward(zirgen/circuit/rv32im/v2/dsl/mem.zir:83) - let x2: Val = arg0.new_txn.cycle._super; - let x3: Val = arg0.old_txn.cycle._super; - // IsForward(zirgen/circuit/rv32im/v2/dsl/mem.zir:84) - let x4: IsCycleStruct = exec_is_cycle(ctx, (x2 - x3), (layout1.map(|c| c._0)))?; - return Ok(IsForwardStruct {}); -} -pub fn exec_memory_read<'a>( - ctx: &'a ExecContext, - arg0: &RegStruct, - arg1: Val, - layout2: BoundLayout<'a, MemoryReadLayout, Val>, -) -> Result { - // MemoryRead(zirgen/circuit/rv32im/v2/dsl/mem.zir:89) - let x3: MemoryIOStruct = exec_memory_io(ctx, arg0, arg1, (layout2.map(|c| c.io)))?; - // IsRead(zirgen/circuit/rv32im/v2/dsl/mem.zir:78) - // MemoryRead(zirgen/circuit/rv32im/v2/dsl/mem.zir:90) - let x4: MemoryArgStruct = x3.old_txn; - let x5: MemoryArgStruct = x3.new_txn; - let x6: Val = x5.data_low._super; - // IsRead(zirgen/circuit/rv32im/v2/dsl/mem.zir:79) - let x7: Val = (x4.data_low._super - x6); - eqz!(x7, "loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10)))"); - // IsRead(zirgen/circuit/rv32im/v2/dsl/mem.zir:78) - let x8: Val = x5.data_high._super; - // IsRead(zirgen/circuit/rv32im/v2/dsl/mem.zir:80) - let x9: Val = (x4.data_high._super - x8); - eqz!(x9, "loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at MemoryRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :90:10)))"); - // MemoryRead(zirgen/circuit/rv32im/v2/dsl/mem.zir:91) - let x10: IsForwardStruct = exec_is_forward(ctx, &x3, (layout2.map(|c| c._0)))?; - return Ok(GetDataStruct { - _super: ValU32Struct { low: x6, high: x8 }, - diff_low: Val::new(0), - diff_high: Val::new(1), - }); -} -pub fn exec_memory_write<'a>( - ctx: &'a ExecContext, - arg0: &RegStruct, - arg1: Val, - arg2: &ValU32Struct, - layout3: BoundLayout<'a, MemoryWriteLayout, Val>, -) -> Result { - // MemoryWrite(zirgen/circuit/rv32im/v2/dsl/mem.zir:97) - let x4: MemoryIOStruct = exec_memory_io(ctx, arg0, arg1, (layout3.map(|c| c.io)))?; - // MemoryWrite(zirgen/circuit/rv32im/v2/dsl/mem.zir:98) - let x5: IsForwardStruct = exec_is_forward(ctx, &x4, (layout3.map(|c| c._0)))?; - // MemoryWrite(zirgen/circuit/rv32im/v2/dsl/mem.zir:97) - let x6: MemoryArgStruct = x4.new_txn; - // MemoryWrite(zirgen/circuit/rv32im/v2/dsl/mem.zir:99) - let x7: Val = (x6.data_low._super - arg2.low); - eqz!(x7, "MemoryWrite(zirgen/circuit/rv32im/v2/dsl/mem.zir:99)"); - // MemoryWrite(zirgen/circuit/rv32im/v2/dsl/mem.zir:100) - let x8: Val = (x6.data_high._super - arg2.high); - eqz!(x8, "MemoryWrite(zirgen/circuit/rv32im/v2/dsl/mem.zir:100)"); - return Ok(MemoryWriteStruct {}); -} -pub fn exec_memory_write_unconstrained<'a>( - ctx: &'a ExecContext, - arg0: &RegStruct, - arg1: Val, - layout2: BoundLayout<'a, MemoryWriteUnconstrainedLayout, Val>, -) -> Result { - // MemoryWriteUnconstrained(zirgen/circuit/rv32im/v2/dsl/mem.zir:105) - let x3: MemoryIOStruct = exec_memory_io(ctx, arg0, arg1, (layout2.map(|c| c.io)))?; - // MemoryWriteUnconstrained(zirgen/circuit/rv32im/v2/dsl/mem.zir:106) - let x4: IsForwardStruct = exec_is_forward(ctx, &x3, (layout2.map(|c| c._0)))?; - return Ok(MemoryWriteUnconstrainedStruct {}); -} -pub fn exec_memory_page_in<'a>( - ctx: &'a ExecContext, - arg0: &RegStruct, - arg1: Val, - layout2: BoundLayout<'a, MemoryPageInLayout, Val>, -) -> Result { - // MemoryPageIn(zirgen/circuit/rv32im/v2/dsl/mem.zir:112) - let x3: MemoryIOStruct = exec_memory_io(ctx, arg0, arg1, (layout2.map(|c| c.io)))?; - // IsRead(zirgen/circuit/rv32im/v2/dsl/mem.zir:78) - // MemoryPageIn(zirgen/circuit/rv32im/v2/dsl/mem.zir:113) - let x4: MemoryArgStruct = x3.old_txn; - let x5: MemoryArgStruct = x3.new_txn; - let x6: Val = x5.data_low._super; - // IsRead(zirgen/circuit/rv32im/v2/dsl/mem.zir:79) - let x7: Val = (x4.data_low._super - x6); - eqz!(x7, "loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :79:22) at MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10)))"); - // IsRead(zirgen/circuit/rv32im/v2/dsl/mem.zir:78) - let x8: Val = x5.data_high._super; - // IsRead(zirgen/circuit/rv32im/v2/dsl/mem.zir:80) - let x9: Val = (x4.data_high._super - x8); - eqz!(x9, "loc(callsite( IsRead ( zirgen/circuit/rv32im/v2/dsl/mem.zir :80:23) at MemoryPageIn ( zirgen/circuit/rv32im/v2/dsl/mem.zir :113:10)))"); - // MemoryPageIn(zirgen/circuit/rv32im/v2/dsl/mem.zir:114) - let x10: Val = (x5.cycle._super - x4.cycle._super); - return Ok(GetDataStruct { - _super: ValU32Struct { low: x6, high: x8 }, - diff_low: Val::new(0), - diff_high: x10, - }); -} -pub fn exec_memory_page_out<'a>( - ctx: &'a ExecContext, - arg0: &RegStruct, - arg1: Val, - layout2: BoundLayout<'a, MemoryPageOutLayout, Val>, -) -> Result { - // MemoryPageOut(zirgen/circuit/rv32im/v2/dsl/mem.zir:120) - let x3: MemoryIOStruct = exec_memory_io(ctx, arg0, arg1, (layout2.map(|c| c.io)))?; - // MemoryPageOut(zirgen/circuit/rv32im/v2/dsl/mem.zir:121) - let x4: IsForwardStruct = exec_is_forward(ctx, &x3, (layout2.map(|c| c._0)))?; - // MemoryPageOut(zirgen/circuit/rv32im/v2/dsl/mem.zir:120) - let x5: MemoryArgStruct = x3.old_txn; - let x6: MemoryArgStruct = x3.new_txn; - let x7: Val = x5.data_low._super; - // MemoryPageOut(zirgen/circuit/rv32im/v2/dsl/mem.zir:122) - let x8: Val = (x6.data_low._super - x7); - // MemoryPageOut(zirgen/circuit/rv32im/v2/dsl/mem.zir:120) - let x9: Val = x5.data_high._super; - // MemoryPageOut(zirgen/circuit/rv32im/v2/dsl/mem.zir:123) - let x10: Val = (x6.data_high._super - x9); - return Ok(GetDataStruct { - _super: ValU32Struct { low: x7, high: x9 }, - diff_low: x8, - diff_high: x10, - }); -} -pub fn exec_one_hot_3_<'a>( - ctx: &'a ExecContext, - arg0: Val, - layout1: BoundLayout<'a, OneHot_3_Layout, Val>, -) -> Result { - // OneHot(zirgen/circuit/rv32im/v2/dsl/one_hot.zir:7) - let x2: NondetRegStruct3Array = map_layout( - [Val::new(0), Val::new(1), Val::new(2)], - (layout1.map(|c| c._super)), - |x3, x4| { - let x5: NondetRegStruct = exec_nondet_bit_reg(ctx, isz((x3 - arg0))?, x4)?; - return Ok(x5); - }, - )?; - // OneHot(zirgen/circuit/rv32im/v2/dsl/one_hot.zir:9) - let x6: Val = x2[to_usize(Val::new(1))]._super; - let x7: Val = (x2[to_usize(Val::new(0))]._super + x6); - let x8: Val = x2[to_usize(Val::new(2))]._super; - eqz!( - ((x7 + x8) - Val::new(1)), - "OneHot(zirgen/circuit/rv32im/v2/dsl/one_hot.zir:9)" - ); - // OneHot(zirgen/circuit/rv32im/v2/dsl/one_hot.zir:11) - eqz!( - ((x6 + (x8 * Val::new(2))) - arg0), - "OneHot(zirgen/circuit/rv32im/v2/dsl/one_hot.zir:11)" - ); - return Ok(OneHot_3_Struct { _super: x2 }); -} -pub fn exec_memory_get<'a>( - ctx: &'a ExecContext, - arg0: &RegStruct, - arg1: Val, - arg2: &OneHot_3_Struct, - layout3: BoundLayout<'a, MemoryGetLayout, Val>, -) -> Result { - // MemoryGet(zirgen/circuit/rv32im/v2/dsl/mem.zir:128) - let x4: BoundLayout = (layout3.map(|c| c._super)); - // MemoryGet(zirgen/circuit/rv32im/v2/dsl/mem.zir:127) - let x5: NondetRegStruct3Array = arg2._super; - // MemoryGet(zirgen/circuit/rv32im/v2/dsl/mem.zir:128) - let x6: BoundLayout = (x4.map(|c| c.arm1)); - let x7: BoundLayout = (((x6.map(|c| c._extra0)).map(|c| c.count)).map(|c| c._super)); - let x8: GetDataStruct; - if is_true(x5[to_usize(Val::new(0))]._super) { - // MemoryGet(zirgen/circuit/rv32im/v2/dsl/mem.zir:129) - let x9: GetDataStruct = exec_memory_read(ctx, arg0, arg1, (x4.map(|c| c.arm0)))?; - x8 = x9; - } else if is_true(x5[to_usize(Val::new(1))]._super) { - // MemoryGet(zirgen/circuit/rv32im/v2/dsl/mem.zir:130) - let x10: GetDataStruct = exec_memory_page_in(ctx, arg0, arg1, (x6.map(|c| c._super)))?; - // MemoryGet(zirgen/circuit/rv32im/v2/dsl/mem.zir:128) - x7.store(ctx, Val::new(0)); - eqz!( - x7.load(ctx, 0), - "MemoryGet(zirgen/circuit/rv32im/v2/dsl/mem.zir:128)" - ); - x8 = x10; - } else if is_true(x5[to_usize(Val::new(2))]._super) { - // MemoryGet(zirgen/circuit/rv32im/v2/dsl/mem.zir:131) - let x11: GetDataStruct = exec_memory_page_out(ctx, arg0, arg1, (x4.map(|c| c.arm2)))?; - x8 = x11; - } else { - bail!("Reached unreachable mux arm") - } - return Ok(x8); -} -pub fn exec_one_hot_8_<'a>( - ctx: &'a ExecContext, - arg0: Val, - layout1: BoundLayout<'a, OneHot_8_Layout, Val>, -) -> Result { - // OneHot(zirgen/circuit/rv32im/v2/dsl/one_hot.zir:7) - let x2: NondetRegStruct8Array = map_layout( - [ - Val::new(0), - Val::new(1), - Val::new(2), - Val::new(3), - Val::new(4), - Val::new(5), - Val::new(6), - Val::new(7), - ], - (layout1.map(|c| c._super)), - |x3, x4| { - let x5: NondetRegStruct = exec_nondet_bit_reg(ctx, isz((x3 - arg0))?, x4)?; - return Ok(x5); - }, - )?; - // OneHot(zirgen/circuit/rv32im/v2/dsl/one_hot.zir:9) - let x6: Val = x2[to_usize(Val::new(1))]._super; - let x7: Val = (x2[to_usize(Val::new(0))]._super + x6); - let x8: Val = x2[to_usize(Val::new(2))]._super; - let x9: Val = x2[to_usize(Val::new(3))]._super; - let x10: Val = x2[to_usize(Val::new(4))]._super; - let x11: Val = (((x7 + x8) + x9) + x10); - let x12: Val = x2[to_usize(Val::new(5))]._super; - let x13: Val = x2[to_usize(Val::new(6))]._super; - let x14: Val = x2[to_usize(Val::new(7))]._super; - let x15: Val = (((x11 + x12) + x13) + x14); - eqz!( - (x15 - Val::new(1)), - "OneHot(zirgen/circuit/rv32im/v2/dsl/one_hot.zir:9)" - ); - // OneHot(zirgen/circuit/rv32im/v2/dsl/one_hot.zir:11) - let x16: Val = (((x6 + (x8 * Val::new(2))) + (x9 * Val::new(3))) + (x10 * Val::new(4))); - let x17: Val = (((x16 + (x12 * Val::new(5))) + (x13 * Val::new(6))) + (x14 * Val::new(7))); - eqz!( - (x17 - arg0), - "OneHot(zirgen/circuit/rv32im/v2/dsl/one_hot.zir:11)" - ); - return Ok(OneHot_8_Struct { - _super: x2.clone(), - bits: x2, - }); -} -pub fn exec_inst_input<'a>( - ctx: &'a ExecContext, - arg0: Val, - arg1: Val, - arg2: Val, - arg3: &ValU32Struct, - arg4: Val, - arg5: Val, - layout6: BoundLayout<'a, InstInputLayout, Val>, -) -> Result { - // InstInput(zirgen/circuit/rv32im/v2/dsl/inst.zir:15) - let x7: OneHot_8_Struct = exec_one_hot_8_(ctx, arg2, (layout6.map(|c| c.minor_onehot)))?; - return Ok(InstInputStruct { - pc_u32: arg3.clone(), - state: arg4, - mode: arg5, - minor_onehot: x7, - }); -} -pub fn exec_decode_inst<'a>( - ctx: &'a ExecContext, - arg0: &RegStruct, - arg1: &InstInputStruct, - layout2: BoundLayout<'a, DecodeInstLayout, Val>, -) -> Result { - // DecodeInst(zirgen/circuit/rv32im/v2/dsl/inst.zir:18) - let x3: Val = arg0._super._super; - // GetDiffCount(zirgen/circuit/rv32im/v2/dsl/mem.zir:22) - // DecodeInst(zirgen/circuit/rv32im/v2/dsl/inst.zir:20) - let x4: Val = invoke_extern!(ctx, get_diff_count, x3); - let x5: CycleArgStruct = exec_cycle_arg(ctx, neg_0(x4)?, x3, (layout2.map(|c| c.arg)))?; - // DecodeInst(zirgen/circuit/rv32im/v2/dsl/inst.zir:22) - let x6: Val = (x5.cycle._super - x3); - eqz!(x6, "DecodeInst(zirgen/circuit/rv32im/v2/dsl/inst.zir:22)"); - // DecodeInst(zirgen/circuit/rv32im/v2/dsl/inst.zir:24) - let x7: AddrDecomposeStruct = - exec_addr_decompose(ctx, &arg1.pc_u32, arg1.mode, (layout2.map(|c| c.pc_addr)))?; - // DecodeInst(zirgen/circuit/rv32im/v2/dsl/inst.zir:26) - eqz!( - x7.low2._super, - "DecodeInst(zirgen/circuit/rv32im/v2/dsl/inst.zir:26)" - ); - // DecodeInst(zirgen/circuit/rv32im/v2/dsl/inst.zir:28) - let x8: GetDataStruct = exec_memory_read(ctx, arg0, x7._super, (layout2.map(|c| c.load_inst)))?; - // DecodeInst(zirgen/circuit/rv32im/v2/dsl/inst.zir:30) - let x9: DecoderStruct = exec_decoder(ctx, &x8._super, (layout2.map(|c| c._super)))?; - return Ok(x9); -} -pub fn exec_read_reg<'a>( - ctx: &'a ExecContext, - arg0: &RegStruct, - arg1: &InstInputStruct, - arg2: Val, - layout3: BoundLayout<'a, ReadRegLayout, Val>, -) -> Result { - // ReadReg(zirgen/circuit/rv32im/v2/dsl/inst.zir:33) - let x4: Val = arg1.mode; - // ReadReg(zirgen/circuit/rv32im/v2/dsl/inst.zir:34) - let x5: Val = ((Val::new(1) - x4) * Val::new(1073725472)); - let x6: Val = (((x4 * Val::new(1073725440)) + x5) + arg2); - let x7: RegStruct = exec_reg(ctx, x6, (layout3.map(|c| c.addr)))?; - // ReadReg(zirgen/circuit/rv32im/v2/dsl/inst.zir:35) - let x8: GetDataStruct = - exec_memory_read(ctx, arg0, x7._super._super, (layout3.map(|c| c._super)))?; - return Ok(x8); -} -pub fn exec_write_rd<'a>( - ctx: &'a ExecContext, - arg0: &RegStruct, - arg1: &InstInputStruct, - arg2: &DecoderStruct, - arg3: Val, - arg4: &ValU32Struct, - layout5: BoundLayout<'a, WriteRdLayout, Val>, -) -> Result { - // WriteRd(zirgen/circuit/rv32im/v2/dsl/inst.zir:38) - let x6: Val = arg2.rd; - // WriteRd(zirgen/circuit/rv32im/v2/dsl/inst.zir:39) - let x7: NondetRegStruct = exec_is_zero(ctx, x6, (layout5.map(|c| c.is_rd0)))?; - // WriteRd(zirgen/circuit/rv32im/v2/dsl/inst.zir:40) - let x8: Val = ((Val::new(1) - x7._super) * arg3); - // WriteRd(zirgen/circuit/rv32im/v2/dsl/inst.zir:38) - let x9: Val = arg1.mode; - // WriteRd(zirgen/circuit/rv32im/v2/dsl/inst.zir:42) - let x10: Val = ((Val::new(1) - x9) * Val::new(1073725472)); - let x11: Val = ((Val::new(1) - x8) * Val::new(64)); - let x12: Val = (((x9 * Val::new(1073725440)) + x10) + x11); - let x13: RegStruct = exec_reg(ctx, (x12 + (x8 * x6)), (layout5.map(|c| c.write_addr)))?; - // WriteRd(zirgen/circuit/rv32im/v2/dsl/inst.zir:43) - let x14: MemoryWriteStruct = - exec_memory_write(ctx, arg0, x13._super._super, arg4, (layout5.map(|c| c._0)))?; - return Ok(WriteRdStruct {}); -} -pub fn exec_expand_u32<'a>( - ctx: &'a ExecContext, - arg0: &ValU32Struct, - arg1: Val, - layout2: BoundLayout<'a, ExpandU32Layout, Val>, -) -> Result { - // ExpandU32(zirgen/circuit/rv32im/v2/dsl/mult.zir:49) - let x3: Val = arg0.low; - // ExpandU32(zirgen/circuit/rv32im/v2/dsl/mult.zir:50) - let x4: NondetRegStruct = - exec_nondet_u8_reg(ctx, bit_and(x3, Val::new(255))?, (layout2.map(|c| c.b0)))?; - // ExpandU32(zirgen/circuit/rv32im/v2/dsl/mult.zir:51) - let x5: NondetRegStruct = exec_nondet_u8_reg( - ctx, - (bit_and(x3, Val::new(65280))? * Val::new(2005401601)), - (layout2.map(|c| c.b1)), - )?; - // ExpandU32(zirgen/circuit/rv32im/v2/dsl/mult.zir:49) - let x6: Val = arg0.high; - // ExpandU32(zirgen/circuit/rv32im/v2/dsl/mult.zir:52) - let x7: NondetRegStruct = - exec_nondet_u8_reg(ctx, bit_and(x6, Val::new(255))?, (layout2.map(|c| c.b2)))?; - // ExpandU32(zirgen/circuit/rv32im/v2/dsl/mult.zir:53) - let x8: NondetRegStruct = exec_nondet_u8_reg( - ctx, - (bit_and(x6, Val::new(65280))? * Val::new(2005401601)), - (layout2.map(|c| c.b3)), - )?; - // ExpandU32(zirgen/circuit/rv32im/v2/dsl/mult.zir:59) - let x9: NondetRegStruct = exec_nondet_u8_reg( - ctx, - (bit_and(x6, Val::new(32512))? * Val::new(1997537281)), - (layout2.map(|c| c.b3_top7times2)), - )?; - // ExpandU32(zirgen/circuit/rv32im/v2/dsl/mult.zir:60) - let x10: NondetRegStruct = exec_nondet_bit_reg( - ctx, - (bit_and(x6, Val::new(32768))? * Val::new(2013204481)), - (layout2.map(|c| c.top_bit)), - )?; - // ExpandU32(zirgen/circuit/rv32im/v2/dsl/mult.zir:62) - let x11: Val = (x4._super + (x5._super * Val::new(256))); - eqz!( - (x3 - x11), - "ExpandU32(zirgen/circuit/rv32im/v2/dsl/mult.zir:62)" - ); - // ExpandU32(zirgen/circuit/rv32im/v2/dsl/mult.zir:59) - let x12: Val = x9._super; - // ExpandU32(zirgen/circuit/rv32im/v2/dsl/mult.zir:60) - let x13: Val = x10._super; - // ExpandU32(zirgen/circuit/rv32im/v2/dsl/mult.zir:63) - let x14: Val = ((x7._super + (x12 * Val::new(128))) + (x13 * Val::new(32768))); - eqz!( - (x6 - x14), - "ExpandU32(zirgen/circuit/rv32im/v2/dsl/mult.zir:63)" - ); - // ExpandU32(zirgen/circuit/rv32im/v2/dsl/mult.zir:67) - let x15: Val = (x8._super - ((x12 * Val::new(1006632961)) + (x13 * Val::new(128)))); - eqz!(x15, "ExpandU32(zirgen/circuit/rv32im/v2/dsl/mult.zir:67)"); - return Ok(ExpandU32Struct { - b0: x4, - b1: x5, - b2: x7, - b3: x8, - neg: (x13 * arg1), - }); -} -pub fn exec_split_total<'a>( - ctx: &'a ExecContext, - arg0: Val, - layout1: BoundLayout<'a, SplitTotalLayout, Val>, -) -> Result { - // SplitTotal(zirgen/circuit/rv32im/v2/dsl/mult.zir:97) - let x2: NondetRegStruct = exec_nondet_u16_reg( - ctx, - bit_and(arg0, Val::new(65535))?, - (layout1.map(|c| c.out)), - )?; - // SplitTotal(zirgen/circuit/rv32im/v2/dsl/mult.zir:98) - let x3: NondetRegStruct = exec_nondet_u8_reg( - ctx, - (bit_and(arg0, Val::new(16711680))? * Val::new(2013235201)), - (layout1.map(|c| c.carry_byte)), - )?; - // SplitTotal(zirgen/circuit/rv32im/v2/dsl/mult.zir:99) - let x4: NondetFakeTwitRegStruct = exec_nondet_fake_twit_reg( - ctx, - (bit_and(arg0, Val::new(251658240))? * Val::new(2013265801)), - (layout1.map(|c| c.carry_extra)), - )?; - let x5: Val = x4._super; - // SplitTotal(zirgen/circuit/rv32im/v2/dsl/mult.zir:98) - let x6: Val = x3._super; - // SplitTotal(zirgen/circuit/rv32im/v2/dsl/mult.zir:100) - let x7: Val = (((x5 * Val::new(16777216)) + (x6 * Val::new(65536))) + x2._super); - eqz!( - (arg0 - x7), - "SplitTotal(zirgen/circuit/rv32im/v2/dsl/mult.zir:100)" - ); - return Ok(SplitTotalStruct { - out: x2, - carry: ((x5 * Val::new(256)) + x6), - }); -} -pub fn exec_multiply_accumulate<'a>( - ctx: &'a ExecContext, - arg0: &ValU32Struct, - arg1: &ValU32Struct, - arg2: &ValU32Struct, - arg3: &MultiplySettingsStruct, - layout4: BoundLayout<'a, MultiplyAccumulateLayout, Val>, -) -> Result { - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:115) - let x5: ExpandU32Struct = exec_expand_u32(ctx, arg0, arg3.a_signed, (layout4.map(|c| c.ax)))?; - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:116) - let x6: ExpandU32Struct = exec_expand_u32(ctx, arg1, arg3.b_signed, (layout4.map(|c| c.bx)))?; - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:113) - let x7: Val = arg2.high; - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:118) - let x8: NondetRegStruct = exec_nondet_bit_reg( - ctx, - (bit_and(x7, Val::new(32768))? * Val::new(2013204481)), - (layout4.map(|c| c.c_sign)), - )?; - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:119) - let x9: NondetRegStruct = exec_nondet_u16_reg( - ctx, - (bit_and(x7, Val::new(32767))? * Val::new(2)), - (layout4.map(|c| c.c_rest_times2)), - )?; - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:118) - let x10: Val = x8._super; - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:120) - let x11: Val = ((x10 * Val::new(32768)) + (x9._super * Val::new(1006632961))); - eqz!( - (x7 - x11), - "MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:120)" - ); - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:115) - let x12: Val = x5.b0._super; - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:116) - let x13: Val = x6.b0._super; - let x14: Val = x6.b1._super; - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:115) - let x15: Val = x5.b1._super; - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:125) - let x16: Val = (((x12 * x14) + (x15 * x13)) * Val::new(256)); - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:124) - let x17: Val = ((arg2.low + (x12 * x13)) + x16); - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:122) - let x18: SplitTotalStruct = exec_split_total(ctx, x17, (layout4.map(|c| c.s0)))?; - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:116) - let x19: Val = x6.b2._super; - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:131) - let x20: Val = (((x7 + x18.carry) + (x12 * x19)) + (x15 * x14)); - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:115) - let x21: Val = x5.b2._super; - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:116) - let x22: Val = x6.b3._super; - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:132) - let x23: Val = (((x12 * x22) + (x15 * x19)) + (x21 * x14)); - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:115) - let x24: Val = x5.b3._super; - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:131) - let x25: Val = ((x20 + (x21 * x13)) + ((x23 + (x24 * x13)) * Val::new(256))); - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:128) - let x26: SplitTotalStruct = exec_split_total(ctx, x25, (layout4.map(|c| c.s1)))?; - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:138) - let x27: Val = ((x10 * Val::new(65535)) * arg3.c_signed); - let x28: Val = ((x26.carry + x27) + Val::new(131072)); - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:116) - let x29: Val = x6.neg; - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:115) - let x30: Val = x5.neg; - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:139) - let x31: Val = - ((x28 - ((x12 + (x15 * Val::new(256))) * x29)) - ((x13 + (x14 * Val::new(256))) * x30)); - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:140) - let x32: Val = (((x31 + (x15 * x22)) + (x21 * x19)) + (x24 * x14)); - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:141) - let x33: Val = (((x21 * x22) + (x24 * x19)) * Val::new(256)); - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:136) - let x34: SplitTotalStruct = exec_split_total(ctx, (x32 + x33), (layout4.map(|c| c.s2)))?; - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:147) - let x35: Val = ((x34.carry + x27) + Val::new(131070)); - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:148) - let x36: Val = - ((x35 - ((x21 + (x24 * Val::new(256))) * x29)) - ((x19 + (x22 * Val::new(256))) * x30)); - let x37: Val = (x36 + (x24 * x22)); - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:150) - let x38: NondetRegStruct = exec_nondet_u16_reg( - ctx, - bit_and(x37, Val::new(65535))?, - (layout4.map(|c| c.s3_out)), - )?; - let x39: Val = x38._super; - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:151) - let x40: FakeTwitRegStruct = exec_fake_twit_reg( - ctx, - ((x37 - x39) * Val::new(2013235201)), - (layout4.map(|c| c.s3_carry)), - )?; - // ValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:10) - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:152) - let x41: ValU32Struct = ValU32Struct { - low: x18.out._super, - high: x26.out._super, - }; - // MultiplyAccumulate(zirgen/circuit/rv32im/v2/dsl/mult.zir:153) - let x42: ValU32Struct = ValU32Struct { - low: x34.out._super, - high: x39, - }; - return Ok(MultiplyAccumulateStruct { - out_low: x41, - out_high: x42, - }); -} -pub fn exec_div_input<'a>( - ctx: &'a ExecContext, - arg0: &RegStruct, - arg1: &InstInputStruct, - layout2: BoundLayout<'a, DivInputLayout, Val>, -) -> Result { - // DivInput(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:8) - eqz!( - (arg1.state - Val::new(32)), - "DivInput(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:8)" - ); - // DivInput(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:10) - let x3: DecoderStruct = exec_decode_inst(ctx, arg0, arg1, (layout2.map(|c| c.decoded)))?; - // DivInput(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:11) - let x4: GetDataStruct = exec_read_reg(ctx, arg0, arg1, x3.rs1, (layout2.map(|c| c.rs1)))?; - // DivInput(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:12) - let x5: GetDataStruct = exec_read_reg(ctx, arg0, arg1, x3.rs2, (layout2.map(|c| c.rs2)))?; - return Ok(DivInputStruct { - _super: arg1.clone(), - ii: arg1.clone(), - decoded: x3, - rs1: x4, - rs2: x5, - }); -} -pub fn exec_do_div<'a>( - ctx: &'a ExecContext, - arg0: &ValU32Struct, - arg1: &ValU32Struct, - arg2: Val, - arg3: Val, - layout4: BoundLayout<'a, DoDivLayout, Val>, -) -> Result { - // Divide(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:43) - // DoDiv(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:47) - let x5: Val = arg0.low; - let x6: Val = arg0.high; - let (x7, x8, x9, x10) = invoke_extern!( - ctx, - divide, - x5, - x6, - arg1.low, - arg1.high, - (arg2 + (arg3 * Val::new(2))) - ); - // DoDiv(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:50) - let x11: NondetRegStruct = exec_nondet_reg(ctx, x7, (layout4.map(|c| c.quot_low)))?; - // DoDiv(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:51) - let x12: NondetRegStruct = exec_nondet_reg(ctx, x8, (layout4.map(|c| c.quot_high)))?; - // ValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:10) - // DoDiv(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:52) - let x13: ValU32Struct = ValU32Struct { - low: x11._super, - high: x12._super, - }; - // DoDiv(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:54) - let x14: NondetRegStruct = exec_nondet_u16_reg(ctx, x9, (layout4.map(|c| c.rem_low)))?; - // DoDiv(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:55) - let x15: NondetRegStruct = exec_nondet_u16_reg(ctx, x10, (layout4.map(|c| c.rem_high)))?; - // ValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:10) - // DoDiv(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:56) - let x16: ValU32Struct = ValU32Struct { - low: x14._super, - high: x15._super, - }; - // DoDiv(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:60) - let x17: MultiplyAccumulateStruct = exec_multiply_accumulate( - ctx, - &x13, - arg1, - &x16, - &MultiplySettingsStruct { - a_signed: arg2, - b_signed: arg2, - c_signed: arg2, - }, - (layout4.map(|c| c.mul)), - )?; - let x18: ValU32Struct = x17.out_low; - // AssertEqU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:106) - // DoDiv(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:62) - eqz!((x18.low - x5), "loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :106:10) at DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :62:15)))"); - // AssertEqU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:107) - eqz!((x18.high - x6), "loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :107:11) at DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :62:15)))"); - // DoDiv(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:60) - let x19: ValU32Struct = x17.out_high; - let x20: Val = x19.low; - // DoDiv(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:64) - let x21: NondetRegStruct = exec_nondet_bit_reg( - ctx, - (Val::new(1) - isz(x20)?), - (layout4.map(|c| c.top_bit_type)), - )?; - // DoDiv(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:65) - let x22: Val = (x21._super * Val::new(65535)); - // AssertEqU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:106) - eqz!((x20 - x22), "loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :106:10) at DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :65:15)))"); - // AssertEqU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:107) - eqz!((x19.high - x22), "loc(callsite( AssertEqU32 ( zirgen/circuit/rv32im/v2/dsl/u32.zir :107:11) at DoDiv ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :65:15)))"); - return Ok(DoDivStruct { - quot: x13, - rem: x16, - }); -} -pub fn exec_op_srl<'a>( - ctx: &'a ExecContext, - arg0: &DivInputStruct, - layout1: BoundLayout<'a, OpSRLLayout, Val>, -) -> Result { - // OpSRL(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:84) - let x2: DecoderStruct = arg0.decoded; - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:62) - // OpSRL(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:85) - let x3: Val = (x2.opcode._super - Val::new(51)); - eqz!(x3, "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :62:19) at OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :85:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:63) - eqz!((x2.func3 - Val::new(5)), "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :85:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:64) - eqz!(x2.func7, "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at OpSRL ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :85:20)))"); - // OpSRL(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:84) - let x4: Val = arg0.rs2._super.low; - // OpSRL(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:86) - let x5: ValU32Struct = exec_dyn_po2(ctx, x4, (layout1.map(|c| c.shift_mul)))?; - // OpSRL(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:87) - let x6: DoDivStruct = exec_do_div( - ctx, - &arg0.rs1._super, - &x5, - Val::new(0), - Val::new(0), - (layout1.map(|c| c._0)), - )?; - return Ok(x6.quot); -} -pub fn exec_top_bit<'a>( - ctx: &'a ExecContext, - arg0: &ValU32Struct, - layout1: BoundLayout<'a, TopBitLayout, Val>, -) -> Result { - // TopBit(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:69) - let x2: Val = arg0.high; - // TopBit(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:70) - let x3: NondetRegStruct = exec_nondet_bit_reg( - ctx, - (bit_and(x2, Val::new(32768))? * Val::new(2013204481)), - (layout1.map(|c| c._super)), - )?; - // TopBit(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:71) - let x4: Val = (x3._super * Val::new(32768)); - let x5: NondetRegStruct = - exec_nondet_u16_reg(ctx, ((x2 - x4) * Val::new(2)), (layout1.map(|c| c.rest)))?; - // TopBit(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:72) - let x6: Val = ((x5._super * Val::new(1006632961)) + x4); - eqz!( - (x2 - x6), - "TopBit(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:72)" - ); - return Ok(x3); -} -pub fn exec_op_sra<'a>( - ctx: &'a ExecContext, - arg0: &DivInputStruct, - layout1: BoundLayout<'a, OpSRALayout, Val>, -) -> Result { - // OpSRA(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:90) - let x2: DecoderStruct = arg0.decoded; - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:62) - // OpSRA(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:91) - let x3: Val = (x2.opcode._super - Val::new(51)); - eqz!(x3, "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :62:19) at OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :91:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:63) - eqz!((x2.func3 - Val::new(5)), "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :91:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:64) - eqz!((x2.func7 - Val::new(32)), "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at OpSRA ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :91:20)))"); - // OpSRA(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:90) - let x4: Val = arg0.rs2._super.low; - // OpSRA(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:92) - let x5: ValU32Struct = exec_dyn_po2(ctx, x4, (layout1.map(|c| c.shift_mul)))?; - // OpSRA(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:90) - let x6: ValU32Struct = arg0.rs1._super; - // OpSRA(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:93) - let x7: NondetRegStruct = exec_top_bit(ctx, &x6, (layout1.map(|c| c.flip)))?; - let x8: Val = x7._super; - // FlipU32(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:80) - // OpSRA(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:94) - let x9: Val = x6.low; - // FlipU16(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:77) - // FlipU32(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:81) - let x10: Val = (Val::new(1) - x8); - // FlipU32(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:80) - let x11: Val = x6.high; - // ValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:10) - // FlipU32(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:81) - let x12: ValU32Struct = ValU32Struct { - low: ((x8 * (Val::new(65535) - x9)) + (x10 * x9)), - high: ((x8 * (Val::new(65535) - x11)) + (x10 * x11)), - }; - let x13: DoDivStruct = exec_do_div( - ctx, - &x12, - &x5, - Val::new(0), - Val::new(1), - (layout1.map(|c| c._0)), - )?; - let x14: ValU32Struct = x13.quot; - // FlipU32(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:80) - // OpSRA(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:95) - let x15: Val = x14.low; - let x16: Val = x14.high; - // ValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:10) - // FlipU32(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:81) - let x17: ValU32Struct = ValU32Struct { - low: ((x8 * (Val::new(65535) - x15)) + (x10 * x15)), - high: ((x8 * (Val::new(65535) - x16)) + (x10 * x16)), - }; - return Ok(x17); -} -pub fn exec_op_srli<'a>( - ctx: &'a ExecContext, - arg0: &DivInputStruct, - layout1: BoundLayout<'a, OpSRLILayout, Val>, -) -> Result { - // OpSRLI(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:98) - let x2: DecoderStruct = arg0.decoded; - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:62) - // OpSRLI(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:99) - let x3: Val = (x2.opcode._super - Val::new(19)); - eqz!(x3, "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :62:19) at OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :99:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:63) - eqz!((x2.func3 - Val::new(5)), "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :99:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:64) - eqz!(x2.func7, "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at OpSRLI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :99:20)))"); - // OpSRLI(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:100) - let x4: ValU32Struct = exec_dyn_po2(ctx, x2.rs2, (layout1.map(|c| c.shift_mul)))?; - // OpSRLI(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:101) - let x5: DoDivStruct = exec_do_div( - ctx, - &arg0.rs1._super, - &x4, - Val::new(0), - Val::new(0), - (layout1.map(|c| c._0)), - )?; - return Ok(x5.quot); -} -pub fn exec_op_srai<'a>( - ctx: &'a ExecContext, - arg0: &DivInputStruct, - layout1: BoundLayout<'a, OpSRAILayout, Val>, -) -> Result { - // OpSRAI(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:104) - let x2: DecoderStruct = arg0.decoded; - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:62) - // OpSRAI(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:105) - let x3: Val = (x2.opcode._super - Val::new(19)); - eqz!(x3, "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :62:19) at OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :105:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:63) - eqz!((x2.func3 - Val::new(5)), "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :105:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:64) - eqz!((x2.func7 - Val::new(32)), "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at OpSRAI ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :105:20)))"); - // OpSRAI(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:106) - let x4: ValU32Struct = exec_dyn_po2(ctx, x2.rs2, (layout1.map(|c| c.shift_mul)))?; - // OpSRAI(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:104) - let x5: ValU32Struct = arg0.rs1._super; - // OpSRAI(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:107) - let x6: NondetRegStruct = exec_top_bit(ctx, &x5, (layout1.map(|c| c.flip)))?; - let x7: Val = x6._super; - // FlipU32(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:80) - // OpSRAI(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:108) - let x8: Val = x5.low; - // FlipU16(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:77) - // FlipU32(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:81) - let x9: Val = (Val::new(1) - x7); - // FlipU32(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:80) - let x10: Val = x5.high; - // ValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:10) - // FlipU32(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:81) - let x11: ValU32Struct = ValU32Struct { - low: ((x7 * (Val::new(65535) - x8)) + (x9 * x8)), - high: ((x7 * (Val::new(65535) - x10)) + (x9 * x10)), - }; - let x12: DoDivStruct = exec_do_div( - ctx, - &x11, - &x4, - Val::new(0), - Val::new(1), - (layout1.map(|c| c._0)), - )?; - let x13: ValU32Struct = x12.quot; - // FlipU32(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:80) - // OpSRAI(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:109) - let x14: Val = x13.low; - let x15: Val = x13.high; - // ValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:10) - // FlipU32(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:81) - let x16: ValU32Struct = ValU32Struct { - low: ((x7 * (Val::new(65535) - x14)) + (x9 * x14)), - high: ((x7 * (Val::new(65535) - x15)) + (x9 * x15)), - }; - return Ok(x16); -} -pub fn exec_op_div<'a>( - ctx: &'a ExecContext, - arg0: &DivInputStruct, - layout1: BoundLayout<'a, OpDIVLayout, Val>, -) -> Result { - // OpDIV(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:112) - let x2: DecoderStruct = arg0.decoded; - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:62) - // OpDIV(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:113) - let x3: Val = (x2.opcode._super - Val::new(51)); - eqz!(x3, "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :62:19) at OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :113:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:63) - eqz!((x2.func3 - Val::new(4)), "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :113:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:64) - eqz!((x2.func7 - Val::new(1)), "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at OpDIV ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :113:20)))"); - // OpDIV(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:114) - let x4: DoDivStruct = exec_do_div( - ctx, - &arg0.rs1._super, - &arg0.rs2._super, - Val::new(1), - Val::new(0), - (layout1.map(|c| c._0)), - )?; - return Ok(x4.quot); -} -pub fn exec_op_divu<'a>( - ctx: &'a ExecContext, - arg0: &DivInputStruct, - layout1: BoundLayout<'a, OpDIVULayout, Val>, -) -> Result { - // OpDIVU(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:117) - let x2: DecoderStruct = arg0.decoded; - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:62) - // OpDIVU(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:118) - let x3: Val = (x2.opcode._super - Val::new(51)); - eqz!(x3, "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :62:19) at OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :118:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:63) - eqz!((x2.func3 - Val::new(5)), "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :118:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:64) - eqz!((x2.func7 - Val::new(1)), "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at OpDIVU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :118:20)))"); - // OpDIVU(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:119) - let x4: DoDivStruct = exec_do_div( - ctx, - &arg0.rs1._super, - &arg0.rs2._super, - Val::new(0), - Val::new(0), - (layout1.map(|c| c._0)), - )?; - return Ok(x4.quot); -} -pub fn exec_op_rem<'a>( - ctx: &'a ExecContext, - arg0: &DivInputStruct, - layout1: BoundLayout<'a, OpREMLayout, Val>, -) -> Result { - // OpREM(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:122) - let x2: DecoderStruct = arg0.decoded; - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:62) - // OpREM(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:123) - let x3: Val = (x2.opcode._super - Val::new(51)); - eqz!(x3, "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :62:19) at OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :123:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:63) - eqz!((x2.func3 - Val::new(6)), "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :123:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:64) - eqz!((x2.func7 - Val::new(1)), "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at OpREM ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :123:20)))"); - // OpREM(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:124) - let x4: DoDivStruct = exec_do_div( - ctx, - &arg0.rs1._super, - &arg0.rs2._super, - Val::new(1), - Val::new(0), - (layout1.map(|c| c._0)), - )?; - return Ok(x4.rem); -} -pub fn exec_op_remu<'a>( - ctx: &'a ExecContext, - arg0: &DivInputStruct, - layout1: BoundLayout<'a, OpREMULayout, Val>, -) -> Result { - // OpREMU(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:127) - let x2: DecoderStruct = arg0.decoded; - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:62) - // OpREMU(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:128) - let x3: Val = (x2.opcode._super - Val::new(51)); - eqz!(x3, "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :62:19) at OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :128:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:63) - eqz!((x2.func3 - Val::new(7)), "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :128:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:64) - eqz!((x2.func7 - Val::new(1)), "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at OpREMU ( zirgen/circuit/rv32im/v2/dsl/inst_div.zir :128:20)))"); - // OpREMU(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:129) - let x4: DoDivStruct = exec_do_div( - ctx, - &arg0.rs1._super, - &arg0.rs2._super, - Val::new(0), - Val::new(0), - (layout1.map(|c| c._0)), - )?; - return Ok(x4.rem); -} -pub fn exec_div0<'a>( - ctx: &'a ExecContext, - arg0: &RegStruct, - arg1: &InstInputStruct, - layout2: BoundLayout<'a, Div0Layout, Val>, -) -> Result { - // Div0(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:23) - let x3: BoundLayout = (layout2.map(|c| c.mul_output)); - // Div0(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:22) - let x4: DivInputStruct = exec_div_input(ctx, arg0, arg1, (layout2.map(|c| c.input)))?; - let x5: NondetRegStruct8Array = x4._super.minor_onehot._super; - // Div0(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:23) - let x6: BoundLayout = (x3.map(|c| c.arm0)); - let x7: BoundLayout = (x3.map(|c| c.arm2)); - let x8: BoundLayout = (x3.map(|c| c.arm4)); - let x9: BoundLayout = (x3.map(|c| c.arm5)); - let x10: BoundLayout = (x3.map(|c| c.arm6)); - let x11: BoundLayout = (x3.map(|c| c.arm7)); - let x12: BoundLayout = (((x6.map(|c| c._extra0)).map(|c| c.count)).map(|c| c._super)); - let x13: BoundLayout = (((x7.map(|c| c._extra0)).map(|c| c.count)).map(|c| c._super)); - let x14: BoundLayout = (((x8.map(|c| c._extra0)).map(|c| c.count)).map(|c| c._super)); - let x15: BoundLayout = (((x8.map(|c| c._extra1)).map(|c| c.count)).map(|c| c._super)); - let x16: BoundLayout = (((x9.map(|c| c._extra0)).map(|c| c.count)).map(|c| c._super)); - let x17: BoundLayout = (((x9.map(|c| c._extra1)).map(|c| c.count)).map(|c| c._super)); - let x18: BoundLayout = (((x10.map(|c| c._extra0)).map(|c| c.count)).map(|c| c._super)); - let x19: BoundLayout = (((x10.map(|c| c._extra1)).map(|c| c.count)).map(|c| c._super)); - let x20: BoundLayout = (((x11.map(|c| c._extra0)).map(|c| c.count)).map(|c| c._super)); - let x21: BoundLayout = (((x11.map(|c| c._extra1)).map(|c| c.count)).map(|c| c._super)); - let x22: ValU32Struct; - if is_true(x5[to_usize(Val::new(0))]._super) { - // Div0(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:24) - let x23: ValU32Struct = exec_op_srl(ctx, &x4, (x6.map(|c| c._super)))?; - // Div0(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:23) - x12.store(ctx, Val::new(0)); - eqz!( - x12.load(ctx, 0), - "Div0(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:23)" - ); - x22 = x23; - } else if is_true(x5[to_usize(Val::new(1))]._super) { - // Div0(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:25) - let x24: ValU32Struct = exec_op_sra(ctx, &x4, (x3.map(|c| c.arm1)))?; - x22 = x24; - } else if is_true(x5[to_usize(Val::new(2))]._super) { - // Div0(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:26) - let x25: ValU32Struct = exec_op_srli(ctx, &x4, (x7.map(|c| c._super)))?; - // Div0(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:23) - x13.store(ctx, Val::new(0)); - eqz!( - x13.load(ctx, 0), - "Div0(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:23)" - ); - x22 = x25; - } else if is_true(x5[to_usize(Val::new(3))]._super) { - // Div0(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:27) - let x26: ValU32Struct = exec_op_srai(ctx, &x4, (x3.map(|c| c.arm3)))?; - x22 = x26; - } else if is_true(x5[to_usize(Val::new(4))]._super) { - // Div0(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:28) - let x27: ValU32Struct = exec_op_div(ctx, &x4, (x8.map(|c| c._super)))?; - // Div0(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:23) - x14.store(ctx, Val::new(0)); - eqz!( - x14.load(ctx, 0), - "Div0(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:23)" - ); - x15.store(ctx, Val::new(0)); - eqz!( - x15.load(ctx, 0), - "Div0(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:23)" - ); - x22 = x27; - } else if is_true(x5[to_usize(Val::new(5))]._super) { - // Div0(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:29) - let x28: ValU32Struct = exec_op_divu(ctx, &x4, (x9.map(|c| c._super)))?; - // Div0(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:23) - x16.store(ctx, Val::new(0)); - eqz!( - x16.load(ctx, 0), - "Div0(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:23)" - ); - x17.store(ctx, Val::new(0)); - eqz!( - x17.load(ctx, 0), - "Div0(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:23)" - ); - x22 = x28; - } else if is_true(x5[to_usize(Val::new(6))]._super) { - // Div0(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:30) - let x29: ValU32Struct = exec_op_rem(ctx, &x4, (x10.map(|c| c._super)))?; - // Div0(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:23) - x18.store(ctx, Val::new(0)); - eqz!( - x18.load(ctx, 0), - "Div0(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:23)" - ); - x19.store(ctx, Val::new(0)); - eqz!( - x19.load(ctx, 0), - "Div0(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:23)" - ); - x22 = x29; - } else if is_true(x5[to_usize(Val::new(7))]._super) { - // Div0(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:31) - let x30: ValU32Struct = exec_op_remu(ctx, &x4, (x11.map(|c| c._super)))?; - // Div0(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:23) - x20.store(ctx, Val::new(0)); - eqz!( - x20.load(ctx, 0), - "Div0(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:23)" - ); - x21.store(ctx, Val::new(0)); - eqz!( - x21.load(ctx, 0), - "Div0(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:23)" - ); - x22 = x30; - } else { - bail!("Reached unreachable mux arm") - } // Div0(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:33) - let x31: WriteRdStruct = exec_write_rd( - ctx, - arg0, - &x4.ii, - &x4.decoded, - Val::new(1), - &x22, - (layout2.map(|c| c._0)), - )?; - // Div0(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:21) - let x32: ValU32Struct = arg1.pc_u32; - // DenormedValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:20) - // AddU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:27) - // Div0(zirgen/circuit/rv32im/v2/dsl/inst_div.zir:34) - let x33: DenormedValU32Struct = DenormedValU32Struct { - low: (x32.low + Val::new(4)), - high: x32.high, - }; - let x34: NormalizeU32Struct = exec_normalize_u32(ctx, &x33, (layout2.map(|c| c.pc_add)))?; - return Ok(InstOutputStruct { - new_pc: x34._super, - new_state: Val::new(32), - new_mode: arg1.mode, - }); -} -pub fn exec_misc_input<'a>( - ctx: &'a ExecContext, - arg0: &RegStruct, - arg1: &InstInputStruct, - layout2: BoundLayout<'a, MiscInputLayout, Val>, -) -> Result { - // MiscInput(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:7) - eqz!( - (arg1.state - Val::new(32)), - "MiscInput(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:7)" - ); - // MiscInput(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:9) - let x3: DecoderStruct = exec_decode_inst(ctx, arg0, arg1, (layout2.map(|c| c.decoded)))?; - // MiscInput(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:10) - let x4: GetDataStruct = exec_read_reg(ctx, arg0, arg1, x3.rs1, (layout2.map(|c| c.rs1)))?; - // MiscInput(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:11) - let x5: GetDataStruct = exec_read_reg(ctx, arg0, arg1, x3.rs2, (layout2.map(|c| c.rs2)))?; - return Ok(MiscInputStruct { - _super: arg1.clone(), - ii: arg1.clone(), - decoded: x3, - rs1: x4, - rs2: x5, - }); -} -pub fn exec_finalize_misc<'a>( - ctx: &'a ExecContext, - arg0: &RegStruct, - arg1: &MiscInputStruct, - arg2: &MiscOutputStruct, - layout3: BoundLayout<'a, FinalizeMiscLayout, Val>, -) -> Result { - // FinalizeMisc(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:22) - let x4: NormalizeU32Struct = - exec_normalize_u32(ctx, &arg2.to_write, (layout3.map(|c| c.write_data)))?; - // FinalizeMisc(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:23) - let x5: NormalizeU32Struct = - exec_normalize_u32(ctx, &arg2.new_pc, (layout3.map(|c| c.pc_norm)))?; - // FinalizeMisc(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:21) - let x6: InstInputStruct = arg1.ii; - // FinalizeMisc(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:24) - let x7: WriteRdStruct = exec_write_rd( - ctx, - arg0, - &x6, - &arg1.decoded, - arg2.do_write, - &x4._super, - (layout3.map(|c| c._0)), - )?; - return Ok(InstOutputStruct { - new_pc: x5._super, - new_state: Val::new(32), - new_mode: x6.mode, - }); -} -pub fn exec_op_xor<'a>( - ctx: &'a ExecContext, - arg0: &MiscInputStruct, - layout1: BoundLayout<'a, OpXORLayout, Val>, -) -> Result { - // OpXOR(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:95) - let x2: DecoderStruct = arg0.decoded; - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:62) - // OpXOR(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:96) - let x3: Val = (x2.opcode._super - Val::new(51)); - eqz!(x3, "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :62:19) at OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :96:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:63) - eqz!((x2.func3 - Val::new(4)), "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :96:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:64) - eqz!(x2.func7, "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at OpXOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :96:20)))"); - // OpXOR(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:97) - let x4: ValU32Struct = exec_bitwise_xor( - ctx, - &arg0.rs1._super, - &arg0.rs2._super, - (layout1.map(|c| c._0)), - )?; - // SimpleOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:73) - let x5: ValU32Struct = arg0._super.pc_u32; - // DenormedValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:20) - // AddU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:27) - // SimpleOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:74) - let x6: DenormedValU32Struct = DenormedValU32Struct { - low: (x5.low + Val::new(4)), - high: x5.high, - }; - // MiscOutput(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:15) - // SimpleOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:75) - let x7: MiscOutputStruct = MiscOutputStruct { - do_write: Val::new(1), - to_write: DenormedValU32Struct { - low: x4.low, - high: x4.high, - }, - new_pc: x6, - }; - return Ok(x7); -} -pub fn exec_op_or<'a>( - ctx: &'a ExecContext, - arg0: &MiscInputStruct, - layout1: BoundLayout<'a, OpORLayout, Val>, -) -> Result { - // OpOR(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:100) - let x2: DecoderStruct = arg0.decoded; - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:62) - // OpOR(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:101) - let x3: Val = (x2.opcode._super - Val::new(51)); - eqz!(x3, "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :62:19) at OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :101:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:63) - eqz!((x2.func3 - Val::new(6)), "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :101:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:64) - eqz!(x2.func7, "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at OpOR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :101:20)))"); - // OpOR(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:102) - let x4: ValU32Struct = exec_bitwise_or( - ctx, - &arg0.rs1._super, - &arg0.rs2._super, - (layout1.map(|c| c._0)), - )?; - // SimpleOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:73) - let x5: ValU32Struct = arg0._super.pc_u32; - // DenormedValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:20) - // AddU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:27) - // SimpleOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:74) - let x6: DenormedValU32Struct = DenormedValU32Struct { - low: (x5.low + Val::new(4)), - high: x5.high, - }; - // MiscOutput(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:15) - // SimpleOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:75) - let x7: MiscOutputStruct = MiscOutputStruct { - do_write: Val::new(1), - to_write: DenormedValU32Struct { - low: x4.low, - high: x4.high, - }, - new_pc: x6, - }; - return Ok(x7); -} -pub fn exec_op_and<'a>( - ctx: &'a ExecContext, - arg0: &MiscInputStruct, - layout1: BoundLayout<'a, OpANDLayout, Val>, -) -> Result { - // OpAND(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:105) - let x2: DecoderStruct = arg0.decoded; - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:62) - // OpAND(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:106) - let x3: Val = (x2.opcode._super - Val::new(51)); - eqz!(x3, "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :62:19) at OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :106:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:63) - eqz!((x2.func3 - Val::new(7)), "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :106:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:64) - eqz!(x2.func7, "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at OpAND ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :106:20)))"); - // OpAND(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:107) - let x4: ValU32Struct = exec_bitwise_and( - ctx, - &arg0.rs1._super, - &arg0.rs2._super, - (layout1.map(|c| c._0)), - )?; - // SimpleOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:73) - let x5: ValU32Struct = arg0._super.pc_u32; - // DenormedValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:20) - // AddU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:27) - // SimpleOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:74) - let x6: DenormedValU32Struct = DenormedValU32Struct { - low: (x5.low + Val::new(4)), - high: x5.high, - }; - // MiscOutput(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:15) - // SimpleOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:75) - let x7: MiscOutputStruct = MiscOutputStruct { - do_write: Val::new(1), - to_write: DenormedValU32Struct { - low: x4.low, - high: x4.high, - }, - new_pc: x6, - }; - return Ok(x7); -} -pub fn exec_op_slt<'a>( - ctx: &'a ExecContext, - arg0: &MiscInputStruct, - layout1: BoundLayout<'a, OpSLTLayout, Val>, -) -> Result { - // OpSLT(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:110) - let x2: DecoderStruct = arg0.decoded; - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:62) - // OpSLT(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:111) - let x3: Val = (x2.opcode._super - Val::new(51)); - eqz!(x3, "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :62:19) at OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :111:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:63) - eqz!((x2.func3 - Val::new(2)), "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :111:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:64) - eqz!(x2.func7, "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at OpSLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :111:20)))"); - // OpSLT(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:112) - let x4: CmpLessThanStruct = exec_cmp_less_than( - ctx, - &arg0.rs1._super, - &arg0.rs2._super, - (layout1.map(|c| c.cmp)), - )?; - let x5: Val = x4.is_less_than._super._super; - // SimpleOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:73) - // OpSLT(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:113) - let x6: ValU32Struct = arg0._super.pc_u32; - // DenormedValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:20) - // AddU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:27) - // SimpleOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:74) - let x7: DenormedValU32Struct = DenormedValU32Struct { - low: (x6.low + Val::new(4)), - high: x6.high, - }; - return Ok(MiscOutputStruct { - do_write: Val::new(1), - to_write: DenormedValU32Struct { - low: x5, - high: Val::new(0), - }, - new_pc: x7, - }); -} -pub fn exec_op_sltu<'a>( - ctx: &'a ExecContext, - arg0: &MiscInputStruct, - layout1: BoundLayout<'a, OpSLTULayout, Val>, -) -> Result { - // OpSLTU(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:116) - let x2: DecoderStruct = arg0.decoded; - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:62) - // OpSLTU(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:117) - let x3: Val = (x2.opcode._super - Val::new(51)); - eqz!(x3, "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :62:19) at OpSLTU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :117:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:63) - eqz!((x2.func3 - Val::new(3)), "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at OpSLTU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :117:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:64) - eqz!(x2.func7, "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at OpSLTU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :117:20)))"); - // OpSLTU(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:118) - let x4: CmpLessThanUnsignedStruct = exec_cmp_less_than_unsigned( - ctx, - &arg0.rs1._super, - &arg0.rs2._super, - (layout1.map(|c| c.cmp)), - )?; - // SimpleOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:73) - // OpSLTU(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:119) - let x5: ValU32Struct = arg0._super.pc_u32; - // DenormedValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:20) - // AddU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:27) - // SimpleOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:74) - let x6: DenormedValU32Struct = DenormedValU32Struct { - low: (x5.low + Val::new(4)), - high: x5.high, - }; - // MiscOutput(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:15) - // SimpleOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:75) - let x7: MiscOutputStruct = MiscOutputStruct { - do_write: Val::new(1), - to_write: DenormedValU32Struct { - low: x4.is_less_than, - high: Val::new(0), - }, - new_pc: x6, - }; - return Ok(x7); -} -pub fn exec_misc0<'a>( - ctx: &'a ExecContext, - arg0: &RegStruct, - arg1: &InstInputStruct, - layout2: BoundLayout<'a, Misc0Layout, Val>, -) -> Result { - // Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30) - let x3: BoundLayout = (layout2.map(|c| c.misc_output)); - // Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:29) - let x4: MiscInputStruct = exec_misc_input(ctx, arg0, arg1, (layout2.map(|c| c.input)))?; - let x5: InstInputStruct = x4._super; - let x6: NondetRegStruct8Array = x5.minor_onehot._super; - // Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30) - let x7: BoundLayout = (x3.map(|c| c.arm0)); - let x8: BoundLayout = (x3.map(|c| c.arm1)); - let x9: BoundLayout = (x3.map(|c| c.arm2)); - let x10: BoundLayout = (x3.map(|c| c.arm3)); - let x11: BoundLayout = (x3.map(|c| c.arm4)); - let x12: BoundLayout = (x3.map(|c| c.arm6)); - let x13: BoundLayout = (x3.map(|c| c.arm7)); - // OpADD(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:85) - // Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:31) - let x14: DecoderStruct = x4.decoded; - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:61) - // OpADD(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:86) - let x15: Val = x14.opcode._super; - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:62) - let x16: Val = (x15 - Val::new(51)); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:61) - let x17: Val = x14.func3; - let x18: Val = x14.func7; - // OpADD(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:85) - let x19: ValU32Struct = x4.rs1._super; - let x20: ValU32Struct = x4.rs2._super; - // AddU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:26) - // OpADD(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:87) - let x21: Val = x19.low; - let x22: Val = x20.low; - let x23: Val = x19.high; - let x24: Val = x20.high; - // SimpleOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:73) - let x25: ValU32Struct = x5.pc_u32; - // DenormedValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:20) - // AddU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:27) - // SimpleOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:74) - let x26: DenormedValU32Struct = DenormedValU32Struct { - low: (x25.low + Val::new(4)), - high: x25.high, - }; - // MiscOutput(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:15) - // SimpleOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:75) - let x27: MiscOutputStruct = MiscOutputStruct { - do_write: Val::new(1), - to_write: DenormedValU32Struct { - low: (x21 + x22), - high: (x23 + x24), - }, - new_pc: x26.clone(), - }; - // Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30) - let x28: BoundLayout = (((x7.map(|c| c._extra0)).map(|c| c.count)).map(|c| c._super)); - let x29: BoundLayout = (((x7.map(|c| c._extra1)).map(|c| c.count)).map(|c| c._super)); - let x30: BoundLayout = (((x7.map(|c| c._extra2)).map(|c| c.count)).map(|c| c._super)); - let x31: BoundLayout = (((x7.map(|c| c._extra3)).map(|c| c.count)).map(|c| c._super)); - let x32: BoundLayout = (((x7.map(|c| c._extra4)).map(|c| c.count)).map(|c| c._super)); - // DenormedValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:20) - // SubU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:33) - // OpSUB(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:92) - // Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:32) - let x33: DenormedValU32Struct = DenormedValU32Struct { - low: ((x21 + Val::new(65536)) - x22), - high: ((x23 + Val::new(65535)) - x24), - }; - // Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30) - let x34: BoundLayout = (((x8.map(|c| c._extra0)).map(|c| c.count)).map(|c| c._super)); - let x35: BoundLayout = (((x8.map(|c| c._extra1)).map(|c| c.count)).map(|c| c._super)); - let x36: BoundLayout = (((x8.map(|c| c._extra2)).map(|c| c.count)).map(|c| c._super)); - let x37: BoundLayout = (((x8.map(|c| c._extra3)).map(|c| c.count)).map(|c| c._super)); - let x38: BoundLayout = (((x8.map(|c| c._extra4)).map(|c| c.count)).map(|c| c._super)); - let x39: BoundLayout = (((x9.map(|c| c._extra0)).map(|c| c.count)).map(|c| c._super)); - let x40: BoundLayout = (((x9.map(|c| c._extra1)).map(|c| c.count)).map(|c| c._super)); - let x41: BoundLayout = (((x9.map(|c| c._extra2)).map(|c| c.count)).map(|c| c._super)); - let x42: BoundLayout = (((x9.map(|c| c._extra3)).map(|c| c.count)).map(|c| c._super)); - let x43: BoundLayout = (((x9.map(|c| c._extra4)).map(|c| c.count)).map(|c| c._super)); - let x44: BoundLayout = (((x10.map(|c| c._extra0)).map(|c| c.count)).map(|c| c._super)); - let x45: BoundLayout = (((x10.map(|c| c._extra1)).map(|c| c.count)).map(|c| c._super)); - let x46: BoundLayout = (((x10.map(|c| c._extra2)).map(|c| c.count)).map(|c| c._super)); - let x47: BoundLayout = (((x10.map(|c| c._extra3)).map(|c| c.count)).map(|c| c._super)); - let x48: BoundLayout = (((x10.map(|c| c._extra4)).map(|c| c.count)).map(|c| c._super)); - let x49: BoundLayout = (((x11.map(|c| c._extra0)).map(|c| c.count)).map(|c| c._super)); - let x50: BoundLayout = (((x11.map(|c| c._extra1)).map(|c| c.count)).map(|c| c._super)); - let x51: BoundLayout = (((x11.map(|c| c._extra2)).map(|c| c.count)).map(|c| c._super)); - let x52: BoundLayout = (((x11.map(|c| c._extra3)).map(|c| c.count)).map(|c| c._super)); - let x53: BoundLayout = (((x11.map(|c| c._extra4)).map(|c| c.count)).map(|c| c._super)); - let x54: BoundLayout = (((x12.map(|c| c._extra0)).map(|c| c.count)).map(|c| c._super)); - let x55: BoundLayout = (((x12.map(|c| c._extra1)).map(|c| c.count)).map(|c| c._super)); - let x56: BoundLayout = (((x12.map(|c| c._extra2)).map(|c| c.count)).map(|c| c._super)); - // OpADDI(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:122) - // Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:38) - let x57: ValU32Struct = x14.imm_i; - // MiscOutput(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:15) - // SimpleOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:75) - // OpADDI(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:124) - let x58: MiscOutputStruct = MiscOutputStruct { - do_write: Val::new(1), - to_write: DenormedValU32Struct { - low: (x21 + x57.low), - high: (x23 + x57.high), - }, - new_pc: x26.clone(), - }; - // Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30) - let x59: BoundLayout = (((x13.map(|c| c._extra0)).map(|c| c.count)).map(|c| c._super)); - let x60: BoundLayout = (((x13.map(|c| c._extra1)).map(|c| c.count)).map(|c| c._super)); - let x61: BoundLayout = (((x13.map(|c| c._extra2)).map(|c| c.count)).map(|c| c._super)); - let x62: BoundLayout = (((x13.map(|c| c._extra3)).map(|c| c.count)).map(|c| c._super)); - let x63: BoundLayout = (((x13.map(|c| c._extra4)).map(|c| c.count)).map(|c| c._super)); - let x64: MiscOutputStruct; - if is_true(x6[to_usize(Val::new(0))]._super) { - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:62) - // OpADD(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:86) - // Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:31) - eqz!(x16, "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :62:19) at callsite( OpADD ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :86:20) at Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :31:11))))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:63) - eqz!(x17, "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at callsite( OpADD ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :86:20) at Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :31:11))))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:64) - eqz!(x18, "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at callsite( OpADD ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :86:20) at Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :31:11))))"); - // Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30) - x28.store(ctx, Val::new(0)); - eqz!( - x28.load(ctx, 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)" - ); - x29.store(ctx, Val::new(0)); - eqz!( - x29.load(ctx, 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)" - ); - x30.store(ctx, Val::new(0)); - eqz!( - x30.load(ctx, 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)" - ); - x31.store(ctx, Val::new(0)); - eqz!( - x31.load(ctx, 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)" - ); - x32.store(ctx, Val::new(0)); - eqz!( - x32.load(ctx, 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)" - ); - x64 = x27; - } else if is_true(x6[to_usize(Val::new(1))]._super) { - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:62) - // OpSUB(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:91) - // Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:32) - eqz!(x16, "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :62:19) at callsite( OpSUB ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :91:20) at Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :32:11))))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:63) - eqz!(x17, "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at callsite( OpSUB ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :91:20) at Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :32:11))))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:64) - eqz!((x18 - Val::new(32)), "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at callsite( OpSUB ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :91:20) at Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :32:11))))"); - // Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30) - x34.store(ctx, Val::new(0)); - eqz!( - x34.load(ctx, 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)" - ); - x35.store(ctx, Val::new(0)); - eqz!( - x35.load(ctx, 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)" - ); - x36.store(ctx, Val::new(0)); - eqz!( - x36.load(ctx, 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)" - ); - x37.store(ctx, Val::new(0)); - eqz!( - x37.load(ctx, 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)" - ); - x38.store(ctx, Val::new(0)); - eqz!( - x38.load(ctx, 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)" - ); - x64 = MiscOutputStruct { - do_write: Val::new(1), - to_write: x33, - new_pc: x26, - }; - } else if is_true(x6[to_usize(Val::new(2))]._super) { - // Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:33) - let x65: MiscOutputStruct = exec_op_xor(ctx, &x4, (x9.map(|c| c._super)))?; - // Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30) - x39.store(ctx, Val::new(0)); - eqz!( - x39.load(ctx, 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)" - ); - x40.store(ctx, Val::new(0)); - eqz!( - x40.load(ctx, 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)" - ); - x41.store(ctx, Val::new(0)); - eqz!( - x41.load(ctx, 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)" - ); - x42.store(ctx, Val::new(0)); - eqz!( - x42.load(ctx, 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)" - ); - x43.store(ctx, Val::new(0)); - eqz!( - x43.load(ctx, 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)" - ); - x64 = x65; - } else if is_true(x6[to_usize(Val::new(3))]._super) { - // Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:34) - let x66: MiscOutputStruct = exec_op_or(ctx, &x4, (x10.map(|c| c._super)))?; - // Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30) - x44.store(ctx, Val::new(0)); - eqz!( - x44.load(ctx, 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)" - ); - x45.store(ctx, Val::new(0)); - eqz!( - x45.load(ctx, 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)" - ); - x46.store(ctx, Val::new(0)); - eqz!( - x46.load(ctx, 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)" - ); - x47.store(ctx, Val::new(0)); - eqz!( - x47.load(ctx, 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)" - ); - x48.store(ctx, Val::new(0)); - eqz!( - x48.load(ctx, 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)" - ); - x64 = x66; - } else if is_true(x6[to_usize(Val::new(4))]._super) { - // Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:35) - let x67: MiscOutputStruct = exec_op_and(ctx, &x4, (x11.map(|c| c._super)))?; - // Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30) - x49.store(ctx, Val::new(0)); - eqz!( - x49.load(ctx, 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)" - ); - x50.store(ctx, Val::new(0)); - eqz!( - x50.load(ctx, 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)" - ); - x51.store(ctx, Val::new(0)); - eqz!( - x51.load(ctx, 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)" - ); - x52.store(ctx, Val::new(0)); - eqz!( - x52.load(ctx, 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)" - ); - x53.store(ctx, Val::new(0)); - eqz!( - x53.load(ctx, 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)" - ); - x64 = x67; - } else if is_true(x6[to_usize(Val::new(5))]._super) { - // Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:36) - let x68: MiscOutputStruct = exec_op_slt(ctx, &x4, (x3.map(|c| c.arm5)))?; - x64 = x68; - } else if is_true(x6[to_usize(Val::new(6))]._super) { - // Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:37) - let x69: MiscOutputStruct = exec_op_sltu(ctx, &x4, (x12.map(|c| c._super)))?; - // Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30) - x54.store(ctx, Val::new(0)); - eqz!( - x54.load(ctx, 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)" - ); - x55.store(ctx, Val::new(0)); - eqz!( - x55.load(ctx, 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)" - ); - x56.store(ctx, Val::new(0)); - eqz!( - x56.load(ctx, 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)" - ); - x64 = x69; - } else if is_true(x6[to_usize(Val::new(7))]._super) { - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:57) - // OpADDI(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:123) - // Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:38) - eqz!((x15 - Val::new(19)), "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :57:19) at callsite( OpADDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :123:18) at Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :38:12))))"); - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:58) - eqz!(x17, "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at callsite( OpADDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :123:18) at Misc0 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :38:12))))"); - // Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30) - x59.store(ctx, Val::new(0)); - eqz!( - x59.load(ctx, 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)" - ); - x60.store(ctx, Val::new(0)); - eqz!( - x60.load(ctx, 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)" - ); - x61.store(ctx, Val::new(0)); - eqz!( - x61.load(ctx, 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)" - ); - x62.store(ctx, Val::new(0)); - eqz!( - x62.load(ctx, 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)" - ); - x63.store(ctx, Val::new(0)); - eqz!( - x63.load(ctx, 0), - "Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:30)" - ); - x64 = x58; - } else { - bail!("Reached unreachable mux arm") - } // Misc0(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:40) - let x70: InstOutputStruct = - exec_finalize_misc(ctx, arg0, &x4, &x64, (layout2.map(|c| c._super)))?; - return Ok(x70); -} -pub fn exec_op_xori<'a>( - ctx: &'a ExecContext, - arg0: &MiscInputStruct, - layout1: BoundLayout<'a, OpXORILayout, Val>, -) -> Result { - // OpXORI(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:127) - let x2: DecoderStruct = arg0.decoded; - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:57) - // OpXORI(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:128) - let x3: Val = (x2.opcode._super - Val::new(19)); - eqz!(x3, "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :57:19) at OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :128:18)))"); - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:58) - eqz!((x2.func3 - Val::new(4)), "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at OpXORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :128:18)))"); - // OpXORI(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:129) - let x4: ValU32Struct = - exec_bitwise_xor(ctx, &arg0.rs1._super, &x2.imm_i, (layout1.map(|c| c._0)))?; - // SimpleOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:73) - let x5: ValU32Struct = arg0._super.pc_u32; - // DenormedValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:20) - // AddU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:27) - // SimpleOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:74) - let x6: DenormedValU32Struct = DenormedValU32Struct { - low: (x5.low + Val::new(4)), - high: x5.high, - }; - // MiscOutput(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:15) - // SimpleOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:75) - let x7: MiscOutputStruct = MiscOutputStruct { - do_write: Val::new(1), - to_write: DenormedValU32Struct { - low: x4.low, - high: x4.high, - }, - new_pc: x6, - }; - return Ok(x7); -} -pub fn exec_op_ori<'a>( - ctx: &'a ExecContext, - arg0: &MiscInputStruct, - layout1: BoundLayout<'a, OpORILayout, Val>, -) -> Result { - // OpORI(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:132) - let x2: DecoderStruct = arg0.decoded; - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:57) - // OpORI(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:133) - let x3: Val = (x2.opcode._super - Val::new(19)); - eqz!(x3, "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :57:19) at OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :133:18)))"); - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:58) - eqz!((x2.func3 - Val::new(6)), "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at OpORI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :133:18)))"); - // OpORI(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:134) - let x4: ValU32Struct = - exec_bitwise_or(ctx, &arg0.rs1._super, &x2.imm_i, (layout1.map(|c| c._0)))?; - // SimpleOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:73) - let x5: ValU32Struct = arg0._super.pc_u32; - // DenormedValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:20) - // AddU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:27) - // SimpleOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:74) - let x6: DenormedValU32Struct = DenormedValU32Struct { - low: (x5.low + Val::new(4)), - high: x5.high, - }; - // MiscOutput(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:15) - // SimpleOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:75) - let x7: MiscOutputStruct = MiscOutputStruct { - do_write: Val::new(1), - to_write: DenormedValU32Struct { - low: x4.low, - high: x4.high, - }, - new_pc: x6, - }; - return Ok(x7); -} -pub fn exec_op_andi<'a>( - ctx: &'a ExecContext, - arg0: &MiscInputStruct, - layout1: BoundLayout<'a, OpANDILayout, Val>, -) -> Result { - // OpANDI(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:137) - let x2: DecoderStruct = arg0.decoded; - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:57) - // OpANDI(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:138) - let x3: Val = (x2.opcode._super - Val::new(19)); - eqz!(x3, "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :57:19) at OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :138:18)))"); - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:58) - eqz!((x2.func3 - Val::new(7)), "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at OpANDI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :138:18)))"); - // OpANDI(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:139) - let x4: ValU32Struct = - exec_bitwise_and(ctx, &arg0.rs1._super, &x2.imm_i, (layout1.map(|c| c._0)))?; - // SimpleOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:73) - let x5: ValU32Struct = arg0._super.pc_u32; - // DenormedValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:20) - // AddU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:27) - // SimpleOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:74) - let x6: DenormedValU32Struct = DenormedValU32Struct { - low: (x5.low + Val::new(4)), - high: x5.high, - }; - // MiscOutput(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:15) - // SimpleOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:75) - let x7: MiscOutputStruct = MiscOutputStruct { - do_write: Val::new(1), - to_write: DenormedValU32Struct { - low: x4.low, - high: x4.high, - }, - new_pc: x6, - }; - return Ok(x7); -} -pub fn exec_op_slti<'a>( - ctx: &'a ExecContext, - arg0: &MiscInputStruct, - layout1: BoundLayout<'a, OpSLTILayout, Val>, -) -> Result { - // OpSLTI(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:142) - let x2: DecoderStruct = arg0.decoded; - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:57) - // OpSLTI(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:143) - let x3: Val = (x2.opcode._super - Val::new(19)); - eqz!(x3, "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :57:19) at OpSLTI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :143:18)))"); - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:58) - eqz!((x2.func3 - Val::new(2)), "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at OpSLTI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :143:18)))"); - // OpSLTI(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:144) - let x4: CmpLessThanStruct = - exec_cmp_less_than(ctx, &arg0.rs1._super, &x2.imm_i, (layout1.map(|c| c.cmp)))?; - let x5: Val = x4.is_less_than._super._super; - // SimpleOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:73) - // OpSLTI(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:145) - let x6: ValU32Struct = arg0._super.pc_u32; - // DenormedValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:20) - // AddU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:27) - // SimpleOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:74) - let x7: DenormedValU32Struct = DenormedValU32Struct { - low: (x6.low + Val::new(4)), - high: x6.high, - }; - return Ok(MiscOutputStruct { - do_write: Val::new(1), - to_write: DenormedValU32Struct { - low: x5, - high: Val::new(0), - }, - new_pc: x7, - }); -} -pub fn exec_op_sltiu<'a>( - ctx: &'a ExecContext, - arg0: &MiscInputStruct, - layout1: BoundLayout<'a, OpSLTIULayout, Val>, -) -> Result { - // OpSLTIU(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:148) - let x2: DecoderStruct = arg0.decoded; - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:57) - // OpSLTIU(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:149) - let x3: Val = (x2.opcode._super - Val::new(19)); - eqz!(x3, "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :57:19) at OpSLTIU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :149:18)))"); - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:58) - eqz!((x2.func3 - Val::new(3)), "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at OpSLTIU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :149:18)))"); - // OpSLTIU(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:150) - let x4: CmpLessThanUnsignedStruct = - exec_cmp_less_than_unsigned(ctx, &arg0.rs1._super, &x2.imm_i, (layout1.map(|c| c.cmp)))?; - // SimpleOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:73) - // OpSLTIU(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:151) - let x5: ValU32Struct = arg0._super.pc_u32; - // DenormedValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:20) - // AddU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:27) - // SimpleOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:74) - let x6: DenormedValU32Struct = DenormedValU32Struct { - low: (x5.low + Val::new(4)), - high: x5.high, - }; - // MiscOutput(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:15) - // SimpleOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:75) - let x7: MiscOutputStruct = MiscOutputStruct { - do_write: Val::new(1), - to_write: DenormedValU32Struct { - low: x4.is_less_than, - high: Val::new(0), - }, - new_pc: x6, - }; - return Ok(x7); -} -pub fn exec_op_beq<'a>( - ctx: &'a ExecContext, - arg0: &MiscInputStruct, - layout1: BoundLayout<'a, OpBEQLayout, Val>, -) -> Result { - // OpBEQ(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:154) - let x2: DecoderStruct = arg0.decoded; - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:57) - // OpBEQ(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:155) - let x3: Val = (x2.opcode._super - Val::new(99)); - eqz!(x3, "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :57:19) at OpBEQ ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :155:18)))"); - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:58) - eqz!(x2.func3, "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at OpBEQ ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :155:18)))"); - // OpBEQ(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:156) - let x4: CmpEqualStruct = exec_cmp_equal( - ctx, - &arg0.rs1._super, - &arg0.rs2._super, - (layout1.map(|c| c.cmp)), - )?; - let x5: Val = x4.is_equal._super._super; - // CmpOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:78) - // OpBEQ(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:157) - let x6: ValU32Struct = arg0._super.pc_u32; - let x7: ValU32Struct = x2.imm_b; - // AddU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:26) - // CmpOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:80) - let x8: Val = x6.low; - let x9: Val = x6.high; - // CondDenormed(zirgen/circuit/rv32im/v2/dsl/u32.zir:101) - // CmpOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:79) - let x10: Val = (Val::new(1) - x5); - // DenormedValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:20) - // CondDenormed(zirgen/circuit/rv32im/v2/dsl/u32.zir:100) - let x11: DenormedValU32Struct = DenormedValU32Struct { - low: ((x5 * (x8 + x7.low)) + (x10 * (x8 + Val::new(4)))), - high: ((x5 * (x9 + x7.high)) + (x10 * x9)), - }; - // MiscOutput(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:15) - // CmpOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:82) - let x12: MiscOutputStruct = MiscOutputStruct { - do_write: Val::new(0), - to_write: DenormedValU32Struct { - low: Val::new(0), - high: Val::new(0), - }, - new_pc: x11, - }; - return Ok(x12); -} -pub fn exec_op_bne<'a>( - ctx: &'a ExecContext, - arg0: &MiscInputStruct, - layout1: BoundLayout<'a, OpBNELayout, Val>, -) -> Result { - // OpBNE(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:160) - let x2: DecoderStruct = arg0.decoded; - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:57) - // OpBNE(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:161) - let x3: Val = (x2.opcode._super - Val::new(99)); - eqz!(x3, "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :57:19) at OpBNE ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :161:18)))"); - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:58) - eqz!((x2.func3 - Val::new(1)), "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at OpBNE ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :161:18)))"); - // OpBNE(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:162) - let x4: CmpEqualStruct = exec_cmp_equal( - ctx, - &arg0.rs1._super, - &arg0.rs2._super, - (layout1.map(|c| c.cmp)), - )?; - let x5: Val = x4.is_equal._super._super; - // OpBNE(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:163) - let x6: Val = (Val::new(1) - x5); - // CmpOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:78) - let x7: ValU32Struct = arg0._super.pc_u32; - let x8: ValU32Struct = x2.imm_b; - // AddU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:26) - // CmpOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:80) - let x9: Val = x7.low; - let x10: Val = x7.high; - // CondDenormed(zirgen/circuit/rv32im/v2/dsl/u32.zir:101) - // CmpOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:79) - let x11: Val = (Val::new(1) - x6); - // DenormedValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:20) - // CondDenormed(zirgen/circuit/rv32im/v2/dsl/u32.zir:100) - let x12: DenormedValU32Struct = DenormedValU32Struct { - low: ((x6 * (x9 + x8.low)) + (x11 * (x9 + Val::new(4)))), - high: ((x6 * (x10 + x8.high)) + (x11 * x10)), - }; - // MiscOutput(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:15) - // CmpOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:82) - let x13: MiscOutputStruct = MiscOutputStruct { - do_write: Val::new(0), - to_write: DenormedValU32Struct { - low: Val::new(0), - high: Val::new(0), - }, - new_pc: x12, - }; - return Ok(x13); -} -pub fn exec_op_blt<'a>( - ctx: &'a ExecContext, - arg0: &MiscInputStruct, - layout1: BoundLayout<'a, OpBLTLayout, Val>, -) -> Result { - // OpBLT(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:166) - let x2: DecoderStruct = arg0.decoded; - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:57) - // OpBLT(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:167) - let x3: Val = (x2.opcode._super - Val::new(99)); - eqz!(x3, "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :57:19) at OpBLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :167:18)))"); - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:58) - eqz!((x2.func3 - Val::new(4)), "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at OpBLT ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :167:18)))"); - // OpBLT(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:168) - let x4: CmpLessThanStruct = exec_cmp_less_than( - ctx, - &arg0.rs1._super, - &arg0.rs2._super, - (layout1.map(|c| c.cmp)), - )?; - let x5: Val = x4.is_less_than._super._super; - // CmpOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:78) - // OpBLT(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:169) - let x6: ValU32Struct = arg0._super.pc_u32; - let x7: ValU32Struct = x2.imm_b; - // AddU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:26) - // CmpOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:80) - let x8: Val = x6.low; - let x9: Val = x6.high; - // CondDenormed(zirgen/circuit/rv32im/v2/dsl/u32.zir:101) - // CmpOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:79) - let x10: Val = (Val::new(1) - x5); - // DenormedValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:20) - // CondDenormed(zirgen/circuit/rv32im/v2/dsl/u32.zir:100) - let x11: DenormedValU32Struct = DenormedValU32Struct { - low: ((x5 * (x8 + x7.low)) + (x10 * (x8 + Val::new(4)))), - high: ((x5 * (x9 + x7.high)) + (x10 * x9)), - }; - // MiscOutput(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:15) - // CmpOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:82) - let x12: MiscOutputStruct = MiscOutputStruct { - do_write: Val::new(0), - to_write: DenormedValU32Struct { - low: Val::new(0), - high: Val::new(0), - }, - new_pc: x11, - }; - return Ok(x12); -} -pub fn exec_misc1<'a>( - ctx: &'a ExecContext, - arg0: &RegStruct, - arg1: &InstInputStruct, - layout2: BoundLayout<'a, Misc1Layout, Val>, -) -> Result { - // Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45) - let x3: BoundLayout = (layout2.map(|c| c.misc_output)); - // Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:44) - let x4: MiscInputStruct = exec_misc_input(ctx, arg0, arg1, (layout2.map(|c| c.input)))?; - let x5: NondetRegStruct8Array = x4._super.minor_onehot._super; - // Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45) - let x6: BoundLayout = (x3.map(|c| c.arm0)); - let x7: BoundLayout = (x3.map(|c| c.arm1)); - let x8: BoundLayout = (x3.map(|c| c.arm2)); - let x9: BoundLayout = (x3.map(|c| c.arm4)); - let x10: BoundLayout = (x3.map(|c| c.arm5)); - let x11: BoundLayout = (x3.map(|c| c.arm6)); - let x12: BoundLayout = (((x6.map(|c| c._extra0)).map(|c| c.count)).map(|c| c._super)); - let x13: BoundLayout = (((x6.map(|c| c._extra1)).map(|c| c.count)).map(|c| c._super)); - let x14: BoundLayout = (((x6.map(|c| c._extra2)).map(|c| c.count)).map(|c| c._super)); - let x15: BoundLayout = (((x6.map(|c| c._extra3)).map(|c| c.count)).map(|c| c._super)); - let x16: BoundLayout = (((x6.map(|c| c._extra4)).map(|c| c.count)).map(|c| c._super)); - let x17: BoundLayout = (((x7.map(|c| c._extra0)).map(|c| c.count)).map(|c| c._super)); - let x18: BoundLayout = (((x7.map(|c| c._extra1)).map(|c| c.count)).map(|c| c._super)); - let x19: BoundLayout = (((x7.map(|c| c._extra2)).map(|c| c.count)).map(|c| c._super)); - let x20: BoundLayout = (((x7.map(|c| c._extra3)).map(|c| c.count)).map(|c| c._super)); - let x21: BoundLayout = (((x7.map(|c| c._extra4)).map(|c| c.count)).map(|c| c._super)); - let x22: BoundLayout = (((x8.map(|c| c._extra0)).map(|c| c.count)).map(|c| c._super)); - let x23: BoundLayout = (((x8.map(|c| c._extra1)).map(|c| c.count)).map(|c| c._super)); - let x24: BoundLayout = (((x8.map(|c| c._extra2)).map(|c| c.count)).map(|c| c._super)); - let x25: BoundLayout = (((x8.map(|c| c._extra3)).map(|c| c.count)).map(|c| c._super)); - let x26: BoundLayout = (((x8.map(|c| c._extra4)).map(|c| c.count)).map(|c| c._super)); - let x27: BoundLayout = (((x9.map(|c| c._extra0)).map(|c| c.count)).map(|c| c._super)); - let x28: BoundLayout = (((x9.map(|c| c._extra1)).map(|c| c.count)).map(|c| c._super)); - let x29: BoundLayout = (((x9.map(|c| c._extra2)).map(|c| c.count)).map(|c| c._super)); - let x30: BoundLayout = (((x10.map(|c| c._extra0)).map(|c| c.count)).map(|c| c._super)); - let x31: BoundLayout = (((x10.map(|c| c._extra1)).map(|c| c.count)).map(|c| c._super)); - let x32: BoundLayout = (((x10.map(|c| c._extra2)).map(|c| c.count)).map(|c| c._super)); - let x33: BoundLayout = (((x10.map(|c| c._extra3)).map(|c| c.count)).map(|c| c._super)); - let x34: BoundLayout = (((x10.map(|c| c._extra4)).map(|c| c.count)).map(|c| c._super)); - let x35: BoundLayout = (((x11.map(|c| c._extra0)).map(|c| c.count)).map(|c| c._super)); - let x36: BoundLayout = (((x11.map(|c| c._extra1)).map(|c| c.count)).map(|c| c._super)); - let x37: BoundLayout = (((x11.map(|c| c._extra2)).map(|c| c.count)).map(|c| c._super)); - let x38: BoundLayout = (((x11.map(|c| c._extra3)).map(|c| c.count)).map(|c| c._super)); - let x39: BoundLayout = (((x11.map(|c| c._extra4)).map(|c| c.count)).map(|c| c._super)); - let x40: MiscOutputStruct; - if is_true(x5[to_usize(Val::new(0))]._super) { - // Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:46) - let x41: MiscOutputStruct = exec_op_xori(ctx, &x4, (x6.map(|c| c._super)))?; - // Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45) - x12.store(ctx, Val::new(0)); - eqz!( - x12.load(ctx, 0), - "Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45)" - ); - x13.store(ctx, Val::new(0)); - eqz!( - x13.load(ctx, 0), - "Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45)" - ); - x14.store(ctx, Val::new(0)); - eqz!( - x14.load(ctx, 0), - "Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45)" - ); - x15.store(ctx, Val::new(0)); - eqz!( - x15.load(ctx, 0), - "Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45)" - ); - x16.store(ctx, Val::new(0)); - eqz!( - x16.load(ctx, 0), - "Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45)" - ); - x40 = x41; - } else if is_true(x5[to_usize(Val::new(1))]._super) { - // Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:47) - let x42: MiscOutputStruct = exec_op_ori(ctx, &x4, (x7.map(|c| c._super)))?; - // Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45) - x17.store(ctx, Val::new(0)); - eqz!( - x17.load(ctx, 0), - "Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45)" - ); - x18.store(ctx, Val::new(0)); - eqz!( - x18.load(ctx, 0), - "Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45)" - ); - x19.store(ctx, Val::new(0)); - eqz!( - x19.load(ctx, 0), - "Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45)" - ); - x20.store(ctx, Val::new(0)); - eqz!( - x20.load(ctx, 0), - "Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45)" - ); - x21.store(ctx, Val::new(0)); - eqz!( - x21.load(ctx, 0), - "Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45)" - ); - x40 = x42; - } else if is_true(x5[to_usize(Val::new(2))]._super) { - // Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:48) - let x43: MiscOutputStruct = exec_op_andi(ctx, &x4, (x8.map(|c| c._super)))?; - // Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45) - x22.store(ctx, Val::new(0)); - eqz!( - x22.load(ctx, 0), - "Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45)" - ); - x23.store(ctx, Val::new(0)); - eqz!( - x23.load(ctx, 0), - "Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45)" - ); - x24.store(ctx, Val::new(0)); - eqz!( - x24.load(ctx, 0), - "Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45)" - ); - x25.store(ctx, Val::new(0)); - eqz!( - x25.load(ctx, 0), - "Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45)" - ); - x26.store(ctx, Val::new(0)); - eqz!( - x26.load(ctx, 0), - "Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45)" - ); - x40 = x43; - } else if is_true(x5[to_usize(Val::new(3))]._super) { - // Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:49) - let x44: MiscOutputStruct = exec_op_slti(ctx, &x4, (x3.map(|c| c.arm3)))?; - x40 = x44; - } else if is_true(x5[to_usize(Val::new(4))]._super) { - // Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:50) - let x45: MiscOutputStruct = exec_op_sltiu(ctx, &x4, (x9.map(|c| c._super)))?; - // Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45) - x27.store(ctx, Val::new(0)); - eqz!( - x27.load(ctx, 0), - "Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45)" - ); - x28.store(ctx, Val::new(0)); - eqz!( - x28.load(ctx, 0), - "Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45)" - ); - x29.store(ctx, Val::new(0)); - eqz!( - x29.load(ctx, 0), - "Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45)" - ); - x40 = x45; - } else if is_true(x5[to_usize(Val::new(5))]._super) { - // Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:51) - let x46: MiscOutputStruct = exec_op_beq(ctx, &x4, (x10.map(|c| c._super)))?; - // Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45) - x30.store(ctx, Val::new(0)); - eqz!( - x30.load(ctx, 0), - "Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45)" - ); - x31.store(ctx, Val::new(0)); - eqz!( - x31.load(ctx, 0), - "Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45)" - ); - x32.store(ctx, Val::new(0)); - eqz!( - x32.load(ctx, 0), - "Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45)" - ); - x33.store(ctx, Val::new(0)); - eqz!( - x33.load(ctx, 0), - "Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45)" - ); - x34.store(ctx, Val::new(0)); - eqz!( - x34.load(ctx, 0), - "Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45)" - ); - x40 = x46; - } else if is_true(x5[to_usize(Val::new(6))]._super) { - // Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:52) - let x47: MiscOutputStruct = exec_op_bne(ctx, &x4, (x11.map(|c| c._super)))?; - // Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45) - x35.store(ctx, Val::new(0)); - eqz!( - x35.load(ctx, 0), - "Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45)" - ); - x36.store(ctx, Val::new(0)); - eqz!( - x36.load(ctx, 0), - "Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45)" - ); - x37.store(ctx, Val::new(0)); - eqz!( - x37.load(ctx, 0), - "Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45)" - ); - x38.store(ctx, Val::new(0)); - eqz!( - x38.load(ctx, 0), - "Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45)" - ); - x39.store(ctx, Val::new(0)); - eqz!( - x39.load(ctx, 0), - "Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:45)" - ); - x40 = x47; - } else if is_true(x5[to_usize(Val::new(7))]._super) { - // Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:53) - let x48: MiscOutputStruct = exec_op_blt(ctx, &x4, (x3.map(|c| c.arm7)))?; - x40 = x48; - } else { - bail!("Reached unreachable mux arm") - } // Misc1(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:55) - let x49: InstOutputStruct = - exec_finalize_misc(ctx, arg0, &x4, &x40, (layout2.map(|c| c._super)))?; - return Ok(x49); -} -pub fn exec_op_bge<'a>( - ctx: &'a ExecContext, - arg0: &MiscInputStruct, - layout1: BoundLayout<'a, OpBGELayout, Val>, -) -> Result { - // OpBGE(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:172) - let x2: DecoderStruct = arg0.decoded; - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:57) - // OpBGE(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:173) - let x3: Val = (x2.opcode._super - Val::new(99)); - eqz!(x3, "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :57:19) at OpBGE ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :173:18)))"); - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:58) - eqz!((x2.func3 - Val::new(5)), "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at OpBGE ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :173:18)))"); - // OpBGE(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:174) - let x4: CmpLessThanStruct = exec_cmp_less_than( - ctx, - &arg0.rs1._super, - &arg0.rs2._super, - (layout1.map(|c| c.cmp)), - )?; - let x5: Val = x4.is_less_than._super._super; - // OpBGE(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:175) - let x6: Val = (Val::new(1) - x5); - // CmpOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:78) - let x7: ValU32Struct = arg0._super.pc_u32; - let x8: ValU32Struct = x2.imm_b; - // AddU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:26) - // CmpOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:80) - let x9: Val = x7.low; - let x10: Val = x7.high; - // CondDenormed(zirgen/circuit/rv32im/v2/dsl/u32.zir:101) - // CmpOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:79) - let x11: Val = (Val::new(1) - x6); - // DenormedValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:20) - // CondDenormed(zirgen/circuit/rv32im/v2/dsl/u32.zir:100) - let x12: DenormedValU32Struct = DenormedValU32Struct { - low: ((x6 * (x9 + x8.low)) + (x11 * (x9 + Val::new(4)))), - high: ((x6 * (x10 + x8.high)) + (x11 * x10)), - }; - // MiscOutput(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:15) - // CmpOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:82) - let x13: MiscOutputStruct = MiscOutputStruct { - do_write: Val::new(0), - to_write: DenormedValU32Struct { - low: Val::new(0), - high: Val::new(0), - }, - new_pc: x12, - }; - return Ok(x13); -} -pub fn exec_op_bltu<'a>( - ctx: &'a ExecContext, - arg0: &MiscInputStruct, - layout1: BoundLayout<'a, OpBLTULayout, Val>, -) -> Result { - // OpBLTU(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:178) - let x2: DecoderStruct = arg0.decoded; - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:57) - // OpBLTU(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:179) - let x3: Val = (x2.opcode._super - Val::new(99)); - eqz!(x3, "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :57:19) at OpBLTU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :179:18)))"); - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:58) - eqz!((x2.func3 - Val::new(6)), "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at OpBLTU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :179:18)))"); - // OpBLTU(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:180) - let x4: CmpLessThanUnsignedStruct = exec_cmp_less_than_unsigned( - ctx, - &arg0.rs1._super, - &arg0.rs2._super, - (layout1.map(|c| c.cmp)), - )?; - let x5: Val = x4.is_less_than; - // CmpOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:78) - // OpBLTU(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:181) - let x6: ValU32Struct = arg0._super.pc_u32; - let x7: ValU32Struct = x2.imm_b; - // AddU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:26) - // CmpOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:80) - let x8: Val = x6.low; - let x9: Val = x6.high; - // CondDenormed(zirgen/circuit/rv32im/v2/dsl/u32.zir:101) - // CmpOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:79) - let x10: Val = (Val::new(1) - x5); - // DenormedValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:20) - // CondDenormed(zirgen/circuit/rv32im/v2/dsl/u32.zir:100) - let x11: DenormedValU32Struct = DenormedValU32Struct { - low: ((x5 * (x8 + x7.low)) + (x10 * (x8 + Val::new(4)))), - high: ((x5 * (x9 + x7.high)) + (x10 * x9)), - }; - // MiscOutput(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:15) - // CmpOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:82) - let x12: MiscOutputStruct = MiscOutputStruct { - do_write: Val::new(0), - to_write: DenormedValU32Struct { - low: Val::new(0), - high: Val::new(0), - }, - new_pc: x11, - }; - return Ok(x12); -} -pub fn exec_op_bgeu<'a>( - ctx: &'a ExecContext, - arg0: &MiscInputStruct, - layout1: BoundLayout<'a, OpBGEULayout, Val>, -) -> Result { - // OpBGEU(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:184) - let x2: DecoderStruct = arg0.decoded; - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:57) - // OpBGEU(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:185) - let x3: Val = (x2.opcode._super - Val::new(99)); - eqz!(x3, "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :57:19) at OpBGEU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :185:18)))"); - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:58) - eqz!((x2.func3 - Val::new(7)), "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at OpBGEU ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :185:18)))"); - // OpBGEU(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:186) - let x4: CmpLessThanUnsignedStruct = exec_cmp_less_than_unsigned( - ctx, - &arg0.rs1._super, - &arg0.rs2._super, - (layout1.map(|c| c.cmp)), - )?; - // OpBGEU(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:187) - let x5: Val = (Val::new(1) - x4.is_less_than); - // CmpOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:78) - let x6: ValU32Struct = arg0._super.pc_u32; - let x7: ValU32Struct = x2.imm_b; - // AddU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:26) - // CmpOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:80) - let x8: Val = x6.low; - let x9: Val = x6.high; - // CondDenormed(zirgen/circuit/rv32im/v2/dsl/u32.zir:101) - // CmpOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:79) - let x10: Val = (Val::new(1) - x5); - // DenormedValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:20) - // CondDenormed(zirgen/circuit/rv32im/v2/dsl/u32.zir:100) - let x11: DenormedValU32Struct = DenormedValU32Struct { - low: ((x5 * (x8 + x7.low)) + (x10 * (x8 + Val::new(4)))), - high: ((x5 * (x9 + x7.high)) + (x10 * x9)), - }; - // MiscOutput(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:15) - // CmpOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:82) - let x12: MiscOutputStruct = MiscOutputStruct { - do_write: Val::new(0), - to_write: DenormedValU32Struct { - low: Val::new(0), - high: Val::new(0), - }, - new_pc: x11, - }; - return Ok(x12); -} -pub fn exec_misc2<'a>( - ctx: &'a ExecContext, - arg0: &RegStruct, - arg1: &InstInputStruct, - layout2: BoundLayout<'a, Misc2Layout, Val>, -) -> Result { - // Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60) - let x3: BoundLayout = (layout2.map(|c| c.misc_output)); - // Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:59) - let x4: MiscInputStruct = exec_misc_input(ctx, arg0, arg1, (layout2.map(|c| c.input)))?; - let x5: InstInputStruct = x4._super; - let x6: NondetRegStruct8Array = x5.minor_onehot._super; - // Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60) - let x7: BoundLayout = (x3.map(|c| c.arm1)); - let x8: BoundLayout = (x3.map(|c| c.arm2)); - let x9: BoundLayout = (x3.map(|c| c.arm3)); - let x10: BoundLayout = (x3.map(|c| c.arm4)); - let x11: BoundLayout = (x3.map(|c| c.arm5)); - let x12: BoundLayout = (x3.map(|c| c.arm6)); - let x13: BoundLayout = (x3.map(|c| c.arm7)); - let x14: BoundLayout = (((x7.map(|c| c._extra0)).map(|c| c.count)).map(|c| c._super)); - let x15: BoundLayout = (((x7.map(|c| c._extra1)).map(|c| c.count)).map(|c| c._super)); - let x16: BoundLayout = (((x7.map(|c| c._extra2)).map(|c| c.count)).map(|c| c._super)); - let x17: BoundLayout = (((x8.map(|c| c._extra0)).map(|c| c.count)).map(|c| c._super)); - let x18: BoundLayout = (((x8.map(|c| c._extra1)).map(|c| c.count)).map(|c| c._super)); - let x19: BoundLayout = (((x8.map(|c| c._extra2)).map(|c| c.count)).map(|c| c._super)); - // OpJAL(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:190) - // Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:64) - let x20: DecoderStruct = x4.decoded; - // VerifyOpcode(zirgen/circuit/rv32im/v2/dsl/inst.zir:52) - // OpJAL(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:191) - let x21: Val = x20.opcode._super; - // OpJAL(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:190) - let x22: ValU32Struct = x5.pc_u32; - // AddU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:26) - // OpJAL(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:193) - let x23: Val = x22.low; - let x24: Val = x22.high; - // DenormedValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:20) - // AddU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:27) - let x25: DenormedValU32Struct = DenormedValU32Struct { - low: (x23 + Val::new(4)), - high: x24, - }; - // OpJAL(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:190) - let x26: ValU32Struct = x20.imm_j; - // Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60) - let x27: BoundLayout = (((x9.map(|c| c._extra0)).map(|c| c.count)).map(|c| c._super)); - let x28: BoundLayout = (((x9.map(|c| c._extra1)).map(|c| c.count)).map(|c| c._super)); - let x29: BoundLayout = (((x9.map(|c| c._extra2)).map(|c| c.count)).map(|c| c._super)); - let x30: BoundLayout = (((x9.map(|c| c._extra3)).map(|c| c.count)).map(|c| c._super)); - let x31: BoundLayout = (((x9.map(|c| c._extra4)).map(|c| c.count)).map(|c| c._super)); - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:56) - // OpJALR(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:198) - // Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:65) - let x32: Val = x20.func3; - // OpJALR(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:197) - let x33: ValU32Struct = x20.imm_i; - let x34: ValU32Struct = x4.rs1._super; - // DenormedValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:20) - // AddU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:27) - // OpJALR(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:201) - let x35: DenormedValU32Struct = DenormedValU32Struct { - low: (x34.low + x33.low), - high: (x34.high + x33.high), - }; - // Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60) - let x36: BoundLayout = (((x10.map(|c| c._extra0)).map(|c| c.count)).map(|c| c._super)); - let x37: BoundLayout = (((x10.map(|c| c._extra1)).map(|c| c.count)).map(|c| c._super)); - let x38: BoundLayout = (((x10.map(|c| c._extra2)).map(|c| c.count)).map(|c| c._super)); - let x39: BoundLayout = (((x10.map(|c| c._extra3)).map(|c| c.count)).map(|c| c._super)); - let x40: BoundLayout = (((x10.map(|c| c._extra4)).map(|c| c.count)).map(|c| c._super)); - // OpLUI(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:204) - // Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:66) - let x41: ValU32Struct = x20.imm_u; - // Denorm(zirgen/circuit/rv32im/v2/dsl/u32.zir:37) - // OpLUI(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:206) - let x42: Val = x41.low; - let x43: Val = x41.high; - // Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60) - let x44: BoundLayout = (((x11.map(|c| c._extra0)).map(|c| c.count)).map(|c| c._super)); - let x45: BoundLayout = (((x11.map(|c| c._extra1)).map(|c| c.count)).map(|c| c._super)); - let x46: BoundLayout = (((x11.map(|c| c._extra2)).map(|c| c.count)).map(|c| c._super)); - let x47: BoundLayout = (((x11.map(|c| c._extra3)).map(|c| c.count)).map(|c| c._super)); - let x48: BoundLayout = (((x11.map(|c| c._extra4)).map(|c| c.count)).map(|c| c._super)); - // MiscOutput(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:15) - // SimpleOp(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:75) - // OpAUIPC(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:211) - // Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:67) - let x49: MiscOutputStruct = MiscOutputStruct { - do_write: Val::new(1), - to_write: DenormedValU32Struct { - low: (x23 + x42), - high: (x24 + x43), - }, - new_pc: x25.clone(), - }; - // Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60) - let x50: BoundLayout = (((x12.map(|c| c._extra0)).map(|c| c.count)).map(|c| c._super)); - let x51: BoundLayout = (((x12.map(|c| c._extra1)).map(|c| c.count)).map(|c| c._super)); - let x52: BoundLayout = (((x12.map(|c| c._extra2)).map(|c| c.count)).map(|c| c._super)); - let x53: BoundLayout = (((x12.map(|c| c._extra3)).map(|c| c.count)).map(|c| c._super)); - let x54: BoundLayout = (((x12.map(|c| c._extra4)).map(|c| c.count)).map(|c| c._super)); - // MiscOutput(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:15) - // OpECALL(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:217) - // Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:68) - let x55: MiscOutputStruct = MiscOutputStruct { - do_write: Val::new(0), - to_write: DenormedValU32Struct { - low: Val::new(0), - high: Val::new(0), - }, - new_pc: DenormedValU32Struct { - low: x23, - high: x24, - }, - }; - // Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60) - let x56: BoundLayout = (((x13.map(|c| c._extra0)).map(|c| c.count)).map(|c| c._super)); - let x57: BoundLayout = (((x13.map(|c| c._extra1)).map(|c| c.count)).map(|c| c._super)); - let x58: BoundLayout = (((x13.map(|c| c._extra2)).map(|c| c.count)).map(|c| c._super)); - let x59: BoundLayout = (((x13.map(|c| c._extra3)).map(|c| c.count)).map(|c| c._super)); - let x60: BoundLayout = (((x13.map(|c| c._extra4)).map(|c| c.count)).map(|c| c._super)); - let x61: MiscOutputStruct; - if is_true(x6[to_usize(Val::new(0))]._super) { - // Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:61) - let x62: MiscOutputStruct = exec_op_bge(ctx, &x4, (x3.map(|c| c.arm0)))?; - x61 = x62; - } else if is_true(x6[to_usize(Val::new(1))]._super) { - // Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:62) - let x63: MiscOutputStruct = exec_op_bltu(ctx, &x4, (x7.map(|c| c._super)))?; - // Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60) - x14.store(ctx, Val::new(0)); - eqz!( - x14.load(ctx, 0), - "Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60)" - ); - x15.store(ctx, Val::new(0)); - eqz!( - x15.load(ctx, 0), - "Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60)" - ); - x16.store(ctx, Val::new(0)); - eqz!( - x16.load(ctx, 0), - "Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60)" - ); - x61 = x63; - } else if is_true(x6[to_usize(Val::new(2))]._super) { - // Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:63) - let x64: MiscOutputStruct = exec_op_bgeu(ctx, &x4, (x8.map(|c| c._super)))?; - // Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60) - x17.store(ctx, Val::new(0)); - eqz!( - x17.load(ctx, 0), - "Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60)" - ); - x18.store(ctx, Val::new(0)); - eqz!( - x18.load(ctx, 0), - "Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60)" - ); - x19.store(ctx, Val::new(0)); - eqz!( - x19.load(ctx, 0), - "Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60)" - ); - x61 = x64; - } else if is_true(x6[to_usize(Val::new(3))]._super) { - // VerifyOpcode(zirgen/circuit/rv32im/v2/dsl/inst.zir:53) - // OpJAL(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:191) - // Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:64) - eqz!((x21 - Val::new(111)), "loc(callsite( VerifyOpcode ( zirgen/circuit/rv32im/v2/dsl/inst.zir :53:19) at callsite( OpJAL ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :191:16) at Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :64:11))))"); - // Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60) - x27.store(ctx, Val::new(0)); - eqz!( - x27.load(ctx, 0), - "Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60)" - ); - x28.store(ctx, Val::new(0)); - eqz!( - x28.load(ctx, 0), - "Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60)" - ); - x29.store(ctx, Val::new(0)); - eqz!( - x29.load(ctx, 0), - "Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60)" - ); - x30.store(ctx, Val::new(0)); - eqz!( - x30.load(ctx, 0), - "Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60)" - ); - x31.store(ctx, Val::new(0)); - eqz!( - x31.load(ctx, 0), - "Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60)" - ); - x61 = MiscOutputStruct { - do_write: Val::new(1), - to_write: x25.clone(), - new_pc: DenormedValU32Struct { - low: (x23 + x26.low), - high: (x24 + x26.high), - }, - }; - } else if is_true(x6[to_usize(Val::new(4))]._super) { - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:57) - // OpJALR(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:198) - // Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:65) - eqz!((x21 - Val::new(103)), "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :57:19) at callsite( OpJALR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :198:18) at Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :65:12))))"); - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:58) - eqz!(x32, "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at callsite( OpJALR ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :198:18) at Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :65:12))))"); - // Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60) - x36.store(ctx, Val::new(0)); - eqz!( - x36.load(ctx, 0), - "Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60)" - ); - x37.store(ctx, Val::new(0)); - eqz!( - x37.load(ctx, 0), - "Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60)" - ); - x38.store(ctx, Val::new(0)); - eqz!( - x38.load(ctx, 0), - "Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60)" - ); - x39.store(ctx, Val::new(0)); - eqz!( - x39.load(ctx, 0), - "Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60)" - ); - x40.store(ctx, Val::new(0)); - eqz!( - x40.load(ctx, 0), - "Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60)" - ); - x61 = MiscOutputStruct { - do_write: Val::new(1), - to_write: x25.clone(), - new_pc: x35, - }; - } else if is_true(x6[to_usize(Val::new(5))]._super) { - // VerifyOpcode(zirgen/circuit/rv32im/v2/dsl/inst.zir:53) - // OpLUI(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:205) - // Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:66) - eqz!((x21 - Val::new(55)), "loc(callsite( VerifyOpcode ( zirgen/circuit/rv32im/v2/dsl/inst.zir :53:19) at callsite( OpLUI ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :205:16) at Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :66:11))))"); - // Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60) - x44.store(ctx, Val::new(0)); - eqz!( - x44.load(ctx, 0), - "Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60)" - ); - x45.store(ctx, Val::new(0)); - eqz!( - x45.load(ctx, 0), - "Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60)" - ); - x46.store(ctx, Val::new(0)); - eqz!( - x46.load(ctx, 0), - "Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60)" - ); - x47.store(ctx, Val::new(0)); - eqz!( - x47.load(ctx, 0), - "Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60)" - ); - x48.store(ctx, Val::new(0)); - eqz!( - x48.load(ctx, 0), - "Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60)" - ); - x61 = MiscOutputStruct { - do_write: Val::new(1), - to_write: DenormedValU32Struct { - low: x42, - high: x43, - }, - new_pc: x25, - }; - } else if is_true(x6[to_usize(Val::new(6))]._super) { - // VerifyOpcode(zirgen/circuit/rv32im/v2/dsl/inst.zir:53) - // OpAUIPC(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:210) - // Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:67) - eqz!((x21 - Val::new(23)), "loc(callsite( VerifyOpcode ( zirgen/circuit/rv32im/v2/dsl/inst.zir :53:19) at callsite( OpAUIPC ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :210:16) at Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :67:13))))"); - // Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60) - x50.store(ctx, Val::new(0)); - eqz!( - x50.load(ctx, 0), - "Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60)" - ); - x51.store(ctx, Val::new(0)); - eqz!( - x51.load(ctx, 0), - "Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60)" - ); - x52.store(ctx, Val::new(0)); - eqz!( - x52.load(ctx, 0), - "Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60)" - ); - x53.store(ctx, Val::new(0)); - eqz!( - x53.load(ctx, 0), - "Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60)" - ); - x54.store(ctx, Val::new(0)); - eqz!( - x54.load(ctx, 0), - "Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60)" - ); - x61 = x49; - } else if is_true(x6[to_usize(Val::new(7))]._super) { - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:62) - // OpECALL(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:216) - // Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:68) - eqz!((x21 - Val::new(115)), "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :62:19) at callsite( OpECALL ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :216:20) at Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :68:13))))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:63) - eqz!(x32, "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at callsite( OpECALL ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :216:20) at Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :68:13))))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:64) - eqz!(x20.func7, "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at callsite( OpECALL ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :216:20) at Misc2 ( zirgen/circuit/rv32im/v2/dsl/inst_misc.zir :68:13))))"); - // Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60) - x56.store(ctx, Val::new(0)); - eqz!( - x56.load(ctx, 0), - "Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60)" - ); - x57.store(ctx, Val::new(0)); - eqz!( - x57.load(ctx, 0), - "Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60)" - ); - x58.store(ctx, Val::new(0)); - eqz!( - x58.load(ctx, 0), - "Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60)" - ); - x59.store(ctx, Val::new(0)); - eqz!( - x59.load(ctx, 0), - "Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60)" - ); - x60.store(ctx, Val::new(0)); - eqz!( - x60.load(ctx, 0), - "Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:60)" - ); - x61 = x55; - } else { - bail!("Reached unreachable mux arm") - } // Misc2(zirgen/circuit/rv32im/v2/dsl/inst_misc.zir:70) - let x65: InstOutputStruct = - exec_finalize_misc(ctx, arg0, &x4, &x61, (layout2.map(|c| c._super)))?; - return Ok(x65); -} -pub fn exec_mul_input<'a>( - ctx: &'a ExecContext, - arg0: &RegStruct, - arg1: &InstInputStruct, - layout2: BoundLayout<'a, MulInputLayout, Val>, -) -> Result { - // MulInput(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:8) - eqz!( - (arg1.state - Val::new(32)), - "MulInput(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:8)" - ); - // MulInput(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:10) - let x3: DecoderStruct = exec_decode_inst(ctx, arg0, arg1, (layout2.map(|c| c.decoded)))?; - // MulInput(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:11) - let x4: GetDataStruct = exec_read_reg(ctx, arg0, arg1, x3.rs1, (layout2.map(|c| c.rs1)))?; - // MulInput(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:12) - let x5: GetDataStruct = exec_read_reg(ctx, arg0, arg1, x3.rs2, (layout2.map(|c| c.rs2)))?; - return Ok(MulInputStruct { - _super: arg1.clone(), - ii: arg1.clone(), - decoded: x3, - rs1: x4, - rs2: x5, - }); -} -pub fn exec_do_mul<'a>( - ctx: &'a ExecContext, - arg0: &ValU32Struct, - arg1: &ValU32Struct, - arg2: Val, - arg3: Val, - layout4: BoundLayout<'a, DoMulLayout, Val>, -) -> Result { - // DoMul(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:40) - let x5: MultiplyAccumulateStruct = exec_multiply_accumulate( - ctx, - arg0, - arg1, - &ValU32Struct { - low: Val::new(0), - high: Val::new(0), - }, - &MultiplySettingsStruct { - a_signed: arg2, - b_signed: arg3, - c_signed: Val::new(0), - }, - (layout4.map(|c| c.mul)), - )?; - return Ok(DoMulStruct { - low: x5.out_low, - high: x5.out_high, - }); -} -pub fn exec_op_sll<'a>( - ctx: &'a ExecContext, - arg0: &MulInputStruct, - layout1: BoundLayout<'a, OpSLLLayout, Val>, -) -> Result { - // OpSLL(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:45) - let x2: DecoderStruct = arg0.decoded; - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:62) - // OpSLL(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:46) - let x3: Val = (x2.opcode._super - Val::new(51)); - eqz!(x3, "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :62:19) at OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :46:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:63) - eqz!((x2.func3 - Val::new(1)), "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :46:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:64) - eqz!(x2.func7, "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at OpSLL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :46:20)))"); - // OpSLL(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:45) - let x4: Val = arg0.rs2._super.low; - // OpSLL(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:47) - let x5: ValU32Struct = exec_dyn_po2(ctx, x4, (layout1.map(|c| c.shift_mul)))?; - // OpSLL(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:48) - let x6: DoMulStruct = exec_do_mul( - ctx, - &arg0.rs1._super, - &x5, - Val::new(0), - Val::new(0), - (layout1.map(|c| c._0)), - )?; - return Ok(x6.low); -} -pub fn exec_op_slli<'a>( - ctx: &'a ExecContext, - arg0: &MulInputStruct, - layout1: BoundLayout<'a, OpSLLILayout, Val>, -) -> Result { - // OpSLLI(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:51) - let x2: DecoderStruct = arg0.decoded; - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:62) - // OpSLLI(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:52) - let x3: Val = (x2.opcode._super - Val::new(19)); - eqz!(x3, "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :62:19) at OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :52:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:63) - eqz!((x2.func3 - Val::new(1)), "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :52:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:64) - eqz!(x2.func7, "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at OpSLLI ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :52:20)))"); - // OpSLLI(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:53) - let x4: ValU32Struct = exec_dyn_po2(ctx, x2.rs2, (layout1.map(|c| c.shift_mul)))?; - // OpSLLI(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:54) - let x5: DoMulStruct = exec_do_mul( - ctx, - &arg0.rs1._super, - &x4, - Val::new(0), - Val::new(0), - (layout1.map(|c| c._0)), - )?; - return Ok(x5.low); -} -pub fn exec_op_mul<'a>( - ctx: &'a ExecContext, - arg0: &MulInputStruct, - layout1: BoundLayout<'a, OpMULLayout, Val>, -) -> Result { - // OpMUL(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:57) - let x2: DecoderStruct = arg0.decoded; - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:62) - // OpMUL(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:58) - let x3: Val = (x2.opcode._super - Val::new(51)); - eqz!(x3, "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :62:19) at OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :58:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:63) - eqz!(x2.func3, "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :58:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:64) - eqz!((x2.func7 - Val::new(1)), "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at OpMUL ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :58:20)))"); - // OpMUL(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:59) - let x4: DoMulStruct = exec_do_mul( - ctx, - &arg0.rs1._super, - &arg0.rs2._super, - Val::new(0), - Val::new(0), - (layout1.map(|c| c._0)), - )?; - return Ok(x4.low); -} -pub fn exec_op_mulh<'a>( - ctx: &'a ExecContext, - arg0: &MulInputStruct, - layout1: BoundLayout<'a, OpMULHLayout, Val>, -) -> Result { - // OpMULH(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:62) - let x2: DecoderStruct = arg0.decoded; - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:62) - // OpMULH(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:63) - let x3: Val = (x2.opcode._super - Val::new(51)); - eqz!(x3, "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :62:19) at OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :63:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:63) - eqz!((x2.func3 - Val::new(1)), "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :63:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:64) - eqz!((x2.func7 - Val::new(1)), "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at OpMULH ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :63:20)))"); - // OpMULH(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:64) - let x4: DoMulStruct = exec_do_mul( - ctx, - &arg0.rs1._super, - &arg0.rs2._super, - Val::new(1), - Val::new(1), - (layout1.map(|c| c._0)), - )?; - return Ok(x4.high); -} -pub fn exec_op_mulhsu<'a>( - ctx: &'a ExecContext, - arg0: &MulInputStruct, - layout1: BoundLayout<'a, OpMULHSULayout, Val>, -) -> Result { - // OpMULHSU(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:67) - let x2: DecoderStruct = arg0.decoded; - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:62) - // OpMULHSU(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:68) - let x3: Val = (x2.opcode._super - Val::new(51)); - eqz!(x3, "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :62:19) at OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :68:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:63) - eqz!((x2.func3 - Val::new(2)), "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :68:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:64) - eqz!((x2.func7 - Val::new(1)), "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at OpMULHSU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :68:20)))"); - // OpMULHSU(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:69) - let x4: DoMulStruct = exec_do_mul( - ctx, - &arg0.rs1._super, - &arg0.rs2._super, - Val::new(1), - Val::new(0), - (layout1.map(|c| c._0)), - )?; - return Ok(x4.high); -} -pub fn exec_op_mulhu<'a>( - ctx: &'a ExecContext, - arg0: &MulInputStruct, - layout1: BoundLayout<'a, OpMULHULayout, Val>, -) -> Result { - // OpMULHU(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:72) - let x2: DecoderStruct = arg0.decoded; - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:62) - // OpMULHU(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:73) - let x3: Val = (x2.opcode._super - Val::new(51)); - eqz!(x3, "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :62:19) at OpMULHU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :73:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:63) - eqz!((x2.func3 - Val::new(3)), "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :63:18) at OpMULHU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :73:20)))"); - // VerifyOpcodeF3F7(zirgen/circuit/rv32im/v2/dsl/inst.zir:64) - eqz!((x2.func7 - Val::new(1)), "loc(callsite( VerifyOpcodeF3F7 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :64:18) at OpMULHU ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :73:20)))"); - // OpMULHU(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:74) - let x4: DoMulStruct = exec_do_mul( - ctx, - &arg0.rs1._super, - &arg0.rs2._super, - Val::new(0), - Val::new(0), - (layout1.map(|c| c._0)), - )?; - return Ok(x4.high); -} -pub fn exec_mul0<'a>( - ctx: &'a ExecContext, - arg0: &RegStruct, - arg1: &InstInputStruct, - layout2: BoundLayout<'a, Mul0Layout, Val>, -) -> Result { - // Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23) - let x3: BoundLayout = (layout2.map(|c| c.mul_output)); - // Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:22) - let x4: MulInputStruct = exec_mul_input(ctx, arg0, arg1, (layout2.map(|c| c.input)))?; - let x5: NondetRegStruct8Array = x4._super.minor_onehot._super; - // Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23) - let x6: BoundLayout = (x3.map(|c| c.arm2)); - let x7: BoundLayout = (x3.map(|c| c.arm3)); - let x8: BoundLayout = (x3.map(|c| c.arm4)); - let x9: BoundLayout = (x3.map(|c| c.arm5)); - let x10: BoundLayout = (x3.map(|c| c.arm6)); - let x11: BoundLayout = (x3.map(|c| c.arm7)); - let x12: BoundLayout = (((x6.map(|c| c._extra0)).map(|c| c.count)).map(|c| c._super)); - let x13: BoundLayout = (((x7.map(|c| c._extra0)).map(|c| c.count)).map(|c| c._super)); - let x14: BoundLayout = (((x8.map(|c| c._extra0)).map(|c| c.count)).map(|c| c._super)); - let x15: BoundLayout = (((x9.map(|c| c._extra0)).map(|c| c.count)).map(|c| c._super)); - // ValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:10) - // IllegalMulOp(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:18) - // Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:30) - let x16: ValU32Struct = ValU32Struct { - low: Val::new(0), - high: Val::new(0), - }; - // Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23) - let x17: BoundLayout = (((x10.map(|c| c._extra0)).map(|c| c.count)).map(|c| c._super)); - let x18: BoundLayout = (((x10.map(|c| c._extra1)).map(|c| c.count)).map(|c| c._super)); - let x19: BoundLayout = (((x10.map(|c| c._extra2)).map(|c| c.count)).map(|c| c._super)); - let x20: BoundLayout = (((x10.map(|c| c._extra3)).map(|c| c.count)).map(|c| c._super)); - let x21: BoundLayout = (((x10.map(|c| c._extra4)).map(|c| c.count)).map(|c| c._super)); - let x22: BoundLayout = (((x10.map(|c| c._extra5)).map(|c| c.count)).map(|c| c._super)); - let x23: BoundLayout = (((x10.map(|c| c._extra6)).map(|c| c.count)).map(|c| c._super)); - let x24: BoundLayout = (((x10.map(|c| c._extra7)).map(|c| c.count)).map(|c| c._super)); - let x25: BoundLayout = (((x10.map(|c| c._extra8)).map(|c| c.count)).map(|c| c._super)); - let x26: BoundLayout = (((x10.map(|c| c._extra9)).map(|c| c.count)).map(|c| c._super)); - let x27: BoundLayout = (((x10.map(|c| c._extra10)).map(|c| c.count)).map(|c| c._super)); - let x28: BoundLayout = (((x10.map(|c| c._extra11)).map(|c| c.count)).map(|c| c._super)); - let x29: BoundLayout = (((x10.map(|c| c._extra12)).map(|c| c.count)).map(|c| c._super)); - let x30: BoundLayout = (((x10.map(|c| c._extra13)).map(|c| c.count)).map(|c| c._super)); - let x31: BoundLayout = (((x10.map(|c| c._extra14)).map(|c| c.count)).map(|c| c._super)); - let x32: BoundLayout = (((x10.map(|c| c._extra15)).map(|c| c.count)).map(|c| c._super)); - let x33: BoundLayout = (((x10.map(|c| c._extra16)).map(|c| c.count)).map(|c| c._super)); - let x34: BoundLayout = (((x10.map(|c| c._extra17)).map(|c| c.count)).map(|c| c._super)); - let x35: BoundLayout = (((x10.map(|c| c._extra18)).map(|c| c.count)).map(|c| c._super)); - let x36: BoundLayout = (((x11.map(|c| c._extra0)).map(|c| c.count)).map(|c| c._super)); - let x37: BoundLayout = (((x11.map(|c| c._extra1)).map(|c| c.count)).map(|c| c._super)); - let x38: BoundLayout = (((x11.map(|c| c._extra2)).map(|c| c.count)).map(|c| c._super)); - let x39: BoundLayout = (((x11.map(|c| c._extra3)).map(|c| c.count)).map(|c| c._super)); - let x40: BoundLayout = (((x11.map(|c| c._extra4)).map(|c| c.count)).map(|c| c._super)); - let x41: BoundLayout = (((x11.map(|c| c._extra5)).map(|c| c.count)).map(|c| c._super)); - let x42: BoundLayout = (((x11.map(|c| c._extra6)).map(|c| c.count)).map(|c| c._super)); - let x43: BoundLayout = (((x11.map(|c| c._extra7)).map(|c| c.count)).map(|c| c._super)); - let x44: BoundLayout = (((x11.map(|c| c._extra8)).map(|c| c.count)).map(|c| c._super)); - let x45: BoundLayout = (((x11.map(|c| c._extra9)).map(|c| c.count)).map(|c| c._super)); - let x46: BoundLayout = (((x11.map(|c| c._extra10)).map(|c| c.count)).map(|c| c._super)); - let x47: BoundLayout = (((x11.map(|c| c._extra11)).map(|c| c.count)).map(|c| c._super)); - let x48: BoundLayout = (((x11.map(|c| c._extra12)).map(|c| c.count)).map(|c| c._super)); - let x49: BoundLayout = (((x11.map(|c| c._extra13)).map(|c| c.count)).map(|c| c._super)); - let x50: BoundLayout = (((x11.map(|c| c._extra14)).map(|c| c.count)).map(|c| c._super)); - let x51: BoundLayout = (((x11.map(|c| c._extra15)).map(|c| c.count)).map(|c| c._super)); - let x52: BoundLayout = (((x11.map(|c| c._extra16)).map(|c| c.count)).map(|c| c._super)); - let x53: BoundLayout = (((x11.map(|c| c._extra17)).map(|c| c.count)).map(|c| c._super)); - let x54: BoundLayout = (((x11.map(|c| c._extra18)).map(|c| c.count)).map(|c| c._super)); - let x55: ValU32Struct; - if is_true(x5[to_usize(Val::new(0))]._super) { - // Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:24) - let x56: ValU32Struct = exec_op_sll(ctx, &x4, (x3.map(|c| c.arm0)))?; - x55 = x56; - } else if is_true(x5[to_usize(Val::new(1))]._super) { - // Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:25) - let x57: ValU32Struct = exec_op_slli(ctx, &x4, (x3.map(|c| c.arm1)))?; - x55 = x57; - } else if is_true(x5[to_usize(Val::new(2))]._super) { - // Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:26) - let x58: ValU32Struct = exec_op_mul(ctx, &x4, (x6.map(|c| c._super)))?; - // Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23) - x12.store(ctx, Val::new(0)); - eqz!( - x12.load(ctx, 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)" - ); - x55 = x58; - } else if is_true(x5[to_usize(Val::new(3))]._super) { - // Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:27) - let x59: ValU32Struct = exec_op_mulh(ctx, &x4, (x7.map(|c| c._super)))?; - // Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23) - x13.store(ctx, Val::new(0)); - eqz!( - x13.load(ctx, 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)" - ); - x55 = x59; - } else if is_true(x5[to_usize(Val::new(4))]._super) { - // Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:28) - let x60: ValU32Struct = exec_op_mulhsu(ctx, &x4, (x8.map(|c| c._super)))?; - // Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23) - x14.store(ctx, Val::new(0)); - eqz!( - x14.load(ctx, 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)" - ); - x55 = x60; - } else if is_true(x5[to_usize(Val::new(5))]._super) { - // Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:29) - let x61: ValU32Struct = exec_op_mulhu(ctx, &x4, (x9.map(|c| c._super)))?; - // Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23) - x15.store(ctx, Val::new(0)); - eqz!( - x15.load(ctx, 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)" - ); - x55 = x61; - } else if is_true(x5[to_usize(Val::new(6))]._super) { - // IllegalMulOp(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:17) - // Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:30) - eqz!(Val::new(2013265920), "loc(callsite( IllegalMulOp ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :17:6) at Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :30:18)))"); - // Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23) - x17.store(ctx, Val::new(0)); - eqz!( - x17.load(ctx, 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)" - ); - x18.store(ctx, Val::new(0)); - eqz!( - x18.load(ctx, 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)" - ); - x19.store(ctx, Val::new(0)); - eqz!( - x19.load(ctx, 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)" - ); - x20.store(ctx, Val::new(0)); - eqz!( - x20.load(ctx, 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)" - ); - x21.store(ctx, Val::new(0)); - eqz!( - x21.load(ctx, 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)" - ); - x22.store(ctx, Val::new(0)); - eqz!( - x22.load(ctx, 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)" - ); - x23.store(ctx, Val::new(0)); - eqz!( - x23.load(ctx, 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)" - ); - x24.store(ctx, Val::new(0)); - eqz!( - x24.load(ctx, 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)" - ); - x25.store(ctx, Val::new(0)); - eqz!( - x25.load(ctx, 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)" - ); - x26.store(ctx, Val::new(0)); - eqz!( - x26.load(ctx, 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)" - ); - x27.store(ctx, Val::new(0)); - eqz!( - x27.load(ctx, 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)" - ); - x28.store(ctx, Val::new(0)); - eqz!( - x28.load(ctx, 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)" - ); - x29.store(ctx, Val::new(0)); - eqz!( - x29.load(ctx, 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)" - ); - x30.store(ctx, Val::new(0)); - eqz!( - x30.load(ctx, 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)" - ); - x31.store(ctx, Val::new(0)); - eqz!( - x31.load(ctx, 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)" - ); - x32.store(ctx, Val::new(0)); - eqz!( - x32.load(ctx, 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)" - ); - x33.store(ctx, Val::new(0)); - eqz!( - x33.load(ctx, 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)" - ); - x34.store(ctx, Val::new(0)); - eqz!( - x34.load(ctx, 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)" - ); - x35.store(ctx, Val::new(0)); - eqz!( - x35.load(ctx, 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)" - ); - x55 = x16; - } else if is_true(x5[to_usize(Val::new(7))]._super) { - // IllegalMulOp(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:17) - // Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:31) - eqz!(Val::new(2013265920), "loc(callsite( IllegalMulOp ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :17:6) at Mul0 ( zirgen/circuit/rv32im/v2/dsl/inst_mul.zir :31:18)))"); - // Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23) - x36.store(ctx, Val::new(0)); - eqz!( - x36.load(ctx, 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)" - ); - x37.store(ctx, Val::new(0)); - eqz!( - x37.load(ctx, 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)" - ); - x38.store(ctx, Val::new(0)); - eqz!( - x38.load(ctx, 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)" - ); - x39.store(ctx, Val::new(0)); - eqz!( - x39.load(ctx, 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)" - ); - x40.store(ctx, Val::new(0)); - eqz!( - x40.load(ctx, 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)" - ); - x41.store(ctx, Val::new(0)); - eqz!( - x41.load(ctx, 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)" - ); - x42.store(ctx, Val::new(0)); - eqz!( - x42.load(ctx, 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)" - ); - x43.store(ctx, Val::new(0)); - eqz!( - x43.load(ctx, 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)" - ); - x44.store(ctx, Val::new(0)); - eqz!( - x44.load(ctx, 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)" - ); - x45.store(ctx, Val::new(0)); - eqz!( - x45.load(ctx, 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)" - ); - x46.store(ctx, Val::new(0)); - eqz!( - x46.load(ctx, 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)" - ); - x47.store(ctx, Val::new(0)); - eqz!( - x47.load(ctx, 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)" - ); - x48.store(ctx, Val::new(0)); - eqz!( - x48.load(ctx, 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)" - ); - x49.store(ctx, Val::new(0)); - eqz!( - x49.load(ctx, 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)" - ); - x50.store(ctx, Val::new(0)); - eqz!( - x50.load(ctx, 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)" - ); - x51.store(ctx, Val::new(0)); - eqz!( - x51.load(ctx, 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)" - ); - x52.store(ctx, Val::new(0)); - eqz!( - x52.load(ctx, 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)" - ); - x53.store(ctx, Val::new(0)); - eqz!( - x53.load(ctx, 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)" - ); - x54.store(ctx, Val::new(0)); - eqz!( - x54.load(ctx, 0), - "Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:23)" - ); - x55 = x16; - } else { - bail!("Reached unreachable mux arm") - } // Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:33) - let x62: WriteRdStruct = exec_write_rd( - ctx, - arg0, - &x4.ii, - &x4.decoded, - Val::new(1), - &x55, - (layout2.map(|c| c._0)), - )?; - // Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:21) - let x63: ValU32Struct = arg1.pc_u32; - // DenormedValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:20) - // AddU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:27) - // Mul0(zirgen/circuit/rv32im/v2/dsl/inst_mul.zir:34) - let x64: DenormedValU32Struct = DenormedValU32Struct { - low: (x63.low + Val::new(4)), - high: x63.high, - }; - let x65: NormalizeU32Struct = exec_normalize_u32(ctx, &x64, (layout2.map(|c| c.pc_add)))?; - return Ok(InstOutputStruct { - new_pc: x65._super, - new_state: Val::new(32), - new_mode: arg1.mode, - }); -} -pub fn exec_mem_load_input<'a>( - ctx: &'a ExecContext, - arg0: &RegStruct, - arg1: &InstInputStruct, - layout2: BoundLayout<'a, MemLoadInputLayout, Val>, -) -> Result { - // MemLoadInput(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:8) - eqz!( - (arg1.state - Val::new(32)), - "MemLoadInput(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:8)" - ); - // MemLoadInput(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:10) - let x3: DecoderStruct = exec_decode_inst(ctx, arg0, arg1, (layout2.map(|c| c.decoded)))?; - // MemLoadInput(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:11) - let x4: GetDataStruct = exec_read_reg(ctx, arg0, arg1, x3.rs1, (layout2.map(|c| c.rs1)))?; - // MemLoadInput(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:10) - let x5: ValU32Struct = x3.imm_i; - // MemLoadInput(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:11) - let x6: ValU32Struct = x4._super; - // DenormedValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:20) - // AddU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:27) - // MemLoadInput(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:12) - let x7: DenormedValU32Struct = DenormedValU32Struct { - low: (x6.low + x5.low), - high: (x6.high + x5.high), - }; - let x8: NormalizeU32Struct = exec_normalize_u32(ctx, &x7, (layout2.map(|c| c.addr_u32)))?; - // MemLoadInput(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:13) - let x9: AddrDecomposeBitsStruct = - exec_addr_decompose_bits(ctx, &x8._super, arg1.mode, (layout2.map(|c| c.addr)))?; - // MemLoadInput(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:14) - let x10: GetDataStruct = exec_memory_read(ctx, arg0, x9.addr, (layout2.map(|c| c.data_0)))?; - return Ok(MemLoadInputStruct { - ii: arg1.clone(), - decoded: x3, - addr: x9, - data_0: x10, - }); -} -pub fn exec_mem_store_input<'a>( - ctx: &'a ExecContext, - arg0: &RegStruct, - arg1: &InstInputStruct, - layout2: BoundLayout<'a, MemStoreInputLayout, Val>, -) -> Result { - // MemStoreInput(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:18) - eqz!( - (arg1.state - Val::new(32)), - "MemStoreInput(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:18)" - ); - // MemStoreInput(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:20) - let x3: DecoderStruct = exec_decode_inst(ctx, arg0, arg1, (layout2.map(|c| c.decoded)))?; - // MemStoreInput(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:21) - let x4: GetDataStruct = exec_read_reg(ctx, arg0, arg1, x3.rs1, (layout2.map(|c| c.rs1)))?; - // MemStoreInput(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:22) - let x5: GetDataStruct = exec_read_reg(ctx, arg0, arg1, x3.rs2, (layout2.map(|c| c.rs2)))?; - // MemStoreInput(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:20) - let x6: ValU32Struct = x3.imm_s; - // MemStoreInput(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:21) - let x7: ValU32Struct = x4._super; - // DenormedValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:20) - // AddU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:27) - // MemStoreInput(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:23) - let x8: DenormedValU32Struct = DenormedValU32Struct { - low: (x7.low + x6.low), - high: (x7.high + x6.high), - }; - let x9: NormalizeU32Struct = exec_normalize_u32(ctx, &x8, (layout2.map(|c| c.addr_u32)))?; - // MemStoreInput(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:24) - let x10: AddrDecomposeBitsStruct = - exec_addr_decompose_bits(ctx, &x9._super, arg1.mode, (layout2.map(|c| c.addr)))?; - // MemStoreInput(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:25) - let x11: GetDataStruct = exec_memory_read(ctx, arg0, x10.addr, (layout2.map(|c| c.data_0)))?; - return Ok(MemStoreInputStruct { - decoded: x3, - rs2: x5, - addr: x10, - data_0: x11, - }); -} -pub fn exec_mem_store_finalize<'a>( - ctx: &'a ExecContext, - arg0: &RegStruct, - arg1: &MemStoreInputStruct, - arg2: &ValU32Struct, - layout3: BoundLayout<'a, MemStoreFinalizeLayout, Val>, -) -> Result { - // MemStoreFinalize(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:29) - let x4: MemoryWriteStruct = - exec_memory_write(ctx, arg0, arg1.addr.addr, arg2, (layout3.map(|c| c._0)))?; - return Ok(MemStoreFinalizeStruct {}); -} -pub fn exec_split_word<'a>( - ctx: &'a ExecContext, - arg0: Val, - layout1: BoundLayout<'a, SplitWordLayout, Val>, -) -> Result { - // SplitWord(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:33) - let x2: NondetRegStruct = exec_nondet_u8_reg( - ctx, - bit_and(arg0, Val::new(255))?, - (layout1.map(|c| c.byte0)), - )?; - // SplitWord(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:34) - let x3: NondetRegStruct = exec_nondet_u8_reg( - ctx, - (bit_and(arg0, Val::new(65280))? * Val::new(2005401601)), - (layout1.map(|c| c.byte1)), - )?; - // SplitWord(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:35) - let x4: Val = ((x3._super * Val::new(256)) + x2._super); - eqz!( - (arg0 - x4), - "SplitWord(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:35)" - ); - return Ok(SplitWordStruct { - byte0: x2, - byte1: x3, - }); -} -pub fn exec_op_lb<'a>( - ctx: &'a ExecContext, - arg0: &MemLoadInputStruct, - layout1: BoundLayout<'a, OpLBLayout, Val>, -) -> Result { - // OpLB(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:82) - let x2: DecoderStruct = arg0.decoded; - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:57) - // OpLB(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:83) - let x3: Val = (x2.opcode._super - Val::new(3)); - eqz!(x3, "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :57:19) at OpLB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :83:18)))"); - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:58) - eqz!(x2.func3, "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at OpLB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :83:18)))"); - // OpLB(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:82) - let x4: AddrDecomposeBitsStruct = arg0.addr; - let x5: ValU32Struct = arg0.data_0._super; - let x6: Val = x4.low1._super; - // OpLB(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:84) - let x7: Val = ((Val::new(1) - x6) * x5.low); - // OpLB(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:85) - let x8: SplitWordStruct = - exec_split_word(ctx, ((x6 * x5.high) + x7), (layout1.map(|c| c.bytes)))?; - // OpLB(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:82) - let x9: Val = x4.low0._super; - // OpLB(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:86) - let x10: Val = ((Val::new(1) - x9) * x8.byte0._super); - let x11: Val = ((x9 * x8.byte1._super) + x10); - // OpLB(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:87) - let x12: NondetRegStruct = exec_nondet_bit_reg( - ctx, - (bit_and(x11, Val::new(128))? * Val::new(1997537281)), - (layout1.map(|c| c.high_bit)), - )?; - // OpLB(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:88) - let x13: NondetRegStruct = exec_nondet_u8_reg( - ctx, - (bit_and(x11, Val::new(127))? * Val::new(2)), - (layout1.map(|c| c.low7x2)), - )?; - // OpLB(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:87) - let x14: Val = x12._super; - // OpLB(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:89) - let x15: Val = ((x14 * Val::new(128)) + (x13._super * Val::new(1006632961))); - eqz!( - (x11 - x15), - "OpLB(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:89)" - ); - return Ok(ValU32Struct { - low: (x11 + (x14 * Val::new(65280))), - high: (x14 * Val::new(65535)), - }); -} -pub fn exec_op_lh<'a>( - ctx: &'a ExecContext, - arg0: &MemLoadInputStruct, - layout1: BoundLayout<'a, OpLHLayout, Val>, -) -> Result { - // OpLH(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:93) - let x2: DecoderStruct = arg0.decoded; - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:57) - // OpLH(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:94) - let x3: Val = (x2.opcode._super - Val::new(3)); - eqz!(x3, "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :57:19) at OpLH ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :94:18)))"); - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:58) - eqz!((x2.func3 - Val::new(1)), "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at OpLH ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :94:18)))"); - // OpLH(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:93) - let x4: AddrDecomposeBitsStruct = arg0.addr; - // OpLH(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:95) - eqz!( - x4.low0._super, - "OpLH(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:95)" - ); - // OpLH(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:93) - let x5: ValU32Struct = arg0.data_0._super; - let x6: Val = x4.low1._super; - // OpLH(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:96) - let x7: Val = ((Val::new(1) - x6) * x5.low); - let x8: Val = ((x6 * x5.high) + x7); - // OpLH(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:97) - let x9: NondetRegStruct = exec_nondet_bit_reg( - ctx, - (bit_and(x8, Val::new(32768))? * Val::new(2013204481)), - (layout1.map(|c| c.high_bit)), - )?; - // OpLH(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:98) - let x10: NondetRegStruct = exec_nondet_u8_reg( - ctx, - (bit_and(x8, Val::new(32767))? * Val::new(2)), - (layout1.map(|c| c.low15x2)), - )?; - // OpLH(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:97) - let x11: Val = x9._super; - // OpLH(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:99) - let x12: Val = ((x11 * Val::new(32768)) + (x10._super * Val::new(1006632961))); - eqz!( - (x8 - x12), - "OpLH(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:99)" - ); - return Ok(ValU32Struct { - low: x8, - high: (x11 * Val::new(65535)), - }); -} -pub fn exec_op_lbu<'a>( - ctx: &'a ExecContext, - arg0: &MemLoadInputStruct, - layout1: BoundLayout<'a, OpLBULayout, Val>, -) -> Result { - // OpLBU(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:110) - let x2: DecoderStruct = arg0.decoded; - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:57) - // OpLBU(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:111) - let x3: Val = (x2.opcode._super - Val::new(3)); - eqz!(x3, "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :57:19) at OpLBU ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :111:18)))"); - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:58) - eqz!((x2.func3 - Val::new(4)), "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at OpLBU ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :111:18)))"); - // OpLBU(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:110) - let x4: AddrDecomposeBitsStruct = arg0.addr; - let x5: ValU32Struct = arg0.data_0._super; - let x6: Val = x4.low1._super; - // OpLBU(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:112) - let x7: Val = ((Val::new(1) - x6) * x5.low); - // OpLBU(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:113) - let x8: SplitWordStruct = - exec_split_word(ctx, ((x6 * x5.high) + x7), (layout1.map(|c| c.bytes)))?; - // OpLBU(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:110) - let x9: Val = x4.low0._super; - // OpLBU(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:114) - let x10: Val = ((Val::new(1) - x9) * x8.byte0._super); - // ValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:10) - // OpLBU(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:115) - let x11: ValU32Struct = ValU32Struct { - low: ((x9 * x8.byte1._super) + x10), - high: Val::new(0), - }; - return Ok(x11); -} -pub fn exec_mem0<'a>( - ctx: &'a ExecContext, - arg0: &RegStruct, - arg1: &InstInputStruct, - layout2: BoundLayout<'a, Mem0Layout, Val>, -) -> Result { - // Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:50) - let x3: BoundLayout = (layout2.map(|c| c.output)); - // Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:49) - let x4: MemLoadInputStruct = exec_mem_load_input(ctx, arg0, arg1, (layout2.map(|c| c.input)))?; - // Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:48) - let x5: NondetRegStruct8Array = arg1.minor_onehot._super; - // Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:50) - let x6: BoundLayout = (x3.map(|c| c.arm1)); - let x7: BoundLayout = (x3.map(|c| c.arm2)); - let x8: BoundLayout = (x3.map(|c| c.arm3)); - let x9: BoundLayout = (x3.map(|c| c.arm4)); - let x10: BoundLayout = (x3.map(|c| c.arm5)); - let x11: BoundLayout = (x3.map(|c| c.arm6)); - let x12: BoundLayout = (x3.map(|c| c.arm7)); - let x13: BoundLayout = (((x6.map(|c| c._extra0)).map(|c| c.count)).map(|c| c._super)); - let x14: BoundLayout = (((x6.map(|c| c._extra1)).map(|c| c.count)).map(|c| c._super)); - // OpLW(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:103) - // Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:53) - let x15: DecoderStruct = x4.decoded; - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:57) - // OpLW(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:104) - let x16: Val = (x15.opcode._super - Val::new(3)); - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:56) - let x17: Val = x15.func3; - // OpLW(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:103) - let x18: AddrDecomposeBitsStruct = x4.addr; - let x19: Val = x18.low0._super; - let x20: Val = x18.low1._super; - // Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:50) - let x21: BoundLayout = (((x7.map(|c| c._extra0)).map(|c| c.count)).map(|c| c._super)); - let x22: BoundLayout = (((x7.map(|c| c._extra1)).map(|c| c.count)).map(|c| c._super)); - let x23: BoundLayout = (((x7.map(|c| c._extra2)).map(|c| c.count)).map(|c| c._super)); - let x24: ValU32Struct = x4.data_0._super; - let x25: BoundLayout = (((x8.map(|c| c._extra0)).map(|c| c.count)).map(|c| c._super)); - // OpLHU(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:121) - // Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:55) - let x26: Val = ((Val::new(1) - x20) * x24.low); - // ValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:10) - // OpLHU(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:122) - let x27: ValU32Struct = ValU32Struct { - low: ((x20 * x24.high) + x26), - high: Val::new(0), - }; - // Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:50) - let x28: BoundLayout = (((x9.map(|c| c._extra0)).map(|c| c.count)).map(|c| c._super)); - let x29: BoundLayout = (((x9.map(|c| c._extra1)).map(|c| c.count)).map(|c| c._super)); - let x30: BoundLayout = (((x9.map(|c| c._extra2)).map(|c| c.count)).map(|c| c._super)); - // ValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:10) - // IllegalLoadOp(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:40) - // Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:56) - let x31: ValU32Struct = ValU32Struct { - low: Val::new(0), - high: Val::new(0), - }; - // Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:50) - let x32: BoundLayout = (((x10.map(|c| c._extra0)).map(|c| c.count)).map(|c| c._super)); - let x33: BoundLayout = (((x10.map(|c| c._extra1)).map(|c| c.count)).map(|c| c._super)); - let x34: BoundLayout = (((x10.map(|c| c._extra2)).map(|c| c.count)).map(|c| c._super)); - let x35: BoundLayout = (((x11.map(|c| c._extra0)).map(|c| c.count)).map(|c| c._super)); - let x36: BoundLayout = (((x11.map(|c| c._extra1)).map(|c| c.count)).map(|c| c._super)); - let x37: BoundLayout = (((x11.map(|c| c._extra2)).map(|c| c.count)).map(|c| c._super)); - let x38: BoundLayout = (((x12.map(|c| c._extra0)).map(|c| c.count)).map(|c| c._super)); - let x39: BoundLayout = (((x12.map(|c| c._extra1)).map(|c| c.count)).map(|c| c._super)); - let x40: BoundLayout = (((x12.map(|c| c._extra2)).map(|c| c.count)).map(|c| c._super)); - let x41: ValU32Struct; - if is_true(x5[to_usize(Val::new(0))]._super) { - // Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:51) - let x42: ValU32Struct = exec_op_lb(ctx, &x4, (x3.map(|c| c.arm0)))?; - x41 = x42; - } else if is_true(x5[to_usize(Val::new(1))]._super) { - // Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:52) - let x43: ValU32Struct = exec_op_lh(ctx, &x4, (x6.map(|c| c._super)))?; - // Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:50) - x13.store(ctx, Val::new(0)); - eqz!( - x13.load(ctx, 0), - "Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:50)" - ); - x14.store(ctx, Val::new(0)); - eqz!( - x14.load(ctx, 0), - "Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:50)" - ); - x41 = x43; - } else if is_true(x5[to_usize(Val::new(2))]._super) { - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:57) - // OpLW(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:104) - // Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:53) - eqz!(x16, "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :57:19) at callsite( OpLW ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :104:18) at Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :53:10))))"); - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:58) - eqz!((x17 - Val::new(2)), "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at callsite( OpLW ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :104:18) at Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :53:10))))"); - // OpLW(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:105) - eqz!(x19, "loc(callsite( OpLW ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :105:20) at Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :53:10)))"); - // OpLW(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:106) - eqz!(x20, "loc(callsite( OpLW ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :106:20) at Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :53:10)))"); - // Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:50) - x21.store(ctx, Val::new(0)); - eqz!( - x21.load(ctx, 0), - "Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:50)" - ); - x22.store(ctx, Val::new(0)); - eqz!( - x22.load(ctx, 0), - "Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:50)" - ); - x23.store(ctx, Val::new(0)); - eqz!( - x23.load(ctx, 0), - "Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:50)" - ); - x41 = x24; - } else if is_true(x5[to_usize(Val::new(3))]._super) { - // Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:54) - let x44: ValU32Struct = exec_op_lbu(ctx, &x4, (x8.map(|c| c._super)))?; - // Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:50) - x25.store(ctx, Val::new(0)); - eqz!( - x25.load(ctx, 0), - "Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:50)" - ); - x41 = x44; - } else if is_true(x5[to_usize(Val::new(4))]._super) { - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:57) - // OpLHU(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:119) - // Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:55) - eqz!(x16, "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :57:19) at callsite( OpLHU ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :119:18) at Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :55:11))))"); - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:58) - eqz!((x17 - Val::new(5)), "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at callsite( OpLHU ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :119:18) at Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :55:11))))"); - // OpLHU(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:120) - eqz!(x19, "loc(callsite( OpLHU ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :120:20) at Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :55:11)))"); - // Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:50) - x28.store(ctx, Val::new(0)); - eqz!( - x28.load(ctx, 0), - "Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:50)" - ); - x29.store(ctx, Val::new(0)); - eqz!( - x29.load(ctx, 0), - "Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:50)" - ); - x30.store(ctx, Val::new(0)); - eqz!( - x30.load(ctx, 0), - "Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:50)" - ); - x41 = x27; - } else if is_true(x5[to_usize(Val::new(5))]._super) { - // IllegalLoadOp(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:39) - // Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:56) - eqz!(Val::new(2013265920), "loc(callsite( IllegalLoadOp ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :39:6) at Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :56:19)))"); - // Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:50) - x32.store(ctx, Val::new(0)); - eqz!( - x32.load(ctx, 0), - "Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:50)" - ); - x33.store(ctx, Val::new(0)); - eqz!( - x33.load(ctx, 0), - "Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:50)" - ); - x34.store(ctx, Val::new(0)); - eqz!( - x34.load(ctx, 0), - "Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:50)" - ); - x41 = x31; - } else if is_true(x5[to_usize(Val::new(6))]._super) { - // IllegalLoadOp(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:39) - // Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:57) - eqz!(Val::new(2013265920), "loc(callsite( IllegalLoadOp ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :39:6) at Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :57:19)))"); - // Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:50) - x35.store(ctx, Val::new(0)); - eqz!( - x35.load(ctx, 0), - "Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:50)" - ); - x36.store(ctx, Val::new(0)); - eqz!( - x36.load(ctx, 0), - "Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:50)" - ); - x37.store(ctx, Val::new(0)); - eqz!( - x37.load(ctx, 0), - "Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:50)" - ); - x41 = x31; - } else if is_true(x5[to_usize(Val::new(7))]._super) { - // IllegalLoadOp(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:39) - // Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:58) - eqz!(Val::new(2013265920), "loc(callsite( IllegalLoadOp ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :39:6) at Mem0 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :58:19)))"); - // Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:50) - x38.store(ctx, Val::new(0)); - eqz!( - x38.load(ctx, 0), - "Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:50)" - ); - x39.store(ctx, Val::new(0)); - eqz!( - x39.load(ctx, 0), - "Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:50)" - ); - x40.store(ctx, Val::new(0)); - eqz!( - x40.load(ctx, 0), - "Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:50)" - ); - x41 = x31; - } else { - bail!("Reached unreachable mux arm") - } // Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:60) - let x45: WriteRdStruct = exec_write_rd( - ctx, - arg0, - &x4.ii, - &x15, - Val::new(1), - &x41, - (layout2.map(|c| c._0)), - )?; - // Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:48) - let x46: ValU32Struct = arg1.pc_u32; - // DenormedValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:20) - // AddU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:27) - // Mem0(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:61) - let x47: DenormedValU32Struct = DenormedValU32Struct { - low: (x46.low + Val::new(4)), - high: x46.high, - }; - let x48: NormalizeU32Struct = exec_normalize_u32(ctx, &x47, (layout2.map(|c| c.pc_add)))?; - return Ok(InstOutputStruct { - new_pc: x48._super, - new_state: Val::new(32), - new_mode: arg1.mode, - }); -} -pub fn exec_op_sb<'a>( - ctx: &'a ExecContext, - arg0: &MemStoreInputStruct, - layout1: BoundLayout<'a, OpSBLayout, Val>, -) -> Result { - // OpSB(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:125) - let x2: DecoderStruct = arg0.decoded; - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:57) - // OpSB(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:126) - let x3: Val = (x2.opcode._super - Val::new(35)); - eqz!(x3, "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :57:19) at OpSB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :126:18)))"); - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:58) - eqz!(x2.func3, "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at OpSB ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :126:18)))"); - // OpSB(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:125) - let x4: AddrDecomposeBitsStruct = arg0.addr; - let x5: ValU32Struct = arg0.data_0._super; - let x6: Val = x5.high; - let x7: Val = x4.low1._super; - // OpSB(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:127) - let x8: Val = (Val::new(1) - x7); - // OpSB(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:125) - let x9: Val = x5.low; - // OpSB(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:128) - let x10: SplitWordStruct = exec_split_word( - ctx, - ((x7 * x6) + (x8 * x9)), - (layout1.map(|c| c.orig_bytes)), - )?; - // OpSB(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:125) - let x11: Val = arg0.rs2._super.low; - // OpSB(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:129) - let x12: SplitWordStruct = exec_split_word(ctx, x11, (layout1.map(|c| c.new_bytes)))?; - // OpSB(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:125) - let x13: Val = x4.low0._super; - // OpSB(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:134) - let x14: Val = (Val::new(1) - x13); - // OpSB(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:129) - let x15: Val = x12.byte0._super; - // OpSB(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:135) - let x16: Val = (((x14 * x10.byte1._super) + (x13 * x15)) * Val::new(256)); - // OpSB(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:134) - let x17: Val = (((x13 * x10.byte0._super) + (x14 * x15)) + x16); - // ValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:10) - // OpSB(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:137) - let x18: ValU32Struct = ValU32Struct { - low: ((x7 * x9) + (x8 * x17)), - high: ((x8 * x6) + (x7 * x17)), - }; - return Ok(x18); -} -pub fn exec_mem1<'a>( - ctx: &'a ExecContext, - arg0: &RegStruct, - arg1: &InstInputStruct, - layout2: BoundLayout<'a, Mem1Layout, Val>, -) -> Result { - // Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67) - let x3: BoundLayout = (layout2.map(|c| c.output)); - // Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:66) - let x4: MemStoreInputStruct = - exec_mem_store_input(ctx, arg0, arg1, (layout2.map(|c| c.input)))?; - // Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:65) - let x5: NondetRegStruct8Array = arg1.minor_onehot._super; - // Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67) - let x6: BoundLayout = (x3.map(|c| c.arm1)); - let x7: BoundLayout = (x3.map(|c| c.arm2)); - let x8: BoundLayout = (x3.map(|c| c.arm3)); - let x9: BoundLayout = (x3.map(|c| c.arm4)); - let x10: BoundLayout = (x3.map(|c| c.arm5)); - let x11: BoundLayout = (x3.map(|c| c.arm6)); - let x12: BoundLayout = (x3.map(|c| c.arm7)); - // OpSH(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:143) - // Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:69) - let x13: DecoderStruct = x4.decoded; - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:57) - // OpSH(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:144) - let x14: Val = (x13.opcode._super - Val::new(35)); - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:56) - let x15: Val = x13.func3; - // OpSH(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:143) - let x16: AddrDecomposeBitsStruct = x4.addr; - let x17: Val = x16.low0._super; - let x18: ValU32Struct = x4.rs2._super; - let x19: Val = x18.low; - let x20: ValU32Struct = x4.data_0._super; - let x21: Val = x16.low1._super; - // OpSH(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:150) - let x22: Val = (Val::new(1) - x21); - // ValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:10) - // OpSH(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:149) - let x23: ValU32Struct = ValU32Struct { - low: ((x21 * x20.low) + (x22 * x19)), - high: ((x22 * x20.high) + (x21 * x19)), - }; - // Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67) - let x24: BoundLayout = (((x6.map(|c| c._extra0)).map(|c| c.count)).map(|c| c._super)); - let x25: BoundLayout = (((x6.map(|c| c._extra1)).map(|c| c.count)).map(|c| c._super)); - let x26: BoundLayout = (((x6.map(|c| c._extra2)).map(|c| c.count)).map(|c| c._super)); - let x27: BoundLayout = (((x6.map(|c| c._extra3)).map(|c| c.count)).map(|c| c._super)); - let x28: BoundLayout = (((x7.map(|c| c._extra0)).map(|c| c.count)).map(|c| c._super)); - let x29: BoundLayout = (((x7.map(|c| c._extra1)).map(|c| c.count)).map(|c| c._super)); - let x30: BoundLayout = (((x7.map(|c| c._extra2)).map(|c| c.count)).map(|c| c._super)); - let x31: BoundLayout = (((x7.map(|c| c._extra3)).map(|c| c.count)).map(|c| c._super)); - // ValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:10) - // IllegalStoreOp(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:45) - // Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:71) - let x32: ValU32Struct = ValU32Struct { - low: Val::new(0), - high: Val::new(0), - }; - // Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67) - let x33: BoundLayout = (((x8.map(|c| c._extra0)).map(|c| c.count)).map(|c| c._super)); - let x34: BoundLayout = (((x8.map(|c| c._extra1)).map(|c| c.count)).map(|c| c._super)); - let x35: BoundLayout = (((x8.map(|c| c._extra2)).map(|c| c.count)).map(|c| c._super)); - let x36: BoundLayout = (((x8.map(|c| c._extra3)).map(|c| c.count)).map(|c| c._super)); - let x37: BoundLayout = (((x9.map(|c| c._extra0)).map(|c| c.count)).map(|c| c._super)); - let x38: BoundLayout = (((x9.map(|c| c._extra1)).map(|c| c.count)).map(|c| c._super)); - let x39: BoundLayout = (((x9.map(|c| c._extra2)).map(|c| c.count)).map(|c| c._super)); - let x40: BoundLayout = (((x9.map(|c| c._extra3)).map(|c| c.count)).map(|c| c._super)); - let x41: BoundLayout = (((x10.map(|c| c._extra0)).map(|c| c.count)).map(|c| c._super)); - let x42: BoundLayout = (((x10.map(|c| c._extra1)).map(|c| c.count)).map(|c| c._super)); - let x43: BoundLayout = (((x10.map(|c| c._extra2)).map(|c| c.count)).map(|c| c._super)); - let x44: BoundLayout = (((x10.map(|c| c._extra3)).map(|c| c.count)).map(|c| c._super)); - let x45: BoundLayout = (((x11.map(|c| c._extra0)).map(|c| c.count)).map(|c| c._super)); - let x46: BoundLayout = (((x11.map(|c| c._extra1)).map(|c| c.count)).map(|c| c._super)); - let x47: BoundLayout = (((x11.map(|c| c._extra2)).map(|c| c.count)).map(|c| c._super)); - let x48: BoundLayout = (((x11.map(|c| c._extra3)).map(|c| c.count)).map(|c| c._super)); - let x49: BoundLayout = (((x12.map(|c| c._extra0)).map(|c| c.count)).map(|c| c._super)); - let x50: BoundLayout = (((x12.map(|c| c._extra1)).map(|c| c.count)).map(|c| c._super)); - let x51: BoundLayout = (((x12.map(|c| c._extra2)).map(|c| c.count)).map(|c| c._super)); - let x52: BoundLayout = (((x12.map(|c| c._extra3)).map(|c| c.count)).map(|c| c._super)); - let x53: ValU32Struct; - if is_true(x5[to_usize(Val::new(0))]._super) { - // Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:68) - let x54: ValU32Struct = exec_op_sb(ctx, &x4, (x3.map(|c| c.arm0)))?; - x53 = x54; - } else if is_true(x5[to_usize(Val::new(1))]._super) { - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:57) - // OpSH(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:144) - // Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:69) - eqz!(x14, "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :57:19) at callsite( OpSH ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :144:18) at Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :69:10))))"); - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:58) - eqz!((x15 - Val::new(1)), "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at callsite( OpSH ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :144:18) at Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :69:10))))"); - // OpSH(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:145) - eqz!(x17, "loc(callsite( OpSH ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :145:20) at Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :69:10)))"); - // Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67) - x24.store(ctx, Val::new(0)); - eqz!( - x24.load(ctx, 0), - "Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67)" - ); - x25.store(ctx, Val::new(0)); - eqz!( - x25.load(ctx, 0), - "Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67)" - ); - x26.store(ctx, Val::new(0)); - eqz!( - x26.load(ctx, 0), - "Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67)" - ); - x27.store(ctx, Val::new(0)); - eqz!( - x27.load(ctx, 0), - "Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67)" - ); - x53 = x23; - } else if is_true(x5[to_usize(Val::new(2))]._super) { - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:57) - // OpSW(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:156) - // Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:70) - eqz!(x14, "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :57:19) at callsite( OpSW ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :156:18) at Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :70:10))))"); - // VerifyOpcodeF3(zirgen/circuit/rv32im/v2/dsl/inst.zir:58) - eqz!((x15 - Val::new(2)), "loc(callsite( VerifyOpcodeF3 ( zirgen/circuit/rv32im/v2/dsl/inst.zir :58:18) at callsite( OpSW ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :156:18) at Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :70:10))))"); - // OpSW(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:157) - eqz!(x17, "loc(callsite( OpSW ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :157:20) at Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :70:10)))"); - // OpSW(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:158) - eqz!(x21, "loc(callsite( OpSW ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :158:20) at Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :70:10)))"); - // Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67) - x28.store(ctx, Val::new(0)); - eqz!( - x28.load(ctx, 0), - "Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67)" - ); - x29.store(ctx, Val::new(0)); - eqz!( - x29.load(ctx, 0), - "Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67)" - ); - x30.store(ctx, Val::new(0)); - eqz!( - x30.load(ctx, 0), - "Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67)" - ); - x31.store(ctx, Val::new(0)); - eqz!( - x31.load(ctx, 0), - "Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67)" - ); - x53 = x18; - } else if is_true(x5[to_usize(Val::new(3))]._super) { - // IllegalStoreOp(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:44) - // Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:71) - eqz!(Val::new(2013265920), "loc(callsite( IllegalStoreOp ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :44:6) at Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :71:20)))"); - // Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67) - x33.store(ctx, Val::new(0)); - eqz!( - x33.load(ctx, 0), - "Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67)" - ); - x34.store(ctx, Val::new(0)); - eqz!( - x34.load(ctx, 0), - "Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67)" - ); - x35.store(ctx, Val::new(0)); - eqz!( - x35.load(ctx, 0), - "Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67)" - ); - x36.store(ctx, Val::new(0)); - eqz!( - x36.load(ctx, 0), - "Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67)" - ); - x53 = x32; - } else if is_true(x5[to_usize(Val::new(4))]._super) { - // IllegalStoreOp(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:44) - // Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:72) - eqz!(Val::new(2013265920), "loc(callsite( IllegalStoreOp ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :44:6) at Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :72:20)))"); - // Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67) - x37.store(ctx, Val::new(0)); - eqz!( - x37.load(ctx, 0), - "Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67)" - ); - x38.store(ctx, Val::new(0)); - eqz!( - x38.load(ctx, 0), - "Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67)" - ); - x39.store(ctx, Val::new(0)); - eqz!( - x39.load(ctx, 0), - "Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67)" - ); - x40.store(ctx, Val::new(0)); - eqz!( - x40.load(ctx, 0), - "Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67)" - ); - x53 = x32; - } else if is_true(x5[to_usize(Val::new(5))]._super) { - // IllegalStoreOp(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:44) - // Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:73) - eqz!(Val::new(2013265920), "loc(callsite( IllegalStoreOp ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :44:6) at Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :73:20)))"); - // Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67) - x41.store(ctx, Val::new(0)); - eqz!( - x41.load(ctx, 0), - "Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67)" - ); - x42.store(ctx, Val::new(0)); - eqz!( - x42.load(ctx, 0), - "Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67)" - ); - x43.store(ctx, Val::new(0)); - eqz!( - x43.load(ctx, 0), - "Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67)" - ); - x44.store(ctx, Val::new(0)); - eqz!( - x44.load(ctx, 0), - "Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67)" - ); - x53 = x32; - } else if is_true(x5[to_usize(Val::new(6))]._super) { - // IllegalStoreOp(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:44) - // Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:74) - eqz!(Val::new(2013265920), "loc(callsite( IllegalStoreOp ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :44:6) at Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :74:20)))"); - // Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67) - x45.store(ctx, Val::new(0)); - eqz!( - x45.load(ctx, 0), - "Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67)" - ); - x46.store(ctx, Val::new(0)); - eqz!( - x46.load(ctx, 0), - "Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67)" - ); - x47.store(ctx, Val::new(0)); - eqz!( - x47.load(ctx, 0), - "Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67)" - ); - x48.store(ctx, Val::new(0)); - eqz!( - x48.load(ctx, 0), - "Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67)" - ); - x53 = x32; - } else if is_true(x5[to_usize(Val::new(7))]._super) { - // IllegalStoreOp(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:44) - // Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:75) - eqz!(Val::new(2013265920), "loc(callsite( IllegalStoreOp ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :44:6) at Mem1 ( zirgen/circuit/rv32im/v2/dsl/inst_mem.zir :75:20)))"); - // Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67) - x49.store(ctx, Val::new(0)); - eqz!( - x49.load(ctx, 0), - "Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67)" - ); - x50.store(ctx, Val::new(0)); - eqz!( - x50.load(ctx, 0), - "Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67)" - ); - x51.store(ctx, Val::new(0)); - eqz!( - x51.load(ctx, 0), - "Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67)" - ); - x52.store(ctx, Val::new(0)); - eqz!( - x52.load(ctx, 0), - "Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:67)" - ); - x53 = x32; - } else { - bail!("Reached unreachable mux arm") - } // Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:77) - let x55: MemStoreFinalizeStruct = - exec_mem_store_finalize(ctx, arg0, &x4, &x53, (layout2.map(|c| c._0)))?; - // Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:65) - let x56: ValU32Struct = arg1.pc_u32; - // DenormedValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:20) - // AddU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:27) - // Mem1(zirgen/circuit/rv32im/v2/dsl/inst_mem.zir:78) - let x57: DenormedValU32Struct = DenormedValU32Struct { - low: (x56.low + Val::new(4)), - high: x56.high, - }; - let x58: NormalizeU32Struct = exec_normalize_u32(ctx, &x57, (layout2.map(|c| c.pc_add)))?; - return Ok(InstOutputStruct { - new_pc: x58._super, - new_state: Val::new(32), - new_mode: arg1.mode, - }); -} -pub fn back_digest_reg<'a>( - ctx: &'a ExecContext, - distance0: Index, - layout1: BoundLayout<'a, DigestRegLayout, Val>, -) -> Result { - // DigestReg(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:7) - let x2: DigestRegValues_SuperStruct8Array = map_layout( - [ - Val::new(0), - Val::new(1), - Val::new(2), - Val::new(3), - Val::new(4), - Val::new(5), - Val::new(6), - Val::new(7), - ], - (layout1.map(|c| c.values)), - |x3, x4| { - // DigestReg(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:8) - let x5: RegStruct = back_reg(ctx, distance0, (x4.map(|c| c.low)))?; - // DigestReg(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:9) - let x6: RegStruct = back_reg(ctx, distance0, (x4.map(|c| c.high)))?; - return Ok(DigestRegValues_SuperStruct { low: x5, high: x6 }); - }, - )?; - return Ok(DigestRegStruct { values: x2 }); -} -pub fn exec_digest_reg<'a>( - ctx: &'a ExecContext, - arg0: &ValU32Struct8Array, - layout1: BoundLayout<'a, DigestRegLayout, Val>, -) -> Result { - // DigestReg(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:7) - let x2: DigestRegValues_SuperStruct8Array = - map_layout(*arg0, (layout1.map(|c| c.values)), |x3, x4| { - // DigestReg(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:8) - let x5: RegStruct = exec_reg(ctx, x3.low, (x4.map(|c| c.low)))?; - // DigestReg(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:9) - let x6: RegStruct = exec_reg(ctx, x3.high, (x4.map(|c| c.high)))?; - return Ok(DigestRegValues_SuperStruct { low: x5, high: x6 }); - })?; - return Ok(DigestRegStruct { values: x2 }); -} -pub fn exec_control_load_root<'a>( - ctx: &'a ExecContext, - arg0: &RegStruct, - arg1: &InstInputStruct, - layout2: BoundLayout<'a, ControlLoadRootLayout, Val>, - global3: BufferRow, -) -> Result { - // ControlLoadRoot(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:18) - let x4: BoundLayout<_globalLayout, _> = bind_layout!(LAYOUT_GLOBAL, global3); - // ControlLoadRoot(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:19) - let x5: BoundLayout = (x4.map(|c| c.state_in)); - // ControlLoadRoot(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:20) - eqz!( - arg1.state, - "ControlLoadRoot(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:20)" - ); - // ControlLoadRoot(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:22) - let x6: ControlLoadRoot__0Struct8Array = map_layout( - [ - Val::new(0), - Val::new(1), - Val::new(2), - Val::new(3), - Val::new(4), - Val::new(5), - Val::new(6), - Val::new(7), - ], - (layout2.map(|c| c._1)), - |x7, x8| { - // ControlLoadRoot(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:23) - let x9: GetDataStruct = - exec_memory_page_in(ctx, arg0, (x7 + Val::new(1140850680)), (x8.map(|c| c.mem)))?; - // ControlLoadRoot(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:19) - let x10: DigestRegStruct = back_digest_reg(ctx, 0, x5)?; - let x11: RegStruct = x10.values[to_usize(x7)].low; - // ControlLoadRoot(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:23) - let x12: ValU32Struct = x9._super; - // ControlLoadRoot(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:24) - let x13: Val = (x11._super._super - x12.low); - eqz!( - x13, - "ControlLoadRoot(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:24)" - ); - // ControlLoadRoot(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:19) - let x14: DigestRegStruct = back_digest_reg(ctx, 0, x5)?; - let x15: RegStruct = x14.values[to_usize(x7)].high; - // ControlLoadRoot(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:25) - let x16: Val = (x15._super._super - x12.high); - eqz!( - x16, - "ControlLoadRoot(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:25)" - ); - return Ok(ControlLoadRoot__0Struct {}); - }, - )?; - // InstOutput(zirgen/circuit/rv32im/v2/dsl/inst.zir:46) - // ControlLoadRoot(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:27) - let x17: InstOutputStruct = InstOutputStruct { - new_pc: ValU32Struct { - low: Val::new(0), - high: Val::new(0), - }, - new_state: Val::new(16), - new_mode: Val::new(0), - }; - return Ok(x17); -} -pub fn exec_control_resume<'a>( - ctx: &'a ExecContext, - arg0: &RegStruct, - arg1: &InstInputStruct, - layout2: BoundLayout<'a, ControlResumeLayout, Val>, - global3: BufferRow, -) -> Result { - // ControlResume(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:30) - let x4: BoundLayout<_globalLayout, _> = bind_layout!(LAYOUT_GLOBAL, global3); - // ControlResume(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:34) - let x5: BoundLayout = (layout2.map(|c| c._super)); - // ControlResume(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:31) - eqz!( - (arg1.state - Val::new(1)), - "ControlResume(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:31)" - ); - // ControlResume(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:30) - let x6: ValU32Struct = arg1.pc_u32; - // ControlResume(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:33) - let x7: NondetRegStruct = exec_is_zero(ctx, (x6.low + x6.high), (layout2.map(|c| c.pc_zero)))?; - let x8: Val = x7._super; - // ControlResume(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:34) - let x9: BoundLayout = (x5.map(|c| c.arm0)); - let x10: BoundLayout = (x9.map(|c| c._super)); - let x11: BoundLayout = (((x9.map(|c| c._extra0)).map(|c| c.count)).map(|c| c._super)); - let x12: BoundLayout = (((x9.map(|c| c._extra1)).map(|c| c.count)).map(|c| c._super)); - let x13: BoundLayout = (((x9.map(|c| c._extra2)).map(|c| c.count)).map(|c| c._super)); - let x14: BoundLayout = (((x9.map(|c| c._extra3)).map(|c| c.count)).map(|c| c._super)); - let x15: BoundLayout = (((x9.map(|c| c._extra4)).map(|c| c.count)).map(|c| c._super)); - let x16: BoundLayout = (((x9.map(|c| c._extra5)).map(|c| c.count)).map(|c| c._super)); - let x17: BoundLayout = (((x9.map(|c| c._extra6)).map(|c| c.count)).map(|c| c._super)); - let x18: BoundLayout = (((x9.map(|c| c._extra7)).map(|c| c.count)).map(|c| c._super)); - let x19: BoundLayout = (((x9.map(|c| c._extra8)).map(|c| c.count)).map(|c| c._super)); - let x20: BoundLayout = (((x9.map(|c| c._extra9)).map(|c| c.count)).map(|c| c._super)); - let x21: BoundLayout = (((x9.map(|c| c._extra10)).map(|c| c.count)).map(|c| c._super)); - let x22: BoundLayout = (((x9.map(|c| c._extra11)).map(|c| c.count)).map(|c| c._super)); - let x23: BoundLayout = (((x9.map(|c| c._extra12)).map(|c| c.count)).map(|c| c._super)); - let x24: BoundLayout = (((x9.map(|c| c._extra13)).map(|c| c.count)).map(|c| c._super)); - let x25: BoundLayout = (((x9.map(|c| c._extra14)).map(|c| c.count)).map(|c| c._super)); - let x26: BoundLayout = (((x9.map(|c| c._extra15)).map(|c| c.count)).map(|c| c._super)); - let x27: BoundLayout = (((x9.map(|c| c._extra16)).map(|c| c.count)).map(|c| c._super)); - let x28: BoundLayout = (((x9.map(|c| c._extra17)).map(|c| c.count)).map(|c| c._super)); - let x29: InstOutputStruct; - if is_true(x8) { - // ControlResume(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:36) - let x30: GetDataStruct = - exec_memory_read(ctx, arg0, Val::new(1073725572), (x10.map(|c| c.pc)))?; - // ControlResume(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:37) - let x31: GetDataStruct = - exec_memory_read(ctx, arg0, Val::new(1073725573), (x10.map(|c| c.mode)))?; - // InstOutput(zirgen/circuit/rv32im/v2/dsl/inst.zir:46) - // ControlResume(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:38) - let x32: InstOutputStruct = InstOutputStruct { - new_pc: x30._super, - new_state: Val::new(1), - new_mode: x31._super.low, - }; - // ControlResume(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:34) - x11.store(ctx, Val::new(0)); - eqz!( - x11.load(ctx, 0), - "ControlResume(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:34)" - ); - x12.store(ctx, Val::new(0)); - eqz!( - x12.load(ctx, 0), - "ControlResume(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:34)" - ); - x13.store(ctx, Val::new(0)); - eqz!( - x13.load(ctx, 0), - "ControlResume(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:34)" - ); - x14.store(ctx, Val::new(0)); - eqz!( - x14.load(ctx, 0), - "ControlResume(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:34)" - ); - x15.store(ctx, Val::new(0)); - eqz!( - x15.load(ctx, 0), - "ControlResume(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:34)" - ); - x16.store(ctx, Val::new(0)); - eqz!( - x16.load(ctx, 0), - "ControlResume(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:34)" - ); - x17.store(ctx, Val::new(0)); - eqz!( - x17.load(ctx, 0), - "ControlResume(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:34)" - ); - x18.store(ctx, Val::new(0)); - eqz!( - x18.load(ctx, 0), - "ControlResume(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:34)" - ); - x19.store(ctx, Val::new(0)); - eqz!( - x19.load(ctx, 0), - "ControlResume(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:34)" - ); - x20.store(ctx, Val::new(0)); - eqz!( - x20.load(ctx, 0), - "ControlResume(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:34)" - ); - x21.store(ctx, Val::new(0)); - eqz!( - x21.load(ctx, 0), - "ControlResume(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:34)" - ); - x22.store(ctx, Val::new(0)); - eqz!( - x22.load(ctx, 0), - "ControlResume(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:34)" - ); - x23.store(ctx, Val::new(0)); - eqz!( - x23.load(ctx, 0), - "ControlResume(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:34)" - ); - x24.store(ctx, Val::new(0)); - eqz!( - x24.load(ctx, 0), - "ControlResume(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:34)" - ); - x25.store(ctx, Val::new(0)); - eqz!( - x25.load(ctx, 0), - "ControlResume(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:34)" - ); - x26.store(ctx, Val::new(0)); - eqz!( - x26.load(ctx, 0), - "ControlResume(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:34)" - ); - x27.store(ctx, Val::new(0)); - eqz!( - x27.load(ctx, 0), - "ControlResume(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:34)" - ); - x28.store(ctx, Val::new(0)); - eqz!( - x28.load(ctx, 0), - "ControlResume(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:34)" - ); - x29 = x32; - } else if is_true((Val::new(1) - x8)) { - // ControlResume(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:41) - let x33: ControlResume_SuperArm1_Super__0Struct8Array = map_layout( - [ - Val::new(0), - Val::new(1), - Val::new(2), - Val::new(3), - Val::new(4), - Val::new(5), - Val::new(6), - Val::new(7), - ], - ((x5.map(|c| c.arm1)).map(|c| c._1)), - |x34, x35| { - // ControlResume(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:40) - let x36: DigestRegStruct = back_digest_reg(ctx, 0, (x4.map(|c| c.input)))?; - let x37: RegStruct = x36.values[to_usize(x34)].low; - let x38: RegStruct = x36.values[to_usize(x34)].high; - // ValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:10) - // ControlResume(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:43) - let x39: ValU32Struct = ValU32Struct { - low: x37._super._super, - high: x38._super._super, - }; - // ControlResume(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:42) - let x40: MemoryWriteStruct = exec_memory_write( - ctx, - arg0, - (x34 + Val::new(1073725592)), - &x39, - (x35.map(|c| c._0)), - )?; - return Ok(ControlResume_SuperArm1_Super__0Struct {}); - }, - )?; - x29 = InstOutputStruct { - new_pc: x6, - new_state: Val::new(32), - new_mode: arg1.mode, - }; - } else { - bail!("Reached unreachable mux arm") - } - return Ok(x29); -} -pub fn exec_control_user_ecall<'a>( - ctx: &'a ExecContext, - arg0: &RegStruct, - arg1: &InstInputStruct, - layout2: BoundLayout<'a, ControlUserECALLLayout, Val>, -) -> Result { - // ControlUserECALL(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:49) - let x3: Val = arg1.mode; - // ControlUserECALL(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:50) - let x4: RegStruct = exec_reg(ctx, x3, (layout2.map(|c| c.safe_mode)))?; - // ControlUserECALL(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:49) - let x5: ValU32Struct = arg1.pc_u32; - // ControlUserECALL(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:51) - let x6: AddrDecomposeBitsStruct = - exec_addr_decompose_bits(ctx, &x5, x4._super._super, (layout2.map(|c| c.pc_addr)))?; - // ControlUserECALL(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:52) - eqz!( - x6.low2, - "ControlUserECALL(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:52)" - ); - // ControlUserECALL(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:53) - let x7: GetDataStruct = exec_memory_read(ctx, arg0, x6._super, (layout2.map(|c| c.load_inst)))?; - let x8: ValU32Struct = x7._super; - // ControlUserECALL(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:54) - eqz!( - x8.high, - "ControlUserECALL(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:54)" - ); - // ControlUserECALL(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:55) - eqz!( - (x8.low - Val::new(115)), - "ControlUserECALL(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:55)" - ); - // ControlUserECALL(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:56) - eqz!( - (arg1.state - Val::new(32)), - "ControlUserECALL(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:56)" - ); - // ControlUserECALL(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:57) - eqz!( - x3, - "ControlUserECALL(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:57)" - ); - // ControlUserECALL(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:58) - let x9: GetDataStruct = exec_memory_read( - ctx, - arg0, - Val::new(1073725489), - (layout2.map(|c| c.dispatch_idx)), - )?; - let x10: ValU32Struct = x9._super; - // ControlUserECALL(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:59) - eqz!( - x10.high, - "ControlUserECALL(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:59)" - ); - // ControlUserECALL(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:58) - let x11: Val = x10.low; - // ControlUserECALL(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:60) - let x12: U16RegStruct = exec_u16_reg(ctx, (x11 * Val::new(128)), (layout2.map(|c| c._0)))?; - // ControlUserECALL(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:61) - let x13: GetDataStruct = exec_memory_read( - ctx, - arg0, - (x11 + Val::new(1073726464)), - (layout2.map(|c| c.new_pc_addr)), - )?; - // ControlUserECALL(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:62) - let x14: MemoryWriteStruct = exec_memory_write( - ctx, - arg0, - Val::new(1073725568), - &x5, - (layout2.map(|c| c._1)), - )?; - return Ok(InstOutputStruct { - new_pc: x13._super, - new_state: Val::new(32), - new_mode: Val::new(1), - }); -} -pub fn exec_control_mret<'a>( - ctx: &'a ExecContext, - arg0: &RegStruct, - arg1: &InstInputStruct, - layout2: BoundLayout<'a, ControlMRETLayout, Val>, -) -> Result { - // ControlMRET(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:66) - let x3: Val = arg1.mode; - // ControlMRET(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:67) - let x4: RegStruct = exec_reg(ctx, x3, (layout2.map(|c| c.safe_mode)))?; - // ControlMRET(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:68) - let x5: AddrDecomposeBitsStruct = exec_addr_decompose_bits( - ctx, - &arg1.pc_u32, - x4._super._super, - (layout2.map(|c| c.pc_addr)), - )?; - // ControlMRET(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:69) - eqz!( - x5.low2, - "ControlMRET(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:69)" - ); - // ControlMRET(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:70) - let x6: GetDataStruct = exec_memory_read(ctx, arg0, x5._super, (layout2.map(|c| c.load_inst)))?; - let x7: ValU32Struct = x6._super; - // ControlMRET(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:71) - eqz!( - (x7.high - Val::new(12320)), - "ControlMRET(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:71)" - ); - // ControlMRET(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:72) - eqz!( - (x7.low - Val::new(115)), - "ControlMRET(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:72)" - ); - // ControlMRET(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:73) - eqz!( - (arg1.state - Val::new(32)), - "ControlMRET(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:73)" - ); - // ControlMRET(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:74) - eqz!( - (x3 - Val::new(1)), - "ControlMRET(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:74)" - ); - // ControlMRET(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:75) - let x8: GetDataStruct = - exec_memory_read(ctx, arg0, Val::new(1073725568), (layout2.map(|c| c.pc)))?; - let x9: ValU32Struct = x8._super; - // DenormedValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:20) - // AddU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:27) - // ControlMRET(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:76) - let x10: DenormedValU32Struct = DenormedValU32Struct { - low: (x9.low + Val::new(4)), - high: x9.high, - }; - let x11: NormalizeU32Struct = exec_normalize_u32(ctx, &x10, (layout2.map(|c| c.pc_add)))?; - return Ok(InstOutputStruct { - new_pc: x11._super, - new_state: Val::new(32), - new_mode: Val::new(0), - }); -} -pub fn exec_control_suspend<'a>( - ctx: &'a ExecContext, - arg0: &RegStruct, - arg1: &InstInputStruct, - layout2: BoundLayout<'a, ControlSuspendLayout, Val>, - global3: BufferRow, -) -> Result { - // ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:80) - let x4: BoundLayout<_globalLayout, _> = bind_layout!(LAYOUT_GLOBAL, global3); - // ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:84) - let x5: BoundLayout = (layout2.map(|c| c._super)); - // ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:80) - let x6: Val = arg1.state; - // ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:81) - eqz!( - (x6 - Val::new(4)), - "ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:81)" - ); - // ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:80) - let x7: ValU32Struct = arg1.pc_u32; - // ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:83) - let x8: NondetRegStruct = exec_is_zero(ctx, (x7.low + x7.high), (layout2.map(|c| c.pc_zero)))?; - let x9: Val = x8._super; - // ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:84) - let x10: BoundLayout = (x5.map(|c| c.arm1)); - // ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:86) - let x11: BoundLayout = (x4.map(|c| c.is_terminate)); - // ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:91) - let x12: ComponentStruct = ComponentStruct {}; - // ValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:10) - // ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:103) - let x13: ValU32Struct = ValU32Struct { - low: Val::new(0), - high: Val::new(0), - }; - // ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:104) - let x14: BoundLayout = (x10.map(|c| c._super)); - // ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:80) - let x15: Val = arg1.mode; - // ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:84) - let x16: BoundLayout = (((x10.map(|c| c._extra0)).map(|c| c.count)).map(|c| c._super)); - let x17: BoundLayout = (((x10.map(|c| c._extra1)).map(|c| c.count)).map(|c| c._super)); - let x18: BoundLayout = (((x10.map(|c| c._extra2)).map(|c| c.count)).map(|c| c._super)); - let x19: BoundLayout = (((x10.map(|c| c._extra3)).map(|c| c.count)).map(|c| c._super)); - let x20: BoundLayout = (((x10.map(|c| c._extra4)).map(|c| c.count)).map(|c| c._super)); - let x21: BoundLayout = (((x10.map(|c| c._extra5)).map(|c| c.count)).map(|c| c._super)); - let x22: BoundLayout = (((x10.map(|c| c._extra6)).map(|c| c.count)).map(|c| c._super)); - let x23: BoundLayout = (((x10.map(|c| c._extra7)).map(|c| c.count)).map(|c| c._super)); - let x24: BoundLayout = (((x10.map(|c| c._extra8)).map(|c| c.count)).map(|c| c._super)); - let x25: BoundLayout = (((x10.map(|c| c._extra9)).map(|c| c.count)).map(|c| c._super)); - let x26: BoundLayout = (((x10.map(|c| c._extra10)).map(|c| c.count)).map(|c| c._super)); - let x27: BoundLayout = (((x10.map(|c| c._extra11)).map(|c| c.count)).map(|c| c._super)); - let x28: BoundLayout = (((x10.map(|c| c._extra12)).map(|c| c.count)).map(|c| c._super)); - let x29: BoundLayout = (((x10.map(|c| c._extra13)).map(|c| c.count)).map(|c| c._super)); - let x30: BoundLayout = (((x10.map(|c| c._extra14)).map(|c| c.count)).map(|c| c._super)); - let x31: BoundLayout = (((x10.map(|c| c._extra15)).map(|c| c.count)).map(|c| c._super)); - let x32: BoundLayout = (((x10.map(|c| c._extra16)).map(|c| c.count)).map(|c| c._super)); - let x33: BoundLayout = (((x10.map(|c| c._extra17)).map(|c| c.count)).map(|c| c._super)); - let x34: InstOutputStruct; - if is_true(x9) { - // ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:89) - let x35: GetDataStruct8Array = map_layout( - [ - Val::new(0), - Val::new(1), - Val::new(2), - Val::new(3), - Val::new(4), - Val::new(5), - Val::new(6), - Val::new(7), - ], - ((x5.map(|c| c.arm0)).map(|c| c._1)), - |x36, x37| { - let x38: GetDataStruct = - exec_memory_read(ctx, arg0, (x36 + Val::new(1073725584)), x37)?; - return Ok(x38); - }, - )?; - let x39: ValU32Struct8Array = [ - x35[to_usize(Val::new(0))]._super, - x35[to_usize(Val::new(1))]._super, - x35[to_usize(Val::new(2))]._super, - x35[to_usize(Val::new(3))]._super, - x35[to_usize(Val::new(4))]._super, - x35[to_usize(Val::new(5))]._super, - x35[to_usize(Val::new(6))]._super, - x35[to_usize(Val::new(7))]._super, - ]; - // ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:88) - let x40: DigestRegStruct = exec_digest_reg(ctx, &x39, (x4.map(|c| c.output)))?; - // ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:86) - let x41: RegStruct = back_reg(ctx, 0, x11)?; - // ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:91) - let x42: Val = (Val::new(1) - x41._super._super); - // ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:86) - let x43: RegStruct = back_reg(ctx, 0, x11)?; - // ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:91) - let x44: Val = (Val::new(1) - x43._super._super); - let x45: ComponentStruct; - if is_true(x42) { - // ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:92) - let x46: RegStruct = exec_reg(ctx, Val::new(0), (x4.map(|c| c.term_a0low)))?; - // ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:93) - let x47: RegStruct = exec_reg(ctx, Val::new(0), (x4.map(|c| c.term_a0high)))?; - // ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:94) - let x48: RegStruct = exec_reg(ctx, Val::new(0), (x4.map(|c| c.term_a1low)))?; - // ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:95) - let x49: RegStruct = exec_reg(ctx, Val::new(0), (x4.map(|c| c.term_a1high)))?; - x45 = x12; - } else if is_true((Val::new(1) - x44)) { - x45 = x12; - } else { - bail!("Reached unreachable mux arm") - } - x34 = InstOutputStruct { - new_pc: x13.clone(), - new_state: Val::new(16), - new_mode: Val::new(3), - }; - } else if is_true((Val::new(1) - x9)) { - // ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:107) - let x50: RegStruct = exec_reg(ctx, x6, (x14.map(|c| c.state)))?; - let x51: Val = x50._super._super; - // ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:108) - let x52: Val = (x51 - Val::new(32)); - eqz!( - (x52 * (x51 - Val::new(4))), - "ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:108)" - ); - // ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:111) - let x53: RegStruct = exec_reg(ctx, (x52 * Val::new(1797558858)), x11)?; - // ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:113) - let x54: MemoryWriteStruct = - exec_memory_write(ctx, arg0, Val::new(1073725572), &x7, (x14.map(|c| c._0)))?; - // ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:114) - let x55: MemoryWriteStruct = exec_memory_write( - ctx, - arg0, - Val::new(1073725573), - &ValU32Struct { - low: x15, - high: Val::new(0), - }, - (x14.map(|c| c._1)), - )?; - // ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:84) - x16.store(ctx, Val::new(0)); - eqz!( - x16.load(ctx, 0), - "ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:84)" - ); - x17.store(ctx, Val::new(0)); - eqz!( - x17.load(ctx, 0), - "ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:84)" - ); - x18.store(ctx, Val::new(0)); - eqz!( - x18.load(ctx, 0), - "ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:84)" - ); - x19.store(ctx, Val::new(0)); - eqz!( - x19.load(ctx, 0), - "ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:84)" - ); - x20.store(ctx, Val::new(0)); - eqz!( - x20.load(ctx, 0), - "ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:84)" - ); - x21.store(ctx, Val::new(0)); - eqz!( - x21.load(ctx, 0), - "ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:84)" - ); - x22.store(ctx, Val::new(0)); - eqz!( - x22.load(ctx, 0), - "ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:84)" - ); - x23.store(ctx, Val::new(0)); - eqz!( - x23.load(ctx, 0), - "ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:84)" - ); - x24.store(ctx, Val::new(0)); - eqz!( - x24.load(ctx, 0), - "ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:84)" - ); - x25.store(ctx, Val::new(0)); - eqz!( - x25.load(ctx, 0), - "ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:84)" - ); - x26.store(ctx, Val::new(0)); - eqz!( - x26.load(ctx, 0), - "ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:84)" - ); - x27.store(ctx, Val::new(0)); - eqz!( - x27.load(ctx, 0), - "ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:84)" - ); - x28.store(ctx, Val::new(0)); - eqz!( - x28.load(ctx, 0), - "ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:84)" - ); - x29.store(ctx, Val::new(0)); - eqz!( - x29.load(ctx, 0), - "ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:84)" - ); - x30.store(ctx, Val::new(0)); - eqz!( - x30.load(ctx, 0), - "ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:84)" - ); - x31.store(ctx, Val::new(0)); - eqz!( - x31.load(ctx, 0), - "ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:84)" - ); - x32.store(ctx, Val::new(0)); - eqz!( - x32.load(ctx, 0), - "ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:84)" - ); - x33.store(ctx, Val::new(0)); - eqz!( - x33.load(ctx, 0), - "ControlSuspend(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:84)" - ); - x34 = InstOutputStruct { - new_pc: x13, - new_state: Val::new(4), - new_mode: x15, - }; - } else { - bail!("Reached unreachable mux arm") - } - return Ok(x34); -} -pub fn exec_control_store_root<'a>( - ctx: &'a ExecContext, - arg0: &RegStruct, - arg1: &InstInputStruct, - layout2: BoundLayout<'a, ControlStoreRootLayout, Val>, - global3: BufferRow, -) -> Result { - // ControlStoreRoot(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:120) - let x4: BoundLayout<_globalLayout, _> = bind_layout!(LAYOUT_GLOBAL, global3); - // ControlStoreRoot(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:121) - eqz!( - (arg1.state - Val::new(5)), - "ControlStoreRoot(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:121)" - ); - // ControlStoreRoot(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:123) - let x5: GetDataStruct8Array = map_layout( - [ - Val::new(0), - Val::new(1), - Val::new(2), - Val::new(3), - Val::new(4), - Val::new(5), - Val::new(6), - Val::new(7), - ], - (layout2.map(|c| c._1)), - |x6, x7| { - // ControlStoreRoot(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:124) - let x8: GetDataStruct = - exec_memory_page_out(ctx, arg0, (x6 + Val::new(1140850680)), x7)?; - return Ok(x8); - }, - )?; - // ControlStoreRoot(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:123) - let x9: ValU32Struct8Array = [ - x5[to_usize(Val::new(0))]._super, - x5[to_usize(Val::new(1))]._super, - x5[to_usize(Val::new(2))]._super, - x5[to_usize(Val::new(3))]._super, - x5[to_usize(Val::new(4))]._super, - x5[to_usize(Val::new(5))]._super, - x5[to_usize(Val::new(6))]._super, - x5[to_usize(Val::new(7))]._super, - ]; - // ControlStoreRoot(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:122) - let x10: DigestRegStruct = exec_digest_reg(ctx, &x9, (x4.map(|c| c.state_out)))?; - // InstOutput(zirgen/circuit/rv32im/v2/dsl/inst.zir:46) - // ControlStoreRoot(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:127) - let x11: InstOutputStruct = InstOutputStruct { - new_pc: ValU32Struct { - low: Val::new(0), - high: Val::new(0), - }, - new_state: Val::new(6), - new_mode: Val::new(0), - }; - return Ok(x11); -} -pub fn exec_control_table<'a>( - ctx: &'a ExecContext, - arg0: &RegStruct, - arg1: &InstInputStruct, - layout2: BoundLayout<'a, ControlTableLayout, Val>, -) -> Result { - // ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135) - let x3: BoundLayout = (layout2.map(|c| c._super)); - // ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:131) - eqz!( - (arg1.state - Val::new(6)), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:131)" - ); - // ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:132) - let x4: RegStruct = exec_reg(ctx, arg1.pc_u32.low, (layout2.map(|c| c.entry)))?; - // ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:133) - let x5: RegStruct = exec_reg(ctx, arg1.mode, (layout2.map(|c| c.mode)))?; - let x6: Val = x5._super._super; - // ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:132) - let x7: Val = x4._super._super; - // Log(:22) - // ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:134) - invoke_extern!(ctx, log, "mode/entry = ", [x6, x7]); - // ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135) - let x8: BoundLayout = (x3.map(|c| c.arm0)); - let x9: BoundLayout = (x3.map(|c| c.arm1)); - let x10: BoundLayout = (x8.map(|c| c._super)); - // ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:137) - let x11: Val16Array = [ - Val::new(0), - Val::new(1), - Val::new(2), - Val::new(3), - Val::new(4), - Val::new(5), - Val::new(6), - Val::new(7), - Val::new(8), - Val::new(9), - Val::new(10), - Val::new(11), - Val::new(12), - Val::new(13), - Val::new(14), - Val::new(15), - ]; - // ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:142) - let x12: Val = (x7 + Val::new(16)); - // ValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:10) - // ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:145) - let x13: ValU32Struct = ValU32Struct { - low: Val::new(0), - high: Val::new(0), - }; - // ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:147) - let x14: ValU32Struct = ValU32Struct { - low: x12, - high: Val::new(0), - }; - // ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135) - let x15: BoundLayout = (((x8.map(|c| c._extra0)).map(|c| c.count)).map(|c| c._super)); - let x16: BoundLayout = (((x8.map(|c| c._extra1)).map(|c| c.count)).map(|c| c._super)); - let x17: BoundLayout = (((x8.map(|c| c._extra2)).map(|c| c.count)).map(|c| c._super)); - let x18: BoundLayout = (((x8.map(|c| c._extra3)).map(|c| c.count)).map(|c| c._super)); - let x19: BoundLayout = (((x8.map(|c| c._extra4)).map(|c| c.count)).map(|c| c._super)); - let x20: BoundLayout = (((x8.map(|c| c._extra5)).map(|c| c.count)).map(|c| c._super)); - let x21: BoundLayout = (((x8.map(|c| c._extra6)).map(|c| c.count)).map(|c| c._super)); - let x22: BoundLayout = (((x8.map(|c| c._extra7)).map(|c| c.count)).map(|c| c._super)); - let x23: BoundLayout = (((x8.map(|c| c._extra8)).map(|c| c.count)).map(|c| c._super)); - let x24: BoundLayout = (((x8.map(|c| c._extra9)).map(|c| c.count)).map(|c| c._super)); - let x25: BoundLayout = (((x8.map(|c| c._extra10)).map(|c| c.count)).map(|c| c._super)); - let x26: BoundLayout = (((x8.map(|c| c._extra11)).map(|c| c.count)).map(|c| c._super)); - let x27: BoundLayout = (((x8.map(|c| c._extra12)).map(|c| c.count)).map(|c| c._super)); - let x28: BoundLayout = (((x8.map(|c| c._extra13)).map(|c| c.count)).map(|c| c._super)); - let x29: BoundLayout = (((x8.map(|c| c._extra14)).map(|c| c.count)).map(|c| c._super)); - let x30: BoundLayout = (((x8.map(|c| c._extra15)).map(|c| c.count)).map(|c| c._super)); - // ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:149) - let x31: BoundLayout = (x9.map(|c| c._super)); - // ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135) - let x32: BoundLayout = (((x9.map(|c| c._extra0)).map(|c| c.count)).map(|c| c._super)); - let x33: BoundLayout = (((x9.map(|c| c._extra1)).map(|c| c.count)).map(|c| c._super)); - let x34: BoundLayout = (((x9.map(|c| c._extra2)).map(|c| c.count)).map(|c| c._super)); - let x35: BoundLayout = (((x9.map(|c| c._extra3)).map(|c| c.count)).map(|c| c._super)); - let x36: BoundLayout = (((x9.map(|c| c._extra4)).map(|c| c.count)).map(|c| c._super)); - let x37: BoundLayout = (((x9.map(|c| c._extra5)).map(|c| c.count)).map(|c| c._super)); - let x38: BoundLayout = (((x9.map(|c| c._extra6)).map(|c| c.count)).map(|c| c._super)); - let x39: BoundLayout = (((x9.map(|c| c._extra7)).map(|c| c.count)).map(|c| c._super)); - let x40: BoundLayout = (((x9.map(|c| c._extra8)).map(|c| c.count)).map(|c| c._super)); - let x41: BoundLayout = (((x9.map(|c| c._extra9)).map(|c| c.count)).map(|c| c._super)); - let x42: BoundLayout = (((x9.map(|c| c._extra10)).map(|c| c.count)).map(|c| c._super)); - let x43: BoundLayout = (((x9.map(|c| c._extra11)).map(|c| c.count)).map(|c| c._super)); - let x44: BoundLayout = (((x9.map(|c| c._extra12)).map(|c| c.count)).map(|c| c._super)); - let x45: BoundLayout = (((x9.map(|c| c._extra13)).map(|c| c.count)).map(|c| c._super)); - let x46: BoundLayout = (((x9.map(|c| c._extra14)).map(|c| c.count)).map(|c| c._super)); - let x47: BoundLayout = (((x9.map(|c| c._extra15)).map(|c| c.count)).map(|c| c._super)); - let x48: InstOutputStruct; - if is_true(x6) { - // ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:137) - let x49: ControlTable_SuperArm0_Super__0Struct16Array = - map_layout(x11, (x10.map(|c| c._1)), |x50, x51| { - // ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:138) - let x52: Val = (x7 + x50); - // LookupCurrent(zirgen/circuit/rv32im/v2/dsl/lookups.zir:5) - // ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:139) - let x53: Val = invoke_extern!(ctx, lookup_current, Val::new(16), x52); - let x54: ArgU16Struct = exec_arg_u16(ctx, neg_0(x53)?, x52, (x51.map(|c| c.arg)))?; - // ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:140) - let x55: Val = (x54.val._super - x52); - eqz!( - x55, - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:140)" - ); - return Ok(ControlTable_SuperArm0_Super__0Struct {}); - })?; - // ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:143) - let x56: NondetRegStruct = - exec_is_zero(ctx, (x12 - Val::new(65536)), (x10.map(|c| c.done)))?; - let x57: Val = x56._super; - let x58: InstOutputStruct; - if is_true(x57) { - x58 = InstOutputStruct { - new_pc: x13.clone(), - new_state: Val::new(7), - new_mode: Val::new(0), - }; - } else if is_true((Val::new(1) - x57)) { - x58 = InstOutputStruct { - new_pc: x14.clone(), - new_state: Val::new(6), - new_mode: Val::new(1), - }; - } else { - bail!("Reached unreachable mux arm") - } // ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135) - x15.store(ctx, Val::new(0)); - eqz!( - x15.load(ctx, 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)" - ); - x16.store(ctx, Val::new(0)); - eqz!( - x16.load(ctx, 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)" - ); - x17.store(ctx, Val::new(0)); - eqz!( - x17.load(ctx, 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)" - ); - x18.store(ctx, Val::new(0)); - eqz!( - x18.load(ctx, 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)" - ); - x19.store(ctx, Val::new(0)); - eqz!( - x19.load(ctx, 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)" - ); - x20.store(ctx, Val::new(0)); - eqz!( - x20.load(ctx, 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)" - ); - x21.store(ctx, Val::new(0)); - eqz!( - x21.load(ctx, 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)" - ); - x22.store(ctx, Val::new(0)); - eqz!( - x22.load(ctx, 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)" - ); - x23.store(ctx, Val::new(0)); - eqz!( - x23.load(ctx, 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)" - ); - x24.store(ctx, Val::new(0)); - eqz!( - x24.load(ctx, 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)" - ); - x25.store(ctx, Val::new(0)); - eqz!( - x25.load(ctx, 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)" - ); - x26.store(ctx, Val::new(0)); - eqz!( - x26.load(ctx, 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)" - ); - x27.store(ctx, Val::new(0)); - eqz!( - x27.load(ctx, 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)" - ); - x28.store(ctx, Val::new(0)); - eqz!( - x28.load(ctx, 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)" - ); - x29.store(ctx, Val::new(0)); - eqz!( - x29.load(ctx, 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)" - ); - x30.store(ctx, Val::new(0)); - eqz!( - x30.load(ctx, 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)" - ); - x48 = x58; - } else if is_true((Val::new(1) - x6)) { - // ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:151) - let x59: ControlTable_SuperArm1_Super__0Struct16Array = - map_layout(x11, (x31.map(|c| c._1)), |x60, x61| { - // ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:152) - let x62: Val = (x7 + x60); - // LookupCurrent(zirgen/circuit/rv32im/v2/dsl/lookups.zir:5) - // ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:153) - let x63: Val = invoke_extern!(ctx, lookup_current, Val::new(8), x62); - let x64: ArgU8Struct = exec_arg_u8(ctx, neg_0(x63)?, x62, (x61.map(|c| c.arg)))?; - // ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:154) - let x65: Val = (x64.val._super - x62); - eqz!( - x65, - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:154)" - ); - return Ok(ControlTable_SuperArm1_Super__0Struct {}); - })?; - // ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:157) - let x66: NondetRegStruct = exec_is_zero(ctx, (x12 - Val::new(256)), (x31.map(|c| c.done)))?; - let x67: Val = x66._super; - let x68: InstOutputStruct; - if is_true(x67) { - x68 = InstOutputStruct { - new_pc: x13, - new_state: Val::new(6), - new_mode: Val::new(1), - }; - } else if is_true((Val::new(1) - x67)) { - x68 = InstOutputStruct { - new_pc: x14, - new_state: Val::new(6), - new_mode: Val::new(0), - }; - } else { - bail!("Reached unreachable mux arm") - } // ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135) - x32.store(ctx, Val::new(0)); - eqz!( - x32.load(ctx, 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)" - ); - x33.store(ctx, Val::new(0)); - eqz!( - x33.load(ctx, 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)" - ); - x34.store(ctx, Val::new(0)); - eqz!( - x34.load(ctx, 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)" - ); - x35.store(ctx, Val::new(0)); - eqz!( - x35.load(ctx, 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)" - ); - x36.store(ctx, Val::new(0)); - eqz!( - x36.load(ctx, 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)" - ); - x37.store(ctx, Val::new(0)); - eqz!( - x37.load(ctx, 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)" - ); - x38.store(ctx, Val::new(0)); - eqz!( - x38.load(ctx, 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)" - ); - x39.store(ctx, Val::new(0)); - eqz!( - x39.load(ctx, 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)" - ); - x40.store(ctx, Val::new(0)); - eqz!( - x40.load(ctx, 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)" - ); - x41.store(ctx, Val::new(0)); - eqz!( - x41.load(ctx, 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)" - ); - x42.store(ctx, Val::new(0)); - eqz!( - x42.load(ctx, 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)" - ); - x43.store(ctx, Val::new(0)); - eqz!( - x43.load(ctx, 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)" - ); - x44.store(ctx, Val::new(0)); - eqz!( - x44.load(ctx, 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)" - ); - x45.store(ctx, Val::new(0)); - eqz!( - x45.load(ctx, 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)" - ); - x46.store(ctx, Val::new(0)); - eqz!( - x46.load(ctx, 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)" - ); - x47.store(ctx, Val::new(0)); - eqz!( - x47.load(ctx, 0), - "ControlTable(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:135)" - ); - x48 = x68; - } else { - bail!("Reached unreachable mux arm") - } - return Ok(x48); -} -pub fn exec_control0<'a>( - ctx: &'a ExecContext, - arg0: &RegStruct, - arg1: &InstInputStruct, - layout2: BoundLayout<'a, Control0Layout, Val>, - global3: BufferRow, -) -> Result { - // Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176) - let x4: BoundLayout = (layout2.map(|c| c._super)); - // Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:171) - let x5: Val = arg0._super._super; - // GetDiffCount(zirgen/circuit/rv32im/v2/dsl/mem.zir:22) - // Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:173) - let x6: Val = invoke_extern!(ctx, get_diff_count, x5); - let x7: CycleArgStruct = exec_cycle_arg(ctx, neg_0(x6)?, x5, (layout2.map(|c| c.arg)))?; - // Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:175) - let x8: Val = (x7.cycle._super - x5); - eqz!( - x8, - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:175)" - ); - // Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:171) - let x9: NondetRegStruct8Array = arg1.minor_onehot._super; - // Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176) - let x10: BoundLayout = (x4.map(|c| c.arm0)); - let x11: BoundLayout = (x4.map(|c| c.arm1)); - let x12: BoundLayout = (x4.map(|c| c.arm2)); - let x13: BoundLayout = (x4.map(|c| c.arm3)); - let x14: BoundLayout = (x4.map(|c| c.arm4)); - let x15: BoundLayout = (x4.map(|c| c.arm5)); - let x16: BoundLayout = (x4.map(|c| c.arm6)); - let x17: BoundLayout = (x4.map(|c| c.arm7)); - let x18: BoundLayout = (((x10.map(|c| c._extra0)).map(|c| c.count)).map(|c| c._super)); - let x19: BoundLayout = (((x10.map(|c| c._extra1)).map(|c| c.count)).map(|c| c._super)); - let x20: BoundLayout = (((x10.map(|c| c._extra2)).map(|c| c.count)).map(|c| c._super)); - let x21: BoundLayout = (((x10.map(|c| c._extra3)).map(|c| c.count)).map(|c| c._super)); - let x22: BoundLayout = (((x10.map(|c| c._extra4)).map(|c| c.count)).map(|c| c._super)); - let x23: BoundLayout = (((x10.map(|c| c._extra5)).map(|c| c.count)).map(|c| c._super)); - let x24: BoundLayout = (((x10.map(|c| c._extra6)).map(|c| c.count)).map(|c| c._super)); - let x25: BoundLayout = (((x10.map(|c| c._extra7)).map(|c| c.count)).map(|c| c._super)); - let x26: BoundLayout = (((x10.map(|c| c._extra8)).map(|c| c.count)).map(|c| c._super)); - let x27: BoundLayout = (((x10.map(|c| c._extra9)).map(|c| c.count)).map(|c| c._super)); - let x28: BoundLayout = (((x10.map(|c| c._extra10)).map(|c| c.count)).map(|c| c._super)); - let x29: BoundLayout = (((x10.map(|c| c._extra11)).map(|c| c.count)).map(|c| c._super)); - let x30: BoundLayout = (((x10.map(|c| c._extra12)).map(|c| c.count)).map(|c| c._super)); - let x31: BoundLayout = (((x10.map(|c| c._extra13)).map(|c| c.count)).map(|c| c._super)); - let x32: BoundLayout = (((x10.map(|c| c._extra14)).map(|c| c.count)).map(|c| c._super)); - let x33: BoundLayout = (((x10.map(|c| c._extra15)).map(|c| c.count)).map(|c| c._super)); - let x34: BoundLayout = (((x10.map(|c| c._extra16)).map(|c| c.count)).map(|c| c._super)); - let x35: BoundLayout = (((x10.map(|c| c._extra17)).map(|c| c.count)).map(|c| c._super)); - let x36: BoundLayout = (((x10.map(|c| c._extra18)).map(|c| c.count)).map(|c| c._super)); - let x37: BoundLayout = (((x10.map(|c| c._extra19)).map(|c| c.count)).map(|c| c._super)); - let x38: BoundLayout = (((x10.map(|c| c._extra20)).map(|c| c.count)).map(|c| c._super)); - let x39: BoundLayout = (((x10.map(|c| c._extra21)).map(|c| c.count)).map(|c| c._super)); - let x40: BoundLayout = (((x10.map(|c| c._extra22)).map(|c| c.count)).map(|c| c._super)); - let x41: BoundLayout = (((x10.map(|c| c._extra23)).map(|c| c.count)).map(|c| c._super)); - let x42: BoundLayout = (((x10.map(|c| c._extra24)).map(|c| c.count)).map(|c| c._super)); - let x43: BoundLayout = (((x10.map(|c| c._extra25)).map(|c| c.count)).map(|c| c._super)); - let x44: BoundLayout = (((x10.map(|c| c._extra26)).map(|c| c.count)).map(|c| c._super)); - let x45: BoundLayout = (((x10.map(|c| c._extra27)).map(|c| c.count)).map(|c| c._super)); - let x46: BoundLayout = (((x10.map(|c| c._extra28)).map(|c| c.count)).map(|c| c._super)); - let x47: BoundLayout = (((x10.map(|c| c._extra29)).map(|c| c.count)).map(|c| c._super)); - let x48: BoundLayout = (((x10.map(|c| c._extra30)).map(|c| c.count)).map(|c| c._super)); - let x49: BoundLayout = (((x10.map(|c| c._extra31)).map(|c| c.count)).map(|c| c._super)); - let x50: BoundLayout = (((x10.map(|c| c._extra32)).map(|c| c.count)).map(|c| c._super)); - let x51: BoundLayout = (((x10.map(|c| c._extra33)).map(|c| c.count)).map(|c| c._super)); - let x52: BoundLayout = (((x10.map(|c| c._extra34)).map(|c| c.count)).map(|c| c._super)); - let x53: BoundLayout = (((x10.map(|c| c._extra35)).map(|c| c.count)).map(|c| c._super)); - let x54: BoundLayout = (((x10.map(|c| c._extra36)).map(|c| c.count)).map(|c| c._super)); - let x55: BoundLayout = (((x10.map(|c| c._extra37)).map(|c| c.count)).map(|c| c._super)); - let x56: BoundLayout = (((x10.map(|c| c._extra38)).map(|c| c.count)).map(|c| c._super)); - let x57: BoundLayout = (((x10.map(|c| c._extra39)).map(|c| c.count)).map(|c| c._super)); - let x58: BoundLayout = (((x11.map(|c| c._extra0)).map(|c| c.count)).map(|c| c._super)); - let x59: BoundLayout = (((x11.map(|c| c._extra1)).map(|c| c.count)).map(|c| c._super)); - let x60: BoundLayout = (((x11.map(|c| c._extra2)).map(|c| c.count)).map(|c| c._super)); - let x61: BoundLayout = (((x11.map(|c| c._extra3)).map(|c| c.count)).map(|c| c._super)); - let x62: BoundLayout = (((x11.map(|c| c._extra4)).map(|c| c.count)).map(|c| c._super)); - let x63: BoundLayout = (((x11.map(|c| c._extra5)).map(|c| c.count)).map(|c| c._super)); - let x64: BoundLayout = (((x11.map(|c| c._extra6)).map(|c| c.count)).map(|c| c._super)); - let x65: BoundLayout = (((x11.map(|c| c._extra7)).map(|c| c.count)).map(|c| c._super)); - let x66: BoundLayout = (((x11.map(|c| c._extra8)).map(|c| c.count)).map(|c| c._super)); - let x67: BoundLayout = (((x11.map(|c| c._extra9)).map(|c| c.count)).map(|c| c._super)); - let x68: BoundLayout = (((x11.map(|c| c._extra10)).map(|c| c.count)).map(|c| c._super)); - let x69: BoundLayout = (((x11.map(|c| c._extra11)).map(|c| c.count)).map(|c| c._super)); - let x70: BoundLayout = (((x11.map(|c| c._extra12)).map(|c| c.count)).map(|c| c._super)); - let x71: BoundLayout = (((x11.map(|c| c._extra13)).map(|c| c.count)).map(|c| c._super)); - let x72: BoundLayout = (((x11.map(|c| c._extra14)).map(|c| c.count)).map(|c| c._super)); - let x73: BoundLayout = (((x11.map(|c| c._extra15)).map(|c| c.count)).map(|c| c._super)); - let x74: BoundLayout = (((x11.map(|c| c._extra16)).map(|c| c.count)).map(|c| c._super)); - let x75: BoundLayout = (((x11.map(|c| c._extra17)).map(|c| c.count)).map(|c| c._super)); - let x76: BoundLayout = (((x11.map(|c| c._extra18)).map(|c| c.count)).map(|c| c._super)); - let x77: BoundLayout = (((x11.map(|c| c._extra19)).map(|c| c.count)).map(|c| c._super)); - let x78: BoundLayout = (((x11.map(|c| c._extra20)).map(|c| c.count)).map(|c| c._super)); - let x79: BoundLayout = (((x11.map(|c| c._extra21)).map(|c| c.count)).map(|c| c._super)); - let x80: BoundLayout = (((x11.map(|c| c._extra22)).map(|c| c.count)).map(|c| c._super)); - let x81: BoundLayout = (((x11.map(|c| c._extra23)).map(|c| c.count)).map(|c| c._super)); - let x82: BoundLayout = (((x11.map(|c| c._extra24)).map(|c| c.count)).map(|c| c._super)); - let x83: BoundLayout = (((x11.map(|c| c._extra25)).map(|c| c.count)).map(|c| c._super)); - let x84: BoundLayout = (((x11.map(|c| c._extra26)).map(|c| c.count)).map(|c| c._super)); - let x85: BoundLayout = (((x11.map(|c| c._extra27)).map(|c| c.count)).map(|c| c._super)); - let x86: BoundLayout = (((x11.map(|c| c._extra28)).map(|c| c.count)).map(|c| c._super)); - let x87: BoundLayout = (((x11.map(|c| c._extra29)).map(|c| c.count)).map(|c| c._super)); - let x88: BoundLayout = (((x11.map(|c| c._extra30)).map(|c| c.count)).map(|c| c._super)); - let x89: BoundLayout = (((x11.map(|c| c._extra31)).map(|c| c.count)).map(|c| c._super)); - let x90: BoundLayout = (((x12.map(|c| c._extra0)).map(|c| c.count)).map(|c| c._super)); - let x91: BoundLayout = (((x12.map(|c| c._extra1)).map(|c| c.count)).map(|c| c._super)); - let x92: BoundLayout = (((x12.map(|c| c._extra2)).map(|c| c.count)).map(|c| c._super)); - let x93: BoundLayout = (((x12.map(|c| c._extra3)).map(|c| c.count)).map(|c| c._super)); - let x94: BoundLayout = (((x12.map(|c| c._extra4)).map(|c| c.count)).map(|c| c._super)); - let x95: BoundLayout = (((x12.map(|c| c._extra5)).map(|c| c.count)).map(|c| c._super)); - let x96: BoundLayout = (((x12.map(|c| c._extra6)).map(|c| c.count)).map(|c| c._super)); - let x97: BoundLayout = (((x12.map(|c| c._extra7)).map(|c| c.count)).map(|c| c._super)); - let x98: BoundLayout = (((x12.map(|c| c._extra8)).map(|c| c.count)).map(|c| c._super)); - let x99: BoundLayout = (((x12.map(|c| c._extra9)).map(|c| c.count)).map(|c| c._super)); - let x100: BoundLayout = - (((x12.map(|c| c._extra10)).map(|c| c.count)).map(|c| c._super)); - let x101: BoundLayout = - (((x12.map(|c| c._extra11)).map(|c| c.count)).map(|c| c._super)); - let x102: BoundLayout = - (((x12.map(|c| c._extra12)).map(|c| c.count)).map(|c| c._super)); - let x103: BoundLayout = - (((x12.map(|c| c._extra13)).map(|c| c.count)).map(|c| c._super)); - let x104: BoundLayout = - (((x12.map(|c| c._extra14)).map(|c| c.count)).map(|c| c._super)); - let x105: BoundLayout = - (((x12.map(|c| c._extra15)).map(|c| c.count)).map(|c| c._super)); - let x106: BoundLayout = - (((x12.map(|c| c._extra16)).map(|c| c.count)).map(|c| c._super)); - let x107: BoundLayout = - (((x12.map(|c| c._extra17)).map(|c| c.count)).map(|c| c._super)); - let x108: BoundLayout = - (((x12.map(|c| c._extra18)).map(|c| c.count)).map(|c| c._super)); - let x109: BoundLayout = - (((x12.map(|c| c._extra19)).map(|c| c.count)).map(|c| c._super)); - let x110: BoundLayout = - (((x12.map(|c| c._extra20)).map(|c| c.count)).map(|c| c._super)); - let x111: BoundLayout = - (((x12.map(|c| c._extra21)).map(|c| c.count)).map(|c| c._super)); - let x112: BoundLayout = - (((x12.map(|c| c._extra22)).map(|c| c.count)).map(|c| c._super)); - let x113: BoundLayout = - (((x12.map(|c| c._extra23)).map(|c| c.count)).map(|c| c._super)); - let x114: BoundLayout = - (((x12.map(|c| c._extra24)).map(|c| c.count)).map(|c| c._super)); - let x115: BoundLayout = - (((x12.map(|c| c._extra25)).map(|c| c.count)).map(|c| c._super)); - let x116: BoundLayout = - (((x12.map(|c| c._extra26)).map(|c| c.count)).map(|c| c._super)); - let x117: BoundLayout = - (((x12.map(|c| c._extra27)).map(|c| c.count)).map(|c| c._super)); - let x118: BoundLayout = - (((x12.map(|c| c._extra28)).map(|c| c.count)).map(|c| c._super)); - let x119: BoundLayout = - (((x12.map(|c| c._extra29)).map(|c| c.count)).map(|c| c._super)); - let x120: BoundLayout = - (((x12.map(|c| c._extra30)).map(|c| c.count)).map(|c| c._super)); - let x121: BoundLayout = - (((x12.map(|c| c._extra31)).map(|c| c.count)).map(|c| c._super)); - let x122: BoundLayout = - (((x12.map(|c| c._extra32)).map(|c| c.count)).map(|c| c._super)); - let x123: BoundLayout = - (((x12.map(|c| c._extra33)).map(|c| c.count)).map(|c| c._super)); - let x124: BoundLayout = - (((x12.map(|c| c._extra34)).map(|c| c.count)).map(|c| c._super)); - let x125: BoundLayout = - (((x12.map(|c| c._extra35)).map(|c| c.count)).map(|c| c._super)); - let x126: BoundLayout = - (((x12.map(|c| c._extra36)).map(|c| c.count)).map(|c| c._super)); - let x127: BoundLayout = - (((x12.map(|c| c._extra37)).map(|c| c.count)).map(|c| c._super)); - let x128: BoundLayout = - (((x12.map(|c| c._extra38)).map(|c| c.count)).map(|c| c._super)); - let x129: BoundLayout = - (((x12.map(|c| c._extra39)).map(|c| c.count)).map(|c| c._super)); - let x130: BoundLayout = - (((x12.map(|c| c._extra40)).map(|c| c.count)).map(|c| c._super)); - let x131: BoundLayout = (((x13.map(|c| c._extra0)).map(|c| c.count)).map(|c| c._super)); - let x132: BoundLayout = (((x13.map(|c| c._extra1)).map(|c| c.count)).map(|c| c._super)); - let x133: BoundLayout = (((x13.map(|c| c._extra2)).map(|c| c.count)).map(|c| c._super)); - let x134: BoundLayout = (((x13.map(|c| c._extra3)).map(|c| c.count)).map(|c| c._super)); - let x135: BoundLayout = (((x13.map(|c| c._extra4)).map(|c| c.count)).map(|c| c._super)); - let x136: BoundLayout = (((x13.map(|c| c._extra5)).map(|c| c.count)).map(|c| c._super)); - let x137: BoundLayout = (((x13.map(|c| c._extra6)).map(|c| c.count)).map(|c| c._super)); - let x138: BoundLayout = (((x13.map(|c| c._extra7)).map(|c| c.count)).map(|c| c._super)); - let x139: BoundLayout = (((x13.map(|c| c._extra8)).map(|c| c.count)).map(|c| c._super)); - let x140: BoundLayout = (((x13.map(|c| c._extra9)).map(|c| c.count)).map(|c| c._super)); - let x141: BoundLayout = - (((x13.map(|c| c._extra10)).map(|c| c.count)).map(|c| c._super)); - let x142: BoundLayout = - (((x13.map(|c| c._extra11)).map(|c| c.count)).map(|c| c._super)); - let x143: BoundLayout = - (((x13.map(|c| c._extra12)).map(|c| c.count)).map(|c| c._super)); - let x144: BoundLayout = - (((x13.map(|c| c._extra13)).map(|c| c.count)).map(|c| c._super)); - let x145: BoundLayout = - (((x13.map(|c| c._extra14)).map(|c| c.count)).map(|c| c._super)); - let x146: BoundLayout = - (((x13.map(|c| c._extra15)).map(|c| c.count)).map(|c| c._super)); - let x147: BoundLayout = - (((x13.map(|c| c._extra16)).map(|c| c.count)).map(|c| c._super)); - let x148: BoundLayout = - (((x13.map(|c| c._extra17)).map(|c| c.count)).map(|c| c._super)); - let x149: BoundLayout = - (((x13.map(|c| c._extra18)).map(|c| c.count)).map(|c| c._super)); - let x150: BoundLayout = - (((x13.map(|c| c._extra19)).map(|c| c.count)).map(|c| c._super)); - let x151: BoundLayout = - (((x13.map(|c| c._extra20)).map(|c| c.count)).map(|c| c._super)); - let x152: BoundLayout = - (((x13.map(|c| c._extra21)).map(|c| c.count)).map(|c| c._super)); - let x153: BoundLayout = - (((x13.map(|c| c._extra22)).map(|c| c.count)).map(|c| c._super)); - let x154: BoundLayout = - (((x13.map(|c| c._extra23)).map(|c| c.count)).map(|c| c._super)); - let x155: BoundLayout = - (((x13.map(|c| c._extra24)).map(|c| c.count)).map(|c| c._super)); - let x156: BoundLayout = - (((x13.map(|c| c._extra25)).map(|c| c.count)).map(|c| c._super)); - let x157: BoundLayout = - (((x13.map(|c| c._extra26)).map(|c| c.count)).map(|c| c._super)); - let x158: BoundLayout = - (((x13.map(|c| c._extra27)).map(|c| c.count)).map(|c| c._super)); - let x159: BoundLayout = - (((x13.map(|c| c._extra28)).map(|c| c.count)).map(|c| c._super)); - let x160: BoundLayout = - (((x13.map(|c| c._extra29)).map(|c| c.count)).map(|c| c._super)); - let x161: BoundLayout = - (((x13.map(|c| c._extra30)).map(|c| c.count)).map(|c| c._super)); - let x162: BoundLayout = - (((x13.map(|c| c._extra31)).map(|c| c.count)).map(|c| c._super)); - let x163: BoundLayout = - (((x13.map(|c| c._extra32)).map(|c| c.count)).map(|c| c._super)); - let x164: BoundLayout = - (((x13.map(|c| c._extra33)).map(|c| c.count)).map(|c| c._super)); - let x165: BoundLayout = - (((x13.map(|c| c._extra34)).map(|c| c.count)).map(|c| c._super)); - let x166: BoundLayout = - (((x13.map(|c| c._extra35)).map(|c| c.count)).map(|c| c._super)); - let x167: BoundLayout = - (((x13.map(|c| c._extra36)).map(|c| c.count)).map(|c| c._super)); - let x168: BoundLayout = - (((x13.map(|c| c._extra37)).map(|c| c.count)).map(|c| c._super)); - let x169: BoundLayout = - (((x13.map(|c| c._extra38)).map(|c| c.count)).map(|c| c._super)); - let x170: BoundLayout = - (((x13.map(|c| c._extra39)).map(|c| c.count)).map(|c| c._super)); - let x171: BoundLayout = - (((x13.map(|c| c._extra40)).map(|c| c.count)).map(|c| c._super)); - let x172: BoundLayout = - (((x13.map(|c| c._extra41)).map(|c| c.count)).map(|c| c._super)); - let x173: BoundLayout = - (((x13.map(|c| c._extra42)).map(|c| c.count)).map(|c| c._super)); - let x174: BoundLayout = - (((x13.map(|c| c._extra43)).map(|c| c.count)).map(|c| c._super)); - let x175: BoundLayout = - (((x13.map(|c| c._extra44)).map(|c| c.count)).map(|c| c._super)); - let x176: BoundLayout = - (((x13.map(|c| c._extra45)).map(|c| c.count)).map(|c| c._super)); - let x177: BoundLayout = (((x14.map(|c| c._extra0)).map(|c| c.count)).map(|c| c._super)); - let x178: BoundLayout = (((x14.map(|c| c._extra1)).map(|c| c.count)).map(|c| c._super)); - let x179: BoundLayout = (((x14.map(|c| c._extra2)).map(|c| c.count)).map(|c| c._super)); - let x180: BoundLayout = (((x14.map(|c| c._extra3)).map(|c| c.count)).map(|c| c._super)); - let x181: BoundLayout = (((x14.map(|c| c._extra4)).map(|c| c.count)).map(|c| c._super)); - let x182: BoundLayout = (((x14.map(|c| c._extra5)).map(|c| c.count)).map(|c| c._super)); - let x183: BoundLayout = (((x14.map(|c| c._extra6)).map(|c| c.count)).map(|c| c._super)); - let x184: BoundLayout = (((x14.map(|c| c._extra7)).map(|c| c.count)).map(|c| c._super)); - let x185: BoundLayout = (((x14.map(|c| c._extra8)).map(|c| c.count)).map(|c| c._super)); - let x186: BoundLayout = (((x14.map(|c| c._extra9)).map(|c| c.count)).map(|c| c._super)); - let x187: BoundLayout = - (((x14.map(|c| c._extra10)).map(|c| c.count)).map(|c| c._super)); - let x188: BoundLayout = - (((x14.map(|c| c._extra11)).map(|c| c.count)).map(|c| c._super)); - let x189: BoundLayout = - (((x14.map(|c| c._extra12)).map(|c| c.count)).map(|c| c._super)); - let x190: BoundLayout = - (((x14.map(|c| c._extra13)).map(|c| c.count)).map(|c| c._super)); - let x191: BoundLayout = - (((x14.map(|c| c._extra14)).map(|c| c.count)).map(|c| c._super)); - let x192: BoundLayout = - (((x14.map(|c| c._extra15)).map(|c| c.count)).map(|c| c._super)); - let x193: BoundLayout = - (((x14.map(|c| c._extra16)).map(|c| c.count)).map(|c| c._super)); - let x194: BoundLayout = - (((x14.map(|c| c._extra17)).map(|c| c.count)).map(|c| c._super)); - let x195: BoundLayout = - (((x14.map(|c| c._extra18)).map(|c| c.count)).map(|c| c._super)); - let x196: BoundLayout = - (((x14.map(|c| c._extra19)).map(|c| c.count)).map(|c| c._super)); - let x197: BoundLayout = - (((x14.map(|c| c._extra20)).map(|c| c.count)).map(|c| c._super)); - let x198: BoundLayout = - (((x14.map(|c| c._extra21)).map(|c| c.count)).map(|c| c._super)); - let x199: BoundLayout = - (((x14.map(|c| c._extra22)).map(|c| c.count)).map(|c| c._super)); - let x200: BoundLayout = - (((x14.map(|c| c._extra23)).map(|c| c.count)).map(|c| c._super)); - let x201: BoundLayout = - (((x14.map(|c| c._extra24)).map(|c| c.count)).map(|c| c._super)); - let x202: BoundLayout = - (((x14.map(|c| c._extra25)).map(|c| c.count)).map(|c| c._super)); - let x203: BoundLayout = - (((x14.map(|c| c._extra26)).map(|c| c.count)).map(|c| c._super)); - let x204: BoundLayout = - (((x14.map(|c| c._extra27)).map(|c| c.count)).map(|c| c._super)); - let x205: BoundLayout = - (((x14.map(|c| c._extra28)).map(|c| c.count)).map(|c| c._super)); - let x206: BoundLayout = - (((x14.map(|c| c._extra29)).map(|c| c.count)).map(|c| c._super)); - let x207: BoundLayout = - (((x14.map(|c| c._extra30)).map(|c| c.count)).map(|c| c._super)); - let x208: BoundLayout = - (((x14.map(|c| c._extra31)).map(|c| c.count)).map(|c| c._super)); - let x209: BoundLayout = (((x15.map(|c| c._extra0)).map(|c| c.count)).map(|c| c._super)); - let x210: BoundLayout = (((x15.map(|c| c._extra1)).map(|c| c.count)).map(|c| c._super)); - let x211: BoundLayout = (((x15.map(|c| c._extra2)).map(|c| c.count)).map(|c| c._super)); - let x212: BoundLayout = (((x15.map(|c| c._extra3)).map(|c| c.count)).map(|c| c._super)); - let x213: BoundLayout = (((x15.map(|c| c._extra4)).map(|c| c.count)).map(|c| c._super)); - let x214: BoundLayout = (((x15.map(|c| c._extra5)).map(|c| c.count)).map(|c| c._super)); - let x215: BoundLayout = (((x15.map(|c| c._extra6)).map(|c| c.count)).map(|c| c._super)); - let x216: BoundLayout = (((x15.map(|c| c._extra7)).map(|c| c.count)).map(|c| c._super)); - let x217: BoundLayout = (((x15.map(|c| c._extra8)).map(|c| c.count)).map(|c| c._super)); - let x218: BoundLayout = (((x15.map(|c| c._extra9)).map(|c| c.count)).map(|c| c._super)); - let x219: BoundLayout = - (((x15.map(|c| c._extra10)).map(|c| c.count)).map(|c| c._super)); - let x220: BoundLayout = - (((x15.map(|c| c._extra11)).map(|c| c.count)).map(|c| c._super)); - let x221: BoundLayout = - (((x15.map(|c| c._extra12)).map(|c| c.count)).map(|c| c._super)); - let x222: BoundLayout = - (((x15.map(|c| c._extra13)).map(|c| c.count)).map(|c| c._super)); - let x223: BoundLayout = - (((x15.map(|c| c._extra14)).map(|c| c.count)).map(|c| c._super)); - let x224: BoundLayout = - (((x15.map(|c| c._extra15)).map(|c| c.count)).map(|c| c._super)); - let x225: BoundLayout = - (((x15.map(|c| c._extra16)).map(|c| c.count)).map(|c| c._super)); - let x226: BoundLayout = - (((x15.map(|c| c._extra17)).map(|c| c.count)).map(|c| c._super)); - let x227: BoundLayout = - (((x15.map(|c| c._extra18)).map(|c| c.count)).map(|c| c._super)); - let x228: BoundLayout = - (((x15.map(|c| c._extra19)).map(|c| c.count)).map(|c| c._super)); - let x229: BoundLayout = - (((x15.map(|c| c._extra20)).map(|c| c.count)).map(|c| c._super)); - let x230: BoundLayout = - (((x15.map(|c| c._extra21)).map(|c| c.count)).map(|c| c._super)); - let x231: BoundLayout = - (((x15.map(|c| c._extra22)).map(|c| c.count)).map(|c| c._super)); - let x232: BoundLayout = - (((x15.map(|c| c._extra23)).map(|c| c.count)).map(|c| c._super)); - let x233: BoundLayout = - (((x15.map(|c| c._extra24)).map(|c| c.count)).map(|c| c._super)); - let x234: BoundLayout = - (((x15.map(|c| c._extra25)).map(|c| c.count)).map(|c| c._super)); - let x235: BoundLayout = - (((x15.map(|c| c._extra26)).map(|c| c.count)).map(|c| c._super)); - let x236: BoundLayout = - (((x15.map(|c| c._extra27)).map(|c| c.count)).map(|c| c._super)); - let x237: BoundLayout = - (((x15.map(|c| c._extra28)).map(|c| c.count)).map(|c| c._super)); - let x238: BoundLayout = - (((x15.map(|c| c._extra29)).map(|c| c.count)).map(|c| c._super)); - let x239: BoundLayout = - (((x15.map(|c| c._extra30)).map(|c| c.count)).map(|c| c._super)); - let x240: BoundLayout = - (((x15.map(|c| c._extra31)).map(|c| c.count)).map(|c| c._super)); - let x241: BoundLayout = (((x16.map(|c| c._extra0)).map(|c| c.count)).map(|c| c._super)); - let x242: BoundLayout = (((x16.map(|c| c._extra1)).map(|c| c.count)).map(|c| c._super)); - let x243: BoundLayout = (((x16.map(|c| c._extra2)).map(|c| c.count)).map(|c| c._super)); - let x244: BoundLayout = (((x16.map(|c| c._extra3)).map(|c| c.count)).map(|c| c._super)); - let x245: BoundLayout = (((x16.map(|c| c._extra4)).map(|c| c.count)).map(|c| c._super)); - let x246: BoundLayout = (((x16.map(|c| c._extra5)).map(|c| c.count)).map(|c| c._super)); - let x247: BoundLayout = (((x16.map(|c| c._extra6)).map(|c| c.count)).map(|c| c._super)); - let x248: BoundLayout = (((x16.map(|c| c._extra7)).map(|c| c.count)).map(|c| c._super)); - let x249: BoundLayout = (((x16.map(|c| c._extra8)).map(|c| c.count)).map(|c| c._super)); - let x250: BoundLayout = (((x16.map(|c| c._extra9)).map(|c| c.count)).map(|c| c._super)); - let x251: BoundLayout = - (((x16.map(|c| c._extra10)).map(|c| c.count)).map(|c| c._super)); - let x252: BoundLayout = - (((x16.map(|c| c._extra11)).map(|c| c.count)).map(|c| c._super)); - let x253: BoundLayout = - (((x16.map(|c| c._extra12)).map(|c| c.count)).map(|c| c._super)); - let x254: BoundLayout = - (((x16.map(|c| c._extra13)).map(|c| c.count)).map(|c| c._super)); - let x255: BoundLayout = - (((x16.map(|c| c._extra14)).map(|c| c.count)).map(|c| c._super)); - let x256: BoundLayout = - (((x16.map(|c| c._extra15)).map(|c| c.count)).map(|c| c._super)); - let x257: BoundLayout = - (((x16.map(|c| c._extra16)).map(|c| c.count)).map(|c| c._super)); - let x258: BoundLayout = - (((x16.map(|c| c._extra17)).map(|c| c.count)).map(|c| c._super)); - let x259: BoundLayout = - (((x16.map(|c| c._extra18)).map(|c| c.count)).map(|c| c._super)); - let x260: BoundLayout = - (((x16.map(|c| c._extra19)).map(|c| c.count)).map(|c| c._super)); - let x261: BoundLayout = - (((x16.map(|c| c._extra20)).map(|c| c.count)).map(|c| c._super)); - let x262: BoundLayout = - (((x16.map(|c| c._extra21)).map(|c| c.count)).map(|c| c._super)); - let x263: BoundLayout = - (((x16.map(|c| c._extra22)).map(|c| c.count)).map(|c| c._super)); - let x264: BoundLayout = - (((x16.map(|c| c._extra23)).map(|c| c.count)).map(|c| c._super)); - // InstOutput(zirgen/circuit/rv32im/v2/dsl/inst.zir:46) - // ControlDone(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:168) - // Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:184) - let x265: InstOutputStruct = InstOutputStruct { - new_pc: ValU32Struct { - low: Val::new(0), - high: Val::new(0), - }, - new_state: Val::new(7), - new_mode: Val::new(0), - }; - // Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176) - let x266: BoundLayout = (((x17.map(|c| c._extra0)).map(|c| c.count)).map(|c| c._super)); - let x267: BoundLayout = (((x17.map(|c| c._extra1)).map(|c| c.count)).map(|c| c._super)); - let x268: BoundLayout = (((x17.map(|c| c._extra2)).map(|c| c.count)).map(|c| c._super)); - let x269: BoundLayout = (((x17.map(|c| c._extra3)).map(|c| c.count)).map(|c| c._super)); - let x270: BoundLayout = (((x17.map(|c| c._extra4)).map(|c| c.count)).map(|c| c._super)); - let x271: BoundLayout = (((x17.map(|c| c._extra5)).map(|c| c.count)).map(|c| c._super)); - let x272: BoundLayout = (((x17.map(|c| c._extra6)).map(|c| c.count)).map(|c| c._super)); - let x273: BoundLayout = (((x17.map(|c| c._extra7)).map(|c| c.count)).map(|c| c._super)); - let x274: BoundLayout = (((x17.map(|c| c._extra8)).map(|c| c.count)).map(|c| c._super)); - let x275: BoundLayout = (((x17.map(|c| c._extra9)).map(|c| c.count)).map(|c| c._super)); - let x276: BoundLayout = - (((x17.map(|c| c._extra10)).map(|c| c.count)).map(|c| c._super)); - let x277: BoundLayout = - (((x17.map(|c| c._extra11)).map(|c| c.count)).map(|c| c._super)); - let x278: BoundLayout = - (((x17.map(|c| c._extra12)).map(|c| c.count)).map(|c| c._super)); - let x279: BoundLayout = - (((x17.map(|c| c._extra13)).map(|c| c.count)).map(|c| c._super)); - let x280: BoundLayout = - (((x17.map(|c| c._extra14)).map(|c| c.count)).map(|c| c._super)); - let x281: BoundLayout = - (((x17.map(|c| c._extra15)).map(|c| c.count)).map(|c| c._super)); - let x282: BoundLayout = - (((x17.map(|c| c._extra16)).map(|c| c.count)).map(|c| c._super)); - let x283: BoundLayout = - (((x17.map(|c| c._extra17)).map(|c| c.count)).map(|c| c._super)); - let x284: BoundLayout = - (((x17.map(|c| c._extra18)).map(|c| c.count)).map(|c| c._super)); - let x285: BoundLayout = - (((x17.map(|c| c._extra19)).map(|c| c.count)).map(|c| c._super)); - let x286: BoundLayout = - (((x17.map(|c| c._extra20)).map(|c| c.count)).map(|c| c._super)); - let x287: BoundLayout = - (((x17.map(|c| c._extra21)).map(|c| c.count)).map(|c| c._super)); - let x288: BoundLayout = - (((x17.map(|c| c._extra22)).map(|c| c.count)).map(|c| c._super)); - let x289: BoundLayout = - (((x17.map(|c| c._extra23)).map(|c| c.count)).map(|c| c._super)); - let x290: BoundLayout = - (((x17.map(|c| c._extra24)).map(|c| c.count)).map(|c| c._super)); - let x291: BoundLayout = - (((x17.map(|c| c._extra25)).map(|c| c.count)).map(|c| c._super)); - let x292: BoundLayout = - (((x17.map(|c| c._extra26)).map(|c| c.count)).map(|c| c._super)); - let x293: BoundLayout = - (((x17.map(|c| c._extra27)).map(|c| c.count)).map(|c| c._super)); - let x294: BoundLayout = - (((x17.map(|c| c._extra28)).map(|c| c.count)).map(|c| c._super)); - let x295: BoundLayout = - (((x17.map(|c| c._extra29)).map(|c| c.count)).map(|c| c._super)); - let x296: BoundLayout = - (((x17.map(|c| c._extra30)).map(|c| c.count)).map(|c| c._super)); - let x297: BoundLayout = - (((x17.map(|c| c._extra31)).map(|c| c.count)).map(|c| c._super)); - let x298: BoundLayout = - (((x17.map(|c| c._extra32)).map(|c| c.count)).map(|c| c._super)); - let x299: BoundLayout = - (((x17.map(|c| c._extra33)).map(|c| c.count)).map(|c| c._super)); - let x300: BoundLayout = - (((x17.map(|c| c._extra34)).map(|c| c.count)).map(|c| c._super)); - let x301: BoundLayout = - (((x17.map(|c| c._extra35)).map(|c| c.count)).map(|c| c._super)); - let x302: BoundLayout = - (((x17.map(|c| c._extra36)).map(|c| c.count)).map(|c| c._super)); - let x303: BoundLayout = - (((x17.map(|c| c._extra37)).map(|c| c.count)).map(|c| c._super)); - let x304: BoundLayout = - (((x17.map(|c| c._extra38)).map(|c| c.count)).map(|c| c._super)); - let x305: BoundLayout = - (((x17.map(|c| c._extra39)).map(|c| c.count)).map(|c| c._super)); - let x306: BoundLayout = - (((x17.map(|c| c._extra40)).map(|c| c.count)).map(|c| c._super)); - let x307: BoundLayout = - (((x17.map(|c| c._extra41)).map(|c| c.count)).map(|c| c._super)); - let x308: BoundLayout = - (((x17.map(|c| c._extra42)).map(|c| c.count)).map(|c| c._super)); - let x309: BoundLayout = - (((x17.map(|c| c._extra43)).map(|c| c.count)).map(|c| c._super)); - let x310: BoundLayout = - (((x17.map(|c| c._extra44)).map(|c| c.count)).map(|c| c._super)); - let x311: BoundLayout = - (((x17.map(|c| c._extra45)).map(|c| c.count)).map(|c| c._super)); - let x312: BoundLayout = - (((x17.map(|c| c._extra46)).map(|c| c.count)).map(|c| c._super)); - let x313: BoundLayout = - (((x17.map(|c| c._extra47)).map(|c| c.count)).map(|c| c._super)); - let x314: BoundLayout = - (((x17.map(|c| c._extra48)).map(|c| c.count)).map(|c| c._super)); - let x315: BoundLayout = - (((x17.map(|c| c._extra49)).map(|c| c.count)).map(|c| c._super)); - let x316: BoundLayout = - (((x17.map(|c| c._extra50)).map(|c| c.count)).map(|c| c._super)); - let x317: BoundLayout = - (((x17.map(|c| c._extra51)).map(|c| c.count)).map(|c| c._super)); - let x318: BoundLayout = - (((x17.map(|c| c._extra52)).map(|c| c.count)).map(|c| c._super)); - let x319: BoundLayout = - (((x17.map(|c| c._extra53)).map(|c| c.count)).map(|c| c._super)); - let x320: BoundLayout = - (((x17.map(|c| c._extra54)).map(|c| c.count)).map(|c| c._super)); - let x321: BoundLayout = - (((x17.map(|c| c._extra55)).map(|c| c.count)).map(|c| c._super)); - let x322: InstOutputStruct; - if is_true(x9[to_usize(Val::new(0))]._super) { - // Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:177) - let x323: InstOutputStruct = - exec_control_load_root(ctx, arg0, arg1, (x10.map(|c| c._super)), global3)?; - // Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176) - x18.store(ctx, Val::new(0)); - eqz!( - x18.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x19.store(ctx, Val::new(0)); - eqz!( - x19.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x20.store(ctx, Val::new(0)); - eqz!( - x20.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x21.store(ctx, Val::new(0)); - eqz!( - x21.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x22.store(ctx, Val::new(0)); - eqz!( - x22.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x23.store(ctx, Val::new(0)); - eqz!( - x23.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x24.store(ctx, Val::new(0)); - eqz!( - x24.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x25.store(ctx, Val::new(0)); - eqz!( - x25.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x26.store(ctx, Val::new(0)); - eqz!( - x26.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x27.store(ctx, Val::new(0)); - eqz!( - x27.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x28.store(ctx, Val::new(0)); - eqz!( - x28.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x29.store(ctx, Val::new(0)); - eqz!( - x29.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x30.store(ctx, Val::new(0)); - eqz!( - x30.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x31.store(ctx, Val::new(0)); - eqz!( - x31.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x32.store(ctx, Val::new(0)); - eqz!( - x32.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x33.store(ctx, Val::new(0)); - eqz!( - x33.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x34.store(ctx, Val::new(0)); - eqz!( - x34.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x35.store(ctx, Val::new(0)); - eqz!( - x35.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x36.store(ctx, Val::new(0)); - eqz!( - x36.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x37.store(ctx, Val::new(0)); - eqz!( - x37.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x38.store(ctx, Val::new(0)); - eqz!( - x38.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x39.store(ctx, Val::new(0)); - eqz!( - x39.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x40.store(ctx, Val::new(0)); - eqz!( - x40.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x41.store(ctx, Val::new(0)); - eqz!( - x41.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x42.store(ctx, Val::new(0)); - eqz!( - x42.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x43.store(ctx, Val::new(0)); - eqz!( - x43.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x44.store(ctx, Val::new(0)); - eqz!( - x44.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x45.store(ctx, Val::new(0)); - eqz!( - x45.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x46.store(ctx, Val::new(0)); - eqz!( - x46.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x47.store(ctx, Val::new(0)); - eqz!( - x47.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x48.store(ctx, Val::new(0)); - eqz!( - x48.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x49.store(ctx, Val::new(0)); - eqz!( - x49.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x50.store(ctx, Val::new(0)); - eqz!( - x50.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x51.store(ctx, Val::new(0)); - eqz!( - x51.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x52.store(ctx, Val::new(0)); - eqz!( - x52.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x53.store(ctx, Val::new(0)); - eqz!( - x53.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x54.store(ctx, Val::new(0)); - eqz!( - x54.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x55.store(ctx, Val::new(0)); - eqz!( - x55.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x56.store(ctx, Val::new(0)); - eqz!( - x56.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x57.store(ctx, Val::new(0)); - eqz!( - x57.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x322 = x323; - } else if is_true(x9[to_usize(Val::new(1))]._super) { - // Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:178) - let x324: InstOutputStruct = - exec_control_resume(ctx, arg0, arg1, (x11.map(|c| c._super)), global3)?; - // Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176) - x58.store(ctx, Val::new(0)); - eqz!( - x58.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x59.store(ctx, Val::new(0)); - eqz!( - x59.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x60.store(ctx, Val::new(0)); - eqz!( - x60.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x61.store(ctx, Val::new(0)); - eqz!( - x61.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x62.store(ctx, Val::new(0)); - eqz!( - x62.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x63.store(ctx, Val::new(0)); - eqz!( - x63.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x64.store(ctx, Val::new(0)); - eqz!( - x64.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x65.store(ctx, Val::new(0)); - eqz!( - x65.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x66.store(ctx, Val::new(0)); - eqz!( - x66.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x67.store(ctx, Val::new(0)); - eqz!( - x67.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x68.store(ctx, Val::new(0)); - eqz!( - x68.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x69.store(ctx, Val::new(0)); - eqz!( - x69.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x70.store(ctx, Val::new(0)); - eqz!( - x70.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x71.store(ctx, Val::new(0)); - eqz!( - x71.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x72.store(ctx, Val::new(0)); - eqz!( - x72.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x73.store(ctx, Val::new(0)); - eqz!( - x73.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x74.store(ctx, Val::new(0)); - eqz!( - x74.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x75.store(ctx, Val::new(0)); - eqz!( - x75.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x76.store(ctx, Val::new(0)); - eqz!( - x76.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x77.store(ctx, Val::new(0)); - eqz!( - x77.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x78.store(ctx, Val::new(0)); - eqz!( - x78.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x79.store(ctx, Val::new(0)); - eqz!( - x79.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x80.store(ctx, Val::new(0)); - eqz!( - x80.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x81.store(ctx, Val::new(0)); - eqz!( - x81.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x82.store(ctx, Val::new(0)); - eqz!( - x82.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x83.store(ctx, Val::new(0)); - eqz!( - x83.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x84.store(ctx, Val::new(0)); - eqz!( - x84.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x85.store(ctx, Val::new(0)); - eqz!( - x85.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x86.store(ctx, Val::new(0)); - eqz!( - x86.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x87.store(ctx, Val::new(0)); - eqz!( - x87.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x88.store(ctx, Val::new(0)); - eqz!( - x88.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x89.store(ctx, Val::new(0)); - eqz!( - x89.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x322 = x324; - } else if is_true(x9[to_usize(Val::new(2))]._super) { - // Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:179) - let x325: InstOutputStruct = - exec_control_user_ecall(ctx, arg0, arg1, (x12.map(|c| c._super)))?; - // Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176) - x90.store(ctx, Val::new(0)); - eqz!( - x90.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x91.store(ctx, Val::new(0)); - eqz!( - x91.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x92.store(ctx, Val::new(0)); - eqz!( - x92.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x93.store(ctx, Val::new(0)); - eqz!( - x93.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x94.store(ctx, Val::new(0)); - eqz!( - x94.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x95.store(ctx, Val::new(0)); - eqz!( - x95.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x96.store(ctx, Val::new(0)); - eqz!( - x96.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x97.store(ctx, Val::new(0)); - eqz!( - x97.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x98.store(ctx, Val::new(0)); - eqz!( - x98.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x99.store(ctx, Val::new(0)); - eqz!( - x99.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x100.store(ctx, Val::new(0)); - eqz!( - x100.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x101.store(ctx, Val::new(0)); - eqz!( - x101.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x102.store(ctx, Val::new(0)); - eqz!( - x102.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x103.store(ctx, Val::new(0)); - eqz!( - x103.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x104.store(ctx, Val::new(0)); - eqz!( - x104.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x105.store(ctx, Val::new(0)); - eqz!( - x105.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x106.store(ctx, Val::new(0)); - eqz!( - x106.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x107.store(ctx, Val::new(0)); - eqz!( - x107.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x108.store(ctx, Val::new(0)); - eqz!( - x108.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x109.store(ctx, Val::new(0)); - eqz!( - x109.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x110.store(ctx, Val::new(0)); - eqz!( - x110.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x111.store(ctx, Val::new(0)); - eqz!( - x111.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x112.store(ctx, Val::new(0)); - eqz!( - x112.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x113.store(ctx, Val::new(0)); - eqz!( - x113.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x114.store(ctx, Val::new(0)); - eqz!( - x114.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x115.store(ctx, Val::new(0)); - eqz!( - x115.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x116.store(ctx, Val::new(0)); - eqz!( - x116.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x117.store(ctx, Val::new(0)); - eqz!( - x117.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x118.store(ctx, Val::new(0)); - eqz!( - x118.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x119.store(ctx, Val::new(0)); - eqz!( - x119.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x120.store(ctx, Val::new(0)); - eqz!( - x120.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x121.store(ctx, Val::new(0)); - eqz!( - x121.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x122.store(ctx, Val::new(0)); - eqz!( - x122.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x123.store(ctx, Val::new(0)); - eqz!( - x123.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x124.store(ctx, Val::new(0)); - eqz!( - x124.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x125.store(ctx, Val::new(0)); - eqz!( - x125.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x126.store(ctx, Val::new(0)); - eqz!( - x126.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x127.store(ctx, Val::new(0)); - eqz!( - x127.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x128.store(ctx, Val::new(0)); - eqz!( - x128.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x129.store(ctx, Val::new(0)); - eqz!( - x129.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x130.store(ctx, Val::new(0)); - eqz!( - x130.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x322 = x325; - } else if is_true(x9[to_usize(Val::new(3))]._super) { - // Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:180) - let x326: InstOutputStruct = exec_control_mret(ctx, arg0, arg1, (x13.map(|c| c._super)))?; - // Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176) - x131.store(ctx, Val::new(0)); - eqz!( - x131.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x132.store(ctx, Val::new(0)); - eqz!( - x132.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x133.store(ctx, Val::new(0)); - eqz!( - x133.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x134.store(ctx, Val::new(0)); - eqz!( - x134.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x135.store(ctx, Val::new(0)); - eqz!( - x135.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x136.store(ctx, Val::new(0)); - eqz!( - x136.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x137.store(ctx, Val::new(0)); - eqz!( - x137.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x138.store(ctx, Val::new(0)); - eqz!( - x138.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x139.store(ctx, Val::new(0)); - eqz!( - x139.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x140.store(ctx, Val::new(0)); - eqz!( - x140.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x141.store(ctx, Val::new(0)); - eqz!( - x141.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x142.store(ctx, Val::new(0)); - eqz!( - x142.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x143.store(ctx, Val::new(0)); - eqz!( - x143.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x144.store(ctx, Val::new(0)); - eqz!( - x144.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x145.store(ctx, Val::new(0)); - eqz!( - x145.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x146.store(ctx, Val::new(0)); - eqz!( - x146.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x147.store(ctx, Val::new(0)); - eqz!( - x147.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x148.store(ctx, Val::new(0)); - eqz!( - x148.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x149.store(ctx, Val::new(0)); - eqz!( - x149.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x150.store(ctx, Val::new(0)); - eqz!( - x150.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x151.store(ctx, Val::new(0)); - eqz!( - x151.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x152.store(ctx, Val::new(0)); - eqz!( - x152.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x153.store(ctx, Val::new(0)); - eqz!( - x153.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x154.store(ctx, Val::new(0)); - eqz!( - x154.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x155.store(ctx, Val::new(0)); - eqz!( - x155.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x156.store(ctx, Val::new(0)); - eqz!( - x156.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x157.store(ctx, Val::new(0)); - eqz!( - x157.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x158.store(ctx, Val::new(0)); - eqz!( - x158.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x159.store(ctx, Val::new(0)); - eqz!( - x159.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x160.store(ctx, Val::new(0)); - eqz!( - x160.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x161.store(ctx, Val::new(0)); - eqz!( - x161.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x162.store(ctx, Val::new(0)); - eqz!( - x162.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x163.store(ctx, Val::new(0)); - eqz!( - x163.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x164.store(ctx, Val::new(0)); - eqz!( - x164.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x165.store(ctx, Val::new(0)); - eqz!( - x165.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x166.store(ctx, Val::new(0)); - eqz!( - x166.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x167.store(ctx, Val::new(0)); - eqz!( - x167.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x168.store(ctx, Val::new(0)); - eqz!( - x168.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x169.store(ctx, Val::new(0)); - eqz!( - x169.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x170.store(ctx, Val::new(0)); - eqz!( - x170.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x171.store(ctx, Val::new(0)); - eqz!( - x171.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x172.store(ctx, Val::new(0)); - eqz!( - x172.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x173.store(ctx, Val::new(0)); - eqz!( - x173.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x174.store(ctx, Val::new(0)); - eqz!( - x174.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x175.store(ctx, Val::new(0)); - eqz!( - x175.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x176.store(ctx, Val::new(0)); - eqz!( - x176.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x322 = x326; - } else if is_true(x9[to_usize(Val::new(4))]._super) { - // Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:181) - let x327: InstOutputStruct = - exec_control_suspend(ctx, arg0, arg1, (x14.map(|c| c._super)), global3)?; - // Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176) - x177.store(ctx, Val::new(0)); - eqz!( - x177.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x178.store(ctx, Val::new(0)); - eqz!( - x178.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x179.store(ctx, Val::new(0)); - eqz!( - x179.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x180.store(ctx, Val::new(0)); - eqz!( - x180.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x181.store(ctx, Val::new(0)); - eqz!( - x181.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x182.store(ctx, Val::new(0)); - eqz!( - x182.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x183.store(ctx, Val::new(0)); - eqz!( - x183.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x184.store(ctx, Val::new(0)); - eqz!( - x184.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x185.store(ctx, Val::new(0)); - eqz!( - x185.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x186.store(ctx, Val::new(0)); - eqz!( - x186.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x187.store(ctx, Val::new(0)); - eqz!( - x187.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x188.store(ctx, Val::new(0)); - eqz!( - x188.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x189.store(ctx, Val::new(0)); - eqz!( - x189.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x190.store(ctx, Val::new(0)); - eqz!( - x190.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x191.store(ctx, Val::new(0)); - eqz!( - x191.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x192.store(ctx, Val::new(0)); - eqz!( - x192.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x193.store(ctx, Val::new(0)); - eqz!( - x193.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x194.store(ctx, Val::new(0)); - eqz!( - x194.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x195.store(ctx, Val::new(0)); - eqz!( - x195.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x196.store(ctx, Val::new(0)); - eqz!( - x196.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x197.store(ctx, Val::new(0)); - eqz!( - x197.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x198.store(ctx, Val::new(0)); - eqz!( - x198.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x199.store(ctx, Val::new(0)); - eqz!( - x199.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x200.store(ctx, Val::new(0)); - eqz!( - x200.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x201.store(ctx, Val::new(0)); - eqz!( - x201.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x202.store(ctx, Val::new(0)); - eqz!( - x202.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x203.store(ctx, Val::new(0)); - eqz!( - x203.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x204.store(ctx, Val::new(0)); - eqz!( - x204.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x205.store(ctx, Val::new(0)); - eqz!( - x205.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x206.store(ctx, Val::new(0)); - eqz!( - x206.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x207.store(ctx, Val::new(0)); - eqz!( - x207.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x208.store(ctx, Val::new(0)); - eqz!( - x208.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x322 = x327; - } else if is_true(x9[to_usize(Val::new(5))]._super) { - // Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:182) - let x328: InstOutputStruct = - exec_control_store_root(ctx, arg0, arg1, (x15.map(|c| c._super)), global3)?; - // Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176) - x209.store(ctx, Val::new(0)); - eqz!( - x209.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x210.store(ctx, Val::new(0)); - eqz!( - x210.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x211.store(ctx, Val::new(0)); - eqz!( - x211.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x212.store(ctx, Val::new(0)); - eqz!( - x212.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x213.store(ctx, Val::new(0)); - eqz!( - x213.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x214.store(ctx, Val::new(0)); - eqz!( - x214.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x215.store(ctx, Val::new(0)); - eqz!( - x215.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x216.store(ctx, Val::new(0)); - eqz!( - x216.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x217.store(ctx, Val::new(0)); - eqz!( - x217.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x218.store(ctx, Val::new(0)); - eqz!( - x218.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x219.store(ctx, Val::new(0)); - eqz!( - x219.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x220.store(ctx, Val::new(0)); - eqz!( - x220.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x221.store(ctx, Val::new(0)); - eqz!( - x221.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x222.store(ctx, Val::new(0)); - eqz!( - x222.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x223.store(ctx, Val::new(0)); - eqz!( - x223.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x224.store(ctx, Val::new(0)); - eqz!( - x224.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x225.store(ctx, Val::new(0)); - eqz!( - x225.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x226.store(ctx, Val::new(0)); - eqz!( - x226.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x227.store(ctx, Val::new(0)); - eqz!( - x227.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x228.store(ctx, Val::new(0)); - eqz!( - x228.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x229.store(ctx, Val::new(0)); - eqz!( - x229.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x230.store(ctx, Val::new(0)); - eqz!( - x230.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x231.store(ctx, Val::new(0)); - eqz!( - x231.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x232.store(ctx, Val::new(0)); - eqz!( - x232.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x233.store(ctx, Val::new(0)); - eqz!( - x233.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x234.store(ctx, Val::new(0)); - eqz!( - x234.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x235.store(ctx, Val::new(0)); - eqz!( - x235.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x236.store(ctx, Val::new(0)); - eqz!( - x236.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x237.store(ctx, Val::new(0)); - eqz!( - x237.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x238.store(ctx, Val::new(0)); - eqz!( - x238.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x239.store(ctx, Val::new(0)); - eqz!( - x239.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x240.store(ctx, Val::new(0)); - eqz!( - x240.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x322 = x328; - } else if is_true(x9[to_usize(Val::new(6))]._super) { - // Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:183) - let x329: InstOutputStruct = exec_control_table(ctx, arg0, arg1, (x16.map(|c| c._super)))?; - // Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176) - x241.store(ctx, Val::new(0)); - eqz!( - x241.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x242.store(ctx, Val::new(0)); - eqz!( - x242.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x243.store(ctx, Val::new(0)); - eqz!( - x243.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x244.store(ctx, Val::new(0)); - eqz!( - x244.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x245.store(ctx, Val::new(0)); - eqz!( - x245.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x246.store(ctx, Val::new(0)); - eqz!( - x246.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x247.store(ctx, Val::new(0)); - eqz!( - x247.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x248.store(ctx, Val::new(0)); - eqz!( - x248.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x249.store(ctx, Val::new(0)); - eqz!( - x249.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x250.store(ctx, Val::new(0)); - eqz!( - x250.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x251.store(ctx, Val::new(0)); - eqz!( - x251.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x252.store(ctx, Val::new(0)); - eqz!( - x252.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x253.store(ctx, Val::new(0)); - eqz!( - x253.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x254.store(ctx, Val::new(0)); - eqz!( - x254.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x255.store(ctx, Val::new(0)); - eqz!( - x255.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x256.store(ctx, Val::new(0)); - eqz!( - x256.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x257.store(ctx, Val::new(0)); - eqz!( - x257.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x258.store(ctx, Val::new(0)); - eqz!( - x258.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x259.store(ctx, Val::new(0)); - eqz!( - x259.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x260.store(ctx, Val::new(0)); - eqz!( - x260.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x261.store(ctx, Val::new(0)); - eqz!( - x261.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x262.store(ctx, Val::new(0)); - eqz!( - x262.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x263.store(ctx, Val::new(0)); - eqz!( - x263.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x264.store(ctx, Val::new(0)); - eqz!( - x264.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x322 = x329; - } else if is_true(x9[to_usize(Val::new(7))]._super) { - // ControlDone(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:167) - // Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:184) - eqz!((arg1.state - Val::new(7)), "loc(callsite( ControlDone ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :167:16) at Control0 ( zirgen/circuit/rv32im/v2/dsl/inst_control.zir :184:17)))"); - // Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176) - x266.store(ctx, Val::new(0)); - eqz!( - x266.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x267.store(ctx, Val::new(0)); - eqz!( - x267.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x268.store(ctx, Val::new(0)); - eqz!( - x268.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x269.store(ctx, Val::new(0)); - eqz!( - x269.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x270.store(ctx, Val::new(0)); - eqz!( - x270.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x271.store(ctx, Val::new(0)); - eqz!( - x271.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x272.store(ctx, Val::new(0)); - eqz!( - x272.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x273.store(ctx, Val::new(0)); - eqz!( - x273.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x274.store(ctx, Val::new(0)); - eqz!( - x274.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x275.store(ctx, Val::new(0)); - eqz!( - x275.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x276.store(ctx, Val::new(0)); - eqz!( - x276.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x277.store(ctx, Val::new(0)); - eqz!( - x277.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x278.store(ctx, Val::new(0)); - eqz!( - x278.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x279.store(ctx, Val::new(0)); - eqz!( - x279.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x280.store(ctx, Val::new(0)); - eqz!( - x280.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x281.store(ctx, Val::new(0)); - eqz!( - x281.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x282.store(ctx, Val::new(0)); - eqz!( - x282.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x283.store(ctx, Val::new(0)); - eqz!( - x283.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x284.store(ctx, Val::new(0)); - eqz!( - x284.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x285.store(ctx, Val::new(0)); - eqz!( - x285.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x286.store(ctx, Val::new(0)); - eqz!( - x286.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x287.store(ctx, Val::new(0)); - eqz!( - x287.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x288.store(ctx, Val::new(0)); - eqz!( - x288.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x289.store(ctx, Val::new(0)); - eqz!( - x289.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x290.store(ctx, Val::new(0)); - eqz!( - x290.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x291.store(ctx, Val::new(0)); - eqz!( - x291.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x292.store(ctx, Val::new(0)); - eqz!( - x292.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x293.store(ctx, Val::new(0)); - eqz!( - x293.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x294.store(ctx, Val::new(0)); - eqz!( - x294.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x295.store(ctx, Val::new(0)); - eqz!( - x295.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x296.store(ctx, Val::new(0)); - eqz!( - x296.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x297.store(ctx, Val::new(0)); - eqz!( - x297.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x298.store(ctx, Val::new(0)); - eqz!( - x298.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x299.store(ctx, Val::new(0)); - eqz!( - x299.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x300.store(ctx, Val::new(0)); - eqz!( - x300.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x301.store(ctx, Val::new(0)); - eqz!( - x301.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x302.store(ctx, Val::new(0)); - eqz!( - x302.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x303.store(ctx, Val::new(0)); - eqz!( - x303.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x304.store(ctx, Val::new(0)); - eqz!( - x304.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x305.store(ctx, Val::new(0)); - eqz!( - x305.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x306.store(ctx, Val::new(0)); - eqz!( - x306.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x307.store(ctx, Val::new(0)); - eqz!( - x307.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x308.store(ctx, Val::new(0)); - eqz!( - x308.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x309.store(ctx, Val::new(0)); - eqz!( - x309.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x310.store(ctx, Val::new(0)); - eqz!( - x310.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x311.store(ctx, Val::new(0)); - eqz!( - x311.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x312.store(ctx, Val::new(0)); - eqz!( - x312.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x313.store(ctx, Val::new(0)); - eqz!( - x313.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x314.store(ctx, Val::new(0)); - eqz!( - x314.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x315.store(ctx, Val::new(0)); - eqz!( - x315.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x316.store(ctx, Val::new(0)); - eqz!( - x316.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x317.store(ctx, Val::new(0)); - eqz!( - x317.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x318.store(ctx, Val::new(0)); - eqz!( - x318.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x319.store(ctx, Val::new(0)); - eqz!( - x319.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x320.store(ctx, Val::new(0)); - eqz!( - x320.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x321.store(ctx, Val::new(0)); - eqz!( - x321.load(ctx, 0), - "Control0(zirgen/circuit/rv32im/v2/dsl/inst_control.zir:176)" - ); - x322 = x265; - } else { - bail!("Reached unreachable mux arm") - } - return Ok(x322); -} -pub fn exec_one_hot_4_<'a>( - ctx: &'a ExecContext, - arg0: Val, - layout1: BoundLayout<'a, OneHot_4_Layout, Val>, -) -> Result { - // OneHot(zirgen/circuit/rv32im/v2/dsl/one_hot.zir:7) - let x2: NondetRegStruct4Array = map_layout( - [Val::new(0), Val::new(1), Val::new(2), Val::new(3)], - (layout1.map(|c| c._super)), - |x3, x4| { - let x5: NondetRegStruct = exec_nondet_bit_reg(ctx, isz((x3 - arg0))?, x4)?; - return Ok(x5); - }, - )?; - // OneHot(zirgen/circuit/rv32im/v2/dsl/one_hot.zir:9) - let x6: Val = x2[to_usize(Val::new(1))]._super; - let x7: Val = (x2[to_usize(Val::new(0))]._super + x6); - let x8: Val = x2[to_usize(Val::new(2))]._super; - let x9: Val = x2[to_usize(Val::new(3))]._super; - let x10: Val = (((x7 + x8) + x9) - Val::new(1)); - eqz!(x10, "OneHot(zirgen/circuit/rv32im/v2/dsl/one_hot.zir:9)"); - // OneHot(zirgen/circuit/rv32im/v2/dsl/one_hot.zir:11) - let x11: Val = (((x6 + (x8 * Val::new(2))) + (x9 * Val::new(3))) - arg0); - eqz!(x11, "OneHot(zirgen/circuit/rv32im/v2/dsl/one_hot.zir:11)"); - return Ok(OneHot_4_Struct { _super: x2 }); -} -pub fn exec_machine_e_call<'a>( - ctx: &'a ExecContext, - arg0: &RegStruct, - arg1: &InstInputStruct, - arg2: Val, - layout3: BoundLayout<'a, MachineECallLayout, Val>, -) -> Result { - // MachineECall(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:26) - let x4: GetDataStruct = exec_memory_read(ctx, arg0, arg2, (layout3.map(|c| c.load_inst)))?; - // MachineECall(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:27) - eqz!( - (arg1.state - Val::new(32)), - "MachineECall(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:27)" - ); - // MachineECall(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:26) - let x5: ValU32Struct = x4._super; - // MachineECall(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:28) - eqz!( - x5.high, - "MachineECall(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:28)" - ); - // MachineECall(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:29) - eqz!( - (x5.low - Val::new(115)), - "MachineECall(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:29)" - ); - // MachineECall(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:30) - eqz!( - (arg1.mode - Val::new(1)), - "MachineECall(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:30)" - ); - // MachineECall(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:31) - let x6: GetDataStruct = exec_memory_read( - ctx, - arg0, - Val::new(1073725457), - (layout3.map(|c| c.dispatch_idx)), - )?; - let x7: ValU32Struct = x6._super; - // MachineECall(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:32) - eqz!( - x7.high, - "MachineECall(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:32)" - ); - // MachineECall(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:33) - let x8: OneHot_4_Struct = exec_one_hot_4_(ctx, x7.low, (layout3.map(|c| c.dispatch)))?; - let x9: NondetRegStruct4Array = x8._super; - let x10: Val; - if is_true(x9[to_usize(Val::new(0))]._super) { - x10 = Val::new(9); - } else if is_true(x9[to_usize(Val::new(1))]._super) { - x10 = Val::new(10); - } else if is_true(x9[to_usize(Val::new(2))]._super) { - x10 = Val::new(11); - } else if is_true(x9[to_usize(Val::new(3))]._super) { - x10 = Val::new(16); - } else { - bail!("Reached unreachable mux arm") - } - return Ok(ECallOutputStruct { - state: x10, - s0: Val::new(0), - s1: Val::new(0), - s2: Val::new(0), - }); -} -pub fn exec_e_call_terminate<'a>( - ctx: &'a ExecContext, - arg0: &RegStruct, - arg1: &InstInputStruct, - layout2: BoundLayout<'a, ECallTerminateLayout, Val>, - global3: BufferRow, -) -> Result { - // ECallTerminate(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:43) - let x4: BoundLayout<_globalLayout, _> = bind_layout!(LAYOUT_GLOBAL, global3); - // ECallTerminate(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:44) - eqz!( - (arg1.state - Val::new(9)), - "ECallTerminate(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:44)" - ); - // ECallTerminate(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:45) - let x5: GetDataStruct = - exec_memory_read(ctx, arg0, Val::new(1073725482), (layout2.map(|c| c.a0)))?; - // ECallTerminate(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:46) - let x6: GetDataStruct = - exec_memory_read(ctx, arg0, Val::new(1073725483), (layout2.map(|c| c.a1)))?; - // ECallTerminate(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:45) - let x7: ValU32Struct = x5._super; - // ECallTerminate(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:47) - let x8: RegStruct = exec_reg(ctx, x7.low, (x4.map(|c| c.term_a0low)))?; - // ECallTerminate(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:48) - let x9: RegStruct = exec_reg(ctx, x7.high, (x4.map(|c| c.term_a0high)))?; - // ECallTerminate(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:46) - let x10: ValU32Struct = x6._super; - // ECallTerminate(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:49) - let x11: RegStruct = exec_reg(ctx, x10.low, (x4.map(|c| c.term_a1low)))?; - // ECallTerminate(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:50) - let x12: RegStruct = exec_reg(ctx, x10.high, (x4.map(|c| c.term_a1high)))?; - return Ok(ECallOutputStruct { - state: Val::new(4), - s0: Val::new(0), - s1: Val::new(0), - s2: Val::new(0), - }); -} -pub fn exec_decompose_low2<'a>( - ctx: &'a ExecContext, - arg0: Val, - layout1: BoundLayout<'a, DecomposeLow2Layout, Val>, -) -> Result { - // DecomposeLow2(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:57) - let x2: NondetRegStruct = exec_nondet_reg( - ctx, - (bit_and(arg0, Val::new(65532))? * Val::new(1509949441)), - (layout1.map(|c| c.high)), - )?; - // DecomposeLow2(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:58) - let x3: NondetRegStruct = - exec_nondet_reg(ctx, bit_and(arg0, Val::new(3))?, (layout1.map(|c| c.low2)))?; - // DecomposeLow2(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:59) - let x4: OneHot_4_Struct = exec_one_hot_4_(ctx, x3._super, (layout1.map(|c| c.low2_hot)))?; - // DecomposeLow2(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:60) - let x5: NondetRegStruct = exec_is_zero(ctx, x2._super, (layout1.map(|c| c.high_zero)))?; - // DecomposeLow2(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:59) - let x6: NondetRegStruct4Array = x4._super; - // DecomposeLow2(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:61) - let x7: Val = (x5._super * x6[to_usize(Val::new(0))]._super); - let x8: RegStruct = exec_reg(ctx, x7, (layout1.map(|c| c.is_zero)))?; - // DecomposeLow2(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:63) - let x9: Val = (x6[to_usize(Val::new(1))]._super + x6[to_usize(Val::new(2))]._super); - return Ok(DecomposeLow2Struct { - high: x2, - low2: x3, - low2_hot: x4, - high_zero: x5, - is_zero: x8, - low2_nonzero: (x9 + x6[to_usize(Val::new(3))]._super), - }); -} -pub fn exec_e_call_host_read_setup<'a>( - ctx: &'a ExecContext, - arg0: &RegStruct, - arg1: &InstInputStruct, - layout2: BoundLayout<'a, ECallHostReadSetupLayout, Val>, -) -> Result { - // ECallHostReadSetup(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:67) - eqz!( - (arg1.state - Val::new(10)), - "ECallHostReadSetup(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:67)" - ); - // ECallHostReadSetup(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:69) - let x3: GetDataStruct = - exec_memory_read(ctx, arg0, Val::new(1073725450), (layout2.map(|c| c.fd)))?; - // ECallHostReadSetup(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:70) - let x4: GetDataStruct = - exec_memory_read(ctx, arg0, Val::new(1073725451), (layout2.map(|c| c.ptr)))?; - // ECallHostReadSetup(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:71) - let x5: GetDataStruct = - exec_memory_read(ctx, arg0, Val::new(1073725452), (layout2.map(|c| c.len)))?; - // ECallHostReadSetup(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:69) - let x6: ValU32Struct = x3._super; - // ECallHostReadSetup(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:73) - eqz!( - x6.high, - "ECallHostReadSetup(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:73)" - ); - // ECallHostReadSetup(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:71) - let x7: ValU32Struct = x5._super; - // ECallHostReadSetup(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:75) - eqz!( - x7.high, - "ECallHostReadSetup(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:75)" - ); - // ECallHostReadSetup(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:71) - let x8: Val = x7.low; - // HostReadPrepare(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:8) - // ECallHostReadSetup(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:77) - let x9: Val = invoke_extern!(ctx, host_read_prepare, x6.low, x8); - let x10: NondetRegStruct = exec_nondet_u16_reg(ctx, x9, (layout2.map(|c| c.new_len)))?; - let x11: Val = x10._super; - // ECallHostReadSetup(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:79) - let x12: U16RegStruct = exec_u16_reg(ctx, (x8 - x11), (layout2.map(|c| c.diff)))?; - // ECallHostReadSetup(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:81) - let x13: MemoryWriteStruct = exec_memory_write( - ctx, - arg0, - Val::new(1073725450), - &ValU32Struct { - low: x11, - high: Val::new(0), - }, - (layout2.map(|c| c._0)), - )?; - // ECallHostReadSetup(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:70) - let x14: ValU32Struct = x4._super; - // ECallHostReadSetup(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:83) - let x15: DecomposeLow2Struct = - exec_decompose_low2(ctx, x14.low, (layout2.map(|c| c.ptr_decomp)))?; - // ECallHostReadSetup(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:84) - let x16: Val = ((x14.high * Val::new(16384)) + x15.high._super); - // ECallHostReadSetup(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:85) - let x17: DecomposeLow2Struct = exec_decompose_low2(ctx, x11, (layout2.map(|c| c.len_decomp)))?; - // ECallHostReadSetup(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:87) - let x18: Val = (x17.high_zero._super * x17.low2_nonzero); - let x19: RegStruct = exec_reg(ctx, x18, (layout2.map(|c| c.len123)))?; - // ECallHostReadSetup(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:89) - let x20: Val = (x19._super._super * x15.low2_nonzero); - let x21: RegStruct = exec_reg(ctx, x20, (layout2.map(|c| c.uneven)))?; - // ECallHostReadSetup(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:85) - let x22: Val = x17.is_zero._super._super; - // ECallHostReadSetup(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:95) - let x23: Val = (Val::new(1) - x22); - // ECallHostReadSetup(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:89) - let x24: Val = x21._super._super; - // ECallHostReadSetup(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:93) - let x25: Val = ((x22 * Val::new(32)) + ((x23 * x24) * Val::new(12))); - return Ok(ECallOutputStruct { - state: (x25 + ((x23 * (Val::new(1) - x24)) * Val::new(13))), - s0: x16, - s1: x15.low2._super, - s2: x11, - }); -} -pub fn exec_e_call_host_write<'a>( - ctx: &'a ExecContext, - arg0: &RegStruct, - arg1: &InstInputStruct, - layout2: BoundLayout<'a, ECallHostWriteLayout, Val>, -) -> Result { - // ECallHostWrite(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:102) - eqz!( - (arg1.state - Val::new(11)), - "ECallHostWrite(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:102)" - ); - // ECallHostWrite(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:104) - let x3: GetDataStruct = - exec_memory_read(ctx, arg0, Val::new(1073725450), (layout2.map(|c| c.fd)))?; - // ECallHostWrite(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:105) - let x4: GetDataStruct = - exec_memory_read(ctx, arg0, Val::new(1073725451), (layout2.map(|c| c.ptr)))?; - // ECallHostWrite(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:106) - let x5: GetDataStruct = - exec_memory_read(ctx, arg0, Val::new(1073725452), (layout2.map(|c| c.len)))?; - // ECallHostWrite(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:104) - let x6: ValU32Struct = x3._super; - // ECallHostWrite(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:107) - eqz!( - x6.high, - "ECallHostWrite(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:107)" - ); - // ECallHostWrite(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:106) - let x7: ValU32Struct = x5._super; - // ECallHostWrite(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:108) - eqz!( - x7.high, - "ECallHostWrite(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:108)" - ); - // ECallHostWrite(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:106) - let x8: Val = x7.low; - // ECallHostWrite(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:105) - let x9: ValU32Struct = x4._super; - // HostWrite(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:11) - // ECallHostWrite(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:110) - let x10: Val = invoke_extern!(ctx, host_write, x6.low, x9.low, x9.high, x8); - let x11: NondetRegStruct = exec_nondet_u16_reg(ctx, x10, (layout2.map(|c| c.new_len)))?; - let x12: Val = x11._super; - // ECallHostWrite(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:112) - let x13: U16RegStruct = exec_u16_reg(ctx, (x8 - x12), (layout2.map(|c| c.diff)))?; - // ECallHostWrite(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:114) - let x14: MemoryWriteStruct = exec_memory_write( - ctx, - arg0, - Val::new(1073725450), - &ValU32Struct { - low: x12, - high: Val::new(0), - }, - (layout2.map(|c| c._0)), - )?; - return Ok(ECallOutputStruct { - state: Val::new(32), - s0: Val::new(0), - s1: Val::new(0), - s2: Val::new(0), - }); -} -pub fn exec_e_call_host_read_words<'a>( - ctx: &'a ExecContext, - arg0: &RegStruct, - arg1: &InstInputStruct, - arg2: Val, - arg3: Val, - layout4: BoundLayout<'a, ECallHostReadWordsLayout, Val>, -) -> Result { - // ECallHostReadWords(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:127) - eqz!( - (arg1.state - Val::new(13)), - "ECallHostReadWords(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:127)" - ); - // ECallHostReadWords(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:128) - let x5: DecomposeLow2Struct = exec_decompose_low2(ctx, arg3, (layout4.map(|c| c.len_decomp)))?; - // ECallHostReadWords(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:129) - let x6: DecomposeLow2Struct = - exec_decompose_low2(ctx, x5.high._super, (layout4.map(|c| c.words_decomp)))?; - let x7: NondetRegStruct4Array = x6.low2_hot._super; - let x8: Val = x6.high_zero._super; - // ECallHostReadWords(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:131) - let x9: Val = (x7[to_usize(Val::new(1))]._super * x8); - // ECallHostReadWords(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:132) - let x10: Val = (x7[to_usize(Val::new(2))]._super * x8); - // ECallHostReadWords(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:133) - let x11: Val = (x7[to_usize(Val::new(3))]._super * x8); - // ECallHostReadWords(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:134) - let x12: Val = (Val::new(1) - x8); - // ECallHostReadWords(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:136) - let x13: Val = (((x9 + x10) + x11) + x12); - // ECallHostReadWords(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:137) - let x14: ECallHostReadWords__0Struct4Array = map_layout( - [Val::new(0), Val::new(1), Val::new(2), Val::new(3)], - (layout4.map(|c| c._1)), - |x15, x16| { - // ECallHostReadWords(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:138) - let x17: Val = ([x9, x10, x11, x12][to_usize(x15)] * (arg2 + x15)); - let x18: Val = (Val::new(1) - [x9, x10, x11, x12][to_usize(x15)]); - let x19: RegStruct = exec_reg( - ctx, - (x17 + (x18 * Val::new(1073725504))), - (x16.map(|c| c.addr)), - )?; - // ECallHostReadWords(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:139) - let x20: MemoryWriteUnconstrainedStruct = - exec_memory_write_unconstrained(ctx, arg0, x19._super._super, (x16.map(|c| c._0)))?; - return Ok(ECallHostReadWords__0Struct {}); - }, - )?; - // ECallHostReadWords(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:141) - let x21: Val = (arg3 - (x13 * Val::new(4))); - let x22: NondetRegStruct = exec_is_zero(ctx, x21, (layout4.map(|c| c.len_zero)))?; - let x23: Val = x22._super; - // ECallHostReadWords(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:146) - let x24: Val = (Val::new(1) - x23); - // ECallHostReadWords(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:128) - let x25: Val = x5.low2_nonzero; - // ECallHostReadWords(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:144) - let x26: Val = ((x23 * Val::new(32)) + ((x24 * x25) * Val::new(12))); - return Ok(ECallOutputStruct { - state: (x26 + ((x24 * (Val::new(1) - x25)) * Val::new(13))), - s0: (arg2 + x13), - s1: Val::new(0), - s2: x21, - }); -} -pub fn exec_e_call0<'a>( - ctx: &'a ExecContext, - arg0: &RegStruct, - arg1: &InstInputStruct, - layout2: BoundLayout<'a, ECall0Layout, Val>, - global3: BufferRow, -) -> Result { - // ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:153) - let x4: BoundLayout = (layout2.map(|c| c.s0)); - // ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:155) - let x5: BoundLayout = (layout2.map(|c| c.s2)); - // ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158) - let x6: BoundLayout = (layout2.map(|c| c.output)); - // ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:152) - let x7: ValU32Struct = arg1.pc_u32; - // ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:156) - let x8: AddrDecomposeBitsStruct = - exec_addr_decompose_bits(ctx, &x7, arg1.mode, (layout2.map(|c| c.pc_addr)))?; - // ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:157) - eqz!( - x8.low2, - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:157)" - ); - // ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:152) - let x9: NondetRegStruct8Array = arg1.minor_onehot._super; - // ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158) - let x10: BoundLayout = (x6.map(|c| c.arm0)); - let x11: BoundLayout = (x6.map(|c| c.arm1)); - let x12: BoundLayout = (x6.map(|c| c.arm4)); - let x13: BoundLayout = (x6.map(|c| c.arm5)); - let x14: BoundLayout = (x6.map(|c| c.arm6)); - let x15: BoundLayout = (x6.map(|c| c.arm7)); - let x16: BoundLayout = (((x10.map(|c| c._extra0)).map(|c| c.count)).map(|c| c._super)); - let x17: BoundLayout = (((x10.map(|c| c._extra1)).map(|c| c.count)).map(|c| c._super)); - let x18: BoundLayout = (((x10.map(|c| c._extra2)).map(|c| c.count)).map(|c| c._super)); - let x19: BoundLayout = (((x10.map(|c| c._extra3)).map(|c| c.count)).map(|c| c._super)); - let x20: BoundLayout = (((x10.map(|c| c._extra4)).map(|c| c.count)).map(|c| c._super)); - let x21: BoundLayout = (((x10.map(|c| c._extra5)).map(|c| c.count)).map(|c| c._super)); - let x22: BoundLayout = (((x10.map(|c| c._extra6)).map(|c| c.count)).map(|c| c._super)); - let x23: BoundLayout = (((x10.map(|c| c._extra7)).map(|c| c.count)).map(|c| c._super)); - let x24: BoundLayout = (((x11.map(|c| c._extra0)).map(|c| c.count)).map(|c| c._super)); - let x25: BoundLayout = (((x11.map(|c| c._extra1)).map(|c| c.count)).map(|c| c._super)); - let x26: BoundLayout = (((x11.map(|c| c._extra2)).map(|c| c.count)).map(|c| c._super)); - let x27: BoundLayout = (((x11.map(|c| c._extra3)).map(|c| c.count)).map(|c| c._super)); - let x28: BoundLayout = (((x11.map(|c| c._extra4)).map(|c| c.count)).map(|c| c._super)); - let x29: BoundLayout = (((x11.map(|c| c._extra5)).map(|c| c.count)).map(|c| c._super)); - let x30: BoundLayout = (((x11.map(|c| c._extra6)).map(|c| c.count)).map(|c| c._super)); - let x31: BoundLayout = (((x11.map(|c| c._extra7)).map(|c| c.count)).map(|c| c._super)); - let x32: BoundLayout = (((x12.map(|c| c._extra0)).map(|c| c.count)).map(|c| c._super)); - let x33: BoundLayout = (((x12.map(|c| c._extra1)).map(|c| c.count)).map(|c| c._super)); - let x34: BoundLayout = (((x12.map(|c| c._extra2)).map(|c| c.count)).map(|c| c._super)); - let x35: BoundLayout = (((x12.map(|c| c._extra3)).map(|c| c.count)).map(|c| c._super)); - let x36: BoundLayout = (((x12.map(|c| c._extra4)).map(|c| c.count)).map(|c| c._super)); - let x37: BoundLayout = (((x12.map(|c| c._extra5)).map(|c| c.count)).map(|c| c._super)); - let x38: BoundLayout = (((x12.map(|c| c._extra6)).map(|c| c.count)).map(|c| c._super)); - let x39: BoundLayout = (((x12.map(|c| c._extra7)).map(|c| c.count)).map(|c| c._super)); - let x40: BoundLayout = (((x12.map(|c| c._extra8)).map(|c| c.count)).map(|c| c._super)); - let x41: BoundLayout = (((x12.map(|c| c._extra9)).map(|c| c.count)).map(|c| c._super)); - let x42: BoundLayout = (((x12.map(|c| c._extra10)).map(|c| c.count)).map(|c| c._super)); - let x43: BoundLayout = (((x12.map(|c| c._extra11)).map(|c| c.count)).map(|c| c._super)); - let x44: BoundLayout = (((x12.map(|c| c._extra12)).map(|c| c.count)).map(|c| c._super)); - let x45: BoundLayout = (((x12.map(|c| c._extra13)).map(|c| c.count)).map(|c| c._super)); - let x46: BoundLayout = (((x13.map(|c| c._extra0)).map(|c| c.count)).map(|c| c._super)); - let x47: BoundLayout = (((x13.map(|c| c._extra1)).map(|c| c.count)).map(|c| c._super)); - // ECallOutput(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:13) - // IllegalECall(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:22) - // ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:165) - let x48: ECallOutputStruct = ECallOutputStruct { - state: Val::new(0), - s0: Val::new(0), - s1: Val::new(0), - s2: Val::new(0), - }; - // ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158) - let x49: BoundLayout = (((x14.map(|c| c._extra0)).map(|c| c.count)).map(|c| c._super)); - let x50: BoundLayout = (((x14.map(|c| c._extra1)).map(|c| c.count)).map(|c| c._super)); - let x51: BoundLayout = (((x14.map(|c| c._extra2)).map(|c| c.count)).map(|c| c._super)); - let x52: BoundLayout = (((x14.map(|c| c._extra3)).map(|c| c.count)).map(|c| c._super)); - let x53: BoundLayout = (((x14.map(|c| c._extra4)).map(|c| c.count)).map(|c| c._super)); - let x54: BoundLayout = (((x14.map(|c| c._extra5)).map(|c| c.count)).map(|c| c._super)); - let x55: BoundLayout = (((x14.map(|c| c._extra6)).map(|c| c.count)).map(|c| c._super)); - let x56: BoundLayout = (((x14.map(|c| c._extra7)).map(|c| c.count)).map(|c| c._super)); - let x57: BoundLayout = (((x14.map(|c| c._extra8)).map(|c| c.count)).map(|c| c._super)); - let x58: BoundLayout = (((x14.map(|c| c._extra9)).map(|c| c.count)).map(|c| c._super)); - let x59: BoundLayout = (((x14.map(|c| c._extra10)).map(|c| c.count)).map(|c| c._super)); - let x60: BoundLayout = (((x14.map(|c| c._extra11)).map(|c| c.count)).map(|c| c._super)); - let x61: BoundLayout = (((x14.map(|c| c._extra12)).map(|c| c.count)).map(|c| c._super)); - let x62: BoundLayout = (((x14.map(|c| c._extra13)).map(|c| c.count)).map(|c| c._super)); - let x63: BoundLayout = (((x15.map(|c| c._extra0)).map(|c| c.count)).map(|c| c._super)); - let x64: BoundLayout = (((x15.map(|c| c._extra1)).map(|c| c.count)).map(|c| c._super)); - let x65: BoundLayout = (((x15.map(|c| c._extra2)).map(|c| c.count)).map(|c| c._super)); - let x66: BoundLayout = (((x15.map(|c| c._extra3)).map(|c| c.count)).map(|c| c._super)); - let x67: BoundLayout = (((x15.map(|c| c._extra4)).map(|c| c.count)).map(|c| c._super)); - let x68: BoundLayout = (((x15.map(|c| c._extra5)).map(|c| c.count)).map(|c| c._super)); - let x69: BoundLayout = (((x15.map(|c| c._extra6)).map(|c| c.count)).map(|c| c._super)); - let x70: BoundLayout = (((x15.map(|c| c._extra7)).map(|c| c.count)).map(|c| c._super)); - let x71: BoundLayout = (((x15.map(|c| c._extra8)).map(|c| c.count)).map(|c| c._super)); - let x72: BoundLayout = (((x15.map(|c| c._extra9)).map(|c| c.count)).map(|c| c._super)); - let x73: BoundLayout = (((x15.map(|c| c._extra10)).map(|c| c.count)).map(|c| c._super)); - let x74: BoundLayout = (((x15.map(|c| c._extra11)).map(|c| c.count)).map(|c| c._super)); - let x75: BoundLayout = (((x15.map(|c| c._extra12)).map(|c| c.count)).map(|c| c._super)); - let x76: BoundLayout = (((x15.map(|c| c._extra13)).map(|c| c.count)).map(|c| c._super)); - let x77: ECallOutputStruct; - if is_true(x9[to_usize(Val::new(0))]._super) { - // ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:159) - let x78: ECallOutputStruct = - exec_machine_e_call(ctx, arg0, arg1, x8._super, (x10.map(|c| c._super)))?; - // ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158) - x16.store(ctx, Val::new(0)); - eqz!( - x16.load(ctx, 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)" - ); - x17.store(ctx, Val::new(0)); - eqz!( - x17.load(ctx, 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)" - ); - x18.store(ctx, Val::new(0)); - eqz!( - x18.load(ctx, 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)" - ); - x19.store(ctx, Val::new(0)); - eqz!( - x19.load(ctx, 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)" - ); - x20.store(ctx, Val::new(0)); - eqz!( - x20.load(ctx, 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)" - ); - x21.store(ctx, Val::new(0)); - eqz!( - x21.load(ctx, 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)" - ); - x22.store(ctx, Val::new(0)); - eqz!( - x22.load(ctx, 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)" - ); - x23.store(ctx, Val::new(0)); - eqz!( - x23.load(ctx, 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)" - ); - x77 = x78; - } else if is_true(x9[to_usize(Val::new(1))]._super) { - // ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:160) - let x79: ECallOutputStruct = - exec_e_call_terminate(ctx, arg0, arg1, (x11.map(|c| c._super)), global3)?; - // ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158) - x24.store(ctx, Val::new(0)); - eqz!( - x24.load(ctx, 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)" - ); - x25.store(ctx, Val::new(0)); - eqz!( - x25.load(ctx, 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)" - ); - x26.store(ctx, Val::new(0)); - eqz!( - x26.load(ctx, 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)" - ); - x27.store(ctx, Val::new(0)); - eqz!( - x27.load(ctx, 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)" - ); - x28.store(ctx, Val::new(0)); - eqz!( - x28.load(ctx, 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)" - ); - x29.store(ctx, Val::new(0)); - eqz!( - x29.load(ctx, 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)" - ); - x30.store(ctx, Val::new(0)); - eqz!( - x30.load(ctx, 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)" - ); - x31.store(ctx, Val::new(0)); - eqz!( - x31.load(ctx, 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)" - ); - x77 = x79; - } else if is_true(x9[to_usize(Val::new(2))]._super) { - // ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:161) - let x80: ECallOutputStruct = - exec_e_call_host_read_setup(ctx, arg0, arg1, (x6.map(|c| c.arm2)))?; - x77 = x80; - } else if is_true(x9[to_usize(Val::new(3))]._super) { - // ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:162) - let x81: ECallOutputStruct = exec_e_call_host_write(ctx, arg0, arg1, (x6.map(|c| c.arm3)))?; - x77 = x81; - } else if is_true(x9[to_usize(Val::new(4))]._super) { - // ECallHostReadBytes(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:121) - // ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:163) - eqz!((arg1.state - Val::new(12)), "loc(callsite( ECallHostReadBytes ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :121:16) at ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :163:24)))"); - // ECallHostReadBytes(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:122) - eqz!(Val::new(2013265920), "loc(callsite( ECallHostReadBytes ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :122:6) at ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :163:24)))"); - // ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158) - x32.store(ctx, Val::new(0)); - eqz!( - x32.load(ctx, 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)" - ); - x33.store(ctx, Val::new(0)); - eqz!( - x33.load(ctx, 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)" - ); - x34.store(ctx, Val::new(0)); - eqz!( - x34.load(ctx, 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)" - ); - x35.store(ctx, Val::new(0)); - eqz!( - x35.load(ctx, 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)" - ); - x36.store(ctx, Val::new(0)); - eqz!( - x36.load(ctx, 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)" - ); - x37.store(ctx, Val::new(0)); - eqz!( - x37.load(ctx, 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)" - ); - x38.store(ctx, Val::new(0)); - eqz!( - x38.load(ctx, 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)" - ); - x39.store(ctx, Val::new(0)); - eqz!( - x39.load(ctx, 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)" - ); - x40.store(ctx, Val::new(0)); - eqz!( - x40.load(ctx, 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)" - ); - x41.store(ctx, Val::new(0)); - eqz!( - x41.load(ctx, 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)" - ); - x42.store(ctx, Val::new(0)); - eqz!( - x42.load(ctx, 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)" - ); - x43.store(ctx, Val::new(0)); - eqz!( - x43.load(ctx, 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)" - ); - x44.store(ctx, Val::new(0)); - eqz!( - x44.load(ctx, 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)" - ); - x45.store(ctx, Val::new(0)); - eqz!( - x45.load(ctx, 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)" - ); - x77 = ECallOutputStruct { - state: Val::new(16), - s0: Val::new(0), - s1: Val::new(0), - s2: Val::new(0), - }; - } else if is_true(x9[to_usize(Val::new(5))]._super) { - // ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:164) - let x82: RegStruct = back_reg(ctx, 1, x4)?; - let x83: RegStruct = back_reg(ctx, 1, x5)?; - let x84: ECallOutputStruct = exec_e_call_host_read_words( - ctx, - arg0, - arg1, - x82._super._super, - x83._super._super, - (x13.map(|c| c._super)), - )?; - // ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158) - x46.store(ctx, Val::new(0)); - eqz!( - x46.load(ctx, 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)" - ); - x47.store(ctx, Val::new(0)); - eqz!( - x47.load(ctx, 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)" - ); - x77 = x84; - } else if is_true(x9[to_usize(Val::new(6))]._super) { - // IllegalECall(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:21) - // ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:165) - eqz!(Val::new(2013265920), "loc(callsite( IllegalECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :21:6) at ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :165:18)))"); - // ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158) - x49.store(ctx, Val::new(0)); - eqz!( - x49.load(ctx, 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)" - ); - x50.store(ctx, Val::new(0)); - eqz!( - x50.load(ctx, 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)" - ); - x51.store(ctx, Val::new(0)); - eqz!( - x51.load(ctx, 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)" - ); - x52.store(ctx, Val::new(0)); - eqz!( - x52.load(ctx, 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)" - ); - x53.store(ctx, Val::new(0)); - eqz!( - x53.load(ctx, 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)" - ); - x54.store(ctx, Val::new(0)); - eqz!( - x54.load(ctx, 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)" - ); - x55.store(ctx, Val::new(0)); - eqz!( - x55.load(ctx, 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)" - ); - x56.store(ctx, Val::new(0)); - eqz!( - x56.load(ctx, 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)" - ); - x57.store(ctx, Val::new(0)); - eqz!( - x57.load(ctx, 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)" - ); - x58.store(ctx, Val::new(0)); - eqz!( - x58.load(ctx, 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)" - ); - x59.store(ctx, Val::new(0)); - eqz!( - x59.load(ctx, 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)" - ); - x60.store(ctx, Val::new(0)); - eqz!( - x60.load(ctx, 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)" - ); - x61.store(ctx, Val::new(0)); - eqz!( - x61.load(ctx, 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)" - ); - x62.store(ctx, Val::new(0)); - eqz!( - x62.load(ctx, 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)" - ); - x77 = x48; - } else if is_true(x9[to_usize(Val::new(7))]._super) { - // IllegalECall(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:21) - // ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:166) - eqz!(Val::new(2013265920), "loc(callsite( IllegalECall ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :21:6) at ECall0 ( zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir :166:18)))"); - // ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158) - x63.store(ctx, Val::new(0)); - eqz!( - x63.load(ctx, 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)" - ); - x64.store(ctx, Val::new(0)); - eqz!( - x64.load(ctx, 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)" - ); - x65.store(ctx, Val::new(0)); - eqz!( - x65.load(ctx, 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)" - ); - x66.store(ctx, Val::new(0)); - eqz!( - x66.load(ctx, 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)" - ); - x67.store(ctx, Val::new(0)); - eqz!( - x67.load(ctx, 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)" - ); - x68.store(ctx, Val::new(0)); - eqz!( - x68.load(ctx, 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)" - ); - x69.store(ctx, Val::new(0)); - eqz!( - x69.load(ctx, 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)" - ); - x70.store(ctx, Val::new(0)); - eqz!( - x70.load(ctx, 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)" - ); - x71.store(ctx, Val::new(0)); - eqz!( - x71.load(ctx, 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)" - ); - x72.store(ctx, Val::new(0)); - eqz!( - x72.load(ctx, 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)" - ); - x73.store(ctx, Val::new(0)); - eqz!( - x73.load(ctx, 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)" - ); - x74.store(ctx, Val::new(0)); - eqz!( - x74.load(ctx, 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)" - ); - x75.store(ctx, Val::new(0)); - eqz!( - x75.load(ctx, 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)" - ); - x76.store(ctx, Val::new(0)); - eqz!( - x76.load(ctx, 0), - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158)" - ); - x77 = x48; - } else { - bail!("Reached unreachable mux arm") - } // ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:168) - let x85: RegStruct = exec_reg(ctx, x77.s0, x4)?; - // ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:169) - let x86: RegStruct = exec_reg(ctx, x77.s1, (layout2.map(|c| c.s1)))?; - // ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:170) - let x87: RegStruct = exec_reg(ctx, x77.s2, x5)?; - // ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:158) - let x88: Val = x77.state; - // ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:171) - let x89: NondetRegStruct = - exec_is_zero(ctx, (x88 - Val::new(32)), (layout2.map(|c| c.is_decode)))?; - // ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:172) - let x90: NondetRegStruct = - exec_is_zero(ctx, (x88 - Val::new(16)), (layout2.map(|c| c.is_p2_entry)))?; - // ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:173) - let x91: Val = ((x89._super + x90._super) * Val::new(4)); - // DenormedValU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:20) - // AddU32(zirgen/circuit/rv32im/v2/dsl/u32.zir:27) - let x92: DenormedValU32Struct = DenormedValU32Struct { - low: (x7.low + x91), - high: x7.high, - }; - let x93: NormalizeU32Struct = exec_normalize_u32(ctx, &x92, (layout2.map(|c| c.add_pc)))?; - // ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:152) - let x94: Val = arg0._super._super; - // GetDiffCount(zirgen/circuit/rv32im/v2/dsl/mem.zir:22) - // ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:175) - let x95: Val = invoke_extern!(ctx, get_diff_count, x94); - let x96: CycleArgStruct = exec_cycle_arg(ctx, neg_0(x95)?, x94, (layout2.map(|c| c.arg)))?; - // ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:177) - let x97: Val = (x96.cycle._super - x94); - eqz!( - x97, - "ECall0(zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir:177)" - ); - return Ok(InstOutputStruct { - new_pc: x93._super, - new_state: x88, - new_mode: Val::new(1), - }); -} -pub fn exec_s_box<'a>( - ctx: &'a ExecContext, - arg0: Val, - layout1: BoundLayout<'a, SBoxLayout, Val>, -) -> Result { - // SBox(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:25) - let x2: RegStruct = exec_reg(ctx, ((arg0 * arg0) * arg0), (layout1.map(|c| c.cubed)))?; - let x3: Val = x2._super._super; - // SBox(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:26) - let x4: RegStruct = exec_reg(ctx, ((x3 * x3) * arg0), (layout1.map(|c| c._super)))?; - return Ok(x4); -} -pub fn exec_do_int_round<'a>( - ctx: &'a ExecContext, - arg0: &Val24Array, - arg1: Val, - layout2: BoundLayout<'a, DoIntRoundLayout, Val>, -) -> Result { - // DoIntRound(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:32) - let x3: RegStruct = exec_s_box( - ctx, - (arg0[to_usize(Val::new(0))] + arg1), - (layout2.map(|c| c.sbox)), - )?; - let x4: Val = x3._super._super; - // MultiplyByMInt(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:13) - // DoIntRound(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:34) - let x5: Val = (((x4 + arg0[to_usize(Val::new(1))]) + arg0[to_usize(Val::new(2))]) - + arg0[to_usize(Val::new(3))]); - let x6: Val = (((x5 + arg0[to_usize(Val::new(4))]) + arg0[to_usize(Val::new(5))]) - + arg0[to_usize(Val::new(6))]); - let x7: Val = (((x6 + arg0[to_usize(Val::new(7))]) + arg0[to_usize(Val::new(8))]) - + arg0[to_usize(Val::new(9))]); - let x8: Val = (((x7 + arg0[to_usize(Val::new(10))]) + arg0[to_usize(Val::new(11))]) - + arg0[to_usize(Val::new(12))]); - let x9: Val = (((x8 + arg0[to_usize(Val::new(13))]) + arg0[to_usize(Val::new(14))]) - + arg0[to_usize(Val::new(15))]); - let x10: Val = (((x9 + arg0[to_usize(Val::new(16))]) + arg0[to_usize(Val::new(17))]) - + arg0[to_usize(Val::new(18))]); - let x11: Val = (((x10 + arg0[to_usize(Val::new(19))]) + arg0[to_usize(Val::new(20))]) - + arg0[to_usize(Val::new(21))]); - let x12: Val = ((x11 + arg0[to_usize(Val::new(22))]) + arg0[to_usize(Val::new(23))]); - // MultiplyByMInt(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:14) - let x13: MultiplyByMInt_Super_SuperStruct24Array = [ - MultiplyByMInt_Super_SuperStruct { - _super: (x12 + (x4 * Val::new(1083257840))), - }, - MultiplyByMInt_Super_SuperStruct { - _super: (x12 + (arg0[to_usize(Val::new(1))] * Val::new(375892129))), - }, - MultiplyByMInt_Super_SuperStruct { - _super: (x12 + (arg0[to_usize(Val::new(2))] * Val::new(111593398))), - }, - MultiplyByMInt_Super_SuperStruct { - _super: (x12 + (arg0[to_usize(Val::new(3))] * Val::new(1867716110))), - }, - MultiplyByMInt_Super_SuperStruct { - _super: (x12 + (arg0[to_usize(Val::new(4))] * Val::new(658182609))), - }, - MultiplyByMInt_Super_SuperStruct { - _super: (x12 + (arg0[to_usize(Val::new(5))] * Val::new(51866717))), - }, - MultiplyByMInt_Super_SuperStruct { - _super: (x12 + (arg0[to_usize(Val::new(6))] * Val::new(1928969209))), - }, - MultiplyByMInt_Super_SuperStruct { - _super: (x12 + (arg0[to_usize(Val::new(7))] * Val::new(1942928017))), - }, - MultiplyByMInt_Super_SuperStruct { - _super: (x12 + (arg0[to_usize(Val::new(8))] * Val::new(1558116381))), - }, - MultiplyByMInt_Super_SuperStruct { - _super: (x12 + (arg0[to_usize(Val::new(9))] * Val::new(20525701))), - }, - MultiplyByMInt_Super_SuperStruct { - _super: (x12 + (arg0[to_usize(Val::new(10))] * Val::new(1188752902))), - }, - MultiplyByMInt_Super_SuperStruct { - _super: (x12 + (arg0[to_usize(Val::new(11))] * Val::new(106789798))), - }, - MultiplyByMInt_Super_SuperStruct { - _super: (x12 + (arg0[to_usize(Val::new(12))] * Val::new(1389833583))), - }, - MultiplyByMInt_Super_SuperStruct { - _super: (x12 + (arg0[to_usize(Val::new(13))] * Val::new(98371040))), - }, - MultiplyByMInt_Super_SuperStruct { - _super: (x12 + (arg0[to_usize(Val::new(14))] * Val::new(1001081699))), - }, - MultiplyByMInt_Super_SuperStruct { - _super: (x12 + (arg0[to_usize(Val::new(15))] * Val::new(1792686146))), - }, - MultiplyByMInt_Super_SuperStruct { - _super: (x12 + (arg0[to_usize(Val::new(16))] * Val::new(801504236))), - }, - MultiplyByMInt_Super_SuperStruct { - _super: (x12 + (arg0[to_usize(Val::new(17))] * Val::new(1997365680))), - }, - MultiplyByMInt_Super_SuperStruct { - _super: (x12 + (arg0[to_usize(Val::new(18))] * Val::new(1461037801))), - }, - MultiplyByMInt_Super_SuperStruct { - _super: (x12 + (arg0[to_usize(Val::new(19))] * Val::new(65998480))), - }, - MultiplyByMInt_Super_SuperStruct { - _super: (x12 + (arg0[to_usize(Val::new(20))] * Val::new(1974912880))), - }, - MultiplyByMInt_Super_SuperStruct { - _super: (x12 + (arg0[to_usize(Val::new(21))] * Val::new(606789471))), - }, - MultiplyByMInt_Super_SuperStruct { - _super: (x12 + (arg0[to_usize(Val::new(22))] * Val::new(13683276))), - }, - MultiplyByMInt_Super_SuperStruct { - _super: (x12 + (arg0[to_usize(Val::new(23))] * Val::new(918610824))), - }, - ]; - return Ok(MultiplyByMIntStruct { _super: x13 }); -} -pub fn exec_do_int_rounds<'a>( - ctx: &'a ExecContext, - arg0: &Val24Array, - layout1: BoundLayout<'a, DoIntRoundsLayout, Val>, -) -> Result { - // DoIntRounds(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:38) - let x2: DoIntRounds__0_SuperStruct21Array = [ - DoIntRounds__0_SuperStruct { - _super: Val::new(497520322), - }, - DoIntRounds__0_SuperStruct { - _super: Val::new(1930103076), - }, - DoIntRounds__0_SuperStruct { - _super: Val::new(1052077299), - }, - DoIntRounds__0_SuperStruct { - _super: Val::new(1540960371), - }, - DoIntRounds__0_SuperStruct { - _super: Val::new(924863639), - }, - DoIntRounds__0_SuperStruct { - _super: Val::new(1365519753), - }, - DoIntRounds__0_SuperStruct { - _super: Val::new(1726563304), - }, - DoIntRounds__0_SuperStruct { - _super: Val::new(440300254), - }, - DoIntRounds__0_SuperStruct { - _super: Val::new(1891545577), - }, - DoIntRounds__0_SuperStruct { - _super: Val::new(822033215), - }, - DoIntRounds__0_SuperStruct { - _super: Val::new(1111544260), - }, - DoIntRounds__0_SuperStruct { - _super: Val::new(308575117), - }, - DoIntRounds__0_SuperStruct { - _super: Val::new(1708681573), - }, - DoIntRounds__0_SuperStruct { - _super: Val::new(1240419708), - }, - DoIntRounds__0_SuperStruct { - _super: Val::new(1199068823), - }, - DoIntRounds__0_SuperStruct { - _super: Val::new(1186174623), - }, - DoIntRounds__0_SuperStruct { - _super: Val::new(1551596046), - }, - DoIntRounds__0_SuperStruct { - _super: Val::new(1886977120), - }, - DoIntRounds__0_SuperStruct { - _super: Val::new(1327682690), - }, - DoIntRounds__0_SuperStruct { - _super: Val::new(1210751726), - }, - DoIntRounds__0_SuperStruct { - _super: Val::new(1810596765), - }, - ]; - let x3: Val24Array = reduce_layout(x2, *arg0, (layout1.map(|c| c._super)), |x4, x5, x6| { - let x7: MultiplyByMIntStruct = exec_do_int_round(ctx, &x4, x5._super, x6)?; - let x8: MultiplyByMInt_Super_SuperStruct24Array = x7._super; - let x9: Val24Array = [ - x8[to_usize(Val::new(0))]._super, - x8[to_usize(Val::new(1))]._super, - x8[to_usize(Val::new(2))]._super, - x8[to_usize(Val::new(3))]._super, - x8[to_usize(Val::new(4))]._super, - x8[to_usize(Val::new(5))]._super, - x8[to_usize(Val::new(6))]._super, - x8[to_usize(Val::new(7))]._super, - x8[to_usize(Val::new(8))]._super, - x8[to_usize(Val::new(9))]._super, - x8[to_usize(Val::new(10))]._super, - x8[to_usize(Val::new(11))]._super, - x8[to_usize(Val::new(12))]._super, - x8[to_usize(Val::new(13))]._super, - x8[to_usize(Val::new(14))]._super, - x8[to_usize(Val::new(15))]._super, - x8[to_usize(Val::new(16))]._super, - x8[to_usize(Val::new(17))]._super, - x8[to_usize(Val::new(18))]._super, - x8[to_usize(Val::new(19))]._super, - x8[to_usize(Val::new(20))]._super, - x8[to_usize(Val::new(21))]._super, - x8[to_usize(Val::new(22))]._super, - x8[to_usize(Val::new(23))]._super, - ]; - return Ok(x9); - })?; - return Ok(DoIntRoundsStruct { _super: x3 }); -} -pub fn exec_do_ext_round<'a>( - ctx: &'a ExecContext, - arg0: &Val24Array, - arg1: &Val24Array, - layout2: BoundLayout<'a, DoExtRoundLayout, Val>, -) -> Result { - // DoExtRound(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:103) - let x3: RegStruct24Array = map_layout( - [ - Val::new(0), - Val::new(1), - Val::new(2), - Val::new(3), - Val::new(4), - Val::new(5), - Val::new(6), - Val::new(7), - Val::new(8), - Val::new(9), - Val::new(10), - Val::new(11), - Val::new(12), - Val::new(13), - Val::new(14), - Val::new(15), - Val::new(16), - Val::new(17), - Val::new(18), - Val::new(19), - Val::new(20), - Val::new(21), - Val::new(22), - Val::new(23), - ], - (layout2.map(|c| c._1)), - |x4, x5| { - let x6: RegStruct = exec_s_box(ctx, (arg0[to_usize(x4)] + arg1[to_usize(x4)]), x5)?; - return Ok(x6); - }, - )?; - let x7: Val = x3[to_usize(Val::new(0))]._super._super; - let x8: Val = x3[to_usize(Val::new(1))]._super._super; - let x9: Val = x3[to_usize(Val::new(2))]._super._super; - let x10: Val = x3[to_usize(Val::new(3))]._super._super; - let x11: Val = x3[to_usize(Val::new(4))]._super._super; - let x12: Val = x3[to_usize(Val::new(5))]._super._super; - let x13: Val = x3[to_usize(Val::new(6))]._super._super; - let x14: Val = x3[to_usize(Val::new(7))]._super._super; - let x15: Val = x3[to_usize(Val::new(8))]._super._super; - let x16: Val = x3[to_usize(Val::new(9))]._super._super; - let x17: Val = x3[to_usize(Val::new(10))]._super._super; - let x18: Val = x3[to_usize(Val::new(11))]._super._super; - let x19: Val = x3[to_usize(Val::new(12))]._super._super; - let x20: Val = x3[to_usize(Val::new(13))]._super._super; - let x21: Val = x3[to_usize(Val::new(14))]._super._super; - let x22: Val = x3[to_usize(Val::new(15))]._super._super; - let x23: Val = x3[to_usize(Val::new(16))]._super._super; - let x24: Val = x3[to_usize(Val::new(17))]._super._super; - let x25: Val = x3[to_usize(Val::new(18))]._super._super; - let x26: Val = x3[to_usize(Val::new(19))]._super._super; - let x27: Val = x3[to_usize(Val::new(20))]._super._super; - let x28: Val = x3[to_usize(Val::new(21))]._super._super; - let x29: Val = x3[to_usize(Val::new(22))]._super._super; - let x30: Val = x3[to_usize(Val::new(23))]._super._super; - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:42) - // MultiplyByMExt(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:61) - let x31: Val = (x7 + x8); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:43) - let x32: Val = (x9 + x10); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:44) - let x33: Val = ((x8 * Val::new(2)) + x32); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:45) - let x34: Val = ((x10 * Val::new(2)) + x31); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:46) - let x35: Val = ((x32 * Val::new(4)) + x34); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:47) - let x36: Val = ((x31 * Val::new(4)) + x33); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:48) - let x37: Val = (x34 + x36); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:49) - let x38: Val = (x33 + x35); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:42) - let x39: Val = (x11 + x12); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:43) - let x40: Val = (x13 + x14); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:44) - let x41: Val = ((x12 * Val::new(2)) + x40); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:45) - let x42: Val = ((x14 * Val::new(2)) + x39); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:46) - let x43: Val = ((x40 * Val::new(4)) + x42); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:47) - let x44: Val = ((x39 * Val::new(4)) + x41); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:48) - let x45: Val = (x42 + x44); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:49) - let x46: Val = (x41 + x43); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:42) - let x47: Val = (x15 + x16); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:43) - let x48: Val = (x17 + x18); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:44) - let x49: Val = ((x16 * Val::new(2)) + x48); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:45) - let x50: Val = ((x18 * Val::new(2)) + x47); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:46) - let x51: Val = ((x48 * Val::new(4)) + x50); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:47) - let x52: Val = ((x47 * Val::new(4)) + x49); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:48) - let x53: Val = (x50 + x52); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:49) - let x54: Val = (x49 + x51); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:42) - let x55: Val = (x19 + x20); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:43) - let x56: Val = (x21 + x22); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:44) - let x57: Val = ((x20 * Val::new(2)) + x56); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:45) - let x58: Val = ((x22 * Val::new(2)) + x55); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:46) - let x59: Val = ((x56 * Val::new(4)) + x58); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:47) - let x60: Val = ((x55 * Val::new(4)) + x57); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:48) - let x61: Val = (x58 + x60); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:49) - let x62: Val = (x57 + x59); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:42) - let x63: Val = (x23 + x24); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:43) - let x64: Val = (x25 + x26); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:44) - let x65: Val = ((x24 * Val::new(2)) + x64); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:45) - let x66: Val = ((x26 * Val::new(2)) + x63); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:46) - let x67: Val = ((x64 * Val::new(4)) + x66); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:47) - let x68: Val = ((x63 * Val::new(4)) + x65); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:48) - let x69: Val = (x66 + x68); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:49) - let x70: Val = (x65 + x67); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:42) - let x71: Val = (x27 + x28); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:43) - let x72: Val = (x29 + x30); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:44) - let x73: Val = ((x28 * Val::new(2)) + x72); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:45) - let x74: Val = ((x30 * Val::new(2)) + x71); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:46) - let x75: Val = ((x72 * Val::new(4)) + x74); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:47) - let x76: Val = ((x71 * Val::new(4)) + x73); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:48) - let x77: Val = (x74 + x76); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:49) - let x78: Val = (x73 + x75); - // ReduceVec4(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:54) - // MultiplyByMExt(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:64) - let x79: Val = (((x37 + x45) + x53) + x61); - let x80: Val = (((x36 + x44) + x52) + x60); - let x81: Val = (((x38 + x46) + x54) + x62); - let x82: Val = (((x35 + x43) + x51) + x59); - let x83: Val = ((x79 + x69) + x77); - let x84: Val = ((x80 + x68) + x76); - let x85: Val = ((x81 + x70) + x78); - let x86: Val = ((x82 + x67) + x75); - // MultiplyByMExt(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:65) - let x87: MultiplyByMExt_Super_SuperStruct24Array = [ - MultiplyByMExt_Super_SuperStruct { - _super: (x37 + x83), - }, - MultiplyByMExt_Super_SuperStruct { - _super: (x36 + x84), - }, - MultiplyByMExt_Super_SuperStruct { - _super: (x38 + x85), - }, - MultiplyByMExt_Super_SuperStruct { - _super: (x35 + x86), - }, - MultiplyByMExt_Super_SuperStruct { - _super: (x45 + x83), - }, - MultiplyByMExt_Super_SuperStruct { - _super: (x44 + x84), - }, - MultiplyByMExt_Super_SuperStruct { - _super: (x46 + x85), - }, - MultiplyByMExt_Super_SuperStruct { - _super: (x43 + x86), - }, - MultiplyByMExt_Super_SuperStruct { - _super: (x53 + x83), - }, - MultiplyByMExt_Super_SuperStruct { - _super: (x52 + x84), - }, - MultiplyByMExt_Super_SuperStruct { - _super: (x54 + x85), - }, - MultiplyByMExt_Super_SuperStruct { - _super: (x51 + x86), - }, - MultiplyByMExt_Super_SuperStruct { - _super: (x61 + x83), - }, - MultiplyByMExt_Super_SuperStruct { - _super: (x60 + x84), - }, - MultiplyByMExt_Super_SuperStruct { - _super: (x62 + x85), - }, - MultiplyByMExt_Super_SuperStruct { - _super: (x59 + x86), - }, - MultiplyByMExt_Super_SuperStruct { - _super: (x69 + x83), - }, - MultiplyByMExt_Super_SuperStruct { - _super: (x68 + x84), - }, - MultiplyByMExt_Super_SuperStruct { - _super: (x70 + x85), - }, - MultiplyByMExt_Super_SuperStruct { - _super: (x67 + x86), - }, - MultiplyByMExt_Super_SuperStruct { - _super: (x77 + x83), - }, - MultiplyByMExt_Super_SuperStruct { - _super: (x76 + x84), - }, - MultiplyByMExt_Super_SuperStruct { - _super: (x78 + x85), - }, - MultiplyByMExt_Super_SuperStruct { - _super: (x75 + x86), - }, - ]; - return Ok(MultiplyByMExtStruct { _super: x87 }); -} -pub fn exec_do_ext_round_by_idx<'a>( - ctx: &'a ExecContext, - arg0: &Val24Array, - arg1: Val, - layout2: BoundLayout<'a, DoExtRoundByIdxLayout, Val>, -) -> Result { - // DoExtRoundByIdx(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:115) - let x3: OneHot_8_Struct = exec_one_hot_8_(ctx, arg1, (layout2.map(|c| c.idx_hot)))?; - let x4: NondetRegStruct8Array = x3.bits; - let x5: Val = x4[to_usize(Val::new(0))]._super; - let x6: Val = x4[to_usize(Val::new(1))]._super; - let x7: Val = x4[to_usize(Val::new(2))]._super; - let x8: Val = x4[to_usize(Val::new(3))]._super; - let x9: Val = x4[to_usize(Val::new(4))]._super; - let x10: Val = x4[to_usize(Val::new(5))]._super; - let x11: Val = x4[to_usize(Val::new(6))]._super; - let x12: Val = x4[to_usize(Val::new(7))]._super; - // AddConsts(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:107) - // DoExtRoundByIdx(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:118) - let x13: Val = - (((x5 * Val::new(262278199)) + (x6 * Val::new(695835963))) + (x7 * Val::new(1147522062))); - let x14: Val = - (((x5 * Val::new(127253399)) + (x6 * Val::new(1845603984))) + (x7 * Val::new(27129487))); - let x15: Val = - (((x5 * Val::new(314968988)) + (x6 * Val::new(540703332))) + (x7 * Val::new(1257820264))); - let x16: Val = - (((x5 * Val::new(246143118)) + (x6 * Val::new(1333667262))) + (x7 * Val::new(142102402))); - let x17: Val = - (((x5 * Val::new(157582794)) + (x6 * Val::new(1917861751))) + (x7 * Val::new(217046702))); - let x18: Val = - (((x5 * Val::new(118043943)) + (x6 * Val::new(1170029417))) + (x7 * Val::new(1664590951))); - let x19: Val = - (((x5 * Val::new(454905424)) + (x6 * Val::new(1989924532))) + (x7 * Val::new(855276054))); - let x20: Val = - (((x5 * Val::new(815798990)) + (x6 * Val::new(1518763784))) + (x7 * Val::new(1215259350))); - let x21: Val = - (((x5 * Val::new(1004040026)) + (x6 * Val::new(1339793538))) + (x7 * Val::new(946500736))); - let x22: Val = - (((x5 * Val::new(1773108264)) + (x6 * Val::new(622609176))) + (x7 * Val::new(552696906))); - let x23: Val = - (((x5 * Val::new(1066694495)) + (x6 * Val::new(686842369))) + (x7 * Val::new(1424297384))); - let x24: Val = - (((x5 * Val::new(1930780904)) + (x6 * Val::new(1737016378))) + (x7 * Val::new(538103555))); - let x25: Val = - (((x5 * Val::new(1180307149)) + (x6 * Val::new(1282239129))) + (x7 * Val::new(1608853840))); - let x26: Val = - (((x5 * Val::new(1464793095)) + (x6 * Val::new(897025192))) + (x7 * Val::new(162510541))); - let x27: Val = - (((x5 * Val::new(1660766320)) + (x6 * Val::new(716894289))) + (x7 * Val::new(623051854))); - let x28: Val = - (((x5 * Val::new(1389166148)) + (x6 * Val::new(1997503974))) + (x7 * Val::new(1549062383))); - let x29: Val = - (((x5 * Val::new(343354132)) + (x6 * Val::new(395622276))) + (x7 * Val::new(1908416316))); - let x30: Val = - (((x5 * Val::new(1307439985)) + (x6 * Val::new(1201063290))) + (x7 * Val::new(1622328571))); - let x31: Val = - (((x5 * Val::new(638242172)) + (x6 * Val::new(1917549072))) + (x7 * Val::new(1079030649))); - let x32: Val = - (((x5 * Val::new(525458520)) + (x6 * Val::new(1150912935))) + (x7 * Val::new(1584033957))); - let x33: Val = - (((x5 * Val::new(1964135730)) + (x6 * Val::new(1687379185))) + (x7 * Val::new(1099252725))); - let x34: Val = - (((x5 * Val::new(1751797115)) + (x6 * Val::new(1507936940))) + (x7 * Val::new(1910423126))); - let x35: Val = - (((x5 * Val::new(1421525369)) + (x6 * Val::new(241306552))) + (x7 * Val::new(447555988))); - let x36: Val = - (((x5 * Val::new(831813382)) + (x6 * Val::new(989176635))) + (x7 * Val::new(862495875))); - let x37: Val = (((x13 + (x8 * Val::new(128479034))) + (x9 * Val::new(53041581))) - + (x10 * Val::new(1209164052))); - let x38: Val = (((x14 + (x8 * Val::new(1587822577))) + (x9 * Val::new(723038058))) - + (x10 * Val::new(714957516))); - let x39: Val = (((x15 + (x8 * Val::new(608401422))) + (x9 * Val::new(1439947916))) - + (x10 * Val::new(390340387))); - let x40: Val = (((x16 + (x8 * Val::new(1290028279))) + (x9 * Val::new(1136469704))) - + (x10 * Val::new(1213686459))); - let x41: Val = (((x17 + (x8 * Val::new(342857858))) + (x9 * Val::new(205609311))) - + (x10 * Val::new(790726260))); - let x42: Val = (((x18 + (x8 * Val::new(825405577))) + (x9 * Val::new(1883820770))) - + (x10 * Val::new(117294666))); - let x43: Val = (((x19 + (x8 * Val::new(427731030))) + (x9 * Val::new(14387587))) - + (x10 * Val::new(140621810))); - let x44: Val = (((x20 + (x8 * Val::new(1718628547))) + (x9 * Val::new(720724951))) - + (x10 * Val::new(993455846))); - let x45: Val = (((x21 + (x8 * Val::new(588764636))) + (x9 * Val::new(1854174607))) - + (x10 * Val::new(1889603648))); - let x46: Val = (((x22 + (x8 * Val::new(204228775))) + (x9 * Val::new(1629316321))) - + (x10 * Val::new(78845751))); - let x47: Val = (((x23 + (x8 * Val::new(1454563174))) + (x9 * Val::new(530151394))) - + (x10 * Val::new(925018226))); - let x48: Val = (((x24 + (x8 * Val::new(1740472809))) + (x9 * Val::new(1679178250))) - + (x10 * Val::new(708123747))); - let x49: Val = (((x25 + (x8 * Val::new(1338899225))) + (x9 * Val::new(1549779579))) - + (x10 * Val::new(1647665372))); - let x50: Val = (((x26 + (x8 * Val::new(1269493554))) + (x9 * Val::new(48375137))) - + (x10 * Val::new(1649953458))); - let x51: Val = (((x27 + (x8 * Val::new(53007114))) + (x9 * Val::new(976057819))) - + (x10 * Val::new(942439428))); - let x52: Val = (((x28 + (x8 * Val::new(1647670797))) + (x9 * Val::new(463976218))) - + (x10 * Val::new(1006235079))); - let x53: Val = (((x29 + (x8 * Val::new(306391314))) + (x9 * Val::new(875839332))) - + (x10 * Val::new(238616145))); - let x54: Val = (((x30 + (x8 * Val::new(172614232))) + (x9 * Val::new(1946596189))) - + (x10 * Val::new(930036496))); - let x55: Val = (((x31 + (x8 * Val::new(51256176))) + (x9 * Val::new(434078361))) - + (x10 * Val::new(1401020792))); - let x56: Val = (((x32 + (x8 * Val::new(1221257987))) + (x9 * Val::new(1878280202))) - + (x10 * Val::new(989618631))); - let x57: Val = (((x33 + (x8 * Val::new(1239734761))) + (x9 * Val::new(1363837384))) - + (x10 * Val::new(1545325389))); - let x58: Val = (((x34 + (x8 * Val::new(273790406))) + (x9 * Val::new(1470845646))) - + (x10 * Val::new(1715719711))); - let x59: Val = (((x35 + (x8 * Val::new(1781980094))) + (x9 * Val::new(1792450386))) - + (x10 * Val::new(755691969))); - let x60: Val = (((x36 + (x8 * Val::new(1291790245))) + (x9 * Val::new(1040977421))) - + (x10 * Val::new(150307788))); - let x61: Val24Array = [ - ((x37 + (x11 * Val::new(1567618575))) + (x12 * Val::new(1206940496))), - ((x38 + (x11 * Val::new(1663353317))) + (x12 * Val::new(1896271507))), - ((x39 + (x11 * Val::new(1950429111))) + (x12 * Val::new(1003792297))), - ((x40 + (x11 * Val::new(1891637550))) + (x12 * Val::new(738091882))), - ((x41 + (x11 * Val::new(192082241))) + (x12 * Val::new(1124078057))), - ((x42 + (x11 * Val::new(1080533265))) + (x12 * Val::new(1889898))), - ((x43 + (x11 * Val::new(1463323727))) + (x12 * Val::new(813674331))), - ((x44 + (x11 * Val::new(890243564))) + (x12 * Val::new(228520958))), - ((x45 + (x11 * Val::new(158646617))) + (x12 * Val::new(1832911930))), - ((x46 + (x11 * Val::new(1402624179))) + (x12 * Val::new(781141772))), - ((x47 + (x11 * Val::new(59510015))) + (x12 * Val::new(459826664))), - ((x48 + (x11 * Val::new(1198261138))) + (x12 * Val::new(202271745))), - ((x49 + (x11 * Val::new(1065075039))) + (x12 * Val::new(1296144415))), - ((x50 + (x11 * Val::new(1150410028))) + (x12 * Val::new(1111203133))), - ((x51 + (x11 * Val::new(1293938517))) + (x12 * Val::new(1090783436))), - ((x52 + (x11 * Val::new(76770019))) + (x12 * Val::new(641665156))), - ((x53 + (x11 * Val::new(1478577620))) + (x12 * Val::new(1393671120))), - ((x54 + (x11 * Val::new(1748789933))) + (x12 * Val::new(1303271640))), - ((x55 + (x11 * Val::new(457372011))) + (x12 * Val::new(809508074))), - ((x56 + (x11 * Val::new(1841795381))) + (x12 * Val::new(162506101))), - ((x57 + (x11 * Val::new(760115692))) + (x12 * Val::new(1262312258))), - ((x58 + (x11 * Val::new(1042892522))) + (x12 * Val::new(1672219447))), - ((x59 + (x11 * Val::new(1507649755))) + (x12 * Val::new(1608891156))), - ((x60 + (x11 * Val::new(1827572010))) + (x12 * Val::new(1380248020))), - ]; - // DoExtRoundByIdx(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:122) - let x62: MultiplyByMExtStruct = - exec_do_ext_round(ctx, arg0, &x61, (layout2.map(|c| c._super)))?; - return Ok(x62); -} -pub fn back_poseidon_state<'a>( - ctx: &'a ExecContext, - distance0: Index, - layout1: BoundLayout<'a, PoseidonStateLayout, Val>, -) -> Result { - // PoseidonState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:34) - let x2: RegStruct = back_reg(ctx, distance0, (layout1.map(|c| c.has_state)))?; - // PoseidonState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:35) - let x3: RegStruct = back_reg(ctx, distance0, (layout1.map(|c| c.state_addr)))?; - // PoseidonState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:36) - let x4: RegStruct = back_reg(ctx, distance0, (layout1.map(|c| c.buf_out_addr)))?; - // PoseidonState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:37) - let x5: RegStruct = back_reg(ctx, distance0, (layout1.map(|c| c.is_elem)))?; - // PoseidonState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:38) - let x6: RegStruct = back_reg(ctx, distance0, (layout1.map(|c| c.check_out)))?; - // PoseidonState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:39) - let x7: RegStruct = back_reg(ctx, distance0, (layout1.map(|c| c.load_tx_type)))?; - // PoseidonState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:41) - let x8: RegStruct = back_reg(ctx, distance0, (layout1.map(|c| c.next_state)))?; - // PoseidonState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:42) - let x9: RegStruct = back_reg(ctx, distance0, (layout1.map(|c| c.sub_state)))?; - // PoseidonState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:43) - let x10: RegStruct = back_reg(ctx, distance0, (layout1.map(|c| c.buf_in_addr)))?; - // PoseidonState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:44) - let x11: RegStruct = back_reg(ctx, distance0, (layout1.map(|c| c.count)))?; - // PoseidonState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:45) - let x12: RegStruct = back_reg(ctx, distance0, (layout1.map(|c| c.mode)))?; - // PoseidonState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:47) - let x13: RegStruct24Array = map_layout( - [ - Val::new(0), - Val::new(1), - Val::new(2), - Val::new(3), - Val::new(4), - Val::new(5), - Val::new(6), - Val::new(7), - Val::new(8), - Val::new(9), - Val::new(10), - Val::new(11), - Val::new(12), - Val::new(13), - Val::new(14), - Val::new(15), - Val::new(16), - Val::new(17), - Val::new(18), - Val::new(19), - Val::new(20), - Val::new(21), - Val::new(22), - Val::new(23), - ], - (layout1.map(|c| c.inner)), - |x14, x15| { - let x16: RegStruct = back_reg(ctx, distance0, x15)?; - return Ok(x16); - }, - )?; - // PoseidonState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:48) - let x17: NondetExtRegStruct = back_ext_reg(ctx, distance0, (layout1.map(|c| c.zcheck)))?; - return Ok(PoseidonStateStruct { - has_state: x2, - state_addr: x3, - buf_out_addr: x4, - is_elem: x5, - check_out: x6, - load_tx_type: x7, - next_state: x8, - sub_state: x9, - buf_in_addr: x10, - count: x11, - mode: x12, - inner: x13, - zcheck: x17, - }); -} -pub fn exec_poseidon_state<'a>( - ctx: &'a ExecContext, - arg0: &PoseidonOpDefStruct, - arg1: Val, - arg2: Val, - arg3: Val, - arg4: Val, - arg5: Val, - arg6: &Val24Array, - arg7: ExtVal, - layout8: BoundLayout<'a, PoseidonStateLayout, Val>, -) -> Result { - // PoseidonState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:34) - let x9: RegStruct = exec_reg(ctx, arg0.has_state, (layout8.map(|c| c.has_state)))?; - // PoseidonState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:35) - let x10: RegStruct = exec_reg(ctx, arg0.state_addr, (layout8.map(|c| c.state_addr)))?; - // PoseidonState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:36) - let x11: RegStruct = exec_reg(ctx, arg0.buf_out_addr, (layout8.map(|c| c.buf_out_addr)))?; - // PoseidonState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:37) - let x12: RegStruct = exec_reg(ctx, arg0.is_elem, (layout8.map(|c| c.is_elem)))?; - // PoseidonState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:38) - let x13: RegStruct = exec_reg(ctx, arg0.check_out, (layout8.map(|c| c.check_out)))?; - // PoseidonState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:39) - let x14: RegStruct = exec_reg(ctx, arg0.load_tx_type, (layout8.map(|c| c.load_tx_type)))?; - // PoseidonState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:41) - let x15: RegStruct = exec_reg(ctx, arg1, (layout8.map(|c| c.next_state)))?; - // PoseidonState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:42) - let x16: RegStruct = exec_reg(ctx, arg2, (layout8.map(|c| c.sub_state)))?; - // PoseidonState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:43) - let x17: RegStruct = exec_reg(ctx, arg3, (layout8.map(|c| c.buf_in_addr)))?; - // PoseidonState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:44) - let x18: RegStruct = exec_reg(ctx, arg4, (layout8.map(|c| c.count)))?; - // PoseidonState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:45) - let x19: RegStruct = exec_reg(ctx, arg5, (layout8.map(|c| c.mode)))?; - // PoseidonState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:47) - let x20: RegStruct24Array = map_layout(*arg6, (layout8.map(|c| c.inner)), |x21, x22| { - let x23: RegStruct = exec_reg(ctx, x21, x22)?; - return Ok(x23); - })?; - // PoseidonState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:48) - let x24: NondetExtRegStruct = exec_ext_reg(ctx, arg7, (layout8.map(|c| c.zcheck)))?; - return Ok(PoseidonStateStruct { - has_state: x9, - state_addr: x10, - buf_out_addr: x11, - is_elem: x12, - check_out: x13, - load_tx_type: x14, - next_state: x15, - sub_state: x16, - buf_in_addr: x17, - count: x18, - mode: x19, - inner: x20, - zcheck: x24, - }); -} -pub fn exec_poseidon_invalid<'a>( - ctx: &'a ExecContext, - layout0: BoundLayout<'a, PoseidonStateLayout, Val>, -) -> Result { - // PoseidonInvalid(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:52) - eqz!( - Val::new(2013265920), - "PoseidonInvalid(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:52)" - ); - // PoseidonInvalid(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:61) - let x1: PoseidonStateStruct = exec_poseidon_state( - ctx, - &PoseidonOpDefStruct { - has_state: Val::new(0), - state_addr: Val::new(0), - buf_out_addr: Val::new(0), - is_elem: Val::new(0), - check_out: Val::new(0), - load_tx_type: Val::new(0), - }, - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - &[ - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - ], - ExtVal::new(Val::new(0), Val::new(0), Val::new(0), Val::new(0)), - layout0, - )?; - return Ok(x1); -} -pub fn exec_read_addr<'a>( - ctx: &'a ExecContext, - arg0: &RegStruct, - arg1: Val, - layout2: BoundLayout<'a, ReadAddrLayout, Val>, -) -> Result { - // ReadAddr(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:78) - let x3: GetDataStruct = exec_memory_read( - ctx, - arg0, - (arg1 + Val::new(1073725440)), - (layout2.map(|c| c.addr32)), - )?; - let x4: ValU32Struct = x3._super; - // ReadAddr(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:79) - let x5: Val = ((x4.high * Val::new(16384)) + (x4.low * Val::new(1509949441))); - return Ok(ReadAddrStruct { _super: x5 }); -} -pub fn exec_poseidon_ecall<'a>( - ctx: &'a ExecContext, - arg0: &RegStruct, - arg1: Val, - layout2: BoundLayout<'a, PoseidonEcallLayout, Val>, -) -> Result { - // PoseidonEcall(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:84) - let x3: ReadAddrStruct = - exec_read_addr(ctx, arg0, Val::new(10), (layout2.map(|c| c.state_addr)))?; - // PoseidonEcall(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:85) - let x4: ReadAddrStruct = - exec_read_addr(ctx, arg0, Val::new(11), (layout2.map(|c| c.buf_in_addr)))?; - // PoseidonEcall(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:86) - let x5: ReadAddrStruct = - exec_read_addr(ctx, arg0, Val::new(12), (layout2.map(|c| c.buf_out_addr)))?; - // PoseidonEcall(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:87) - let x6: GetDataStruct = exec_memory_read( - ctx, - arg0, - Val::new(1073725453), - (layout2.map(|c| c.bits_and_count)), - )?; - // PoseidonEcall(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:84) - let x7: Val = x3._super; - // PoseidonEcall(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:90) - let x8: NondetRegStruct = exec_is_zero(ctx, x7, (layout2.map(|c| c._0)))?; - let x9: Val = (Val::new(1) - x8._super); - // PoseidonEcall(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:87) - let x10: ValU32Struct = x6._super; - let x11: Val = x10.low; - let x12: Val = x10.high; - // PoseidonEcall(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:94) - let x13: NondetRegStruct = exec_nondet_bit_reg( - ctx, - (bit_and(x12, Val::new(32768))? * Val::new(2013204481)), - (layout2.map(|c| c.is_elem)), - )?; - // PoseidonEcall(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:95) - let x14: NondetRegStruct = exec_nondet_bit_reg( - ctx, - (bit_and(x12, Val::new(16384))? * Val::new(2013143041)), - (layout2.map(|c| c.check_out)), - )?; - // PoseidonEcall(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:94) - let x15: Val = x13._super; - // PoseidonEcall(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:95) - let x16: Val = x14._super; - // PoseidonEcall(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:96) - eqz!( - (x12 - ((x15 * Val::new(32768)) + (x16 * Val::new(16384)))), - "PoseidonEcall(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:96)" - ); - // PoseidonEcall(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:99) - let x17: NondetRegStruct = exec_is_zero(ctx, x11, (layout2.map(|c| c.count_zero)))?; - let x18: Val = x17._super; - // PoseidonEcall(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:102) - let x19: Val = (Val::new(1) - x18); - // PoseidonEcall(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:101) - let x20: Val = ((x18 * Val::new(32)) + ((x19 * x9) * Val::new(17))); - // PoseidonEcall(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:105) - let x21: PoseidonStateStruct = exec_poseidon_state( - ctx, - &PoseidonOpDefStruct { - has_state: x9, - state_addr: x7, - buf_out_addr: x5._super, - is_elem: x15, - check_out: x16, - load_tx_type: Val::new(0), - }, - (x20 + ((x19 * (Val::new(1) - x9)) * Val::new(18))), - Val::new(0), - x4._super, - x11, - arg1, - &[ - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - ], - ExtVal::new(Val::new(0), Val::new(0), Val::new(0), Val::new(0)), - (layout2.map(|c| c._super)), - )?; - return Ok(x21); -} -pub fn exec_poseidon_paging_entry<'a>( - ctx: &'a ExecContext, - arg0: &RegStruct, - arg1: Val, - layout2: BoundLayout<'a, PoseidonStateLayout, Val>, -) -> Result { - // Div(:19) - // PoseidonPagingEntry(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:110) - let x3: Val = (arg1 * Val::new(1342177281)); - // PoseidonPagingEntry(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:114) - let x4: Val = ((Val::new(1) - x3) * Val::new(1140850688)); - // PoseidonOpDef(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:8) - // PoseidonPagingEntry(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:111) - let x5: PoseidonOpDefStruct = PoseidonOpDefStruct { - has_state: Val::new(0), - state_addr: Val::new(0), - buf_out_addr: ((x3 * Val::new(1073741824)) + x4), - is_elem: Val::new(1), - check_out: Val::new(1), - load_tx_type: Val::new(1), - }; - // PoseidonPagingEntry(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:119) - let x6: PoseidonStateStruct = exec_poseidon_state( - ctx, - &x5, - Val::new(22), - Val::new(0), - Val::new(0), - Val::new(0), - arg1, - &[ - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - ], - ExtVal::new(Val::new(0), Val::new(0), Val::new(0), Val::new(0)), - layout2, - )?; - return Ok(x6); -} -pub fn exec_poseidon_entry<'a>( - ctx: &'a ExecContext, - arg0: &RegStruct, - arg1: &ValU32Struct, - arg2: Val, - layout3: BoundLayout<'a, PoseidonEntryLayout, Val>, -) -> Result { - // PoseidonEntry(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:132) - let x4: BoundLayout = (layout3.map(|c| c._super)); - // PoseidonEntry(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:131) - let x5: NondetRegStruct = - exec_is_zero(ctx, (arg1.low + arg1.high), (layout3.map(|c| c.pc_zero)))?; - let x6: Val = x5._super; - // PoseidonEntry(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:132) - let x7: BoundLayout = (x4.map(|c| c.arm0)); - let x8: BoundLayout = (((x7.map(|c| c._extra0)).map(|c| c.count)).map(|c| c._super)); - let x9: BoundLayout = (((x7.map(|c| c._extra1)).map(|c| c.count)).map(|c| c._super)); - let x10: BoundLayout = (((x7.map(|c| c._extra2)).map(|c| c.count)).map(|c| c._super)); - let x11: BoundLayout = (((x7.map(|c| c._extra3)).map(|c| c.count)).map(|c| c._super)); - let x12: BoundLayout = (((x7.map(|c| c._extra4)).map(|c| c.count)).map(|c| c._super)); - let x13: BoundLayout = (((x7.map(|c| c._extra5)).map(|c| c.count)).map(|c| c._super)); - let x14: BoundLayout = (((x7.map(|c| c._extra6)).map(|c| c.count)).map(|c| c._super)); - let x15: BoundLayout = (((x7.map(|c| c._extra7)).map(|c| c.count)).map(|c| c._super)); - let x16: BoundLayout = (((x7.map(|c| c._extra8)).map(|c| c.count)).map(|c| c._super)); - let x17: BoundLayout = (((x7.map(|c| c._extra9)).map(|c| c.count)).map(|c| c._super)); - let x18: BoundLayout = (((x7.map(|c| c._extra10)).map(|c| c.count)).map(|c| c._super)); - let x19: BoundLayout = (((x7.map(|c| c._extra11)).map(|c| c.count)).map(|c| c._super)); - let x20: PoseidonStateStruct; - if is_true(x6) { - // PoseidonEntry(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:133) - let x21: PoseidonStateStruct = - exec_poseidon_paging_entry(ctx, arg0, arg2, (x7.map(|c| c._super)))?; - // PoseidonEntry(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:132) - x8.store(ctx, Val::new(0)); - eqz!( - x8.load(ctx, 0), - "PoseidonEntry(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:132)" - ); - x9.store(ctx, Val::new(0)); - eqz!( - x9.load(ctx, 0), - "PoseidonEntry(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:132)" - ); - x10.store(ctx, Val::new(0)); - eqz!( - x10.load(ctx, 0), - "PoseidonEntry(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:132)" - ); - x11.store(ctx, Val::new(0)); - eqz!( - x11.load(ctx, 0), - "PoseidonEntry(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:132)" - ); - x12.store(ctx, Val::new(0)); - eqz!( - x12.load(ctx, 0), - "PoseidonEntry(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:132)" - ); - x13.store(ctx, Val::new(0)); - eqz!( - x13.load(ctx, 0), - "PoseidonEntry(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:132)" - ); - x14.store(ctx, Val::new(0)); - eqz!( - x14.load(ctx, 0), - "PoseidonEntry(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:132)" - ); - x15.store(ctx, Val::new(0)); - eqz!( - x15.load(ctx, 0), - "PoseidonEntry(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:132)" - ); - x16.store(ctx, Val::new(0)); - eqz!( - x16.load(ctx, 0), - "PoseidonEntry(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:132)" - ); - x17.store(ctx, Val::new(0)); - eqz!( - x17.load(ctx, 0), - "PoseidonEntry(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:132)" - ); - x18.store(ctx, Val::new(0)); - eqz!( - x18.load(ctx, 0), - "PoseidonEntry(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:132)" - ); - x19.store(ctx, Val::new(0)); - eqz!( - x19.load(ctx, 0), - "PoseidonEntry(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:132)" - ); - x20 = x21; - } else if is_true((Val::new(1) - x6)) { - // PoseidonEntry(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:135) - let x22: PoseidonStateStruct = exec_poseidon_ecall(ctx, arg0, arg2, (x4.map(|c| c.arm1)))?; - x20 = x22; - } else { - bail!("Reached unreachable mux arm") - } // PoseidonEntry(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:132) - let x23: PoseidonStateStruct = back_poseidon_state(ctx, 0, (x4.map(|c| c._super)))?; - return Ok(x23); -} -pub fn exec_read_elem<'a>( - ctx: &'a ExecContext, - arg0: &RegStruct, - arg1: Val, - layout2: BoundLayout<'a, ReadElemLayout, Val>, -) -> Result { - // ReadElem(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:140) - let x3: GetDataStruct = exec_memory_read(ctx, arg0, arg1, (layout2.map(|c| c.elem32)))?; - let x4: ValU32Struct = x3._super; - // ReadElem(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:141) - let x5: Val = ((x4.high * Val::new(65536)) + x4.low); - return Ok(ReadElemStruct { _super: x5 }); -} -pub fn exec_poseidon_load_state<'a>( - ctx: &'a ExecContext, - arg0: &RegStruct, - arg1: &PoseidonStateStruct, - layout2: BoundLayout<'a, PoseidonLoadStateLayout, Val>, -) -> Result { - // PoseidonLoadState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:144) - let x3: Val = arg1.state_addr._super._super; - // PoseidonLoadState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:146) - let x4: ReadElemStruct8Array = map_layout( - [ - Val::new(0), - Val::new(1), - Val::new(2), - Val::new(3), - Val::new(4), - Val::new(5), - Val::new(6), - Val::new(7), - ], - (layout2.map(|c| c.load_list)), - |x5, x6| { - // PoseidonLoadState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:147) - let x7: ReadElemStruct = exec_read_elem(ctx, arg0, (x3 + x5), x6)?; - return Ok(x7); - }, - )?; - // GetDef(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:71) - // PoseidonLoadState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:156) - let x8: Val = arg1.has_state._super._super; - let x9: Val = arg1.buf_out_addr._super._super; - let x10: Val = arg1.is_elem._super._super; - let x11: Val = arg1.check_out._super._super; - let x12: Val = arg1.load_tx_type._super._super; - // PoseidonLoadState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:144) - let x13: Val = arg1.buf_in_addr._super._super; - let x14: Val = arg1.count._super._super; - let x15: Val = arg1.mode._super._super; - // PoseidonLoadState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:149) - let x16: Val24Array = [ - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - x4[to_usize(Val::new(0))]._super, - x4[to_usize(Val::new(1))]._super, - x4[to_usize(Val::new(2))]._super, - x4[to_usize(Val::new(3))]._super, - x4[to_usize(Val::new(4))]._super, - x4[to_usize(Val::new(5))]._super, - x4[to_usize(Val::new(6))]._super, - x4[to_usize(Val::new(7))]._super, - ]; - // PoseidonLoadState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:156) - let x17: PoseidonStateStruct = exec_poseidon_state( - ctx, - &PoseidonOpDefStruct { - has_state: x8, - state_addr: x3, - buf_out_addr: x9, - is_elem: x10, - check_out: x11, - load_tx_type: x12, - }, - Val::new(18), - Val::new(0), - x13, - x14, - x15, - &x16, - ExtVal::new(Val::new(0), Val::new(0), Val::new(0), Val::new(0)), - (layout2.map(|c| c._super)), - )?; - return Ok(x17); -} -pub fn exec_poseidon_load_in_short<'a>( - ctx: &'a ExecContext, - arg0: &RegStruct, - arg1: &PoseidonStateStruct, - layout2: BoundLayout<'a, PoseidonLoadInShortLayout, Val>, - global3: BufferRow, -) -> Result { - // PoseidonLoadInShort(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:174) - let x4: Val = arg1.load_tx_type._super._super; - // Log(:22) - // PoseidonLoadInShort(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:175) - invoke_extern!(ctx, log, "txnType", [x4]); - // PoseidonLoadInShort(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:176) - let x5: OneHot_3_Struct = exec_one_hot_3_(ctx, x4, (layout2.map(|c| c.tx_type)))?; - // PoseidonLoadInShort(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:174) - let x6: Val = arg1.buf_in_addr._super._super; - // PoseidonLoadInShort(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:177) - let x7: GetDataStruct8Array = map_layout( - [ - Val::new(0), - Val::new(1), - Val::new(2), - Val::new(3), - Val::new(4), - Val::new(5), - Val::new(6), - Val::new(7), - ], - (layout2.map(|c| c.load_list)), - |x8, x9| { - // PoseidonLoadInShort(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:178) - let x10: GetDataStruct = exec_memory_get(ctx, arg0, (x6 + x8), &x5, x9)?; - return Ok(x10); - }, - )?; - // ShiftPoly(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:159) - // PoseidonLoadInShort(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:180) - let x11: BoundLayout<_globalLayout, _> = bind_layout!(LAYOUT_GLOBAL, global3); - // ShiftPoly(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:160) - let x12: BoundLayout = (x11.map(|c| c.rng)); - let x13: NondetExtRegStruct = back_ext_reg(ctx, 0, x12)?; - let x14: ExtVal = x13._super; - // PolyEvalStateReduce(zirgen/circuit/rv32im/v2/dsl/poly.zir:14) - // PolyEval(zirgen/circuit/rv32im/v2/dsl/poly.zir:18) - // ShiftPoly(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:170) - let x15: ExtVal = (x14 * ExtVal::new(Val::new(1), Val::new(0), Val::new(0), Val::new(0))); - let x16: ExtVal = (x7[to_usize(Val::new(0))].diff_low - + ExtVal::new(Val::new(0), Val::new(0), Val::new(0), Val::new(0))); - let x17: ExtVal = (x15 * x14); - let x18: ExtVal = (x7[to_usize(Val::new(0))].diff_high - + ExtVal::new(Val::new(0), Val::new(0), Val::new(0), Val::new(0))); - let x19: ExtVal = (((x16 * ExtVal::new(Val::new(1), Val::new(0), Val::new(0), Val::new(0))) - + ExtVal::new(Val::new(0), Val::new(0), Val::new(0), Val::new(0))) - + (x18 * x15)); - let x20: ExtVal = (x17 * x14); - let x21: ExtVal = (x7[to_usize(Val::new(1))].diff_low - + ExtVal::new(Val::new(0), Val::new(0), Val::new(0), Val::new(0))); - let x22: ExtVal = (x20 * x14); - let x23: ExtVal = (x7[to_usize(Val::new(1))].diff_high - + ExtVal::new(Val::new(0), Val::new(0), Val::new(0), Val::new(0))); - let x24: ExtVal = (x22 * x14); - let x25: ExtVal = (x7[to_usize(Val::new(2))].diff_low - + ExtVal::new(Val::new(0), Val::new(0), Val::new(0), Val::new(0))); - let x26: ExtVal = (((x19 + (x21 * x17)) + (x23 * x20)) + (x25 * x22)); - let x27: ExtVal = (x24 * x14); - let x28: ExtVal = (x7[to_usize(Val::new(2))].diff_high - + ExtVal::new(Val::new(0), Val::new(0), Val::new(0), Val::new(0))); - let x29: ExtVal = (x27 * x14); - let x30: ExtVal = (x7[to_usize(Val::new(3))].diff_low - + ExtVal::new(Val::new(0), Val::new(0), Val::new(0), Val::new(0))); - let x31: ExtVal = (x29 * x14); - let x32: ExtVal = (x7[to_usize(Val::new(3))].diff_high - + ExtVal::new(Val::new(0), Val::new(0), Val::new(0), Val::new(0))); - let x33: ExtVal = (((x26 + (x28 * x24)) + (x30 * x27)) + (x32 * x29)); - let x34: ExtVal = (x31 * x14); - let x35: ExtVal = (x7[to_usize(Val::new(4))].diff_low - + ExtVal::new(Val::new(0), Val::new(0), Val::new(0), Val::new(0))); - let x36: ExtVal = (x34 * x14); - let x37: ExtVal = (x7[to_usize(Val::new(4))].diff_high - + ExtVal::new(Val::new(0), Val::new(0), Val::new(0), Val::new(0))); - let x38: ExtVal = (x36 * x14); - let x39: ExtVal = (x7[to_usize(Val::new(5))].diff_low - + ExtVal::new(Val::new(0), Val::new(0), Val::new(0), Val::new(0))); - let x40: ExtVal = (((x33 + (x35 * x31)) + (x37 * x34)) + (x39 * x36)); - let x41: ExtVal = (x38 * x14); - let x42: ExtVal = (x7[to_usize(Val::new(5))].diff_high - + ExtVal::new(Val::new(0), Val::new(0), Val::new(0), Val::new(0))); - let x43: ExtVal = (x41 * x14); - let x44: ExtVal = (x7[to_usize(Val::new(6))].diff_low - + ExtVal::new(Val::new(0), Val::new(0), Val::new(0), Val::new(0))); - let x45: ExtVal = (x43 * x14); - let x46: ExtVal = (x7[to_usize(Val::new(6))].diff_high - + ExtVal::new(Val::new(0), Val::new(0), Val::new(0), Val::new(0))); - let x47: ExtVal = (((x40 + (x42 * x38)) + (x44 * x41)) + (x46 * x43)); - let x48: ExtVal = (x7[to_usize(Val::new(7))].diff_low - + ExtVal::new(Val::new(0), Val::new(0), Val::new(0), Val::new(0))); - let x49: ExtVal = (x7[to_usize(Val::new(7))].diff_high - + ExtVal::new(Val::new(0), Val::new(0), Val::new(0), Val::new(0))); - // ShiftPoly(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:160) - let x50: NondetExtRegStruct = back_ext_reg(ctx, 0, x12)?; - let x51: ExtVal = x50._super; - // Pow(zirgen/circuit/rv32im/v2/dsl/poly.zir:10) - // ShiftPoly(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:171) - let x52: ExtVal = - (((x51 * ExtVal::new(Val::new(1), Val::new(0), Val::new(0), Val::new(0))) * x51) * x51); - let x53: ExtVal = (((x52 * x51) * x51) * x51); - let x54: ExtVal = (((x53 * x51) * x51) * x51); - let x55: ExtVal = (((x54 * x51) * x51) * x51); - let x56: ExtVal = (((x55 * x51) * x51) * x51); - let x57: ExtVal = (arg1.zcheck._super * (x56 * x51)); - // PoseidonLoadInShort(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:177) - let x58: ValU32Struct = x7[to_usize(Val::new(0))]._super; - let x59: Val = x58.high; - let x60: ValU32Struct = x7[to_usize(Val::new(1))]._super; - let x61: Val = x60.high; - let x62: ValU32Struct = x7[to_usize(Val::new(2))]._super; - let x63: Val = x62.high; - let x64: ValU32Struct = x7[to_usize(Val::new(3))]._super; - let x65: Val = x64.high; - let x66: ValU32Struct = x7[to_usize(Val::new(4))]._super; - let x67: Val = x66.high; - let x68: ValU32Struct = x7[to_usize(Val::new(5))]._super; - let x69: Val = x68.high; - let x70: ValU32Struct = x7[to_usize(Val::new(6))]._super; - let x71: Val = x70.high; - let x72: ValU32Struct = x7[to_usize(Val::new(7))]._super; - let x73: Val = x72.high; - // PoseidonLoadInShort(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:174) - let x74: RegStruct24Array = arg1.inner; - // PoseidonLoadInShort(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:182) - let x75: Val = x74[to_usize(Val::new(16))]._super._super; - let x76: Val = x74[to_usize(Val::new(17))]._super._super; - let x77: Val = x74[to_usize(Val::new(18))]._super._super; - let x78: Val = x74[to_usize(Val::new(19))]._super._super; - let x79: Val = x74[to_usize(Val::new(20))]._super._super; - let x80: Val = x74[to_usize(Val::new(21))]._super._super; - let x81: Val = x74[to_usize(Val::new(22))]._super._super; - let x82: Val = x74[to_usize(Val::new(23))]._super._super; - // GetDef(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:71) - // PoseidonLoadInShort(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:194) - let x83: Val = arg1.has_state._super._super; - let x84: Val = arg1.state_addr._super._super; - let x85: Val = arg1.buf_out_addr._super._super; - let x86: Val = arg1.is_elem._super._super; - let x87: Val = arg1.check_out._super._super; - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:42) - // MultiplyByMExt(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:61) - let x88: Val = (x58.low + x59); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:43) - let x89: Val = (x60.low + x61); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:44) - let x90: Val = ((x59 * Val::new(2)) + x89); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:45) - let x91: Val = ((x61 * Val::new(2)) + x88); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:46) - let x92: Val = ((x89 * Val::new(4)) + x91); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:47) - let x93: Val = ((x88 * Val::new(4)) + x90); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:48) - let x94: Val = (x91 + x93); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:49) - let x95: Val = (x90 + x92); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:42) - let x96: Val = (x62.low + x63); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:43) - let x97: Val = (x64.low + x65); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:44) - let x98: Val = ((x63 * Val::new(2)) + x97); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:45) - let x99: Val = ((x65 * Val::new(2)) + x96); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:46) - let x100: Val = ((x97 * Val::new(4)) + x99); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:47) - let x101: Val = ((x96 * Val::new(4)) + x98); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:48) - let x102: Val = (x99 + x101); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:49) - let x103: Val = (x98 + x100); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:42) - let x104: Val = (x66.low + x67); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:43) - let x105: Val = (x68.low + x69); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:44) - let x106: Val = ((x67 * Val::new(2)) + x105); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:45) - let x107: Val = ((x69 * Val::new(2)) + x104); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:46) - let x108: Val = ((x105 * Val::new(4)) + x107); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:47) - let x109: Val = ((x104 * Val::new(4)) + x106); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:48) - let x110: Val = (x107 + x109); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:49) - let x111: Val = (x106 + x108); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:42) - let x112: Val = (x70.low + x71); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:43) - let x113: Val = (x72.low + x73); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:44) - let x114: Val = ((x71 * Val::new(2)) + x113); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:45) - let x115: Val = ((x73 * Val::new(2)) + x112); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:46) - let x116: Val = ((x113 * Val::new(4)) + x115); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:47) - let x117: Val = ((x112 * Val::new(4)) + x114); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:48) - let x118: Val = (x115 + x117); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:49) - let x119: Val = (x114 + x116); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:42) - let x120: Val = (x75 + x76); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:43) - let x121: Val = (x77 + x78); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:44) - let x122: Val = ((x76 * Val::new(2)) + x121); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:45) - let x123: Val = ((x78 * Val::new(2)) + x120); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:46) - let x124: Val = ((x121 * Val::new(4)) + x123); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:47) - let x125: Val = ((x120 * Val::new(4)) + x122); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:48) - let x126: Val = (x123 + x125); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:49) - let x127: Val = (x122 + x124); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:42) - let x128: Val = (x79 + x80); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:43) - let x129: Val = (x81 + x82); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:44) - let x130: Val = ((x80 * Val::new(2)) + x129); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:45) - let x131: Val = ((x82 * Val::new(2)) + x128); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:46) - let x132: Val = ((x129 * Val::new(4)) + x131); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:47) - let x133: Val = ((x128 * Val::new(4)) + x130); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:48) - let x134: Val = (x131 + x133); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:49) - let x135: Val = (x130 + x132); - // ReduceVec4(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:54) - // MultiplyByMExt(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:64) - let x136: Val = (((x94 + x102) + x110) + x118); - let x137: Val = (((x93 + x101) + x109) + x117); - let x138: Val = (((x95 + x103) + x111) + x119); - let x139: Val = (((x92 + x100) + x108) + x116); - let x140: Val = ((x136 + x126) + x134); - let x141: Val = ((x137 + x125) + x133); - let x142: Val = ((x138 + x127) + x135); - let x143: Val = ((x139 + x124) + x132); - // PoseidonLoadInShort(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:174) - let x144: Val = arg1.count._super._super; - let x145: Val = arg1.mode._super._super; - // PoseidonLoadInShort(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:194) - let x146: PoseidonStateStruct = exec_poseidon_state( - ctx, - &PoseidonOpDefStruct { - has_state: x83, - state_addr: x84, - buf_out_addr: x85, - is_elem: x86, - check_out: x87, - load_tx_type: x4, - }, - Val::new(24), - Val::new(0), - (x6 + Val::new(8)), - x144, - x145, - &[ - (x94 + x140), - (x93 + x141), - (x95 + x142), - (x92 + x143), - (x102 + x140), - (x101 + x141), - (x103 + x142), - (x100 + x143), - (x110 + x140), - (x109 + x141), - (x111 + x142), - (x108 + x143), - (x118 + x140), - (x117 + x141), - (x119 + x142), - (x116 + x143), - (x126 + x140), - (x125 + x141), - (x127 + x142), - (x124 + x143), - (x134 + x140), - (x133 + x141), - (x135 + x142), - (x132 + x143), - ], - (x57 + ((x47 + (x48 * x45)) + (x49 * (x45 * x14)))), - (layout2.map(|c| c._super)), - )?; - return Ok(x146); -} -pub fn exec_poseidon_load_in_low<'a>( - ctx: &'a ExecContext, - arg0: &RegStruct, - arg1: &PoseidonStateStruct, - layout2: BoundLayout<'a, PoseidonLoadInLowLayout, Val>, - global3: BufferRow, -) -> Result { - // PoseidonLoadInLow(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:197) - let x4: Val = arg1.load_tx_type._super._super; - // Log(:22) - // PoseidonLoadInLow(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:198) - invoke_extern!(ctx, log, "txnType", [x4]); - // PoseidonLoadInLow(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:199) - let x5: OneHot_3_Struct = exec_one_hot_3_(ctx, x4, (layout2.map(|c| c.tx_type)))?; - // PoseidonLoadInLow(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:197) - let x6: Val = arg1.buf_in_addr._super._super; - // PoseidonLoadInLow(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:200) - let x7: GetDataStruct8Array = map_layout( - [ - Val::new(0), - Val::new(1), - Val::new(2), - Val::new(3), - Val::new(4), - Val::new(5), - Val::new(6), - Val::new(7), - ], - (layout2.map(|c| c.load_list)), - |x8, x9| { - // PoseidonLoadInLow(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:201) - let x10: GetDataStruct = exec_memory_get(ctx, arg0, (x6 + x8), &x5, x9)?; - return Ok(x10); - }, - )?; - // ShiftPoly(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:159) - // PoseidonLoadInLow(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:203) - let x11: BoundLayout<_globalLayout, _> = bind_layout!(LAYOUT_GLOBAL, global3); - // ShiftPoly(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:160) - let x12: BoundLayout = (x11.map(|c| c.rng)); - let x13: NondetExtRegStruct = back_ext_reg(ctx, 0, x12)?; - let x14: ExtVal = x13._super; - // PolyEvalStateReduce(zirgen/circuit/rv32im/v2/dsl/poly.zir:14) - // PolyEval(zirgen/circuit/rv32im/v2/dsl/poly.zir:18) - // ShiftPoly(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:170) - let x15: ExtVal = (x14 * ExtVal::new(Val::new(1), Val::new(0), Val::new(0), Val::new(0))); - let x16: ExtVal = (x7[to_usize(Val::new(0))].diff_low - + ExtVal::new(Val::new(0), Val::new(0), Val::new(0), Val::new(0))); - let x17: ExtVal = (x15 * x14); - let x18: ExtVal = (x7[to_usize(Val::new(0))].diff_high - + ExtVal::new(Val::new(0), Val::new(0), Val::new(0), Val::new(0))); - let x19: ExtVal = (((x16 * ExtVal::new(Val::new(1), Val::new(0), Val::new(0), Val::new(0))) - + ExtVal::new(Val::new(0), Val::new(0), Val::new(0), Val::new(0))) - + (x18 * x15)); - let x20: ExtVal = (x17 * x14); - let x21: ExtVal = (x7[to_usize(Val::new(1))].diff_low - + ExtVal::new(Val::new(0), Val::new(0), Val::new(0), Val::new(0))); - let x22: ExtVal = (x20 * x14); - let x23: ExtVal = (x7[to_usize(Val::new(1))].diff_high - + ExtVal::new(Val::new(0), Val::new(0), Val::new(0), Val::new(0))); - let x24: ExtVal = (x22 * x14); - let x25: ExtVal = (x7[to_usize(Val::new(2))].diff_low - + ExtVal::new(Val::new(0), Val::new(0), Val::new(0), Val::new(0))); - let x26: ExtVal = (((x19 + (x21 * x17)) + (x23 * x20)) + (x25 * x22)); - let x27: ExtVal = (x24 * x14); - let x28: ExtVal = (x7[to_usize(Val::new(2))].diff_high - + ExtVal::new(Val::new(0), Val::new(0), Val::new(0), Val::new(0))); - let x29: ExtVal = (x27 * x14); - let x30: ExtVal = (x7[to_usize(Val::new(3))].diff_low - + ExtVal::new(Val::new(0), Val::new(0), Val::new(0), Val::new(0))); - let x31: ExtVal = (x29 * x14); - let x32: ExtVal = (x7[to_usize(Val::new(3))].diff_high - + ExtVal::new(Val::new(0), Val::new(0), Val::new(0), Val::new(0))); - let x33: ExtVal = (((x26 + (x28 * x24)) + (x30 * x27)) + (x32 * x29)); - let x34: ExtVal = (x31 * x14); - let x35: ExtVal = (x7[to_usize(Val::new(4))].diff_low - + ExtVal::new(Val::new(0), Val::new(0), Val::new(0), Val::new(0))); - let x36: ExtVal = (x34 * x14); - let x37: ExtVal = (x7[to_usize(Val::new(4))].diff_high - + ExtVal::new(Val::new(0), Val::new(0), Val::new(0), Val::new(0))); - let x38: ExtVal = (x36 * x14); - let x39: ExtVal = (x7[to_usize(Val::new(5))].diff_low - + ExtVal::new(Val::new(0), Val::new(0), Val::new(0), Val::new(0))); - let x40: ExtVal = (((x33 + (x35 * x31)) + (x37 * x34)) + (x39 * x36)); - let x41: ExtVal = (x38 * x14); - let x42: ExtVal = (x7[to_usize(Val::new(5))].diff_high - + ExtVal::new(Val::new(0), Val::new(0), Val::new(0), Val::new(0))); - let x43: ExtVal = (x41 * x14); - let x44: ExtVal = (x7[to_usize(Val::new(6))].diff_low - + ExtVal::new(Val::new(0), Val::new(0), Val::new(0), Val::new(0))); - let x45: ExtVal = (x43 * x14); - let x46: ExtVal = (x7[to_usize(Val::new(6))].diff_high - + ExtVal::new(Val::new(0), Val::new(0), Val::new(0), Val::new(0))); - let x47: ExtVal = (((x40 + (x42 * x38)) + (x44 * x41)) + (x46 * x43)); - let x48: ExtVal = (x7[to_usize(Val::new(7))].diff_low - + ExtVal::new(Val::new(0), Val::new(0), Val::new(0), Val::new(0))); - let x49: ExtVal = (x7[to_usize(Val::new(7))].diff_high - + ExtVal::new(Val::new(0), Val::new(0), Val::new(0), Val::new(0))); - // ShiftPoly(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:160) - let x50: NondetExtRegStruct = back_ext_reg(ctx, 0, x12)?; - let x51: ExtVal = x50._super; - // Pow(zirgen/circuit/rv32im/v2/dsl/poly.zir:10) - // ShiftPoly(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:171) - let x52: ExtVal = - (((x51 * ExtVal::new(Val::new(1), Val::new(0), Val::new(0), Val::new(0))) * x51) * x51); - let x53: ExtVal = (((x52 * x51) * x51) * x51); - let x54: ExtVal = (((x53 * x51) * x51) * x51); - let x55: ExtVal = (((x54 * x51) * x51) * x51); - let x56: ExtVal = (((x55 * x51) * x51) * x51); - let x57: ExtVal = (arg1.zcheck._super * (x56 * x51)); - // PoseidonLoadInLow(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:200) - let x58: ValU32Struct = x7[to_usize(Val::new(0))]._super; - // PoseidonLoadInLow(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:206) - let x59: Val = ((x58.high * Val::new(65536)) + x58.low); - // PoseidonLoadInLow(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:200) - let x60: ValU32Struct = x7[to_usize(Val::new(1))]._super; - // PoseidonLoadInLow(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:206) - let x61: Val = ((x60.high * Val::new(65536)) + x60.low); - // PoseidonLoadInLow(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:200) - let x62: ValU32Struct = x7[to_usize(Val::new(2))]._super; - // PoseidonLoadInLow(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:206) - let x63: Val = ((x62.high * Val::new(65536)) + x62.low); - // PoseidonLoadInLow(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:200) - let x64: ValU32Struct = x7[to_usize(Val::new(3))]._super; - // PoseidonLoadInLow(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:206) - let x65: Val = ((x64.high * Val::new(65536)) + x64.low); - // PoseidonLoadInLow(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:200) - let x66: ValU32Struct = x7[to_usize(Val::new(4))]._super; - // PoseidonLoadInLow(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:206) - let x67: Val = ((x66.high * Val::new(65536)) + x66.low); - // PoseidonLoadInLow(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:200) - let x68: ValU32Struct = x7[to_usize(Val::new(5))]._super; - // PoseidonLoadInLow(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:206) - let x69: Val = ((x68.high * Val::new(65536)) + x68.low); - // PoseidonLoadInLow(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:200) - let x70: ValU32Struct = x7[to_usize(Val::new(6))]._super; - // PoseidonLoadInLow(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:206) - let x71: Val = ((x70.high * Val::new(65536)) + x70.low); - // PoseidonLoadInLow(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:200) - let x72: ValU32Struct = x7[to_usize(Val::new(7))]._super; - // PoseidonLoadInLow(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:206) - let x73: Val = ((x72.high * Val::new(65536)) + x72.low); - // PoseidonLoadInLow(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:197) - let x74: RegStruct24Array = arg1.inner; - // PoseidonLoadInLow(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:205) - let x75: Val = x74[to_usize(Val::new(8))]._super._super; - let x76: Val = x74[to_usize(Val::new(9))]._super._super; - let x77: Val = x74[to_usize(Val::new(10))]._super._super; - let x78: Val = x74[to_usize(Val::new(11))]._super._super; - let x79: Val = x74[to_usize(Val::new(12))]._super._super; - let x80: Val = x74[to_usize(Val::new(13))]._super._super; - let x81: Val = x74[to_usize(Val::new(14))]._super._super; - let x82: Val = x74[to_usize(Val::new(15))]._super._super; - let x83: Val = x74[to_usize(Val::new(16))]._super._super; - let x84: Val = x74[to_usize(Val::new(17))]._super._super; - let x85: Val = x74[to_usize(Val::new(18))]._super._super; - let x86: Val = x74[to_usize(Val::new(19))]._super._super; - let x87: Val = x74[to_usize(Val::new(20))]._super._super; - let x88: Val = x74[to_usize(Val::new(21))]._super._super; - let x89: Val = x74[to_usize(Val::new(22))]._super._super; - let x90: Val = x74[to_usize(Val::new(23))]._super._super; - // GetDef(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:71) - // PoseidonLoadInLow(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:211) - let x91: Val = arg1.has_state._super._super; - let x92: Val = arg1.state_addr._super._super; - let x93: Val = arg1.buf_out_addr._super._super; - let x94: Val = arg1.is_elem._super._super; - let x95: Val = arg1.check_out._super._super; - // PoseidonLoadInLow(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:197) - let x96: Val = arg1.count._super._super; - let x97: Val = arg1.mode._super._super; - // PoseidonLoadInLow(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:211) - let x98: PoseidonStateStruct = exec_poseidon_state( - ctx, - &PoseidonOpDefStruct { - has_state: x91, - state_addr: x92, - buf_out_addr: x93, - is_elem: x94, - check_out: x95, - load_tx_type: x4, - }, - Val::new(18), - Val::new(1), - (x6 + Val::new(8)), - x96, - x97, - &[ - x59, x61, x63, x65, x67, x69, x71, x73, x75, x76, x77, x78, x79, x80, x81, x82, x83, - x84, x85, x86, x87, x88, x89, x90, - ], - (x57 + ((x47 + (x48 * x45)) + (x49 * (x45 * x14)))), - (layout2.map(|c| c._super)), - )?; - return Ok(x98); -} -pub fn exec_poseidon_load_in_high<'a>( - ctx: &'a ExecContext, - arg0: &RegStruct, - arg1: &PoseidonStateStruct, - layout2: BoundLayout<'a, PoseidonLoadInHighLayout, Val>, - global3: BufferRow, -) -> Result { - // PoseidonLoadInHigh(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:214) - let x4: Val = arg1.load_tx_type._super._super; - // Log(:22) - // PoseidonLoadInHigh(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:215) - invoke_extern!(ctx, log, "txnType", [x4]); - // PoseidonLoadInHigh(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:216) - let x5: OneHot_3_Struct = exec_one_hot_3_(ctx, x4, (layout2.map(|c| c.tx_type)))?; - // PoseidonLoadInHigh(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:214) - let x6: Val = arg1.buf_in_addr._super._super; - // PoseidonLoadInHigh(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:217) - let x7: GetDataStruct8Array = map_layout( - [ - Val::new(0), - Val::new(1), - Val::new(2), - Val::new(3), - Val::new(4), - Val::new(5), - Val::new(6), - Val::new(7), - ], - (layout2.map(|c| c.load_list)), - |x8, x9| { - // PoseidonLoadInHigh(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:218) - let x10: GetDataStruct = exec_memory_get(ctx, arg0, (x6 + x8), &x5, x9)?; - return Ok(x10); - }, - )?; - // PoseidonLoadInHigh(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:214) - let x11: RegStruct24Array = arg1.inner; - // PoseidonLoadInHigh(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:221) - let x12: Val = x11[to_usize(Val::new(0))]._super._super; - let x13: Val = x11[to_usize(Val::new(1))]._super._super; - let x14: Val = x11[to_usize(Val::new(2))]._super._super; - let x15: Val = x11[to_usize(Val::new(3))]._super._super; - let x16: Val = x11[to_usize(Val::new(4))]._super._super; - let x17: Val = x11[to_usize(Val::new(5))]._super._super; - let x18: Val = x11[to_usize(Val::new(6))]._super._super; - let x19: Val = x11[to_usize(Val::new(7))]._super._super; - // PoseidonLoadInHigh(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:217) - let x20: ValU32Struct = x7[to_usize(Val::new(0))]._super; - // PoseidonLoadInHigh(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:222) - let x21: Val = ((x20.high * Val::new(65536)) + x20.low); - // PoseidonLoadInHigh(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:217) - let x22: ValU32Struct = x7[to_usize(Val::new(1))]._super; - // PoseidonLoadInHigh(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:222) - let x23: Val = ((x22.high * Val::new(65536)) + x22.low); - // PoseidonLoadInHigh(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:217) - let x24: ValU32Struct = x7[to_usize(Val::new(2))]._super; - // PoseidonLoadInHigh(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:222) - let x25: Val = ((x24.high * Val::new(65536)) + x24.low); - // PoseidonLoadInHigh(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:217) - let x26: ValU32Struct = x7[to_usize(Val::new(3))]._super; - // PoseidonLoadInHigh(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:222) - let x27: Val = ((x26.high * Val::new(65536)) + x26.low); - // PoseidonLoadInHigh(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:217) - let x28: ValU32Struct = x7[to_usize(Val::new(4))]._super; - // PoseidonLoadInHigh(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:222) - let x29: Val = ((x28.high * Val::new(65536)) + x28.low); - // PoseidonLoadInHigh(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:217) - let x30: ValU32Struct = x7[to_usize(Val::new(5))]._super; - // PoseidonLoadInHigh(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:222) - let x31: Val = ((x30.high * Val::new(65536)) + x30.low); - // PoseidonLoadInHigh(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:217) - let x32: ValU32Struct = x7[to_usize(Val::new(6))]._super; - // PoseidonLoadInHigh(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:222) - let x33: Val = ((x32.high * Val::new(65536)) + x32.low); - // PoseidonLoadInHigh(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:217) - let x34: ValU32Struct = x7[to_usize(Val::new(7))]._super; - // PoseidonLoadInHigh(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:222) - let x35: Val = ((x34.high * Val::new(65536)) + x34.low); - // PoseidonLoadInHigh(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:221) - let x36: Val = x11[to_usize(Val::new(16))]._super._super; - let x37: Val = x11[to_usize(Val::new(17))]._super._super; - let x38: Val = x11[to_usize(Val::new(18))]._super._super; - let x39: Val = x11[to_usize(Val::new(19))]._super._super; - let x40: Val = x11[to_usize(Val::new(20))]._super._super; - let x41: Val = x11[to_usize(Val::new(21))]._super._super; - let x42: Val = x11[to_usize(Val::new(22))]._super._super; - let x43: Val = x11[to_usize(Val::new(23))]._super._super; - // ShiftPoly(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:159) - // PoseidonLoadInHigh(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:227) - let x44: BoundLayout<_globalLayout, _> = bind_layout!(LAYOUT_GLOBAL, global3); - // ShiftPoly(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:160) - let x45: BoundLayout = (x44.map(|c| c.rng)); - let x46: NondetExtRegStruct = back_ext_reg(ctx, 0, x45)?; - let x47: ExtVal = x46._super; - // PolyEvalStateReduce(zirgen/circuit/rv32im/v2/dsl/poly.zir:14) - // PolyEval(zirgen/circuit/rv32im/v2/dsl/poly.zir:18) - // ShiftPoly(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:170) - let x48: ExtVal = (x47 * ExtVal::new(Val::new(1), Val::new(0), Val::new(0), Val::new(0))); - let x49: ExtVal = (x7[to_usize(Val::new(0))].diff_low - + ExtVal::new(Val::new(0), Val::new(0), Val::new(0), Val::new(0))); - let x50: ExtVal = (x48 * x47); - let x51: ExtVal = (x7[to_usize(Val::new(0))].diff_high - + ExtVal::new(Val::new(0), Val::new(0), Val::new(0), Val::new(0))); - let x52: ExtVal = (((x49 * ExtVal::new(Val::new(1), Val::new(0), Val::new(0), Val::new(0))) - + ExtVal::new(Val::new(0), Val::new(0), Val::new(0), Val::new(0))) - + (x51 * x48)); - let x53: ExtVal = (x50 * x47); - let x54: ExtVal = (x7[to_usize(Val::new(1))].diff_low - + ExtVal::new(Val::new(0), Val::new(0), Val::new(0), Val::new(0))); - let x55: ExtVal = (x53 * x47); - let x56: ExtVal = (x7[to_usize(Val::new(1))].diff_high - + ExtVal::new(Val::new(0), Val::new(0), Val::new(0), Val::new(0))); - let x57: ExtVal = (x55 * x47); - let x58: ExtVal = (x7[to_usize(Val::new(2))].diff_low - + ExtVal::new(Val::new(0), Val::new(0), Val::new(0), Val::new(0))); - let x59: ExtVal = (((x52 + (x54 * x50)) + (x56 * x53)) + (x58 * x55)); - let x60: ExtVal = (x57 * x47); - let x61: ExtVal = (x7[to_usize(Val::new(2))].diff_high - + ExtVal::new(Val::new(0), Val::new(0), Val::new(0), Val::new(0))); - let x62: ExtVal = (x60 * x47); - let x63: ExtVal = (x7[to_usize(Val::new(3))].diff_low - + ExtVal::new(Val::new(0), Val::new(0), Val::new(0), Val::new(0))); - let x64: ExtVal = (x62 * x47); - let x65: ExtVal = (x7[to_usize(Val::new(3))].diff_high - + ExtVal::new(Val::new(0), Val::new(0), Val::new(0), Val::new(0))); - let x66: ExtVal = (((x59 + (x61 * x57)) + (x63 * x60)) + (x65 * x62)); - let x67: ExtVal = (x64 * x47); - let x68: ExtVal = (x7[to_usize(Val::new(4))].diff_low - + ExtVal::new(Val::new(0), Val::new(0), Val::new(0), Val::new(0))); - let x69: ExtVal = (x67 * x47); - let x70: ExtVal = (x7[to_usize(Val::new(4))].diff_high - + ExtVal::new(Val::new(0), Val::new(0), Val::new(0), Val::new(0))); - let x71: ExtVal = (x69 * x47); - let x72: ExtVal = (x7[to_usize(Val::new(5))].diff_low - + ExtVal::new(Val::new(0), Val::new(0), Val::new(0), Val::new(0))); - let x73: ExtVal = (((x66 + (x68 * x64)) + (x70 * x67)) + (x72 * x69)); - let x74: ExtVal = (x71 * x47); - let x75: ExtVal = (x7[to_usize(Val::new(5))].diff_high - + ExtVal::new(Val::new(0), Val::new(0), Val::new(0), Val::new(0))); - let x76: ExtVal = (x74 * x47); - let x77: ExtVal = (x7[to_usize(Val::new(6))].diff_low - + ExtVal::new(Val::new(0), Val::new(0), Val::new(0), Val::new(0))); - let x78: ExtVal = (x76 * x47); - let x79: ExtVal = (x7[to_usize(Val::new(6))].diff_high - + ExtVal::new(Val::new(0), Val::new(0), Val::new(0), Val::new(0))); - let x80: ExtVal = (((x73 + (x75 * x71)) + (x77 * x74)) + (x79 * x76)); - let x81: ExtVal = (x7[to_usize(Val::new(7))].diff_low - + ExtVal::new(Val::new(0), Val::new(0), Val::new(0), Val::new(0))); - let x82: ExtVal = (x7[to_usize(Val::new(7))].diff_high - + ExtVal::new(Val::new(0), Val::new(0), Val::new(0), Val::new(0))); - // ShiftPoly(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:160) - let x83: NondetExtRegStruct = back_ext_reg(ctx, 0, x45)?; - let x84: ExtVal = x83._super; - // Pow(zirgen/circuit/rv32im/v2/dsl/poly.zir:10) - // ShiftPoly(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:171) - let x85: ExtVal = - (((x84 * ExtVal::new(Val::new(1), Val::new(0), Val::new(0), Val::new(0))) * x84) * x84); - let x86: ExtVal = (((x85 * x84) * x84) * x84); - let x87: ExtVal = (((x86 * x84) * x84) * x84); - let x88: ExtVal = (((x87 * x84) * x84) * x84); - let x89: ExtVal = (((x88 * x84) * x84) * x84); - let x90: ExtVal = (arg1.zcheck._super * (x89 * x84)); - // GetDef(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:71) - // PoseidonLoadInHigh(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:228) - let x91: Val = arg1.has_state._super._super; - let x92: Val = arg1.state_addr._super._super; - let x93: Val = arg1.buf_out_addr._super._super; - let x94: Val = arg1.is_elem._super._super; - let x95: Val = arg1.check_out._super._super; - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:42) - // MultiplyByMExt(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:61) - let x96: Val = (x12 + x13); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:43) - let x97: Val = (x14 + x15); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:44) - let x98: Val = ((x13 * Val::new(2)) + x97); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:45) - let x99: Val = ((x15 * Val::new(2)) + x96); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:46) - let x100: Val = ((x97 * Val::new(4)) + x99); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:47) - let x101: Val = ((x96 * Val::new(4)) + x98); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:48) - let x102: Val = (x99 + x101); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:49) - let x103: Val = (x98 + x100); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:42) - let x104: Val = (x16 + x17); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:43) - let x105: Val = (x18 + x19); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:44) - let x106: Val = ((x17 * Val::new(2)) + x105); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:45) - let x107: Val = ((x19 * Val::new(2)) + x104); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:46) - let x108: Val = ((x105 * Val::new(4)) + x107); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:47) - let x109: Val = ((x104 * Val::new(4)) + x106); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:48) - let x110: Val = (x107 + x109); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:49) - let x111: Val = (x106 + x108); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:42) - let x112: Val = (x21 + x23); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:43) - let x113: Val = (x25 + x27); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:44) - let x114: Val = ((x23 * Val::new(2)) + x113); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:45) - let x115: Val = ((x27 * Val::new(2)) + x112); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:46) - let x116: Val = ((x113 * Val::new(4)) + x115); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:47) - let x117: Val = ((x112 * Val::new(4)) + x114); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:48) - let x118: Val = (x115 + x117); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:49) - let x119: Val = (x114 + x116); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:42) - let x120: Val = (x29 + x31); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:43) - let x121: Val = (x33 + x35); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:44) - let x122: Val = ((x31 * Val::new(2)) + x121); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:45) - let x123: Val = ((x35 * Val::new(2)) + x120); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:46) - let x124: Val = ((x121 * Val::new(4)) + x123); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:47) - let x125: Val = ((x120 * Val::new(4)) + x122); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:48) - let x126: Val = (x123 + x125); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:49) - let x127: Val = (x122 + x124); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:42) - let x128: Val = (x36 + x37); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:43) - let x129: Val = (x38 + x39); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:44) - let x130: Val = ((x37 * Val::new(2)) + x129); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:45) - let x131: Val = ((x39 * Val::new(2)) + x128); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:46) - let x132: Val = ((x129 * Val::new(4)) + x131); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:47) - let x133: Val = ((x128 * Val::new(4)) + x130); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:48) - let x134: Val = (x131 + x133); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:49) - let x135: Val = (x130 + x132); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:42) - let x136: Val = (x40 + x41); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:43) - let x137: Val = (x42 + x43); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:44) - let x138: Val = ((x41 * Val::new(2)) + x137); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:45) - let x139: Val = ((x43 * Val::new(2)) + x136); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:46) - let x140: Val = ((x137 * Val::new(4)) + x139); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:47) - let x141: Val = ((x136 * Val::new(4)) + x138); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:48) - let x142: Val = (x139 + x141); - // MultiplyByCirculant(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:49) - let x143: Val = (x138 + x140); - // ReduceVec4(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:54) - // MultiplyByMExt(zirgen/circuit/rv32im/v2/dsl/poseidon2.zir:64) - let x144: Val = (((x102 + x110) + x118) + x126); - let x145: Val = (((x101 + x109) + x117) + x125); - let x146: Val = (((x103 + x111) + x119) + x127); - let x147: Val = (((x100 + x108) + x116) + x124); - let x148: Val = ((x144 + x134) + x142); - let x149: Val = ((x145 + x133) + x141); - let x150: Val = ((x146 + x135) + x143); - let x151: Val = ((x147 + x132) + x140); - // PoseidonLoadInHigh(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:214) - let x152: Val = arg1.count._super._super; - let x153: Val = arg1.mode._super._super; - // PoseidonLoadInHigh(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:228) - let x154: PoseidonStateStruct = exec_poseidon_state( - ctx, - &PoseidonOpDefStruct { - has_state: x91, - state_addr: x92, - buf_out_addr: x93, - is_elem: x94, - check_out: x95, - load_tx_type: x4, - }, - Val::new(24), - Val::new(0), - (x6 + Val::new(8)), - x152, - x153, - &[ - (x102 + x148), - (x101 + x149), - (x103 + x150), - (x100 + x151), - (x110 + x148), - (x109 + x149), - (x111 + x150), - (x108 + x151), - (x118 + x148), - (x117 + x149), - (x119 + x150), - (x116 + x151), - (x126 + x148), - (x125 + x149), - (x127 + x150), - (x124 + x151), - (x134 + x148), - (x133 + x149), - (x135 + x150), - (x132 + x151), - (x142 + x148), - (x141 + x149), - (x143 + x150), - (x140 + x151), - ], - (x90 + ((x80 + (x81 * x78)) + (x82 * (x78 * x47)))), - (layout2.map(|c| c._super)), - )?; - return Ok(x154); -} -pub fn exec_poseidon_load_in<'a>( - ctx: &'a ExecContext, - arg0: &RegStruct, - arg1: &PoseidonStateStruct, - layout2: BoundLayout<'a, PoseidonLoadInLayout, Val>, - global3: BufferRow, -) -> Result { - // PoseidonLoadIn(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:233) - let x4: BoundLayout = (layout2.map(|c| c._super)); - // PoseidonLoadIn(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:231) - let x5: Val = arg1.is_elem._super._super; - let x6: Val = arg1.sub_state._super._super; - // PoseidonLoadIn(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:233) - let x7: OneHot_3_Struct = exec_one_hot_3_(ctx, (x5 + x6), (layout2.map(|c| c._0)))?; - let x8: NondetRegStruct3Array = x7._super; - let x9: PoseidonStateStruct; - if is_true(x8[to_usize(Val::new(0))]._super) { - // PoseidonLoadIn(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:234) - let x10: PoseidonStateStruct = - exec_poseidon_load_in_short(ctx, arg0, arg1, (x4.map(|c| c.arm0)), global3)?; - x9 = x10; - } else if is_true(x8[to_usize(Val::new(1))]._super) { - // PoseidonLoadIn(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:235) - let x11: PoseidonStateStruct = - exec_poseidon_load_in_low(ctx, arg0, arg1, (x4.map(|c| c.arm1)), global3)?; - x9 = x11; - } else if is_true(x8[to_usize(Val::new(2))]._super) { - // PoseidonLoadIn(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:236) - let x12: PoseidonStateStruct = - exec_poseidon_load_in_high(ctx, arg0, arg1, (x4.map(|c| c.arm2)), global3)?; - x9 = x12; - } else { - bail!("Reached unreachable mux arm") - } // PoseidonLoadIn(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:233) - let x13: PoseidonStateStruct = back_poseidon_state(ctx, 0, (x4.map(|c| c._super)))?; - return Ok(x13); -} -pub fn exec_poseidon_ext_round<'a>( - ctx: &'a ExecContext, - arg0: &PoseidonStateStruct, - layout1: BoundLayout<'a, PoseidonExtRoundLayout, Val>, -) -> Result { - // PoseidonExtRound(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:240) - let x2: Val = arg0.sub_state._super._super; - // PoseidonExtRound(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:241) - let x3: NondetRegStruct = - exec_is_zero(ctx, (x2 - Val::new(3)), (layout1.map(|c| c.is_round3)))?; - // PoseidonExtRound(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:242) - let x4: NondetRegStruct = - exec_is_zero(ctx, (x2 - Val::new(7)), (layout1.map(|c| c.is_round7)))?; - // PoseidonExtRound(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:240) - let x5: Val = arg0.count._super._super; - // PoseidonExtRound(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:244) - let x6: NondetRegStruct = - exec_is_zero(ctx, (x5 - Val::new(1)), (layout1.map(|c| c.last_block)))?; - // PoseidonExtRound(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:242) - let x7: Val = x4._super; - // PoseidonExtRound(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:241) - let x8: Val = x3._super; - // PoseidonExtRound(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:248) - let x9: Val = ((Val::new(1) - x8) - x7); - // PoseidonExtRound(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:244) - let x10: Val = x6._super; - // PoseidonExtRound(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:248) - let x11: Val = - (((x8 * Val::new(25)) + (x9 * Val::new(24))) + ((x7 * (Val::new(1) - x10)) * Val::new(18))); - // PoseidonExtRound(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:240) - let x12: RegStruct24Array = arg0.inner; - let x13: Val = x12[to_usize(Val::new(0))]._super._super; - let x14: Val = x12[to_usize(Val::new(1))]._super._super; - let x15: Val = x12[to_usize(Val::new(2))]._super._super; - let x16: Val = x12[to_usize(Val::new(3))]._super._super; - let x17: Val = x12[to_usize(Val::new(4))]._super._super; - let x18: Val = x12[to_usize(Val::new(5))]._super._super; - let x19: Val = x12[to_usize(Val::new(6))]._super._super; - let x20: Val = x12[to_usize(Val::new(7))]._super._super; - let x21: Val = x12[to_usize(Val::new(8))]._super._super; - let x22: Val = x12[to_usize(Val::new(9))]._super._super; - let x23: Val = x12[to_usize(Val::new(10))]._super._super; - let x24: Val = x12[to_usize(Val::new(11))]._super._super; - let x25: Val = x12[to_usize(Val::new(12))]._super._super; - let x26: Val = x12[to_usize(Val::new(13))]._super._super; - let x27: Val = x12[to_usize(Val::new(14))]._super._super; - let x28: Val = x12[to_usize(Val::new(15))]._super._super; - let x29: Val = x12[to_usize(Val::new(16))]._super._super; - let x30: Val = x12[to_usize(Val::new(17))]._super._super; - let x31: Val = x12[to_usize(Val::new(18))]._super._super; - let x32: Val = x12[to_usize(Val::new(19))]._super._super; - let x33: Val = x12[to_usize(Val::new(20))]._super._super; - let x34: Val = x12[to_usize(Val::new(21))]._super._super; - let x35: Val = x12[to_usize(Val::new(22))]._super._super; - let x36: Val = x12[to_usize(Val::new(23))]._super._super; - // PoseidonExtRound(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:252) - let x37: MultiplyByMExtStruct = exec_do_ext_round_by_idx( - ctx, - &[ - x13, x14, x15, x16, x17, x18, x19, x20, x21, x22, x23, x24, x25, x26, x27, x28, x29, - x30, x31, x32, x33, x34, x35, x36, - ], - x2, - (layout1.map(|c| c.next_inner)), - )?; - // GetDef(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:71) - // PoseidonExtRound(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:253) - let x38: Val = arg0.has_state._super._super; - let x39: Val = arg0.state_addr._super._super; - let x40: Val = arg0.buf_out_addr._super._super; - let x41: Val = arg0.is_elem._super._super; - let x42: Val = arg0.check_out._super._super; - let x43: Val = arg0.load_tx_type._super._super; - // PoseidonExtRound(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:240) - let x44: Val = arg0.buf_in_addr._super._super; - let x45: Val = arg0.mode._super._super; - // PoseidonExtRound(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:252) - let x46: MultiplyByMExt_Super_SuperStruct24Array = x37._super; - let x47: Val24Array = [ - x46[to_usize(Val::new(0))]._super, - x46[to_usize(Val::new(1))]._super, - x46[to_usize(Val::new(2))]._super, - x46[to_usize(Val::new(3))]._super, - x46[to_usize(Val::new(4))]._super, - x46[to_usize(Val::new(5))]._super, - x46[to_usize(Val::new(6))]._super, - x46[to_usize(Val::new(7))]._super, - x46[to_usize(Val::new(8))]._super, - x46[to_usize(Val::new(9))]._super, - x46[to_usize(Val::new(10))]._super, - x46[to_usize(Val::new(11))]._super, - x46[to_usize(Val::new(12))]._super, - x46[to_usize(Val::new(13))]._super, - x46[to_usize(Val::new(14))]._super, - x46[to_usize(Val::new(15))]._super, - x46[to_usize(Val::new(16))]._super, - x46[to_usize(Val::new(17))]._super, - x46[to_usize(Val::new(18))]._super, - x46[to_usize(Val::new(19))]._super, - x46[to_usize(Val::new(20))]._super, - x46[to_usize(Val::new(21))]._super, - x46[to_usize(Val::new(22))]._super, - x46[to_usize(Val::new(23))]._super, - ]; - // PoseidonExtRound(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:253) - let x48: PoseidonStateStruct = exec_poseidon_state( - ctx, - &PoseidonOpDefStruct { - has_state: x38, - state_addr: x39, - buf_out_addr: x40, - is_elem: x41, - check_out: x42, - load_tx_type: x43, - }, - (x11 + ((x7 * x10) * Val::new(21))), - (x9 * (x2 + Val::new(1))), - x44, - (x5 - x7), - x45, - &x47, - arg0.zcheck._super, - (layout1.map(|c| c._super)), - )?; - return Ok(x48); -} -pub fn exec_poseidon_int_rounds<'a>( - ctx: &'a ExecContext, - arg0: &PoseidonStateStruct, - layout1: BoundLayout<'a, PoseidonIntRoundsLayout, Val>, -) -> Result { - // PoseidonIntRounds(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:256) - let x2: RegStruct24Array = arg0.inner; - let x3: Val = x2[to_usize(Val::new(0))]._super._super; - let x4: Val = x2[to_usize(Val::new(1))]._super._super; - let x5: Val = x2[to_usize(Val::new(2))]._super._super; - let x6: Val = x2[to_usize(Val::new(3))]._super._super; - let x7: Val = x2[to_usize(Val::new(4))]._super._super; - let x8: Val = x2[to_usize(Val::new(5))]._super._super; - let x9: Val = x2[to_usize(Val::new(6))]._super._super; - let x10: Val = x2[to_usize(Val::new(7))]._super._super; - let x11: Val = x2[to_usize(Val::new(8))]._super._super; - let x12: Val = x2[to_usize(Val::new(9))]._super._super; - let x13: Val = x2[to_usize(Val::new(10))]._super._super; - let x14: Val = x2[to_usize(Val::new(11))]._super._super; - let x15: Val = x2[to_usize(Val::new(12))]._super._super; - let x16: Val = x2[to_usize(Val::new(13))]._super._super; - let x17: Val = x2[to_usize(Val::new(14))]._super._super; - let x18: Val = x2[to_usize(Val::new(15))]._super._super; - let x19: Val = x2[to_usize(Val::new(16))]._super._super; - let x20: Val = x2[to_usize(Val::new(17))]._super._super; - let x21: Val = x2[to_usize(Val::new(18))]._super._super; - let x22: Val = x2[to_usize(Val::new(19))]._super._super; - let x23: Val = x2[to_usize(Val::new(20))]._super._super; - let x24: Val = x2[to_usize(Val::new(21))]._super._super; - let x25: Val = x2[to_usize(Val::new(22))]._super._super; - let x26: Val = x2[to_usize(Val::new(23))]._super._super; - // PoseidonIntRounds(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:257) - let x27: DoIntRoundsStruct = exec_do_int_rounds( - ctx, - &[ - x3, x4, x5, x6, x7, x8, x9, x10, x11, x12, x13, x14, x15, x16, x17, x18, x19, x20, x21, - x22, x23, x24, x25, x26, - ], - (layout1.map(|c| c.next_inner)), - )?; - // GetDef(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:71) - // PoseidonIntRounds(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:258) - let x28: Val = arg0.has_state._super._super; - let x29: Val = arg0.state_addr._super._super; - let x30: Val = arg0.buf_out_addr._super._super; - let x31: Val = arg0.is_elem._super._super; - let x32: Val = arg0.check_out._super._super; - let x33: Val = arg0.load_tx_type._super._super; - // PoseidonIntRounds(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:256) - let x34: Val = arg0.buf_in_addr._super._super; - let x35: Val = arg0.count._super._super; - let x36: Val = arg0.mode._super._super; - // PoseidonIntRounds(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:258) - let x37: PoseidonStateStruct = exec_poseidon_state( - ctx, - &PoseidonOpDefStruct { - has_state: x28, - state_addr: x29, - buf_out_addr: x30, - is_elem: x31, - check_out: x32, - load_tx_type: x33, - }, - Val::new(24), - Val::new(4), - x34, - x35, - x36, - &x27._super, - arg0.zcheck._super, - (layout1.map(|c| c._super)), - )?; - return Ok(x37); -} -pub fn exec_poseidon_check_out<'a>( - ctx: &'a ExecContext, - arg0: &RegStruct, - arg1: &PoseidonStateStruct, - layout2: BoundLayout<'a, PoseidonCheckOutLayout, Val>, -) -> Result { - // PoseidonCheckOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:261) - let x3: RegStruct24Array = arg1.inner; - let x4: Val = arg1.buf_out_addr._super._super; - // PoseidonCheckOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:262) - let x5: PoseidonCheckOut__0Struct8Array = map_layout( - [ - Val::new(0), - Val::new(1), - Val::new(2), - Val::new(3), - Val::new(4), - Val::new(5), - Val::new(6), - Val::new(7), - ], - (layout2.map(|c| c._1)), - |x6, x7| { - // PoseidonCheckOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:264) - let x8: ReadElemStruct = exec_read_elem(ctx, arg0, (x4 + x6), (x7.map(|c| c.goal)))?; - // PoseidonCheckOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:261) - let x9: Val = x3[to_usize(x6)]._super._super; - // PoseidonCheckOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:265) - eqz!( - (x8._super - x9), - "PoseidonCheckOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:265)" - ); - return Ok(PoseidonCheckOut__0Struct {}); - }, - )?; - // PoseidonCheckOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:261) - let x10: Val = arg1.load_tx_type._super._super; - // PoseidonCheckOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:267) - let x11: NondetRegStruct = exec_is_zero(ctx, x10, (layout2.map(|c| c.is_normal)))?; - let x12: Val = x11._super; - // PoseidonCheckOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:268) - let x13: Val = ((Val::new(1) - x12) * Val::new(22)); - // PoseidonCheckOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:261) - let x14: Val = arg1.has_state._super._super; - // PoseidonCheckOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:269) - let x15: Val = ((Val::new(1) - x14) * ((x12 * Val::new(32)) + x13)); - // PoseidonCheckOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:261) - let x16: ExtVal = arg1.zcheck._super; - // PoseidonCheckOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:274) - let x17: NondetExtRegStruct = - exec_nondet_ext_reg(ctx, inv_0(x16)?, (layout2.map(|c| c.ext_inv)))?; - // PoseidonCheckOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:275) - let x18: ExtVal = - ((x17._super * x16) - ExtVal::new(Val::new(1), Val::new(0), Val::new(0), Val::new(0))); - eqz!(x18, "loc(callsite(unknown at PoseidonCheckOut ( zirgen/circuit/rv32im/v2/dsl/inst_p2.zir :275:10)))"); - // GetDef(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:71) - // PoseidonCheckOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:276) - let x19: Val = arg1.state_addr._super._super; - let x20: Val = arg1.is_elem._super._super; - let x21: Val = arg1.check_out._super._super; - // PoseidonCheckOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:261) - let x22: Val = arg1.mode._super._super; - let x23: Val = x3[to_usize(Val::new(0))]._super._super; - let x24: Val = x3[to_usize(Val::new(1))]._super._super; - let x25: Val = x3[to_usize(Val::new(2))]._super._super; - let x26: Val = x3[to_usize(Val::new(3))]._super._super; - let x27: Val = x3[to_usize(Val::new(4))]._super._super; - let x28: Val = x3[to_usize(Val::new(5))]._super._super; - let x29: Val = x3[to_usize(Val::new(6))]._super._super; - let x30: Val = x3[to_usize(Val::new(7))]._super._super; - let x31: Val = x3[to_usize(Val::new(8))]._super._super; - let x32: Val = x3[to_usize(Val::new(9))]._super._super; - let x33: Val = x3[to_usize(Val::new(10))]._super._super; - let x34: Val = x3[to_usize(Val::new(11))]._super._super; - let x35: Val = x3[to_usize(Val::new(12))]._super._super; - let x36: Val = x3[to_usize(Val::new(13))]._super._super; - let x37: Val = x3[to_usize(Val::new(14))]._super._super; - let x38: Val = x3[to_usize(Val::new(15))]._super._super; - let x39: Val = x3[to_usize(Val::new(16))]._super._super; - let x40: Val = x3[to_usize(Val::new(17))]._super._super; - let x41: Val = x3[to_usize(Val::new(18))]._super._super; - let x42: Val = x3[to_usize(Val::new(19))]._super._super; - let x43: Val = x3[to_usize(Val::new(20))]._super._super; - let x44: Val = x3[to_usize(Val::new(21))]._super._super; - let x45: Val = x3[to_usize(Val::new(22))]._super._super; - let x46: Val = x3[to_usize(Val::new(23))]._super._super; - // PoseidonCheckOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:276) - let x47: PoseidonStateStruct = exec_poseidon_state( - ctx, - &PoseidonOpDefStruct { - has_state: x14, - state_addr: x19, - buf_out_addr: x4, - is_elem: x20, - check_out: x21, - load_tx_type: x10, - }, - ((x14 * Val::new(23)) + x15), - Val::new(0), - Val::new(0), - Val::new(0), - x22, - &[ - x23, x24, x25, x26, x27, x28, x29, x30, x31, x32, x33, x34, x35, x36, x37, x38, x39, - x40, x41, x42, x43, x44, x45, x46, - ], - ExtVal::new(Val::new(0), Val::new(0), Val::new(0), Val::new(0)), - (layout2.map(|c| c._super)), - )?; - return Ok(x47); -} -pub fn exec_poseidon_store_out<'a>( - ctx: &'a ExecContext, - arg0: &RegStruct, - arg1: &PoseidonStateStruct, - layout2: BoundLayout<'a, PoseidonStoreOutLayout, Val>, -) -> Result { - // PoseidonStoreOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:279) - let x3: RegStruct24Array = arg1.inner; - let x4: Val = arg1.buf_out_addr._super._super; - // PoseidonStoreOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:280) - let x5: PoseidonStoreOut__0Struct8Array = map_layout( - [ - Val::new(0), - Val::new(1), - Val::new(2), - Val::new(3), - Val::new(4), - Val::new(5), - Val::new(6), - Val::new(7), - ], - (layout2.map(|c| c._1)), - |x6, x7| { - // PoseidonStoreOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:279) - let x8: Val = x3[to_usize(x6)]._super._super; - // PoseidonStoreOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:282) - let x9: NondetRegStruct = - exec_nondet_u16_reg(ctx, bit_and(x8, Val::new(65535))?, (x7.map(|c| c.low)))?; - let x10: Val = x9._super; - // PoseidonStoreOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:283) - let x11: U16RegStruct = exec_u16_reg( - ctx, - ((x8 - x10) * Val::new(2013235201)), - (x7.map(|c| c.high)), - )?; - // PoseidonStoreOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:284) - let x12: MemoryWriteStruct = exec_memory_write( - ctx, - arg0, - (x4 + x6), - &ValU32Struct { - low: x10, - high: x11._super, - }, - (x7.map(|c| c._0)), - )?; - return Ok(PoseidonStoreOut__0Struct {}); - }, - )?; - // PoseidonStoreOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:279) - let x13: Val = arg1.load_tx_type._super._super; - // PoseidonStoreOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:286) - let x14: NondetRegStruct = exec_is_zero(ctx, x13, (layout2.map(|c| c.is_normal)))?; - let x15: Val = x14._super; - // PoseidonStoreOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:287) - let x16: Val = ((Val::new(1) - x15) * Val::new(22)); - // PoseidonStoreOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:279) - let x17: Val = arg1.has_state._super._super; - // PoseidonStoreOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:290) - let x18: Val = ((Val::new(1) - x17) * ((x15 * Val::new(32)) + x16)); - // PoseidonStoreOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:291) - let x19: ExtVal = inv_0(arg1.zcheck._super)?; - let x20: NondetExtRegStruct = exec_nondet_ext_reg(ctx, x19, (layout2.map(|c| c.ext_inv)))?; - // GetDef(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:71) - // PoseidonStoreOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:292) - let x21: Val = arg1.state_addr._super._super; - let x22: Val = arg1.is_elem._super._super; - let x23: Val = arg1.check_out._super._super; - // PoseidonStoreOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:279) - let x24: Val = arg1.mode._super._super; - let x25: Val = x3[to_usize(Val::new(0))]._super._super; - let x26: Val = x3[to_usize(Val::new(1))]._super._super; - let x27: Val = x3[to_usize(Val::new(2))]._super._super; - let x28: Val = x3[to_usize(Val::new(3))]._super._super; - let x29: Val = x3[to_usize(Val::new(4))]._super._super; - let x30: Val = x3[to_usize(Val::new(5))]._super._super; - let x31: Val = x3[to_usize(Val::new(6))]._super._super; - let x32: Val = x3[to_usize(Val::new(7))]._super._super; - let x33: Val = x3[to_usize(Val::new(8))]._super._super; - let x34: Val = x3[to_usize(Val::new(9))]._super._super; - let x35: Val = x3[to_usize(Val::new(10))]._super._super; - let x36: Val = x3[to_usize(Val::new(11))]._super._super; - let x37: Val = x3[to_usize(Val::new(12))]._super._super; - let x38: Val = x3[to_usize(Val::new(13))]._super._super; - let x39: Val = x3[to_usize(Val::new(14))]._super._super; - let x40: Val = x3[to_usize(Val::new(15))]._super._super; - let x41: Val = x3[to_usize(Val::new(16))]._super._super; - let x42: Val = x3[to_usize(Val::new(17))]._super._super; - let x43: Val = x3[to_usize(Val::new(18))]._super._super; - let x44: Val = x3[to_usize(Val::new(19))]._super._super; - let x45: Val = x3[to_usize(Val::new(20))]._super._super; - let x46: Val = x3[to_usize(Val::new(21))]._super._super; - let x47: Val = x3[to_usize(Val::new(22))]._super._super; - let x48: Val = x3[to_usize(Val::new(23))]._super._super; - // PoseidonStoreOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:292) - let x49: PoseidonStateStruct = exec_poseidon_state( - ctx, - &PoseidonOpDefStruct { - has_state: x17, - state_addr: x21, - buf_out_addr: x4, - is_elem: x22, - check_out: x23, - load_tx_type: x13, - }, - ((x17 * Val::new(23)) + x18), - Val::new(0), - Val::new(0), - Val::new(0), - x24, - &[ - x25, x26, x27, x28, x29, x30, x31, x32, x33, x34, x35, x36, x37, x38, x39, x40, x41, - x42, x43, x44, x45, x46, x47, x48, - ], - ExtVal::new(Val::new(0), Val::new(0), Val::new(0), Val::new(0)), - (layout2.map(|c| c._super)), - )?; - return Ok(x49); -} -pub fn exec_poseidon_do_out<'a>( - ctx: &'a ExecContext, - arg0: &RegStruct, - arg1: &PoseidonStateStruct, - layout2: BoundLayout<'a, PoseidonDoOutLayout, Val>, -) -> Result { - // PoseidonDoOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:296) - let x3: BoundLayout = (layout2.map(|c| c._super)); - // PoseidonDoOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:295) - let x4: Val = arg1.check_out._super._super; - // PoseidonDoOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:296) - let x5: BoundLayout = (x3.map(|c| c.arm0)); - let x6: BoundLayout = (((x5.map(|c| c._extra0)).map(|c| c.count)).map(|c| c._super)); - let x7: BoundLayout = (((x5.map(|c| c._extra1)).map(|c| c.count)).map(|c| c._super)); - let x8: BoundLayout = (((x5.map(|c| c._extra2)).map(|c| c.count)).map(|c| c._super)); - let x9: BoundLayout = (((x5.map(|c| c._extra3)).map(|c| c.count)).map(|c| c._super)); - let x10: BoundLayout = (((x5.map(|c| c._extra4)).map(|c| c.count)).map(|c| c._super)); - let x11: BoundLayout = (((x5.map(|c| c._extra5)).map(|c| c.count)).map(|c| c._super)); - let x12: BoundLayout = (((x5.map(|c| c._extra6)).map(|c| c.count)).map(|c| c._super)); - let x13: BoundLayout = (((x5.map(|c| c._extra7)).map(|c| c.count)).map(|c| c._super)); - let x14: BoundLayout = (((x5.map(|c| c._extra8)).map(|c| c.count)).map(|c| c._super)); - let x15: BoundLayout = (((x5.map(|c| c._extra9)).map(|c| c.count)).map(|c| c._super)); - let x16: BoundLayout = (((x5.map(|c| c._extra10)).map(|c| c.count)).map(|c| c._super)); - let x17: BoundLayout = (((x5.map(|c| c._extra11)).map(|c| c.count)).map(|c| c._super)); - let x18: BoundLayout = (((x5.map(|c| c._extra12)).map(|c| c.count)).map(|c| c._super)); - let x19: BoundLayout = (((x5.map(|c| c._extra13)).map(|c| c.count)).map(|c| c._super)); - let x20: BoundLayout = (((x5.map(|c| c._extra14)).map(|c| c.count)).map(|c| c._super)); - let x21: BoundLayout = (((x5.map(|c| c._extra15)).map(|c| c.count)).map(|c| c._super)); - let x22: PoseidonStateStruct; - if is_true(x4) { - let x23: PoseidonStateStruct = - exec_poseidon_check_out(ctx, arg0, arg1, (x5.map(|c| c._super)))?; - x6.store(ctx, Val::new(0)); - eqz!( - x6.load(ctx, 0), - "PoseidonDoOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:296)" - ); - x7.store(ctx, Val::new(0)); - eqz!( - x7.load(ctx, 0), - "PoseidonDoOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:296)" - ); - x8.store(ctx, Val::new(0)); - eqz!( - x8.load(ctx, 0), - "PoseidonDoOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:296)" - ); - x9.store(ctx, Val::new(0)); - eqz!( - x9.load(ctx, 0), - "PoseidonDoOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:296)" - ); - x10.store(ctx, Val::new(0)); - eqz!( - x10.load(ctx, 0), - "PoseidonDoOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:296)" - ); - x11.store(ctx, Val::new(0)); - eqz!( - x11.load(ctx, 0), - "PoseidonDoOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:296)" - ); - x12.store(ctx, Val::new(0)); - eqz!( - x12.load(ctx, 0), - "PoseidonDoOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:296)" - ); - x13.store(ctx, Val::new(0)); - eqz!( - x13.load(ctx, 0), - "PoseidonDoOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:296)" - ); - x14.store(ctx, Val::new(0)); - eqz!( - x14.load(ctx, 0), - "PoseidonDoOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:296)" - ); - x15.store(ctx, Val::new(0)); - eqz!( - x15.load(ctx, 0), - "PoseidonDoOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:296)" - ); - x16.store(ctx, Val::new(0)); - eqz!( - x16.load(ctx, 0), - "PoseidonDoOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:296)" - ); - x17.store(ctx, Val::new(0)); - eqz!( - x17.load(ctx, 0), - "PoseidonDoOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:296)" - ); - x18.store(ctx, Val::new(0)); - eqz!( - x18.load(ctx, 0), - "PoseidonDoOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:296)" - ); - x19.store(ctx, Val::new(0)); - eqz!( - x19.load(ctx, 0), - "PoseidonDoOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:296)" - ); - x20.store(ctx, Val::new(0)); - eqz!( - x20.load(ctx, 0), - "PoseidonDoOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:296)" - ); - x21.store(ctx, Val::new(0)); - eqz!( - x21.load(ctx, 0), - "PoseidonDoOut(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:296)" - ); - x22 = x23; - } else if is_true((Val::new(1) - x4)) { - let x24: PoseidonStateStruct = - exec_poseidon_store_out(ctx, arg0, arg1, (x3.map(|c| c.arm1)))?; - x22 = x24; - } else { - bail!("Reached unreachable mux arm") - } - let x25: PoseidonStateStruct = back_poseidon_state(ctx, 0, (x3.map(|c| c._super)))?; - return Ok(x25); -} -pub fn exec_poseidon_store_state<'a>( - ctx: &'a ExecContext, - arg0: &RegStruct, - arg1: &PoseidonStateStruct, - layout2: BoundLayout<'a, PoseidonStoreStateLayout, Val>, -) -> Result { - // PoseidonStoreState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:299) - let x3: RegStruct24Array = arg1.inner; - let x4: Val = arg1.state_addr._super._super; - // PoseidonStoreState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:300) - let x5: PoseidonStoreState__0Struct8Array = map_layout( - [ - Val::new(0), - Val::new(1), - Val::new(2), - Val::new(3), - Val::new(4), - Val::new(5), - Val::new(6), - Val::new(7), - ], - (layout2.map(|c| c._1)), - |x6, x7| { - // PoseidonStoreState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:299) - let x8: Val = x3[to_usize((x6 + Val::new(16)))]._super._super; - // PoseidonStoreState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:302) - let x9: NondetRegStruct = - exec_nondet_u16_reg(ctx, bit_and(x8, Val::new(65535))?, (x7.map(|c| c.low)))?; - let x10: Val = x9._super; - // PoseidonStoreState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:303) - let x11: U16RegStruct = exec_u16_reg( - ctx, - ((x8 - x10) * Val::new(2013235201)), - (x7.map(|c| c.high)), - )?; - // PoseidonStoreState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:304) - let x12: MemoryWriteStruct = exec_memory_write( - ctx, - arg0, - (x4 + x6), - &ValU32Struct { - low: x10, - high: x11._super, - }, - (x7.map(|c| c._0)), - )?; - return Ok(PoseidonStoreState__0Struct {}); - }, - )?; - // GetDef(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:71) - // PoseidonStoreState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:306) - let x13: Val = arg1.has_state._super._super; - let x14: Val = arg1.buf_out_addr._super._super; - let x15: Val = arg1.is_elem._super._super; - let x16: Val = arg1.check_out._super._super; - let x17: Val = arg1.load_tx_type._super._super; - // PoseidonStoreState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:299) - let x18: Val = arg1.mode._super._super; - let x19: Val = x3[to_usize(Val::new(0))]._super._super; - let x20: Val = x3[to_usize(Val::new(1))]._super._super; - let x21: Val = x3[to_usize(Val::new(2))]._super._super; - let x22: Val = x3[to_usize(Val::new(3))]._super._super; - let x23: Val = x3[to_usize(Val::new(4))]._super._super; - let x24: Val = x3[to_usize(Val::new(5))]._super._super; - let x25: Val = x3[to_usize(Val::new(6))]._super._super; - let x26: Val = x3[to_usize(Val::new(7))]._super._super; - let x27: Val = x3[to_usize(Val::new(8))]._super._super; - let x28: Val = x3[to_usize(Val::new(9))]._super._super; - let x29: Val = x3[to_usize(Val::new(10))]._super._super; - let x30: Val = x3[to_usize(Val::new(11))]._super._super; - let x31: Val = x3[to_usize(Val::new(12))]._super._super; - let x32: Val = x3[to_usize(Val::new(13))]._super._super; - let x33: Val = x3[to_usize(Val::new(14))]._super._super; - let x34: Val = x3[to_usize(Val::new(15))]._super._super; - let x35: Val = x3[to_usize(Val::new(16))]._super._super; - let x36: Val = x3[to_usize(Val::new(17))]._super._super; - let x37: Val = x3[to_usize(Val::new(18))]._super._super; - let x38: Val = x3[to_usize(Val::new(19))]._super._super; - let x39: Val = x3[to_usize(Val::new(20))]._super._super; - let x40: Val = x3[to_usize(Val::new(21))]._super._super; - let x41: Val = x3[to_usize(Val::new(22))]._super._super; - let x42: Val = x3[to_usize(Val::new(23))]._super._super; - // PoseidonStoreState(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:306) - let x43: PoseidonStateStruct = exec_poseidon_state( - ctx, - &PoseidonOpDefStruct { - has_state: x13, - state_addr: x4, - buf_out_addr: x14, - is_elem: x15, - check_out: x16, - load_tx_type: x17, - }, - Val::new(32), - Val::new(0), - Val::new(0), - Val::new(0), - x18, - &[ - x19, x20, x21, x22, x23, x24, x25, x26, x27, x28, x29, x30, x31, x32, x33, x34, x35, - x36, x37, x38, x39, x40, x41, x42, - ], - ExtVal::new(Val::new(0), Val::new(0), Val::new(0), Val::new(0)), - (layout2.map(|c| c._super)), - )?; - return Ok(x43); -} -pub fn exec_is_u24<'a>( - ctx: &'a ExecContext, - arg0: Val, - layout1: BoundLayout<'a, IsU24Layout, Val>, -) -> Result { - // IsU24(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:320) - let x2: NondetRegStruct = exec_nondet_u16_reg( - ctx, - bit_and(arg0, Val::new(65535))?, - (layout1.map(|c| c.low16)), - )?; - // IsU24(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:321) - let x3: U8RegStruct = exec_u8_reg( - ctx, - ((arg0 - x2._super) * Val::new(2013235201)), - (layout1.map(|c| c._0)), - )?; - return Ok(IsU24Struct {}); -} -pub fn exec_poseidon_paging_load_node<'a>( - ctx: &'a ExecContext, - arg0: &RegStruct, - arg1: Val, - layout2: BoundLayout<'a, PoseidonStateLayout, Val>, -) -> Result { - // PoseidonOpDef(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:8) - // PoseidonPagingLoadNode(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:325) - let x3: PoseidonOpDefStruct = PoseidonOpDefStruct { - has_state: Val::new(0), - state_addr: Val::new(0), - buf_out_addr: (Val::new(1140850688) - (arg1 * Val::new(8))), - is_elem: Val::new(1), - check_out: Val::new(1), - load_tx_type: Val::new(1), - }; - // NodeIdxToAddr(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:317) - // PoseidonPagingLoadNode(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:337) - let x4: Val = (((arg1 * Val::new(2)) + Val::new(1)) * Val::new(8)); - // PoseidonPagingLoadNode(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:333) - let x5: PoseidonStateStruct = exec_poseidon_state( - ctx, - &x3, - Val::new(18), - Val::new(0), - (Val::new(1140850688) - x4), - Val::new(1), - Val::new(0), - &[ - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - ], - ExtVal::new(Val::new(0), Val::new(0), Val::new(0), Val::new(0)), - layout2, - )?; - return Ok(x5); -} -pub fn exec_poseidon_paging_load_page<'a>( - ctx: &'a ExecContext, - arg0: &RegStruct, - arg1: Val, - layout2: BoundLayout<'a, PoseidonStateLayout, Val>, -) -> Result { - // PoseidonOpDef(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:8) - // PoseidonPagingLoadPage(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:347) - let x3: PoseidonOpDefStruct = PoseidonOpDefStruct { - has_state: Val::new(0), - state_addr: Val::new(0), - buf_out_addr: (Val::new(1140850688) - (arg1 * Val::new(8))), - is_elem: Val::new(0), - check_out: Val::new(1), - load_tx_type: Val::new(1), - }; - // PoseidonPagingLoadPage(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:355) - let x4: PoseidonStateStruct = exec_poseidon_state( - ctx, - &x3, - Val::new(18), - Val::new(0), - ((arg1 - Val::new(4194304)) * Val::new(256)), - Val::new(32), - Val::new(1), - &[ - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - ], - ExtVal::new(Val::new(0), Val::new(0), Val::new(0), Val::new(0)), - layout2, - )?; - return Ok(x4); -} -pub fn exec_poseidon_paging_load_done<'a>( - ctx: &'a ExecContext, - layout0: BoundLayout<'a, PoseidonStateLayout, Val>, -) -> Result { - // PoseidonPagingLoadDone(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:369) - let x1: PoseidonStateStruct = exec_poseidon_state( - ctx, - &PoseidonOpDefStruct { - has_state: Val::new(0), - state_addr: Val::new(0), - buf_out_addr: Val::new(1073741824), - is_elem: Val::new(0), - check_out: Val::new(0), - load_tx_type: Val::new(0), - }, - Val::new(1), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(2), - &[ - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - ], - ExtVal::new(Val::new(0), Val::new(0), Val::new(0), Val::new(0)), - layout0, - )?; - return Ok(x1); -} -pub fn exec_poseidon_paging_store_node<'a>( - ctx: &'a ExecContext, - arg0: &RegStruct, - arg1: Val, - layout2: BoundLayout<'a, PoseidonStateLayout, Val>, -) -> Result { - // PoseidonOpDef(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:8) - // PoseidonPagingStoreNode(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:373) - let x3: PoseidonOpDefStruct = PoseidonOpDefStruct { - has_state: Val::new(0), - state_addr: Val::new(0), - buf_out_addr: (Val::new(1140850688) - (arg1 * Val::new(8))), - is_elem: Val::new(1), - check_out: Val::new(0), - load_tx_type: Val::new(2), - }; - // NodeIdxToAddr(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:317) - // PoseidonPagingStoreNode(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:385) - let x4: Val = (((arg1 * Val::new(2)) + Val::new(1)) * Val::new(8)); - // PoseidonPagingStoreNode(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:381) - let x5: PoseidonStateStruct = exec_poseidon_state( - ctx, - &x3, - Val::new(18), - Val::new(0), - (Val::new(1140850688) - x4), - Val::new(1), - Val::new(4), - &[ - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - ], - ExtVal::new(Val::new(0), Val::new(0), Val::new(0), Val::new(0)), - layout2, - )?; - return Ok(x5); -} -pub fn exec_poseidon_paging_store_page<'a>( - ctx: &'a ExecContext, - arg0: &RegStruct, - arg1: Val, - layout2: BoundLayout<'a, PoseidonStateLayout, Val>, -) -> Result { - // PoseidonOpDef(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:8) - // PoseidonPagingStorePage(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:395) - let x3: PoseidonOpDefStruct = PoseidonOpDefStruct { - has_state: Val::new(0), - state_addr: Val::new(0), - buf_out_addr: (Val::new(1140850688) - (arg1 * Val::new(8))), - is_elem: Val::new(0), - check_out: Val::new(0), - load_tx_type: Val::new(2), - }; - // PoseidonPagingStorePage(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:403) - let x4: PoseidonStateStruct = exec_poseidon_state( - ctx, - &x3, - Val::new(18), - Val::new(0), - ((arg1 - Val::new(4194304)) * Val::new(256)), - Val::new(32), - Val::new(3), - &[ - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - ], - ExtVal::new(Val::new(0), Val::new(0), Val::new(0), Val::new(0)), - layout2, - )?; - return Ok(x4); -} -pub fn exec_poseidon_paging_store_done<'a>( - ctx: &'a ExecContext, - layout0: BoundLayout<'a, PoseidonStateLayout, Val>, -) -> Result { - // PoseidonPagingStoreDone(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:417) - let x1: PoseidonStateStruct = exec_poseidon_state( - ctx, - &PoseidonOpDefStruct { - has_state: Val::new(0), - state_addr: Val::new(0), - buf_out_addr: Val::new(1140850688), - is_elem: Val::new(0), - check_out: Val::new(0), - load_tx_type: Val::new(0), - }, - Val::new(5), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(5), - &[ - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - Val::new(0), - ], - ExtVal::new(Val::new(0), Val::new(0), Val::new(0), Val::new(0)), - layout0, - )?; - return Ok(x1); -} -pub fn exec_one_hot_6_<'a>( - ctx: &'a ExecContext, - arg0: Val, - layout1: BoundLayout<'a, OneHot_6_Layout, Val>, -) -> Result { - // OneHot(zirgen/circuit/rv32im/v2/dsl/one_hot.zir:7) - let x2: NondetRegStruct6Array = map_layout( - [ - Val::new(0), - Val::new(1), - Val::new(2), - Val::new(3), - Val::new(4), - Val::new(5), - ], - (layout1.map(|c| c._super)), - |x3, x4| { - let x5: NondetRegStruct = exec_nondet_bit_reg(ctx, isz((x3 - arg0))?, x4)?; - return Ok(x5); - }, - )?; - // OneHot(zirgen/circuit/rv32im/v2/dsl/one_hot.zir:9) - let x6: Val = x2[to_usize(Val::new(1))]._super; - let x7: Val = (x2[to_usize(Val::new(0))]._super + x6); - let x8: Val = x2[to_usize(Val::new(2))]._super; - let x9: Val = x2[to_usize(Val::new(3))]._super; - let x10: Val = x2[to_usize(Val::new(4))]._super; - let x11: Val = (((x7 + x8) + x9) + x10); - let x12: Val = x2[to_usize(Val::new(5))]._super; - eqz!( - ((x11 + x12) - Val::new(1)), - "OneHot(zirgen/circuit/rv32im/v2/dsl/one_hot.zir:9)" - ); - // OneHot(zirgen/circuit/rv32im/v2/dsl/one_hot.zir:11) - let x13: Val = (((x6 + (x8 * Val::new(2))) + (x9 * Val::new(3))) + (x10 * Val::new(4))); - eqz!( - ((x13 + (x12 * Val::new(5))) - arg0), - "OneHot(zirgen/circuit/rv32im/v2/dsl/one_hot.zir:11)" - ); - return Ok(OneHot_6_Struct { - _super: x2.clone(), - bits: x2, - }); -} -pub fn exec_poseidon_paging<'a>( - ctx: &'a ExecContext, - arg0: &RegStruct, - arg1: Val, - arg2: &PoseidonStateStruct, - layout3: BoundLayout<'a, PoseidonPagingLayout, Val>, -) -> Result { - // PoseidonPaging(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:428) - let x4: BoundLayout = (layout3.map(|c| c._3)); - // PoseidonPaging(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:435) - let x5: BoundLayout = (layout3.map(|c| c._super)); - // PoseidonPaging(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:420) - let x6: Val = arg2.buf_out_addr._super._super; - // Div(:19) - // NodeAddrToIdx(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:316) - // PoseidonPaging(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:421) - let x7: Val = ((Val::new(1140850688) - x6) * Val::new(1761607681)); - // nextPagingIdx(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:314) - // PoseidonPaging(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:422) - let (x8, x9) = invoke_extern!(ctx, next_paging_idx); - // PoseidonPaging(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:423) - let x10: NondetRegStruct = exec_nondet_reg(ctx, x8, (layout3.map(|c| c.cur_idx)))?; - // PoseidonPaging(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:424) - let x11: NondetRegStruct = exec_nondet_reg(ctx, x9, (layout3.map(|c| c.cur_mode)))?; - let x12: Val = x11._super; - // PoseidonPaging(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:425) - let x13: OneHot_6_Struct = exec_one_hot_6_(ctx, x12, (layout3.map(|c| c.mode_split)))?; - let x14: NondetRegStruct6Array = x13.bits; - // PoseidonPaging(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:426) - let x15: Val = (x14[to_usize(Val::new(0))]._super + x14[to_usize(Val::new(1))]._super); - let x16: Val = (x15 + x14[to_usize(Val::new(2))]._super); - // PoseidonPaging(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:423) - let x17: Val = x10._super; - // PoseidonPaging(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:427) - let x18: IsU24Struct = exec_is_u24(ctx, x17, (layout3.map(|c| c._0)))?; - // PoseidonPaging(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:428) - let x19: ComponentStruct = ComponentStruct {}; - let x20: ComponentStruct; - if is_true(x16) { - // PoseidonPaging(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:429) - let x21: IsU24Struct = exec_is_u24( - ctx, - (x17 - (x7 + Val::new(1))), - ((x4.map(|c| c.arm0)).map(|c| c._0)), - )?; - x20 = x19; - } else if is_true((Val::new(1) - x16)) { - // PoseidonPaging(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:431) - let x22: IsU24Struct = exec_is_u24( - ctx, - ((x7 - Val::new(1)) - x17), - ((x4.map(|c| c.arm1)).map(|c| c._0)), - )?; - x20 = x19; - } else { - bail!("Reached unreachable mux arm") - } // PoseidonPaging(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:434) - let x23: BitRegStruct = exec_bit_reg(ctx, (x12 - arg1), (layout3.map(|c| c._4)))?; - // PoseidonPaging(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:425) - let x24: NondetRegStruct6Array = x13._super; - let x25: PoseidonStateStruct; - if is_true(x24[to_usize(Val::new(0))]._super) { - // PoseidonPaging(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:436) - let x26: PoseidonStateStruct = - exec_poseidon_paging_load_node(ctx, arg0, x17, (x5.map(|c| c.arm0)))?; - x25 = x26; - } else if is_true(x24[to_usize(Val::new(1))]._super) { - // PoseidonPaging(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:437) - let x27: PoseidonStateStruct = - exec_poseidon_paging_load_page(ctx, arg0, x17, (x5.map(|c| c.arm1)))?; - x25 = x27; - } else if is_true(x24[to_usize(Val::new(2))]._super) { - // PoseidonPaging(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:438) - let x28: PoseidonStateStruct = exec_poseidon_paging_load_done(ctx, (x5.map(|c| c.arm2)))?; - x25 = x28; - } else if is_true(x24[to_usize(Val::new(3))]._super) { - // PoseidonPaging(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:439) - let x29: PoseidonStateStruct = - exec_poseidon_paging_store_page(ctx, arg0, x17, (x5.map(|c| c.arm3)))?; - x25 = x29; - } else if is_true(x24[to_usize(Val::new(4))]._super) { - // PoseidonPaging(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:440) - let x30: PoseidonStateStruct = - exec_poseidon_paging_store_node(ctx, arg0, x17, (x5.map(|c| c.arm4)))?; - x25 = x30; - } else if is_true(x24[to_usize(Val::new(5))]._super) { - // PoseidonPaging(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:441) - let x31: PoseidonStateStruct = exec_poseidon_paging_store_done(ctx, (x5.map(|c| c.arm5)))?; - x25 = x31; - } else { - bail!("Reached unreachable mux arm") - } // PoseidonPaging(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:435) - let x32: PoseidonStateStruct = back_poseidon_state(ctx, 0, (x5.map(|c| c._super)))?; - return Ok(x32); -} -pub fn exec_poseidon0<'a>( - ctx: &'a ExecContext, - arg0: &RegStruct, - arg1: &InstInputStruct, - layout2: BoundLayout<'a, Poseidon0Layout, Val>, - global3: BufferRow, -) -> Result { - // Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:446) - let x4: BoundLayout = (layout2.map(|c| c.state)); - // Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448) - let x5: BoundLayout = (layout2.map(|c| c.state_redef)); - // Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:445) - let x6: NondetRegStruct8Array = arg1.minor_onehot._super; - // Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448) - let x7: BoundLayout = (x5.map(|c| c.arm0)); - let x8: BoundLayout = (x5.map(|c| c.arm1)); - let x9: BoundLayout = (x5.map(|c| c.arm2)); - let x10: BoundLayout = (x5.map(|c| c.arm3)); - let x11: BoundLayout = (x5.map(|c| c.arm4)); - let x12: BoundLayout = (x5.map(|c| c.arm5)); - let x13: BoundLayout = (x5.map(|c| c.arm6)); - let x14: BoundLayout = (x5.map(|c| c.arm7)); - // Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:445) - let x15: ValU32Struct = arg1.pc_u32; - let x16: Val = arg1.mode; - // Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448) - let x17: BoundLayout = (((x7.map(|c| c._extra0)).map(|c| c.count)).map(|c| c._super)); - let x18: BoundLayout = (((x7.map(|c| c._extra1)).map(|c| c.count)).map(|c| c._super)); - let x19: BoundLayout = (((x7.map(|c| c._extra2)).map(|c| c.count)).map(|c| c._super)); - let x20: BoundLayout = (((x7.map(|c| c._extra3)).map(|c| c.count)).map(|c| c._super)); - let x21: BoundLayout = (((x7.map(|c| c._extra4)).map(|c| c.count)).map(|c| c._super)); - let x22: BoundLayout = (((x7.map(|c| c._extra5)).map(|c| c.count)).map(|c| c._super)); - let x23: BoundLayout = (((x7.map(|c| c._extra6)).map(|c| c.count)).map(|c| c._super)); - let x24: BoundLayout = (((x7.map(|c| c._extra7)).map(|c| c.count)).map(|c| c._super)); - let x25: BoundLayout = (((x7.map(|c| c._extra8)).map(|c| c.count)).map(|c| c._super)); - let x26: BoundLayout = (((x7.map(|c| c._extra9)).map(|c| c.count)).map(|c| c._super)); - let x27: BoundLayout = (((x7.map(|c| c._extra10)).map(|c| c.count)).map(|c| c._super)); - let x28: BoundLayout = (((x7.map(|c| c._extra11)).map(|c| c.count)).map(|c| c._super)); - let x29: BoundLayout = (((x7.map(|c| c._extra12)).map(|c| c.count)).map(|c| c._super)); - let x30: BoundLayout = (((x7.map(|c| c._extra13)).map(|c| c.count)).map(|c| c._super)); - let x31: BoundLayout = (((x7.map(|c| c._extra14)).map(|c| c.count)).map(|c| c._super)); - let x32: BoundLayout = (((x7.map(|c| c._extra15)).map(|c| c.count)).map(|c| c._super)); - let x33: BoundLayout = (((x7.map(|c| c._extra16)).map(|c| c.count)).map(|c| c._super)); - let x34: BoundLayout = (((x7.map(|c| c._extra17)).map(|c| c.count)).map(|c| c._super)); - let x35: BoundLayout = (((x7.map(|c| c._extra18)).map(|c| c.count)).map(|c| c._super)); - let x36: BoundLayout = (((x7.map(|c| c._extra19)).map(|c| c.count)).map(|c| c._super)); - let x37: BoundLayout = (((x7.map(|c| c._extra20)).map(|c| c.count)).map(|c| c._super)); - let x38: BoundLayout = (((x7.map(|c| c._extra21)).map(|c| c.count)).map(|c| c._super)); - let x39: BoundLayout = (((x7.map(|c| c._extra22)).map(|c| c.count)).map(|c| c._super)); - let x40: BoundLayout = (((x7.map(|c| c._extra23)).map(|c| c.count)).map(|c| c._super)); - let x41: BoundLayout = (((x7.map(|c| c._extra24)).map(|c| c.count)).map(|c| c._super)); - let x42: BoundLayout = (((x7.map(|c| c._extra25)).map(|c| c.count)).map(|c| c._super)); - let x43: BoundLayout = (((x7.map(|c| c._extra26)).map(|c| c.count)).map(|c| c._super)); - let x44: BoundLayout = (((x7.map(|c| c._extra27)).map(|c| c.count)).map(|c| c._super)); - let x45: BoundLayout = (((x7.map(|c| c._extra28)).map(|c| c.count)).map(|c| c._super)); - let x46: BoundLayout = (((x7.map(|c| c._extra29)).map(|c| c.count)).map(|c| c._super)); - let x47: BoundLayout = (((x8.map(|c| c._extra0)).map(|c| c.count)).map(|c| c._super)); - let x48: BoundLayout = (((x8.map(|c| c._extra1)).map(|c| c.count)).map(|c| c._super)); - let x49: BoundLayout = (((x8.map(|c| c._extra2)).map(|c| c.count)).map(|c| c._super)); - let x50: BoundLayout = (((x8.map(|c| c._extra3)).map(|c| c.count)).map(|c| c._super)); - let x51: BoundLayout = (((x8.map(|c| c._extra4)).map(|c| c.count)).map(|c| c._super)); - let x52: BoundLayout = (((x8.map(|c| c._extra5)).map(|c| c.count)).map(|c| c._super)); - let x53: BoundLayout = (((x8.map(|c| c._extra6)).map(|c| c.count)).map(|c| c._super)); - let x54: BoundLayout = (((x8.map(|c| c._extra7)).map(|c| c.count)).map(|c| c._super)); - let x55: BoundLayout = (((x8.map(|c| c._extra8)).map(|c| c.count)).map(|c| c._super)); - let x56: BoundLayout = (((x8.map(|c| c._extra9)).map(|c| c.count)).map(|c| c._super)); - let x57: BoundLayout = (((x8.map(|c| c._extra10)).map(|c| c.count)).map(|c| c._super)); - let x58: BoundLayout = (((x8.map(|c| c._extra11)).map(|c| c.count)).map(|c| c._super)); - let x59: BoundLayout = (((x8.map(|c| c._extra12)).map(|c| c.count)).map(|c| c._super)); - let x60: BoundLayout = (((x8.map(|c| c._extra13)).map(|c| c.count)).map(|c| c._super)); - let x61: BoundLayout = (((x8.map(|c| c._extra14)).map(|c| c.count)).map(|c| c._super)); - let x62: BoundLayout = (((x8.map(|c| c._extra15)).map(|c| c.count)).map(|c| c._super)); - let x63: BoundLayout = (((x8.map(|c| c._extra16)).map(|c| c.count)).map(|c| c._super)); - let x64: BoundLayout = (((x8.map(|c| c._extra17)).map(|c| c.count)).map(|c| c._super)); - let x65: BoundLayout = (((x9.map(|c| c._extra0)).map(|c| c.count)).map(|c| c._super)); - let x66: BoundLayout = (((x9.map(|c| c._extra1)).map(|c| c.count)).map(|c| c._super)); - let x67: BoundLayout = (((x9.map(|c| c._extra2)).map(|c| c.count)).map(|c| c._super)); - let x68: BoundLayout = (((x9.map(|c| c._extra3)).map(|c| c.count)).map(|c| c._super)); - let x69: BoundLayout = (((x9.map(|c| c._extra4)).map(|c| c.count)).map(|c| c._super)); - let x70: BoundLayout = (((x9.map(|c| c._extra5)).map(|c| c.count)).map(|c| c._super)); - let x71: BoundLayout = (((x9.map(|c| c._extra6)).map(|c| c.count)).map(|c| c._super)); - let x72: BoundLayout = (((x9.map(|c| c._extra7)).map(|c| c.count)).map(|c| c._super)); - let x73: BoundLayout = (((x9.map(|c| c._extra8)).map(|c| c.count)).map(|c| c._super)); - let x74: BoundLayout = (((x9.map(|c| c._extra9)).map(|c| c.count)).map(|c| c._super)); - let x75: BoundLayout = (((x9.map(|c| c._extra10)).map(|c| c.count)).map(|c| c._super)); - let x76: BoundLayout = (((x9.map(|c| c._extra11)).map(|c| c.count)).map(|c| c._super)); - let x77: BoundLayout = (((x9.map(|c| c._extra12)).map(|c| c.count)).map(|c| c._super)); - let x78: BoundLayout = (((x9.map(|c| c._extra13)).map(|c| c.count)).map(|c| c._super)); - let x79: BoundLayout = (((x9.map(|c| c._extra14)).map(|c| c.count)).map(|c| c._super)); - let x80: BoundLayout = (((x9.map(|c| c._extra15)).map(|c| c.count)).map(|c| c._super)); - let x81: BoundLayout = (((x9.map(|c| c._extra16)).map(|c| c.count)).map(|c| c._super)); - let x82: BoundLayout = (((x9.map(|c| c._extra17)).map(|c| c.count)).map(|c| c._super)); - let x83: BoundLayout = (((x10.map(|c| c._extra0)).map(|c| c.count)).map(|c| c._super)); - let x84: BoundLayout = (((x10.map(|c| c._extra1)).map(|c| c.count)).map(|c| c._super)); - let x85: BoundLayout = (((x10.map(|c| c._extra2)).map(|c| c.count)).map(|c| c._super)); - let x86: BoundLayout = (((x10.map(|c| c._extra3)).map(|c| c.count)).map(|c| c._super)); - let x87: BoundLayout = (((x10.map(|c| c._extra4)).map(|c| c.count)).map(|c| c._super)); - let x88: BoundLayout = (((x10.map(|c| c._extra5)).map(|c| c.count)).map(|c| c._super)); - let x89: BoundLayout = (((x10.map(|c| c._extra6)).map(|c| c.count)).map(|c| c._super)); - let x90: BoundLayout = (((x10.map(|c| c._extra7)).map(|c| c.count)).map(|c| c._super)); - let x91: BoundLayout = (((x10.map(|c| c._extra8)).map(|c| c.count)).map(|c| c._super)); - let x92: BoundLayout = (((x10.map(|c| c._extra9)).map(|c| c.count)).map(|c| c._super)); - let x93: BoundLayout = (((x10.map(|c| c._extra10)).map(|c| c.count)).map(|c| c._super)); - let x94: BoundLayout = (((x10.map(|c| c._extra11)).map(|c| c.count)).map(|c| c._super)); - let x95: BoundLayout = (((x10.map(|c| c._extra12)).map(|c| c.count)).map(|c| c._super)); - let x96: BoundLayout = (((x10.map(|c| c._extra13)).map(|c| c.count)).map(|c| c._super)); - let x97: BoundLayout = (((x10.map(|c| c._extra14)).map(|c| c.count)).map(|c| c._super)); - let x98: BoundLayout = (((x10.map(|c| c._extra15)).map(|c| c.count)).map(|c| c._super)); - let x99: BoundLayout = (((x10.map(|c| c._extra16)).map(|c| c.count)).map(|c| c._super)); - let x100: BoundLayout = - (((x10.map(|c| c._extra17)).map(|c| c.count)).map(|c| c._super)); - let x101: BoundLayout = - (((x10.map(|c| c._extra18)).map(|c| c.count)).map(|c| c._super)); - let x102: BoundLayout = - (((x10.map(|c| c._extra19)).map(|c| c.count)).map(|c| c._super)); - let x103: BoundLayout = - (((x10.map(|c| c._extra20)).map(|c| c.count)).map(|c| c._super)); - let x104: BoundLayout = - (((x10.map(|c| c._extra21)).map(|c| c.count)).map(|c| c._super)); - let x105: BoundLayout = - (((x10.map(|c| c._extra22)).map(|c| c.count)).map(|c| c._super)); - let x106: BoundLayout = - (((x10.map(|c| c._extra23)).map(|c| c.count)).map(|c| c._super)); - let x107: BoundLayout = - (((x10.map(|c| c._extra24)).map(|c| c.count)).map(|c| c._super)); - let x108: BoundLayout = - (((x10.map(|c| c._extra25)).map(|c| c.count)).map(|c| c._super)); - let x109: BoundLayout = - (((x10.map(|c| c._extra26)).map(|c| c.count)).map(|c| c._super)); - let x110: BoundLayout = - (((x10.map(|c| c._extra27)).map(|c| c.count)).map(|c| c._super)); - let x111: BoundLayout = - (((x10.map(|c| c._extra28)).map(|c| c.count)).map(|c| c._super)); - let x112: BoundLayout = - (((x10.map(|c| c._extra29)).map(|c| c.count)).map(|c| c._super)); - let x113: BoundLayout = - (((x10.map(|c| c._extra30)).map(|c| c.count)).map(|c| c._super)); - let x114: BoundLayout = - (((x10.map(|c| c._extra31)).map(|c| c.count)).map(|c| c._super)); - let x115: BoundLayout = - (((x10.map(|c| c._extra32)).map(|c| c.count)).map(|c| c._super)); - let x116: BoundLayout = - (((x10.map(|c| c._extra33)).map(|c| c.count)).map(|c| c._super)); - let x117: BoundLayout = - (((x10.map(|c| c._extra34)).map(|c| c.count)).map(|c| c._super)); - let x118: BoundLayout = - (((x10.map(|c| c._extra35)).map(|c| c.count)).map(|c| c._super)); - let x119: BoundLayout = - (((x10.map(|c| c._extra36)).map(|c| c.count)).map(|c| c._super)); - let x120: BoundLayout = - (((x10.map(|c| c._extra37)).map(|c| c.count)).map(|c| c._super)); - let x121: BoundLayout = - (((x10.map(|c| c._extra38)).map(|c| c.count)).map(|c| c._super)); - let x122: BoundLayout = - (((x10.map(|c| c._extra39)).map(|c| c.count)).map(|c| c._super)); - let x123: BoundLayout = - (((x10.map(|c| c._extra40)).map(|c| c.count)).map(|c| c._super)); - let x124: BoundLayout = - (((x10.map(|c| c._extra41)).map(|c| c.count)).map(|c| c._super)); - let x125: BoundLayout = (((x11.map(|c| c._extra0)).map(|c| c.count)).map(|c| c._super)); - let x126: BoundLayout = (((x11.map(|c| c._extra1)).map(|c| c.count)).map(|c| c._super)); - let x127: BoundLayout = (((x11.map(|c| c._extra2)).map(|c| c.count)).map(|c| c._super)); - let x128: BoundLayout = (((x11.map(|c| c._extra3)).map(|c| c.count)).map(|c| c._super)); - let x129: BoundLayout = (((x11.map(|c| c._extra4)).map(|c| c.count)).map(|c| c._super)); - let x130: BoundLayout = (((x11.map(|c| c._extra5)).map(|c| c.count)).map(|c| c._super)); - let x131: BoundLayout = (((x11.map(|c| c._extra6)).map(|c| c.count)).map(|c| c._super)); - let x132: BoundLayout = (((x11.map(|c| c._extra7)).map(|c| c.count)).map(|c| c._super)); - let x133: BoundLayout = (((x11.map(|c| c._extra8)).map(|c| c.count)).map(|c| c._super)); - let x134: BoundLayout = (((x11.map(|c| c._extra9)).map(|c| c.count)).map(|c| c._super)); - let x135: BoundLayout = - (((x11.map(|c| c._extra10)).map(|c| c.count)).map(|c| c._super)); - let x136: BoundLayout = - (((x11.map(|c| c._extra11)).map(|c| c.count)).map(|c| c._super)); - let x137: BoundLayout = - (((x11.map(|c| c._extra12)).map(|c| c.count)).map(|c| c._super)); - let x138: BoundLayout = - (((x11.map(|c| c._extra13)).map(|c| c.count)).map(|c| c._super)); - let x139: BoundLayout = - (((x11.map(|c| c._extra14)).map(|c| c.count)).map(|c| c._super)); - let x140: BoundLayout = - (((x11.map(|c| c._extra15)).map(|c| c.count)).map(|c| c._super)); - let x141: BoundLayout = - (((x11.map(|c| c._extra16)).map(|c| c.count)).map(|c| c._super)); - let x142: BoundLayout = - (((x11.map(|c| c._extra17)).map(|c| c.count)).map(|c| c._super)); - let x143: BoundLayout = - (((x11.map(|c| c._extra18)).map(|c| c.count)).map(|c| c._super)); - let x144: BoundLayout = - (((x11.map(|c| c._extra19)).map(|c| c.count)).map(|c| c._super)); - let x145: BoundLayout = - (((x11.map(|c| c._extra20)).map(|c| c.count)).map(|c| c._super)); - let x146: BoundLayout = - (((x11.map(|c| c._extra21)).map(|c| c.count)).map(|c| c._super)); - let x147: BoundLayout = - (((x11.map(|c| c._extra22)).map(|c| c.count)).map(|c| c._super)); - let x148: BoundLayout = - (((x11.map(|c| c._extra23)).map(|c| c.count)).map(|c| c._super)); - let x149: BoundLayout = - (((x11.map(|c| c._extra24)).map(|c| c.count)).map(|c| c._super)); - let x150: BoundLayout = - (((x11.map(|c| c._extra25)).map(|c| c.count)).map(|c| c._super)); - let x151: BoundLayout = - (((x11.map(|c| c._extra26)).map(|c| c.count)).map(|c| c._super)); - let x152: BoundLayout = - (((x11.map(|c| c._extra27)).map(|c| c.count)).map(|c| c._super)); - let x153: BoundLayout = - (((x11.map(|c| c._extra28)).map(|c| c.count)).map(|c| c._super)); - let x154: BoundLayout = - (((x11.map(|c| c._extra29)).map(|c| c.count)).map(|c| c._super)); - let x155: BoundLayout = - (((x11.map(|c| c._extra30)).map(|c| c.count)).map(|c| c._super)); - let x156: BoundLayout = - (((x11.map(|c| c._extra31)).map(|c| c.count)).map(|c| c._super)); - let x157: BoundLayout = - (((x11.map(|c| c._extra32)).map(|c| c.count)).map(|c| c._super)); - let x158: BoundLayout = - (((x11.map(|c| c._extra33)).map(|c| c.count)).map(|c| c._super)); - let x159: BoundLayout = - (((x11.map(|c| c._extra34)).map(|c| c.count)).map(|c| c._super)); - let x160: BoundLayout = - (((x11.map(|c| c._extra35)).map(|c| c.count)).map(|c| c._super)); - let x161: BoundLayout = - (((x11.map(|c| c._extra36)).map(|c| c.count)).map(|c| c._super)); - let x162: BoundLayout = - (((x11.map(|c| c._extra37)).map(|c| c.count)).map(|c| c._super)); - let x163: BoundLayout = - (((x11.map(|c| c._extra38)).map(|c| c.count)).map(|c| c._super)); - let x164: BoundLayout = - (((x11.map(|c| c._extra39)).map(|c| c.count)).map(|c| c._super)); - let x165: BoundLayout = - (((x11.map(|c| c._extra40)).map(|c| c.count)).map(|c| c._super)); - let x166: BoundLayout = - (((x11.map(|c| c._extra41)).map(|c| c.count)).map(|c| c._super)); - let x167: BoundLayout = (((x12.map(|c| c._extra0)).map(|c| c.count)).map(|c| c._super)); - let x168: BoundLayout = (((x12.map(|c| c._extra1)).map(|c| c.count)).map(|c| c._super)); - let x169: BoundLayout = (((x13.map(|c| c._extra0)).map(|c| c.count)).map(|c| c._super)); - let x170: BoundLayout = (((x13.map(|c| c._extra1)).map(|c| c.count)).map(|c| c._super)); - let x171: BoundLayout = (((x13.map(|c| c._extra2)).map(|c| c.count)).map(|c| c._super)); - let x172: BoundLayout = (((x13.map(|c| c._extra3)).map(|c| c.count)).map(|c| c._super)); - let x173: BoundLayout = (((x13.map(|c| c._extra4)).map(|c| c.count)).map(|c| c._super)); - let x174: BoundLayout = (((x13.map(|c| c._extra5)).map(|c| c.count)).map(|c| c._super)); - let x175: BoundLayout = (((x13.map(|c| c._extra6)).map(|c| c.count)).map(|c| c._super)); - let x176: BoundLayout = (((x13.map(|c| c._extra7)).map(|c| c.count)).map(|c| c._super)); - let x177: BoundLayout = (((x13.map(|c| c._extra8)).map(|c| c.count)).map(|c| c._super)); - let x178: BoundLayout = (((x13.map(|c| c._extra9)).map(|c| c.count)).map(|c| c._super)); - let x179: BoundLayout = - (((x13.map(|c| c._extra10)).map(|c| c.count)).map(|c| c._super)); - let x180: BoundLayout = - (((x13.map(|c| c._extra11)).map(|c| c.count)).map(|c| c._super)); - let x181: BoundLayout = - (((x13.map(|c| c._extra12)).map(|c| c.count)).map(|c| c._super)); - let x182: BoundLayout = - (((x13.map(|c| c._extra13)).map(|c| c.count)).map(|c| c._super)); - let x183: BoundLayout = - (((x13.map(|c| c._extra14)).map(|c| c.count)).map(|c| c._super)); - let x184: BoundLayout = - (((x13.map(|c| c._extra15)).map(|c| c.count)).map(|c| c._super)); - let x185: BoundLayout = - (((x13.map(|c| c._extra16)).map(|c| c.count)).map(|c| c._super)); - let x186: BoundLayout = - (((x13.map(|c| c._extra17)).map(|c| c.count)).map(|c| c._super)); - let x187: BoundLayout = - (((x13.map(|c| c._extra18)).map(|c| c.count)).map(|c| c._super)); - let x188: BoundLayout = - (((x13.map(|c| c._extra19)).map(|c| c.count)).map(|c| c._super)); - let x189: BoundLayout = - (((x13.map(|c| c._extra20)).map(|c| c.count)).map(|c| c._super)); - let x190: BoundLayout = - (((x13.map(|c| c._extra21)).map(|c| c.count)).map(|c| c._super)); - let x191: BoundLayout = - (((x13.map(|c| c._extra22)).map(|c| c.count)).map(|c| c._super)); - let x192: BoundLayout = - (((x13.map(|c| c._extra23)).map(|c| c.count)).map(|c| c._super)); - let x193: BoundLayout = - (((x13.map(|c| c._extra24)).map(|c| c.count)).map(|c| c._super)); - let x194: BoundLayout = - (((x13.map(|c| c._extra25)).map(|c| c.count)).map(|c| c._super)); - let x195: BoundLayout = - (((x13.map(|c| c._extra26)).map(|c| c.count)).map(|c| c._super)); - let x196: BoundLayout = - (((x13.map(|c| c._extra27)).map(|c| c.count)).map(|c| c._super)); - let x197: BoundLayout = - (((x13.map(|c| c._extra28)).map(|c| c.count)).map(|c| c._super)); - let x198: BoundLayout = - (((x13.map(|c| c._extra29)).map(|c| c.count)).map(|c| c._super)); - let x199: BoundLayout = - (((x13.map(|c| c._extra30)).map(|c| c.count)).map(|c| c._super)); - let x200: BoundLayout = - (((x13.map(|c| c._extra31)).map(|c| c.count)).map(|c| c._super)); - let x201: BoundLayout = - (((x13.map(|c| c._extra32)).map(|c| c.count)).map(|c| c._super)); - let x202: BoundLayout = - (((x13.map(|c| c._extra33)).map(|c| c.count)).map(|c| c._super)); - let x203: BoundLayout = - (((x13.map(|c| c._extra34)).map(|c| c.count)).map(|c| c._super)); - let x204: BoundLayout = - (((x13.map(|c| c._extra35)).map(|c| c.count)).map(|c| c._super)); - let x205: BoundLayout = - (((x13.map(|c| c._extra36)).map(|c| c.count)).map(|c| c._super)); - let x206: BoundLayout = - (((x13.map(|c| c._extra37)).map(|c| c.count)).map(|c| c._super)); - let x207: BoundLayout = (((x14.map(|c| c._extra0)).map(|c| c.count)).map(|c| c._super)); - let x208: BoundLayout = (((x14.map(|c| c._extra1)).map(|c| c.count)).map(|c| c._super)); - let x209: PoseidonStateStruct; - if is_true(x6[to_usize(Val::new(0))]._super) { - // Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:449) - let x210: PoseidonStateStruct = - exec_poseidon_entry(ctx, arg0, &x15, x16, (x7.map(|c| c._super)))?; - // Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448) - x17.store(ctx, Val::new(0)); - eqz!( - x17.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x18.store(ctx, Val::new(0)); - eqz!( - x18.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x19.store(ctx, Val::new(0)); - eqz!( - x19.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x20.store(ctx, Val::new(0)); - eqz!( - x20.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x21.store(ctx, Val::new(0)); - eqz!( - x21.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x22.store(ctx, Val::new(0)); - eqz!( - x22.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x23.store(ctx, Val::new(0)); - eqz!( - x23.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x24.store(ctx, Val::new(0)); - eqz!( - x24.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x25.store(ctx, Val::new(0)); - eqz!( - x25.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x26.store(ctx, Val::new(0)); - eqz!( - x26.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x27.store(ctx, Val::new(0)); - eqz!( - x27.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x28.store(ctx, Val::new(0)); - eqz!( - x28.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x29.store(ctx, Val::new(0)); - eqz!( - x29.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x30.store(ctx, Val::new(0)); - eqz!( - x30.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x31.store(ctx, Val::new(0)); - eqz!( - x31.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x32.store(ctx, Val::new(0)); - eqz!( - x32.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x33.store(ctx, Val::new(0)); - eqz!( - x33.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x34.store(ctx, Val::new(0)); - eqz!( - x34.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x35.store(ctx, Val::new(0)); - eqz!( - x35.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x36.store(ctx, Val::new(0)); - eqz!( - x36.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x37.store(ctx, Val::new(0)); - eqz!( - x37.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x38.store(ctx, Val::new(0)); - eqz!( - x38.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x39.store(ctx, Val::new(0)); - eqz!( - x39.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x40.store(ctx, Val::new(0)); - eqz!( - x40.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x41.store(ctx, Val::new(0)); - eqz!( - x41.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x42.store(ctx, Val::new(0)); - eqz!( - x42.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x43.store(ctx, Val::new(0)); - eqz!( - x43.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x44.store(ctx, Val::new(0)); - eqz!( - x44.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x45.store(ctx, Val::new(0)); - eqz!( - x45.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x46.store(ctx, Val::new(0)); - eqz!( - x46.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x209 = x210; - } else if is_true(x6[to_usize(Val::new(1))]._super) { - // Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:450) - let x211: PoseidonStateStruct = back_poseidon_state(ctx, 1, x4)?; - let x212: PoseidonStateStruct = - exec_poseidon_load_state(ctx, arg0, &x211, (x8.map(|c| c._super)))?; - // Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448) - x47.store(ctx, Val::new(0)); - eqz!( - x47.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x48.store(ctx, Val::new(0)); - eqz!( - x48.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x49.store(ctx, Val::new(0)); - eqz!( - x49.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x50.store(ctx, Val::new(0)); - eqz!( - x50.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x51.store(ctx, Val::new(0)); - eqz!( - x51.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x52.store(ctx, Val::new(0)); - eqz!( - x52.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x53.store(ctx, Val::new(0)); - eqz!( - x53.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x54.store(ctx, Val::new(0)); - eqz!( - x54.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x55.store(ctx, Val::new(0)); - eqz!( - x55.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x56.store(ctx, Val::new(0)); - eqz!( - x56.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x57.store(ctx, Val::new(0)); - eqz!( - x57.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x58.store(ctx, Val::new(0)); - eqz!( - x58.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x59.store(ctx, Val::new(0)); - eqz!( - x59.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x60.store(ctx, Val::new(0)); - eqz!( - x60.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x61.store(ctx, Val::new(0)); - eqz!( - x61.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x62.store(ctx, Val::new(0)); - eqz!( - x62.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x63.store(ctx, Val::new(0)); - eqz!( - x63.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x64.store(ctx, Val::new(0)); - eqz!( - x64.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x209 = x212; - } else if is_true(x6[to_usize(Val::new(2))]._super) { - // Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:451) - let x213: PoseidonStateStruct = back_poseidon_state(ctx, 1, x4)?; - let x214: PoseidonStateStruct = - exec_poseidon_load_in(ctx, arg0, &x213, (x9.map(|c| c._super)), global3)?; - // Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448) - x65.store(ctx, Val::new(0)); - eqz!( - x65.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x66.store(ctx, Val::new(0)); - eqz!( - x66.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x67.store(ctx, Val::new(0)); - eqz!( - x67.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x68.store(ctx, Val::new(0)); - eqz!( - x68.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x69.store(ctx, Val::new(0)); - eqz!( - x69.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x70.store(ctx, Val::new(0)); - eqz!( - x70.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x71.store(ctx, Val::new(0)); - eqz!( - x71.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x72.store(ctx, Val::new(0)); - eqz!( - x72.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x73.store(ctx, Val::new(0)); - eqz!( - x73.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x74.store(ctx, Val::new(0)); - eqz!( - x74.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x75.store(ctx, Val::new(0)); - eqz!( - x75.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x76.store(ctx, Val::new(0)); - eqz!( - x76.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x77.store(ctx, Val::new(0)); - eqz!( - x77.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x78.store(ctx, Val::new(0)); - eqz!( - x78.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x79.store(ctx, Val::new(0)); - eqz!( - x79.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x80.store(ctx, Val::new(0)); - eqz!( - x80.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x81.store(ctx, Val::new(0)); - eqz!( - x81.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x82.store(ctx, Val::new(0)); - eqz!( - x82.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x209 = x214; - } else if is_true(x6[to_usize(Val::new(3))]._super) { - // Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:452) - let x215: PoseidonStateStruct = exec_poseidon_invalid(ctx, (x10.map(|c| c._super)))?; - // Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448) - x83.store(ctx, Val::new(0)); - eqz!( - x83.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x84.store(ctx, Val::new(0)); - eqz!( - x84.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x85.store(ctx, Val::new(0)); - eqz!( - x85.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x86.store(ctx, Val::new(0)); - eqz!( - x86.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x87.store(ctx, Val::new(0)); - eqz!( - x87.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x88.store(ctx, Val::new(0)); - eqz!( - x88.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x89.store(ctx, Val::new(0)); - eqz!( - x89.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x90.store(ctx, Val::new(0)); - eqz!( - x90.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x91.store(ctx, Val::new(0)); - eqz!( - x91.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x92.store(ctx, Val::new(0)); - eqz!( - x92.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x93.store(ctx, Val::new(0)); - eqz!( - x93.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x94.store(ctx, Val::new(0)); - eqz!( - x94.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x95.store(ctx, Val::new(0)); - eqz!( - x95.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x96.store(ctx, Val::new(0)); - eqz!( - x96.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x97.store(ctx, Val::new(0)); - eqz!( - x97.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x98.store(ctx, Val::new(0)); - eqz!( - x98.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x99.store(ctx, Val::new(0)); - eqz!( - x99.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x100.store(ctx, Val::new(0)); - eqz!( - x100.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x101.store(ctx, Val::new(0)); - eqz!( - x101.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x102.store(ctx, Val::new(0)); - eqz!( - x102.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x103.store(ctx, Val::new(0)); - eqz!( - x103.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x104.store(ctx, Val::new(0)); - eqz!( - x104.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x105.store(ctx, Val::new(0)); - eqz!( - x105.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x106.store(ctx, Val::new(0)); - eqz!( - x106.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x107.store(ctx, Val::new(0)); - eqz!( - x107.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x108.store(ctx, Val::new(0)); - eqz!( - x108.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x109.store(ctx, Val::new(0)); - eqz!( - x109.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x110.store(ctx, Val::new(0)); - eqz!( - x110.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x111.store(ctx, Val::new(0)); - eqz!( - x111.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x112.store(ctx, Val::new(0)); - eqz!( - x112.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x113.store(ctx, Val::new(0)); - eqz!( - x113.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x114.store(ctx, Val::new(0)); - eqz!( - x114.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x115.store(ctx, Val::new(0)); - eqz!( - x115.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x116.store(ctx, Val::new(0)); - eqz!( - x116.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x117.store(ctx, Val::new(0)); - eqz!( - x117.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x118.store(ctx, Val::new(0)); - eqz!( - x118.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x119.store(ctx, Val::new(0)); - eqz!( - x119.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x120.store(ctx, Val::new(0)); - eqz!( - x120.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x121.store(ctx, Val::new(0)); - eqz!( - x121.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x122.store(ctx, Val::new(0)); - eqz!( - x122.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x123.store(ctx, Val::new(0)); - eqz!( - x123.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x124.store(ctx, Val::new(0)); - eqz!( - x124.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x209 = x215; - } else if is_true(x6[to_usize(Val::new(4))]._super) { - // Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:453) - let x216: PoseidonStateStruct = exec_poseidon_invalid(ctx, (x11.map(|c| c._super)))?; - // Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448) - x125.store(ctx, Val::new(0)); - eqz!( - x125.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x126.store(ctx, Val::new(0)); - eqz!( - x126.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x127.store(ctx, Val::new(0)); - eqz!( - x127.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x128.store(ctx, Val::new(0)); - eqz!( - x128.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x129.store(ctx, Val::new(0)); - eqz!( - x129.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x130.store(ctx, Val::new(0)); - eqz!( - x130.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x131.store(ctx, Val::new(0)); - eqz!( - x131.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x132.store(ctx, Val::new(0)); - eqz!( - x132.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x133.store(ctx, Val::new(0)); - eqz!( - x133.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x134.store(ctx, Val::new(0)); - eqz!( - x134.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x135.store(ctx, Val::new(0)); - eqz!( - x135.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x136.store(ctx, Val::new(0)); - eqz!( - x136.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x137.store(ctx, Val::new(0)); - eqz!( - x137.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x138.store(ctx, Val::new(0)); - eqz!( - x138.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x139.store(ctx, Val::new(0)); - eqz!( - x139.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x140.store(ctx, Val::new(0)); - eqz!( - x140.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x141.store(ctx, Val::new(0)); - eqz!( - x141.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x142.store(ctx, Val::new(0)); - eqz!( - x142.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x143.store(ctx, Val::new(0)); - eqz!( - x143.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x144.store(ctx, Val::new(0)); - eqz!( - x144.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x145.store(ctx, Val::new(0)); - eqz!( - x145.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x146.store(ctx, Val::new(0)); - eqz!( - x146.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x147.store(ctx, Val::new(0)); - eqz!( - x147.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x148.store(ctx, Val::new(0)); - eqz!( - x148.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x149.store(ctx, Val::new(0)); - eqz!( - x149.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x150.store(ctx, Val::new(0)); - eqz!( - x150.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x151.store(ctx, Val::new(0)); - eqz!( - x151.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x152.store(ctx, Val::new(0)); - eqz!( - x152.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x153.store(ctx, Val::new(0)); - eqz!( - x153.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x154.store(ctx, Val::new(0)); - eqz!( - x154.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x155.store(ctx, Val::new(0)); - eqz!( - x155.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x156.store(ctx, Val::new(0)); - eqz!( - x156.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x157.store(ctx, Val::new(0)); - eqz!( - x157.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x158.store(ctx, Val::new(0)); - eqz!( - x158.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x159.store(ctx, Val::new(0)); - eqz!( - x159.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x160.store(ctx, Val::new(0)); - eqz!( - x160.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x161.store(ctx, Val::new(0)); - eqz!( - x161.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x162.store(ctx, Val::new(0)); - eqz!( - x162.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x163.store(ctx, Val::new(0)); - eqz!( - x163.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x164.store(ctx, Val::new(0)); - eqz!( - x164.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x165.store(ctx, Val::new(0)); - eqz!( - x165.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x166.store(ctx, Val::new(0)); - eqz!( - x166.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x209 = x216; - } else if is_true(x6[to_usize(Val::new(5))]._super) { - // Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:454) - let x217: PoseidonStateStruct = back_poseidon_state(ctx, 1, x4)?; - let x218: PoseidonStateStruct = - exec_poseidon_do_out(ctx, arg0, &x217, (x12.map(|c| c._super)))?; - // Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448) - x167.store(ctx, Val::new(0)); - eqz!( - x167.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x168.store(ctx, Val::new(0)); - eqz!( - x168.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x209 = x218; - } else if is_true(x6[to_usize(Val::new(6))]._super) { - // Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:455) - let x219: PoseidonStateStruct = back_poseidon_state(ctx, 1, x4)?; - let x220: PoseidonStateStruct = - exec_poseidon_paging(ctx, arg0, x16, &x219, (x13.map(|c| c._super)))?; - // Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448) - x169.store(ctx, Val::new(0)); - eqz!( - x169.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x170.store(ctx, Val::new(0)); - eqz!( - x170.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x171.store(ctx, Val::new(0)); - eqz!( - x171.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x172.store(ctx, Val::new(0)); - eqz!( - x172.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x173.store(ctx, Val::new(0)); - eqz!( - x173.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x174.store(ctx, Val::new(0)); - eqz!( - x174.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x175.store(ctx, Val::new(0)); - eqz!( - x175.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x176.store(ctx, Val::new(0)); - eqz!( - x176.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x177.store(ctx, Val::new(0)); - eqz!( - x177.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x178.store(ctx, Val::new(0)); - eqz!( - x178.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x179.store(ctx, Val::new(0)); - eqz!( - x179.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x180.store(ctx, Val::new(0)); - eqz!( - x180.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x181.store(ctx, Val::new(0)); - eqz!( - x181.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x182.store(ctx, Val::new(0)); - eqz!( - x182.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x183.store(ctx, Val::new(0)); - eqz!( - x183.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x184.store(ctx, Val::new(0)); - eqz!( - x184.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x185.store(ctx, Val::new(0)); - eqz!( - x185.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x186.store(ctx, Val::new(0)); - eqz!( - x186.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x187.store(ctx, Val::new(0)); - eqz!( - x187.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x188.store(ctx, Val::new(0)); - eqz!( - x188.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x189.store(ctx, Val::new(0)); - eqz!( - x189.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x190.store(ctx, Val::new(0)); - eqz!( - x190.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x191.store(ctx, Val::new(0)); - eqz!( - x191.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x192.store(ctx, Val::new(0)); - eqz!( - x192.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x193.store(ctx, Val::new(0)); - eqz!( - x193.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x194.store(ctx, Val::new(0)); - eqz!( - x194.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x195.store(ctx, Val::new(0)); - eqz!( - x195.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x196.store(ctx, Val::new(0)); - eqz!( - x196.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x197.store(ctx, Val::new(0)); - eqz!( - x197.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x198.store(ctx, Val::new(0)); - eqz!( - x198.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x199.store(ctx, Val::new(0)); - eqz!( - x199.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x200.store(ctx, Val::new(0)); - eqz!( - x200.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x201.store(ctx, Val::new(0)); - eqz!( - x201.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x202.store(ctx, Val::new(0)); - eqz!( - x202.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x203.store(ctx, Val::new(0)); - eqz!( - x203.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x204.store(ctx, Val::new(0)); - eqz!( - x204.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x205.store(ctx, Val::new(0)); - eqz!( - x205.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x206.store(ctx, Val::new(0)); - eqz!( - x206.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x209 = x220; - } else if is_true(x6[to_usize(Val::new(7))]._super) { - // Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:456) - let x221: PoseidonStateStruct = back_poseidon_state(ctx, 1, x4)?; - let x222: PoseidonStateStruct = - exec_poseidon_store_state(ctx, arg0, &x221, (x14.map(|c| c._super)))?; - // Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448) - x207.store(ctx, Val::new(0)); - eqz!( - x207.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x208.store(ctx, Val::new(0)); - eqz!( - x208.load(ctx, 0), - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448)" - ); - x209 = x222; - } else { - bail!("Reached unreachable mux arm") - } // Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:445) - let x223: Val = arg0._super._super; - // GetDiffCount(zirgen/circuit/rv32im/v2/dsl/mem.zir:22) - // Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:458) - let x224: Val = invoke_extern!(ctx, get_diff_count, x223); - let x225: CycleArgStruct = exec_cycle_arg(ctx, neg_0(x224)?, x223, (layout2.map(|c| c.arg)))?; - // Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:460) - let x226: Val = (x225.cycle._super - x223); - eqz!( - x226, - "Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:460)" - ); - // Poseidon0(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:448) - let x227: PoseidonStateStruct = back_poseidon_state(ctx, 0, (x5.map(|c| c._super)))?; - let x228: Val = x227.next_state._super._super; - let x229: Val = x227.mode._super._super; - return Ok(InstOutputStruct { - new_pc: x15, - new_state: x228, - new_mode: x229, - }); -} -pub fn exec_poseidon1<'a>( - ctx: &'a ExecContext, - arg0: &RegStruct, - arg1: &InstInputStruct, - layout2: BoundLayout<'a, Poseidon1Layout, Val>, -) -> Result { - // Poseidon1(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:465) - let x3: BoundLayout = (layout2.map(|c| c.state)); - // Poseidon1(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:467) - let x4: BoundLayout = (layout2.map(|c| c.state_redef)); - // Poseidon1(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:464) - let x5: NondetRegStruct8Array = arg1.minor_onehot._super; - let x6: PoseidonStateStruct; - if is_true(x5[to_usize(Val::new(0))]._super) { - // Poseidon1(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:468) - let x7: PoseidonStateStruct = back_poseidon_state(ctx, 1, x3)?; - let x8: PoseidonStateStruct = exec_poseidon_ext_round(ctx, &x7, (x4.map(|c| c.arm0)))?; - x6 = x8; - } else if is_true(x5[to_usize(Val::new(1))]._super) { - // Poseidon1(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:469) - let x9: PoseidonStateStruct = back_poseidon_state(ctx, 1, x3)?; - let x10: PoseidonStateStruct = exec_poseidon_int_rounds(ctx, &x9, (x4.map(|c| c.arm1)))?; - x6 = x10; - } else if is_true(x5[to_usize(Val::new(2))]._super) { - // Poseidon1(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:470) - let x11: PoseidonStateStruct = exec_poseidon_invalid(ctx, (x4.map(|c| c.arm2)))?; - x6 = x11; - } else if is_true(x5[to_usize(Val::new(3))]._super) { - // Poseidon1(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:471) - let x12: PoseidonStateStruct = exec_poseidon_invalid(ctx, (x4.map(|c| c.arm3)))?; - x6 = x12; - } else if is_true(x5[to_usize(Val::new(4))]._super) { - // Poseidon1(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:472) - let x13: PoseidonStateStruct = exec_poseidon_invalid(ctx, (x4.map(|c| c.arm4)))?; - x6 = x13; - } else if is_true(x5[to_usize(Val::new(5))]._super) { - // Poseidon1(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:473) - let x14: PoseidonStateStruct = exec_poseidon_invalid(ctx, (x4.map(|c| c.arm5)))?; - x6 = x14; - } else if is_true(x5[to_usize(Val::new(6))]._super) { - // Poseidon1(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:474) - let x15: PoseidonStateStruct = exec_poseidon_invalid(ctx, (x4.map(|c| c.arm6)))?; - x6 = x15; - } else if is_true(x5[to_usize(Val::new(7))]._super) { - // Poseidon1(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:475) - let x16: PoseidonStateStruct = exec_poseidon_invalid(ctx, (x4.map(|c| c.arm7)))?; - x6 = x16; - } else { - bail!("Reached unreachable mux arm") - } // Poseidon1(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:464) - let x17: Val = arg0._super._super; - // GetDiffCount(zirgen/circuit/rv32im/v2/dsl/mem.zir:22) - // Poseidon1(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:477) - let x18: Val = invoke_extern!(ctx, get_diff_count, x17); - let x19: CycleArgStruct = exec_cycle_arg(ctx, neg_0(x18)?, x17, (layout2.map(|c| c.arg)))?; - // Poseidon1(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:479) - let x20: Val = (x19.cycle._super - x17); - eqz!( - x20, - "Poseidon1(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:479)" - ); - // Poseidon1(zirgen/circuit/rv32im/v2/dsl/inst_p2.zir:467) - let x21: PoseidonStateStruct = back_poseidon_state(ctx, 0, (x4.map(|c| c._super)))?; - let x22: Val = x21.next_state._super._super; - let x23: Val = x21.mode._super._super; - return Ok(InstOutputStruct { - new_pc: arg1.pc_u32, - new_state: x22, - new_mode: x23, - }); -} -pub fn exec_one_hot_11_<'a>( - ctx: &'a ExecContext, - arg0: Val, - layout1: BoundLayout<'a, OneHot_11_Layout, Val>, -) -> Result { - // OneHot(zirgen/circuit/rv32im/v2/dsl/one_hot.zir:7) - let x2: NondetRegStruct11Array = map_layout( - [ - Val::new(0), - Val::new(1), - Val::new(2), - Val::new(3), - Val::new(4), - Val::new(5), - Val::new(6), - Val::new(7), - Val::new(8), - Val::new(9), - Val::new(10), - ], - (layout1.map(|c| c._super)), - |x3, x4| { - let x5: NondetRegStruct = exec_nondet_bit_reg(ctx, isz((x3 - arg0))?, x4)?; - return Ok(x5); - }, - )?; - // OneHot(zirgen/circuit/rv32im/v2/dsl/one_hot.zir:9) - let x6: Val = x2[to_usize(Val::new(1))]._super; - let x7: Val = (x2[to_usize(Val::new(0))]._super + x6); - let x8: Val = x2[to_usize(Val::new(2))]._super; - let x9: Val = x2[to_usize(Val::new(3))]._super; - let x10: Val = x2[to_usize(Val::new(4))]._super; - let x11: Val = (((x7 + x8) + x9) + x10); - let x12: Val = x2[to_usize(Val::new(5))]._super; - let x13: Val = x2[to_usize(Val::new(6))]._super; - let x14: Val = x2[to_usize(Val::new(7))]._super; - let x15: Val = (((x11 + x12) + x13) + x14); - let x16: Val = x2[to_usize(Val::new(8))]._super; - let x17: Val = x2[to_usize(Val::new(9))]._super; - let x18: Val = x2[to_usize(Val::new(10))]._super; - let x19: Val = (((x15 + x16) + x17) + x18); - eqz!( - (x19 - Val::new(1)), - "OneHot(zirgen/circuit/rv32im/v2/dsl/one_hot.zir:9)" - ); - // OneHot(zirgen/circuit/rv32im/v2/dsl/one_hot.zir:11) - let x20: Val = (((x6 + (x8 * Val::new(2))) + (x9 * Val::new(3))) + (x10 * Val::new(4))); - let x21: Val = (((x20 + (x12 * Val::new(5))) + (x13 * Val::new(6))) + (x14 * Val::new(7))); - let x22: Val = (((x21 + (x16 * Val::new(8))) + (x17 * Val::new(9))) + (x18 * Val::new(10))); - eqz!( - (x22 - arg0), - "OneHot(zirgen/circuit/rv32im/v2/dsl/one_hot.zir:11)" - ); - return Ok(OneHot_11_Struct { _super: x2 }); -} -pub fn exec_top<'a>( - ctx: &'a ExecContext, - layout0: BoundLayout<'a, TopLayout, Val>, - global1: BufferRow, -) -> Result { - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:41) - let x2: BoundLayout = (layout0.map(|c| c.next_pc_low)); - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:42) - let x3: BoundLayout = (layout0.map(|c| c.next_pc_high)); - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:43) - let x4: BoundLayout = (layout0.map(|c| c.next_state_0)); - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:44) - let x5: BoundLayout = (layout0.map(|c| c.next_machine_mode)); - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:69) - let x6: BoundLayout = (layout0.map(|c| c.inst_result)); - // IsFirstCycle(zirgen/circuit/rv32im/v2/dsl/top.zir:17) - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:47) - let x7: Val = invoke_extern!(ctx, is_first_cycle_0); - let x8: NondetRegStruct = exec_nondet_reg(ctx, x7, (layout0.map(|c| c.is_first_cycle)))?; - // GetCycle(zirgen/circuit/rv32im/v2/dsl/top.zir:18) - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:48) - let x9: Val = invoke_extern!(ctx, get_cycle); - let x10: NondetRegStruct = exec_nondet_reg(ctx, x9, (layout0.map(|c| c.cycle_nd)))?; - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:49) - let x11: RegStruct = exec_reg(ctx, x10._super, (layout0.map(|c| c.cycle)))?; - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:47) - let x12: Val = x8._super; - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:52) - let x13: Val = (Val::new(1) - x12); - let x14: RegStruct = back_reg(ctx, 1, x2)?; - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:53) - let x15: RegStruct = back_reg(ctx, 1, x3)?; - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:56) - let x16: RegStruct = back_reg(ctx, 1, x4)?; - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:58) - let x17: RegStruct = back_reg(ctx, 1, x5)?; - // GetMajorMinor(zirgen/circuit/rv32im/v2/dsl/top.zir:25) - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:60) - let (x18, x19) = invoke_extern!(ctx, get_major_minor); - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:62) - let x20: NondetRegStruct = exec_nondet_reg(ctx, x18, (layout0.map(|c| c.major)))?; - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:63) - let x21: NondetRegStruct = exec_nondet_reg(ctx, x19, (layout0.map(|c| c.minor)))?; - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:62) - let x22: Val = x20._super; - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:63) - let x23: Val = x21._super; - // Log(:22) - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:64) - invoke_extern!(ctx, log, "Major/Minor = ", [x22, x23]); - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:49) - let x24: Val = x11._super._super; - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:66) - let x25: InstInputStruct = exec_inst_input( - ctx, - x24, - x22, - x23, - &ValU32Struct { - low: (x13 * x14._super._super), - high: (x13 * x15._super._super), - }, - (x13 * x16._super._super), - ((x13 * x17._super._super) + x12), - (layout0.map(|c| c.inst_input)), - )?; - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:68) - let x26: OneHot_11_Struct = exec_one_hot_11_(ctx, x22, (layout0.map(|c| c.major_onehot)))?; - let x27: NondetRegStruct11Array = x26._super; - let x28: InstOutputStruct; - if is_true(x27[to_usize(Val::new(0))]._super) { - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:70) - let x29: InstOutputStruct = exec_misc0(ctx, &x11, &x25, (x6.map(|c| c.arm0)))?; - x28 = x29; - } else if is_true(x27[to_usize(Val::new(1))]._super) { - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:71) - let x30: InstOutputStruct = exec_misc1(ctx, &x11, &x25, (x6.map(|c| c.arm1)))?; - x28 = x30; - } else if is_true(x27[to_usize(Val::new(2))]._super) { - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:72) - let x31: InstOutputStruct = exec_misc2(ctx, &x11, &x25, (x6.map(|c| c.arm2)))?; - x28 = x31; - } else if is_true(x27[to_usize(Val::new(3))]._super) { - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:73) - let x32: InstOutputStruct = exec_mul0(ctx, &x11, &x25, (x6.map(|c| c.arm3)))?; - x28 = x32; - } else if is_true(x27[to_usize(Val::new(4))]._super) { - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:74) - let x33: InstOutputStruct = exec_div0(ctx, &x11, &x25, (x6.map(|c| c.arm4)))?; - x28 = x33; - } else if is_true(x27[to_usize(Val::new(5))]._super) { - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:75) - let x34: InstOutputStruct = exec_mem0(ctx, &x11, &x25, (x6.map(|c| c.arm5)))?; - x28 = x34; - } else if is_true(x27[to_usize(Val::new(6))]._super) { - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:76) - let x35: InstOutputStruct = exec_mem1(ctx, &x11, &x25, (x6.map(|c| c.arm6)))?; - x28 = x35; - } else if is_true(x27[to_usize(Val::new(7))]._super) { - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:77) - let x36: InstOutputStruct = exec_control0(ctx, &x11, &x25, (x6.map(|c| c.arm7)), global1)?; - x28 = x36; - } else if is_true(x27[to_usize(Val::new(8))]._super) { - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:78) - let x37: InstOutputStruct = exec_e_call0(ctx, &x11, &x25, (x6.map(|c| c.arm8)), global1)?; - x28 = x37; - } else if is_true(x27[to_usize(Val::new(9))]._super) { - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:79) - let x38: InstOutputStruct = exec_poseidon0(ctx, &x11, &x25, (x6.map(|c| c.arm9)), global1)?; - x28 = x38; - } else if is_true(x27[to_usize(Val::new(10))]._super) { - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:80) - let x39: InstOutputStruct = exec_poseidon1(ctx, &x11, &x25, (x6.map(|c| c.arm10)))?; - x28 = x39; - } else { - bail!("Reached unreachable mux arm") - } // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:69) - let x40: ValU32Struct = x28.new_pc; - let x41: Val = x40.low; - let x42: Val = x40.high; - let x43: Val = x28.new_state; - let x44: Val = x28.new_mode; - // Log(:22) - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:84) - invoke_extern!( - ctx, - log, - "Cycle, pc, state, mm", - [ - x24, - ((x41 * Val::new(1509949441)) + (x42 * Val::new(16384))), - x43, - x44 - ] - ); - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:85) - let x45: RegStruct = exec_reg(ctx, x41, x2)?; - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:86) - let x46: RegStruct = exec_reg(ctx, x42, x3)?; - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:87) - let x47: RegStruct = exec_reg(ctx, x43, x4)?; - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:88) - let x48: RegStruct = exec_reg(ctx, x44, x5)?; - return Ok(TopStruct {}); -} -pub fn step_top<'a>( - ctx: &'a ExecContext, - data0: BufferRow, - global1: BufferRow, -) -> Result<()> { - // Top(zirgen/circuit/rv32im/v2/dsl/top.zir:27) - let x2: BoundLayout = bind_layout!(LAYOUT_TOP, data0); - let x3: TopStruct = exec_top(ctx, x2, global1)?; - return Ok(()); -} -pub fn exec_top_accum<'a>( - ctx: &'a ExecContext, - arg0: BoundLayout<'a, TopLayout, Val>, - layout1: BoundLayout<'a, LayoutAccumLayout, Val>, - mix2: BufferRow, -) -> Result { - // zirgen/dsl/passes/GenerateAccum.cpp:526 - let x3: BoundLayout<_mixLayout, _> = bind_layout!(LAYOUT_MIX, mix2); - // zirgen/dsl/passes/GenerateAccum.cpp:533 - let x4: BoundLayout<_accumLayout, _> = (x3.map(|c| c.randomness)); - // zirgen/dsl/passes/GenerateAccum.cpp:545 - let x5: BoundLayout = (arg0.map(|c| c.inst_result)); - // zirgen/dsl/passes/GenerateAccum.cpp:574 - let x6: BoundLayout = (x5.map(|c| c._selector)); - // zirgen/dsl/passes/GenerateAccum.cpp:602 - let x7: BoundLayout = (x5.map(|c| c.arm0)); - // zirgen/dsl/passes/GenerateAccum.cpp:604 - let x8: BoundLayout = (layout1.map(|c| c.columns)); - // zirgen/dsl/passes/GenerateAccum.cpp:53 - let x9: BoundLayout = ((x4.map(|c| c.arg_u16)).map(|c| c.val)); - let x10: BoundLayout = (x4.map(|c| c.memory_arg)); - let x11: BoundLayout = (x10.map(|c| c.addr)); - let x12: BoundLayout = (x10.map(|c| c.cycle)); - let x13: BoundLayout = (x10.map(|c| c.data_low)); - let x14: BoundLayout = (x10.map(|c| c.data_high)); - let x15: BoundLayout = ((x4.map(|c| c.cycle_arg)).map(|c| c.cycle)); - // zirgen/dsl/passes/GenerateAccum.cpp:83 - let x16: BoundLayout = (x4.map(|c| c._offset)); - // zirgen/dsl/passes/GenerateAccum.cpp:276 - let x17: BoundLayout = (x7.map(|c| c._super)); - let x18: BoundLayout = (x17.map(|c| c.write_data)); - let x19: BoundLayout = ((x18.map(|c| c.low16)).map(|c| c.arg)); - let x20: BoundLayout = ((x18.map(|c| c.high16)).map(|c| c.arg)); - let x21: BoundLayout = (x17.map(|c| c.pc_norm)); - let x22: BoundLayout = ((x21.map(|c| c.low16)).map(|c| c.arg)); - let x23: BoundLayout = ((x21.map(|c| c.high16)).map(|c| c.arg)); - let x24: BoundLayout = ((x17.map(|c| c._0)).map(|c| c._0)); - let x25: BoundLayout = (x24.map(|c| c.io)); - let x26: BoundLayout = (x25.map(|c| c.old_txn)); - let x27: BoundLayout = (x25.map(|c| c.new_txn)); - let x28: BoundLayout = (((x24.map(|c| c._0)).map(|c| c._0)).map(|c| c.arg)); - let x29: BoundLayout = (x7.map(|c| c.input)); - let x30: BoundLayout = (x29.map(|c| c.decoded)); - let x31: BoundLayout = (x30.map(|c| c.arg)); - let x32: BoundLayout = (x30.map(|c| c.pc_addr)); - let x33: BoundLayout = - (((x32.map(|c| c.upper_diff)).map(|c| c.ret)).map(|c| c.arg)); - let x34: BoundLayout = ((x32.map(|c| c.med14)).map(|c| c.arg)); - let x35: BoundLayout = (x30.map(|c| c.load_inst)); - let x36: BoundLayout = (x35.map(|c| c.io)); - let x37: BoundLayout = (x36.map(|c| c.old_txn)); - let x38: BoundLayout = (x36.map(|c| c.new_txn)); - let x39: BoundLayout = (((x35.map(|c| c._0)).map(|c| c._0)).map(|c| c.arg)); - let x40: BoundLayout = ((x29.map(|c| c.rs1)).map(|c| c._super)); - let x41: BoundLayout = (x40.map(|c| c.io)); - let x42: BoundLayout = (x41.map(|c| c.old_txn)); - let x43: BoundLayout = (x41.map(|c| c.new_txn)); - let x44: BoundLayout = (((x40.map(|c| c._0)).map(|c| c._0)).map(|c| c.arg)); - let x45: BoundLayout = ((x29.map(|c| c.rs2)).map(|c| c._super)); - let x46: BoundLayout = (x45.map(|c| c.io)); - let x47: BoundLayout = (x46.map(|c| c.old_txn)); - let x48: BoundLayout = (x46.map(|c| c.new_txn)); - let x49: BoundLayout = (((x45.map(|c| c._0)).map(|c| c._0)).map(|c| c.arg)); - let x50: BoundLayout = - ((x7.map(|c| c._arguments_misc0_misc_output)).map(|c| c.arg_u16)); - // zirgen/dsl/passes/GenerateAccum.cpp:624 - let x51: ComponentStruct = ComponentStruct {}; - // zirgen/dsl/passes/GenerateAccum.cpp:602 - let x52: BoundLayout = (x5.map(|c| c.arm1)); - // zirgen/dsl/passes/GenerateAccum.cpp:276 - let x53: BoundLayout = (x52.map(|c| c._super)); - let x54: BoundLayout = (x53.map(|c| c.write_data)); - let x55: BoundLayout = ((x54.map(|c| c.low16)).map(|c| c.arg)); - let x56: BoundLayout = ((x54.map(|c| c.high16)).map(|c| c.arg)); - let x57: BoundLayout = (x53.map(|c| c.pc_norm)); - let x58: BoundLayout = ((x57.map(|c| c.low16)).map(|c| c.arg)); - let x59: BoundLayout = ((x57.map(|c| c.high16)).map(|c| c.arg)); - let x60: BoundLayout = ((x53.map(|c| c._0)).map(|c| c._0)); - let x61: BoundLayout = (x60.map(|c| c.io)); - let x62: BoundLayout = (x61.map(|c| c.old_txn)); - let x63: BoundLayout = (x61.map(|c| c.new_txn)); - let x64: BoundLayout = (((x60.map(|c| c._0)).map(|c| c._0)).map(|c| c.arg)); - let x65: BoundLayout = (x52.map(|c| c.input)); - let x66: BoundLayout = (x65.map(|c| c.decoded)); - let x67: BoundLayout = (x66.map(|c| c.arg)); - let x68: BoundLayout = (x66.map(|c| c.pc_addr)); - let x69: BoundLayout = - (((x68.map(|c| c.upper_diff)).map(|c| c.ret)).map(|c| c.arg)); - let x70: BoundLayout = ((x68.map(|c| c.med14)).map(|c| c.arg)); - let x71: BoundLayout = (x66.map(|c| c.load_inst)); - let x72: BoundLayout = (x71.map(|c| c.io)); - let x73: BoundLayout = (x72.map(|c| c.old_txn)); - let x74: BoundLayout = (x72.map(|c| c.new_txn)); - let x75: BoundLayout = (((x71.map(|c| c._0)).map(|c| c._0)).map(|c| c.arg)); - let x76: BoundLayout = ((x65.map(|c| c.rs1)).map(|c| c._super)); - let x77: BoundLayout = (x76.map(|c| c.io)); - let x78: BoundLayout = (x77.map(|c| c.old_txn)); - let x79: BoundLayout = (x77.map(|c| c.new_txn)); - let x80: BoundLayout = (((x76.map(|c| c._0)).map(|c| c._0)).map(|c| c.arg)); - let x81: BoundLayout = ((x65.map(|c| c.rs2)).map(|c| c._super)); - let x82: BoundLayout = (x81.map(|c| c.io)); - let x83: BoundLayout = (x82.map(|c| c.old_txn)); - let x84: BoundLayout = (x82.map(|c| c.new_txn)); - let x85: BoundLayout = (((x81.map(|c| c._0)).map(|c| c._0)).map(|c| c.arg)); - let x86: BoundLayout = - ((x52.map(|c| c._arguments_misc1_misc_output)).map(|c| c.arg_u16)); - // zirgen/dsl/passes/GenerateAccum.cpp:602 - let x87: BoundLayout = (x5.map(|c| c.arm2)); - // zirgen/dsl/passes/GenerateAccum.cpp:276 - let x88: BoundLayout = (x87.map(|c| c._super)); - let x89: BoundLayout = (x88.map(|c| c.write_data)); - let x90: BoundLayout = ((x89.map(|c| c.low16)).map(|c| c.arg)); - let x91: BoundLayout = ((x89.map(|c| c.high16)).map(|c| c.arg)); - let x92: BoundLayout = (x88.map(|c| c.pc_norm)); - let x93: BoundLayout = ((x92.map(|c| c.low16)).map(|c| c.arg)); - let x94: BoundLayout = ((x92.map(|c| c.high16)).map(|c| c.arg)); - let x95: BoundLayout = ((x88.map(|c| c._0)).map(|c| c._0)); - let x96: BoundLayout = (x95.map(|c| c.io)); - let x97: BoundLayout = (x96.map(|c| c.old_txn)); - let x98: BoundLayout = (x96.map(|c| c.new_txn)); - let x99: BoundLayout = (((x95.map(|c| c._0)).map(|c| c._0)).map(|c| c.arg)); - let x100: BoundLayout = (x87.map(|c| c.input)); - let x101: BoundLayout = (x100.map(|c| c.decoded)); - let x102: BoundLayout = (x101.map(|c| c.arg)); - let x103: BoundLayout = (x101.map(|c| c.pc_addr)); - let x104: BoundLayout = - (((x103.map(|c| c.upper_diff)).map(|c| c.ret)).map(|c| c.arg)); - let x105: BoundLayout = ((x103.map(|c| c.med14)).map(|c| c.arg)); - let x106: BoundLayout = (x101.map(|c| c.load_inst)); - let x107: BoundLayout = (x106.map(|c| c.io)); - let x108: BoundLayout = (x107.map(|c| c.old_txn)); - let x109: BoundLayout = (x107.map(|c| c.new_txn)); - let x110: BoundLayout = - (((x106.map(|c| c._0)).map(|c| c._0)).map(|c| c.arg)); - let x111: BoundLayout = ((x100.map(|c| c.rs1)).map(|c| c._super)); - let x112: BoundLayout = (x111.map(|c| c.io)); - let x113: BoundLayout = (x112.map(|c| c.old_txn)); - let x114: BoundLayout = (x112.map(|c| c.new_txn)); - let x115: BoundLayout = - (((x111.map(|c| c._0)).map(|c| c._0)).map(|c| c.arg)); - let x116: BoundLayout = ((x100.map(|c| c.rs2)).map(|c| c._super)); - let x117: BoundLayout = (x116.map(|c| c.io)); - let x118: BoundLayout = (x117.map(|c| c.old_txn)); - let x119: BoundLayout = (x117.map(|c| c.new_txn)); - let x120: BoundLayout = - (((x116.map(|c| c._0)).map(|c| c._0)).map(|c| c.arg)); - let x121: BoundLayout = - ((x87.map(|c| c._arguments_misc2_misc_output)).map(|c| c.arg_u16)); - // zirgen/dsl/passes/GenerateAccum.cpp:602 - let x122: BoundLayout = (x5.map(|c| c.arm3)); - // zirgen/dsl/passes/GenerateAccum.cpp:53 - let x123: BoundLayout = ((x4.map(|c| c.arg_u8)).map(|c| c.val)); - // zirgen/dsl/passes/GenerateAccum.cpp:276 - let x124: BoundLayout = (x122.map(|c| c.input)); - let x125: BoundLayout = (x124.map(|c| c.decoded)); - let x126: BoundLayout = (x125.map(|c| c.arg)); - let x127: BoundLayout = (x125.map(|c| c.pc_addr)); - let x128: BoundLayout = - (((x127.map(|c| c.upper_diff)).map(|c| c.ret)).map(|c| c.arg)); - let x129: BoundLayout = ((x127.map(|c| c.med14)).map(|c| c.arg)); - let x130: BoundLayout = (x125.map(|c| c.load_inst)); - let x131: BoundLayout = (x130.map(|c| c.io)); - let x132: BoundLayout = (x131.map(|c| c.old_txn)); - let x133: BoundLayout = (x131.map(|c| c.new_txn)); - let x134: BoundLayout = - (((x130.map(|c| c._0)).map(|c| c._0)).map(|c| c.arg)); - let x135: BoundLayout = ((x124.map(|c| c.rs1)).map(|c| c._super)); - let x136: BoundLayout = (x135.map(|c| c.io)); - let x137: BoundLayout = (x136.map(|c| c.old_txn)); - let x138: BoundLayout = (x136.map(|c| c.new_txn)); - let x139: BoundLayout = - (((x135.map(|c| c._0)).map(|c| c._0)).map(|c| c.arg)); - let x140: BoundLayout = ((x124.map(|c| c.rs2)).map(|c| c._super)); - let x141: BoundLayout = (x140.map(|c| c.io)); - let x142: BoundLayout = (x141.map(|c| c.old_txn)); - let x143: BoundLayout = (x141.map(|c| c.new_txn)); - let x144: BoundLayout = - (((x140.map(|c| c._0)).map(|c| c._0)).map(|c| c.arg)); - let x145: BoundLayout<_Arguments_Mul0MulOutputLayout, _> = - (x122.map(|c| c._arguments_mul0_mul_output)); - let x146: BoundLayout = (x145.map(|c| c.arg_u16)); - let x147: BoundLayout = (x145.map(|c| c.arg_u8)); - let x148: BoundLayout = ((x122.map(|c| c._0)).map(|c| c._0)); - let x149: BoundLayout = (x148.map(|c| c.io)); - let x150: BoundLayout = (x149.map(|c| c.old_txn)); - let x151: BoundLayout = (x149.map(|c| c.new_txn)); - let x152: BoundLayout = - (((x148.map(|c| c._0)).map(|c| c._0)).map(|c| c.arg)); - let x153: BoundLayout = (x122.map(|c| c.pc_add)); - let x154: BoundLayout = ((x153.map(|c| c.low16)).map(|c| c.arg)); - let x155: BoundLayout = ((x153.map(|c| c.high16)).map(|c| c.arg)); - // zirgen/dsl/passes/GenerateAccum.cpp:602 - let x156: BoundLayout = (x5.map(|c| c.arm4)); - // zirgen/dsl/passes/GenerateAccum.cpp:276 - let x157: BoundLayout = (x156.map(|c| c.input)); - let x158: BoundLayout = (x157.map(|c| c.decoded)); - let x159: BoundLayout = (x158.map(|c| c.arg)); - let x160: BoundLayout = (x158.map(|c| c.pc_addr)); - let x161: BoundLayout = - (((x160.map(|c| c.upper_diff)).map(|c| c.ret)).map(|c| c.arg)); - let x162: BoundLayout = ((x160.map(|c| c.med14)).map(|c| c.arg)); - let x163: BoundLayout = (x158.map(|c| c.load_inst)); - let x164: BoundLayout = (x163.map(|c| c.io)); - let x165: BoundLayout = (x164.map(|c| c.old_txn)); - let x166: BoundLayout = (x164.map(|c| c.new_txn)); - let x167: BoundLayout = - (((x163.map(|c| c._0)).map(|c| c._0)).map(|c| c.arg)); - let x168: BoundLayout = ((x157.map(|c| c.rs1)).map(|c| c._super)); - let x169: BoundLayout = (x168.map(|c| c.io)); - let x170: BoundLayout = (x169.map(|c| c.old_txn)); - let x171: BoundLayout = (x169.map(|c| c.new_txn)); - let x172: BoundLayout = - (((x168.map(|c| c._0)).map(|c| c._0)).map(|c| c.arg)); - let x173: BoundLayout = ((x157.map(|c| c.rs2)).map(|c| c._super)); - let x174: BoundLayout = (x173.map(|c| c.io)); - let x175: BoundLayout = (x174.map(|c| c.old_txn)); - let x176: BoundLayout = (x174.map(|c| c.new_txn)); - let x177: BoundLayout = - (((x173.map(|c| c._0)).map(|c| c._0)).map(|c| c.arg)); - let x178: BoundLayout<_Arguments_Div0MulOutputLayout, _> = - (x156.map(|c| c._arguments_div0_mul_output)); - let x179: BoundLayout = (x178.map(|c| c.arg_u16)); - let x180: BoundLayout = (x178.map(|c| c.arg_u8)); - let x181: BoundLayout = ((x156.map(|c| c._0)).map(|c| c._0)); - let x182: BoundLayout = (x181.map(|c| c.io)); - let x183: BoundLayout = (x182.map(|c| c.old_txn)); - let x184: BoundLayout = (x182.map(|c| c.new_txn)); - let x185: BoundLayout = - (((x181.map(|c| c._0)).map(|c| c._0)).map(|c| c.arg)); - let x186: BoundLayout = (x156.map(|c| c.pc_add)); - let x187: BoundLayout = ((x186.map(|c| c.low16)).map(|c| c.arg)); - let x188: BoundLayout = ((x186.map(|c| c.high16)).map(|c| c.arg)); - // zirgen/dsl/passes/GenerateAccum.cpp:602 - let x189: BoundLayout = (x5.map(|c| c.arm5)); - // zirgen/dsl/passes/GenerateAccum.cpp:276 - let x190: BoundLayout = (x189.map(|c| c.input)); - let x191: BoundLayout = (x190.map(|c| c.decoded)); - let x192: BoundLayout = (x191.map(|c| c.arg)); - let x193: BoundLayout = (x191.map(|c| c.pc_addr)); - let x194: BoundLayout = - (((x193.map(|c| c.upper_diff)).map(|c| c.ret)).map(|c| c.arg)); - let x195: BoundLayout = ((x193.map(|c| c.med14)).map(|c| c.arg)); - let x196: BoundLayout = (x191.map(|c| c.load_inst)); - let x197: BoundLayout = (x196.map(|c| c.io)); - let x198: BoundLayout = (x197.map(|c| c.old_txn)); - let x199: BoundLayout = (x197.map(|c| c.new_txn)); - let x200: BoundLayout = - (((x196.map(|c| c._0)).map(|c| c._0)).map(|c| c.arg)); - let x201: BoundLayout = ((x190.map(|c| c.rs1)).map(|c| c._super)); - let x202: BoundLayout = (x201.map(|c| c.io)); - let x203: BoundLayout = (x202.map(|c| c.old_txn)); - let x204: BoundLayout = (x202.map(|c| c.new_txn)); - let x205: BoundLayout = - (((x201.map(|c| c._0)).map(|c| c._0)).map(|c| c.arg)); - let x206: BoundLayout = (x190.map(|c| c.addr_u32)); - let x207: BoundLayout = ((x206.map(|c| c.low16)).map(|c| c.arg)); - let x208: BoundLayout = ((x206.map(|c| c.high16)).map(|c| c.arg)); - let x209: BoundLayout = (x190.map(|c| c.addr)); - let x210: BoundLayout = - (((x209.map(|c| c.upper_diff)).map(|c| c.ret)).map(|c| c.arg)); - let x211: BoundLayout = ((x209.map(|c| c.med14)).map(|c| c.arg)); - let x212: BoundLayout = (x190.map(|c| c.data_0)); - let x213: BoundLayout = (x212.map(|c| c.io)); - let x214: BoundLayout = (x213.map(|c| c.old_txn)); - let x215: BoundLayout = (x213.map(|c| c.new_txn)); - let x216: BoundLayout = - (((x212.map(|c| c._0)).map(|c| c._0)).map(|c| c.arg)); - let x217: BoundLayout = - ((x189.map(|c| c._arguments_mem0_output)).map(|c| c.arg_u8)); - let x218: BoundLayout = ((x189.map(|c| c._0)).map(|c| c._0)); - let x219: BoundLayout = (x218.map(|c| c.io)); - let x220: BoundLayout = (x219.map(|c| c.old_txn)); - let x221: BoundLayout = (x219.map(|c| c.new_txn)); - let x222: BoundLayout = - (((x218.map(|c| c._0)).map(|c| c._0)).map(|c| c.arg)); - let x223: BoundLayout = (x189.map(|c| c.pc_add)); - let x224: BoundLayout = ((x223.map(|c| c.low16)).map(|c| c.arg)); - let x225: BoundLayout = ((x223.map(|c| c.high16)).map(|c| c.arg)); - // zirgen/dsl/passes/GenerateAccum.cpp:602 - let x226: BoundLayout = (x5.map(|c| c.arm6)); - // zirgen/dsl/passes/GenerateAccum.cpp:276 - let x227: BoundLayout = (x226.map(|c| c.input)); - let x228: BoundLayout = (x227.map(|c| c.decoded)); - let x229: BoundLayout = (x228.map(|c| c.arg)); - let x230: BoundLayout = (x228.map(|c| c.pc_addr)); - let x231: BoundLayout = - (((x230.map(|c| c.upper_diff)).map(|c| c.ret)).map(|c| c.arg)); - let x232: BoundLayout = ((x230.map(|c| c.med14)).map(|c| c.arg)); - let x233: BoundLayout = (x228.map(|c| c.load_inst)); - let x234: BoundLayout = (x233.map(|c| c.io)); - let x235: BoundLayout = (x234.map(|c| c.old_txn)); - let x236: BoundLayout = (x234.map(|c| c.new_txn)); - let x237: BoundLayout = - (((x233.map(|c| c._0)).map(|c| c._0)).map(|c| c.arg)); - let x238: BoundLayout = ((x227.map(|c| c.rs1)).map(|c| c._super)); - let x239: BoundLayout = (x238.map(|c| c.io)); - let x240: BoundLayout = (x239.map(|c| c.old_txn)); - let x241: BoundLayout = (x239.map(|c| c.new_txn)); - let x242: BoundLayout = - (((x238.map(|c| c._0)).map(|c| c._0)).map(|c| c.arg)); - let x243: BoundLayout = ((x227.map(|c| c.rs2)).map(|c| c._super)); - let x244: BoundLayout = (x243.map(|c| c.io)); - let x245: BoundLayout = (x244.map(|c| c.old_txn)); - let x246: BoundLayout = (x244.map(|c| c.new_txn)); - let x247: BoundLayout = - (((x243.map(|c| c._0)).map(|c| c._0)).map(|c| c.arg)); - let x248: BoundLayout = (x227.map(|c| c.addr_u32)); - let x249: BoundLayout = ((x248.map(|c| c.low16)).map(|c| c.arg)); - let x250: BoundLayout = ((x248.map(|c| c.high16)).map(|c| c.arg)); - let x251: BoundLayout = (x227.map(|c| c.addr)); - let x252: BoundLayout = - (((x251.map(|c| c.upper_diff)).map(|c| c.ret)).map(|c| c.arg)); - let x253: BoundLayout = ((x251.map(|c| c.med14)).map(|c| c.arg)); - let x254: BoundLayout = (x227.map(|c| c.data_0)); - let x255: BoundLayout = (x254.map(|c| c.io)); - let x256: BoundLayout = (x255.map(|c| c.old_txn)); - let x257: BoundLayout = (x255.map(|c| c.new_txn)); - let x258: BoundLayout = - (((x254.map(|c| c._0)).map(|c| c._0)).map(|c| c.arg)); - let x259: BoundLayout = - ((x226.map(|c| c._arguments_mem1_output)).map(|c| c.arg_u8)); - let x260: BoundLayout = ((x226.map(|c| c._0)).map(|c| c._0)); - let x261: BoundLayout = (x260.map(|c| c.io)); - let x262: BoundLayout = (x261.map(|c| c.old_txn)); - let x263: BoundLayout = (x261.map(|c| c.new_txn)); - let x264: BoundLayout = - (((x260.map(|c| c._0)).map(|c| c._0)).map(|c| c.arg)); - let x265: BoundLayout = (x226.map(|c| c.pc_add)); - let x266: BoundLayout = ((x265.map(|c| c.low16)).map(|c| c.arg)); - let x267: BoundLayout = ((x265.map(|c| c.high16)).map(|c| c.arg)); - // zirgen/dsl/passes/GenerateAccum.cpp:602 - let x268: BoundLayout = (x5.map(|c| c.arm7)); - // zirgen/dsl/passes/GenerateAccum.cpp:276 - let x269: BoundLayout = (x268.map(|c| c.arg)); - let x270: BoundLayout<_Arguments_Control0_SuperLayout, _> = - (x268.map(|c| c._arguments_control0__super)); - let x271: BoundLayout = (x270.map(|c| c.memory_arg)); - let x272: BoundLayout = (x270.map(|c| c.cycle_arg)); - let x273: BoundLayout = (x270.map(|c| c.arg_u16)); - let x274: BoundLayout = (x270.map(|c| c.arg_u8)); - // zirgen/dsl/passes/GenerateAccum.cpp:602 - let x275: BoundLayout = (x5.map(|c| c.arm8)); - // zirgen/dsl/passes/GenerateAccum.cpp:276 - let x276: BoundLayout = (x275.map(|c| c.pc_addr)); - let x277: BoundLayout = - (((x276.map(|c| c.upper_diff)).map(|c| c.ret)).map(|c| c.arg)); - let x278: BoundLayout = ((x276.map(|c| c.med14)).map(|c| c.arg)); - let x279: BoundLayout<_Arguments_ECall0OutputLayout, _> = - (x275.map(|c| c._arguments_e_call0_output)); - let x280: BoundLayout = (x279.map(|c| c.memory_arg)); - let x281: BoundLayout = (x279.map(|c| c.cycle_arg)); - let x282: BoundLayout = (x279.map(|c| c.arg_u16)); - let x283: BoundLayout = (x275.map(|c| c.add_pc)); - let x284: BoundLayout = ((x283.map(|c| c.low16)).map(|c| c.arg)); - let x285: BoundLayout = ((x283.map(|c| c.high16)).map(|c| c.arg)); - let x286: BoundLayout = (x275.map(|c| c.arg)); - // zirgen/dsl/passes/GenerateAccum.cpp:602 - let x287: BoundLayout = (x5.map(|c| c.arm9)); - // zirgen/dsl/passes/GenerateAccum.cpp:276 - let x288: BoundLayout<_Arguments_Poseidon0StateLayout, _> = - (x287.map(|c| c._arguments_poseidon0_state)); - let x289: BoundLayout = (x288.map(|c| c.memory_arg)); - let x290: BoundLayout = (x288.map(|c| c.cycle_arg)); - let x291: BoundLayout = (x288.map(|c| c.arg_u16)); - let x292: BoundLayout = (x288.map(|c| c.arg_u8)); - let x293: BoundLayout = (x287.map(|c| c.arg)); - let x294: BoundLayout = ((x5.map(|c| c.arm10)).map(|c| c.arg)); - let x295: ComponentStruct; - if is_true(((x6.map(|c| c[to_usize(0)])).map(|c| c._super)).load(ctx, 0)) { - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x296: ExtVal = - (x9.load_ext::(ctx, 0) * ((x19.map(|c| c.val)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x297: ExtVal = (x296 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x298: ExtVal = (((x19.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x297)?); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x299: ExtVal = - ((x8.map(|c| c[to_usize(18)])).load_unchecked_ext::(ctx, 1) + x298); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x300: ExtVal = - (x9.load_ext::(ctx, 0) * ((x20.map(|c| c.val)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x301: ExtVal = (x300 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x302: ExtVal = (((x20.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x301)?); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x303: ExtVal = (x297 * x301); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x304: ExtVal = (((x19.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * x301); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x305: ExtVal = - (x9.load_ext::(ctx, 0) * ((x22.map(|c| c.val)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x306: ExtVal = (x305 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x307: ExtVal = (((x22.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x306)?); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x308: ExtVal = ((x299 + x302) + x307); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(0)])).store_ext(ctx, x308); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x309: ExtVal = ((x8.map(|c| c[to_usize(0)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(18)])).load_unchecked_ext::(ctx, 1)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x310: ExtVal = (((x309 * (x303 * x306)) - (x304 * x306)) - - ((x297 * ((x20.map(|c| c.count)).map(|c| c._super)).load(ctx, 0)) * x306)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x310 - (x303 * ((x22.map(|c| c.count)).map(|c| c._super)).load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x311: ExtVal = - (x9.load_ext::(ctx, 0) * ((x23.map(|c| c.val)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x312: ExtVal = (x311 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x313: ExtVal = (((x23.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x312)?); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x314: ExtVal = (x11.load_ext::(ctx, 0) - * ((x26.map(|c| c.addr)).map(|c| c._super)).load(ctx, 0)); - let x315: ExtVal = (x12.load_ext::(ctx, 0) - * ((x26.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - let x316: ExtVal = (x13.load_ext::(ctx, 0) - * ((x26.map(|c| c.data_low)).map(|c| c._super)).load(ctx, 0)); - let x317: ExtVal = (x14.load_ext::(ctx, 0) - * ((x26.map(|c| c.data_high)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x318: ExtVal = (((x314 + x315) + x316) + x317); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x319: ExtVal = (x318 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x320: ExtVal = (((x26.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x319)?); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x321: ExtVal = (x312 * x319); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x322: ExtVal = (((x23.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * x319); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x323: ExtVal = (x11.load_ext::(ctx, 0) - * ((x27.map(|c| c.addr)).map(|c| c._super)).load(ctx, 0)); - let x324: ExtVal = (x12.load_ext::(ctx, 0) - * ((x27.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - let x325: ExtVal = (x13.load_ext::(ctx, 0) - * ((x27.map(|c| c.data_low)).map(|c| c._super)).load(ctx, 0)); - let x326: ExtVal = (x14.load_ext::(ctx, 0) - * ((x27.map(|c| c.data_high)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x327: ExtVal = (((x323 + x324) + x325) + x326); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x328: ExtVal = (x327 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x329: ExtVal = (((x27.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x328)?); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x330: ExtVal = (((x308 + x313) + x320) + x329); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(1)])).store_ext(ctx, x330); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x331: ExtVal = ((x8.map(|c| c[to_usize(1)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(0)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x332: ExtVal = (((x331 * (x321 * x328)) - (x322 * x328)) - - ((x312 * ((x26.map(|c| c.count)).map(|c| c._super)).load(ctx, 0)) * x328)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x332 - (x321 * ((x27.map(|c| c.count)).map(|c| c._super)).load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x333: ExtVal = (x15.load_ext::(ctx, 0) - * ((x28.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x334: ExtVal = (x333 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x335: ExtVal = (((x28.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x334)?); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x336: ExtVal = (x15.load_ext::(ctx, 0) - * ((x31.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x337: ExtVal = (x336 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x338: ExtVal = (((x31.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x337)?); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x339: ExtVal = (x334 * x337); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x340: ExtVal = (((x28.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * x337); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x341: ExtVal = - (x9.load_ext::(ctx, 0) * ((x33.map(|c| c.val)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x342: ExtVal = (x341 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x343: ExtVal = (((x33.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x342)?); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x344: ExtVal = (((x330 + x335) + x338) + x343); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(2)])).store_ext(ctx, x344); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x345: ExtVal = ((x8.map(|c| c[to_usize(2)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(1)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x346: ExtVal = (((x345 * (x339 * x342)) - (x340 * x342)) - - ((x334 * ((x31.map(|c| c.count)).map(|c| c._super)).load(ctx, 0)) * x342)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x346 - (x339 * ((x33.map(|c| c.count)).map(|c| c._super)).load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x347: ExtVal = - (x9.load_ext::(ctx, 0) * ((x34.map(|c| c.val)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x348: ExtVal = (x347 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x349: ExtVal = (((x34.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x348)?); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x350: ExtVal = (x11.load_ext::(ctx, 0) - * ((x37.map(|c| c.addr)).map(|c| c._super)).load(ctx, 0)); - let x351: ExtVal = (x12.load_ext::(ctx, 0) - * ((x37.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - let x352: ExtVal = (x13.load_ext::(ctx, 0) - * ((x37.map(|c| c.data_low)).map(|c| c._super)).load(ctx, 0)); - let x353: ExtVal = (x14.load_ext::(ctx, 0) - * ((x37.map(|c| c.data_high)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x354: ExtVal = (((x350 + x351) + x352) + x353); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x355: ExtVal = (x354 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x356: ExtVal = (((x37.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x355)?); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x357: ExtVal = (x348 * x355); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x358: ExtVal = (((x34.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * x355); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x359: ExtVal = (x11.load_ext::(ctx, 0) - * ((x38.map(|c| c.addr)).map(|c| c._super)).load(ctx, 0)); - let x360: ExtVal = (x12.load_ext::(ctx, 0) - * ((x38.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - let x361: ExtVal = (x13.load_ext::(ctx, 0) - * ((x38.map(|c| c.data_low)).map(|c| c._super)).load(ctx, 0)); - let x362: ExtVal = (x14.load_ext::(ctx, 0) - * ((x38.map(|c| c.data_high)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x363: ExtVal = (((x359 + x360) + x361) + x362); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x364: ExtVal = (x363 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x365: ExtVal = (((x38.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x364)?); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x366: ExtVal = (((x344 + x349) + x356) + x365); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(3)])).store_ext(ctx, x366); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x367: ExtVal = ((x8.map(|c| c[to_usize(3)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(2)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x368: ExtVal = (((x367 * (x357 * x364)) - (x358 * x364)) - - ((x348 * ((x37.map(|c| c.count)).map(|c| c._super)).load(ctx, 0)) * x364)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x368 - (x357 * ((x38.map(|c| c.count)).map(|c| c._super)).load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x369: ExtVal = (x15.load_ext::(ctx, 0) - * ((x39.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x370: ExtVal = (x369 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x371: ExtVal = (((x39.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x370)?); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x372: ExtVal = (x11.load_ext::(ctx, 0) - * ((x42.map(|c| c.addr)).map(|c| c._super)).load(ctx, 0)); - let x373: ExtVal = (x12.load_ext::(ctx, 0) - * ((x42.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - let x374: ExtVal = (x13.load_ext::(ctx, 0) - * ((x42.map(|c| c.data_low)).map(|c| c._super)).load(ctx, 0)); - let x375: ExtVal = (x14.load_ext::(ctx, 0) - * ((x42.map(|c| c.data_high)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x376: ExtVal = (((x372 + x373) + x374) + x375); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x377: ExtVal = (x376 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x378: ExtVal = (((x42.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x377)?); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x379: ExtVal = (x370 * x377); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x380: ExtVal = (((x39.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * x377); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x381: ExtVal = (x11.load_ext::(ctx, 0) - * ((x43.map(|c| c.addr)).map(|c| c._super)).load(ctx, 0)); - let x382: ExtVal = (x12.load_ext::(ctx, 0) - * ((x43.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - let x383: ExtVal = (x13.load_ext::(ctx, 0) - * ((x43.map(|c| c.data_low)).map(|c| c._super)).load(ctx, 0)); - let x384: ExtVal = (x14.load_ext::(ctx, 0) - * ((x43.map(|c| c.data_high)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x385: ExtVal = (((x381 + x382) + x383) + x384); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x386: ExtVal = (x385 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x387: ExtVal = (((x43.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x386)?); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x388: ExtVal = (((x366 + x371) + x378) + x387); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(4)])).store_ext(ctx, x388); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x389: ExtVal = ((x8.map(|c| c[to_usize(4)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(3)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x390: ExtVal = (((x389 * (x379 * x386)) - (x380 * x386)) - - ((x370 * ((x42.map(|c| c.count)).map(|c| c._super)).load(ctx, 0)) * x386)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x390 - (x379 * ((x43.map(|c| c.count)).map(|c| c._super)).load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x391: ExtVal = (x15.load_ext::(ctx, 0) - * ((x44.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x392: ExtVal = (x391 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x393: ExtVal = (((x44.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x392)?); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x394: ExtVal = (x11.load_ext::(ctx, 0) - * ((x47.map(|c| c.addr)).map(|c| c._super)).load(ctx, 0)); - let x395: ExtVal = (x12.load_ext::(ctx, 0) - * ((x47.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - let x396: ExtVal = (x13.load_ext::(ctx, 0) - * ((x47.map(|c| c.data_low)).map(|c| c._super)).load(ctx, 0)); - let x397: ExtVal = (x14.load_ext::(ctx, 0) - * ((x47.map(|c| c.data_high)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x398: ExtVal = (((x394 + x395) + x396) + x397); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x399: ExtVal = (x398 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x400: ExtVal = (((x47.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x399)?); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x401: ExtVal = (x392 * x399); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x402: ExtVal = (((x44.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * x399); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x403: ExtVal = (x11.load_ext::(ctx, 0) - * ((x48.map(|c| c.addr)).map(|c| c._super)).load(ctx, 0)); - let x404: ExtVal = (x12.load_ext::(ctx, 0) - * ((x48.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - let x405: ExtVal = (x13.load_ext::(ctx, 0) - * ((x48.map(|c| c.data_low)).map(|c| c._super)).load(ctx, 0)); - let x406: ExtVal = (x14.load_ext::(ctx, 0) - * ((x48.map(|c| c.data_high)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x407: ExtVal = (((x403 + x404) + x405) + x406); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x408: ExtVal = (x407 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x409: ExtVal = (((x48.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x408)?); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x410: ExtVal = (((x388 + x393) + x400) + x409); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(5)])).store_ext(ctx, x410); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x411: ExtVal = ((x8.map(|c| c[to_usize(5)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(4)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x412: ExtVal = (((x411 * (x401 * x408)) - (x402 * x408)) - - ((x392 * ((x47.map(|c| c.count)).map(|c| c._super)).load(ctx, 0)) * x408)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x412 - (x401 * ((x48.map(|c| c.count)).map(|c| c._super)).load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x413: ExtVal = (x15.load_ext::(ctx, 0) - * ((x49.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x414: ExtVal = (x413 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x415: ExtVal = (((x49.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x414)?); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x416: BoundLayout = - (((x50.map(|c| c[to_usize(0)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x417: BoundLayout = - (((x50.map(|c| c[to_usize(0)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x418: ExtVal = - ((x9.load_ext::(ctx, 0) * x417.load(ctx, 0)) + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x419: ExtVal = ((x410 + x415) + (x416.load(ctx, 0) * inv_0(x418)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x420: ExtVal = (x414 * x418); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x421: ExtVal = (((x49.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * x418); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x422: BoundLayout = - (((x50.map(|c| c[to_usize(1)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x423: BoundLayout = - (((x50.map(|c| c[to_usize(1)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x424: ExtVal = - ((x9.load_ext::(ctx, 0) * x423.load(ctx, 0)) + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x425: ExtVal = (x419 + (x422.load(ctx, 0) * inv_0(x424)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(6)])).store_ext(ctx, x425); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x426: ExtVal = ((x8.map(|c| c[to_usize(6)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(5)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x427: ExtVal = - (((x426 * (x420 * x424)) - (x421 * x424)) - ((x414 * x416.load(ctx, 0)) * x424)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x427 - (x420 * x422.load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x428: BoundLayout = - (((x50.map(|c| c[to_usize(2)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x429: BoundLayout = - (((x50.map(|c| c[to_usize(2)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x430: ExtVal = - ((x9.load_ext::(ctx, 0) * x429.load(ctx, 0)) + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x431: BoundLayout = - (((x50.map(|c| c[to_usize(3)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x432: BoundLayout = - (((x50.map(|c| c[to_usize(3)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x433: ExtVal = - ((x9.load_ext::(ctx, 0) * x432.load(ctx, 0)) + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x434: ExtVal = - ((x425 + (x428.load(ctx, 0) * inv_0(x430)?)) + (x431.load(ctx, 0) * inv_0(x433)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x435: ExtVal = (x430 * x433); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x436: BoundLayout = - (((x50.map(|c| c[to_usize(4)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x437: BoundLayout = - (((x50.map(|c| c[to_usize(4)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x438: ExtVal = - ((x9.load_ext::(ctx, 0) * x437.load(ctx, 0)) + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x439: ExtVal = (x434 + (x436.load(ctx, 0) * inv_0(x438)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x440: ExtVal = ((x428.load(ctx, 0) * x433) * x438); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(7)])).store_ext(ctx, x439); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x441: ExtVal = ((x8.map(|c| c[to_usize(7)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(6)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x442: ExtVal = (((x441 * (x435 * x438)) - x440) - ((x430 * x431.load(ctx, 0)) * x438)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x442 - (x435 * x436.load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:122 - (x8.map(|c| c[to_usize(18)])).store_ext(ctx, x439); - // zirgen/dsl/passes/GenerateAccum.cpp:124 - let x443: ExtVal = ((x8.map(|c| c[to_usize(18)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(7)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:125 - eqz!(x443, "zirgen/dsl/passes/GenerateAccum.cpp:125"); - x295 = x51; - } else if is_true(((x6.map(|c| c[to_usize(1)])).map(|c| c._super)).load(ctx, 0)) { - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x444: ExtVal = - (x9.load_ext::(ctx, 0) * ((x55.map(|c| c.val)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x445: ExtVal = (x444 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x446: ExtVal = (((x55.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x445)?); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x447: ExtVal = - ((x8.map(|c| c[to_usize(18)])).load_unchecked_ext::(ctx, 1) + x446); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x448: ExtVal = - (x9.load_ext::(ctx, 0) * ((x56.map(|c| c.val)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x449: ExtVal = (x448 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x450: ExtVal = (((x56.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x449)?); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x451: ExtVal = (x445 * x449); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x452: ExtVal = (((x55.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * x449); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x453: ExtVal = - (x9.load_ext::(ctx, 0) * ((x58.map(|c| c.val)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x454: ExtVal = (x453 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x455: ExtVal = (((x58.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x454)?); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x456: ExtVal = ((x447 + x450) + x455); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(0)])).store_ext(ctx, x456); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x457: ExtVal = ((x8.map(|c| c[to_usize(0)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(18)])).load_unchecked_ext::(ctx, 1)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x458: ExtVal = (((x457 * (x451 * x454)) - (x452 * x454)) - - ((x445 * ((x56.map(|c| c.count)).map(|c| c._super)).load(ctx, 0)) * x454)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x458 - (x451 * ((x58.map(|c| c.count)).map(|c| c._super)).load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x459: ExtVal = - (x9.load_ext::(ctx, 0) * ((x59.map(|c| c.val)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x460: ExtVal = (x459 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x461: ExtVal = (((x59.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x460)?); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x462: ExtVal = (x11.load_ext::(ctx, 0) - * ((x62.map(|c| c.addr)).map(|c| c._super)).load(ctx, 0)); - let x463: ExtVal = (x12.load_ext::(ctx, 0) - * ((x62.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - let x464: ExtVal = (x13.load_ext::(ctx, 0) - * ((x62.map(|c| c.data_low)).map(|c| c._super)).load(ctx, 0)); - let x465: ExtVal = (x14.load_ext::(ctx, 0) - * ((x62.map(|c| c.data_high)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x466: ExtVal = (((x462 + x463) + x464) + x465); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x467: ExtVal = (x466 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x468: ExtVal = (((x62.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x467)?); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x469: ExtVal = (x460 * x467); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x470: ExtVal = (((x59.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * x467); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x471: ExtVal = (x11.load_ext::(ctx, 0) - * ((x63.map(|c| c.addr)).map(|c| c._super)).load(ctx, 0)); - let x472: ExtVal = (x12.load_ext::(ctx, 0) - * ((x63.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - let x473: ExtVal = (x13.load_ext::(ctx, 0) - * ((x63.map(|c| c.data_low)).map(|c| c._super)).load(ctx, 0)); - let x474: ExtVal = (x14.load_ext::(ctx, 0) - * ((x63.map(|c| c.data_high)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x475: ExtVal = (((x471 + x472) + x473) + x474); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x476: ExtVal = (x475 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x477: ExtVal = (((x63.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x476)?); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x478: ExtVal = (((x456 + x461) + x468) + x477); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(1)])).store_ext(ctx, x478); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x479: ExtVal = ((x8.map(|c| c[to_usize(1)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(0)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x480: ExtVal = (((x479 * (x469 * x476)) - (x470 * x476)) - - ((x460 * ((x62.map(|c| c.count)).map(|c| c._super)).load(ctx, 0)) * x476)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x480 - (x469 * ((x63.map(|c| c.count)).map(|c| c._super)).load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x481: ExtVal = (x15.load_ext::(ctx, 0) - * ((x64.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x482: ExtVal = (x481 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x483: ExtVal = (((x64.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x482)?); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x484: ExtVal = (x15.load_ext::(ctx, 0) - * ((x67.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x485: ExtVal = (x484 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x486: ExtVal = (((x67.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x485)?); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x487: ExtVal = (x482 * x485); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x488: ExtVal = (((x64.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * x485); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x489: ExtVal = - (x9.load_ext::(ctx, 0) * ((x69.map(|c| c.val)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x490: ExtVal = (x489 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x491: ExtVal = (((x69.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x490)?); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x492: ExtVal = (((x478 + x483) + x486) + x491); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(2)])).store_ext(ctx, x492); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x493: ExtVal = ((x8.map(|c| c[to_usize(2)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(1)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x494: ExtVal = (((x493 * (x487 * x490)) - (x488 * x490)) - - ((x482 * ((x67.map(|c| c.count)).map(|c| c._super)).load(ctx, 0)) * x490)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x494 - (x487 * ((x69.map(|c| c.count)).map(|c| c._super)).load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x495: ExtVal = - (x9.load_ext::(ctx, 0) * ((x70.map(|c| c.val)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x496: ExtVal = (x495 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x497: ExtVal = (((x70.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x496)?); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x498: ExtVal = (x11.load_ext::(ctx, 0) - * ((x73.map(|c| c.addr)).map(|c| c._super)).load(ctx, 0)); - let x499: ExtVal = (x12.load_ext::(ctx, 0) - * ((x73.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - let x500: ExtVal = (x13.load_ext::(ctx, 0) - * ((x73.map(|c| c.data_low)).map(|c| c._super)).load(ctx, 0)); - let x501: ExtVal = (x14.load_ext::(ctx, 0) - * ((x73.map(|c| c.data_high)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x502: ExtVal = (((x498 + x499) + x500) + x501); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x503: ExtVal = (x502 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x504: ExtVal = (((x73.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x503)?); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x505: ExtVal = (x496 * x503); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x506: ExtVal = (((x70.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * x503); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x507: ExtVal = (x11.load_ext::(ctx, 0) - * ((x74.map(|c| c.addr)).map(|c| c._super)).load(ctx, 0)); - let x508: ExtVal = (x12.load_ext::(ctx, 0) - * ((x74.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - let x509: ExtVal = (x13.load_ext::(ctx, 0) - * ((x74.map(|c| c.data_low)).map(|c| c._super)).load(ctx, 0)); - let x510: ExtVal = (x14.load_ext::(ctx, 0) - * ((x74.map(|c| c.data_high)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x511: ExtVal = (((x507 + x508) + x509) + x510); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x512: ExtVal = (x511 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x513: ExtVal = (((x74.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x512)?); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x514: ExtVal = (((x492 + x497) + x504) + x513); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(3)])).store_ext(ctx, x514); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x515: ExtVal = ((x8.map(|c| c[to_usize(3)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(2)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x516: ExtVal = (((x515 * (x505 * x512)) - (x506 * x512)) - - ((x496 * ((x73.map(|c| c.count)).map(|c| c._super)).load(ctx, 0)) * x512)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x516 - (x505 * ((x74.map(|c| c.count)).map(|c| c._super)).load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x517: ExtVal = (x15.load_ext::(ctx, 0) - * ((x75.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x518: ExtVal = (x517 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x519: ExtVal = (((x75.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x518)?); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x520: ExtVal = (x11.load_ext::(ctx, 0) - * ((x78.map(|c| c.addr)).map(|c| c._super)).load(ctx, 0)); - let x521: ExtVal = (x12.load_ext::(ctx, 0) - * ((x78.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - let x522: ExtVal = (x13.load_ext::(ctx, 0) - * ((x78.map(|c| c.data_low)).map(|c| c._super)).load(ctx, 0)); - let x523: ExtVal = (x14.load_ext::(ctx, 0) - * ((x78.map(|c| c.data_high)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x524: ExtVal = (((x520 + x521) + x522) + x523); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x525: ExtVal = (x524 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x526: ExtVal = (((x78.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x525)?); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x527: ExtVal = (x518 * x525); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x528: ExtVal = (((x75.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * x525); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x529: ExtVal = (x11.load_ext::(ctx, 0) - * ((x79.map(|c| c.addr)).map(|c| c._super)).load(ctx, 0)); - let x530: ExtVal = (x12.load_ext::(ctx, 0) - * ((x79.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - let x531: ExtVal = (x13.load_ext::(ctx, 0) - * ((x79.map(|c| c.data_low)).map(|c| c._super)).load(ctx, 0)); - let x532: ExtVal = (x14.load_ext::(ctx, 0) - * ((x79.map(|c| c.data_high)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x533: ExtVal = (((x529 + x530) + x531) + x532); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x534: ExtVal = (x533 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x535: ExtVal = (((x79.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x534)?); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x536: ExtVal = (((x514 + x519) + x526) + x535); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(4)])).store_ext(ctx, x536); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x537: ExtVal = ((x8.map(|c| c[to_usize(4)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(3)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x538: ExtVal = (((x537 * (x527 * x534)) - (x528 * x534)) - - ((x518 * ((x78.map(|c| c.count)).map(|c| c._super)).load(ctx, 0)) * x534)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x538 - (x527 * ((x79.map(|c| c.count)).map(|c| c._super)).load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x539: ExtVal = (x15.load_ext::(ctx, 0) - * ((x80.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x540: ExtVal = (x539 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x541: ExtVal = (((x80.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x540)?); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x542: ExtVal = (x11.load_ext::(ctx, 0) - * ((x83.map(|c| c.addr)).map(|c| c._super)).load(ctx, 0)); - let x543: ExtVal = (x12.load_ext::(ctx, 0) - * ((x83.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - let x544: ExtVal = (x13.load_ext::(ctx, 0) - * ((x83.map(|c| c.data_low)).map(|c| c._super)).load(ctx, 0)); - let x545: ExtVal = (x14.load_ext::(ctx, 0) - * ((x83.map(|c| c.data_high)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x546: ExtVal = (((x542 + x543) + x544) + x545); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x547: ExtVal = (x546 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x548: ExtVal = (((x83.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x547)?); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x549: ExtVal = (x540 * x547); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x550: ExtVal = (((x80.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * x547); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x551: ExtVal = (x11.load_ext::(ctx, 0) - * ((x84.map(|c| c.addr)).map(|c| c._super)).load(ctx, 0)); - let x552: ExtVal = (x12.load_ext::(ctx, 0) - * ((x84.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - let x553: ExtVal = (x13.load_ext::(ctx, 0) - * ((x84.map(|c| c.data_low)).map(|c| c._super)).load(ctx, 0)); - let x554: ExtVal = (x14.load_ext::(ctx, 0) - * ((x84.map(|c| c.data_high)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x555: ExtVal = (((x551 + x552) + x553) + x554); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x556: ExtVal = (x555 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x557: ExtVal = (((x84.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x556)?); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x558: ExtVal = (((x536 + x541) + x548) + x557); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(5)])).store_ext(ctx, x558); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x559: ExtVal = ((x8.map(|c| c[to_usize(5)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(4)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x560: ExtVal = (((x559 * (x549 * x556)) - (x550 * x556)) - - ((x540 * ((x83.map(|c| c.count)).map(|c| c._super)).load(ctx, 0)) * x556)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x560 - (x549 * ((x84.map(|c| c.count)).map(|c| c._super)).load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x561: ExtVal = (x15.load_ext::(ctx, 0) - * ((x85.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x562: ExtVal = (x561 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x563: ExtVal = (((x85.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x562)?); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x564: BoundLayout = - (((x86.map(|c| c[to_usize(0)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x565: BoundLayout = - (((x86.map(|c| c[to_usize(0)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x566: ExtVal = - ((x9.load_ext::(ctx, 0) * x565.load(ctx, 0)) + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x567: ExtVal = ((x558 + x563) + (x564.load(ctx, 0) * inv_0(x566)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x568: ExtVal = (x562 * x566); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x569: ExtVal = (((x85.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * x566); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x570: BoundLayout = - (((x86.map(|c| c[to_usize(1)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x571: BoundLayout = - (((x86.map(|c| c[to_usize(1)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x572: ExtVal = - ((x9.load_ext::(ctx, 0) * x571.load(ctx, 0)) + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x573: ExtVal = (x567 + (x570.load(ctx, 0) * inv_0(x572)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(6)])).store_ext(ctx, x573); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x574: ExtVal = ((x8.map(|c| c[to_usize(6)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(5)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x575: ExtVal = - (((x574 * (x568 * x572)) - (x569 * x572)) - ((x562 * x564.load(ctx, 0)) * x572)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x575 - (x568 * x570.load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x576: BoundLayout = - (((x86.map(|c| c[to_usize(2)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x577: BoundLayout = - (((x86.map(|c| c[to_usize(2)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x578: ExtVal = - ((x9.load_ext::(ctx, 0) * x577.load(ctx, 0)) + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x579: BoundLayout = - (((x86.map(|c| c[to_usize(3)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x580: BoundLayout = - (((x86.map(|c| c[to_usize(3)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x581: ExtVal = - ((x9.load_ext::(ctx, 0) * x580.load(ctx, 0)) + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x582: ExtVal = - ((x573 + (x576.load(ctx, 0) * inv_0(x578)?)) + (x579.load(ctx, 0) * inv_0(x581)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x583: ExtVal = (x578 * x581); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x584: BoundLayout = - (((x86.map(|c| c[to_usize(4)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x585: BoundLayout = - (((x86.map(|c| c[to_usize(4)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x586: ExtVal = - ((x9.load_ext::(ctx, 0) * x585.load(ctx, 0)) + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x587: ExtVal = (x582 + (x584.load(ctx, 0) * inv_0(x586)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x588: ExtVal = ((x576.load(ctx, 0) * x581) * x586); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(7)])).store_ext(ctx, x587); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x589: ExtVal = ((x8.map(|c| c[to_usize(7)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(6)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x590: ExtVal = (((x589 * (x583 * x586)) - x588) - ((x578 * x579.load(ctx, 0)) * x586)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x590 - (x583 * x584.load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:122 - (x8.map(|c| c[to_usize(18)])).store_ext(ctx, x587); - // zirgen/dsl/passes/GenerateAccum.cpp:124 - let x591: ExtVal = ((x8.map(|c| c[to_usize(18)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(7)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:125 - eqz!(x591, "zirgen/dsl/passes/GenerateAccum.cpp:125"); - x295 = x51; - } else if is_true(((x6.map(|c| c[to_usize(2)])).map(|c| c._super)).load(ctx, 0)) { - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x592: ExtVal = - (x9.load_ext::(ctx, 0) * ((x90.map(|c| c.val)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x593: ExtVal = (x592 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x594: ExtVal = (((x90.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x593)?); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x595: ExtVal = - ((x8.map(|c| c[to_usize(18)])).load_unchecked_ext::(ctx, 1) + x594); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x596: ExtVal = - (x9.load_ext::(ctx, 0) * ((x91.map(|c| c.val)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x597: ExtVal = (x596 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x598: ExtVal = (((x91.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x597)?); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x599: ExtVal = (x593 * x597); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x600: ExtVal = (((x90.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * x597); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x601: ExtVal = - (x9.load_ext::(ctx, 0) * ((x93.map(|c| c.val)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x602: ExtVal = (x601 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x603: ExtVal = (((x93.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x602)?); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x604: ExtVal = ((x595 + x598) + x603); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(0)])).store_ext(ctx, x604); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x605: ExtVal = ((x8.map(|c| c[to_usize(0)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(18)])).load_unchecked_ext::(ctx, 1)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x606: ExtVal = (((x605 * (x599 * x602)) - (x600 * x602)) - - ((x593 * ((x91.map(|c| c.count)).map(|c| c._super)).load(ctx, 0)) * x602)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x606 - (x599 * ((x93.map(|c| c.count)).map(|c| c._super)).load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x607: ExtVal = - (x9.load_ext::(ctx, 0) * ((x94.map(|c| c.val)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x608: ExtVal = (x607 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x609: ExtVal = (((x94.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x608)?); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x610: ExtVal = (x11.load_ext::(ctx, 0) - * ((x97.map(|c| c.addr)).map(|c| c._super)).load(ctx, 0)); - let x611: ExtVal = (x12.load_ext::(ctx, 0) - * ((x97.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - let x612: ExtVal = (x13.load_ext::(ctx, 0) - * ((x97.map(|c| c.data_low)).map(|c| c._super)).load(ctx, 0)); - let x613: ExtVal = (x14.load_ext::(ctx, 0) - * ((x97.map(|c| c.data_high)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x614: ExtVal = (((x610 + x611) + x612) + x613); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x615: ExtVal = (x614 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x616: ExtVal = (((x97.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x615)?); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x617: ExtVal = (x608 * x615); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x618: ExtVal = (((x94.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * x615); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x619: ExtVal = (x11.load_ext::(ctx, 0) - * ((x98.map(|c| c.addr)).map(|c| c._super)).load(ctx, 0)); - let x620: ExtVal = (x12.load_ext::(ctx, 0) - * ((x98.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - let x621: ExtVal = (x13.load_ext::(ctx, 0) - * ((x98.map(|c| c.data_low)).map(|c| c._super)).load(ctx, 0)); - let x622: ExtVal = (x14.load_ext::(ctx, 0) - * ((x98.map(|c| c.data_high)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x623: ExtVal = (((x619 + x620) + x621) + x622); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x624: ExtVal = (x623 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x625: ExtVal = (((x98.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x624)?); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x626: ExtVal = (((x604 + x609) + x616) + x625); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(1)])).store_ext(ctx, x626); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x627: ExtVal = ((x8.map(|c| c[to_usize(1)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(0)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x628: ExtVal = (((x627 * (x617 * x624)) - (x618 * x624)) - - ((x608 * ((x97.map(|c| c.count)).map(|c| c._super)).load(ctx, 0)) * x624)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x628 - (x617 * ((x98.map(|c| c.count)).map(|c| c._super)).load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x629: ExtVal = (x15.load_ext::(ctx, 0) - * ((x99.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x630: ExtVal = (x629 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x631: ExtVal = (((x99.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x630)?); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x632: ExtVal = (x15.load_ext::(ctx, 0) - * ((x102.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x633: ExtVal = (x632 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x634: ExtVal = - (((x102.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x633)?); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x635: ExtVal = (x630 * x633); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x636: ExtVal = (((x99.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * x633); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x637: ExtVal = (x9.load_ext::(ctx, 0) - * ((x104.map(|c| c.val)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x638: ExtVal = (x637 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x639: ExtVal = - (((x104.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x638)?); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x640: ExtVal = (((x626 + x631) + x634) + x639); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(2)])).store_ext(ctx, x640); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x641: ExtVal = ((x8.map(|c| c[to_usize(2)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(1)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x642: ExtVal = (((x641 * (x635 * x638)) - (x636 * x638)) - - ((x630 * ((x102.map(|c| c.count)).map(|c| c._super)).load(ctx, 0)) * x638)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x642 - (x635 * ((x104.map(|c| c.count)).map(|c| c._super)).load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x643: ExtVal = (x9.load_ext::(ctx, 0) - * ((x105.map(|c| c.val)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x644: ExtVal = (x643 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x645: ExtVal = - (((x105.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x644)?); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x646: ExtVal = (x11.load_ext::(ctx, 0) - * ((x108.map(|c| c.addr)).map(|c| c._super)).load(ctx, 0)); - let x647: ExtVal = (x12.load_ext::(ctx, 0) - * ((x108.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - let x648: ExtVal = (x13.load_ext::(ctx, 0) - * ((x108.map(|c| c.data_low)).map(|c| c._super)).load(ctx, 0)); - let x649: ExtVal = (x14.load_ext::(ctx, 0) - * ((x108.map(|c| c.data_high)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x650: ExtVal = (((x646 + x647) + x648) + x649); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x651: ExtVal = (x650 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x652: ExtVal = - (((x108.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x651)?); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x653: ExtVal = (x644 * x651); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x654: ExtVal = (((x105.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * x651); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x655: ExtVal = (x11.load_ext::(ctx, 0) - * ((x109.map(|c| c.addr)).map(|c| c._super)).load(ctx, 0)); - let x656: ExtVal = (x12.load_ext::(ctx, 0) - * ((x109.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - let x657: ExtVal = (x13.load_ext::(ctx, 0) - * ((x109.map(|c| c.data_low)).map(|c| c._super)).load(ctx, 0)); - let x658: ExtVal = (x14.load_ext::(ctx, 0) - * ((x109.map(|c| c.data_high)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x659: ExtVal = (((x655 + x656) + x657) + x658); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x660: ExtVal = (x659 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x661: ExtVal = - (((x109.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x660)?); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x662: ExtVal = (((x640 + x645) + x652) + x661); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(3)])).store_ext(ctx, x662); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x663: ExtVal = ((x8.map(|c| c[to_usize(3)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(2)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x664: ExtVal = (((x663 * (x653 * x660)) - (x654 * x660)) - - ((x644 * ((x108.map(|c| c.count)).map(|c| c._super)).load(ctx, 0)) * x660)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x664 - (x653 * ((x109.map(|c| c.count)).map(|c| c._super)).load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x665: ExtVal = (x15.load_ext::(ctx, 0) - * ((x110.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x666: ExtVal = (x665 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x667: ExtVal = - (((x110.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x666)?); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x668: ExtVal = (x11.load_ext::(ctx, 0) - * ((x113.map(|c| c.addr)).map(|c| c._super)).load(ctx, 0)); - let x669: ExtVal = (x12.load_ext::(ctx, 0) - * ((x113.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - let x670: ExtVal = (x13.load_ext::(ctx, 0) - * ((x113.map(|c| c.data_low)).map(|c| c._super)).load(ctx, 0)); - let x671: ExtVal = (x14.load_ext::(ctx, 0) - * ((x113.map(|c| c.data_high)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x672: ExtVal = (((x668 + x669) + x670) + x671); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x673: ExtVal = (x672 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x674: ExtVal = - (((x113.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x673)?); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x675: ExtVal = (x666 * x673); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x676: ExtVal = (((x110.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * x673); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x677: ExtVal = (x11.load_ext::(ctx, 0) - * ((x114.map(|c| c.addr)).map(|c| c._super)).load(ctx, 0)); - let x678: ExtVal = (x12.load_ext::(ctx, 0) - * ((x114.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - let x679: ExtVal = (x13.load_ext::(ctx, 0) - * ((x114.map(|c| c.data_low)).map(|c| c._super)).load(ctx, 0)); - let x680: ExtVal = (x14.load_ext::(ctx, 0) - * ((x114.map(|c| c.data_high)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x681: ExtVal = (((x677 + x678) + x679) + x680); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x682: ExtVal = (x681 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x683: ExtVal = - (((x114.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x682)?); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x684: ExtVal = (((x662 + x667) + x674) + x683); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(4)])).store_ext(ctx, x684); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x685: ExtVal = ((x8.map(|c| c[to_usize(4)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(3)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x686: ExtVal = (((x685 * (x675 * x682)) - (x676 * x682)) - - ((x666 * ((x113.map(|c| c.count)).map(|c| c._super)).load(ctx, 0)) * x682)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x686 - (x675 * ((x114.map(|c| c.count)).map(|c| c._super)).load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x687: ExtVal = (x15.load_ext::(ctx, 0) - * ((x115.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x688: ExtVal = (x687 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x689: ExtVal = - (((x115.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x688)?); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x690: ExtVal = (x11.load_ext::(ctx, 0) - * ((x118.map(|c| c.addr)).map(|c| c._super)).load(ctx, 0)); - let x691: ExtVal = (x12.load_ext::(ctx, 0) - * ((x118.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - let x692: ExtVal = (x13.load_ext::(ctx, 0) - * ((x118.map(|c| c.data_low)).map(|c| c._super)).load(ctx, 0)); - let x693: ExtVal = (x14.load_ext::(ctx, 0) - * ((x118.map(|c| c.data_high)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x694: ExtVal = (((x690 + x691) + x692) + x693); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x695: ExtVal = (x694 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x696: ExtVal = - (((x118.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x695)?); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x697: ExtVal = (x688 * x695); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x698: ExtVal = (((x115.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * x695); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x699: ExtVal = (x11.load_ext::(ctx, 0) - * ((x119.map(|c| c.addr)).map(|c| c._super)).load(ctx, 0)); - let x700: ExtVal = (x12.load_ext::(ctx, 0) - * ((x119.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - let x701: ExtVal = (x13.load_ext::(ctx, 0) - * ((x119.map(|c| c.data_low)).map(|c| c._super)).load(ctx, 0)); - let x702: ExtVal = (x14.load_ext::(ctx, 0) - * ((x119.map(|c| c.data_high)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x703: ExtVal = (((x699 + x700) + x701) + x702); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x704: ExtVal = (x703 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x705: ExtVal = - (((x119.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x704)?); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x706: ExtVal = (((x684 + x689) + x696) + x705); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(5)])).store_ext(ctx, x706); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x707: ExtVal = ((x8.map(|c| c[to_usize(5)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(4)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x708: ExtVal = (((x707 * (x697 * x704)) - (x698 * x704)) - - ((x688 * ((x118.map(|c| c.count)).map(|c| c._super)).load(ctx, 0)) * x704)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x708 - (x697 * ((x119.map(|c| c.count)).map(|c| c._super)).load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x709: ExtVal = (x15.load_ext::(ctx, 0) - * ((x120.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x710: ExtVal = (x709 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x711: ExtVal = - (((x120.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x710)?); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x712: BoundLayout = - (((x121.map(|c| c[to_usize(0)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x713: BoundLayout = - (((x121.map(|c| c[to_usize(0)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x714: ExtVal = - ((x9.load_ext::(ctx, 0) * x713.load(ctx, 0)) + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x715: ExtVal = ((x706 + x711) + (x712.load(ctx, 0) * inv_0(x714)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x716: ExtVal = (x710 * x714); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x717: ExtVal = (((x120.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * x714); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x718: BoundLayout = - (((x121.map(|c| c[to_usize(1)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x719: BoundLayout = - (((x121.map(|c| c[to_usize(1)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x720: ExtVal = - ((x9.load_ext::(ctx, 0) * x719.load(ctx, 0)) + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x721: ExtVal = (x715 + (x718.load(ctx, 0) * inv_0(x720)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(6)])).store_ext(ctx, x721); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x722: ExtVal = ((x8.map(|c| c[to_usize(6)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(5)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x723: ExtVal = - (((x722 * (x716 * x720)) - (x717 * x720)) - ((x710 * x712.load(ctx, 0)) * x720)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x723 - (x716 * x718.load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x724: BoundLayout = - (((x121.map(|c| c[to_usize(2)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x725: BoundLayout = - (((x121.map(|c| c[to_usize(2)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x726: ExtVal = - ((x9.load_ext::(ctx, 0) * x725.load(ctx, 0)) + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x727: BoundLayout = - (((x121.map(|c| c[to_usize(3)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x728: BoundLayout = - (((x121.map(|c| c[to_usize(3)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x729: ExtVal = - ((x9.load_ext::(ctx, 0) * x728.load(ctx, 0)) + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x730: ExtVal = - ((x721 + (x724.load(ctx, 0) * inv_0(x726)?)) + (x727.load(ctx, 0) * inv_0(x729)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x731: ExtVal = (x726 * x729); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x732: BoundLayout = - (((x121.map(|c| c[to_usize(4)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x733: BoundLayout = - (((x121.map(|c| c[to_usize(4)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x734: ExtVal = - ((x9.load_ext::(ctx, 0) * x733.load(ctx, 0)) + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x735: ExtVal = (x730 + (x732.load(ctx, 0) * inv_0(x734)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x736: ExtVal = ((x724.load(ctx, 0) * x729) * x734); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(7)])).store_ext(ctx, x735); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x737: ExtVal = ((x8.map(|c| c[to_usize(7)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(6)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x738: ExtVal = (((x737 * (x731 * x734)) - x736) - ((x726 * x727.load(ctx, 0)) * x734)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x738 - (x731 * x732.load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:122 - (x8.map(|c| c[to_usize(18)])).store_ext(ctx, x735); - // zirgen/dsl/passes/GenerateAccum.cpp:124 - let x739: ExtVal = ((x8.map(|c| c[to_usize(18)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(7)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:125 - eqz!(x739, "zirgen/dsl/passes/GenerateAccum.cpp:125"); - x295 = x51; - } else if is_true(((x6.map(|c| c[to_usize(3)])).map(|c| c._super)).load(ctx, 0)) { - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x740: ExtVal = (x15.load_ext::(ctx, 0) - * ((x126.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x741: ExtVal = (x740 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x742: ExtVal = - (((x126.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x741)?); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x743: ExtVal = - ((x8.map(|c| c[to_usize(18)])).load_unchecked_ext::(ctx, 1) + x742); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x744: ExtVal = (x9.load_ext::(ctx, 0) - * ((x128.map(|c| c.val)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x745: ExtVal = (x744 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x746: ExtVal = - (((x128.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x745)?); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x747: ExtVal = (x741 * x745); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x748: ExtVal = (((x126.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * x745); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x749: ExtVal = (x9.load_ext::(ctx, 0) - * ((x129.map(|c| c.val)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x750: ExtVal = (x749 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x751: ExtVal = - (((x129.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x750)?); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x752: ExtVal = ((x743 + x746) + x751); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(0)])).store_ext(ctx, x752); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x753: ExtVal = ((x8.map(|c| c[to_usize(0)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(18)])).load_unchecked_ext::(ctx, 1)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x754: ExtVal = (((x753 * (x747 * x750)) - (x748 * x750)) - - ((x741 * ((x128.map(|c| c.count)).map(|c| c._super)).load(ctx, 0)) * x750)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x754 - (x747 * ((x129.map(|c| c.count)).map(|c| c._super)).load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x755: ExtVal = (x11.load_ext::(ctx, 0) - * ((x132.map(|c| c.addr)).map(|c| c._super)).load(ctx, 0)); - let x756: ExtVal = (x12.load_ext::(ctx, 0) - * ((x132.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - let x757: ExtVal = (x13.load_ext::(ctx, 0) - * ((x132.map(|c| c.data_low)).map(|c| c._super)).load(ctx, 0)); - let x758: ExtVal = (x14.load_ext::(ctx, 0) - * ((x132.map(|c| c.data_high)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x759: ExtVal = (((x755 + x756) + x757) + x758); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x760: ExtVal = (x759 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x761: ExtVal = - (((x132.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x760)?); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x762: ExtVal = (x11.load_ext::(ctx, 0) - * ((x133.map(|c| c.addr)).map(|c| c._super)).load(ctx, 0)); - let x763: ExtVal = (x12.load_ext::(ctx, 0) - * ((x133.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - let x764: ExtVal = (x13.load_ext::(ctx, 0) - * ((x133.map(|c| c.data_low)).map(|c| c._super)).load(ctx, 0)); - let x765: ExtVal = (x14.load_ext::(ctx, 0) - * ((x133.map(|c| c.data_high)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x766: ExtVal = (((x762 + x763) + x764) + x765); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x767: ExtVal = (x766 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x768: ExtVal = - (((x133.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x767)?); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x769: ExtVal = (x760 * x767); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x770: ExtVal = (((x132.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * x767); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x771: ExtVal = (x15.load_ext::(ctx, 0) - * ((x134.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x772: ExtVal = (x771 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x773: ExtVal = - (((x134.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x772)?); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x774: ExtVal = (((x752 + x761) + x768) + x773); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(1)])).store_ext(ctx, x774); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x775: ExtVal = ((x8.map(|c| c[to_usize(1)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(0)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x776: ExtVal = (((x775 * (x769 * x772)) - (x770 * x772)) - - ((x760 * ((x133.map(|c| c.count)).map(|c| c._super)).load(ctx, 0)) * x772)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x776 - (x769 * ((x134.map(|c| c.count)).map(|c| c._super)).load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x777: ExtVal = (x11.load_ext::(ctx, 0) - * ((x137.map(|c| c.addr)).map(|c| c._super)).load(ctx, 0)); - let x778: ExtVal = (x12.load_ext::(ctx, 0) - * ((x137.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - let x779: ExtVal = (x13.load_ext::(ctx, 0) - * ((x137.map(|c| c.data_low)).map(|c| c._super)).load(ctx, 0)); - let x780: ExtVal = (x14.load_ext::(ctx, 0) - * ((x137.map(|c| c.data_high)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x781: ExtVal = (((x777 + x778) + x779) + x780); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x782: ExtVal = (x781 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x783: ExtVal = - (((x137.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x782)?); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x784: ExtVal = (x11.load_ext::(ctx, 0) - * ((x138.map(|c| c.addr)).map(|c| c._super)).load(ctx, 0)); - let x785: ExtVal = (x12.load_ext::(ctx, 0) - * ((x138.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - let x786: ExtVal = (x13.load_ext::(ctx, 0) - * ((x138.map(|c| c.data_low)).map(|c| c._super)).load(ctx, 0)); - let x787: ExtVal = (x14.load_ext::(ctx, 0) - * ((x138.map(|c| c.data_high)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x788: ExtVal = (((x784 + x785) + x786) + x787); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x789: ExtVal = (x788 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x790: ExtVal = - (((x138.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x789)?); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x791: ExtVal = (x782 * x789); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x792: ExtVal = (((x137.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * x789); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x793: ExtVal = (x15.load_ext::(ctx, 0) - * ((x139.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x794: ExtVal = (x793 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x795: ExtVal = - (((x139.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x794)?); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x796: ExtVal = (((x774 + x783) + x790) + x795); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(2)])).store_ext(ctx, x796); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x797: ExtVal = ((x8.map(|c| c[to_usize(2)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(1)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x798: ExtVal = (((x797 * (x791 * x794)) - (x792 * x794)) - - ((x782 * ((x138.map(|c| c.count)).map(|c| c._super)).load(ctx, 0)) * x794)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x798 - (x791 * ((x139.map(|c| c.count)).map(|c| c._super)).load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x799: ExtVal = (x11.load_ext::(ctx, 0) - * ((x142.map(|c| c.addr)).map(|c| c._super)).load(ctx, 0)); - let x800: ExtVal = (x12.load_ext::(ctx, 0) - * ((x142.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - let x801: ExtVal = (x13.load_ext::(ctx, 0) - * ((x142.map(|c| c.data_low)).map(|c| c._super)).load(ctx, 0)); - let x802: ExtVal = (x14.load_ext::(ctx, 0) - * ((x142.map(|c| c.data_high)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x803: ExtVal = (((x799 + x800) + x801) + x802); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x804: ExtVal = (x803 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x805: ExtVal = - (((x142.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x804)?); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x806: ExtVal = (x11.load_ext::(ctx, 0) - * ((x143.map(|c| c.addr)).map(|c| c._super)).load(ctx, 0)); - let x807: ExtVal = (x12.load_ext::(ctx, 0) - * ((x143.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - let x808: ExtVal = (x13.load_ext::(ctx, 0) - * ((x143.map(|c| c.data_low)).map(|c| c._super)).load(ctx, 0)); - let x809: ExtVal = (x14.load_ext::(ctx, 0) - * ((x143.map(|c| c.data_high)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x810: ExtVal = (((x806 + x807) + x808) + x809); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x811: ExtVal = (x810 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x812: ExtVal = - (((x143.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x811)?); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x813: ExtVal = (x804 * x811); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x814: ExtVal = (((x142.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * x811); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x815: ExtVal = (x15.load_ext::(ctx, 0) - * ((x144.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x816: ExtVal = (x815 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x817: ExtVal = - (((x144.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x816)?); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x818: ExtVal = (((x796 + x805) + x812) + x817); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(3)])).store_ext(ctx, x818); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x819: ExtVal = ((x8.map(|c| c[to_usize(3)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(2)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x820: ExtVal = (((x819 * (x813 * x816)) - (x814 * x816)) - - ((x804 * ((x143.map(|c| c.count)).map(|c| c._super)).load(ctx, 0)) * x816)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x820 - (x813 * ((x144.map(|c| c.count)).map(|c| c._super)).load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x821: BoundLayout = - (((x146.map(|c| c[to_usize(0)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x822: BoundLayout = - (((x146.map(|c| c[to_usize(0)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x823: ExtVal = - ((x9.load_ext::(ctx, 0) * x822.load(ctx, 0)) + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x824: BoundLayout = - (((x146.map(|c| c[to_usize(1)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x825: BoundLayout = - (((x146.map(|c| c[to_usize(1)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x826: ExtVal = - ((x9.load_ext::(ctx, 0) * x825.load(ctx, 0)) + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x827: ExtVal = - ((x818 + (x821.load(ctx, 0) * inv_0(x823)?)) + (x824.load(ctx, 0) * inv_0(x826)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x828: ExtVal = (x823 * x826); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x829: BoundLayout = - (((x146.map(|c| c[to_usize(2)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x830: BoundLayout = - (((x146.map(|c| c[to_usize(2)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x831: ExtVal = - ((x9.load_ext::(ctx, 0) * x830.load(ctx, 0)) + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x832: ExtVal = (x827 + (x829.load(ctx, 0) * inv_0(x831)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x833: ExtVal = ((x821.load(ctx, 0) * x826) * x831); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(4)])).store_ext(ctx, x832); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x834: ExtVal = ((x8.map(|c| c[to_usize(4)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(3)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x835: ExtVal = (((x834 * (x828 * x831)) - x833) - ((x823 * x824.load(ctx, 0)) * x831)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x835 - (x828 * x829.load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x836: BoundLayout = - (((x146.map(|c| c[to_usize(3)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x837: BoundLayout = - (((x146.map(|c| c[to_usize(3)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x838: ExtVal = - ((x9.load_ext::(ctx, 0) * x837.load(ctx, 0)) + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x839: BoundLayout = - (((x146.map(|c| c[to_usize(4)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x840: BoundLayout = - (((x146.map(|c| c[to_usize(4)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x841: ExtVal = - ((x9.load_ext::(ctx, 0) * x840.load(ctx, 0)) + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x842: ExtVal = - ((x832 + (x836.load(ctx, 0) * inv_0(x838)?)) + (x839.load(ctx, 0) * inv_0(x841)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x843: ExtVal = (x838 * x841); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x844: BoundLayout = - (((x146.map(|c| c[to_usize(5)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x845: BoundLayout = - (((x146.map(|c| c[to_usize(5)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x846: ExtVal = - ((x9.load_ext::(ctx, 0) * x845.load(ctx, 0)) + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x847: ExtVal = (x842 + (x844.load(ctx, 0) * inv_0(x846)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x848: ExtVal = ((x836.load(ctx, 0) * x841) * x846); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(5)])).store_ext(ctx, x847); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x849: ExtVal = ((x8.map(|c| c[to_usize(5)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(4)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x850: ExtVal = (((x849 * (x843 * x846)) - x848) - ((x838 * x839.load(ctx, 0)) * x846)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x850 - (x843 * x844.load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x851: BoundLayout = - (((x147.map(|c| c[to_usize(0)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x852: BoundLayout = - (((x147.map(|c| c[to_usize(0)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x853: ExtVal = ((x123.load_ext::(ctx, 0) * x852.load(ctx, 0)) - + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x854: BoundLayout = - (((x147.map(|c| c[to_usize(1)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x855: BoundLayout = - (((x147.map(|c| c[to_usize(1)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x856: ExtVal = ((x123.load_ext::(ctx, 0) * x855.load(ctx, 0)) - + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x857: ExtVal = - ((x847 + (x851.load(ctx, 0) * inv_0(x853)?)) + (x854.load(ctx, 0) * inv_0(x856)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x858: ExtVal = (x853 * x856); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x859: BoundLayout = - (((x147.map(|c| c[to_usize(2)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x860: BoundLayout = - (((x147.map(|c| c[to_usize(2)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x861: ExtVal = ((x123.load_ext::(ctx, 0) * x860.load(ctx, 0)) - + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x862: ExtVal = (x857 + (x859.load(ctx, 0) * inv_0(x861)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x863: ExtVal = ((x851.load(ctx, 0) * x856) * x861); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(6)])).store_ext(ctx, x862); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x864: ExtVal = ((x8.map(|c| c[to_usize(6)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(5)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x865: ExtVal = (((x864 * (x858 * x861)) - x863) - ((x853 * x854.load(ctx, 0)) * x861)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x865 - (x858 * x859.load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x866: BoundLayout = - (((x147.map(|c| c[to_usize(3)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x867: BoundLayout = - (((x147.map(|c| c[to_usize(3)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x868: ExtVal = ((x123.load_ext::(ctx, 0) * x867.load(ctx, 0)) - + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x869: BoundLayout = - (((x147.map(|c| c[to_usize(4)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x870: BoundLayout = - (((x147.map(|c| c[to_usize(4)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x871: ExtVal = ((x123.load_ext::(ctx, 0) * x870.load(ctx, 0)) - + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x872: ExtVal = - ((x862 + (x866.load(ctx, 0) * inv_0(x868)?)) + (x869.load(ctx, 0) * inv_0(x871)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x873: ExtVal = (x868 * x871); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x874: BoundLayout = - (((x147.map(|c| c[to_usize(5)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x875: BoundLayout = - (((x147.map(|c| c[to_usize(5)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x876: ExtVal = ((x123.load_ext::(ctx, 0) * x875.load(ctx, 0)) - + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x877: ExtVal = (x872 + (x874.load(ctx, 0) * inv_0(x876)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x878: ExtVal = ((x866.load(ctx, 0) * x871) * x876); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(7)])).store_ext(ctx, x877); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x879: ExtVal = ((x8.map(|c| c[to_usize(7)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(6)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x880: ExtVal = (((x879 * (x873 * x876)) - x878) - ((x868 * x869.load(ctx, 0)) * x876)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x880 - (x873 * x874.load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x881: BoundLayout = - (((x147.map(|c| c[to_usize(6)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x882: BoundLayout = - (((x147.map(|c| c[to_usize(6)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x883: ExtVal = ((x123.load_ext::(ctx, 0) * x882.load(ctx, 0)) - + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x884: BoundLayout = - (((x147.map(|c| c[to_usize(7)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x885: BoundLayout = - (((x147.map(|c| c[to_usize(7)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x886: ExtVal = ((x123.load_ext::(ctx, 0) * x885.load(ctx, 0)) - + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x887: ExtVal = - ((x877 + (x881.load(ctx, 0) * inv_0(x883)?)) + (x884.load(ctx, 0) * inv_0(x886)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x888: ExtVal = (x883 * x886); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x889: BoundLayout = - (((x147.map(|c| c[to_usize(8)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x890: BoundLayout = - (((x147.map(|c| c[to_usize(8)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x891: ExtVal = ((x123.load_ext::(ctx, 0) * x890.load(ctx, 0)) - + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x892: ExtVal = (x887 + (x889.load(ctx, 0) * inv_0(x891)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x893: ExtVal = ((x881.load(ctx, 0) * x886) * x891); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(8)])).store_ext(ctx, x892); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x894: ExtVal = ((x8.map(|c| c[to_usize(8)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(7)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x895: ExtVal = (((x894 * (x888 * x891)) - x893) - ((x883 * x884.load(ctx, 0)) * x891)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x895 - (x888 * x889.load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x896: BoundLayout = - (((x147.map(|c| c[to_usize(9)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x897: BoundLayout = - (((x147.map(|c| c[to_usize(9)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x898: ExtVal = ((x123.load_ext::(ctx, 0) * x897.load(ctx, 0)) - + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x899: BoundLayout = - (((x147.map(|c| c[to_usize(10)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x900: BoundLayout = - (((x147.map(|c| c[to_usize(10)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x901: ExtVal = ((x123.load_ext::(ctx, 0) * x900.load(ctx, 0)) - + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x902: ExtVal = - ((x892 + (x896.load(ctx, 0) * inv_0(x898)?)) + (x899.load(ctx, 0) * inv_0(x901)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x903: ExtVal = (x898 * x901); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x904: BoundLayout = - (((x147.map(|c| c[to_usize(11)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x905: BoundLayout = - (((x147.map(|c| c[to_usize(11)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x906: ExtVal = ((x123.load_ext::(ctx, 0) * x905.load(ctx, 0)) - + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x907: ExtVal = (x902 + (x904.load(ctx, 0) * inv_0(x906)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x908: ExtVal = ((x896.load(ctx, 0) * x901) * x906); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(9)])).store_ext(ctx, x907); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x909: ExtVal = ((x8.map(|c| c[to_usize(9)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(8)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x910: ExtVal = (((x909 * (x903 * x906)) - x908) - ((x898 * x899.load(ctx, 0)) * x906)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x910 - (x903 * x904.load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x911: BoundLayout = - (((x147.map(|c| c[to_usize(12)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x912: BoundLayout = - (((x147.map(|c| c[to_usize(12)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x913: ExtVal = ((x123.load_ext::(ctx, 0) * x912.load(ctx, 0)) - + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x914: ExtVal = (x11.load_ext::(ctx, 0) - * ((x150.map(|c| c.addr)).map(|c| c._super)).load(ctx, 0)); - let x915: ExtVal = (x12.load_ext::(ctx, 0) - * ((x150.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - let x916: ExtVal = (x13.load_ext::(ctx, 0) - * ((x150.map(|c| c.data_low)).map(|c| c._super)).load(ctx, 0)); - let x917: ExtVal = (x14.load_ext::(ctx, 0) - * ((x150.map(|c| c.data_high)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x918: ExtVal = (((x914 + x915) + x916) + x917); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x919: ExtVal = (x918 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x920: ExtVal = - (((x150.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x919)?); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x921: ExtVal = (x913 * x919); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x922: ExtVal = (x11.load_ext::(ctx, 0) - * ((x151.map(|c| c.addr)).map(|c| c._super)).load(ctx, 0)); - let x923: ExtVal = (x12.load_ext::(ctx, 0) - * ((x151.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - let x924: ExtVal = (x13.load_ext::(ctx, 0) - * ((x151.map(|c| c.data_low)).map(|c| c._super)).load(ctx, 0)); - let x925: ExtVal = (x14.load_ext::(ctx, 0) - * ((x151.map(|c| c.data_high)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x926: ExtVal = (((x922 + x923) + x924) + x925); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x927: ExtVal = (x926 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x928: ExtVal = - (((x151.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x927)?); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x929: ExtVal = (((x907 + (x911.load(ctx, 0) * inv_0(x913)?)) + x920) + x928); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x930: ExtVal = ((x911.load(ctx, 0) * x919) * x927); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(10)])).store_ext(ctx, x929); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x931: ExtVal = ((x8.map(|c| c[to_usize(10)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(9)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x932: ExtVal = (((x931 * (x921 * x927)) - x930) - - ((x913 * ((x150.map(|c| c.count)).map(|c| c._super)).load(ctx, 0)) * x927)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x932 - (x921 * ((x151.map(|c| c.count)).map(|c| c._super)).load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x933: ExtVal = (x15.load_ext::(ctx, 0) - * ((x152.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x934: ExtVal = (x933 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x935: ExtVal = - (((x152.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x934)?); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x936: ExtVal = (x9.load_ext::(ctx, 0) - * ((x154.map(|c| c.val)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x937: ExtVal = (x936 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x938: ExtVal = - (((x154.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x937)?); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x939: ExtVal = (x934 * x937); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x940: ExtVal = (((x152.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * x937); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x941: ExtVal = (x9.load_ext::(ctx, 0) - * ((x155.map(|c| c.val)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x942: ExtVal = (x941 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x943: ExtVal = - (((x155.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x942)?); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x944: ExtVal = (((x929 + x935) + x938) + x943); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(11)])).store_ext(ctx, x944); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x945: ExtVal = ((x8.map(|c| c[to_usize(11)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(10)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x946: ExtVal = (((x945 * (x939 * x942)) - (x940 * x942)) - - ((x934 * ((x154.map(|c| c.count)).map(|c| c._super)).load(ctx, 0)) * x942)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x946 - (x939 * ((x155.map(|c| c.count)).map(|c| c._super)).load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:122 - (x8.map(|c| c[to_usize(18)])).store_ext(ctx, x944); - // zirgen/dsl/passes/GenerateAccum.cpp:124 - let x947: ExtVal = ((x8.map(|c| c[to_usize(18)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(11)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:125 - eqz!(x947, "zirgen/dsl/passes/GenerateAccum.cpp:125"); - x295 = x51; - } else if is_true(((x6.map(|c| c[to_usize(4)])).map(|c| c._super)).load(ctx, 0)) { - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x948: ExtVal = (x15.load_ext::(ctx, 0) - * ((x159.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x949: ExtVal = (x948 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x950: ExtVal = - (((x159.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x949)?); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x951: ExtVal = - ((x8.map(|c| c[to_usize(18)])).load_unchecked_ext::(ctx, 1) + x950); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x952: ExtVal = (x9.load_ext::(ctx, 0) - * ((x161.map(|c| c.val)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x953: ExtVal = (x952 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x954: ExtVal = - (((x161.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x953)?); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x955: ExtVal = (x949 * x953); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x956: ExtVal = (((x159.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * x953); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x957: ExtVal = (x9.load_ext::(ctx, 0) - * ((x162.map(|c| c.val)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x958: ExtVal = (x957 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x959: ExtVal = - (((x162.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x958)?); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x960: ExtVal = ((x951 + x954) + x959); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(0)])).store_ext(ctx, x960); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x961: ExtVal = ((x8.map(|c| c[to_usize(0)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(18)])).load_unchecked_ext::(ctx, 1)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x962: ExtVal = (((x961 * (x955 * x958)) - (x956 * x958)) - - ((x949 * ((x161.map(|c| c.count)).map(|c| c._super)).load(ctx, 0)) * x958)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x962 - (x955 * ((x162.map(|c| c.count)).map(|c| c._super)).load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x963: ExtVal = (x11.load_ext::(ctx, 0) - * ((x165.map(|c| c.addr)).map(|c| c._super)).load(ctx, 0)); - let x964: ExtVal = (x12.load_ext::(ctx, 0) - * ((x165.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - let x965: ExtVal = (x13.load_ext::(ctx, 0) - * ((x165.map(|c| c.data_low)).map(|c| c._super)).load(ctx, 0)); - let x966: ExtVal = (x14.load_ext::(ctx, 0) - * ((x165.map(|c| c.data_high)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x967: ExtVal = (((x963 + x964) + x965) + x966); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x968: ExtVal = (x967 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x969: ExtVal = - (((x165.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x968)?); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x970: ExtVal = (x11.load_ext::(ctx, 0) - * ((x166.map(|c| c.addr)).map(|c| c._super)).load(ctx, 0)); - let x971: ExtVal = (x12.load_ext::(ctx, 0) - * ((x166.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - let x972: ExtVal = (x13.load_ext::(ctx, 0) - * ((x166.map(|c| c.data_low)).map(|c| c._super)).load(ctx, 0)); - let x973: ExtVal = (x14.load_ext::(ctx, 0) - * ((x166.map(|c| c.data_high)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x974: ExtVal = (((x970 + x971) + x972) + x973); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x975: ExtVal = (x974 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x976: ExtVal = - (((x166.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x975)?); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x977: ExtVal = (x968 * x975); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x978: ExtVal = (((x165.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * x975); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x979: ExtVal = (x15.load_ext::(ctx, 0) - * ((x167.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x980: ExtVal = (x979 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x981: ExtVal = - (((x167.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x980)?); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x982: ExtVal = (((x960 + x969) + x976) + x981); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(1)])).store_ext(ctx, x982); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x983: ExtVal = ((x8.map(|c| c[to_usize(1)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(0)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x984: ExtVal = (((x983 * (x977 * x980)) - (x978 * x980)) - - ((x968 * ((x166.map(|c| c.count)).map(|c| c._super)).load(ctx, 0)) * x980)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x984 - (x977 * ((x167.map(|c| c.count)).map(|c| c._super)).load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x985: ExtVal = (x11.load_ext::(ctx, 0) - * ((x170.map(|c| c.addr)).map(|c| c._super)).load(ctx, 0)); - let x986: ExtVal = (x12.load_ext::(ctx, 0) - * ((x170.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - let x987: ExtVal = (x13.load_ext::(ctx, 0) - * ((x170.map(|c| c.data_low)).map(|c| c._super)).load(ctx, 0)); - let x988: ExtVal = (x14.load_ext::(ctx, 0) - * ((x170.map(|c| c.data_high)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x989: ExtVal = (((x985 + x986) + x987) + x988); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x990: ExtVal = (x989 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x991: ExtVal = - (((x170.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x990)?); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x992: ExtVal = (x11.load_ext::(ctx, 0) - * ((x171.map(|c| c.addr)).map(|c| c._super)).load(ctx, 0)); - let x993: ExtVal = (x12.load_ext::(ctx, 0) - * ((x171.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - let x994: ExtVal = (x13.load_ext::(ctx, 0) - * ((x171.map(|c| c.data_low)).map(|c| c._super)).load(ctx, 0)); - let x995: ExtVal = (x14.load_ext::(ctx, 0) - * ((x171.map(|c| c.data_high)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x996: ExtVal = (((x992 + x993) + x994) + x995); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x997: ExtVal = (x996 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x998: ExtVal = - (((x171.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x997)?); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x999: ExtVal = (x990 * x997); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x1000: ExtVal = (((x170.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * x997); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x1001: ExtVal = (x15.load_ext::(ctx, 0) - * ((x172.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1002: ExtVal = (x1001 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x1003: ExtVal = - (((x172.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x1002)?); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x1004: ExtVal = (((x982 + x991) + x998) + x1003); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(2)])).store_ext(ctx, x1004); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x1005: ExtVal = ((x8.map(|c| c[to_usize(2)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(1)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x1006: ExtVal = (((x1005 * (x999 * x1002)) - (x1000 * x1002)) - - ((x990 * ((x171.map(|c| c.count)).map(|c| c._super)).load(ctx, 0)) * x1002)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x1006 - (x999 * ((x172.map(|c| c.count)).map(|c| c._super)).load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x1007: ExtVal = (x11.load_ext::(ctx, 0) - * ((x175.map(|c| c.addr)).map(|c| c._super)).load(ctx, 0)); - let x1008: ExtVal = (x12.load_ext::(ctx, 0) - * ((x175.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - let x1009: ExtVal = (x13.load_ext::(ctx, 0) - * ((x175.map(|c| c.data_low)).map(|c| c._super)).load(ctx, 0)); - let x1010: ExtVal = (x14.load_ext::(ctx, 0) - * ((x175.map(|c| c.data_high)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x1011: ExtVal = (((x1007 + x1008) + x1009) + x1010); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1012: ExtVal = (x1011 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x1013: ExtVal = - (((x175.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x1012)?); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x1014: ExtVal = (x11.load_ext::(ctx, 0) - * ((x176.map(|c| c.addr)).map(|c| c._super)).load(ctx, 0)); - let x1015: ExtVal = (x12.load_ext::(ctx, 0) - * ((x176.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - let x1016: ExtVal = (x13.load_ext::(ctx, 0) - * ((x176.map(|c| c.data_low)).map(|c| c._super)).load(ctx, 0)); - let x1017: ExtVal = (x14.load_ext::(ctx, 0) - * ((x176.map(|c| c.data_high)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x1018: ExtVal = (((x1014 + x1015) + x1016) + x1017); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1019: ExtVal = (x1018 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x1020: ExtVal = - (((x176.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x1019)?); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x1021: ExtVal = (x1012 * x1019); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x1022: ExtVal = (((x175.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * x1019); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x1023: ExtVal = (x15.load_ext::(ctx, 0) - * ((x177.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1024: ExtVal = (x1023 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x1025: ExtVal = - (((x177.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x1024)?); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x1026: ExtVal = (((x1004 + x1013) + x1020) + x1025); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(3)])).store_ext(ctx, x1026); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x1027: ExtVal = ((x8.map(|c| c[to_usize(3)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(2)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x1028: ExtVal = (((x1027 * (x1021 * x1024)) - (x1022 * x1024)) - - ((x1012 * ((x176.map(|c| c.count)).map(|c| c._super)).load(ctx, 0)) * x1024)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x1028 - (x1021 * ((x177.map(|c| c.count)).map(|c| c._super)).load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1029: BoundLayout = - (((x179.map(|c| c[to_usize(0)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1030: BoundLayout = - (((x179.map(|c| c[to_usize(0)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1031: ExtVal = - ((x9.load_ext::(ctx, 0) * x1030.load(ctx, 0)) + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1032: BoundLayout = - (((x179.map(|c| c[to_usize(1)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1033: BoundLayout = - (((x179.map(|c| c[to_usize(1)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1034: ExtVal = - ((x9.load_ext::(ctx, 0) * x1033.load(ctx, 0)) + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x1035: ExtVal = - ((x1026 + (x1029.load(ctx, 0) * inv_0(x1031)?)) + (x1032.load(ctx, 0) * inv_0(x1034)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x1036: ExtVal = (x1031 * x1034); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1037: BoundLayout = - (((x179.map(|c| c[to_usize(2)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1038: BoundLayout = - (((x179.map(|c| c[to_usize(2)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1039: ExtVal = - ((x9.load_ext::(ctx, 0) * x1038.load(ctx, 0)) + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x1040: ExtVal = (x1035 + (x1037.load(ctx, 0) * inv_0(x1039)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x1041: ExtVal = ((x1029.load(ctx, 0) * x1034) * x1039); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(4)])).store_ext(ctx, x1040); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x1042: ExtVal = ((x8.map(|c| c[to_usize(4)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(3)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x1043: ExtVal = - (((x1042 * (x1036 * x1039)) - x1041) - ((x1031 * x1032.load(ctx, 0)) * x1039)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x1043 - (x1036 * x1037.load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1044: BoundLayout = - (((x179.map(|c| c[to_usize(3)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1045: BoundLayout = - (((x179.map(|c| c[to_usize(3)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1046: ExtVal = - ((x9.load_ext::(ctx, 0) * x1045.load(ctx, 0)) + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1047: BoundLayout = - (((x179.map(|c| c[to_usize(4)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1048: BoundLayout = - (((x179.map(|c| c[to_usize(4)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1049: ExtVal = - ((x9.load_ext::(ctx, 0) * x1048.load(ctx, 0)) + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x1050: ExtVal = - ((x1040 + (x1044.load(ctx, 0) * inv_0(x1046)?)) + (x1047.load(ctx, 0) * inv_0(x1049)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x1051: ExtVal = (x1046 * x1049); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1052: BoundLayout = - (((x179.map(|c| c[to_usize(5)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1053: BoundLayout = - (((x179.map(|c| c[to_usize(5)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1054: ExtVal = - ((x9.load_ext::(ctx, 0) * x1053.load(ctx, 0)) + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x1055: ExtVal = (x1050 + (x1052.load(ctx, 0) * inv_0(x1054)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x1056: ExtVal = ((x1044.load(ctx, 0) * x1049) * x1054); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(5)])).store_ext(ctx, x1055); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x1057: ExtVal = ((x8.map(|c| c[to_usize(5)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(4)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x1058: ExtVal = - (((x1057 * (x1051 * x1054)) - x1056) - ((x1046 * x1047.load(ctx, 0)) * x1054)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x1058 - (x1051 * x1052.load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1059: BoundLayout = - (((x179.map(|c| c[to_usize(6)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1060: BoundLayout = - (((x179.map(|c| c[to_usize(6)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1061: ExtVal = - ((x9.load_ext::(ctx, 0) * x1060.load(ctx, 0)) + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1062: BoundLayout = - (((x179.map(|c| c[to_usize(7)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1063: BoundLayout = - (((x179.map(|c| c[to_usize(7)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1064: ExtVal = - ((x9.load_ext::(ctx, 0) * x1063.load(ctx, 0)) + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x1065: ExtVal = - ((x1055 + (x1059.load(ctx, 0) * inv_0(x1061)?)) + (x1062.load(ctx, 0) * inv_0(x1064)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x1066: ExtVal = (x1061 * x1064); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1067: BoundLayout = - (((x179.map(|c| c[to_usize(8)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1068: BoundLayout = - (((x179.map(|c| c[to_usize(8)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1069: ExtVal = - ((x9.load_ext::(ctx, 0) * x1068.load(ctx, 0)) + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x1070: ExtVal = (x1065 + (x1067.load(ctx, 0) * inv_0(x1069)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x1071: ExtVal = ((x1059.load(ctx, 0) * x1064) * x1069); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(6)])).store_ext(ctx, x1070); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x1072: ExtVal = ((x8.map(|c| c[to_usize(6)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(5)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x1073: ExtVal = - (((x1072 * (x1066 * x1069)) - x1071) - ((x1061 * x1062.load(ctx, 0)) * x1069)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x1073 - (x1066 * x1067.load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1074: BoundLayout = - (((x180.map(|c| c[to_usize(0)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1075: BoundLayout = - (((x180.map(|c| c[to_usize(0)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1076: ExtVal = ((x123.load_ext::(ctx, 0) * x1075.load(ctx, 0)) - + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1077: BoundLayout = - (((x180.map(|c| c[to_usize(1)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1078: BoundLayout = - (((x180.map(|c| c[to_usize(1)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1079: ExtVal = ((x123.load_ext::(ctx, 0) * x1078.load(ctx, 0)) - + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x1080: ExtVal = - ((x1070 + (x1074.load(ctx, 0) * inv_0(x1076)?)) + (x1077.load(ctx, 0) * inv_0(x1079)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x1081: ExtVal = (x1076 * x1079); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1082: BoundLayout = - (((x180.map(|c| c[to_usize(2)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1083: BoundLayout = - (((x180.map(|c| c[to_usize(2)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1084: ExtVal = ((x123.load_ext::(ctx, 0) * x1083.load(ctx, 0)) - + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x1085: ExtVal = (x1080 + (x1082.load(ctx, 0) * inv_0(x1084)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x1086: ExtVal = ((x1074.load(ctx, 0) * x1079) * x1084); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(7)])).store_ext(ctx, x1085); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x1087: ExtVal = ((x8.map(|c| c[to_usize(7)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(6)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x1088: ExtVal = - (((x1087 * (x1081 * x1084)) - x1086) - ((x1076 * x1077.load(ctx, 0)) * x1084)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x1088 - (x1081 * x1082.load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1089: BoundLayout = - (((x180.map(|c| c[to_usize(3)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1090: BoundLayout = - (((x180.map(|c| c[to_usize(3)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1091: ExtVal = ((x123.load_ext::(ctx, 0) * x1090.load(ctx, 0)) - + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1092: BoundLayout = - (((x180.map(|c| c[to_usize(4)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1093: BoundLayout = - (((x180.map(|c| c[to_usize(4)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1094: ExtVal = ((x123.load_ext::(ctx, 0) * x1093.load(ctx, 0)) - + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x1095: ExtVal = - ((x1085 + (x1089.load(ctx, 0) * inv_0(x1091)?)) + (x1092.load(ctx, 0) * inv_0(x1094)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x1096: ExtVal = (x1091 * x1094); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1097: BoundLayout = - (((x180.map(|c| c[to_usize(5)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1098: BoundLayout = - (((x180.map(|c| c[to_usize(5)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1099: ExtVal = ((x123.load_ext::(ctx, 0) * x1098.load(ctx, 0)) - + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x1100: ExtVal = (x1095 + (x1097.load(ctx, 0) * inv_0(x1099)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x1101: ExtVal = ((x1089.load(ctx, 0) * x1094) * x1099); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(8)])).store_ext(ctx, x1100); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x1102: ExtVal = ((x8.map(|c| c[to_usize(8)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(7)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x1103: ExtVal = - (((x1102 * (x1096 * x1099)) - x1101) - ((x1091 * x1092.load(ctx, 0)) * x1099)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x1103 - (x1096 * x1097.load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1104: BoundLayout = - (((x180.map(|c| c[to_usize(6)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1105: BoundLayout = - (((x180.map(|c| c[to_usize(6)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1106: ExtVal = ((x123.load_ext::(ctx, 0) * x1105.load(ctx, 0)) - + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1107: BoundLayout = - (((x180.map(|c| c[to_usize(7)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1108: BoundLayout = - (((x180.map(|c| c[to_usize(7)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1109: ExtVal = ((x123.load_ext::(ctx, 0) * x1108.load(ctx, 0)) - + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x1110: ExtVal = - ((x1100 + (x1104.load(ctx, 0) * inv_0(x1106)?)) + (x1107.load(ctx, 0) * inv_0(x1109)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x1111: ExtVal = (x1106 * x1109); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1112: BoundLayout = - (((x180.map(|c| c[to_usize(8)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1113: BoundLayout = - (((x180.map(|c| c[to_usize(8)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1114: ExtVal = ((x123.load_ext::(ctx, 0) * x1113.load(ctx, 0)) - + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x1115: ExtVal = (x1110 + (x1112.load(ctx, 0) * inv_0(x1114)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x1116: ExtVal = ((x1104.load(ctx, 0) * x1109) * x1114); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(9)])).store_ext(ctx, x1115); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x1117: ExtVal = ((x8.map(|c| c[to_usize(9)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(8)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x1118: ExtVal = - (((x1117 * (x1111 * x1114)) - x1116) - ((x1106 * x1107.load(ctx, 0)) * x1114)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x1118 - (x1111 * x1112.load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1119: BoundLayout = - (((x180.map(|c| c[to_usize(9)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1120: BoundLayout = - (((x180.map(|c| c[to_usize(9)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1121: ExtVal = ((x123.load_ext::(ctx, 0) * x1120.load(ctx, 0)) - + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1122: BoundLayout = - (((x180.map(|c| c[to_usize(10)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1123: BoundLayout = - (((x180.map(|c| c[to_usize(10)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1124: ExtVal = ((x123.load_ext::(ctx, 0) * x1123.load(ctx, 0)) - + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x1125: ExtVal = - ((x1115 + (x1119.load(ctx, 0) * inv_0(x1121)?)) + (x1122.load(ctx, 0) * inv_0(x1124)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x1126: ExtVal = (x1121 * x1124); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1127: BoundLayout = - (((x180.map(|c| c[to_usize(11)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1128: BoundLayout = - (((x180.map(|c| c[to_usize(11)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1129: ExtVal = ((x123.load_ext::(ctx, 0) * x1128.load(ctx, 0)) - + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x1130: ExtVal = (x1125 + (x1127.load(ctx, 0) * inv_0(x1129)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x1131: ExtVal = ((x1119.load(ctx, 0) * x1124) * x1129); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(10)])).store_ext(ctx, x1130); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x1132: ExtVal = ((x8.map(|c| c[to_usize(10)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(9)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x1133: ExtVal = - (((x1132 * (x1126 * x1129)) - x1131) - ((x1121 * x1122.load(ctx, 0)) * x1129)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x1133 - (x1126 * x1127.load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1134: BoundLayout = - (((x180.map(|c| c[to_usize(12)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1135: BoundLayout = - (((x180.map(|c| c[to_usize(12)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1136: ExtVal = ((x123.load_ext::(ctx, 0) * x1135.load(ctx, 0)) - + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x1137: ExtVal = (x11.load_ext::(ctx, 0) - * ((x183.map(|c| c.addr)).map(|c| c._super)).load(ctx, 0)); - let x1138: ExtVal = (x12.load_ext::(ctx, 0) - * ((x183.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - let x1139: ExtVal = (x13.load_ext::(ctx, 0) - * ((x183.map(|c| c.data_low)).map(|c| c._super)).load(ctx, 0)); - let x1140: ExtVal = (x14.load_ext::(ctx, 0) - * ((x183.map(|c| c.data_high)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x1141: ExtVal = (((x1137 + x1138) + x1139) + x1140); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1142: ExtVal = (x1141 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x1143: ExtVal = - (((x183.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x1142)?); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x1144: ExtVal = (x1136 * x1142); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x1145: ExtVal = (x11.load_ext::(ctx, 0) - * ((x184.map(|c| c.addr)).map(|c| c._super)).load(ctx, 0)); - let x1146: ExtVal = (x12.load_ext::(ctx, 0) - * ((x184.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - let x1147: ExtVal = (x13.load_ext::(ctx, 0) - * ((x184.map(|c| c.data_low)).map(|c| c._super)).load(ctx, 0)); - let x1148: ExtVal = (x14.load_ext::(ctx, 0) - * ((x184.map(|c| c.data_high)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x1149: ExtVal = (((x1145 + x1146) + x1147) + x1148); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1150: ExtVal = (x1149 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x1151: ExtVal = - (((x184.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x1150)?); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x1152: ExtVal = (((x1130 + (x1134.load(ctx, 0) * inv_0(x1136)?)) + x1143) + x1151); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x1153: ExtVal = ((x1134.load(ctx, 0) * x1142) * x1150); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(11)])).store_ext(ctx, x1152); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x1154: ExtVal = ((x8.map(|c| c[to_usize(11)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(10)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x1155: ExtVal = (((x1154 * (x1144 * x1150)) - x1153) - - ((x1136 * ((x183.map(|c| c.count)).map(|c| c._super)).load(ctx, 0)) * x1150)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x1155 - (x1144 * ((x184.map(|c| c.count)).map(|c| c._super)).load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x1156: ExtVal = (x15.load_ext::(ctx, 0) - * ((x185.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1157: ExtVal = (x1156 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x1158: ExtVal = - (((x185.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x1157)?); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x1159: ExtVal = (x9.load_ext::(ctx, 0) - * ((x187.map(|c| c.val)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1160: ExtVal = (x1159 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x1161: ExtVal = - (((x187.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x1160)?); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x1162: ExtVal = (x1157 * x1160); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x1163: ExtVal = (((x185.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * x1160); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x1164: ExtVal = (x9.load_ext::(ctx, 0) - * ((x188.map(|c| c.val)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1165: ExtVal = (x1164 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x1166: ExtVal = - (((x188.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x1165)?); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x1167: ExtVal = (((x1152 + x1158) + x1161) + x1166); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(12)])).store_ext(ctx, x1167); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x1168: ExtVal = ((x8.map(|c| c[to_usize(12)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(11)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x1169: ExtVal = (((x1168 * (x1162 * x1165)) - (x1163 * x1165)) - - ((x1157 * ((x187.map(|c| c.count)).map(|c| c._super)).load(ctx, 0)) * x1165)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x1169 - (x1162 * ((x188.map(|c| c.count)).map(|c| c._super)).load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:122 - (x8.map(|c| c[to_usize(18)])).store_ext(ctx, x1167); - // zirgen/dsl/passes/GenerateAccum.cpp:124 - let x1170: ExtVal = ((x8.map(|c| c[to_usize(18)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(12)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:125 - eqz!(x1170, "zirgen/dsl/passes/GenerateAccum.cpp:125"); - x295 = x51; - } else if is_true(((x6.map(|c| c[to_usize(5)])).map(|c| c._super)).load(ctx, 0)) { - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x1171: ExtVal = (x15.load_ext::(ctx, 0) - * ((x192.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1172: ExtVal = (x1171 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x1173: ExtVal = - (((x192.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x1172)?); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x1174: ExtVal = - ((x8.map(|c| c[to_usize(18)])).load_unchecked_ext::(ctx, 1) + x1173); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x1175: ExtVal = (x9.load_ext::(ctx, 0) - * ((x194.map(|c| c.val)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1176: ExtVal = (x1175 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x1177: ExtVal = - (((x194.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x1176)?); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x1178: ExtVal = (x1172 * x1176); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x1179: ExtVal = (((x192.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * x1176); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x1180: ExtVal = (x9.load_ext::(ctx, 0) - * ((x195.map(|c| c.val)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1181: ExtVal = (x1180 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x1182: ExtVal = - (((x195.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x1181)?); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x1183: ExtVal = ((x1174 + x1177) + x1182); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(0)])).store_ext(ctx, x1183); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x1184: ExtVal = ((x8.map(|c| c[to_usize(0)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(18)])).load_unchecked_ext::(ctx, 1)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x1185: ExtVal = (((x1184 * (x1178 * x1181)) - (x1179 * x1181)) - - ((x1172 * ((x194.map(|c| c.count)).map(|c| c._super)).load(ctx, 0)) * x1181)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x1185 - (x1178 * ((x195.map(|c| c.count)).map(|c| c._super)).load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x1186: ExtVal = (x11.load_ext::(ctx, 0) - * ((x198.map(|c| c.addr)).map(|c| c._super)).load(ctx, 0)); - let x1187: ExtVal = (x12.load_ext::(ctx, 0) - * ((x198.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - let x1188: ExtVal = (x13.load_ext::(ctx, 0) - * ((x198.map(|c| c.data_low)).map(|c| c._super)).load(ctx, 0)); - let x1189: ExtVal = (x14.load_ext::(ctx, 0) - * ((x198.map(|c| c.data_high)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x1190: ExtVal = (((x1186 + x1187) + x1188) + x1189); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1191: ExtVal = (x1190 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x1192: ExtVal = - (((x198.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x1191)?); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x1193: ExtVal = (x11.load_ext::(ctx, 0) - * ((x199.map(|c| c.addr)).map(|c| c._super)).load(ctx, 0)); - let x1194: ExtVal = (x12.load_ext::(ctx, 0) - * ((x199.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - let x1195: ExtVal = (x13.load_ext::(ctx, 0) - * ((x199.map(|c| c.data_low)).map(|c| c._super)).load(ctx, 0)); - let x1196: ExtVal = (x14.load_ext::(ctx, 0) - * ((x199.map(|c| c.data_high)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x1197: ExtVal = (((x1193 + x1194) + x1195) + x1196); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1198: ExtVal = (x1197 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x1199: ExtVal = - (((x199.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x1198)?); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x1200: ExtVal = (x1191 * x1198); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x1201: ExtVal = (((x198.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * x1198); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x1202: ExtVal = (x15.load_ext::(ctx, 0) - * ((x200.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1203: ExtVal = (x1202 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x1204: ExtVal = - (((x200.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x1203)?); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x1205: ExtVal = (((x1183 + x1192) + x1199) + x1204); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(1)])).store_ext(ctx, x1205); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x1206: ExtVal = ((x8.map(|c| c[to_usize(1)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(0)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x1207: ExtVal = (((x1206 * (x1200 * x1203)) - (x1201 * x1203)) - - ((x1191 * ((x199.map(|c| c.count)).map(|c| c._super)).load(ctx, 0)) * x1203)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x1207 - (x1200 * ((x200.map(|c| c.count)).map(|c| c._super)).load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x1208: ExtVal = (x11.load_ext::(ctx, 0) - * ((x203.map(|c| c.addr)).map(|c| c._super)).load(ctx, 0)); - let x1209: ExtVal = (x12.load_ext::(ctx, 0) - * ((x203.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - let x1210: ExtVal = (x13.load_ext::(ctx, 0) - * ((x203.map(|c| c.data_low)).map(|c| c._super)).load(ctx, 0)); - let x1211: ExtVal = (x14.load_ext::(ctx, 0) - * ((x203.map(|c| c.data_high)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x1212: ExtVal = (((x1208 + x1209) + x1210) + x1211); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1213: ExtVal = (x1212 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x1214: ExtVal = - (((x203.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x1213)?); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x1215: ExtVal = (x11.load_ext::(ctx, 0) - * ((x204.map(|c| c.addr)).map(|c| c._super)).load(ctx, 0)); - let x1216: ExtVal = (x12.load_ext::(ctx, 0) - * ((x204.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - let x1217: ExtVal = (x13.load_ext::(ctx, 0) - * ((x204.map(|c| c.data_low)).map(|c| c._super)).load(ctx, 0)); - let x1218: ExtVal = (x14.load_ext::(ctx, 0) - * ((x204.map(|c| c.data_high)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x1219: ExtVal = (((x1215 + x1216) + x1217) + x1218); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1220: ExtVal = (x1219 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x1221: ExtVal = - (((x204.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x1220)?); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x1222: ExtVal = (x1213 * x1220); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x1223: ExtVal = (((x203.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * x1220); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x1224: ExtVal = (x15.load_ext::(ctx, 0) - * ((x205.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1225: ExtVal = (x1224 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x1226: ExtVal = - (((x205.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x1225)?); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x1227: ExtVal = (((x1205 + x1214) + x1221) + x1226); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(2)])).store_ext(ctx, x1227); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x1228: ExtVal = ((x8.map(|c| c[to_usize(2)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(1)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x1229: ExtVal = (((x1228 * (x1222 * x1225)) - (x1223 * x1225)) - - ((x1213 * ((x204.map(|c| c.count)).map(|c| c._super)).load(ctx, 0)) * x1225)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x1229 - (x1222 * ((x205.map(|c| c.count)).map(|c| c._super)).load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x1230: ExtVal = (x9.load_ext::(ctx, 0) - * ((x207.map(|c| c.val)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1231: ExtVal = (x1230 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x1232: ExtVal = - (((x207.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x1231)?); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x1233: ExtVal = (x9.load_ext::(ctx, 0) - * ((x208.map(|c| c.val)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1234: ExtVal = (x1233 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x1235: ExtVal = - (((x208.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x1234)?); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x1236: ExtVal = (x1231 * x1234); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x1237: ExtVal = (((x207.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * x1234); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x1238: ExtVal = (x9.load_ext::(ctx, 0) - * ((x210.map(|c| c.val)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1239: ExtVal = (x1238 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x1240: ExtVal = - (((x210.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x1239)?); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x1241: ExtVal = (((x1227 + x1232) + x1235) + x1240); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(3)])).store_ext(ctx, x1241); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x1242: ExtVal = ((x8.map(|c| c[to_usize(3)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(2)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x1243: ExtVal = (((x1242 * (x1236 * x1239)) - (x1237 * x1239)) - - ((x1231 * ((x208.map(|c| c.count)).map(|c| c._super)).load(ctx, 0)) * x1239)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x1243 - (x1236 * ((x210.map(|c| c.count)).map(|c| c._super)).load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x1244: ExtVal = (x9.load_ext::(ctx, 0) - * ((x211.map(|c| c.val)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1245: ExtVal = (x1244 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x1246: ExtVal = - (((x211.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x1245)?); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x1247: ExtVal = (x11.load_ext::(ctx, 0) - * ((x214.map(|c| c.addr)).map(|c| c._super)).load(ctx, 0)); - let x1248: ExtVal = (x12.load_ext::(ctx, 0) - * ((x214.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - let x1249: ExtVal = (x13.load_ext::(ctx, 0) - * ((x214.map(|c| c.data_low)).map(|c| c._super)).load(ctx, 0)); - let x1250: ExtVal = (x14.load_ext::(ctx, 0) - * ((x214.map(|c| c.data_high)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x1251: ExtVal = (((x1247 + x1248) + x1249) + x1250); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1252: ExtVal = (x1251 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x1253: ExtVal = - (((x214.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x1252)?); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x1254: ExtVal = (x1245 * x1252); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x1255: ExtVal = (((x211.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * x1252); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x1256: ExtVal = (x11.load_ext::(ctx, 0) - * ((x215.map(|c| c.addr)).map(|c| c._super)).load(ctx, 0)); - let x1257: ExtVal = (x12.load_ext::(ctx, 0) - * ((x215.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - let x1258: ExtVal = (x13.load_ext::(ctx, 0) - * ((x215.map(|c| c.data_low)).map(|c| c._super)).load(ctx, 0)); - let x1259: ExtVal = (x14.load_ext::(ctx, 0) - * ((x215.map(|c| c.data_high)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x1260: ExtVal = (((x1256 + x1257) + x1258) + x1259); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1261: ExtVal = (x1260 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x1262: ExtVal = - (((x215.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x1261)?); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x1263: ExtVal = (((x1241 + x1246) + x1253) + x1262); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(4)])).store_ext(ctx, x1263); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x1264: ExtVal = ((x8.map(|c| c[to_usize(4)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(3)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x1265: ExtVal = (((x1264 * (x1254 * x1261)) - (x1255 * x1261)) - - ((x1245 * ((x214.map(|c| c.count)).map(|c| c._super)).load(ctx, 0)) * x1261)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x1265 - (x1254 * ((x215.map(|c| c.count)).map(|c| c._super)).load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x1266: ExtVal = (x15.load_ext::(ctx, 0) - * ((x216.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1267: ExtVal = (x1266 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x1268: ExtVal = - (((x216.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x1267)?); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1269: BoundLayout = - (((x217.map(|c| c[to_usize(0)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1270: BoundLayout = - (((x217.map(|c| c[to_usize(0)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1271: ExtVal = ((x123.load_ext::(ctx, 0) * x1270.load(ctx, 0)) - + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x1272: ExtVal = ((x1263 + x1268) + (x1269.load(ctx, 0) * inv_0(x1271)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x1273: ExtVal = (x1267 * x1271); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x1274: ExtVal = (((x216.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * x1271); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1275: BoundLayout = - (((x217.map(|c| c[to_usize(1)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1276: BoundLayout = - (((x217.map(|c| c[to_usize(1)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1277: ExtVal = ((x123.load_ext::(ctx, 0) * x1276.load(ctx, 0)) - + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x1278: ExtVal = (x1272 + (x1275.load(ctx, 0) * inv_0(x1277)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(5)])).store_ext(ctx, x1278); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x1279: ExtVal = ((x8.map(|c| c[to_usize(5)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(4)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x1280: ExtVal = (((x1279 * (x1273 * x1277)) - (x1274 * x1277)) - - ((x1267 * x1269.load(ctx, 0)) * x1277)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x1280 - (x1273 * x1275.load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1281: BoundLayout = - (((x217.map(|c| c[to_usize(2)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1282: BoundLayout = - (((x217.map(|c| c[to_usize(2)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1283: ExtVal = ((x123.load_ext::(ctx, 0) * x1282.load(ctx, 0)) - + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x1284: ExtVal = (x11.load_ext::(ctx, 0) - * ((x220.map(|c| c.addr)).map(|c| c._super)).load(ctx, 0)); - let x1285: ExtVal = (x12.load_ext::(ctx, 0) - * ((x220.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - let x1286: ExtVal = (x13.load_ext::(ctx, 0) - * ((x220.map(|c| c.data_low)).map(|c| c._super)).load(ctx, 0)); - let x1287: ExtVal = (x14.load_ext::(ctx, 0) - * ((x220.map(|c| c.data_high)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x1288: ExtVal = (((x1284 + x1285) + x1286) + x1287); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1289: ExtVal = (x1288 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x1290: ExtVal = - (((x220.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x1289)?); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x1291: ExtVal = (x1283 * x1289); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x1292: ExtVal = (x11.load_ext::(ctx, 0) - * ((x221.map(|c| c.addr)).map(|c| c._super)).load(ctx, 0)); - let x1293: ExtVal = (x12.load_ext::(ctx, 0) - * ((x221.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - let x1294: ExtVal = (x13.load_ext::(ctx, 0) - * ((x221.map(|c| c.data_low)).map(|c| c._super)).load(ctx, 0)); - let x1295: ExtVal = (x14.load_ext::(ctx, 0) - * ((x221.map(|c| c.data_high)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x1296: ExtVal = (((x1292 + x1293) + x1294) + x1295); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1297: ExtVal = (x1296 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x1298: ExtVal = - (((x221.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x1297)?); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x1299: ExtVal = (((x1278 + (x1281.load(ctx, 0) * inv_0(x1283)?)) + x1290) + x1298); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x1300: ExtVal = ((x1281.load(ctx, 0) * x1289) * x1297); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(6)])).store_ext(ctx, x1299); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x1301: ExtVal = ((x8.map(|c| c[to_usize(6)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(5)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x1302: ExtVal = (((x1301 * (x1291 * x1297)) - x1300) - - ((x1283 * ((x220.map(|c| c.count)).map(|c| c._super)).load(ctx, 0)) * x1297)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x1302 - (x1291 * ((x221.map(|c| c.count)).map(|c| c._super)).load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x1303: ExtVal = (x15.load_ext::(ctx, 0) - * ((x222.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1304: ExtVal = (x1303 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x1305: ExtVal = - (((x222.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x1304)?); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x1306: ExtVal = (x9.load_ext::(ctx, 0) - * ((x224.map(|c| c.val)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1307: ExtVal = (x1306 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x1308: ExtVal = - (((x224.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x1307)?); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x1309: ExtVal = (x1304 * x1307); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x1310: ExtVal = (((x222.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * x1307); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x1311: ExtVal = (x9.load_ext::(ctx, 0) - * ((x225.map(|c| c.val)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1312: ExtVal = (x1311 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x1313: ExtVal = - (((x225.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x1312)?); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x1314: ExtVal = (((x1299 + x1305) + x1308) + x1313); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(7)])).store_ext(ctx, x1314); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x1315: ExtVal = ((x8.map(|c| c[to_usize(7)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(6)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x1316: ExtVal = (((x1315 * (x1309 * x1312)) - (x1310 * x1312)) - - ((x1304 * ((x224.map(|c| c.count)).map(|c| c._super)).load(ctx, 0)) * x1312)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x1316 - (x1309 * ((x225.map(|c| c.count)).map(|c| c._super)).load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:122 - (x8.map(|c| c[to_usize(18)])).store_ext(ctx, x1314); - // zirgen/dsl/passes/GenerateAccum.cpp:124 - let x1317: ExtVal = ((x8.map(|c| c[to_usize(18)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(7)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:125 - eqz!(x1317, "zirgen/dsl/passes/GenerateAccum.cpp:125"); - x295 = x51; - } else if is_true(((x6.map(|c| c[to_usize(6)])).map(|c| c._super)).load(ctx, 0)) { - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x1318: ExtVal = (x15.load_ext::(ctx, 0) - * ((x229.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1319: ExtVal = (x1318 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x1320: ExtVal = - (((x229.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x1319)?); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x1321: ExtVal = - ((x8.map(|c| c[to_usize(18)])).load_unchecked_ext::(ctx, 1) + x1320); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x1322: ExtVal = (x9.load_ext::(ctx, 0) - * ((x231.map(|c| c.val)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1323: ExtVal = (x1322 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x1324: ExtVal = - (((x231.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x1323)?); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x1325: ExtVal = (x1319 * x1323); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x1326: ExtVal = (((x229.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * x1323); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x1327: ExtVal = (x9.load_ext::(ctx, 0) - * ((x232.map(|c| c.val)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1328: ExtVal = (x1327 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x1329: ExtVal = - (((x232.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x1328)?); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x1330: ExtVal = ((x1321 + x1324) + x1329); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(0)])).store_ext(ctx, x1330); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x1331: ExtVal = ((x8.map(|c| c[to_usize(0)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(18)])).load_unchecked_ext::(ctx, 1)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x1332: ExtVal = (((x1331 * (x1325 * x1328)) - (x1326 * x1328)) - - ((x1319 * ((x231.map(|c| c.count)).map(|c| c._super)).load(ctx, 0)) * x1328)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x1332 - (x1325 * ((x232.map(|c| c.count)).map(|c| c._super)).load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x1333: ExtVal = (x11.load_ext::(ctx, 0) - * ((x235.map(|c| c.addr)).map(|c| c._super)).load(ctx, 0)); - let x1334: ExtVal = (x12.load_ext::(ctx, 0) - * ((x235.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - let x1335: ExtVal = (x13.load_ext::(ctx, 0) - * ((x235.map(|c| c.data_low)).map(|c| c._super)).load(ctx, 0)); - let x1336: ExtVal = (x14.load_ext::(ctx, 0) - * ((x235.map(|c| c.data_high)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x1337: ExtVal = (((x1333 + x1334) + x1335) + x1336); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1338: ExtVal = (x1337 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x1339: ExtVal = - (((x235.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x1338)?); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x1340: ExtVal = (x11.load_ext::(ctx, 0) - * ((x236.map(|c| c.addr)).map(|c| c._super)).load(ctx, 0)); - let x1341: ExtVal = (x12.load_ext::(ctx, 0) - * ((x236.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - let x1342: ExtVal = (x13.load_ext::(ctx, 0) - * ((x236.map(|c| c.data_low)).map(|c| c._super)).load(ctx, 0)); - let x1343: ExtVal = (x14.load_ext::(ctx, 0) - * ((x236.map(|c| c.data_high)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x1344: ExtVal = (((x1340 + x1341) + x1342) + x1343); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1345: ExtVal = (x1344 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x1346: ExtVal = - (((x236.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x1345)?); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x1347: ExtVal = (x1338 * x1345); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x1348: ExtVal = (((x235.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * x1345); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x1349: ExtVal = (x15.load_ext::(ctx, 0) - * ((x237.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1350: ExtVal = (x1349 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x1351: ExtVal = - (((x237.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x1350)?); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x1352: ExtVal = (((x1330 + x1339) + x1346) + x1351); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(1)])).store_ext(ctx, x1352); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x1353: ExtVal = ((x8.map(|c| c[to_usize(1)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(0)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x1354: ExtVal = (((x1353 * (x1347 * x1350)) - (x1348 * x1350)) - - ((x1338 * ((x236.map(|c| c.count)).map(|c| c._super)).load(ctx, 0)) * x1350)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x1354 - (x1347 * ((x237.map(|c| c.count)).map(|c| c._super)).load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x1355: ExtVal = (x11.load_ext::(ctx, 0) - * ((x240.map(|c| c.addr)).map(|c| c._super)).load(ctx, 0)); - let x1356: ExtVal = (x12.load_ext::(ctx, 0) - * ((x240.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - let x1357: ExtVal = (x13.load_ext::(ctx, 0) - * ((x240.map(|c| c.data_low)).map(|c| c._super)).load(ctx, 0)); - let x1358: ExtVal = (x14.load_ext::(ctx, 0) - * ((x240.map(|c| c.data_high)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x1359: ExtVal = (((x1355 + x1356) + x1357) + x1358); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1360: ExtVal = (x1359 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x1361: ExtVal = - (((x240.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x1360)?); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x1362: ExtVal = (x11.load_ext::(ctx, 0) - * ((x241.map(|c| c.addr)).map(|c| c._super)).load(ctx, 0)); - let x1363: ExtVal = (x12.load_ext::(ctx, 0) - * ((x241.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - let x1364: ExtVal = (x13.load_ext::(ctx, 0) - * ((x241.map(|c| c.data_low)).map(|c| c._super)).load(ctx, 0)); - let x1365: ExtVal = (x14.load_ext::(ctx, 0) - * ((x241.map(|c| c.data_high)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x1366: ExtVal = (((x1362 + x1363) + x1364) + x1365); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1367: ExtVal = (x1366 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x1368: ExtVal = - (((x241.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x1367)?); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x1369: ExtVal = (x1360 * x1367); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x1370: ExtVal = (((x240.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * x1367); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x1371: ExtVal = (x15.load_ext::(ctx, 0) - * ((x242.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1372: ExtVal = (x1371 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x1373: ExtVal = - (((x242.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x1372)?); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x1374: ExtVal = (((x1352 + x1361) + x1368) + x1373); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(2)])).store_ext(ctx, x1374); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x1375: ExtVal = ((x8.map(|c| c[to_usize(2)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(1)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x1376: ExtVal = (((x1375 * (x1369 * x1372)) - (x1370 * x1372)) - - ((x1360 * ((x241.map(|c| c.count)).map(|c| c._super)).load(ctx, 0)) * x1372)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x1376 - (x1369 * ((x242.map(|c| c.count)).map(|c| c._super)).load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x1377: ExtVal = (x11.load_ext::(ctx, 0) - * ((x245.map(|c| c.addr)).map(|c| c._super)).load(ctx, 0)); - let x1378: ExtVal = (x12.load_ext::(ctx, 0) - * ((x245.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - let x1379: ExtVal = (x13.load_ext::(ctx, 0) - * ((x245.map(|c| c.data_low)).map(|c| c._super)).load(ctx, 0)); - let x1380: ExtVal = (x14.load_ext::(ctx, 0) - * ((x245.map(|c| c.data_high)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x1381: ExtVal = (((x1377 + x1378) + x1379) + x1380); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1382: ExtVal = (x1381 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x1383: ExtVal = - (((x245.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x1382)?); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x1384: ExtVal = (x11.load_ext::(ctx, 0) - * ((x246.map(|c| c.addr)).map(|c| c._super)).load(ctx, 0)); - let x1385: ExtVal = (x12.load_ext::(ctx, 0) - * ((x246.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - let x1386: ExtVal = (x13.load_ext::(ctx, 0) - * ((x246.map(|c| c.data_low)).map(|c| c._super)).load(ctx, 0)); - let x1387: ExtVal = (x14.load_ext::(ctx, 0) - * ((x246.map(|c| c.data_high)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x1388: ExtVal = (((x1384 + x1385) + x1386) + x1387); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1389: ExtVal = (x1388 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x1390: ExtVal = - (((x246.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x1389)?); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x1391: ExtVal = (x1382 * x1389); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x1392: ExtVal = (((x245.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * x1389); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x1393: ExtVal = (x15.load_ext::(ctx, 0) - * ((x247.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1394: ExtVal = (x1393 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x1395: ExtVal = - (((x247.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x1394)?); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x1396: ExtVal = (((x1374 + x1383) + x1390) + x1395); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(3)])).store_ext(ctx, x1396); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x1397: ExtVal = ((x8.map(|c| c[to_usize(3)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(2)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x1398: ExtVal = (((x1397 * (x1391 * x1394)) - (x1392 * x1394)) - - ((x1382 * ((x246.map(|c| c.count)).map(|c| c._super)).load(ctx, 0)) * x1394)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x1398 - (x1391 * ((x247.map(|c| c.count)).map(|c| c._super)).load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x1399: ExtVal = (x9.load_ext::(ctx, 0) - * ((x249.map(|c| c.val)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1400: ExtVal = (x1399 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x1401: ExtVal = - (((x249.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x1400)?); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x1402: ExtVal = (x9.load_ext::(ctx, 0) - * ((x250.map(|c| c.val)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1403: ExtVal = (x1402 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x1404: ExtVal = - (((x250.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x1403)?); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x1405: ExtVal = (x1400 * x1403); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x1406: ExtVal = (((x249.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * x1403); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x1407: ExtVal = (x9.load_ext::(ctx, 0) - * ((x252.map(|c| c.val)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1408: ExtVal = (x1407 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x1409: ExtVal = - (((x252.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x1408)?); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x1410: ExtVal = (((x1396 + x1401) + x1404) + x1409); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(4)])).store_ext(ctx, x1410); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x1411: ExtVal = ((x8.map(|c| c[to_usize(4)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(3)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x1412: ExtVal = (((x1411 * (x1405 * x1408)) - (x1406 * x1408)) - - ((x1400 * ((x250.map(|c| c.count)).map(|c| c._super)).load(ctx, 0)) * x1408)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x1412 - (x1405 * ((x252.map(|c| c.count)).map(|c| c._super)).load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x1413: ExtVal = (x9.load_ext::(ctx, 0) - * ((x253.map(|c| c.val)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1414: ExtVal = (x1413 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x1415: ExtVal = - (((x253.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x1414)?); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x1416: ExtVal = (x11.load_ext::(ctx, 0) - * ((x256.map(|c| c.addr)).map(|c| c._super)).load(ctx, 0)); - let x1417: ExtVal = (x12.load_ext::(ctx, 0) - * ((x256.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - let x1418: ExtVal = (x13.load_ext::(ctx, 0) - * ((x256.map(|c| c.data_low)).map(|c| c._super)).load(ctx, 0)); - let x1419: ExtVal = (x14.load_ext::(ctx, 0) - * ((x256.map(|c| c.data_high)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x1420: ExtVal = (((x1416 + x1417) + x1418) + x1419); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1421: ExtVal = (x1420 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x1422: ExtVal = - (((x256.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x1421)?); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x1423: ExtVal = (x1414 * x1421); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x1424: ExtVal = (((x253.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * x1421); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x1425: ExtVal = (x11.load_ext::(ctx, 0) - * ((x257.map(|c| c.addr)).map(|c| c._super)).load(ctx, 0)); - let x1426: ExtVal = (x12.load_ext::(ctx, 0) - * ((x257.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - let x1427: ExtVal = (x13.load_ext::(ctx, 0) - * ((x257.map(|c| c.data_low)).map(|c| c._super)).load(ctx, 0)); - let x1428: ExtVal = (x14.load_ext::(ctx, 0) - * ((x257.map(|c| c.data_high)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x1429: ExtVal = (((x1425 + x1426) + x1427) + x1428); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1430: ExtVal = (x1429 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x1431: ExtVal = - (((x257.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x1430)?); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x1432: ExtVal = (((x1410 + x1415) + x1422) + x1431); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(5)])).store_ext(ctx, x1432); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x1433: ExtVal = ((x8.map(|c| c[to_usize(5)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(4)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x1434: ExtVal = (((x1433 * (x1423 * x1430)) - (x1424 * x1430)) - - ((x1414 * ((x256.map(|c| c.count)).map(|c| c._super)).load(ctx, 0)) * x1430)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x1434 - (x1423 * ((x257.map(|c| c.count)).map(|c| c._super)).load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x1435: ExtVal = (x15.load_ext::(ctx, 0) - * ((x258.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1436: ExtVal = (x1435 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x1437: ExtVal = - (((x258.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x1436)?); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1438: BoundLayout = - (((x259.map(|c| c[to_usize(0)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1439: BoundLayout = - (((x259.map(|c| c[to_usize(0)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1440: ExtVal = ((x123.load_ext::(ctx, 0) * x1439.load(ctx, 0)) - + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x1441: ExtVal = ((x1432 + x1437) + (x1438.load(ctx, 0) * inv_0(x1440)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x1442: ExtVal = (x1436 * x1440); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x1443: ExtVal = (((x258.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * x1440); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1444: BoundLayout = - (((x259.map(|c| c[to_usize(1)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1445: BoundLayout = - (((x259.map(|c| c[to_usize(1)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1446: ExtVal = ((x123.load_ext::(ctx, 0) * x1445.load(ctx, 0)) - + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x1447: ExtVal = (x1441 + (x1444.load(ctx, 0) * inv_0(x1446)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(6)])).store_ext(ctx, x1447); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x1448: ExtVal = ((x8.map(|c| c[to_usize(6)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(5)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x1449: ExtVal = (((x1448 * (x1442 * x1446)) - (x1443 * x1446)) - - ((x1436 * x1438.load(ctx, 0)) * x1446)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x1449 - (x1442 * x1444.load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1450: BoundLayout = - (((x259.map(|c| c[to_usize(2)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1451: BoundLayout = - (((x259.map(|c| c[to_usize(2)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1452: ExtVal = ((x123.load_ext::(ctx, 0) * x1451.load(ctx, 0)) - + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1453: BoundLayout = - (((x259.map(|c| c[to_usize(3)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1454: BoundLayout = - (((x259.map(|c| c[to_usize(3)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1455: ExtVal = ((x123.load_ext::(ctx, 0) * x1454.load(ctx, 0)) - + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x1456: ExtVal = - ((x1447 + (x1450.load(ctx, 0) * inv_0(x1452)?)) + (x1453.load(ctx, 0) * inv_0(x1455)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x1457: ExtVal = (x1452 * x1455); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x1458: ExtVal = (x11.load_ext::(ctx, 0) - * ((x262.map(|c| c.addr)).map(|c| c._super)).load(ctx, 0)); - let x1459: ExtVal = (x12.load_ext::(ctx, 0) - * ((x262.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - let x1460: ExtVal = (x13.load_ext::(ctx, 0) - * ((x262.map(|c| c.data_low)).map(|c| c._super)).load(ctx, 0)); - let x1461: ExtVal = (x14.load_ext::(ctx, 0) - * ((x262.map(|c| c.data_high)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x1462: ExtVal = (((x1458 + x1459) + x1460) + x1461); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1463: ExtVal = (x1462 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x1464: ExtVal = - (((x262.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x1463)?); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x1465: ExtVal = (x1456 + x1464); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x1466: ExtVal = ((x1450.load(ctx, 0) * x1455) * x1463); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(7)])).store_ext(ctx, x1465); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x1467: ExtVal = ((x8.map(|c| c[to_usize(7)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(6)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x1468: ExtVal = - (((x1467 * (x1457 * x1463)) - x1466) - ((x1452 * x1453.load(ctx, 0)) * x1463)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x1468 - (x1457 * ((x262.map(|c| c.count)).map(|c| c._super)).load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x1469: ExtVal = (x11.load_ext::(ctx, 0) - * ((x263.map(|c| c.addr)).map(|c| c._super)).load(ctx, 0)); - let x1470: ExtVal = (x12.load_ext::(ctx, 0) - * ((x263.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - let x1471: ExtVal = (x13.load_ext::(ctx, 0) - * ((x263.map(|c| c.data_low)).map(|c| c._super)).load(ctx, 0)); - let x1472: ExtVal = (x14.load_ext::(ctx, 0) - * ((x263.map(|c| c.data_high)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x1473: ExtVal = (((x1469 + x1470) + x1471) + x1472); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1474: ExtVal = (x1473 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x1475: ExtVal = - (((x263.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x1474)?); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x1476: ExtVal = (x15.load_ext::(ctx, 0) - * ((x264.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1477: ExtVal = (x1476 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x1478: ExtVal = - (((x264.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x1477)?); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x1479: ExtVal = (x1474 * x1477); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x1480: ExtVal = (((x263.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * x1477); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x1481: ExtVal = (x9.load_ext::(ctx, 0) - * ((x266.map(|c| c.val)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1482: ExtVal = (x1481 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x1483: ExtVal = - (((x266.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x1482)?); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x1484: ExtVal = (((x1465 + x1475) + x1478) + x1483); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(8)])).store_ext(ctx, x1484); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x1485: ExtVal = ((x8.map(|c| c[to_usize(8)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(7)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x1486: ExtVal = (((x1485 * (x1479 * x1482)) - (x1480 * x1482)) - - ((x1474 * ((x264.map(|c| c.count)).map(|c| c._super)).load(ctx, 0)) * x1482)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x1486 - (x1479 * ((x266.map(|c| c.count)).map(|c| c._super)).load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x1487: ExtVal = (x9.load_ext::(ctx, 0) - * ((x267.map(|c| c.val)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1488: ExtVal = (x1487 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x1489: ExtVal = - (((x267.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x1488)?); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(9)])).store_ext(ctx, (x1484 + x1489)); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x1490: ExtVal = ((x8.map(|c| c[to_usize(9)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(8)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x1491: ExtVal = - ((x1490 * x1488) - ((x267.map(|c| c.count)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!(x1491, "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:122 - (x8.map(|c| c[to_usize(18)])) - .store_ext(ctx, (x8.map(|c| c[to_usize(9)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:124 - let x1492: ExtVal = ((x8.map(|c| c[to_usize(18)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(9)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:125 - eqz!(x1492, "zirgen/dsl/passes/GenerateAccum.cpp:125"); - x295 = x51; - } else if is_true(((x6.map(|c| c[to_usize(7)])).map(|c| c._super)).load(ctx, 0)) { - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x1493: ExtVal = (x15.load_ext::(ctx, 0) - * ((x269.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1494: ExtVal = (x1493 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x1495: ExtVal = - (((x269.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x1494)?); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x1496: ExtVal = - ((x8.map(|c| c[to_usize(18)])).load_unchecked_ext::(ctx, 1) + x1495); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1497: BoundLayout = - (((x271.map(|c| c[to_usize(0)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1498: BoundLayout = - (((x271.map(|c| c[to_usize(0)])).map(|c| c.addr)).map(|c| c._super)); - let x1499: BoundLayout = - (((x271.map(|c| c[to_usize(0)])).map(|c| c.cycle)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x1500: ExtVal = ((x11.load_ext::(ctx, 0) * x1498.load(ctx, 0)) - + (x12.load_ext::(ctx, 0) * x1499.load(ctx, 0))); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1501: BoundLayout = - (((x271.map(|c| c[to_usize(0)])).map(|c| c.data_low)).map(|c| c._super)); - let x1502: BoundLayout = - (((x271.map(|c| c[to_usize(0)])).map(|c| c.data_high)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x1503: ExtVal = ((x1500 + (x13.load_ext::(ctx, 0) * x1501.load(ctx, 0))) - + (x14.load_ext::(ctx, 0) * x1502.load(ctx, 0))); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1504: ExtVal = (x1503 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x1505: ExtVal = (x1494 * x1504); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x1506: ExtVal = (((x269.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * x1504); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1507: BoundLayout = - (((x271.map(|c| c[to_usize(1)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1508: BoundLayout = - (((x271.map(|c| c[to_usize(1)])).map(|c| c.addr)).map(|c| c._super)); - let x1509: BoundLayout = - (((x271.map(|c| c[to_usize(1)])).map(|c| c.cycle)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x1510: ExtVal = ((x11.load_ext::(ctx, 0) * x1508.load(ctx, 0)) - + (x12.load_ext::(ctx, 0) * x1509.load(ctx, 0))); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1511: BoundLayout = - (((x271.map(|c| c[to_usize(1)])).map(|c| c.data_low)).map(|c| c._super)); - let x1512: BoundLayout = - (((x271.map(|c| c[to_usize(1)])).map(|c| c.data_high)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x1513: ExtVal = ((x1510 + (x13.load_ext::(ctx, 0) * x1511.load(ctx, 0))) - + (x14.load_ext::(ctx, 0) * x1512.load(ctx, 0))); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1514: ExtVal = (x1513 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x1515: ExtVal = - ((x1496 + (x1497.load(ctx, 0) * inv_0(x1504)?)) + (x1507.load(ctx, 0) * inv_0(x1514)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(0)])).store_ext(ctx, x1515); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x1516: ExtVal = ((x8.map(|c| c[to_usize(0)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(18)])).load_unchecked_ext::(ctx, 1)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x1517: ExtVal = (((x1516 * (x1505 * x1514)) - (x1506 * x1514)) - - ((x1494 * x1497.load(ctx, 0)) * x1514)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x1517 - (x1505 * x1507.load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1518: BoundLayout = - (((x271.map(|c| c[to_usize(2)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1519: BoundLayout = - (((x271.map(|c| c[to_usize(2)])).map(|c| c.addr)).map(|c| c._super)); - let x1520: BoundLayout = - (((x271.map(|c| c[to_usize(2)])).map(|c| c.cycle)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x1521: ExtVal = ((x11.load_ext::(ctx, 0) * x1519.load(ctx, 0)) - + (x12.load_ext::(ctx, 0) * x1520.load(ctx, 0))); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1522: BoundLayout = - (((x271.map(|c| c[to_usize(2)])).map(|c| c.data_low)).map(|c| c._super)); - let x1523: BoundLayout = - (((x271.map(|c| c[to_usize(2)])).map(|c| c.data_high)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x1524: ExtVal = ((x1521 + (x13.load_ext::(ctx, 0) * x1522.load(ctx, 0))) - + (x14.load_ext::(ctx, 0) * x1523.load(ctx, 0))); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1525: ExtVal = (x1524 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1526: BoundLayout = - (((x271.map(|c| c[to_usize(3)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1527: BoundLayout = - (((x271.map(|c| c[to_usize(3)])).map(|c| c.addr)).map(|c| c._super)); - let x1528: BoundLayout = - (((x271.map(|c| c[to_usize(3)])).map(|c| c.cycle)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x1529: ExtVal = ((x11.load_ext::(ctx, 0) * x1527.load(ctx, 0)) - + (x12.load_ext::(ctx, 0) * x1528.load(ctx, 0))); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1530: BoundLayout = - (((x271.map(|c| c[to_usize(3)])).map(|c| c.data_low)).map(|c| c._super)); - let x1531: BoundLayout = - (((x271.map(|c| c[to_usize(3)])).map(|c| c.data_high)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x1532: ExtVal = ((x1529 + (x13.load_ext::(ctx, 0) * x1530.load(ctx, 0))) - + (x14.load_ext::(ctx, 0) * x1531.load(ctx, 0))); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1533: ExtVal = (x1532 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x1534: ExtVal = - ((x1515 + (x1518.load(ctx, 0) * inv_0(x1525)?)) + (x1526.load(ctx, 0) * inv_0(x1533)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x1535: ExtVal = (x1525 * x1533); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1536: BoundLayout = - (((x271.map(|c| c[to_usize(4)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1537: BoundLayout = - (((x271.map(|c| c[to_usize(4)])).map(|c| c.addr)).map(|c| c._super)); - let x1538: BoundLayout = - (((x271.map(|c| c[to_usize(4)])).map(|c| c.cycle)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x1539: ExtVal = ((x11.load_ext::(ctx, 0) * x1537.load(ctx, 0)) - + (x12.load_ext::(ctx, 0) * x1538.load(ctx, 0))); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1540: BoundLayout = - (((x271.map(|c| c[to_usize(4)])).map(|c| c.data_low)).map(|c| c._super)); - let x1541: BoundLayout = - (((x271.map(|c| c[to_usize(4)])).map(|c| c.data_high)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x1542: ExtVal = ((x1539 + (x13.load_ext::(ctx, 0) * x1540.load(ctx, 0))) - + (x14.load_ext::(ctx, 0) * x1541.load(ctx, 0))); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1543: ExtVal = (x1542 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x1544: ExtVal = (x1534 + (x1536.load(ctx, 0) * inv_0(x1543)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x1545: ExtVal = ((x1518.load(ctx, 0) * x1533) * x1543); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(1)])).store_ext(ctx, x1544); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x1546: ExtVal = ((x8.map(|c| c[to_usize(1)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(0)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x1547: ExtVal = - (((x1546 * (x1535 * x1543)) - x1545) - ((x1525 * x1526.load(ctx, 0)) * x1543)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x1547 - (x1535 * x1536.load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1548: BoundLayout = - (((x271.map(|c| c[to_usize(5)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1549: BoundLayout = - (((x271.map(|c| c[to_usize(5)])).map(|c| c.addr)).map(|c| c._super)); - let x1550: BoundLayout = - (((x271.map(|c| c[to_usize(5)])).map(|c| c.cycle)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x1551: ExtVal = ((x11.load_ext::(ctx, 0) * x1549.load(ctx, 0)) - + (x12.load_ext::(ctx, 0) * x1550.load(ctx, 0))); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1552: BoundLayout = - (((x271.map(|c| c[to_usize(5)])).map(|c| c.data_low)).map(|c| c._super)); - let x1553: BoundLayout = - (((x271.map(|c| c[to_usize(5)])).map(|c| c.data_high)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x1554: ExtVal = ((x1551 + (x13.load_ext::(ctx, 0) * x1552.load(ctx, 0))) - + (x14.load_ext::(ctx, 0) * x1553.load(ctx, 0))); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1555: ExtVal = (x1554 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1556: BoundLayout = - (((x271.map(|c| c[to_usize(6)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1557: BoundLayout = - (((x271.map(|c| c[to_usize(6)])).map(|c| c.addr)).map(|c| c._super)); - let x1558: BoundLayout = - (((x271.map(|c| c[to_usize(6)])).map(|c| c.cycle)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x1559: ExtVal = ((x11.load_ext::(ctx, 0) * x1557.load(ctx, 0)) - + (x12.load_ext::(ctx, 0) * x1558.load(ctx, 0))); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1560: BoundLayout = - (((x271.map(|c| c[to_usize(6)])).map(|c| c.data_low)).map(|c| c._super)); - let x1561: BoundLayout = - (((x271.map(|c| c[to_usize(6)])).map(|c| c.data_high)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x1562: ExtVal = ((x1559 + (x13.load_ext::(ctx, 0) * x1560.load(ctx, 0))) - + (x14.load_ext::(ctx, 0) * x1561.load(ctx, 0))); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1563: ExtVal = (x1562 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x1564: ExtVal = - ((x1544 + (x1548.load(ctx, 0) * inv_0(x1555)?)) + (x1556.load(ctx, 0) * inv_0(x1563)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x1565: ExtVal = (x1555 * x1563); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1566: BoundLayout = - (((x271.map(|c| c[to_usize(7)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1567: BoundLayout = - (((x271.map(|c| c[to_usize(7)])).map(|c| c.addr)).map(|c| c._super)); - let x1568: BoundLayout = - (((x271.map(|c| c[to_usize(7)])).map(|c| c.cycle)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x1569: ExtVal = ((x11.load_ext::(ctx, 0) * x1567.load(ctx, 0)) - + (x12.load_ext::(ctx, 0) * x1568.load(ctx, 0))); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1570: BoundLayout = - (((x271.map(|c| c[to_usize(7)])).map(|c| c.data_low)).map(|c| c._super)); - let x1571: BoundLayout = - (((x271.map(|c| c[to_usize(7)])).map(|c| c.data_high)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x1572: ExtVal = ((x1569 + (x13.load_ext::(ctx, 0) * x1570.load(ctx, 0))) - + (x14.load_ext::(ctx, 0) * x1571.load(ctx, 0))); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1573: ExtVal = (x1572 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x1574: ExtVal = (x1564 + (x1566.load(ctx, 0) * inv_0(x1573)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x1575: ExtVal = ((x1548.load(ctx, 0) * x1563) * x1573); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(2)])).store_ext(ctx, x1574); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x1576: ExtVal = ((x8.map(|c| c[to_usize(2)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(1)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x1577: ExtVal = - (((x1576 * (x1565 * x1573)) - x1575) - ((x1555 * x1556.load(ctx, 0)) * x1573)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x1577 - (x1565 * x1566.load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1578: BoundLayout = - (((x271.map(|c| c[to_usize(8)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1579: BoundLayout = - (((x271.map(|c| c[to_usize(8)])).map(|c| c.addr)).map(|c| c._super)); - let x1580: BoundLayout = - (((x271.map(|c| c[to_usize(8)])).map(|c| c.cycle)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x1581: ExtVal = ((x11.load_ext::(ctx, 0) * x1579.load(ctx, 0)) - + (x12.load_ext::(ctx, 0) * x1580.load(ctx, 0))); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1582: BoundLayout = - (((x271.map(|c| c[to_usize(8)])).map(|c| c.data_low)).map(|c| c._super)); - let x1583: BoundLayout = - (((x271.map(|c| c[to_usize(8)])).map(|c| c.data_high)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x1584: ExtVal = ((x1581 + (x13.load_ext::(ctx, 0) * x1582.load(ctx, 0))) - + (x14.load_ext::(ctx, 0) * x1583.load(ctx, 0))); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1585: ExtVal = (x1584 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1586: BoundLayout = - (((x271.map(|c| c[to_usize(9)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1587: BoundLayout = - (((x271.map(|c| c[to_usize(9)])).map(|c| c.addr)).map(|c| c._super)); - let x1588: BoundLayout = - (((x271.map(|c| c[to_usize(9)])).map(|c| c.cycle)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x1589: ExtVal = ((x11.load_ext::(ctx, 0) * x1587.load(ctx, 0)) - + (x12.load_ext::(ctx, 0) * x1588.load(ctx, 0))); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1590: BoundLayout = - (((x271.map(|c| c[to_usize(9)])).map(|c| c.data_low)).map(|c| c._super)); - let x1591: BoundLayout = - (((x271.map(|c| c[to_usize(9)])).map(|c| c.data_high)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x1592: ExtVal = ((x1589 + (x13.load_ext::(ctx, 0) * x1590.load(ctx, 0))) - + (x14.load_ext::(ctx, 0) * x1591.load(ctx, 0))); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1593: ExtVal = (x1592 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x1594: ExtVal = - ((x1574 + (x1578.load(ctx, 0) * inv_0(x1585)?)) + (x1586.load(ctx, 0) * inv_0(x1593)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x1595: ExtVal = (x1585 * x1593); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1596: BoundLayout = - (((x271.map(|c| c[to_usize(10)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1597: BoundLayout = - (((x271.map(|c| c[to_usize(10)])).map(|c| c.addr)).map(|c| c._super)); - let x1598: BoundLayout = - (((x271.map(|c| c[to_usize(10)])).map(|c| c.cycle)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x1599: ExtVal = ((x11.load_ext::(ctx, 0) * x1597.load(ctx, 0)) - + (x12.load_ext::(ctx, 0) * x1598.load(ctx, 0))); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1600: BoundLayout = - (((x271.map(|c| c[to_usize(10)])).map(|c| c.data_low)).map(|c| c._super)); - let x1601: BoundLayout = - (((x271.map(|c| c[to_usize(10)])).map(|c| c.data_high)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x1602: ExtVal = ((x1599 + (x13.load_ext::(ctx, 0) * x1600.load(ctx, 0))) - + (x14.load_ext::(ctx, 0) * x1601.load(ctx, 0))); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1603: ExtVal = (x1602 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x1604: ExtVal = (x1594 + (x1596.load(ctx, 0) * inv_0(x1603)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x1605: ExtVal = ((x1578.load(ctx, 0) * x1593) * x1603); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(3)])).store_ext(ctx, x1604); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x1606: ExtVal = ((x8.map(|c| c[to_usize(3)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(2)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x1607: ExtVal = - (((x1606 * (x1595 * x1603)) - x1605) - ((x1585 * x1586.load(ctx, 0)) * x1603)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x1607 - (x1595 * x1596.load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1608: BoundLayout = - (((x271.map(|c| c[to_usize(11)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1609: BoundLayout = - (((x271.map(|c| c[to_usize(11)])).map(|c| c.addr)).map(|c| c._super)); - let x1610: BoundLayout = - (((x271.map(|c| c[to_usize(11)])).map(|c| c.cycle)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x1611: ExtVal = ((x11.load_ext::(ctx, 0) * x1609.load(ctx, 0)) - + (x12.load_ext::(ctx, 0) * x1610.load(ctx, 0))); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1612: BoundLayout = - (((x271.map(|c| c[to_usize(11)])).map(|c| c.data_low)).map(|c| c._super)); - let x1613: BoundLayout = - (((x271.map(|c| c[to_usize(11)])).map(|c| c.data_high)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x1614: ExtVal = ((x1611 + (x13.load_ext::(ctx, 0) * x1612.load(ctx, 0))) - + (x14.load_ext::(ctx, 0) * x1613.load(ctx, 0))); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1615: ExtVal = (x1614 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1616: BoundLayout = - (((x271.map(|c| c[to_usize(12)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1617: BoundLayout = - (((x271.map(|c| c[to_usize(12)])).map(|c| c.addr)).map(|c| c._super)); - let x1618: BoundLayout = - (((x271.map(|c| c[to_usize(12)])).map(|c| c.cycle)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x1619: ExtVal = ((x11.load_ext::(ctx, 0) * x1617.load(ctx, 0)) - + (x12.load_ext::(ctx, 0) * x1618.load(ctx, 0))); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1620: BoundLayout = - (((x271.map(|c| c[to_usize(12)])).map(|c| c.data_low)).map(|c| c._super)); - let x1621: BoundLayout = - (((x271.map(|c| c[to_usize(12)])).map(|c| c.data_high)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x1622: ExtVal = ((x1619 + (x13.load_ext::(ctx, 0) * x1620.load(ctx, 0))) - + (x14.load_ext::(ctx, 0) * x1621.load(ctx, 0))); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1623: ExtVal = (x1622 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x1624: ExtVal = - ((x1604 + (x1608.load(ctx, 0) * inv_0(x1615)?)) + (x1616.load(ctx, 0) * inv_0(x1623)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x1625: ExtVal = (x1615 * x1623); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1626: BoundLayout = - (((x271.map(|c| c[to_usize(13)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1627: BoundLayout = - (((x271.map(|c| c[to_usize(13)])).map(|c| c.addr)).map(|c| c._super)); - let x1628: BoundLayout = - (((x271.map(|c| c[to_usize(13)])).map(|c| c.cycle)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x1629: ExtVal = ((x11.load_ext::(ctx, 0) * x1627.load(ctx, 0)) - + (x12.load_ext::(ctx, 0) * x1628.load(ctx, 0))); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1630: BoundLayout = - (((x271.map(|c| c[to_usize(13)])).map(|c| c.data_low)).map(|c| c._super)); - let x1631: BoundLayout = - (((x271.map(|c| c[to_usize(13)])).map(|c| c.data_high)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x1632: ExtVal = ((x1629 + (x13.load_ext::(ctx, 0) * x1630.load(ctx, 0))) - + (x14.load_ext::(ctx, 0) * x1631.load(ctx, 0))); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1633: ExtVal = (x1632 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x1634: ExtVal = (x1624 + (x1626.load(ctx, 0) * inv_0(x1633)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x1635: ExtVal = ((x1608.load(ctx, 0) * x1623) * x1633); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(4)])).store_ext(ctx, x1634); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x1636: ExtVal = ((x8.map(|c| c[to_usize(4)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(3)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x1637: ExtVal = - (((x1636 * (x1625 * x1633)) - x1635) - ((x1615 * x1616.load(ctx, 0)) * x1633)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x1637 - (x1625 * x1626.load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1638: BoundLayout = - (((x271.map(|c| c[to_usize(14)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1639: BoundLayout = - (((x271.map(|c| c[to_usize(14)])).map(|c| c.addr)).map(|c| c._super)); - let x1640: BoundLayout = - (((x271.map(|c| c[to_usize(14)])).map(|c| c.cycle)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x1641: ExtVal = ((x11.load_ext::(ctx, 0) * x1639.load(ctx, 0)) - + (x12.load_ext::(ctx, 0) * x1640.load(ctx, 0))); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1642: BoundLayout = - (((x271.map(|c| c[to_usize(14)])).map(|c| c.data_low)).map(|c| c._super)); - let x1643: BoundLayout = - (((x271.map(|c| c[to_usize(14)])).map(|c| c.data_high)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x1644: ExtVal = ((x1641 + (x13.load_ext::(ctx, 0) * x1642.load(ctx, 0))) - + (x14.load_ext::(ctx, 0) * x1643.load(ctx, 0))); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1645: ExtVal = (x1644 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1646: BoundLayout = - (((x271.map(|c| c[to_usize(15)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1647: BoundLayout = - (((x271.map(|c| c[to_usize(15)])).map(|c| c.addr)).map(|c| c._super)); - let x1648: BoundLayout = - (((x271.map(|c| c[to_usize(15)])).map(|c| c.cycle)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x1649: ExtVal = ((x11.load_ext::(ctx, 0) * x1647.load(ctx, 0)) - + (x12.load_ext::(ctx, 0) * x1648.load(ctx, 0))); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1650: BoundLayout = - (((x271.map(|c| c[to_usize(15)])).map(|c| c.data_low)).map(|c| c._super)); - let x1651: BoundLayout = - (((x271.map(|c| c[to_usize(15)])).map(|c| c.data_high)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x1652: ExtVal = ((x1649 + (x13.load_ext::(ctx, 0) * x1650.load(ctx, 0))) - + (x14.load_ext::(ctx, 0) * x1651.load(ctx, 0))); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1653: ExtVal = (x1652 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x1654: ExtVal = - ((x1634 + (x1638.load(ctx, 0) * inv_0(x1645)?)) + (x1646.load(ctx, 0) * inv_0(x1653)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x1655: ExtVal = (x1645 * x1653); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1656: BoundLayout = - (((x272.map(|c| c[to_usize(0)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1657: BoundLayout = - (((x272.map(|c| c[to_usize(0)])).map(|c| c.cycle)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1658: ExtVal = ((x15.load_ext::(ctx, 0) * x1657.load(ctx, 0)) - + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x1659: ExtVal = (x1654 + (x1656.load(ctx, 0) * inv_0(x1658)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x1660: ExtVal = ((x1638.load(ctx, 0) * x1653) * x1658); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(5)])).store_ext(ctx, x1659); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x1661: ExtVal = ((x8.map(|c| c[to_usize(5)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(4)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x1662: ExtVal = - (((x1661 * (x1655 * x1658)) - x1660) - ((x1645 * x1646.load(ctx, 0)) * x1658)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x1662 - (x1655 * x1656.load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1663: BoundLayout = - (((x272.map(|c| c[to_usize(1)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1664: BoundLayout = - (((x272.map(|c| c[to_usize(1)])).map(|c| c.cycle)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1665: ExtVal = ((x15.load_ext::(ctx, 0) * x1664.load(ctx, 0)) - + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1666: BoundLayout = - (((x272.map(|c| c[to_usize(2)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1667: BoundLayout = - (((x272.map(|c| c[to_usize(2)])).map(|c| c.cycle)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1668: ExtVal = ((x15.load_ext::(ctx, 0) * x1667.load(ctx, 0)) - + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x1669: ExtVal = - ((x1659 + (x1663.load(ctx, 0) * inv_0(x1665)?)) + (x1666.load(ctx, 0) * inv_0(x1668)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x1670: ExtVal = (x1665 * x1668); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1671: BoundLayout = - (((x272.map(|c| c[to_usize(3)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1672: BoundLayout = - (((x272.map(|c| c[to_usize(3)])).map(|c| c.cycle)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1673: ExtVal = ((x15.load_ext::(ctx, 0) * x1672.load(ctx, 0)) - + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x1674: ExtVal = (x1669 + (x1671.load(ctx, 0) * inv_0(x1673)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x1675: ExtVal = ((x1663.load(ctx, 0) * x1668) * x1673); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(6)])).store_ext(ctx, x1674); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x1676: ExtVal = ((x8.map(|c| c[to_usize(6)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(5)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x1677: ExtVal = - (((x1676 * (x1670 * x1673)) - x1675) - ((x1665 * x1666.load(ctx, 0)) * x1673)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x1677 - (x1670 * x1671.load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1678: BoundLayout = - (((x272.map(|c| c[to_usize(4)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1679: BoundLayout = - (((x272.map(|c| c[to_usize(4)])).map(|c| c.cycle)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1680: ExtVal = ((x15.load_ext::(ctx, 0) * x1679.load(ctx, 0)) - + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1681: BoundLayout = - (((x272.map(|c| c[to_usize(5)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1682: BoundLayout = - (((x272.map(|c| c[to_usize(5)])).map(|c| c.cycle)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1683: ExtVal = ((x15.load_ext::(ctx, 0) * x1682.load(ctx, 0)) - + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x1684: ExtVal = - ((x1674 + (x1678.load(ctx, 0) * inv_0(x1680)?)) + (x1681.load(ctx, 0) * inv_0(x1683)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x1685: ExtVal = (x1680 * x1683); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1686: BoundLayout = - (((x272.map(|c| c[to_usize(6)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1687: BoundLayout = - (((x272.map(|c| c[to_usize(6)])).map(|c| c.cycle)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1688: ExtVal = ((x15.load_ext::(ctx, 0) * x1687.load(ctx, 0)) - + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x1689: ExtVal = (x1684 + (x1686.load(ctx, 0) * inv_0(x1688)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x1690: ExtVal = ((x1678.load(ctx, 0) * x1683) * x1688); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(7)])).store_ext(ctx, x1689); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x1691: ExtVal = ((x8.map(|c| c[to_usize(7)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(6)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x1692: ExtVal = - (((x1691 * (x1685 * x1688)) - x1690) - ((x1680 * x1681.load(ctx, 0)) * x1688)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x1692 - (x1685 * x1686.load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1693: BoundLayout = - (((x272.map(|c| c[to_usize(7)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1694: BoundLayout = - (((x272.map(|c| c[to_usize(7)])).map(|c| c.cycle)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1695: ExtVal = ((x15.load_ext::(ctx, 0) * x1694.load(ctx, 0)) - + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1696: BoundLayout = - (((x273.map(|c| c[to_usize(0)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1697: BoundLayout = - (((x273.map(|c| c[to_usize(0)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1698: ExtVal = - ((x9.load_ext::(ctx, 0) * x1697.load(ctx, 0)) + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x1699: ExtVal = - ((x1689 + (x1693.load(ctx, 0) * inv_0(x1695)?)) + (x1696.load(ctx, 0) * inv_0(x1698)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x1700: ExtVal = (x1695 * x1698); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1701: BoundLayout = - (((x273.map(|c| c[to_usize(1)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1702: BoundLayout = - (((x273.map(|c| c[to_usize(1)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1703: ExtVal = - ((x9.load_ext::(ctx, 0) * x1702.load(ctx, 0)) + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x1704: ExtVal = (x1699 + (x1701.load(ctx, 0) * inv_0(x1703)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x1705: ExtVal = ((x1693.load(ctx, 0) * x1698) * x1703); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(8)])).store_ext(ctx, x1704); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x1706: ExtVal = ((x8.map(|c| c[to_usize(8)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(7)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x1707: ExtVal = - (((x1706 * (x1700 * x1703)) - x1705) - ((x1695 * x1696.load(ctx, 0)) * x1703)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x1707 - (x1700 * x1701.load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1708: BoundLayout = - (((x273.map(|c| c[to_usize(2)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1709: BoundLayout = - (((x273.map(|c| c[to_usize(2)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1710: ExtVal = - ((x9.load_ext::(ctx, 0) * x1709.load(ctx, 0)) + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1711: BoundLayout = - (((x273.map(|c| c[to_usize(3)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1712: BoundLayout = - (((x273.map(|c| c[to_usize(3)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1713: ExtVal = - ((x9.load_ext::(ctx, 0) * x1712.load(ctx, 0)) + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x1714: ExtVal = - ((x1704 + (x1708.load(ctx, 0) * inv_0(x1710)?)) + (x1711.load(ctx, 0) * inv_0(x1713)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x1715: ExtVal = (x1710 * x1713); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1716: BoundLayout = - (((x273.map(|c| c[to_usize(4)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1717: BoundLayout = - (((x273.map(|c| c[to_usize(4)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1718: ExtVal = - ((x9.load_ext::(ctx, 0) * x1717.load(ctx, 0)) + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x1719: ExtVal = (x1714 + (x1716.load(ctx, 0) * inv_0(x1718)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x1720: ExtVal = ((x1708.load(ctx, 0) * x1713) * x1718); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(9)])).store_ext(ctx, x1719); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x1721: ExtVal = ((x8.map(|c| c[to_usize(9)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(8)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x1722: ExtVal = - (((x1721 * (x1715 * x1718)) - x1720) - ((x1710 * x1711.load(ctx, 0)) * x1718)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x1722 - (x1715 * x1716.load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1723: BoundLayout = - (((x273.map(|c| c[to_usize(5)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1724: BoundLayout = - (((x273.map(|c| c[to_usize(5)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1725: ExtVal = - ((x9.load_ext::(ctx, 0) * x1724.load(ctx, 0)) + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1726: BoundLayout = - (((x273.map(|c| c[to_usize(6)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1727: BoundLayout = - (((x273.map(|c| c[to_usize(6)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1728: ExtVal = - ((x9.load_ext::(ctx, 0) * x1727.load(ctx, 0)) + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x1729: ExtVal = - ((x1719 + (x1723.load(ctx, 0) * inv_0(x1725)?)) + (x1726.load(ctx, 0) * inv_0(x1728)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x1730: ExtVal = (x1725 * x1728); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1731: BoundLayout = - (((x273.map(|c| c[to_usize(7)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1732: BoundLayout = - (((x273.map(|c| c[to_usize(7)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1733: ExtVal = - ((x9.load_ext::(ctx, 0) * x1732.load(ctx, 0)) + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x1734: ExtVal = (x1729 + (x1731.load(ctx, 0) * inv_0(x1733)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x1735: ExtVal = ((x1723.load(ctx, 0) * x1728) * x1733); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(10)])).store_ext(ctx, x1734); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x1736: ExtVal = ((x8.map(|c| c[to_usize(10)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(9)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x1737: ExtVal = - (((x1736 * (x1730 * x1733)) - x1735) - ((x1725 * x1726.load(ctx, 0)) * x1733)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x1737 - (x1730 * x1731.load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1738: BoundLayout = - (((x273.map(|c| c[to_usize(8)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1739: BoundLayout = - (((x273.map(|c| c[to_usize(8)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1740: ExtVal = - ((x9.load_ext::(ctx, 0) * x1739.load(ctx, 0)) + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1741: BoundLayout = - (((x273.map(|c| c[to_usize(9)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1742: BoundLayout = - (((x273.map(|c| c[to_usize(9)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1743: ExtVal = - ((x9.load_ext::(ctx, 0) * x1742.load(ctx, 0)) + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x1744: ExtVal = - ((x1734 + (x1738.load(ctx, 0) * inv_0(x1740)?)) + (x1741.load(ctx, 0) * inv_0(x1743)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x1745: ExtVal = (x1740 * x1743); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1746: BoundLayout = - (((x273.map(|c| c[to_usize(10)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1747: BoundLayout = - (((x273.map(|c| c[to_usize(10)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1748: ExtVal = - ((x9.load_ext::(ctx, 0) * x1747.load(ctx, 0)) + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x1749: ExtVal = (x1744 + (x1746.load(ctx, 0) * inv_0(x1748)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x1750: ExtVal = ((x1738.load(ctx, 0) * x1743) * x1748); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(11)])).store_ext(ctx, x1749); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x1751: ExtVal = ((x8.map(|c| c[to_usize(11)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(10)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x1752: ExtVal = - (((x1751 * (x1745 * x1748)) - x1750) - ((x1740 * x1741.load(ctx, 0)) * x1748)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x1752 - (x1745 * x1746.load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1753: BoundLayout = - (((x273.map(|c| c[to_usize(11)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1754: BoundLayout = - (((x273.map(|c| c[to_usize(11)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1755: ExtVal = - ((x9.load_ext::(ctx, 0) * x1754.load(ctx, 0)) + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1756: BoundLayout = - (((x273.map(|c| c[to_usize(12)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1757: BoundLayout = - (((x273.map(|c| c[to_usize(12)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1758: ExtVal = - ((x9.load_ext::(ctx, 0) * x1757.load(ctx, 0)) + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x1759: ExtVal = - ((x1749 + (x1753.load(ctx, 0) * inv_0(x1755)?)) + (x1756.load(ctx, 0) * inv_0(x1758)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x1760: ExtVal = (x1755 * x1758); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1761: BoundLayout = - (((x273.map(|c| c[to_usize(13)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1762: BoundLayout = - (((x273.map(|c| c[to_usize(13)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1763: ExtVal = - ((x9.load_ext::(ctx, 0) * x1762.load(ctx, 0)) + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x1764: ExtVal = (x1759 + (x1761.load(ctx, 0) * inv_0(x1763)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x1765: ExtVal = ((x1753.load(ctx, 0) * x1758) * x1763); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(12)])).store_ext(ctx, x1764); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x1766: ExtVal = ((x8.map(|c| c[to_usize(12)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(11)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x1767: ExtVal = - (((x1766 * (x1760 * x1763)) - x1765) - ((x1755 * x1756.load(ctx, 0)) * x1763)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x1767 - (x1760 * x1761.load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1768: BoundLayout = - (((x273.map(|c| c[to_usize(14)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1769: BoundLayout = - (((x273.map(|c| c[to_usize(14)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1770: ExtVal = - ((x9.load_ext::(ctx, 0) * x1769.load(ctx, 0)) + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1771: BoundLayout = - (((x273.map(|c| c[to_usize(15)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1772: BoundLayout = - (((x273.map(|c| c[to_usize(15)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1773: ExtVal = - ((x9.load_ext::(ctx, 0) * x1772.load(ctx, 0)) + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x1774: ExtVal = - ((x1764 + (x1768.load(ctx, 0) * inv_0(x1770)?)) + (x1771.load(ctx, 0) * inv_0(x1773)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x1775: ExtVal = (x1770 * x1773); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1776: BoundLayout = - (((x274.map(|c| c[to_usize(0)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1777: BoundLayout = - (((x274.map(|c| c[to_usize(0)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1778: ExtVal = ((x123.load_ext::(ctx, 0) * x1777.load(ctx, 0)) - + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x1779: ExtVal = (x1774 + (x1776.load(ctx, 0) * inv_0(x1778)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x1780: ExtVal = ((x1768.load(ctx, 0) * x1773) * x1778); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(13)])).store_ext(ctx, x1779); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x1781: ExtVal = ((x8.map(|c| c[to_usize(13)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(12)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x1782: ExtVal = - (((x1781 * (x1775 * x1778)) - x1780) - ((x1770 * x1771.load(ctx, 0)) * x1778)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x1782 - (x1775 * x1776.load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1783: BoundLayout = - (((x274.map(|c| c[to_usize(1)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1784: BoundLayout = - (((x274.map(|c| c[to_usize(1)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1785: ExtVal = ((x123.load_ext::(ctx, 0) * x1784.load(ctx, 0)) - + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1786: BoundLayout = - (((x274.map(|c| c[to_usize(2)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1787: BoundLayout = - (((x274.map(|c| c[to_usize(2)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1788: ExtVal = ((x123.load_ext::(ctx, 0) * x1787.load(ctx, 0)) - + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x1789: ExtVal = - ((x1779 + (x1783.load(ctx, 0) * inv_0(x1785)?)) + (x1786.load(ctx, 0) * inv_0(x1788)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x1790: ExtVal = (x1785 * x1788); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1791: BoundLayout = - (((x274.map(|c| c[to_usize(3)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1792: BoundLayout = - (((x274.map(|c| c[to_usize(3)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1793: ExtVal = ((x123.load_ext::(ctx, 0) * x1792.load(ctx, 0)) - + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x1794: ExtVal = (x1789 + (x1791.load(ctx, 0) * inv_0(x1793)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x1795: ExtVal = ((x1783.load(ctx, 0) * x1788) * x1793); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(14)])).store_ext(ctx, x1794); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x1796: ExtVal = ((x8.map(|c| c[to_usize(14)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(13)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x1797: ExtVal = - (((x1796 * (x1790 * x1793)) - x1795) - ((x1785 * x1786.load(ctx, 0)) * x1793)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x1797 - (x1790 * x1791.load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1798: BoundLayout = - (((x274.map(|c| c[to_usize(4)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1799: BoundLayout = - (((x274.map(|c| c[to_usize(4)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1800: ExtVal = ((x123.load_ext::(ctx, 0) * x1799.load(ctx, 0)) - + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1801: BoundLayout = - (((x274.map(|c| c[to_usize(5)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1802: BoundLayout = - (((x274.map(|c| c[to_usize(5)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1803: ExtVal = ((x123.load_ext::(ctx, 0) * x1802.load(ctx, 0)) - + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x1804: ExtVal = - ((x1794 + (x1798.load(ctx, 0) * inv_0(x1800)?)) + (x1801.load(ctx, 0) * inv_0(x1803)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x1805: ExtVal = (x1800 * x1803); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1806: BoundLayout = - (((x274.map(|c| c[to_usize(6)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1807: BoundLayout = - (((x274.map(|c| c[to_usize(6)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1808: ExtVal = ((x123.load_ext::(ctx, 0) * x1807.load(ctx, 0)) - + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x1809: ExtVal = (x1804 + (x1806.load(ctx, 0) * inv_0(x1808)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x1810: ExtVal = ((x1798.load(ctx, 0) * x1803) * x1808); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(15)])).store_ext(ctx, x1809); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x1811: ExtVal = ((x8.map(|c| c[to_usize(15)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(14)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x1812: ExtVal = - (((x1811 * (x1805 * x1808)) - x1810) - ((x1800 * x1801.load(ctx, 0)) * x1808)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x1812 - (x1805 * x1806.load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1813: BoundLayout = - (((x274.map(|c| c[to_usize(7)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1814: BoundLayout = - (((x274.map(|c| c[to_usize(7)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1815: ExtVal = ((x123.load_ext::(ctx, 0) * x1814.load(ctx, 0)) - + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1816: BoundLayout = - (((x274.map(|c| c[to_usize(8)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1817: BoundLayout = - (((x274.map(|c| c[to_usize(8)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1818: ExtVal = ((x123.load_ext::(ctx, 0) * x1817.load(ctx, 0)) - + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x1819: ExtVal = - ((x1809 + (x1813.load(ctx, 0) * inv_0(x1815)?)) + (x1816.load(ctx, 0) * inv_0(x1818)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x1820: ExtVal = (x1815 * x1818); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1821: BoundLayout = - (((x274.map(|c| c[to_usize(9)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1822: BoundLayout = - (((x274.map(|c| c[to_usize(9)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1823: ExtVal = ((x123.load_ext::(ctx, 0) * x1822.load(ctx, 0)) - + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x1824: ExtVal = (x1819 + (x1821.load(ctx, 0) * inv_0(x1823)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x1825: ExtVal = ((x1813.load(ctx, 0) * x1818) * x1823); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(16)])).store_ext(ctx, x1824); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x1826: ExtVal = ((x8.map(|c| c[to_usize(16)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(15)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x1827: ExtVal = - (((x1826 * (x1820 * x1823)) - x1825) - ((x1815 * x1816.load(ctx, 0)) * x1823)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x1827 - (x1820 * x1821.load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1828: BoundLayout = - (((x274.map(|c| c[to_usize(10)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1829: BoundLayout = - (((x274.map(|c| c[to_usize(10)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1830: ExtVal = ((x123.load_ext::(ctx, 0) * x1829.load(ctx, 0)) - + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1831: BoundLayout = - (((x274.map(|c| c[to_usize(11)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1832: BoundLayout = - (((x274.map(|c| c[to_usize(11)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1833: ExtVal = ((x123.load_ext::(ctx, 0) * x1832.load(ctx, 0)) - + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x1834: ExtVal = - ((x1824 + (x1828.load(ctx, 0) * inv_0(x1830)?)) + (x1831.load(ctx, 0) * inv_0(x1833)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x1835: ExtVal = (x1830 * x1833); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1836: BoundLayout = - (((x274.map(|c| c[to_usize(12)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1837: BoundLayout = - (((x274.map(|c| c[to_usize(12)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1838: ExtVal = ((x123.load_ext::(ctx, 0) * x1837.load(ctx, 0)) - + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x1839: ExtVal = (x1834 + (x1836.load(ctx, 0) * inv_0(x1838)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x1840: ExtVal = ((x1828.load(ctx, 0) * x1833) * x1838); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(17)])).store_ext(ctx, x1839); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x1841: ExtVal = ((x8.map(|c| c[to_usize(17)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(16)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x1842: ExtVal = - (((x1841 * (x1835 * x1838)) - x1840) - ((x1830 * x1831.load(ctx, 0)) * x1838)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x1842 - (x1835 * x1836.load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1843: BoundLayout = - (((x274.map(|c| c[to_usize(13)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1844: BoundLayout = - (((x274.map(|c| c[to_usize(13)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1845: ExtVal = ((x123.load_ext::(ctx, 0) * x1844.load(ctx, 0)) - + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1846: BoundLayout = - (((x274.map(|c| c[to_usize(14)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1847: BoundLayout = - (((x274.map(|c| c[to_usize(14)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1848: ExtVal = ((x123.load_ext::(ctx, 0) * x1847.load(ctx, 0)) - + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x1849: ExtVal = - ((x1839 + (x1843.load(ctx, 0) * inv_0(x1845)?)) + (x1846.load(ctx, 0) * inv_0(x1848)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x1850: ExtVal = (x1845 * x1848); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1851: BoundLayout = - (((x274.map(|c| c[to_usize(15)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1852: BoundLayout = - (((x274.map(|c| c[to_usize(15)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1853: ExtVal = ((x123.load_ext::(ctx, 0) * x1852.load(ctx, 0)) - + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x1854: ExtVal = ((x1843.load(ctx, 0) * x1848) * x1853); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(18)])) - .store_ext(ctx, (x1849 + (x1851.load(ctx, 0) * inv_0(x1853)?))); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x1855: ExtVal = ((x8.map(|c| c[to_usize(18)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(17)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x1856: ExtVal = - (((x1855 * (x1850 * x1853)) - x1854) - ((x1845 * x1846.load(ctx, 0)) * x1853)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x1856 - (x1850 * x1851.load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - x295 = x51; - } else if is_true(((x6.map(|c| c[to_usize(8)])).map(|c| c._super)).load(ctx, 0)) { - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x1857: ExtVal = (x9.load_ext::(ctx, 0) - * ((x277.map(|c| c.val)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1858: ExtVal = (x1857 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x1859: ExtVal = - (((x277.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x1858)?); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x1860: ExtVal = - ((x8.map(|c| c[to_usize(18)])).load_unchecked_ext::(ctx, 1) + x1859); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x1861: ExtVal = (x9.load_ext::(ctx, 0) - * ((x278.map(|c| c.val)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1862: ExtVal = (x1861 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x1863: ExtVal = - (((x278.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x1862)?); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x1864: ExtVal = (x1858 * x1862); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x1865: ExtVal = (((x277.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * x1862); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1866: BoundLayout = - (((x280.map(|c| c[to_usize(0)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1867: BoundLayout = - (((x280.map(|c| c[to_usize(0)])).map(|c| c.addr)).map(|c| c._super)); - let x1868: BoundLayout = - (((x280.map(|c| c[to_usize(0)])).map(|c| c.cycle)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x1869: ExtVal = ((x11.load_ext::(ctx, 0) * x1867.load(ctx, 0)) - + (x12.load_ext::(ctx, 0) * x1868.load(ctx, 0))); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1870: BoundLayout = - (((x280.map(|c| c[to_usize(0)])).map(|c| c.data_low)).map(|c| c._super)); - let x1871: BoundLayout = - (((x280.map(|c| c[to_usize(0)])).map(|c| c.data_high)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x1872: ExtVal = ((x1869 + (x13.load_ext::(ctx, 0) * x1870.load(ctx, 0))) - + (x14.load_ext::(ctx, 0) * x1871.load(ctx, 0))); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1873: ExtVal = (x1872 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x1874: ExtVal = ((x1860 + x1863) + (x1866.load(ctx, 0) * inv_0(x1873)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(0)])).store_ext(ctx, x1874); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x1875: ExtVal = ((x8.map(|c| c[to_usize(0)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(18)])).load_unchecked_ext::(ctx, 1)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x1876: ExtVal = (((x1875 * (x1864 * x1873)) - (x1865 * x1873)) - - ((x1858 * ((x278.map(|c| c.count)).map(|c| c._super)).load(ctx, 0)) * x1873)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x1876 - (x1864 * x1866.load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1877: BoundLayout = - (((x280.map(|c| c[to_usize(1)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1878: BoundLayout = - (((x280.map(|c| c[to_usize(1)])).map(|c| c.addr)).map(|c| c._super)); - let x1879: BoundLayout = - (((x280.map(|c| c[to_usize(1)])).map(|c| c.cycle)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x1880: ExtVal = ((x11.load_ext::(ctx, 0) * x1878.load(ctx, 0)) - + (x12.load_ext::(ctx, 0) * x1879.load(ctx, 0))); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1881: BoundLayout = - (((x280.map(|c| c[to_usize(1)])).map(|c| c.data_low)).map(|c| c._super)); - let x1882: BoundLayout = - (((x280.map(|c| c[to_usize(1)])).map(|c| c.data_high)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x1883: ExtVal = ((x1880 + (x13.load_ext::(ctx, 0) * x1881.load(ctx, 0))) - + (x14.load_ext::(ctx, 0) * x1882.load(ctx, 0))); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1884: ExtVal = (x1883 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1885: BoundLayout = - (((x280.map(|c| c[to_usize(2)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1886: BoundLayout = - (((x280.map(|c| c[to_usize(2)])).map(|c| c.addr)).map(|c| c._super)); - let x1887: BoundLayout = - (((x280.map(|c| c[to_usize(2)])).map(|c| c.cycle)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x1888: ExtVal = ((x11.load_ext::(ctx, 0) * x1886.load(ctx, 0)) - + (x12.load_ext::(ctx, 0) * x1887.load(ctx, 0))); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1889: BoundLayout = - (((x280.map(|c| c[to_usize(2)])).map(|c| c.data_low)).map(|c| c._super)); - let x1890: BoundLayout = - (((x280.map(|c| c[to_usize(2)])).map(|c| c.data_high)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x1891: ExtVal = ((x1888 + (x13.load_ext::(ctx, 0) * x1889.load(ctx, 0))) - + (x14.load_ext::(ctx, 0) * x1890.load(ctx, 0))); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1892: ExtVal = (x1891 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x1893: ExtVal = - ((x1874 + (x1877.load(ctx, 0) * inv_0(x1884)?)) + (x1885.load(ctx, 0) * inv_0(x1892)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x1894: ExtVal = (x1884 * x1892); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1895: BoundLayout = - (((x280.map(|c| c[to_usize(3)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1896: BoundLayout = - (((x280.map(|c| c[to_usize(3)])).map(|c| c.addr)).map(|c| c._super)); - let x1897: BoundLayout = - (((x280.map(|c| c[to_usize(3)])).map(|c| c.cycle)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x1898: ExtVal = ((x11.load_ext::(ctx, 0) * x1896.load(ctx, 0)) - + (x12.load_ext::(ctx, 0) * x1897.load(ctx, 0))); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1899: BoundLayout = - (((x280.map(|c| c[to_usize(3)])).map(|c| c.data_low)).map(|c| c._super)); - let x1900: BoundLayout = - (((x280.map(|c| c[to_usize(3)])).map(|c| c.data_high)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x1901: ExtVal = ((x1898 + (x13.load_ext::(ctx, 0) * x1899.load(ctx, 0))) - + (x14.load_ext::(ctx, 0) * x1900.load(ctx, 0))); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1902: ExtVal = (x1901 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x1903: ExtVal = (x1893 + (x1895.load(ctx, 0) * inv_0(x1902)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x1904: ExtVal = ((x1877.load(ctx, 0) * x1892) * x1902); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(1)])).store_ext(ctx, x1903); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x1905: ExtVal = ((x8.map(|c| c[to_usize(1)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(0)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x1906: ExtVal = - (((x1905 * (x1894 * x1902)) - x1904) - ((x1884 * x1885.load(ctx, 0)) * x1902)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x1906 - (x1894 * x1895.load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1907: BoundLayout = - (((x280.map(|c| c[to_usize(4)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1908: BoundLayout = - (((x280.map(|c| c[to_usize(4)])).map(|c| c.addr)).map(|c| c._super)); - let x1909: BoundLayout = - (((x280.map(|c| c[to_usize(4)])).map(|c| c.cycle)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x1910: ExtVal = ((x11.load_ext::(ctx, 0) * x1908.load(ctx, 0)) - + (x12.load_ext::(ctx, 0) * x1909.load(ctx, 0))); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1911: BoundLayout = - (((x280.map(|c| c[to_usize(4)])).map(|c| c.data_low)).map(|c| c._super)); - let x1912: BoundLayout = - (((x280.map(|c| c[to_usize(4)])).map(|c| c.data_high)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x1913: ExtVal = ((x1910 + (x13.load_ext::(ctx, 0) * x1911.load(ctx, 0))) - + (x14.load_ext::(ctx, 0) * x1912.load(ctx, 0))); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1914: ExtVal = (x1913 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1915: BoundLayout = - (((x280.map(|c| c[to_usize(5)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1916: BoundLayout = - (((x280.map(|c| c[to_usize(5)])).map(|c| c.addr)).map(|c| c._super)); - let x1917: BoundLayout = - (((x280.map(|c| c[to_usize(5)])).map(|c| c.cycle)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x1918: ExtVal = ((x11.load_ext::(ctx, 0) * x1916.load(ctx, 0)) - + (x12.load_ext::(ctx, 0) * x1917.load(ctx, 0))); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1919: BoundLayout = - (((x280.map(|c| c[to_usize(5)])).map(|c| c.data_low)).map(|c| c._super)); - let x1920: BoundLayout = - (((x280.map(|c| c[to_usize(5)])).map(|c| c.data_high)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x1921: ExtVal = ((x1918 + (x13.load_ext::(ctx, 0) * x1919.load(ctx, 0))) - + (x14.load_ext::(ctx, 0) * x1920.load(ctx, 0))); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1922: ExtVal = (x1921 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x1923: ExtVal = - ((x1903 + (x1907.load(ctx, 0) * inv_0(x1914)?)) + (x1915.load(ctx, 0) * inv_0(x1922)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x1924: ExtVal = (x1914 * x1922); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1925: BoundLayout = - (((x280.map(|c| c[to_usize(6)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1926: BoundLayout = - (((x280.map(|c| c[to_usize(6)])).map(|c| c.addr)).map(|c| c._super)); - let x1927: BoundLayout = - (((x280.map(|c| c[to_usize(6)])).map(|c| c.cycle)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x1928: ExtVal = ((x11.load_ext::(ctx, 0) * x1926.load(ctx, 0)) - + (x12.load_ext::(ctx, 0) * x1927.load(ctx, 0))); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1929: BoundLayout = - (((x280.map(|c| c[to_usize(6)])).map(|c| c.data_low)).map(|c| c._super)); - let x1930: BoundLayout = - (((x280.map(|c| c[to_usize(6)])).map(|c| c.data_high)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x1931: ExtVal = ((x1928 + (x13.load_ext::(ctx, 0) * x1929.load(ctx, 0))) - + (x14.load_ext::(ctx, 0) * x1930.load(ctx, 0))); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1932: ExtVal = (x1931 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x1933: ExtVal = (x1923 + (x1925.load(ctx, 0) * inv_0(x1932)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x1934: ExtVal = ((x1907.load(ctx, 0) * x1922) * x1932); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(2)])).store_ext(ctx, x1933); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x1935: ExtVal = ((x8.map(|c| c[to_usize(2)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(1)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x1936: ExtVal = - (((x1935 * (x1924 * x1932)) - x1934) - ((x1914 * x1915.load(ctx, 0)) * x1932)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x1936 - (x1924 * x1925.load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1937: BoundLayout = - (((x280.map(|c| c[to_usize(7)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1938: BoundLayout = - (((x280.map(|c| c[to_usize(7)])).map(|c| c.addr)).map(|c| c._super)); - let x1939: BoundLayout = - (((x280.map(|c| c[to_usize(7)])).map(|c| c.cycle)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x1940: ExtVal = ((x11.load_ext::(ctx, 0) * x1938.load(ctx, 0)) - + (x12.load_ext::(ctx, 0) * x1939.load(ctx, 0))); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1941: BoundLayout = - (((x280.map(|c| c[to_usize(7)])).map(|c| c.data_low)).map(|c| c._super)); - let x1942: BoundLayout = - (((x280.map(|c| c[to_usize(7)])).map(|c| c.data_high)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x1943: ExtVal = ((x1940 + (x13.load_ext::(ctx, 0) * x1941.load(ctx, 0))) - + (x14.load_ext::(ctx, 0) * x1942.load(ctx, 0))); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1944: ExtVal = (x1943 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1945: BoundLayout = - (((x281.map(|c| c[to_usize(0)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1946: BoundLayout = - (((x281.map(|c| c[to_usize(0)])).map(|c| c.cycle)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1947: ExtVal = ((x15.load_ext::(ctx, 0) * x1946.load(ctx, 0)) - + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x1948: ExtVal = - ((x1933 + (x1937.load(ctx, 0) * inv_0(x1944)?)) + (x1945.load(ctx, 0) * inv_0(x1947)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x1949: ExtVal = (x1944 * x1947); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1950: BoundLayout = - (((x281.map(|c| c[to_usize(1)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1951: BoundLayout = - (((x281.map(|c| c[to_usize(1)])).map(|c| c.cycle)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1952: ExtVal = ((x15.load_ext::(ctx, 0) * x1951.load(ctx, 0)) - + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x1953: ExtVal = (x1948 + (x1950.load(ctx, 0) * inv_0(x1952)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x1954: ExtVal = ((x1937.load(ctx, 0) * x1947) * x1952); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(3)])).store_ext(ctx, x1953); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x1955: ExtVal = ((x8.map(|c| c[to_usize(3)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(2)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x1956: ExtVal = - (((x1955 * (x1949 * x1952)) - x1954) - ((x1944 * x1945.load(ctx, 0)) * x1952)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x1956 - (x1949 * x1950.load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1957: BoundLayout = - (((x281.map(|c| c[to_usize(2)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1958: BoundLayout = - (((x281.map(|c| c[to_usize(2)])).map(|c| c.cycle)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1959: ExtVal = ((x15.load_ext::(ctx, 0) * x1958.load(ctx, 0)) - + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1960: BoundLayout = - (((x281.map(|c| c[to_usize(3)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1961: BoundLayout = - (((x281.map(|c| c[to_usize(3)])).map(|c| c.cycle)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1962: ExtVal = ((x15.load_ext::(ctx, 0) * x1961.load(ctx, 0)) - + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x1963: ExtVal = - ((x1953 + (x1957.load(ctx, 0) * inv_0(x1959)?)) + (x1960.load(ctx, 0) * inv_0(x1962)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x1964: ExtVal = (x1959 * x1962); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1965: BoundLayout = - (((x282.map(|c| c[to_usize(0)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1966: BoundLayout = - (((x282.map(|c| c[to_usize(0)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1967: ExtVal = - ((x9.load_ext::(ctx, 0) * x1966.load(ctx, 0)) + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x1968: ExtVal = (x1963 + (x1965.load(ctx, 0) * inv_0(x1967)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x1969: ExtVal = ((x1957.load(ctx, 0) * x1962) * x1967); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(4)])).store_ext(ctx, x1968); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x1970: ExtVal = ((x8.map(|c| c[to_usize(4)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(3)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x1971: ExtVal = - (((x1970 * (x1964 * x1967)) - x1969) - ((x1959 * x1960.load(ctx, 0)) * x1967)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x1971 - (x1964 * x1965.load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1972: BoundLayout = - (((x282.map(|c| c[to_usize(1)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1973: BoundLayout = - (((x282.map(|c| c[to_usize(1)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1974: ExtVal = - ((x9.load_ext::(ctx, 0) * x1973.load(ctx, 0)) + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x1975: ExtVal = (x9.load_ext::(ctx, 0) - * ((x284.map(|c| c.val)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1976: ExtVal = (x1975 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x1977: ExtVal = - (((x284.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x1976)?); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x1978: ExtVal = (x1974 * x1976); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x1979: ExtVal = (x9.load_ext::(ctx, 0) - * ((x285.map(|c| c.val)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1980: ExtVal = (x1979 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x1981: ExtVal = - (((x285.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x1980)?); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x1982: ExtVal = (((x1968 + (x1972.load(ctx, 0) * inv_0(x1974)?)) + x1977) + x1981); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x1983: ExtVal = ((x1972.load(ctx, 0) * x1976) * x1980); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(5)])).store_ext(ctx, x1982); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x1984: ExtVal = ((x8.map(|c| c[to_usize(5)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(4)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x1985: ExtVal = (((x1984 * (x1978 * x1980)) - x1983) - - ((x1974 * ((x284.map(|c| c.count)).map(|c| c._super)).load(ctx, 0)) * x1980)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x1985 - (x1978 * ((x285.map(|c| c.count)).map(|c| c._super)).load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x1986: ExtVal = (x15.load_ext::(ctx, 0) - * ((x286.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1987: ExtVal = (x1986 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x1988: ExtVal = - (((x286.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x1987)?); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(6)])).store_ext(ctx, (x1982 + x1988)); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x1989: ExtVal = ((x8.map(|c| c[to_usize(6)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(5)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x1990: ExtVal = - ((x1989 * x1987) - ((x286.map(|c| c.count)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!(x1990, "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:122 - (x8.map(|c| c[to_usize(18)])) - .store_ext(ctx, (x8.map(|c| c[to_usize(6)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:124 - let x1991: ExtVal = ((x8.map(|c| c[to_usize(18)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(6)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:125 - eqz!(x1991, "zirgen/dsl/passes/GenerateAccum.cpp:125"); - x295 = x51; - } else if is_true(((x6.map(|c| c[to_usize(9)])).map(|c| c._super)).load(ctx, 0)) { - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x1992: BoundLayout = - (((x289.map(|c| c[to_usize(0)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1993: BoundLayout = - (((x289.map(|c| c[to_usize(0)])).map(|c| c.addr)).map(|c| c._super)); - let x1994: BoundLayout = - (((x289.map(|c| c[to_usize(0)])).map(|c| c.cycle)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x1995: ExtVal = ((x11.load_ext::(ctx, 0) * x1993.load(ctx, 0)) - + (x12.load_ext::(ctx, 0) * x1994.load(ctx, 0))); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x1996: BoundLayout = - (((x289.map(|c| c[to_usize(0)])).map(|c| c.data_low)).map(|c| c._super)); - let x1997: BoundLayout = - (((x289.map(|c| c[to_usize(0)])).map(|c| c.data_high)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x1998: ExtVal = ((x1995 + (x13.load_ext::(ctx, 0) * x1996.load(ctx, 0))) - + (x14.load_ext::(ctx, 0) * x1997.load(ctx, 0))); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x1999: ExtVal = (x1998 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x2000: ExtVal = ((x8.map(|c| c[to_usize(18)])).load_unchecked_ext::(ctx, 1) - + (x1992.load(ctx, 0) * inv_0(x1999)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x2001: BoundLayout = - (((x289.map(|c| c[to_usize(1)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x2002: BoundLayout = - (((x289.map(|c| c[to_usize(1)])).map(|c| c.addr)).map(|c| c._super)); - let x2003: BoundLayout = - (((x289.map(|c| c[to_usize(1)])).map(|c| c.cycle)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x2004: ExtVal = ((x11.load_ext::(ctx, 0) * x2002.load(ctx, 0)) - + (x12.load_ext::(ctx, 0) * x2003.load(ctx, 0))); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x2005: BoundLayout = - (((x289.map(|c| c[to_usize(1)])).map(|c| c.data_low)).map(|c| c._super)); - let x2006: BoundLayout = - (((x289.map(|c| c[to_usize(1)])).map(|c| c.data_high)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x2007: ExtVal = ((x2004 + (x13.load_ext::(ctx, 0) * x2005.load(ctx, 0))) - + (x14.load_ext::(ctx, 0) * x2006.load(ctx, 0))); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x2008: ExtVal = (x2007 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x2009: ExtVal = (x1999 * x2008); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x2010: BoundLayout = - (((x289.map(|c| c[to_usize(2)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x2011: BoundLayout = - (((x289.map(|c| c[to_usize(2)])).map(|c| c.addr)).map(|c| c._super)); - let x2012: BoundLayout = - (((x289.map(|c| c[to_usize(2)])).map(|c| c.cycle)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x2013: ExtVal = ((x11.load_ext::(ctx, 0) * x2011.load(ctx, 0)) - + (x12.load_ext::(ctx, 0) * x2012.load(ctx, 0))); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x2014: BoundLayout = - (((x289.map(|c| c[to_usize(2)])).map(|c| c.data_low)).map(|c| c._super)); - let x2015: BoundLayout = - (((x289.map(|c| c[to_usize(2)])).map(|c| c.data_high)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x2016: ExtVal = ((x2013 + (x13.load_ext::(ctx, 0) * x2014.load(ctx, 0))) - + (x14.load_ext::(ctx, 0) * x2015.load(ctx, 0))); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x2017: ExtVal = (x2016 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x2018: ExtVal = - ((x2000 + (x2001.load(ctx, 0) * inv_0(x2008)?)) + (x2010.load(ctx, 0) * inv_0(x2017)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x2019: ExtVal = ((x1992.load(ctx, 0) * x2008) * x2017); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(0)])).store_ext(ctx, x2018); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x2020: ExtVal = ((x8.map(|c| c[to_usize(0)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(18)])).load_unchecked_ext::(ctx, 1)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x2021: ExtVal = - (((x2020 * (x2009 * x2017)) - x2019) - ((x1999 * x2001.load(ctx, 0)) * x2017)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x2021 - (x2009 * x2010.load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x2022: BoundLayout = - (((x289.map(|c| c[to_usize(3)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x2023: BoundLayout = - (((x289.map(|c| c[to_usize(3)])).map(|c| c.addr)).map(|c| c._super)); - let x2024: BoundLayout = - (((x289.map(|c| c[to_usize(3)])).map(|c| c.cycle)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x2025: ExtVal = ((x11.load_ext::(ctx, 0) * x2023.load(ctx, 0)) - + (x12.load_ext::(ctx, 0) * x2024.load(ctx, 0))); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x2026: BoundLayout = - (((x289.map(|c| c[to_usize(3)])).map(|c| c.data_low)).map(|c| c._super)); - let x2027: BoundLayout = - (((x289.map(|c| c[to_usize(3)])).map(|c| c.data_high)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x2028: ExtVal = ((x2025 + (x13.load_ext::(ctx, 0) * x2026.load(ctx, 0))) - + (x14.load_ext::(ctx, 0) * x2027.load(ctx, 0))); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x2029: ExtVal = (x2028 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x2030: BoundLayout = - (((x289.map(|c| c[to_usize(4)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x2031: BoundLayout = - (((x289.map(|c| c[to_usize(4)])).map(|c| c.addr)).map(|c| c._super)); - let x2032: BoundLayout = - (((x289.map(|c| c[to_usize(4)])).map(|c| c.cycle)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x2033: ExtVal = ((x11.load_ext::(ctx, 0) * x2031.load(ctx, 0)) - + (x12.load_ext::(ctx, 0) * x2032.load(ctx, 0))); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x2034: BoundLayout = - (((x289.map(|c| c[to_usize(4)])).map(|c| c.data_low)).map(|c| c._super)); - let x2035: BoundLayout = - (((x289.map(|c| c[to_usize(4)])).map(|c| c.data_high)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x2036: ExtVal = ((x2033 + (x13.load_ext::(ctx, 0) * x2034.load(ctx, 0))) - + (x14.load_ext::(ctx, 0) * x2035.load(ctx, 0))); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x2037: ExtVal = (x2036 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x2038: ExtVal = - ((x2018 + (x2022.load(ctx, 0) * inv_0(x2029)?)) + (x2030.load(ctx, 0) * inv_0(x2037)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x2039: ExtVal = (x2029 * x2037); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x2040: BoundLayout = - (((x289.map(|c| c[to_usize(5)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x2041: BoundLayout = - (((x289.map(|c| c[to_usize(5)])).map(|c| c.addr)).map(|c| c._super)); - let x2042: BoundLayout = - (((x289.map(|c| c[to_usize(5)])).map(|c| c.cycle)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x2043: ExtVal = ((x11.load_ext::(ctx, 0) * x2041.load(ctx, 0)) - + (x12.load_ext::(ctx, 0) * x2042.load(ctx, 0))); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x2044: BoundLayout = - (((x289.map(|c| c[to_usize(5)])).map(|c| c.data_low)).map(|c| c._super)); - let x2045: BoundLayout = - (((x289.map(|c| c[to_usize(5)])).map(|c| c.data_high)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x2046: ExtVal = ((x2043 + (x13.load_ext::(ctx, 0) * x2044.load(ctx, 0))) - + (x14.load_ext::(ctx, 0) * x2045.load(ctx, 0))); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x2047: ExtVal = (x2046 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x2048: ExtVal = (x2038 + (x2040.load(ctx, 0) * inv_0(x2047)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x2049: ExtVal = ((x2022.load(ctx, 0) * x2037) * x2047); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(1)])).store_ext(ctx, x2048); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x2050: ExtVal = ((x8.map(|c| c[to_usize(1)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(0)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x2051: ExtVal = - (((x2050 * (x2039 * x2047)) - x2049) - ((x2029 * x2030.load(ctx, 0)) * x2047)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x2051 - (x2039 * x2040.load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x2052: BoundLayout = - (((x289.map(|c| c[to_usize(6)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x2053: BoundLayout = - (((x289.map(|c| c[to_usize(6)])).map(|c| c.addr)).map(|c| c._super)); - let x2054: BoundLayout = - (((x289.map(|c| c[to_usize(6)])).map(|c| c.cycle)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x2055: ExtVal = ((x11.load_ext::(ctx, 0) * x2053.load(ctx, 0)) - + (x12.load_ext::(ctx, 0) * x2054.load(ctx, 0))); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x2056: BoundLayout = - (((x289.map(|c| c[to_usize(6)])).map(|c| c.data_low)).map(|c| c._super)); - let x2057: BoundLayout = - (((x289.map(|c| c[to_usize(6)])).map(|c| c.data_high)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x2058: ExtVal = ((x2055 + (x13.load_ext::(ctx, 0) * x2056.load(ctx, 0))) - + (x14.load_ext::(ctx, 0) * x2057.load(ctx, 0))); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x2059: ExtVal = (x2058 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x2060: BoundLayout = - (((x289.map(|c| c[to_usize(7)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x2061: BoundLayout = - (((x289.map(|c| c[to_usize(7)])).map(|c| c.addr)).map(|c| c._super)); - let x2062: BoundLayout = - (((x289.map(|c| c[to_usize(7)])).map(|c| c.cycle)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x2063: ExtVal = ((x11.load_ext::(ctx, 0) * x2061.load(ctx, 0)) - + (x12.load_ext::(ctx, 0) * x2062.load(ctx, 0))); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x2064: BoundLayout = - (((x289.map(|c| c[to_usize(7)])).map(|c| c.data_low)).map(|c| c._super)); - let x2065: BoundLayout = - (((x289.map(|c| c[to_usize(7)])).map(|c| c.data_high)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x2066: ExtVal = ((x2063 + (x13.load_ext::(ctx, 0) * x2064.load(ctx, 0))) - + (x14.load_ext::(ctx, 0) * x2065.load(ctx, 0))); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x2067: ExtVal = (x2066 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x2068: ExtVal = - ((x2048 + (x2052.load(ctx, 0) * inv_0(x2059)?)) + (x2060.load(ctx, 0) * inv_0(x2067)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x2069: ExtVal = (x2059 * x2067); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x2070: BoundLayout = - (((x289.map(|c| c[to_usize(8)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x2071: BoundLayout = - (((x289.map(|c| c[to_usize(8)])).map(|c| c.addr)).map(|c| c._super)); - let x2072: BoundLayout = - (((x289.map(|c| c[to_usize(8)])).map(|c| c.cycle)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x2073: ExtVal = ((x11.load_ext::(ctx, 0) * x2071.load(ctx, 0)) - + (x12.load_ext::(ctx, 0) * x2072.load(ctx, 0))); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x2074: BoundLayout = - (((x289.map(|c| c[to_usize(8)])).map(|c| c.data_low)).map(|c| c._super)); - let x2075: BoundLayout = - (((x289.map(|c| c[to_usize(8)])).map(|c| c.data_high)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x2076: ExtVal = ((x2073 + (x13.load_ext::(ctx, 0) * x2074.load(ctx, 0))) - + (x14.load_ext::(ctx, 0) * x2075.load(ctx, 0))); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x2077: ExtVal = (x2076 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x2078: ExtVal = (x2068 + (x2070.load(ctx, 0) * inv_0(x2077)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x2079: ExtVal = ((x2052.load(ctx, 0) * x2067) * x2077); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(2)])).store_ext(ctx, x2078); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x2080: ExtVal = ((x8.map(|c| c[to_usize(2)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(1)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x2081: ExtVal = - (((x2080 * (x2069 * x2077)) - x2079) - ((x2059 * x2060.load(ctx, 0)) * x2077)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x2081 - (x2069 * x2070.load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x2082: BoundLayout = - (((x289.map(|c| c[to_usize(9)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x2083: BoundLayout = - (((x289.map(|c| c[to_usize(9)])).map(|c| c.addr)).map(|c| c._super)); - let x2084: BoundLayout = - (((x289.map(|c| c[to_usize(9)])).map(|c| c.cycle)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x2085: ExtVal = ((x11.load_ext::(ctx, 0) * x2083.load(ctx, 0)) - + (x12.load_ext::(ctx, 0) * x2084.load(ctx, 0))); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x2086: BoundLayout = - (((x289.map(|c| c[to_usize(9)])).map(|c| c.data_low)).map(|c| c._super)); - let x2087: BoundLayout = - (((x289.map(|c| c[to_usize(9)])).map(|c| c.data_high)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x2088: ExtVal = ((x2085 + (x13.load_ext::(ctx, 0) * x2086.load(ctx, 0))) - + (x14.load_ext::(ctx, 0) * x2087.load(ctx, 0))); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x2089: ExtVal = (x2088 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x2090: BoundLayout = - (((x289.map(|c| c[to_usize(10)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x2091: BoundLayout = - (((x289.map(|c| c[to_usize(10)])).map(|c| c.addr)).map(|c| c._super)); - let x2092: BoundLayout = - (((x289.map(|c| c[to_usize(10)])).map(|c| c.cycle)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x2093: ExtVal = ((x11.load_ext::(ctx, 0) * x2091.load(ctx, 0)) - + (x12.load_ext::(ctx, 0) * x2092.load(ctx, 0))); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x2094: BoundLayout = - (((x289.map(|c| c[to_usize(10)])).map(|c| c.data_low)).map(|c| c._super)); - let x2095: BoundLayout = - (((x289.map(|c| c[to_usize(10)])).map(|c| c.data_high)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x2096: ExtVal = ((x2093 + (x13.load_ext::(ctx, 0) * x2094.load(ctx, 0))) - + (x14.load_ext::(ctx, 0) * x2095.load(ctx, 0))); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x2097: ExtVal = (x2096 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x2098: ExtVal = - ((x2078 + (x2082.load(ctx, 0) * inv_0(x2089)?)) + (x2090.load(ctx, 0) * inv_0(x2097)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x2099: ExtVal = (x2089 * x2097); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x2100: BoundLayout = - (((x289.map(|c| c[to_usize(11)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x2101: BoundLayout = - (((x289.map(|c| c[to_usize(11)])).map(|c| c.addr)).map(|c| c._super)); - let x2102: BoundLayout = - (((x289.map(|c| c[to_usize(11)])).map(|c| c.cycle)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x2103: ExtVal = ((x11.load_ext::(ctx, 0) * x2101.load(ctx, 0)) - + (x12.load_ext::(ctx, 0) * x2102.load(ctx, 0))); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x2104: BoundLayout = - (((x289.map(|c| c[to_usize(11)])).map(|c| c.data_low)).map(|c| c._super)); - let x2105: BoundLayout = - (((x289.map(|c| c[to_usize(11)])).map(|c| c.data_high)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x2106: ExtVal = ((x2103 + (x13.load_ext::(ctx, 0) * x2104.load(ctx, 0))) - + (x14.load_ext::(ctx, 0) * x2105.load(ctx, 0))); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x2107: ExtVal = (x2106 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x2108: ExtVal = (x2098 + (x2100.load(ctx, 0) * inv_0(x2107)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x2109: ExtVal = ((x2082.load(ctx, 0) * x2097) * x2107); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(3)])).store_ext(ctx, x2108); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x2110: ExtVal = ((x8.map(|c| c[to_usize(3)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(2)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x2111: ExtVal = - (((x2110 * (x2099 * x2107)) - x2109) - ((x2089 * x2090.load(ctx, 0)) * x2107)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x2111 - (x2099 * x2100.load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x2112: BoundLayout = - (((x289.map(|c| c[to_usize(12)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x2113: BoundLayout = - (((x289.map(|c| c[to_usize(12)])).map(|c| c.addr)).map(|c| c._super)); - let x2114: BoundLayout = - (((x289.map(|c| c[to_usize(12)])).map(|c| c.cycle)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x2115: ExtVal = ((x11.load_ext::(ctx, 0) * x2113.load(ctx, 0)) - + (x12.load_ext::(ctx, 0) * x2114.load(ctx, 0))); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x2116: BoundLayout = - (((x289.map(|c| c[to_usize(12)])).map(|c| c.data_low)).map(|c| c._super)); - let x2117: BoundLayout = - (((x289.map(|c| c[to_usize(12)])).map(|c| c.data_high)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x2118: ExtVal = ((x2115 + (x13.load_ext::(ctx, 0) * x2116.load(ctx, 0))) - + (x14.load_ext::(ctx, 0) * x2117.load(ctx, 0))); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x2119: ExtVal = (x2118 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x2120: BoundLayout = - (((x289.map(|c| c[to_usize(13)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x2121: BoundLayout = - (((x289.map(|c| c[to_usize(13)])).map(|c| c.addr)).map(|c| c._super)); - let x2122: BoundLayout = - (((x289.map(|c| c[to_usize(13)])).map(|c| c.cycle)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x2123: ExtVal = ((x11.load_ext::(ctx, 0) * x2121.load(ctx, 0)) - + (x12.load_ext::(ctx, 0) * x2122.load(ctx, 0))); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x2124: BoundLayout = - (((x289.map(|c| c[to_usize(13)])).map(|c| c.data_low)).map(|c| c._super)); - let x2125: BoundLayout = - (((x289.map(|c| c[to_usize(13)])).map(|c| c.data_high)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x2126: ExtVal = ((x2123 + (x13.load_ext::(ctx, 0) * x2124.load(ctx, 0))) - + (x14.load_ext::(ctx, 0) * x2125.load(ctx, 0))); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x2127: ExtVal = (x2126 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x2128: ExtVal = - ((x2108 + (x2112.load(ctx, 0) * inv_0(x2119)?)) + (x2120.load(ctx, 0) * inv_0(x2127)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x2129: ExtVal = (x2119 * x2127); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x2130: BoundLayout = - (((x289.map(|c| c[to_usize(14)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x2131: BoundLayout = - (((x289.map(|c| c[to_usize(14)])).map(|c| c.addr)).map(|c| c._super)); - let x2132: BoundLayout = - (((x289.map(|c| c[to_usize(14)])).map(|c| c.cycle)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x2133: ExtVal = ((x11.load_ext::(ctx, 0) * x2131.load(ctx, 0)) - + (x12.load_ext::(ctx, 0) * x2132.load(ctx, 0))); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x2134: BoundLayout = - (((x289.map(|c| c[to_usize(14)])).map(|c| c.data_low)).map(|c| c._super)); - let x2135: BoundLayout = - (((x289.map(|c| c[to_usize(14)])).map(|c| c.data_high)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x2136: ExtVal = ((x2133 + (x13.load_ext::(ctx, 0) * x2134.load(ctx, 0))) - + (x14.load_ext::(ctx, 0) * x2135.load(ctx, 0))); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x2137: ExtVal = (x2136 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x2138: ExtVal = (x2128 + (x2130.load(ctx, 0) * inv_0(x2137)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x2139: ExtVal = ((x2112.load(ctx, 0) * x2127) * x2137); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(4)])).store_ext(ctx, x2138); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x2140: ExtVal = ((x8.map(|c| c[to_usize(4)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(3)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x2141: ExtVal = - (((x2140 * (x2129 * x2137)) - x2139) - ((x2119 * x2120.load(ctx, 0)) * x2137)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x2141 - (x2129 * x2130.load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x2142: BoundLayout = - (((x289.map(|c| c[to_usize(15)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x2143: BoundLayout = - (((x289.map(|c| c[to_usize(15)])).map(|c| c.addr)).map(|c| c._super)); - let x2144: BoundLayout = - (((x289.map(|c| c[to_usize(15)])).map(|c| c.cycle)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x2145: ExtVal = ((x11.load_ext::(ctx, 0) * x2143.load(ctx, 0)) - + (x12.load_ext::(ctx, 0) * x2144.load(ctx, 0))); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x2146: BoundLayout = - (((x289.map(|c| c[to_usize(15)])).map(|c| c.data_low)).map(|c| c._super)); - let x2147: BoundLayout = - (((x289.map(|c| c[to_usize(15)])).map(|c| c.data_high)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:157 - let x2148: ExtVal = ((x2145 + (x13.load_ext::(ctx, 0) * x2146.load(ctx, 0))) - + (x14.load_ext::(ctx, 0) * x2147.load(ctx, 0))); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x2149: ExtVal = (x2148 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x2150: BoundLayout = - (((x290.map(|c| c[to_usize(0)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x2151: BoundLayout = - (((x290.map(|c| c[to_usize(0)])).map(|c| c.cycle)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x2152: ExtVal = ((x15.load_ext::(ctx, 0) * x2151.load(ctx, 0)) - + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x2153: ExtVal = - ((x2138 + (x2142.load(ctx, 0) * inv_0(x2149)?)) + (x2150.load(ctx, 0) * inv_0(x2152)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x2154: ExtVal = (x2149 * x2152); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x2155: BoundLayout = - (((x290.map(|c| c[to_usize(1)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x2156: BoundLayout = - (((x290.map(|c| c[to_usize(1)])).map(|c| c.cycle)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x2157: ExtVal = ((x15.load_ext::(ctx, 0) * x2156.load(ctx, 0)) - + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x2158: ExtVal = (x2153 + (x2155.load(ctx, 0) * inv_0(x2157)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x2159: ExtVal = ((x2142.load(ctx, 0) * x2152) * x2157); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(5)])).store_ext(ctx, x2158); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x2160: ExtVal = ((x8.map(|c| c[to_usize(5)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(4)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x2161: ExtVal = - (((x2160 * (x2154 * x2157)) - x2159) - ((x2149 * x2150.load(ctx, 0)) * x2157)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x2161 - (x2154 * x2155.load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x2162: BoundLayout = - (((x290.map(|c| c[to_usize(2)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x2163: BoundLayout = - (((x290.map(|c| c[to_usize(2)])).map(|c| c.cycle)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x2164: ExtVal = ((x15.load_ext::(ctx, 0) * x2163.load(ctx, 0)) - + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x2165: BoundLayout = - (((x290.map(|c| c[to_usize(3)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x2166: BoundLayout = - (((x290.map(|c| c[to_usize(3)])).map(|c| c.cycle)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x2167: ExtVal = ((x15.load_ext::(ctx, 0) * x2166.load(ctx, 0)) - + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x2168: ExtVal = - ((x2158 + (x2162.load(ctx, 0) * inv_0(x2164)?)) + (x2165.load(ctx, 0) * inv_0(x2167)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x2169: ExtVal = (x2164 * x2167); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x2170: BoundLayout = - (((x290.map(|c| c[to_usize(4)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x2171: BoundLayout = - (((x290.map(|c| c[to_usize(4)])).map(|c| c.cycle)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x2172: ExtVal = ((x15.load_ext::(ctx, 0) * x2171.load(ctx, 0)) - + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x2173: ExtVal = (x2168 + (x2170.load(ctx, 0) * inv_0(x2172)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x2174: ExtVal = ((x2162.load(ctx, 0) * x2167) * x2172); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(6)])).store_ext(ctx, x2173); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x2175: ExtVal = ((x8.map(|c| c[to_usize(6)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(5)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x2176: ExtVal = - (((x2175 * (x2169 * x2172)) - x2174) - ((x2164 * x2165.load(ctx, 0)) * x2172)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x2176 - (x2169 * x2170.load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x2177: BoundLayout = - (((x290.map(|c| c[to_usize(5)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x2178: BoundLayout = - (((x290.map(|c| c[to_usize(5)])).map(|c| c.cycle)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x2179: ExtVal = ((x15.load_ext::(ctx, 0) * x2178.load(ctx, 0)) - + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x2180: BoundLayout = - (((x290.map(|c| c[to_usize(6)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x2181: BoundLayout = - (((x290.map(|c| c[to_usize(6)])).map(|c| c.cycle)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x2182: ExtVal = ((x15.load_ext::(ctx, 0) * x2181.load(ctx, 0)) - + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x2183: ExtVal = - ((x2173 + (x2177.load(ctx, 0) * inv_0(x2179)?)) + (x2180.load(ctx, 0) * inv_0(x2182)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x2184: ExtVal = (x2179 * x2182); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x2185: BoundLayout = - (((x290.map(|c| c[to_usize(7)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x2186: BoundLayout = - (((x290.map(|c| c[to_usize(7)])).map(|c| c.cycle)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x2187: ExtVal = ((x15.load_ext::(ctx, 0) * x2186.load(ctx, 0)) - + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x2188: ExtVal = (x2183 + (x2185.load(ctx, 0) * inv_0(x2187)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x2189: ExtVal = ((x2177.load(ctx, 0) * x2182) * x2187); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(7)])).store_ext(ctx, x2188); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x2190: ExtVal = ((x8.map(|c| c[to_usize(7)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(6)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x2191: ExtVal = - (((x2190 * (x2184 * x2187)) - x2189) - ((x2179 * x2180.load(ctx, 0)) * x2187)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x2191 - (x2184 * x2185.load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x2192: BoundLayout = - (((x291.map(|c| c[to_usize(0)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x2193: BoundLayout = - (((x291.map(|c| c[to_usize(0)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x2194: ExtVal = - ((x9.load_ext::(ctx, 0) * x2193.load(ctx, 0)) + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x2195: BoundLayout = - (((x291.map(|c| c[to_usize(1)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x2196: BoundLayout = - (((x291.map(|c| c[to_usize(1)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x2197: ExtVal = - ((x9.load_ext::(ctx, 0) * x2196.load(ctx, 0)) + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x2198: ExtVal = - ((x2188 + (x2192.load(ctx, 0) * inv_0(x2194)?)) + (x2195.load(ctx, 0) * inv_0(x2197)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x2199: ExtVal = (x2194 * x2197); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x2200: BoundLayout = - (((x291.map(|c| c[to_usize(2)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x2201: BoundLayout = - (((x291.map(|c| c[to_usize(2)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x2202: ExtVal = - ((x9.load_ext::(ctx, 0) * x2201.load(ctx, 0)) + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x2203: ExtVal = (x2198 + (x2200.load(ctx, 0) * inv_0(x2202)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x2204: ExtVal = ((x2192.load(ctx, 0) * x2197) * x2202); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(8)])).store_ext(ctx, x2203); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x2205: ExtVal = ((x8.map(|c| c[to_usize(8)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(7)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x2206: ExtVal = - (((x2205 * (x2199 * x2202)) - x2204) - ((x2194 * x2195.load(ctx, 0)) * x2202)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x2206 - (x2199 * x2200.load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x2207: BoundLayout = - (((x291.map(|c| c[to_usize(3)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x2208: BoundLayout = - (((x291.map(|c| c[to_usize(3)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x2209: ExtVal = - ((x9.load_ext::(ctx, 0) * x2208.load(ctx, 0)) + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x2210: BoundLayout = - (((x291.map(|c| c[to_usize(4)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x2211: BoundLayout = - (((x291.map(|c| c[to_usize(4)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x2212: ExtVal = - ((x9.load_ext::(ctx, 0) * x2211.load(ctx, 0)) + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x2213: ExtVal = - ((x2203 + (x2207.load(ctx, 0) * inv_0(x2209)?)) + (x2210.load(ctx, 0) * inv_0(x2212)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x2214: ExtVal = (x2209 * x2212); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x2215: BoundLayout = - (((x291.map(|c| c[to_usize(5)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x2216: BoundLayout = - (((x291.map(|c| c[to_usize(5)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x2217: ExtVal = - ((x9.load_ext::(ctx, 0) * x2216.load(ctx, 0)) + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x2218: ExtVal = (x2213 + (x2215.load(ctx, 0) * inv_0(x2217)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x2219: ExtVal = ((x2207.load(ctx, 0) * x2212) * x2217); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(9)])).store_ext(ctx, x2218); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x2220: ExtVal = ((x8.map(|c| c[to_usize(9)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(8)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x2221: ExtVal = - (((x2220 * (x2214 * x2217)) - x2219) - ((x2209 * x2210.load(ctx, 0)) * x2217)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x2221 - (x2214 * x2215.load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x2222: BoundLayout = - (((x291.map(|c| c[to_usize(6)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x2223: BoundLayout = - (((x291.map(|c| c[to_usize(6)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x2224: ExtVal = - ((x9.load_ext::(ctx, 0) * x2223.load(ctx, 0)) + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x2225: BoundLayout = - (((x291.map(|c| c[to_usize(7)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x2226: BoundLayout = - (((x291.map(|c| c[to_usize(7)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x2227: ExtVal = - ((x9.load_ext::(ctx, 0) * x2226.load(ctx, 0)) + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x2228: ExtVal = - ((x2218 + (x2222.load(ctx, 0) * inv_0(x2224)?)) + (x2225.load(ctx, 0) * inv_0(x2227)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x2229: ExtVal = (x2224 * x2227); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x2230: BoundLayout = - (((x291.map(|c| c[to_usize(8)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x2231: BoundLayout = - (((x291.map(|c| c[to_usize(8)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x2232: ExtVal = - ((x9.load_ext::(ctx, 0) * x2231.load(ctx, 0)) + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x2233: ExtVal = (x2228 + (x2230.load(ctx, 0) * inv_0(x2232)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x2234: ExtVal = ((x2222.load(ctx, 0) * x2227) * x2232); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(10)])).store_ext(ctx, x2233); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x2235: ExtVal = ((x8.map(|c| c[to_usize(10)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(9)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x2236: ExtVal = - (((x2235 * (x2229 * x2232)) - x2234) - ((x2224 * x2225.load(ctx, 0)) * x2232)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x2236 - (x2229 * x2230.load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x2237: BoundLayout = - (((x291.map(|c| c[to_usize(9)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x2238: BoundLayout = - (((x291.map(|c| c[to_usize(9)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x2239: ExtVal = - ((x9.load_ext::(ctx, 0) * x2238.load(ctx, 0)) + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x2240: BoundLayout = - (((x291.map(|c| c[to_usize(10)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x2241: BoundLayout = - (((x291.map(|c| c[to_usize(10)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x2242: ExtVal = - ((x9.load_ext::(ctx, 0) * x2241.load(ctx, 0)) + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x2243: ExtVal = - ((x2233 + (x2237.load(ctx, 0) * inv_0(x2239)?)) + (x2240.load(ctx, 0) * inv_0(x2242)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x2244: ExtVal = (x2239 * x2242); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x2245: BoundLayout = - (((x291.map(|c| c[to_usize(11)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x2246: BoundLayout = - (((x291.map(|c| c[to_usize(11)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x2247: ExtVal = - ((x9.load_ext::(ctx, 0) * x2246.load(ctx, 0)) + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x2248: ExtVal = (x2243 + (x2245.load(ctx, 0) * inv_0(x2247)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x2249: ExtVal = ((x2237.load(ctx, 0) * x2242) * x2247); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(11)])).store_ext(ctx, x2248); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x2250: ExtVal = ((x8.map(|c| c[to_usize(11)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(10)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x2251: ExtVal = - (((x2250 * (x2244 * x2247)) - x2249) - ((x2239 * x2240.load(ctx, 0)) * x2247)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x2251 - (x2244 * x2245.load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x2252: BoundLayout = - (((x291.map(|c| c[to_usize(12)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x2253: BoundLayout = - (((x291.map(|c| c[to_usize(12)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x2254: ExtVal = - ((x9.load_ext::(ctx, 0) * x2253.load(ctx, 0)) + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x2255: BoundLayout = - (((x291.map(|c| c[to_usize(13)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x2256: BoundLayout = - (((x291.map(|c| c[to_usize(13)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x2257: ExtVal = - ((x9.load_ext::(ctx, 0) * x2256.load(ctx, 0)) + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x2258: ExtVal = - ((x2248 + (x2252.load(ctx, 0) * inv_0(x2254)?)) + (x2255.load(ctx, 0) * inv_0(x2257)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x2259: ExtVal = (x2254 * x2257); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x2260: BoundLayout = - (((x291.map(|c| c[to_usize(14)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x2261: BoundLayout = - (((x291.map(|c| c[to_usize(14)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x2262: ExtVal = - ((x9.load_ext::(ctx, 0) * x2261.load(ctx, 0)) + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x2263: ExtVal = (x2258 + (x2260.load(ctx, 0) * inv_0(x2262)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x2264: ExtVal = ((x2252.load(ctx, 0) * x2257) * x2262); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(12)])).store_ext(ctx, x2263); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x2265: ExtVal = ((x8.map(|c| c[to_usize(12)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(11)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x2266: ExtVal = - (((x2265 * (x2259 * x2262)) - x2264) - ((x2254 * x2255.load(ctx, 0)) * x2262)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x2266 - (x2259 * x2260.load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x2267: BoundLayout = - (((x291.map(|c| c[to_usize(15)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x2268: BoundLayout = - (((x291.map(|c| c[to_usize(15)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x2269: ExtVal = - ((x9.load_ext::(ctx, 0) * x2268.load(ctx, 0)) + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x2270: BoundLayout = - (((x292.map(|c| c[to_usize(0)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x2271: BoundLayout = - (((x292.map(|c| c[to_usize(0)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x2272: ExtVal = ((x123.load_ext::(ctx, 0) * x2271.load(ctx, 0)) - + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x2273: ExtVal = - ((x2263 + (x2267.load(ctx, 0) * inv_0(x2269)?)) + (x2270.load(ctx, 0) * inv_0(x2272)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:217 - let x2274: ExtVal = (x2269 * x2272); - // zirgen/dsl/passes/GenerateAccum.cpp:234 - let x2275: BoundLayout = - (((x292.map(|c| c[to_usize(1)])).map(|c| c.count)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:144 - let x2276: BoundLayout = - (((x292.map(|c| c[to_usize(1)])).map(|c| c.val)).map(|c| c._super)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x2277: ExtVal = ((x123.load_ext::(ctx, 0) * x2276.load(ctx, 0)) - + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x2278: ExtVal = (x2273 + (x2275.load(ctx, 0) * inv_0(x2277)?)); - // zirgen/dsl/passes/GenerateAccum.cpp:223 - let x2279: ExtVal = ((x2267.load(ctx, 0) * x2272) * x2277); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(13)])).store_ext(ctx, x2278); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x2280: ExtVal = ((x8.map(|c| c[to_usize(13)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(12)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x2281: ExtVal = - (((x2280 * (x2274 * x2277)) - x2279) - ((x2269 * x2270.load(ctx, 0)) * x2277)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!( - (x2281 - (x2274 * x2275.load(ctx, 0))), - "zirgen/dsl/passes/GenerateAccum.cpp:182" - ); - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x2282: ExtVal = (x15.load_ext::(ctx, 0) - * ((x293.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x2283: ExtVal = (x2282 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x2284: ExtVal = - (((x293.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x2283)?); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(14)])).store_ext(ctx, (x2278 + x2284)); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x2285: ExtVal = ((x8.map(|c| c[to_usize(14)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(13)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x2286: ExtVal = - ((x2285 * x2283) - ((x293.map(|c| c.count)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!(x2286, "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:122 - (x8.map(|c| c[to_usize(18)])).store_ext( - ctx, - (x8.map(|c| c[to_usize(14)])).load_ext::(ctx, 0), - ); - // zirgen/dsl/passes/GenerateAccum.cpp:124 - let x2287: ExtVal = ((x8.map(|c| c[to_usize(18)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(14)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:125 - eqz!(x2287, "zirgen/dsl/passes/GenerateAccum.cpp:125"); - x295 = x51; - } else if is_true(((x6.map(|c| c[to_usize(10)])).map(|c| c._super)).load(ctx, 0)) { - // zirgen/dsl/passes/GenerateAccum.cpp:146 - let x2288: ExtVal = (x15.load_ext::(ctx, 0) - * ((x294.map(|c| c.cycle)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:238 - let x2289: ExtVal = (x2288 + x16.load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:240 - let x2290: ExtVal = - (((x294.map(|c| c.count)).map(|c| c._super)).load(ctx, 0) * inv_0(x2289)?); - // zirgen/dsl/passes/GenerateAccum.cpp:241 - let x2291: ExtVal = - ((x8.map(|c| c[to_usize(18)])).load_unchecked_ext::(ctx, 1) + x2290); - // zirgen/dsl/passes/GenerateAccum.cpp:189 - (x8.map(|c| c[to_usize(0)])).store_ext(ctx, x2291); - // zirgen/dsl/passes/GenerateAccum.cpp:177 - let x2292: ExtVal = ((x8.map(|c| c[to_usize(0)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(18)])).load_unchecked_ext::(ctx, 1)); - // zirgen/dsl/passes/GenerateAccum.cpp:180 - let x2293: ExtVal = - ((x2292 * x2289) - ((x294.map(|c| c.count)).map(|c| c._super)).load(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:182 - eqz!(x2293, "zirgen/dsl/passes/GenerateAccum.cpp:182"); - // zirgen/dsl/passes/GenerateAccum.cpp:122 - (x8.map(|c| c[to_usize(18)])) - .store_ext(ctx, (x8.map(|c| c[to_usize(0)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:124 - let x2294: ExtVal = ((x8.map(|c| c[to_usize(18)])).load_ext::(ctx, 0) - - (x8.map(|c| c[to_usize(0)])).load_ext::(ctx, 0)); - // zirgen/dsl/passes/GenerateAccum.cpp:125 - eqz!(x2294, "zirgen/dsl/passes/GenerateAccum.cpp:125"); - x295 = x51; - } else { - bail!("Reached unreachable mux arm") - } - return Ok(x51); -} -pub fn step_top_accum<'a>( - ctx: &'a ExecContext, - accum0: BufferRow, - data1: BufferRow, - mix2: BufferRow, -) -> Result<()> { - // zirgen/dsl/passes/GenerateAccum.cpp:526 - let x3: BoundLayout = bind_layout!(LAYOUT_TOP, data1); - let x4: BoundLayout = bind_layout!(LAYOUT_TOP_ACCUM, accum0); - let x5: ComponentStruct = exec_top_accum(ctx, x3, x4, mix2)?; - return Ok(()); -} diff --git a/risc0/circuit/rv32im-v2/src/zirgen/taps.rs b/risc0/circuit/rv32im-v2/src/zirgen/taps.rs deleted file mode 100644 index 90f65b4b..00000000 --- a/risc0/circuit/rv32im-v2/src/zirgen/taps.rs +++ /dev/null @@ -1,2251 +0,0 @@ -// Copyright 2024 RISC Zero, Inc. -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -// This code is automatically generated - -use risc0_zkp::taps::{TapData, TapSet}; - -#[allow(missing_docs)] - -pub const TAPSET: &TapSet = &TapSet::<'static> { - taps: &[ - TapData { - offset: 0, - back: 0, - group: 0, - combo: 0, - skip: 1, - }, - TapData { - offset: 1, - back: 0, - group: 0, - combo: 0, - skip: 1, - }, - TapData { - offset: 2, - back: 0, - group: 0, - combo: 0, - skip: 1, - }, - TapData { - offset: 3, - back: 0, - group: 0, - combo: 0, - skip: 1, - }, - TapData { - offset: 4, - back: 0, - group: 0, - combo: 0, - skip: 1, - }, - TapData { - offset: 5, - back: 0, - group: 0, - combo: 0, - skip: 1, - }, - TapData { - offset: 6, - back: 0, - group: 0, - combo: 0, - skip: 1, - }, - TapData { - offset: 7, - back: 0, - group: 0, - combo: 0, - skip: 1, - }, - TapData { - offset: 8, - back: 0, - group: 0, - combo: 0, - skip: 1, - }, - TapData { - offset: 9, - back: 0, - group: 0, - combo: 0, - skip: 1, - }, - TapData { - offset: 10, - back: 0, - group: 0, - combo: 0, - skip: 1, - }, - TapData { - offset: 11, - back: 0, - group: 0, - combo: 0, - skip: 1, - }, - TapData { - offset: 12, - back: 0, - group: 0, - combo: 0, - skip: 1, - }, - TapData { - offset: 13, - back: 0, - group: 0, - combo: 0, - skip: 1, - }, - TapData { - offset: 14, - back: 0, - group: 0, - combo: 0, - skip: 1, - }, - TapData { - offset: 15, - back: 0, - group: 0, - combo: 0, - skip: 1, - }, - TapData { - offset: 16, - back: 0, - group: 0, - combo: 0, - skip: 1, - }, - TapData { - offset: 17, - back: 0, - group: 0, - combo: 0, - skip: 1, - }, - TapData { - offset: 18, - back: 0, - group: 0, - combo: 0, - skip: 1, - }, - TapData { - offset: 19, - back: 0, - group: 0, - combo: 0, - skip: 1, - }, - TapData { - offset: 20, - back: 0, - group: 0, - combo: 0, - skip: 1, - }, - TapData { - offset: 21, - back: 0, - group: 0, - combo: 0, - skip: 1, - }, - TapData { - offset: 22, - back: 0, - group: 0, - combo: 0, - skip: 1, - }, - TapData { - offset: 23, - back: 0, - group: 0, - combo: 0, - skip: 1, - }, - TapData { - offset: 24, - back: 0, - group: 0, - combo: 0, - skip: 1, - }, - TapData { - offset: 25, - back: 0, - group: 0, - combo: 0, - skip: 1, - }, - TapData { - offset: 26, - back: 0, - group: 0, - combo: 0, - skip: 1, - }, - TapData { - offset: 27, - back: 0, - group: 0, - combo: 0, - skip: 1, - }, - TapData { - offset: 28, - back: 0, - group: 0, - combo: 0, - skip: 1, - }, - TapData { - offset: 29, - back: 0, - group: 0, - combo: 0, - skip: 1, - }, - TapData { - offset: 30, - back: 0, - group: 0, - combo: 0, - skip: 1, - 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skip: 1, - }, - TapData { - offset: 114, - back: 0, - group: 2, - combo: 0, - skip: 1, - }, - TapData { - offset: 115, - back: 0, - group: 2, - combo: 0, - skip: 1, - }, - TapData { - offset: 116, - back: 0, - group: 2, - combo: 0, - skip: 1, - }, - TapData { - offset: 117, - back: 0, - group: 2, - combo: 0, - skip: 1, - }, - TapData { - offset: 118, - back: 0, - group: 2, - combo: 0, - skip: 1, - }, - TapData { - offset: 119, - back: 0, - group: 2, - combo: 0, - skip: 1, - }, - TapData { - offset: 120, - back: 0, - group: 2, - combo: 0, - skip: 1, - }, - TapData { - offset: 121, - back: 0, - group: 2, - combo: 0, - skip: 1, - }, - TapData { - offset: 122, - back: 0, - group: 2, - combo: 0, - skip: 1, - }, - TapData { - offset: 123, - back: 0, - group: 2, - combo: 0, - skip: 1, - }, - TapData { - offset: 124, - back: 0, - group: 2, - combo: 0, - skip: 1, - }, - TapData { - offset: 125, - back: 0, - group: 2, - combo: 0, - skip: 1, - }, - TapData { - offset: 126, - back: 0, - group: 2, - combo: 0, - skip: 1, - }, - TapData { - offset: 127, - back: 0, - group: 2, - combo: 0, - skip: 1, - }, - TapData { - offset: 128, - back: 0, - group: 2, - combo: 0, - skip: 1, - }, - TapData { - offset: 129, - back: 0, - group: 2, - combo: 0, - skip: 1, - }, - TapData { - offset: 130, - back: 0, - group: 2, - combo: 0, - skip: 1, - }, - TapData { - offset: 131, - back: 0, - group: 2, - combo: 0, - skip: 1, - }, - TapData { - offset: 132, - back: 0, - group: 2, - combo: 0, - skip: 1, - }, - TapData { - offset: 133, - back: 0, - group: 2, - combo: 0, - skip: 1, - }, - TapData { - offset: 134, - back: 0, - group: 2, - combo: 0, - skip: 1, - }, - TapData { - offset: 135, - back: 0, - group: 2, - combo: 0, - skip: 1, - }, - TapData { - offset: 136, - back: 0, - group: 2, - combo: 0, - skip: 1, - }, - TapData { - offset: 137, - back: 0, - group: 2, - combo: 0, - skip: 1, - }, - TapData { - offset: 138, - back: 0, - group: 2, - combo: 0, - skip: 1, - }, - TapData { - offset: 139, - back: 0, - group: 2, - combo: 0, - skip: 1, - }, - TapData { - offset: 140, - back: 0, - group: 2, - combo: 0, - skip: 1, - }, - TapData { - offset: 141, - back: 0, - group: 2, - combo: 0, - skip: 1, - }, - TapData { - offset: 142, - back: 0, - group: 2, - combo: 0, - skip: 1, - }, - TapData { - offset: 143, - back: 0, - group: 2, - combo: 0, - skip: 1, - }, - TapData { - offset: 144, - back: 0, - group: 2, - combo: 0, - skip: 1, - }, - TapData { - offset: 145, - back: 0, - group: 2, - combo: 0, - skip: 1, - }, - TapData { - offset: 146, - back: 0, - group: 2, - combo: 0, - skip: 1, - }, - TapData { - offset: 147, - back: 0, - group: 2, - combo: 0, - skip: 1, - }, - TapData { - offset: 148, - back: 0, - group: 2, - combo: 0, - skip: 1, - }, - TapData { - offset: 149, - back: 0, - group: 2, - combo: 0, - skip: 1, - }, - TapData { - offset: 150, - back: 0, - group: 2, - combo: 0, - skip: 1, - }, - TapData { - offset: 151, - back: 0, - group: 2, - combo: 0, - skip: 1, - }, - TapData { - offset: 152, - back: 0, - group: 2, - combo: 0, - skip: 1, - }, - TapData { - offset: 153, - back: 0, - group: 2, - combo: 0, - skip: 1, - }, - TapData { - offset: 154, - back: 0, - group: 2, - combo: 0, - skip: 1, - }, - TapData { - offset: 155, - back: 0, - group: 2, - combo: 0, - skip: 1, - }, - TapData { - offset: 156, - back: 0, - group: 2, - combo: 0, - skip: 1, - }, - TapData { - offset: 157, - back: 0, - group: 2, - combo: 0, - skip: 1, - }, - TapData { - offset: 158, - back: 0, - group: 2, - combo: 0, - skip: 1, - }, - TapData { - offset: 159, - back: 0, - group: 2, - combo: 0, - skip: 1, - }, - TapData { - offset: 160, - back: 0, - group: 2, - combo: 0, - skip: 1, - }, - TapData { - offset: 161, - back: 0, - group: 2, - combo: 0, - skip: 1, - }, - TapData { - offset: 162, - back: 0, - group: 2, - combo: 0, - skip: 1, - }, - TapData { - offset: 163, - back: 0, - group: 2, - combo: 0, - skip: 1, - }, - TapData { - offset: 164, - back: 0, - group: 2, - combo: 0, - skip: 1, - }, - TapData { - offset: 165, - back: 0, - group: 2, - combo: 0, - skip: 1, - }, - TapData { - offset: 166, - back: 0, - group: 2, - combo: 0, - skip: 1, - }, - TapData { - offset: 167, - back: 0, - group: 2, - combo: 0, - skip: 1, - }, - TapData { - offset: 168, - back: 0, - group: 2, - combo: 0, - skip: 1, - }, - TapData { - offset: 169, - back: 0, - group: 2, - combo: 0, - skip: 1, - }, - TapData { - offset: 170, - back: 0, - group: 2, - combo: 0, - skip: 1, - }, - TapData { - offset: 171, - back: 0, - group: 2, - combo: 0, - skip: 1, - }, - TapData { - offset: 172, - back: 0, - group: 2, - combo: 0, - skip: 1, - }, - TapData { - offset: 173, - back: 0, - group: 2, - combo: 0, - skip: 1, - }, - TapData { - offset: 174, - back: 0, - group: 2, - combo: 0, - skip: 1, - }, - TapData { - offset: 175, - back: 0, - group: 2, - combo: 0, - skip: 1, - }, - TapData { - offset: 176, - back: 0, - group: 2, - combo: 0, - skip: 1, - }, - TapData { - offset: 177, - back: 0, - group: 2, - combo: 0, - skip: 1, - }, - TapData { - offset: 178, - back: 0, - group: 2, - combo: 0, - skip: 1, - }, - TapData { - offset: 179, - back: 0, - group: 2, - combo: 0, - skip: 1, - }, - TapData { - offset: 180, - back: 0, - group: 2, - combo: 0, - skip: 1, - }, - TapData { - offset: 181, - back: 0, - group: 2, - combo: 0, - skip: 1, - }, - TapData { - offset: 182, - back: 0, - group: 2, - combo: 0, - skip: 1, - }, - TapData { - offset: 183, - back: 0, - group: 2, - combo: 0, - skip: 1, - }, - TapData { - offset: 184, - back: 0, - group: 2, - combo: 0, - skip: 1, - }, - TapData { - offset: 185, - back: 0, - group: 2, - combo: 0, - skip: 1, - }, - TapData { - offset: 186, - back: 0, - group: 2, - combo: 0, - skip: 1, - }, - TapData { - offset: 187, - back: 0, - group: 2, - combo: 0, - skip: 1, - }, - TapData { - offset: 188, - back: 0, - group: 2, - combo: 0, - skip: 1, - }, - TapData { - offset: 189, - back: 0, - group: 2, - combo: 0, - skip: 1, - }, - TapData { - offset: 190, - back: 0, - group: 2, - combo: 0, - skip: 1, - }, - TapData { - offset: 191, - back: 0, - group: 2, - combo: 0, - skip: 1, - }, - ], - combo_taps: &[0, 0, 1], - combo_begin: &[0, 1, 3], - group_begin: &[0, 80, 81, 317], - combos_count: 2, - reg_count: 269, - tot_combo_backs: 3, - // TODO: Generate these instead of hardcoding: - group_names: &["accum", "code", "data"], -}; diff --git a/risc0/circuit/rv32im-v2/src/zirgen/types.rs.inc b/risc0/circuit/rv32im-v2/src/zirgen/types.rs.inc deleted file mode 100644 index 4d63981e..00000000 --- a/risc0/circuit/rv32im-v2/src/zirgen/types.rs.inc +++ /dev/null @@ -1,6609 +0,0 @@ -pub struct NondetRegLayout { - pub _super: &'static Reg, -} -impl risc0_zkp::layout::Component for NondetRegLayout { - fn ty_name(&self) -> &'static str { - "NondetRegLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_super", self._super)?; - Ok(()) - } -} -pub type NondetRegLayout8LayoutArray = [&'static NondetRegLayout; 8]; -pub struct OneHot_8_Layout { - pub _super: &'static NondetRegLayout8LayoutArray, -} -impl risc0_zkp::layout::Component for OneHot_8_Layout { - fn ty_name(&self) -> &'static str { - "OneHot_8_Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_super", self._super)?; - Ok(()) - } -} -pub struct InstInputLayout { - pub minor_onehot: &'static OneHot_8_Layout, -} -impl risc0_zkp::layout::Component for InstInputLayout { - fn ty_name(&self) -> &'static str { - "InstInputLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("minor_onehot", self.minor_onehot)?; - Ok(()) - } -} -pub type NondetRegLayout11LayoutArray = [&'static NondetRegLayout; 11]; -pub struct OneHot_11_Layout { - pub _super: &'static NondetRegLayout11LayoutArray, -} -impl risc0_zkp::layout::Component for OneHot_11_Layout { - fn ty_name(&self) -> &'static str { - "OneHot_11_Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_super", self._super)?; - Ok(()) - } -} -pub struct ArgU16Layout { - pub count: &'static NondetRegLayout, - pub val: &'static NondetRegLayout, -} -impl risc0_zkp::layout::Component for ArgU16Layout { - fn ty_name(&self) -> &'static str { - "ArgU16Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("count", self.count)?; - v.visit_component("val", self.val)?; - Ok(()) - } -} -pub struct NondetU16RegLayout { - pub arg: &'static ArgU16Layout, -} -impl risc0_zkp::layout::Component for NondetU16RegLayout { - fn ty_name(&self) -> &'static str { - "NondetU16RegLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("arg", self.arg)?; - Ok(()) - } -} -pub struct NormalizeU32Layout { - pub low16: &'static NondetU16RegLayout, - pub low_carry: &'static NondetRegLayout, - pub high16: &'static NondetU16RegLayout, - pub high_carry: &'static NondetRegLayout, -} -impl risc0_zkp::layout::Component for NormalizeU32Layout { - fn ty_name(&self) -> &'static str { - "NormalizeU32Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("low16", self.low16)?; - v.visit_component("low_carry", self.low_carry)?; - v.visit_component("high16", self.high16)?; - v.visit_component("high_carry", self.high_carry)?; - Ok(()) - } -} -pub struct MemoryArgLayout { - pub count: &'static NondetRegLayout, - pub addr: &'static NondetRegLayout, - pub cycle: &'static NondetRegLayout, - pub data_low: &'static NondetRegLayout, - pub data_high: &'static NondetRegLayout, -} -impl risc0_zkp::layout::Component for MemoryArgLayout { - fn ty_name(&self) -> &'static str { - "MemoryArgLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("count", self.count)?; - v.visit_component("addr", self.addr)?; - v.visit_component("cycle", self.cycle)?; - v.visit_component("data_low", self.data_low)?; - v.visit_component("data_high", self.data_high)?; - Ok(()) - } -} -pub struct MemoryIOLayout { - pub old_txn: &'static MemoryArgLayout, - pub new_txn: &'static MemoryArgLayout, -} -impl risc0_zkp::layout::Component for MemoryIOLayout { - fn ty_name(&self) -> &'static str { - "MemoryIOLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("old_txn", self.old_txn)?; - v.visit_component("new_txn", self.new_txn)?; - Ok(()) - } -} -pub struct CycleArgLayout { - pub count: &'static NondetRegLayout, - pub cycle: &'static NondetRegLayout, -} -impl risc0_zkp::layout::Component for CycleArgLayout { - fn ty_name(&self) -> &'static str { - "CycleArgLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("count", self.count)?; - v.visit_component("cycle", self.cycle)?; - Ok(()) - } -} -pub struct IsCycleLayout { - pub arg: &'static CycleArgLayout, -} -impl risc0_zkp::layout::Component for IsCycleLayout { - fn ty_name(&self) -> &'static str { - "IsCycleLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("arg", self.arg)?; - Ok(()) - } -} -pub struct IsForwardLayout { - pub _0: &'static IsCycleLayout, -} -impl risc0_zkp::layout::Component for IsForwardLayout { - fn ty_name(&self) -> &'static str { - "IsForwardLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_0", self._0)?; - Ok(()) - } -} -pub struct MemoryWriteLayout { - pub io: &'static MemoryIOLayout, - pub _0: &'static IsForwardLayout, -} -impl risc0_zkp::layout::Component for MemoryWriteLayout { - fn ty_name(&self) -> &'static str { - "MemoryWriteLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("io", self.io)?; - v.visit_component("_0", self._0)?; - Ok(()) - } -} -pub struct IsZeroLayout { - pub _super: &'static NondetRegLayout, - pub inv: &'static NondetRegLayout, -} -impl risc0_zkp::layout::Component for IsZeroLayout { - fn ty_name(&self) -> &'static str { - "IsZeroLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_super", self._super)?; - v.visit_component("inv", self.inv)?; - Ok(()) - } -} -pub struct WriteRdLayout { - pub is_rd0: &'static IsZeroLayout, - pub write_addr: &'static NondetRegLayout, - pub _0: &'static MemoryWriteLayout, -} -impl risc0_zkp::layout::Component for WriteRdLayout { - fn ty_name(&self) -> &'static str { - "WriteRdLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("is_rd0", self.is_rd0)?; - v.visit_component("write_addr", self.write_addr)?; - v.visit_component("_0", self._0)?; - Ok(()) - } -} -pub struct FinalizeMiscLayout { - pub write_data: &'static NormalizeU32Layout, - pub pc_norm: &'static NormalizeU32Layout, - pub _0: &'static WriteRdLayout, -} -impl risc0_zkp::layout::Component for FinalizeMiscLayout { - fn ty_name(&self) -> &'static str { - "FinalizeMiscLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("write_data", self.write_data)?; - v.visit_component("pc_norm", self.pc_norm)?; - v.visit_component("_0", self._0)?; - Ok(()) - } -} -pub struct DecoderLayout { - pub _f7_6: &'static NondetRegLayout, - pub _f7_45: &'static NondetRegLayout, - pub _f7_23: &'static NondetRegLayout, - pub _f7_01: &'static NondetRegLayout, - pub _rs2_34: &'static NondetRegLayout, - pub _rs2_12: &'static NondetRegLayout, - pub _rs2_0: &'static NondetRegLayout, - pub _rs1_34: &'static NondetRegLayout, - pub _rs1_12: &'static NondetRegLayout, - pub _rs1_0: &'static NondetRegLayout, - pub _f3_2: &'static NondetRegLayout, - pub _f3_01: &'static NondetRegLayout, - pub _rd_34: &'static NondetRegLayout, - pub _rd_12: &'static NondetRegLayout, - pub _rd_0: &'static NondetRegLayout, - pub opcode: &'static NondetRegLayout, -} -impl risc0_zkp::layout::Component for DecoderLayout { - fn ty_name(&self) -> &'static str { - "DecoderLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_f7_6", self._f7_6)?; - v.visit_component("_f7_45", self._f7_45)?; - v.visit_component("_f7_23", self._f7_23)?; - v.visit_component("_f7_01", self._f7_01)?; - v.visit_component("_rs2_34", self._rs2_34)?; - v.visit_component("_rs2_12", self._rs2_12)?; - v.visit_component("_rs2_0", self._rs2_0)?; - v.visit_component("_rs1_34", self._rs1_34)?; - v.visit_component("_rs1_12", self._rs1_12)?; - v.visit_component("_rs1_0", self._rs1_0)?; - v.visit_component("_f3_2", self._f3_2)?; - v.visit_component("_f3_01", self._f3_01)?; - v.visit_component("_rd_34", self._rd_34)?; - v.visit_component("_rd_12", self._rd_12)?; - v.visit_component("_rd_0", self._rd_0)?; - v.visit_component("opcode", self.opcode)?; - Ok(()) - } -} -pub struct U16RegLayout { - pub ret: &'static NondetU16RegLayout, -} -impl risc0_zkp::layout::Component for U16RegLayout { - fn ty_name(&self) -> &'static str { - "U16RegLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("ret", self.ret)?; - Ok(()) - } -} -pub struct AddrDecomposeLayout { - pub low2: &'static NondetRegLayout, - pub upper_diff: &'static U16RegLayout, - pub _0: &'static IsZeroLayout, - pub med14: &'static NondetU16RegLayout, -} -impl risc0_zkp::layout::Component for AddrDecomposeLayout { - fn ty_name(&self) -> &'static str { - "AddrDecomposeLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("low2", self.low2)?; - v.visit_component("upper_diff", self.upper_diff)?; - v.visit_component("_0", self._0)?; - v.visit_component("med14", self.med14)?; - Ok(()) - } -} -pub struct MemoryReadLayout { - pub io: &'static MemoryIOLayout, - pub _0: &'static IsForwardLayout, -} -impl risc0_zkp::layout::Component for MemoryReadLayout { - fn ty_name(&self) -> &'static str { - "MemoryReadLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("io", self.io)?; - v.visit_component("_0", self._0)?; - Ok(()) - } -} -pub struct DecodeInstLayout { - pub _super: &'static DecoderLayout, - pub arg: &'static CycleArgLayout, - pub pc_addr: &'static AddrDecomposeLayout, - pub load_inst: &'static MemoryReadLayout, -} -impl risc0_zkp::layout::Component for DecodeInstLayout { - fn ty_name(&self) -> &'static str { - "DecodeInstLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_super", self._super)?; - v.visit_component("arg", self.arg)?; - v.visit_component("pc_addr", self.pc_addr)?; - v.visit_component("load_inst", self.load_inst)?; - Ok(()) - } -} -pub struct ReadRegLayout { - pub _super: &'static MemoryReadLayout, - pub addr: &'static NondetRegLayout, -} -impl risc0_zkp::layout::Component for ReadRegLayout { - fn ty_name(&self) -> &'static str { - "ReadRegLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_super", self._super)?; - v.visit_component("addr", self.addr)?; - Ok(()) - } -} -pub struct MiscInputLayout { - pub decoded: &'static DecodeInstLayout, - pub rs1: &'static ReadRegLayout, - pub rs2: &'static ReadRegLayout, -} -impl risc0_zkp::layout::Component for MiscInputLayout { - fn ty_name(&self) -> &'static str { - "MiscInputLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("decoded", self.decoded)?; - v.visit_component("rs1", self.rs1)?; - v.visit_component("rs2", self.rs2)?; - Ok(()) - } -} -pub type ArgU16Layout5LayoutArray = [&'static ArgU16Layout; 5]; -pub struct _Arguments_Misc0MiscOutputLayout { - pub arg_u16: &'static ArgU16Layout5LayoutArray, -} -impl risc0_zkp::layout::Component for _Arguments_Misc0MiscOutputLayout { - fn ty_name(&self) -> &'static str { - "_Arguments_Misc0MiscOutputLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("arg_u16", self.arg_u16)?; - Ok(()) - } -} -pub struct Misc0MiscOutputArm0Layout { - pub _extra0: &'static ArgU16Layout, - pub _extra1: &'static ArgU16Layout, - pub _extra2: &'static ArgU16Layout, - pub _extra3: &'static ArgU16Layout, - pub _extra4: &'static ArgU16Layout, -} -impl risc0_zkp::layout::Component for Misc0MiscOutputArm0Layout { - fn ty_name(&self) -> &'static str { - "Misc0MiscOutputArm0Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_extra0", self._extra0)?; - v.visit_component("_extra1", self._extra1)?; - v.visit_component("_extra2", self._extra2)?; - v.visit_component("_extra3", self._extra3)?; - v.visit_component("_extra4", self._extra4)?; - Ok(()) - } -} -pub struct Misc0MiscOutputArm1Layout { - pub _extra0: &'static ArgU16Layout, - pub _extra1: &'static ArgU16Layout, - pub _extra2: &'static ArgU16Layout, - pub _extra3: &'static ArgU16Layout, - pub _extra4: &'static ArgU16Layout, -} -impl risc0_zkp::layout::Component for Misc0MiscOutputArm1Layout { - fn ty_name(&self) -> &'static str { - "Misc0MiscOutputArm1Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_extra0", self._extra0)?; - v.visit_component("_extra1", self._extra1)?; - v.visit_component("_extra2", self._extra2)?; - v.visit_component("_extra3", self._extra3)?; - v.visit_component("_extra4", self._extra4)?; - Ok(()) - } -} -pub type NondetRegLayout16LayoutArray = [&'static NondetRegLayout; 16]; -pub struct ToBits_16_Layout { - pub _super: &'static NondetRegLayout16LayoutArray, -} -impl risc0_zkp::layout::Component for ToBits_16_Layout { - fn ty_name(&self) -> &'static str { - "ToBits_16_Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_super", self._super)?; - Ok(()) - } -} -pub struct BitwiseAndU16Layout { - pub bits_x: &'static ToBits_16_Layout, - pub bits_y: &'static ToBits_16_Layout, -} -impl risc0_zkp::layout::Component for BitwiseAndU16Layout { - fn ty_name(&self) -> &'static str { - "BitwiseAndU16Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("bits_x", self.bits_x)?; - v.visit_component("bits_y", self.bits_y)?; - Ok(()) - } -} -pub struct BitwiseAndLayout { - pub _0: &'static BitwiseAndU16Layout, - pub _1: &'static BitwiseAndU16Layout, -} -impl risc0_zkp::layout::Component for BitwiseAndLayout { - fn ty_name(&self) -> &'static str { - "BitwiseAndLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_0", self._0)?; - v.visit_component("_1", self._1)?; - Ok(()) - } -} -pub struct BitwiseXorLayout { - pub and_xy: &'static BitwiseAndLayout, -} -impl risc0_zkp::layout::Component for BitwiseXorLayout { - fn ty_name(&self) -> &'static str { - "BitwiseXorLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("and_xy", self.and_xy)?; - Ok(()) - } -} -pub struct OpXORLayout { - pub _0: &'static BitwiseXorLayout, -} -impl risc0_zkp::layout::Component for OpXORLayout { - fn ty_name(&self) -> &'static str { - "OpXORLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_0", self._0)?; - Ok(()) - } -} -pub struct Misc0MiscOutputArm2Layout { - pub _super: &'static OpXORLayout, - pub _extra0: &'static ArgU16Layout, - pub _extra1: &'static ArgU16Layout, - pub _extra2: &'static ArgU16Layout, - pub _extra3: &'static ArgU16Layout, - pub _extra4: &'static ArgU16Layout, -} -impl risc0_zkp::layout::Component for Misc0MiscOutputArm2Layout { - fn ty_name(&self) -> &'static str { - "Misc0MiscOutputArm2Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_super", self._super)?; - v.visit_component("_extra0", self._extra0)?; - v.visit_component("_extra1", self._extra1)?; - v.visit_component("_extra2", self._extra2)?; - v.visit_component("_extra3", self._extra3)?; - v.visit_component("_extra4", self._extra4)?; - Ok(()) - } -} -pub struct BitwiseOrLayout { - pub and_xy: &'static BitwiseAndLayout, -} -impl risc0_zkp::layout::Component for BitwiseOrLayout { - fn ty_name(&self) -> &'static str { - "BitwiseOrLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("and_xy", self.and_xy)?; - Ok(()) - } -} -pub struct OpORLayout { - pub _0: &'static BitwiseOrLayout, -} -impl risc0_zkp::layout::Component for OpORLayout { - fn ty_name(&self) -> &'static str { - "OpORLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_0", self._0)?; - Ok(()) - } -} -pub struct Misc0MiscOutputArm3Layout { - pub _super: &'static OpORLayout, - pub _extra0: &'static ArgU16Layout, - pub _extra1: &'static ArgU16Layout, - pub _extra2: &'static ArgU16Layout, - pub _extra3: &'static ArgU16Layout, - pub _extra4: &'static ArgU16Layout, -} -impl risc0_zkp::layout::Component for Misc0MiscOutputArm3Layout { - fn ty_name(&self) -> &'static str { - "Misc0MiscOutputArm3Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_super", self._super)?; - v.visit_component("_extra0", self._extra0)?; - v.visit_component("_extra1", self._extra1)?; - v.visit_component("_extra2", self._extra2)?; - v.visit_component("_extra3", self._extra3)?; - v.visit_component("_extra4", self._extra4)?; - Ok(()) - } -} -pub struct OpANDLayout { - pub _0: &'static BitwiseAndLayout, -} -impl risc0_zkp::layout::Component for OpANDLayout { - fn ty_name(&self) -> &'static str { - "OpANDLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_0", self._0)?; - Ok(()) - } -} -pub struct Misc0MiscOutputArm4Layout { - pub _super: &'static OpANDLayout, - pub _extra0: &'static ArgU16Layout, - pub _extra1: &'static ArgU16Layout, - pub _extra2: &'static ArgU16Layout, - pub _extra3: &'static ArgU16Layout, - pub _extra4: &'static ArgU16Layout, -} -impl risc0_zkp::layout::Component for Misc0MiscOutputArm4Layout { - fn ty_name(&self) -> &'static str { - "Misc0MiscOutputArm4Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_super", self._super)?; - v.visit_component("_extra0", self._extra0)?; - v.visit_component("_extra1", self._extra1)?; - v.visit_component("_extra2", self._extra2)?; - v.visit_component("_extra3", self._extra3)?; - v.visit_component("_extra4", self._extra4)?; - Ok(()) - } -} -pub struct GetSignU32Layout { - pub _super: &'static NondetRegLayout, - pub rest_times_two: &'static NondetU16RegLayout, -} -impl risc0_zkp::layout::Component for GetSignU32Layout { - fn ty_name(&self) -> &'static str { - "GetSignU32Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_super", self._super)?; - v.visit_component("rest_times_two", self.rest_times_two)?; - Ok(()) - } -} -pub struct CmpLessThanLayout { - pub diff: &'static NormalizeU32Layout, - pub s1: &'static GetSignU32Layout, - pub s2: &'static GetSignU32Layout, - pub s3: &'static GetSignU32Layout, - pub overflow: &'static NondetRegLayout, - pub is_less_than: &'static NondetRegLayout, -} -impl risc0_zkp::layout::Component for CmpLessThanLayout { - fn ty_name(&self) -> &'static str { - "CmpLessThanLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("diff", self.diff)?; - v.visit_component("s1", self.s1)?; - v.visit_component("s2", self.s2)?; - v.visit_component("s3", self.s3)?; - v.visit_component("overflow", self.overflow)?; - v.visit_component("is_less_than", self.is_less_than)?; - Ok(()) - } -} -pub struct OpSLTLayout { - pub cmp: &'static CmpLessThanLayout, -} -impl risc0_zkp::layout::Component for OpSLTLayout { - fn ty_name(&self) -> &'static str { - "OpSLTLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("cmp", self.cmp)?; - Ok(()) - } -} -pub struct CmpLessThanUnsignedLayout { - pub diff: &'static NormalizeU32Layout, -} -impl risc0_zkp::layout::Component for CmpLessThanUnsignedLayout { - fn ty_name(&self) -> &'static str { - "CmpLessThanUnsignedLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("diff", self.diff)?; - Ok(()) - } -} -pub struct OpSLTULayout { - pub cmp: &'static CmpLessThanUnsignedLayout, -} -impl risc0_zkp::layout::Component for OpSLTULayout { - fn ty_name(&self) -> &'static str { - "OpSLTULayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("cmp", self.cmp)?; - Ok(()) - } -} -pub struct Misc0MiscOutputArm6Layout { - pub _super: &'static OpSLTULayout, - pub _extra0: &'static ArgU16Layout, - pub _extra1: &'static ArgU16Layout, - pub _extra2: &'static ArgU16Layout, -} -impl risc0_zkp::layout::Component for Misc0MiscOutputArm6Layout { - fn ty_name(&self) -> &'static str { - "Misc0MiscOutputArm6Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_super", self._super)?; - v.visit_component("_extra0", self._extra0)?; - v.visit_component("_extra1", self._extra1)?; - v.visit_component("_extra2", self._extra2)?; - Ok(()) - } -} -pub struct Misc0MiscOutputArm7Layout { - pub _extra0: &'static ArgU16Layout, - pub _extra1: &'static ArgU16Layout, - pub _extra2: &'static ArgU16Layout, - pub _extra3: &'static ArgU16Layout, - pub _extra4: &'static ArgU16Layout, -} -impl risc0_zkp::layout::Component for Misc0MiscOutputArm7Layout { - fn ty_name(&self) -> &'static str { - "Misc0MiscOutputArm7Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_extra0", self._extra0)?; - v.visit_component("_extra1", self._extra1)?; - v.visit_component("_extra2", self._extra2)?; - v.visit_component("_extra3", self._extra3)?; - v.visit_component("_extra4", self._extra4)?; - Ok(()) - } -} -pub struct Misc0MiscOutputLayout { - pub arm0: &'static Misc0MiscOutputArm0Layout, - pub arm1: &'static Misc0MiscOutputArm1Layout, - pub arm2: &'static Misc0MiscOutputArm2Layout, - pub arm3: &'static Misc0MiscOutputArm3Layout, - pub arm4: &'static Misc0MiscOutputArm4Layout, - pub arm5: &'static OpSLTLayout, - pub arm6: &'static Misc0MiscOutputArm6Layout, - pub arm7: &'static Misc0MiscOutputArm7Layout, -} -impl risc0_zkp::layout::Component for Misc0MiscOutputLayout { - fn ty_name(&self) -> &'static str { - "Misc0MiscOutputLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("arm0", self.arm0)?; - v.visit_component("arm1", self.arm1)?; - v.visit_component("arm2", self.arm2)?; - v.visit_component("arm3", self.arm3)?; - v.visit_component("arm4", self.arm4)?; - v.visit_component("arm5", self.arm5)?; - v.visit_component("arm6", self.arm6)?; - v.visit_component("arm7", self.arm7)?; - Ok(()) - } -} -pub struct Misc0Layout { - pub _super: &'static FinalizeMiscLayout, - pub input: &'static MiscInputLayout, - pub _arguments_misc0_misc_output: &'static _Arguments_Misc0MiscOutputLayout, - pub misc_output: &'static Misc0MiscOutputLayout, -} -impl risc0_zkp::layout::Component for Misc0Layout { - fn ty_name(&self) -> &'static str { - "Misc0Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_super", self._super)?; - v.visit_component("input", self.input)?; - v.visit_component( - "_arguments_misc0_misc_output", - self._arguments_misc0_misc_output, - )?; - v.visit_component("misc_output", self.misc_output)?; - Ok(()) - } -} -pub struct _Arguments_Misc1MiscOutputLayout { - pub arg_u16: &'static ArgU16Layout5LayoutArray, -} -impl risc0_zkp::layout::Component for _Arguments_Misc1MiscOutputLayout { - fn ty_name(&self) -> &'static str { - "_Arguments_Misc1MiscOutputLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("arg_u16", self.arg_u16)?; - Ok(()) - } -} -pub struct OpXORILayout { - pub _0: &'static BitwiseXorLayout, -} -impl risc0_zkp::layout::Component for OpXORILayout { - fn ty_name(&self) -> &'static str { - "OpXORILayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_0", self._0)?; - Ok(()) - } -} -pub struct Misc1MiscOutputArm0Layout { - pub _super: &'static OpXORILayout, - pub _extra0: &'static ArgU16Layout, - pub _extra1: &'static ArgU16Layout, - pub _extra2: &'static ArgU16Layout, - pub _extra3: &'static ArgU16Layout, - pub _extra4: &'static ArgU16Layout, -} -impl risc0_zkp::layout::Component for Misc1MiscOutputArm0Layout { - fn ty_name(&self) -> &'static str { - "Misc1MiscOutputArm0Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_super", self._super)?; - v.visit_component("_extra0", self._extra0)?; - v.visit_component("_extra1", self._extra1)?; - v.visit_component("_extra2", self._extra2)?; - v.visit_component("_extra3", self._extra3)?; - v.visit_component("_extra4", self._extra4)?; - Ok(()) - } -} -pub struct OpORILayout { - pub _0: &'static BitwiseOrLayout, -} -impl risc0_zkp::layout::Component for OpORILayout { - fn ty_name(&self) -> &'static str { - "OpORILayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_0", self._0)?; - Ok(()) - } -} -pub struct Misc1MiscOutputArm1Layout { - pub _super: &'static OpORILayout, - pub _extra0: &'static ArgU16Layout, - pub _extra1: &'static ArgU16Layout, - pub _extra2: &'static ArgU16Layout, - pub _extra3: &'static ArgU16Layout, - pub _extra4: &'static ArgU16Layout, -} -impl risc0_zkp::layout::Component for Misc1MiscOutputArm1Layout { - fn ty_name(&self) -> &'static str { - "Misc1MiscOutputArm1Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_super", self._super)?; - v.visit_component("_extra0", self._extra0)?; - v.visit_component("_extra1", self._extra1)?; - v.visit_component("_extra2", self._extra2)?; - v.visit_component("_extra3", self._extra3)?; - v.visit_component("_extra4", self._extra4)?; - Ok(()) - } -} -pub struct OpANDILayout { - pub _0: &'static BitwiseAndLayout, -} -impl risc0_zkp::layout::Component for OpANDILayout { - fn ty_name(&self) -> &'static str { - "OpANDILayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_0", self._0)?; - Ok(()) - } -} -pub struct Misc1MiscOutputArm2Layout { - pub _super: &'static OpANDILayout, - pub _extra0: &'static ArgU16Layout, - pub _extra1: &'static ArgU16Layout, - pub _extra2: &'static ArgU16Layout, - pub _extra3: &'static ArgU16Layout, - pub _extra4: &'static ArgU16Layout, -} -impl risc0_zkp::layout::Component for Misc1MiscOutputArm2Layout { - fn ty_name(&self) -> &'static str { - "Misc1MiscOutputArm2Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_super", self._super)?; - v.visit_component("_extra0", self._extra0)?; - v.visit_component("_extra1", self._extra1)?; - v.visit_component("_extra2", self._extra2)?; - v.visit_component("_extra3", self._extra3)?; - v.visit_component("_extra4", self._extra4)?; - Ok(()) - } -} -pub struct OpSLTILayout { - pub cmp: &'static CmpLessThanLayout, -} -impl risc0_zkp::layout::Component for OpSLTILayout { - fn ty_name(&self) -> &'static str { - "OpSLTILayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("cmp", self.cmp)?; - Ok(()) - } -} -pub struct OpSLTIULayout { - pub cmp: &'static CmpLessThanUnsignedLayout, -} -impl risc0_zkp::layout::Component for OpSLTIULayout { - fn ty_name(&self) -> &'static str { - "OpSLTIULayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("cmp", self.cmp)?; - Ok(()) - } -} -pub struct Misc1MiscOutputArm4Layout { - pub _super: &'static OpSLTIULayout, - pub _extra0: &'static ArgU16Layout, - pub _extra1: &'static ArgU16Layout, - pub _extra2: &'static ArgU16Layout, -} -impl risc0_zkp::layout::Component for Misc1MiscOutputArm4Layout { - fn ty_name(&self) -> &'static str { - "Misc1MiscOutputArm4Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_super", self._super)?; - v.visit_component("_extra0", self._extra0)?; - v.visit_component("_extra1", self._extra1)?; - v.visit_component("_extra2", self._extra2)?; - Ok(()) - } -} -pub struct CmpEqualLayout { - pub low_same: &'static IsZeroLayout, - pub high_same: &'static IsZeroLayout, - pub is_equal: &'static NondetRegLayout, -} -impl risc0_zkp::layout::Component for CmpEqualLayout { - fn ty_name(&self) -> &'static str { - "CmpEqualLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("low_same", self.low_same)?; - v.visit_component("high_same", self.high_same)?; - v.visit_component("is_equal", self.is_equal)?; - Ok(()) - } -} -pub struct OpBEQLayout { - pub cmp: &'static CmpEqualLayout, -} -impl risc0_zkp::layout::Component for OpBEQLayout { - fn ty_name(&self) -> &'static str { - "OpBEQLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("cmp", self.cmp)?; - Ok(()) - } -} -pub struct Misc1MiscOutputArm5Layout { - pub _super: &'static OpBEQLayout, - pub _extra0: &'static ArgU16Layout, - pub _extra1: &'static ArgU16Layout, - pub _extra2: &'static ArgU16Layout, - pub _extra3: &'static ArgU16Layout, - pub _extra4: &'static ArgU16Layout, -} -impl risc0_zkp::layout::Component for Misc1MiscOutputArm5Layout { - fn ty_name(&self) -> &'static str { - "Misc1MiscOutputArm5Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_super", self._super)?; - v.visit_component("_extra0", self._extra0)?; - v.visit_component("_extra1", self._extra1)?; - v.visit_component("_extra2", self._extra2)?; - v.visit_component("_extra3", self._extra3)?; - v.visit_component("_extra4", self._extra4)?; - Ok(()) - } -} -pub struct OpBNELayout { - pub cmp: &'static CmpEqualLayout, -} -impl risc0_zkp::layout::Component for OpBNELayout { - fn ty_name(&self) -> &'static str { - "OpBNELayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("cmp", self.cmp)?; - Ok(()) - } -} -pub struct Misc1MiscOutputArm6Layout { - pub _super: &'static OpBNELayout, - pub _extra0: &'static ArgU16Layout, - pub _extra1: &'static ArgU16Layout, - pub _extra2: &'static ArgU16Layout, - pub _extra3: &'static ArgU16Layout, - pub _extra4: &'static ArgU16Layout, -} -impl risc0_zkp::layout::Component for Misc1MiscOutputArm6Layout { - fn ty_name(&self) -> &'static str { - "Misc1MiscOutputArm6Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_super", self._super)?; - v.visit_component("_extra0", self._extra0)?; - v.visit_component("_extra1", self._extra1)?; - v.visit_component("_extra2", self._extra2)?; - v.visit_component("_extra3", self._extra3)?; - v.visit_component("_extra4", self._extra4)?; - Ok(()) - } -} -pub struct OpBLTLayout { - pub cmp: &'static CmpLessThanLayout, -} -impl risc0_zkp::layout::Component for OpBLTLayout { - fn ty_name(&self) -> &'static str { - "OpBLTLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("cmp", self.cmp)?; - Ok(()) - } -} -pub struct Misc1MiscOutputLayout { - pub arm0: &'static Misc1MiscOutputArm0Layout, - pub arm1: &'static Misc1MiscOutputArm1Layout, - pub arm2: &'static Misc1MiscOutputArm2Layout, - pub arm3: &'static OpSLTILayout, - pub arm4: &'static Misc1MiscOutputArm4Layout, - pub arm5: &'static Misc1MiscOutputArm5Layout, - pub arm6: &'static Misc1MiscOutputArm6Layout, - pub arm7: &'static OpBLTLayout, -} -impl risc0_zkp::layout::Component for Misc1MiscOutputLayout { - fn ty_name(&self) -> &'static str { - "Misc1MiscOutputLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("arm0", self.arm0)?; - v.visit_component("arm1", self.arm1)?; - v.visit_component("arm2", self.arm2)?; - v.visit_component("arm3", self.arm3)?; - v.visit_component("arm4", self.arm4)?; - v.visit_component("arm5", self.arm5)?; - v.visit_component("arm6", self.arm6)?; - v.visit_component("arm7", self.arm7)?; - Ok(()) - } -} -pub struct Misc1Layout { - pub _super: &'static FinalizeMiscLayout, - pub input: &'static MiscInputLayout, - pub _arguments_misc1_misc_output: &'static _Arguments_Misc1MiscOutputLayout, - pub misc_output: &'static Misc1MiscOutputLayout, -} -impl risc0_zkp::layout::Component for Misc1Layout { - fn ty_name(&self) -> &'static str { - "Misc1Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_super", self._super)?; - v.visit_component("input", self.input)?; - v.visit_component( - "_arguments_misc1_misc_output", - self._arguments_misc1_misc_output, - )?; - v.visit_component("misc_output", self.misc_output)?; - Ok(()) - } -} -pub struct _Arguments_Misc2MiscOutputLayout { - pub arg_u16: &'static ArgU16Layout5LayoutArray, -} -impl risc0_zkp::layout::Component for _Arguments_Misc2MiscOutputLayout { - fn ty_name(&self) -> &'static str { - "_Arguments_Misc2MiscOutputLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("arg_u16", self.arg_u16)?; - Ok(()) - } -} -pub struct OpBGELayout { - pub cmp: &'static CmpLessThanLayout, -} -impl risc0_zkp::layout::Component for OpBGELayout { - fn ty_name(&self) -> &'static str { - "OpBGELayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("cmp", self.cmp)?; - Ok(()) - } -} -pub struct OpBLTULayout { - pub cmp: &'static CmpLessThanUnsignedLayout, -} -impl risc0_zkp::layout::Component for OpBLTULayout { - fn ty_name(&self) -> &'static str { - "OpBLTULayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("cmp", self.cmp)?; - Ok(()) - } -} -pub struct Misc2MiscOutputArm1Layout { - pub _super: &'static OpBLTULayout, - pub _extra0: &'static ArgU16Layout, - pub _extra1: &'static ArgU16Layout, - pub _extra2: &'static ArgU16Layout, -} -impl risc0_zkp::layout::Component for Misc2MiscOutputArm1Layout { - fn ty_name(&self) -> &'static str { - "Misc2MiscOutputArm1Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_super", self._super)?; - v.visit_component("_extra0", self._extra0)?; - v.visit_component("_extra1", self._extra1)?; - v.visit_component("_extra2", self._extra2)?; - Ok(()) - } -} -pub struct OpBGEULayout { - pub cmp: &'static CmpLessThanUnsignedLayout, -} -impl risc0_zkp::layout::Component for OpBGEULayout { - fn ty_name(&self) -> &'static str { - "OpBGEULayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("cmp", self.cmp)?; - Ok(()) - } -} -pub struct Misc2MiscOutputArm2Layout { - pub _super: &'static OpBGEULayout, - pub _extra0: &'static ArgU16Layout, - pub _extra1: &'static ArgU16Layout, - pub _extra2: &'static ArgU16Layout, -} -impl risc0_zkp::layout::Component for Misc2MiscOutputArm2Layout { - fn ty_name(&self) -> &'static str { - "Misc2MiscOutputArm2Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_super", self._super)?; - v.visit_component("_extra0", self._extra0)?; - v.visit_component("_extra1", self._extra1)?; - v.visit_component("_extra2", self._extra2)?; - Ok(()) - } -} -pub struct Misc2MiscOutputArm3Layout { - pub _extra0: &'static ArgU16Layout, - pub _extra1: &'static ArgU16Layout, - pub _extra2: &'static ArgU16Layout, - pub _extra3: &'static ArgU16Layout, - pub _extra4: &'static ArgU16Layout, -} -impl risc0_zkp::layout::Component for Misc2MiscOutputArm3Layout { - fn ty_name(&self) -> &'static str { - "Misc2MiscOutputArm3Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_extra0", self._extra0)?; - v.visit_component("_extra1", self._extra1)?; - v.visit_component("_extra2", self._extra2)?; - v.visit_component("_extra3", self._extra3)?; - v.visit_component("_extra4", self._extra4)?; - Ok(()) - } -} -pub struct Misc2MiscOutputArm4Layout { - pub _extra0: &'static ArgU16Layout, - pub _extra1: &'static ArgU16Layout, - pub _extra2: &'static ArgU16Layout, - pub _extra3: &'static ArgU16Layout, - pub _extra4: &'static ArgU16Layout, -} -impl risc0_zkp::layout::Component for Misc2MiscOutputArm4Layout { - fn ty_name(&self) -> &'static str { - "Misc2MiscOutputArm4Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_extra0", self._extra0)?; - v.visit_component("_extra1", self._extra1)?; - v.visit_component("_extra2", self._extra2)?; - v.visit_component("_extra3", self._extra3)?; - v.visit_component("_extra4", self._extra4)?; - Ok(()) - } -} -pub struct Misc2MiscOutputArm5Layout { - pub _extra0: &'static ArgU16Layout, - pub _extra1: &'static ArgU16Layout, - pub _extra2: &'static ArgU16Layout, - pub _extra3: &'static ArgU16Layout, - pub _extra4: &'static ArgU16Layout, -} -impl risc0_zkp::layout::Component for Misc2MiscOutputArm5Layout { - fn ty_name(&self) -> &'static str { - "Misc2MiscOutputArm5Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_extra0", self._extra0)?; - v.visit_component("_extra1", self._extra1)?; - v.visit_component("_extra2", self._extra2)?; - v.visit_component("_extra3", self._extra3)?; - v.visit_component("_extra4", self._extra4)?; - Ok(()) - } -} -pub struct Misc2MiscOutputArm6Layout { - pub _extra0: &'static ArgU16Layout, - pub _extra1: &'static ArgU16Layout, - pub _extra2: &'static ArgU16Layout, - pub _extra3: &'static ArgU16Layout, - pub _extra4: &'static ArgU16Layout, -} -impl risc0_zkp::layout::Component for Misc2MiscOutputArm6Layout { - fn ty_name(&self) -> &'static str { - "Misc2MiscOutputArm6Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_extra0", self._extra0)?; - v.visit_component("_extra1", self._extra1)?; - v.visit_component("_extra2", self._extra2)?; - v.visit_component("_extra3", self._extra3)?; - v.visit_component("_extra4", self._extra4)?; - Ok(()) - } -} -pub struct Misc2MiscOutputArm7Layout { - pub _extra0: &'static ArgU16Layout, - pub _extra1: &'static ArgU16Layout, - pub _extra2: &'static ArgU16Layout, - pub _extra3: &'static ArgU16Layout, - pub _extra4: &'static ArgU16Layout, -} -impl risc0_zkp::layout::Component for Misc2MiscOutputArm7Layout { - fn ty_name(&self) -> &'static str { - "Misc2MiscOutputArm7Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_extra0", self._extra0)?; - v.visit_component("_extra1", self._extra1)?; - v.visit_component("_extra2", self._extra2)?; - v.visit_component("_extra3", self._extra3)?; - v.visit_component("_extra4", self._extra4)?; - Ok(()) - } -} -pub struct Misc2MiscOutputLayout { - pub arm0: &'static OpBGELayout, - pub arm1: &'static Misc2MiscOutputArm1Layout, - pub arm2: &'static Misc2MiscOutputArm2Layout, - pub arm3: &'static Misc2MiscOutputArm3Layout, - pub arm4: &'static Misc2MiscOutputArm4Layout, - pub arm5: &'static Misc2MiscOutputArm5Layout, - pub arm6: &'static Misc2MiscOutputArm6Layout, - pub arm7: &'static Misc2MiscOutputArm7Layout, -} -impl risc0_zkp::layout::Component for Misc2MiscOutputLayout { - fn ty_name(&self) -> &'static str { - "Misc2MiscOutputLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("arm0", self.arm0)?; - v.visit_component("arm1", self.arm1)?; - v.visit_component("arm2", self.arm2)?; - v.visit_component("arm3", self.arm3)?; - v.visit_component("arm4", self.arm4)?; - v.visit_component("arm5", self.arm5)?; - v.visit_component("arm6", self.arm6)?; - v.visit_component("arm7", self.arm7)?; - Ok(()) - } -} -pub struct Misc2Layout { - pub _super: &'static FinalizeMiscLayout, - pub input: &'static MiscInputLayout, - pub _arguments_misc2_misc_output: &'static _Arguments_Misc2MiscOutputLayout, - pub misc_output: &'static Misc2MiscOutputLayout, -} -impl risc0_zkp::layout::Component for Misc2Layout { - fn ty_name(&self) -> &'static str { - "Misc2Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_super", self._super)?; - v.visit_component("input", self.input)?; - v.visit_component( - "_arguments_misc2_misc_output", - self._arguments_misc2_misc_output, - )?; - v.visit_component("misc_output", self.misc_output)?; - Ok(()) - } -} -pub struct MulInputLayout { - pub decoded: &'static DecodeInstLayout, - pub rs1: &'static ReadRegLayout, - pub rs2: &'static ReadRegLayout, -} -impl risc0_zkp::layout::Component for MulInputLayout { - fn ty_name(&self) -> &'static str { - "MulInputLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("decoded", self.decoded)?; - v.visit_component("rs1", self.rs1)?; - v.visit_component("rs2", self.rs2)?; - Ok(()) - } -} -pub type ArgU16Layout6LayoutArray = [&'static ArgU16Layout; 6]; -pub struct ArgU8Layout { - pub count: &'static NondetRegLayout, - pub val: &'static NondetRegLayout, -} -impl risc0_zkp::layout::Component for ArgU8Layout { - fn ty_name(&self) -> &'static str { - "ArgU8Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("count", self.count)?; - v.visit_component("val", self.val)?; - Ok(()) - } -} -pub type ArgU8Layout13LayoutArray = [&'static ArgU8Layout; 13]; -pub struct _Arguments_Mul0MulOutputLayout { - pub arg_u16: &'static ArgU16Layout6LayoutArray, - pub arg_u8: &'static ArgU8Layout13LayoutArray, -} -impl risc0_zkp::layout::Component for _Arguments_Mul0MulOutputLayout { - fn ty_name(&self) -> &'static str { - "_Arguments_Mul0MulOutputLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("arg_u16", self.arg_u16)?; - v.visit_component("arg_u8", self.arg_u8)?; - Ok(()) - } -} -pub type NondetRegLayout5LayoutArray = [&'static NondetRegLayout; 5]; -pub struct ToBits_5_Layout { - pub _super: &'static NondetRegLayout5LayoutArray, -} -impl risc0_zkp::layout::Component for ToBits_5_Layout { - fn ty_name(&self) -> &'static str { - "ToBits_5_Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_super", self._super)?; - Ok(()) - } -} -pub struct DynPo2Layout { - pub low5: &'static ToBits_5_Layout, - pub check_u16: &'static NondetU16RegLayout, - pub b3: &'static NondetRegLayout, - pub low: &'static NondetRegLayout, - pub high: &'static NondetRegLayout, -} -impl risc0_zkp::layout::Component for DynPo2Layout { - fn ty_name(&self) -> &'static str { - "DynPo2Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("low5", self.low5)?; - v.visit_component("check_u16", self.check_u16)?; - v.visit_component("b3", self.b3)?; - v.visit_component("low", self.low)?; - v.visit_component("high", self.high)?; - Ok(()) - } -} -pub struct NondetU8RegLayout { - pub arg: &'static ArgU8Layout, -} -impl risc0_zkp::layout::Component for NondetU8RegLayout { - fn ty_name(&self) -> &'static str { - "NondetU8RegLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("arg", self.arg)?; - Ok(()) - } -} -pub struct ExpandU32Layout { - pub b0: &'static NondetU8RegLayout, - pub b1: &'static NondetU8RegLayout, - pub b2: &'static NondetU8RegLayout, - pub b3: &'static NondetU8RegLayout, - pub b3_top7times2: &'static NondetU8RegLayout, - pub top_bit: &'static NondetRegLayout, -} -impl risc0_zkp::layout::Component for ExpandU32Layout { - fn ty_name(&self) -> &'static str { - "ExpandU32Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("b0", self.b0)?; - v.visit_component("b1", self.b1)?; - v.visit_component("b2", self.b2)?; - v.visit_component("b3", self.b3)?; - v.visit_component("b3_top7times2", self.b3_top7times2)?; - v.visit_component("top_bit", self.top_bit)?; - Ok(()) - } -} -pub struct NondetFakeTwitRegLayout { - pub reg0: &'static NondetRegLayout, - pub reg1: &'static NondetRegLayout, -} -impl risc0_zkp::layout::Component for NondetFakeTwitRegLayout { - fn ty_name(&self) -> &'static str { - "NondetFakeTwitRegLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("reg0", self.reg0)?; - v.visit_component("reg1", self.reg1)?; - Ok(()) - } -} -pub struct SplitTotalLayout { - pub out: &'static NondetU16RegLayout, - pub carry_byte: &'static NondetU8RegLayout, - pub carry_extra: &'static NondetFakeTwitRegLayout, -} -impl risc0_zkp::layout::Component for SplitTotalLayout { - fn ty_name(&self) -> &'static str { - "SplitTotalLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("out", self.out)?; - v.visit_component("carry_byte", self.carry_byte)?; - v.visit_component("carry_extra", self.carry_extra)?; - Ok(()) - } -} -pub struct MultiplyAccumulateLayout { - pub ax: &'static ExpandU32Layout, - pub bx: &'static ExpandU32Layout, - pub c_sign: &'static NondetRegLayout, - pub c_rest_times2: &'static NondetU16RegLayout, - pub s0: &'static SplitTotalLayout, - pub s1: &'static SplitTotalLayout, - pub s2: &'static SplitTotalLayout, - pub s3_out: &'static NondetU16RegLayout, - pub s3_carry: &'static NondetFakeTwitRegLayout, -} -impl risc0_zkp::layout::Component for MultiplyAccumulateLayout { - fn ty_name(&self) -> &'static str { - "MultiplyAccumulateLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("ax", self.ax)?; - v.visit_component("bx", self.bx)?; - v.visit_component("c_sign", self.c_sign)?; - v.visit_component("c_rest_times2", self.c_rest_times2)?; - v.visit_component("s0", self.s0)?; - v.visit_component("s1", self.s1)?; - v.visit_component("s2", self.s2)?; - v.visit_component("s3_out", self.s3_out)?; - v.visit_component("s3_carry", self.s3_carry)?; - Ok(()) - } -} -pub struct DoMulLayout { - pub mul: &'static MultiplyAccumulateLayout, -} -impl risc0_zkp::layout::Component for DoMulLayout { - fn ty_name(&self) -> &'static str { - "DoMulLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("mul", self.mul)?; - Ok(()) - } -} -pub struct OpSLLLayout { - pub shift_mul: &'static DynPo2Layout, - pub _0: &'static DoMulLayout, -} -impl risc0_zkp::layout::Component for OpSLLLayout { - fn ty_name(&self) -> &'static str { - "OpSLLLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("shift_mul", self.shift_mul)?; - v.visit_component("_0", self._0)?; - Ok(()) - } -} -pub struct OpSLLILayout { - pub shift_mul: &'static DynPo2Layout, - pub _0: &'static DoMulLayout, -} -impl risc0_zkp::layout::Component for OpSLLILayout { - fn ty_name(&self) -> &'static str { - "OpSLLILayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("shift_mul", self.shift_mul)?; - v.visit_component("_0", self._0)?; - Ok(()) - } -} -pub struct OpMULLayout { - pub _0: &'static DoMulLayout, -} -impl risc0_zkp::layout::Component for OpMULLayout { - fn ty_name(&self) -> &'static str { - "OpMULLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_0", self._0)?; - Ok(()) - } -} -pub struct Mul0MulOutputArm2Layout { - pub _super: &'static OpMULLayout, - pub _extra0: &'static ArgU16Layout, -} -impl risc0_zkp::layout::Component for Mul0MulOutputArm2Layout { - fn ty_name(&self) -> &'static str { - "Mul0MulOutputArm2Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_super", self._super)?; - v.visit_component("_extra0", self._extra0)?; - Ok(()) - } -} -pub struct OpMULHLayout { - pub _0: &'static DoMulLayout, -} -impl risc0_zkp::layout::Component for OpMULHLayout { - fn ty_name(&self) -> &'static str { - "OpMULHLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_0", self._0)?; - Ok(()) - } -} -pub struct Mul0MulOutputArm3Layout { - pub _super: &'static OpMULHLayout, - pub _extra0: &'static ArgU16Layout, -} -impl risc0_zkp::layout::Component for Mul0MulOutputArm3Layout { - fn ty_name(&self) -> &'static str { - "Mul0MulOutputArm3Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_super", self._super)?; - v.visit_component("_extra0", self._extra0)?; - Ok(()) - } -} -pub struct OpMULHSULayout { - pub _0: &'static DoMulLayout, -} -impl risc0_zkp::layout::Component for OpMULHSULayout { - fn ty_name(&self) -> &'static str { - "OpMULHSULayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_0", self._0)?; - Ok(()) - } -} -pub struct Mul0MulOutputArm4Layout { - pub _super: &'static OpMULHSULayout, - pub _extra0: &'static ArgU16Layout, -} -impl risc0_zkp::layout::Component for Mul0MulOutputArm4Layout { - fn ty_name(&self) -> &'static str { - "Mul0MulOutputArm4Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_super", self._super)?; - v.visit_component("_extra0", self._extra0)?; - Ok(()) - } -} -pub struct OpMULHULayout { - pub _0: &'static DoMulLayout, -} -impl risc0_zkp::layout::Component for OpMULHULayout { - fn ty_name(&self) -> &'static str { - "OpMULHULayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_0", self._0)?; - Ok(()) - } -} -pub struct Mul0MulOutputArm5Layout { - pub _super: &'static OpMULHULayout, - pub _extra0: &'static ArgU16Layout, -} -impl risc0_zkp::layout::Component for Mul0MulOutputArm5Layout { - fn ty_name(&self) -> &'static str { - "Mul0MulOutputArm5Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_super", self._super)?; - v.visit_component("_extra0", self._extra0)?; - Ok(()) - } -} -pub struct Mul0MulOutputArm6Layout { - pub _extra0: &'static ArgU16Layout, - pub _extra1: &'static ArgU16Layout, - pub _extra2: &'static ArgU16Layout, - pub _extra3: &'static ArgU16Layout, - pub _extra4: &'static ArgU16Layout, - pub _extra5: &'static ArgU16Layout, - pub _extra6: &'static ArgU8Layout, - pub _extra7: &'static ArgU8Layout, - pub _extra8: &'static ArgU8Layout, - pub _extra9: &'static ArgU8Layout, - pub _extra10: &'static ArgU8Layout, - pub _extra11: &'static ArgU8Layout, - pub _extra12: &'static ArgU8Layout, - pub _extra13: &'static ArgU8Layout, - pub _extra14: &'static ArgU8Layout, - pub _extra15: &'static ArgU8Layout, - pub _extra16: &'static ArgU8Layout, - pub _extra17: &'static ArgU8Layout, - pub _extra18: &'static ArgU8Layout, -} -impl risc0_zkp::layout::Component for Mul0MulOutputArm6Layout { - fn ty_name(&self) -> &'static str { - "Mul0MulOutputArm6Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_extra0", self._extra0)?; - v.visit_component("_extra1", self._extra1)?; - v.visit_component("_extra2", self._extra2)?; - v.visit_component("_extra3", self._extra3)?; - v.visit_component("_extra4", self._extra4)?; - v.visit_component("_extra5", self._extra5)?; - v.visit_component("_extra6", self._extra6)?; - v.visit_component("_extra7", self._extra7)?; - v.visit_component("_extra8", self._extra8)?; - v.visit_component("_extra9", self._extra9)?; - v.visit_component("_extra10", self._extra10)?; - v.visit_component("_extra11", self._extra11)?; - v.visit_component("_extra12", self._extra12)?; - v.visit_component("_extra13", self._extra13)?; - v.visit_component("_extra14", self._extra14)?; - v.visit_component("_extra15", self._extra15)?; - v.visit_component("_extra16", self._extra16)?; - v.visit_component("_extra17", self._extra17)?; - v.visit_component("_extra18", self._extra18)?; - Ok(()) - } -} -pub struct Mul0MulOutputArm7Layout { - pub _extra0: &'static ArgU16Layout, - pub _extra1: &'static ArgU16Layout, - pub _extra2: &'static ArgU16Layout, - pub _extra3: &'static ArgU16Layout, - pub _extra4: &'static ArgU16Layout, - pub _extra5: &'static ArgU16Layout, - pub _extra6: &'static ArgU8Layout, - pub _extra7: &'static ArgU8Layout, - pub _extra8: &'static ArgU8Layout, - pub _extra9: &'static ArgU8Layout, - pub _extra10: &'static ArgU8Layout, - pub _extra11: &'static ArgU8Layout, - pub _extra12: &'static ArgU8Layout, - pub _extra13: &'static ArgU8Layout, - pub _extra14: &'static ArgU8Layout, - pub _extra15: &'static ArgU8Layout, - pub _extra16: &'static ArgU8Layout, - pub _extra17: &'static ArgU8Layout, - pub _extra18: &'static ArgU8Layout, -} -impl risc0_zkp::layout::Component for Mul0MulOutputArm7Layout { - fn ty_name(&self) -> &'static str { - "Mul0MulOutputArm7Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_extra0", self._extra0)?; - v.visit_component("_extra1", self._extra1)?; - v.visit_component("_extra2", self._extra2)?; - v.visit_component("_extra3", self._extra3)?; - v.visit_component("_extra4", self._extra4)?; - v.visit_component("_extra5", self._extra5)?; - v.visit_component("_extra6", self._extra6)?; - v.visit_component("_extra7", self._extra7)?; - v.visit_component("_extra8", self._extra8)?; - v.visit_component("_extra9", self._extra9)?; - v.visit_component("_extra10", self._extra10)?; - v.visit_component("_extra11", self._extra11)?; - v.visit_component("_extra12", self._extra12)?; - v.visit_component("_extra13", self._extra13)?; - v.visit_component("_extra14", self._extra14)?; - v.visit_component("_extra15", self._extra15)?; - v.visit_component("_extra16", self._extra16)?; - v.visit_component("_extra17", self._extra17)?; - v.visit_component("_extra18", self._extra18)?; - Ok(()) - } -} -pub struct Mul0MulOutputLayout { - pub arm0: &'static OpSLLLayout, - pub arm1: &'static OpSLLILayout, - pub arm2: &'static Mul0MulOutputArm2Layout, - pub arm3: &'static Mul0MulOutputArm3Layout, - pub arm4: &'static Mul0MulOutputArm4Layout, - pub arm5: &'static Mul0MulOutputArm5Layout, - pub arm6: &'static Mul0MulOutputArm6Layout, - pub arm7: &'static Mul0MulOutputArm7Layout, -} -impl risc0_zkp::layout::Component for Mul0MulOutputLayout { - fn ty_name(&self) -> &'static str { - "Mul0MulOutputLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("arm0", self.arm0)?; - v.visit_component("arm1", self.arm1)?; - v.visit_component("arm2", self.arm2)?; - v.visit_component("arm3", self.arm3)?; - v.visit_component("arm4", self.arm4)?; - v.visit_component("arm5", self.arm5)?; - v.visit_component("arm6", self.arm6)?; - v.visit_component("arm7", self.arm7)?; - Ok(()) - } -} -pub struct Mul0Layout { - pub input: &'static MulInputLayout, - pub _arguments_mul0_mul_output: &'static _Arguments_Mul0MulOutputLayout, - pub mul_output: &'static Mul0MulOutputLayout, - pub _0: &'static WriteRdLayout, - pub pc_add: &'static NormalizeU32Layout, -} -impl risc0_zkp::layout::Component for Mul0Layout { - fn ty_name(&self) -> &'static str { - "Mul0Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("input", self.input)?; - v.visit_component( - "_arguments_mul0_mul_output", - self._arguments_mul0_mul_output, - )?; - v.visit_component("mul_output", self.mul_output)?; - v.visit_component("_0", self._0)?; - v.visit_component("pc_add", self.pc_add)?; - Ok(()) - } -} -pub struct DivInputLayout { - pub decoded: &'static DecodeInstLayout, - pub rs1: &'static ReadRegLayout, - pub rs2: &'static ReadRegLayout, -} -impl risc0_zkp::layout::Component for DivInputLayout { - fn ty_name(&self) -> &'static str { - "DivInputLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("decoded", self.decoded)?; - v.visit_component("rs1", self.rs1)?; - v.visit_component("rs2", self.rs2)?; - Ok(()) - } -} -pub type ArgU16Layout9LayoutArray = [&'static ArgU16Layout; 9]; -pub struct _Arguments_Div0MulOutputLayout { - pub arg_u16: &'static ArgU16Layout9LayoutArray, - pub arg_u8: &'static ArgU8Layout13LayoutArray, -} -impl risc0_zkp::layout::Component for _Arguments_Div0MulOutputLayout { - fn ty_name(&self) -> &'static str { - "_Arguments_Div0MulOutputLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("arg_u16", self.arg_u16)?; - v.visit_component("arg_u8", self.arg_u8)?; - Ok(()) - } -} -pub struct DoDivLayout { - pub quot_low: &'static NondetRegLayout, - pub quot_high: &'static NondetRegLayout, - pub rem_low: &'static NondetU16RegLayout, - pub rem_high: &'static NondetU16RegLayout, - pub mul: &'static MultiplyAccumulateLayout, - pub top_bit_type: &'static NondetRegLayout, -} -impl risc0_zkp::layout::Component for DoDivLayout { - fn ty_name(&self) -> &'static str { - "DoDivLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("quot_low", self.quot_low)?; - v.visit_component("quot_high", self.quot_high)?; - v.visit_component("rem_low", self.rem_low)?; - v.visit_component("rem_high", self.rem_high)?; - v.visit_component("mul", self.mul)?; - v.visit_component("top_bit_type", self.top_bit_type)?; - Ok(()) - } -} -pub struct OpSRLLayout { - pub shift_mul: &'static DynPo2Layout, - pub _0: &'static DoDivLayout, -} -impl risc0_zkp::layout::Component for OpSRLLayout { - fn ty_name(&self) -> &'static str { - "OpSRLLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("shift_mul", self.shift_mul)?; - v.visit_component("_0", self._0)?; - Ok(()) - } -} -pub struct Div0MulOutputArm0Layout { - pub _super: &'static OpSRLLayout, - pub _extra0: &'static ArgU16Layout, -} -impl risc0_zkp::layout::Component for Div0MulOutputArm0Layout { - fn ty_name(&self) -> &'static str { - "Div0MulOutputArm0Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_super", self._super)?; - v.visit_component("_extra0", self._extra0)?; - Ok(()) - } -} -pub struct TopBitLayout { - pub _super: &'static NondetRegLayout, - pub rest: &'static NondetU16RegLayout, -} -impl risc0_zkp::layout::Component for TopBitLayout { - fn ty_name(&self) -> &'static str { - "TopBitLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_super", self._super)?; - v.visit_component("rest", self.rest)?; - Ok(()) - } -} -pub struct OpSRALayout { - pub shift_mul: &'static DynPo2Layout, - pub flip: &'static TopBitLayout, - pub _0: &'static DoDivLayout, -} -impl risc0_zkp::layout::Component for OpSRALayout { - fn ty_name(&self) -> &'static str { - "OpSRALayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("shift_mul", self.shift_mul)?; - v.visit_component("flip", self.flip)?; - v.visit_component("_0", self._0)?; - Ok(()) - } -} -pub struct OpSRLILayout { - pub shift_mul: &'static DynPo2Layout, - pub _0: &'static DoDivLayout, -} -impl risc0_zkp::layout::Component for OpSRLILayout { - fn ty_name(&self) -> &'static str { - "OpSRLILayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("shift_mul", self.shift_mul)?; - v.visit_component("_0", self._0)?; - Ok(()) - } -} -pub struct Div0MulOutputArm2Layout { - pub _super: &'static OpSRLILayout, - pub _extra0: &'static ArgU16Layout, -} -impl risc0_zkp::layout::Component for Div0MulOutputArm2Layout { - fn ty_name(&self) -> &'static str { - "Div0MulOutputArm2Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_super", self._super)?; - v.visit_component("_extra0", self._extra0)?; - Ok(()) - } -} -pub struct OpSRAILayout { - pub shift_mul: &'static DynPo2Layout, - pub flip: &'static TopBitLayout, - pub _0: &'static DoDivLayout, -} -impl risc0_zkp::layout::Component for OpSRAILayout { - fn ty_name(&self) -> &'static str { - "OpSRAILayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("shift_mul", self.shift_mul)?; - v.visit_component("flip", self.flip)?; - v.visit_component("_0", self._0)?; - Ok(()) - } -} -pub struct OpDIVLayout { - pub _0: &'static DoDivLayout, -} -impl risc0_zkp::layout::Component for OpDIVLayout { - fn ty_name(&self) -> &'static str { - "OpDIVLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_0", self._0)?; - Ok(()) - } -} -pub struct Div0MulOutputArm4Layout { - pub _super: &'static OpDIVLayout, - pub _extra0: &'static ArgU16Layout, - pub _extra1: &'static ArgU16Layout, -} -impl risc0_zkp::layout::Component for Div0MulOutputArm4Layout { - fn ty_name(&self) -> &'static str { - "Div0MulOutputArm4Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_super", self._super)?; - v.visit_component("_extra0", self._extra0)?; - v.visit_component("_extra1", self._extra1)?; - Ok(()) - } -} -pub struct OpDIVULayout { - pub _0: &'static DoDivLayout, -} -impl risc0_zkp::layout::Component for OpDIVULayout { - fn ty_name(&self) -> &'static str { - "OpDIVULayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_0", self._0)?; - Ok(()) - } -} -pub struct Div0MulOutputArm5Layout { - pub _super: &'static OpDIVULayout, - pub _extra0: &'static ArgU16Layout, - pub _extra1: &'static ArgU16Layout, -} -impl risc0_zkp::layout::Component for Div0MulOutputArm5Layout { - fn ty_name(&self) -> &'static str { - "Div0MulOutputArm5Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_super", self._super)?; - v.visit_component("_extra0", self._extra0)?; - v.visit_component("_extra1", self._extra1)?; - Ok(()) - } -} -pub struct OpREMLayout { - pub _0: &'static DoDivLayout, -} -impl risc0_zkp::layout::Component for OpREMLayout { - fn ty_name(&self) -> &'static str { - "OpREMLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_0", self._0)?; - Ok(()) - } -} -pub struct Div0MulOutputArm6Layout { - pub _super: &'static OpREMLayout, - pub _extra0: &'static ArgU16Layout, - pub _extra1: &'static ArgU16Layout, -} -impl risc0_zkp::layout::Component for Div0MulOutputArm6Layout { - fn ty_name(&self) -> &'static str { - "Div0MulOutputArm6Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_super", self._super)?; - v.visit_component("_extra0", self._extra0)?; - v.visit_component("_extra1", self._extra1)?; - Ok(()) - } -} -pub struct OpREMULayout { - pub _0: &'static DoDivLayout, -} -impl risc0_zkp::layout::Component for OpREMULayout { - fn ty_name(&self) -> &'static str { - "OpREMULayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_0", self._0)?; - Ok(()) - } -} -pub struct Div0MulOutputArm7Layout { - pub _super: &'static OpREMULayout, - pub _extra0: &'static ArgU16Layout, - pub _extra1: &'static ArgU16Layout, -} -impl risc0_zkp::layout::Component for Div0MulOutputArm7Layout { - fn ty_name(&self) -> &'static str { - "Div0MulOutputArm7Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_super", self._super)?; - v.visit_component("_extra0", self._extra0)?; - v.visit_component("_extra1", self._extra1)?; - Ok(()) - } -} -pub struct Div0MulOutputLayout { - pub arm0: &'static Div0MulOutputArm0Layout, - pub arm1: &'static OpSRALayout, - pub arm2: &'static Div0MulOutputArm2Layout, - pub arm3: &'static OpSRAILayout, - pub arm4: &'static Div0MulOutputArm4Layout, - pub arm5: &'static Div0MulOutputArm5Layout, - pub arm6: &'static Div0MulOutputArm6Layout, - pub arm7: &'static Div0MulOutputArm7Layout, -} -impl risc0_zkp::layout::Component for Div0MulOutputLayout { - fn ty_name(&self) -> &'static str { - "Div0MulOutputLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("arm0", self.arm0)?; - v.visit_component("arm1", self.arm1)?; - v.visit_component("arm2", self.arm2)?; - v.visit_component("arm3", self.arm3)?; - v.visit_component("arm4", self.arm4)?; - v.visit_component("arm5", self.arm5)?; - v.visit_component("arm6", self.arm6)?; - v.visit_component("arm7", self.arm7)?; - Ok(()) - } -} -pub struct Div0Layout { - pub input: &'static DivInputLayout, - pub _arguments_div0_mul_output: &'static _Arguments_Div0MulOutputLayout, - pub mul_output: &'static Div0MulOutputLayout, - pub _0: &'static WriteRdLayout, - pub pc_add: &'static NormalizeU32Layout, -} -impl risc0_zkp::layout::Component for Div0Layout { - fn ty_name(&self) -> &'static str { - "Div0Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("input", self.input)?; - v.visit_component( - "_arguments_div0_mul_output", - self._arguments_div0_mul_output, - )?; - v.visit_component("mul_output", self.mul_output)?; - v.visit_component("_0", self._0)?; - v.visit_component("pc_add", self.pc_add)?; - Ok(()) - } -} -pub struct AddrDecomposeBitsLayout { - pub low0: &'static NondetRegLayout, - pub low1: &'static NondetRegLayout, - pub upper_diff: &'static U16RegLayout, - pub _0: &'static IsZeroLayout, - pub med14: &'static NondetU16RegLayout, -} -impl risc0_zkp::layout::Component for AddrDecomposeBitsLayout { - fn ty_name(&self) -> &'static str { - "AddrDecomposeBitsLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("low0", self.low0)?; - v.visit_component("low1", self.low1)?; - v.visit_component("upper_diff", self.upper_diff)?; - v.visit_component("_0", self._0)?; - v.visit_component("med14", self.med14)?; - Ok(()) - } -} -pub struct MemLoadInputLayout { - pub decoded: &'static DecodeInstLayout, - pub rs1: &'static ReadRegLayout, - pub addr_u32: &'static NormalizeU32Layout, - pub addr: &'static AddrDecomposeBitsLayout, - pub data_0: &'static MemoryReadLayout, -} -impl risc0_zkp::layout::Component for MemLoadInputLayout { - fn ty_name(&self) -> &'static str { - "MemLoadInputLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("decoded", self.decoded)?; - v.visit_component("rs1", self.rs1)?; - v.visit_component("addr_u32", self.addr_u32)?; - v.visit_component("addr", self.addr)?; - v.visit_component("data_0", self.data_0)?; - Ok(()) - } -} -pub type ArgU8Layout3LayoutArray = [&'static ArgU8Layout; 3]; -pub struct _Arguments_Mem0OutputLayout { - pub arg_u8: &'static ArgU8Layout3LayoutArray, -} -impl risc0_zkp::layout::Component for _Arguments_Mem0OutputLayout { - fn ty_name(&self) -> &'static str { - "_Arguments_Mem0OutputLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("arg_u8", self.arg_u8)?; - Ok(()) - } -} -pub struct SplitWordLayout { - pub byte0: &'static NondetU8RegLayout, - pub byte1: &'static NondetU8RegLayout, -} -impl risc0_zkp::layout::Component for SplitWordLayout { - fn ty_name(&self) -> &'static str { - "SplitWordLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("byte0", self.byte0)?; - v.visit_component("byte1", self.byte1)?; - Ok(()) - } -} -pub struct OpLBLayout { - pub bytes: &'static SplitWordLayout, - pub high_bit: &'static NondetRegLayout, - pub low7x2: &'static NondetU8RegLayout, -} -impl risc0_zkp::layout::Component for OpLBLayout { - fn ty_name(&self) -> &'static str { - "OpLBLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("bytes", self.bytes)?; - v.visit_component("high_bit", self.high_bit)?; - v.visit_component("low7x2", self.low7x2)?; - Ok(()) - } -} -pub struct OpLHLayout { - pub high_bit: &'static NondetRegLayout, - pub low15x2: &'static NondetU8RegLayout, -} -impl risc0_zkp::layout::Component for OpLHLayout { - fn ty_name(&self) -> &'static str { - "OpLHLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("high_bit", self.high_bit)?; - v.visit_component("low15x2", self.low15x2)?; - Ok(()) - } -} -pub struct Mem0OutputArm1Layout { - pub _super: &'static OpLHLayout, - pub _extra0: &'static ArgU8Layout, - pub _extra1: &'static ArgU8Layout, -} -impl risc0_zkp::layout::Component for Mem0OutputArm1Layout { - fn ty_name(&self) -> &'static str { - "Mem0OutputArm1Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_super", self._super)?; - v.visit_component("_extra0", self._extra0)?; - v.visit_component("_extra1", self._extra1)?; - Ok(()) - } -} -pub struct Mem0OutputArm2Layout { - pub _extra0: &'static ArgU8Layout, - pub _extra1: &'static ArgU8Layout, - pub _extra2: &'static ArgU8Layout, -} -impl risc0_zkp::layout::Component for Mem0OutputArm2Layout { - fn ty_name(&self) -> &'static str { - "Mem0OutputArm2Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_extra0", self._extra0)?; - v.visit_component("_extra1", self._extra1)?; - v.visit_component("_extra2", self._extra2)?; - Ok(()) - } -} -pub struct OpLBULayout { - pub bytes: &'static SplitWordLayout, -} -impl risc0_zkp::layout::Component for OpLBULayout { - fn ty_name(&self) -> &'static str { - "OpLBULayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("bytes", self.bytes)?; - Ok(()) - } -} -pub struct Mem0OutputArm3Layout { - pub _super: &'static OpLBULayout, - pub _extra0: &'static ArgU8Layout, -} -impl risc0_zkp::layout::Component for Mem0OutputArm3Layout { - fn ty_name(&self) -> &'static str { - "Mem0OutputArm3Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_super", self._super)?; - v.visit_component("_extra0", self._extra0)?; - Ok(()) - } -} -pub struct Mem0OutputArm4Layout { - pub _extra0: &'static ArgU8Layout, - pub _extra1: &'static ArgU8Layout, - pub _extra2: &'static ArgU8Layout, -} -impl risc0_zkp::layout::Component for Mem0OutputArm4Layout { - fn ty_name(&self) -> &'static str { - "Mem0OutputArm4Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_extra0", self._extra0)?; - v.visit_component("_extra1", self._extra1)?; - v.visit_component("_extra2", self._extra2)?; - Ok(()) - } -} -pub struct Mem0OutputArm5Layout { - pub _extra0: &'static ArgU8Layout, - pub _extra1: &'static ArgU8Layout, - pub _extra2: &'static ArgU8Layout, -} -impl risc0_zkp::layout::Component for Mem0OutputArm5Layout { - fn ty_name(&self) -> &'static str { - "Mem0OutputArm5Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_extra0", self._extra0)?; - v.visit_component("_extra1", self._extra1)?; - v.visit_component("_extra2", self._extra2)?; - Ok(()) - } -} -pub struct Mem0OutputArm6Layout { - pub _extra0: &'static ArgU8Layout, - pub _extra1: &'static ArgU8Layout, - pub _extra2: &'static ArgU8Layout, -} -impl risc0_zkp::layout::Component for Mem0OutputArm6Layout { - fn ty_name(&self) -> &'static str { - "Mem0OutputArm6Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_extra0", self._extra0)?; - v.visit_component("_extra1", self._extra1)?; - v.visit_component("_extra2", self._extra2)?; - Ok(()) - } -} -pub struct Mem0OutputArm7Layout { - pub _extra0: &'static ArgU8Layout, - pub _extra1: &'static ArgU8Layout, - pub _extra2: &'static ArgU8Layout, -} -impl risc0_zkp::layout::Component for Mem0OutputArm7Layout { - fn ty_name(&self) -> &'static str { - "Mem0OutputArm7Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_extra0", self._extra0)?; - v.visit_component("_extra1", self._extra1)?; - v.visit_component("_extra2", self._extra2)?; - Ok(()) - } -} -pub struct Mem0OutputLayout { - pub arm0: &'static OpLBLayout, - pub arm1: &'static Mem0OutputArm1Layout, - pub arm2: &'static Mem0OutputArm2Layout, - pub arm3: &'static Mem0OutputArm3Layout, - pub arm4: &'static Mem0OutputArm4Layout, - pub arm5: &'static Mem0OutputArm5Layout, - pub arm6: &'static Mem0OutputArm6Layout, - pub arm7: &'static Mem0OutputArm7Layout, -} -impl risc0_zkp::layout::Component for Mem0OutputLayout { - fn ty_name(&self) -> &'static str { - "Mem0OutputLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("arm0", self.arm0)?; - v.visit_component("arm1", self.arm1)?; - v.visit_component("arm2", self.arm2)?; - v.visit_component("arm3", self.arm3)?; - v.visit_component("arm4", self.arm4)?; - v.visit_component("arm5", self.arm5)?; - v.visit_component("arm6", self.arm6)?; - v.visit_component("arm7", self.arm7)?; - Ok(()) - } -} -pub struct Mem0Layout { - pub input: &'static MemLoadInputLayout, - pub _arguments_mem0_output: &'static _Arguments_Mem0OutputLayout, - pub output: &'static Mem0OutputLayout, - pub _0: &'static WriteRdLayout, - pub pc_add: &'static NormalizeU32Layout, -} -impl risc0_zkp::layout::Component for Mem0Layout { - fn ty_name(&self) -> &'static str { - "Mem0Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("input", self.input)?; - v.visit_component("_arguments_mem0_output", self._arguments_mem0_output)?; - v.visit_component("output", self.output)?; - v.visit_component("_0", self._0)?; - v.visit_component("pc_add", self.pc_add)?; - Ok(()) - } -} -pub struct MemStoreInputLayout { - pub decoded: &'static DecodeInstLayout, - pub rs1: &'static ReadRegLayout, - pub rs2: &'static ReadRegLayout, - pub addr_u32: &'static NormalizeU32Layout, - pub addr: &'static AddrDecomposeBitsLayout, - pub data_0: &'static MemoryReadLayout, -} -impl risc0_zkp::layout::Component for MemStoreInputLayout { - fn ty_name(&self) -> &'static str { - "MemStoreInputLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("decoded", self.decoded)?; - v.visit_component("rs1", self.rs1)?; - v.visit_component("rs2", self.rs2)?; - v.visit_component("addr_u32", self.addr_u32)?; - v.visit_component("addr", self.addr)?; - v.visit_component("data_0", self.data_0)?; - Ok(()) - } -} -pub type ArgU8Layout4LayoutArray = [&'static ArgU8Layout; 4]; -pub struct _Arguments_Mem1OutputLayout { - pub arg_u8: &'static ArgU8Layout4LayoutArray, -} -impl risc0_zkp::layout::Component for _Arguments_Mem1OutputLayout { - fn ty_name(&self) -> &'static str { - "_Arguments_Mem1OutputLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("arg_u8", self.arg_u8)?; - Ok(()) - } -} -pub struct OpSBLayout { - pub orig_bytes: &'static SplitWordLayout, - pub new_bytes: &'static SplitWordLayout, -} -impl risc0_zkp::layout::Component for OpSBLayout { - fn ty_name(&self) -> &'static str { - "OpSBLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("orig_bytes", self.orig_bytes)?; - v.visit_component("new_bytes", self.new_bytes)?; - Ok(()) - } -} -pub struct Mem1OutputArm1Layout { - pub _extra0: &'static ArgU8Layout, - pub _extra1: &'static ArgU8Layout, - pub _extra2: &'static ArgU8Layout, - pub _extra3: &'static ArgU8Layout, -} -impl risc0_zkp::layout::Component for Mem1OutputArm1Layout { - fn ty_name(&self) -> &'static str { - "Mem1OutputArm1Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_extra0", self._extra0)?; - v.visit_component("_extra1", self._extra1)?; - v.visit_component("_extra2", self._extra2)?; - v.visit_component("_extra3", self._extra3)?; - Ok(()) - } -} -pub struct Mem1OutputArm2Layout { - pub _extra0: &'static ArgU8Layout, - pub _extra1: &'static ArgU8Layout, - pub _extra2: &'static ArgU8Layout, - pub _extra3: &'static ArgU8Layout, -} -impl risc0_zkp::layout::Component for Mem1OutputArm2Layout { - fn ty_name(&self) -> &'static str { - "Mem1OutputArm2Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_extra0", self._extra0)?; - v.visit_component("_extra1", self._extra1)?; - v.visit_component("_extra2", self._extra2)?; - v.visit_component("_extra3", self._extra3)?; - Ok(()) - } -} -pub struct Mem1OutputArm3Layout { - pub _extra0: &'static ArgU8Layout, - pub _extra1: &'static ArgU8Layout, - pub _extra2: &'static ArgU8Layout, - pub _extra3: &'static ArgU8Layout, -} -impl risc0_zkp::layout::Component for Mem1OutputArm3Layout { - fn ty_name(&self) -> &'static str { - "Mem1OutputArm3Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_extra0", self._extra0)?; - v.visit_component("_extra1", self._extra1)?; - v.visit_component("_extra2", self._extra2)?; - v.visit_component("_extra3", self._extra3)?; - Ok(()) - } -} -pub struct Mem1OutputArm4Layout { - pub _extra0: &'static ArgU8Layout, - pub _extra1: &'static ArgU8Layout, - pub _extra2: &'static ArgU8Layout, - pub _extra3: &'static ArgU8Layout, -} -impl risc0_zkp::layout::Component for Mem1OutputArm4Layout { - fn ty_name(&self) -> &'static str { - "Mem1OutputArm4Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_extra0", self._extra0)?; - v.visit_component("_extra1", self._extra1)?; - v.visit_component("_extra2", self._extra2)?; - v.visit_component("_extra3", self._extra3)?; - Ok(()) - } -} -pub struct Mem1OutputArm5Layout { - pub _extra0: &'static ArgU8Layout, - pub _extra1: &'static ArgU8Layout, - pub _extra2: &'static ArgU8Layout, - pub _extra3: &'static ArgU8Layout, -} -impl risc0_zkp::layout::Component for Mem1OutputArm5Layout { - fn ty_name(&self) -> &'static str { - "Mem1OutputArm5Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_extra0", self._extra0)?; - v.visit_component("_extra1", self._extra1)?; - v.visit_component("_extra2", self._extra2)?; - v.visit_component("_extra3", self._extra3)?; - Ok(()) - } -} -pub struct Mem1OutputArm6Layout { - pub _extra0: &'static ArgU8Layout, - pub _extra1: &'static ArgU8Layout, - pub _extra2: &'static ArgU8Layout, - pub _extra3: &'static ArgU8Layout, -} -impl risc0_zkp::layout::Component for Mem1OutputArm6Layout { - fn ty_name(&self) -> &'static str { - "Mem1OutputArm6Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_extra0", self._extra0)?; - v.visit_component("_extra1", self._extra1)?; - v.visit_component("_extra2", self._extra2)?; - v.visit_component("_extra3", self._extra3)?; - Ok(()) - } -} -pub struct Mem1OutputArm7Layout { - pub _extra0: &'static ArgU8Layout, - pub _extra1: &'static ArgU8Layout, - pub _extra2: &'static ArgU8Layout, - pub _extra3: &'static ArgU8Layout, -} -impl risc0_zkp::layout::Component for Mem1OutputArm7Layout { - fn ty_name(&self) -> &'static str { - "Mem1OutputArm7Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_extra0", self._extra0)?; - v.visit_component("_extra1", self._extra1)?; - v.visit_component("_extra2", self._extra2)?; - v.visit_component("_extra3", self._extra3)?; - Ok(()) - } -} -pub struct Mem1OutputLayout { - pub arm0: &'static OpSBLayout, - pub arm1: &'static Mem1OutputArm1Layout, - pub arm2: &'static Mem1OutputArm2Layout, - pub arm3: &'static Mem1OutputArm3Layout, - pub arm4: &'static Mem1OutputArm4Layout, - pub arm5: &'static Mem1OutputArm5Layout, - pub arm6: &'static Mem1OutputArm6Layout, - pub arm7: &'static Mem1OutputArm7Layout, -} -impl risc0_zkp::layout::Component for Mem1OutputLayout { - fn ty_name(&self) -> &'static str { - "Mem1OutputLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("arm0", self.arm0)?; - v.visit_component("arm1", self.arm1)?; - v.visit_component("arm2", self.arm2)?; - v.visit_component("arm3", self.arm3)?; - v.visit_component("arm4", self.arm4)?; - v.visit_component("arm5", self.arm5)?; - v.visit_component("arm6", self.arm6)?; - v.visit_component("arm7", self.arm7)?; - Ok(()) - } -} -pub struct MemStoreFinalizeLayout { - pub _0: &'static MemoryWriteLayout, -} -impl risc0_zkp::layout::Component for MemStoreFinalizeLayout { - fn ty_name(&self) -> &'static str { - "MemStoreFinalizeLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_0", self._0)?; - Ok(()) - } -} -pub struct Mem1Layout { - pub input: &'static MemStoreInputLayout, - pub _arguments_mem1_output: &'static _Arguments_Mem1OutputLayout, - pub output: &'static Mem1OutputLayout, - pub _0: &'static MemStoreFinalizeLayout, - pub pc_add: &'static NormalizeU32Layout, -} -impl risc0_zkp::layout::Component for Mem1Layout { - fn ty_name(&self) -> &'static str { - "Mem1Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("input", self.input)?; - v.visit_component("_arguments_mem1_output", self._arguments_mem1_output)?; - v.visit_component("output", self.output)?; - v.visit_component("_0", self._0)?; - v.visit_component("pc_add", self.pc_add)?; - Ok(()) - } -} -pub struct MemoryPageInLayout { - pub io: &'static MemoryIOLayout, -} -impl risc0_zkp::layout::Component for MemoryPageInLayout { - fn ty_name(&self) -> &'static str { - "MemoryPageInLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("io", self.io)?; - Ok(()) - } -} -pub struct ControlLoadRoot__0_SuperLayout { - pub mem: &'static MemoryPageInLayout, -} -impl risc0_zkp::layout::Component for ControlLoadRoot__0_SuperLayout { - fn ty_name(&self) -> &'static str { - "ControlLoadRoot__0_SuperLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("mem", self.mem)?; - Ok(()) - } -} -pub type ControlLoadRoot__0_SuperLayout8LayoutArray = [&'static ControlLoadRoot__0_SuperLayout; 8]; -pub struct ControlLoadRootLayout { - pub _1: &'static ControlLoadRoot__0_SuperLayout8LayoutArray, -} -impl risc0_zkp::layout::Component for ControlLoadRootLayout { - fn ty_name(&self) -> &'static str { - "ControlLoadRootLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_1", self._1)?; - Ok(()) - } -} -pub struct Control0_SuperArm0Layout { - pub _super: &'static ControlLoadRootLayout, - pub _extra0: &'static CycleArgLayout, - pub _extra1: &'static CycleArgLayout, - pub _extra2: &'static CycleArgLayout, - pub _extra3: &'static CycleArgLayout, - pub _extra4: &'static CycleArgLayout, - pub _extra5: &'static CycleArgLayout, - pub _extra6: &'static CycleArgLayout, - pub _extra7: &'static CycleArgLayout, - pub _extra8: &'static ArgU16Layout, - pub _extra9: &'static ArgU16Layout, - pub _extra10: &'static ArgU16Layout, - pub _extra11: &'static ArgU16Layout, - pub _extra12: &'static ArgU16Layout, - pub _extra13: &'static ArgU16Layout, - pub _extra14: &'static ArgU16Layout, - pub _extra15: &'static ArgU16Layout, - pub _extra16: &'static ArgU16Layout, - pub _extra17: &'static ArgU16Layout, - pub _extra18: &'static ArgU16Layout, - pub _extra19: &'static ArgU16Layout, - pub _extra20: &'static ArgU16Layout, - pub _extra21: &'static ArgU16Layout, - pub _extra22: &'static ArgU16Layout, - pub _extra23: &'static ArgU16Layout, - pub _extra24: &'static ArgU8Layout, - pub _extra25: &'static ArgU8Layout, - pub _extra26: &'static ArgU8Layout, - pub _extra27: &'static ArgU8Layout, - pub _extra28: &'static ArgU8Layout, - pub _extra29: &'static ArgU8Layout, - pub _extra30: &'static ArgU8Layout, - pub _extra31: &'static ArgU8Layout, - pub _extra32: &'static ArgU8Layout, - pub _extra33: &'static ArgU8Layout, - pub _extra34: &'static ArgU8Layout, - pub _extra35: &'static ArgU8Layout, - pub _extra36: &'static ArgU8Layout, - pub _extra37: &'static ArgU8Layout, - pub _extra38: &'static ArgU8Layout, - pub _extra39: &'static ArgU8Layout, -} -impl risc0_zkp::layout::Component for Control0_SuperArm0Layout { - fn ty_name(&self) -> &'static str { - "Control0_SuperArm0Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_super", self._super)?; - v.visit_component("_extra0", self._extra0)?; - v.visit_component("_extra1", self._extra1)?; - v.visit_component("_extra2", self._extra2)?; - v.visit_component("_extra3", self._extra3)?; - v.visit_component("_extra4", self._extra4)?; - v.visit_component("_extra5", self._extra5)?; - v.visit_component("_extra6", self._extra6)?; - v.visit_component("_extra7", self._extra7)?; - v.visit_component("_extra8", self._extra8)?; - v.visit_component("_extra9", self._extra9)?; - v.visit_component("_extra10", self._extra10)?; - v.visit_component("_extra11", self._extra11)?; - v.visit_component("_extra12", self._extra12)?; - v.visit_component("_extra13", self._extra13)?; - v.visit_component("_extra14", self._extra14)?; - v.visit_component("_extra15", self._extra15)?; - v.visit_component("_extra16", self._extra16)?; - v.visit_component("_extra17", self._extra17)?; - v.visit_component("_extra18", self._extra18)?; - v.visit_component("_extra19", self._extra19)?; - v.visit_component("_extra20", self._extra20)?; - v.visit_component("_extra21", self._extra21)?; - v.visit_component("_extra22", self._extra22)?; - v.visit_component("_extra23", self._extra23)?; - v.visit_component("_extra24", self._extra24)?; - v.visit_component("_extra25", self._extra25)?; - v.visit_component("_extra26", self._extra26)?; - v.visit_component("_extra27", self._extra27)?; - v.visit_component("_extra28", self._extra28)?; - v.visit_component("_extra29", self._extra29)?; - v.visit_component("_extra30", self._extra30)?; - v.visit_component("_extra31", self._extra31)?; - v.visit_component("_extra32", self._extra32)?; - v.visit_component("_extra33", self._extra33)?; - v.visit_component("_extra34", self._extra34)?; - v.visit_component("_extra35", self._extra35)?; - v.visit_component("_extra36", self._extra36)?; - v.visit_component("_extra37", self._extra37)?; - v.visit_component("_extra38", self._extra38)?; - v.visit_component("_extra39", self._extra39)?; - Ok(()) - } -} -pub struct ControlResume_SuperArm0_SuperLayout { - pub pc: &'static MemoryReadLayout, - pub mode: &'static MemoryReadLayout, -} -impl risc0_zkp::layout::Component for ControlResume_SuperArm0_SuperLayout { - fn ty_name(&self) -> &'static str { - "ControlResume_SuperArm0_SuperLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("pc", self.pc)?; - v.visit_component("mode", self.mode)?; - Ok(()) - } -} -pub struct ControlResume_SuperArm0Layout { - pub _super: &'static ControlResume_SuperArm0_SuperLayout, - pub _extra0: &'static MemoryArgLayout, - pub _extra1: &'static MemoryArgLayout, - pub _extra2: &'static MemoryArgLayout, - pub _extra3: &'static MemoryArgLayout, - pub _extra4: &'static MemoryArgLayout, - pub _extra5: &'static MemoryArgLayout, - pub _extra6: &'static MemoryArgLayout, - pub _extra7: &'static MemoryArgLayout, - pub _extra8: &'static MemoryArgLayout, - pub _extra9: &'static MemoryArgLayout, - pub _extra10: &'static MemoryArgLayout, - pub _extra11: &'static MemoryArgLayout, - pub _extra12: &'static CycleArgLayout, - pub _extra13: &'static CycleArgLayout, - pub _extra14: &'static CycleArgLayout, - pub _extra15: &'static CycleArgLayout, - pub _extra16: &'static CycleArgLayout, - pub _extra17: &'static CycleArgLayout, -} -impl risc0_zkp::layout::Component for ControlResume_SuperArm0Layout { - fn ty_name(&self) -> &'static str { - "ControlResume_SuperArm0Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_super", self._super)?; - v.visit_component("_extra0", self._extra0)?; - v.visit_component("_extra1", self._extra1)?; - v.visit_component("_extra2", self._extra2)?; - v.visit_component("_extra3", self._extra3)?; - v.visit_component("_extra4", self._extra4)?; - v.visit_component("_extra5", self._extra5)?; - v.visit_component("_extra6", self._extra6)?; - v.visit_component("_extra7", self._extra7)?; - v.visit_component("_extra8", self._extra8)?; - v.visit_component("_extra9", self._extra9)?; - v.visit_component("_extra10", self._extra10)?; - v.visit_component("_extra11", self._extra11)?; - v.visit_component("_extra12", self._extra12)?; - v.visit_component("_extra13", self._extra13)?; - v.visit_component("_extra14", self._extra14)?; - v.visit_component("_extra15", self._extra15)?; - v.visit_component("_extra16", self._extra16)?; - v.visit_component("_extra17", self._extra17)?; - Ok(()) - } -} -pub struct ControlResume_SuperArm1_Super__0_SuperLayout { - pub _0: &'static MemoryWriteLayout, -} -impl risc0_zkp::layout::Component for ControlResume_SuperArm1_Super__0_SuperLayout { - fn ty_name(&self) -> &'static str { - "ControlResume_SuperArm1_Super__0_SuperLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_0", self._0)?; - Ok(()) - } -} -pub type ControlResume_SuperArm1_Super__0_SuperLayout8LayoutArray = - [&'static ControlResume_SuperArm1_Super__0_SuperLayout; 8]; -pub struct ControlResume_SuperArm1_SuperLayout { - pub _1: &'static ControlResume_SuperArm1_Super__0_SuperLayout8LayoutArray, -} -impl risc0_zkp::layout::Component for ControlResume_SuperArm1_SuperLayout { - fn ty_name(&self) -> &'static str { - "ControlResume_SuperArm1_SuperLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_1", self._1)?; - Ok(()) - } -} -pub struct ControlResume_SuperLayout { - pub arm0: &'static ControlResume_SuperArm0Layout, - pub arm1: &'static ControlResume_SuperArm1_SuperLayout, -} -impl risc0_zkp::layout::Component for ControlResume_SuperLayout { - fn ty_name(&self) -> &'static str { - "ControlResume_SuperLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("arm0", self.arm0)?; - v.visit_component("arm1", self.arm1)?; - Ok(()) - } -} -pub type MemoryArgLayout16LayoutArray = [&'static MemoryArgLayout; 16]; -pub type CycleArgLayout8LayoutArray = [&'static CycleArgLayout; 8]; -pub struct _Arguments_ControlResume_SuperLayout { - pub memory_arg: &'static MemoryArgLayout16LayoutArray, - pub cycle_arg: &'static CycleArgLayout8LayoutArray, -} -impl risc0_zkp::layout::Component for _Arguments_ControlResume_SuperLayout { - fn ty_name(&self) -> &'static str { - "_Arguments_ControlResume_SuperLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("memory_arg", self.memory_arg)?; - v.visit_component("cycle_arg", self.cycle_arg)?; - Ok(()) - } -} -pub struct ControlResumeLayout { - pub _super: &'static ControlResume_SuperLayout, - pub pc_zero: &'static IsZeroLayout, - pub _arguments_control_resume__super: &'static _Arguments_ControlResume_SuperLayout, -} -impl risc0_zkp::layout::Component for ControlResumeLayout { - fn ty_name(&self) -> &'static str { - "ControlResumeLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_super", self._super)?; - v.visit_component("pc_zero", self.pc_zero)?; - v.visit_component( - "_arguments_control_resume__super", - self._arguments_control_resume__super, - )?; - Ok(()) - } -} -pub struct Control0_SuperArm1Layout { - pub _super: &'static ControlResumeLayout, - pub _extra0: &'static ArgU16Layout, - pub _extra1: &'static ArgU16Layout, - pub _extra2: &'static ArgU16Layout, - pub _extra3: &'static ArgU16Layout, - pub _extra4: &'static ArgU16Layout, - pub _extra5: &'static ArgU16Layout, - pub _extra6: &'static ArgU16Layout, - pub _extra7: &'static ArgU16Layout, - pub _extra8: &'static ArgU16Layout, - pub _extra9: &'static ArgU16Layout, - pub _extra10: &'static ArgU16Layout, - pub _extra11: &'static ArgU16Layout, - pub _extra12: &'static ArgU16Layout, - pub _extra13: &'static ArgU16Layout, - pub _extra14: &'static ArgU16Layout, - pub _extra15: &'static ArgU16Layout, - pub _extra16: &'static ArgU8Layout, - pub _extra17: &'static ArgU8Layout, - pub _extra18: &'static ArgU8Layout, - pub _extra19: &'static ArgU8Layout, - pub _extra20: &'static ArgU8Layout, - pub _extra21: &'static ArgU8Layout, - pub _extra22: &'static ArgU8Layout, - pub _extra23: &'static ArgU8Layout, - pub _extra24: &'static ArgU8Layout, - pub _extra25: &'static ArgU8Layout, - pub _extra26: &'static ArgU8Layout, - pub _extra27: &'static ArgU8Layout, - pub _extra28: &'static ArgU8Layout, - pub _extra29: &'static ArgU8Layout, - pub _extra30: &'static ArgU8Layout, - pub _extra31: &'static ArgU8Layout, -} -impl risc0_zkp::layout::Component for Control0_SuperArm1Layout { - fn ty_name(&self) -> &'static str { - "Control0_SuperArm1Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_super", self._super)?; - v.visit_component("_extra0", self._extra0)?; - v.visit_component("_extra1", self._extra1)?; - v.visit_component("_extra2", self._extra2)?; - v.visit_component("_extra3", self._extra3)?; - v.visit_component("_extra4", self._extra4)?; - v.visit_component("_extra5", self._extra5)?; - v.visit_component("_extra6", self._extra6)?; - v.visit_component("_extra7", self._extra7)?; - v.visit_component("_extra8", self._extra8)?; - v.visit_component("_extra9", self._extra9)?; - v.visit_component("_extra10", self._extra10)?; - v.visit_component("_extra11", self._extra11)?; - v.visit_component("_extra12", self._extra12)?; - v.visit_component("_extra13", self._extra13)?; - v.visit_component("_extra14", self._extra14)?; - v.visit_component("_extra15", self._extra15)?; - v.visit_component("_extra16", self._extra16)?; - v.visit_component("_extra17", self._extra17)?; - v.visit_component("_extra18", self._extra18)?; - v.visit_component("_extra19", self._extra19)?; - v.visit_component("_extra20", self._extra20)?; - v.visit_component("_extra21", self._extra21)?; - v.visit_component("_extra22", self._extra22)?; - v.visit_component("_extra23", self._extra23)?; - v.visit_component("_extra24", self._extra24)?; - v.visit_component("_extra25", self._extra25)?; - v.visit_component("_extra26", self._extra26)?; - v.visit_component("_extra27", self._extra27)?; - v.visit_component("_extra28", self._extra28)?; - v.visit_component("_extra29", self._extra29)?; - v.visit_component("_extra30", self._extra30)?; - v.visit_component("_extra31", self._extra31)?; - Ok(()) - } -} -pub struct ControlUserECALLLayout { - pub safe_mode: &'static NondetRegLayout, - pub pc_addr: &'static AddrDecomposeBitsLayout, - pub load_inst: &'static MemoryReadLayout, - pub dispatch_idx: &'static MemoryReadLayout, - pub _0: &'static U16RegLayout, - pub new_pc_addr: &'static MemoryReadLayout, - pub _1: &'static MemoryWriteLayout, -} -impl risc0_zkp::layout::Component for ControlUserECALLLayout { - fn ty_name(&self) -> &'static str { - "ControlUserECALLLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("safe_mode", self.safe_mode)?; - v.visit_component("pc_addr", self.pc_addr)?; - v.visit_component("load_inst", self.load_inst)?; - v.visit_component("dispatch_idx", self.dispatch_idx)?; - v.visit_component("_0", self._0)?; - v.visit_component("new_pc_addr", self.new_pc_addr)?; - v.visit_component("_1", self._1)?; - Ok(()) - } -} -pub struct Control0_SuperArm2Layout { - pub _super: &'static ControlUserECALLLayout, - pub _extra0: &'static MemoryArgLayout, - pub _extra1: &'static MemoryArgLayout, - pub _extra2: &'static MemoryArgLayout, - pub _extra3: &'static MemoryArgLayout, - pub _extra4: &'static MemoryArgLayout, - pub _extra5: &'static MemoryArgLayout, - pub _extra6: &'static MemoryArgLayout, - pub _extra7: &'static MemoryArgLayout, - pub _extra8: &'static CycleArgLayout, - pub _extra9: &'static CycleArgLayout, - pub _extra10: &'static CycleArgLayout, - pub _extra11: &'static CycleArgLayout, - pub _extra12: &'static ArgU16Layout, - pub _extra13: &'static ArgU16Layout, - pub _extra14: &'static ArgU16Layout, - pub _extra15: &'static ArgU16Layout, - pub _extra16: &'static ArgU16Layout, - pub _extra17: &'static ArgU16Layout, - pub _extra18: &'static ArgU16Layout, - pub _extra19: &'static ArgU16Layout, - pub _extra20: &'static ArgU16Layout, - pub _extra21: &'static ArgU16Layout, - pub _extra22: &'static ArgU16Layout, - pub _extra23: &'static ArgU16Layout, - pub _extra24: &'static ArgU16Layout, - pub _extra25: &'static ArgU8Layout, - pub _extra26: &'static ArgU8Layout, - pub _extra27: &'static ArgU8Layout, - pub _extra28: &'static ArgU8Layout, - pub _extra29: &'static ArgU8Layout, - pub _extra30: &'static ArgU8Layout, - pub _extra31: &'static ArgU8Layout, - pub _extra32: &'static ArgU8Layout, - pub _extra33: &'static ArgU8Layout, - pub _extra34: &'static ArgU8Layout, - pub _extra35: &'static ArgU8Layout, - pub _extra36: &'static ArgU8Layout, - pub _extra37: &'static ArgU8Layout, - pub _extra38: &'static ArgU8Layout, - pub _extra39: &'static ArgU8Layout, - pub _extra40: &'static ArgU8Layout, -} -impl risc0_zkp::layout::Component for Control0_SuperArm2Layout { - fn ty_name(&self) -> &'static str { - "Control0_SuperArm2Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_super", self._super)?; - v.visit_component("_extra0", self._extra0)?; - v.visit_component("_extra1", self._extra1)?; - v.visit_component("_extra2", self._extra2)?; - v.visit_component("_extra3", self._extra3)?; - v.visit_component("_extra4", self._extra4)?; - v.visit_component("_extra5", self._extra5)?; - v.visit_component("_extra6", self._extra6)?; - v.visit_component("_extra7", self._extra7)?; - v.visit_component("_extra8", self._extra8)?; - v.visit_component("_extra9", self._extra9)?; - v.visit_component("_extra10", self._extra10)?; - v.visit_component("_extra11", self._extra11)?; - v.visit_component("_extra12", self._extra12)?; - v.visit_component("_extra13", self._extra13)?; - v.visit_component("_extra14", self._extra14)?; - v.visit_component("_extra15", self._extra15)?; - v.visit_component("_extra16", self._extra16)?; - v.visit_component("_extra17", self._extra17)?; - v.visit_component("_extra18", self._extra18)?; - v.visit_component("_extra19", self._extra19)?; - v.visit_component("_extra20", self._extra20)?; - v.visit_component("_extra21", self._extra21)?; - v.visit_component("_extra22", self._extra22)?; - v.visit_component("_extra23", self._extra23)?; - v.visit_component("_extra24", self._extra24)?; - v.visit_component("_extra25", self._extra25)?; - v.visit_component("_extra26", self._extra26)?; - v.visit_component("_extra27", self._extra27)?; - v.visit_component("_extra28", self._extra28)?; - v.visit_component("_extra29", self._extra29)?; - v.visit_component("_extra30", self._extra30)?; - v.visit_component("_extra31", self._extra31)?; - v.visit_component("_extra32", self._extra32)?; - v.visit_component("_extra33", self._extra33)?; - v.visit_component("_extra34", self._extra34)?; - v.visit_component("_extra35", self._extra35)?; - v.visit_component("_extra36", self._extra36)?; - v.visit_component("_extra37", self._extra37)?; - v.visit_component("_extra38", self._extra38)?; - v.visit_component("_extra39", self._extra39)?; - v.visit_component("_extra40", self._extra40)?; - Ok(()) - } -} -pub struct ControlMRETLayout { - pub safe_mode: &'static NondetRegLayout, - pub pc_addr: &'static AddrDecomposeBitsLayout, - pub load_inst: &'static MemoryReadLayout, - pub pc: &'static MemoryReadLayout, - pub pc_add: &'static NormalizeU32Layout, -} -impl risc0_zkp::layout::Component for ControlMRETLayout { - fn ty_name(&self) -> &'static str { - "ControlMRETLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("safe_mode", self.safe_mode)?; - v.visit_component("pc_addr", self.pc_addr)?; - v.visit_component("load_inst", self.load_inst)?; - v.visit_component("pc", self.pc)?; - v.visit_component("pc_add", self.pc_add)?; - Ok(()) - } -} -pub struct Control0_SuperArm3Layout { - pub _super: &'static ControlMRETLayout, - pub _extra0: &'static MemoryArgLayout, - pub _extra1: &'static MemoryArgLayout, - pub _extra2: &'static MemoryArgLayout, - pub _extra3: &'static MemoryArgLayout, - pub _extra4: &'static MemoryArgLayout, - pub _extra5: &'static MemoryArgLayout, - pub _extra6: &'static MemoryArgLayout, - pub _extra7: &'static MemoryArgLayout, - pub _extra8: &'static MemoryArgLayout, - pub _extra9: &'static MemoryArgLayout, - pub _extra10: &'static MemoryArgLayout, - pub _extra11: &'static MemoryArgLayout, - pub _extra12: &'static CycleArgLayout, - pub _extra13: &'static CycleArgLayout, - pub _extra14: &'static CycleArgLayout, - pub _extra15: &'static CycleArgLayout, - pub _extra16: &'static CycleArgLayout, - pub _extra17: &'static CycleArgLayout, - pub _extra18: &'static ArgU16Layout, - pub _extra19: &'static ArgU16Layout, - pub _extra20: &'static ArgU16Layout, - pub _extra21: &'static ArgU16Layout, - pub _extra22: &'static ArgU16Layout, - pub _extra23: &'static ArgU16Layout, - pub _extra24: &'static ArgU16Layout, - pub _extra25: &'static ArgU16Layout, - pub _extra26: &'static ArgU16Layout, - pub _extra27: &'static ArgU16Layout, - pub _extra28: &'static ArgU16Layout, - pub _extra29: &'static ArgU16Layout, - pub _extra30: &'static ArgU8Layout, - pub _extra31: &'static ArgU8Layout, - pub _extra32: &'static ArgU8Layout, - pub _extra33: &'static ArgU8Layout, - pub _extra34: &'static ArgU8Layout, - pub _extra35: &'static ArgU8Layout, - pub _extra36: &'static ArgU8Layout, - pub _extra37: &'static ArgU8Layout, - pub _extra38: &'static ArgU8Layout, - pub _extra39: &'static ArgU8Layout, - pub _extra40: &'static ArgU8Layout, - pub _extra41: &'static ArgU8Layout, - pub _extra42: &'static ArgU8Layout, - pub _extra43: &'static ArgU8Layout, - pub _extra44: &'static ArgU8Layout, - pub _extra45: &'static ArgU8Layout, -} -impl risc0_zkp::layout::Component for Control0_SuperArm3Layout { - fn ty_name(&self) -> &'static str { - "Control0_SuperArm3Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_super", self._super)?; - v.visit_component("_extra0", self._extra0)?; - v.visit_component("_extra1", self._extra1)?; - v.visit_component("_extra2", self._extra2)?; - v.visit_component("_extra3", self._extra3)?; - v.visit_component("_extra4", self._extra4)?; - v.visit_component("_extra5", self._extra5)?; - v.visit_component("_extra6", self._extra6)?; - v.visit_component("_extra7", self._extra7)?; - v.visit_component("_extra8", self._extra8)?; - v.visit_component("_extra9", self._extra9)?; - v.visit_component("_extra10", self._extra10)?; - v.visit_component("_extra11", self._extra11)?; - v.visit_component("_extra12", self._extra12)?; - v.visit_component("_extra13", self._extra13)?; - v.visit_component("_extra14", self._extra14)?; - v.visit_component("_extra15", self._extra15)?; - v.visit_component("_extra16", self._extra16)?; - v.visit_component("_extra17", self._extra17)?; - v.visit_component("_extra18", self._extra18)?; - v.visit_component("_extra19", self._extra19)?; - v.visit_component("_extra20", self._extra20)?; - v.visit_component("_extra21", self._extra21)?; - v.visit_component("_extra22", self._extra22)?; - v.visit_component("_extra23", self._extra23)?; - v.visit_component("_extra24", self._extra24)?; - v.visit_component("_extra25", self._extra25)?; - v.visit_component("_extra26", self._extra26)?; - v.visit_component("_extra27", self._extra27)?; - v.visit_component("_extra28", self._extra28)?; - v.visit_component("_extra29", self._extra29)?; - v.visit_component("_extra30", self._extra30)?; - v.visit_component("_extra31", self._extra31)?; - v.visit_component("_extra32", self._extra32)?; - v.visit_component("_extra33", self._extra33)?; - v.visit_component("_extra34", self._extra34)?; - v.visit_component("_extra35", self._extra35)?; - v.visit_component("_extra36", self._extra36)?; - v.visit_component("_extra37", self._extra37)?; - v.visit_component("_extra38", self._extra38)?; - v.visit_component("_extra39", self._extra39)?; - v.visit_component("_extra40", self._extra40)?; - v.visit_component("_extra41", self._extra41)?; - v.visit_component("_extra42", self._extra42)?; - v.visit_component("_extra43", self._extra43)?; - v.visit_component("_extra44", self._extra44)?; - v.visit_component("_extra45", self._extra45)?; - Ok(()) - } -} -pub type MemoryReadLayout8LayoutArray = [&'static MemoryReadLayout; 8]; -pub struct ControlSuspend_SuperArm0_SuperLayout { - pub _1: &'static MemoryReadLayout8LayoutArray, -} -impl risc0_zkp::layout::Component for ControlSuspend_SuperArm0_SuperLayout { - fn ty_name(&self) -> &'static str { - "ControlSuspend_SuperArm0_SuperLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_1", self._1)?; - Ok(()) - } -} -pub struct ControlSuspend_SuperArm1_SuperLayout { - pub state: &'static NondetRegLayout, - pub _0: &'static MemoryWriteLayout, - pub _1: &'static MemoryWriteLayout, -} -impl risc0_zkp::layout::Component for ControlSuspend_SuperArm1_SuperLayout { - fn ty_name(&self) -> &'static str { - "ControlSuspend_SuperArm1_SuperLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("state", self.state)?; - v.visit_component("_0", self._0)?; - v.visit_component("_1", self._1)?; - Ok(()) - } -} -pub struct ControlSuspend_SuperArm1Layout { - pub _super: &'static ControlSuspend_SuperArm1_SuperLayout, - pub _extra0: &'static MemoryArgLayout, - pub _extra1: &'static MemoryArgLayout, - pub _extra2: &'static MemoryArgLayout, - pub _extra3: &'static MemoryArgLayout, - pub _extra4: &'static MemoryArgLayout, - pub _extra5: &'static MemoryArgLayout, - pub _extra6: &'static MemoryArgLayout, - pub _extra7: &'static MemoryArgLayout, - pub _extra8: &'static MemoryArgLayout, - pub _extra9: &'static MemoryArgLayout, - pub _extra10: &'static MemoryArgLayout, - pub _extra11: &'static MemoryArgLayout, - pub _extra12: &'static CycleArgLayout, - pub _extra13: &'static CycleArgLayout, - pub _extra14: &'static CycleArgLayout, - pub _extra15: &'static CycleArgLayout, - pub _extra16: &'static CycleArgLayout, - pub _extra17: &'static CycleArgLayout, -} -impl risc0_zkp::layout::Component for ControlSuspend_SuperArm1Layout { - fn ty_name(&self) -> &'static str { - "ControlSuspend_SuperArm1Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_super", self._super)?; - v.visit_component("_extra0", self._extra0)?; - v.visit_component("_extra1", self._extra1)?; - v.visit_component("_extra2", self._extra2)?; - v.visit_component("_extra3", self._extra3)?; - v.visit_component("_extra4", self._extra4)?; - v.visit_component("_extra5", self._extra5)?; - v.visit_component("_extra6", self._extra6)?; - v.visit_component("_extra7", self._extra7)?; - v.visit_component("_extra8", self._extra8)?; - v.visit_component("_extra9", self._extra9)?; - v.visit_component("_extra10", self._extra10)?; - v.visit_component("_extra11", self._extra11)?; - v.visit_component("_extra12", self._extra12)?; - v.visit_component("_extra13", self._extra13)?; - v.visit_component("_extra14", self._extra14)?; - v.visit_component("_extra15", self._extra15)?; - v.visit_component("_extra16", self._extra16)?; - v.visit_component("_extra17", self._extra17)?; - Ok(()) - } -} -pub struct ControlSuspend_SuperLayout { - pub arm0: &'static ControlSuspend_SuperArm0_SuperLayout, - pub arm1: &'static ControlSuspend_SuperArm1Layout, -} -impl risc0_zkp::layout::Component for ControlSuspend_SuperLayout { - fn ty_name(&self) -> &'static str { - "ControlSuspend_SuperLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("arm0", self.arm0)?; - v.visit_component("arm1", self.arm1)?; - Ok(()) - } -} -pub struct _Arguments_ControlSuspend_SuperLayout { - pub memory_arg: &'static MemoryArgLayout16LayoutArray, - pub cycle_arg: &'static CycleArgLayout8LayoutArray, -} -impl risc0_zkp::layout::Component for _Arguments_ControlSuspend_SuperLayout { - fn ty_name(&self) -> &'static str { - "_Arguments_ControlSuspend_SuperLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("memory_arg", self.memory_arg)?; - v.visit_component("cycle_arg", self.cycle_arg)?; - Ok(()) - } -} -pub struct ControlSuspendLayout { - pub _super: &'static ControlSuspend_SuperLayout, - pub pc_zero: &'static IsZeroLayout, - pub _arguments_control_suspend__super: &'static _Arguments_ControlSuspend_SuperLayout, -} -impl risc0_zkp::layout::Component for ControlSuspendLayout { - fn ty_name(&self) -> &'static str { - "ControlSuspendLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_super", self._super)?; - v.visit_component("pc_zero", self.pc_zero)?; - v.visit_component( - "_arguments_control_suspend__super", - self._arguments_control_suspend__super, - )?; - Ok(()) - } -} -pub struct Control0_SuperArm4Layout { - pub _super: &'static ControlSuspendLayout, - pub _extra0: &'static ArgU16Layout, - pub _extra1: &'static ArgU16Layout, - pub _extra2: &'static ArgU16Layout, - pub _extra3: &'static ArgU16Layout, - pub _extra4: &'static ArgU16Layout, - pub _extra5: &'static ArgU16Layout, - pub _extra6: &'static ArgU16Layout, - pub _extra7: &'static ArgU16Layout, - pub _extra8: &'static ArgU16Layout, - pub _extra9: &'static ArgU16Layout, - pub _extra10: &'static ArgU16Layout, - pub _extra11: &'static ArgU16Layout, - pub _extra12: &'static ArgU16Layout, - pub _extra13: &'static ArgU16Layout, - pub _extra14: &'static ArgU16Layout, - pub _extra15: &'static ArgU16Layout, - pub _extra16: &'static ArgU8Layout, - pub _extra17: &'static ArgU8Layout, - pub _extra18: &'static ArgU8Layout, - pub _extra19: &'static ArgU8Layout, - pub _extra20: &'static ArgU8Layout, - pub _extra21: &'static ArgU8Layout, - pub _extra22: &'static ArgU8Layout, - pub _extra23: &'static ArgU8Layout, - pub _extra24: &'static ArgU8Layout, - pub _extra25: &'static ArgU8Layout, - pub _extra26: &'static ArgU8Layout, - pub _extra27: &'static ArgU8Layout, - pub _extra28: &'static ArgU8Layout, - pub _extra29: &'static ArgU8Layout, - pub _extra30: &'static ArgU8Layout, - pub _extra31: &'static ArgU8Layout, -} -impl risc0_zkp::layout::Component for Control0_SuperArm4Layout { - fn ty_name(&self) -> &'static str { - "Control0_SuperArm4Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_super", self._super)?; - v.visit_component("_extra0", self._extra0)?; - v.visit_component("_extra1", self._extra1)?; - v.visit_component("_extra2", self._extra2)?; - v.visit_component("_extra3", self._extra3)?; - v.visit_component("_extra4", self._extra4)?; - v.visit_component("_extra5", self._extra5)?; - v.visit_component("_extra6", self._extra6)?; - v.visit_component("_extra7", self._extra7)?; - v.visit_component("_extra8", self._extra8)?; - v.visit_component("_extra9", self._extra9)?; - v.visit_component("_extra10", self._extra10)?; - v.visit_component("_extra11", self._extra11)?; - v.visit_component("_extra12", self._extra12)?; - v.visit_component("_extra13", self._extra13)?; - v.visit_component("_extra14", self._extra14)?; - v.visit_component("_extra15", self._extra15)?; - v.visit_component("_extra16", self._extra16)?; - v.visit_component("_extra17", self._extra17)?; - v.visit_component("_extra18", self._extra18)?; - v.visit_component("_extra19", self._extra19)?; - v.visit_component("_extra20", self._extra20)?; - v.visit_component("_extra21", self._extra21)?; - v.visit_component("_extra22", self._extra22)?; - v.visit_component("_extra23", self._extra23)?; - v.visit_component("_extra24", self._extra24)?; - v.visit_component("_extra25", self._extra25)?; - v.visit_component("_extra26", self._extra26)?; - v.visit_component("_extra27", self._extra27)?; - v.visit_component("_extra28", self._extra28)?; - v.visit_component("_extra29", self._extra29)?; - v.visit_component("_extra30", self._extra30)?; - v.visit_component("_extra31", self._extra31)?; - Ok(()) - } -} -pub struct MemoryPageOutLayout { - pub io: &'static MemoryIOLayout, - pub _0: &'static IsForwardLayout, -} -impl risc0_zkp::layout::Component for MemoryPageOutLayout { - fn ty_name(&self) -> &'static str { - "MemoryPageOutLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("io", self.io)?; - v.visit_component("_0", self._0)?; - Ok(()) - } -} -pub type MemoryPageOutLayout8LayoutArray = [&'static MemoryPageOutLayout; 8]; -pub struct ControlStoreRootLayout { - pub _1: &'static MemoryPageOutLayout8LayoutArray, -} -impl risc0_zkp::layout::Component for ControlStoreRootLayout { - fn ty_name(&self) -> &'static str { - "ControlStoreRootLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_1", self._1)?; - Ok(()) - } -} -pub struct Control0_SuperArm5Layout { - pub _super: &'static ControlStoreRootLayout, - pub _extra0: &'static ArgU16Layout, - pub _extra1: &'static ArgU16Layout, - pub _extra2: &'static ArgU16Layout, - pub _extra3: &'static ArgU16Layout, - pub _extra4: &'static ArgU16Layout, - pub _extra5: &'static ArgU16Layout, - pub _extra6: &'static ArgU16Layout, - pub _extra7: &'static ArgU16Layout, - pub _extra8: &'static ArgU16Layout, - pub _extra9: &'static ArgU16Layout, - pub _extra10: &'static ArgU16Layout, - pub _extra11: &'static ArgU16Layout, - pub _extra12: &'static ArgU16Layout, - pub _extra13: &'static ArgU16Layout, - pub _extra14: &'static ArgU16Layout, - pub _extra15: &'static ArgU16Layout, - pub _extra16: &'static ArgU8Layout, - pub _extra17: &'static ArgU8Layout, - pub _extra18: &'static ArgU8Layout, - pub _extra19: &'static ArgU8Layout, - pub _extra20: &'static ArgU8Layout, - pub _extra21: &'static ArgU8Layout, - pub _extra22: &'static ArgU8Layout, - pub _extra23: &'static ArgU8Layout, - pub _extra24: &'static ArgU8Layout, - pub _extra25: &'static ArgU8Layout, - pub _extra26: &'static ArgU8Layout, - pub _extra27: &'static ArgU8Layout, - pub _extra28: &'static ArgU8Layout, - pub _extra29: &'static ArgU8Layout, - pub _extra30: &'static ArgU8Layout, - pub _extra31: &'static ArgU8Layout, -} -impl risc0_zkp::layout::Component for Control0_SuperArm5Layout { - fn ty_name(&self) -> &'static str { - "Control0_SuperArm5Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_super", self._super)?; - v.visit_component("_extra0", self._extra0)?; - v.visit_component("_extra1", self._extra1)?; - v.visit_component("_extra2", self._extra2)?; - v.visit_component("_extra3", self._extra3)?; - v.visit_component("_extra4", self._extra4)?; - v.visit_component("_extra5", self._extra5)?; - v.visit_component("_extra6", self._extra6)?; - v.visit_component("_extra7", self._extra7)?; - v.visit_component("_extra8", self._extra8)?; - v.visit_component("_extra9", self._extra9)?; - v.visit_component("_extra10", self._extra10)?; - v.visit_component("_extra11", self._extra11)?; - v.visit_component("_extra12", self._extra12)?; - v.visit_component("_extra13", self._extra13)?; - v.visit_component("_extra14", self._extra14)?; - v.visit_component("_extra15", self._extra15)?; - v.visit_component("_extra16", self._extra16)?; - v.visit_component("_extra17", self._extra17)?; - v.visit_component("_extra18", self._extra18)?; - v.visit_component("_extra19", self._extra19)?; - v.visit_component("_extra20", self._extra20)?; - v.visit_component("_extra21", self._extra21)?; - v.visit_component("_extra22", self._extra22)?; - v.visit_component("_extra23", self._extra23)?; - v.visit_component("_extra24", self._extra24)?; - v.visit_component("_extra25", self._extra25)?; - v.visit_component("_extra26", self._extra26)?; - v.visit_component("_extra27", self._extra27)?; - v.visit_component("_extra28", self._extra28)?; - v.visit_component("_extra29", self._extra29)?; - v.visit_component("_extra30", self._extra30)?; - v.visit_component("_extra31", self._extra31)?; - Ok(()) - } -} -pub struct ControlTable_SuperArm0_Super__0_SuperLayout { - pub arg: &'static ArgU16Layout, -} -impl risc0_zkp::layout::Component for ControlTable_SuperArm0_Super__0_SuperLayout { - fn ty_name(&self) -> &'static str { - "ControlTable_SuperArm0_Super__0_SuperLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("arg", self.arg)?; - Ok(()) - } -} -pub type ControlTable_SuperArm0_Super__0_SuperLayout16LayoutArray = - [&'static ControlTable_SuperArm0_Super__0_SuperLayout; 16]; -pub struct ControlTable_SuperArm0_SuperLayout { - pub _1: &'static ControlTable_SuperArm0_Super__0_SuperLayout16LayoutArray, - pub done: &'static IsZeroLayout, -} -impl risc0_zkp::layout::Component for ControlTable_SuperArm0_SuperLayout { - fn ty_name(&self) -> &'static str { - "ControlTable_SuperArm0_SuperLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_1", self._1)?; - v.visit_component("done", self.done)?; - Ok(()) - } -} -pub struct ControlTable_SuperArm0Layout { - pub _super: &'static ControlTable_SuperArm0_SuperLayout, - pub _extra0: &'static ArgU8Layout, - pub _extra1: &'static ArgU8Layout, - pub _extra2: &'static ArgU8Layout, - pub _extra3: &'static ArgU8Layout, - pub _extra4: &'static ArgU8Layout, - pub _extra5: &'static ArgU8Layout, - pub _extra6: &'static ArgU8Layout, - pub _extra7: &'static ArgU8Layout, - pub _extra8: &'static ArgU8Layout, - pub _extra9: &'static ArgU8Layout, - pub _extra10: &'static ArgU8Layout, - pub _extra11: &'static ArgU8Layout, - pub _extra12: &'static ArgU8Layout, - pub _extra13: &'static ArgU8Layout, - pub _extra14: &'static ArgU8Layout, - pub _extra15: &'static ArgU8Layout, -} -impl risc0_zkp::layout::Component for ControlTable_SuperArm0Layout { - fn ty_name(&self) -> &'static str { - "ControlTable_SuperArm0Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_super", self._super)?; - v.visit_component("_extra0", self._extra0)?; - v.visit_component("_extra1", self._extra1)?; - v.visit_component("_extra2", self._extra2)?; - v.visit_component("_extra3", self._extra3)?; - v.visit_component("_extra4", self._extra4)?; - v.visit_component("_extra5", self._extra5)?; - v.visit_component("_extra6", self._extra6)?; - v.visit_component("_extra7", self._extra7)?; - v.visit_component("_extra8", self._extra8)?; - v.visit_component("_extra9", self._extra9)?; - v.visit_component("_extra10", self._extra10)?; - v.visit_component("_extra11", self._extra11)?; - v.visit_component("_extra12", self._extra12)?; - v.visit_component("_extra13", self._extra13)?; - v.visit_component("_extra14", self._extra14)?; - v.visit_component("_extra15", self._extra15)?; - Ok(()) - } -} -pub struct ControlTable_SuperArm1_Super__0_SuperLayout { - pub arg: &'static ArgU8Layout, -} -impl risc0_zkp::layout::Component for ControlTable_SuperArm1_Super__0_SuperLayout { - fn ty_name(&self) -> &'static str { - "ControlTable_SuperArm1_Super__0_SuperLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("arg", self.arg)?; - Ok(()) - } -} -pub type ControlTable_SuperArm1_Super__0_SuperLayout16LayoutArray = - [&'static ControlTable_SuperArm1_Super__0_SuperLayout; 16]; -pub struct ControlTable_SuperArm1_SuperLayout { - pub _1: &'static ControlTable_SuperArm1_Super__0_SuperLayout16LayoutArray, - pub done: &'static IsZeroLayout, -} -impl risc0_zkp::layout::Component for ControlTable_SuperArm1_SuperLayout { - fn ty_name(&self) -> &'static str { - "ControlTable_SuperArm1_SuperLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_1", self._1)?; - v.visit_component("done", self.done)?; - Ok(()) - } -} -pub struct ControlTable_SuperArm1Layout { - pub _super: &'static ControlTable_SuperArm1_SuperLayout, - pub _extra0: &'static ArgU16Layout, - pub _extra1: &'static ArgU16Layout, - pub _extra2: &'static ArgU16Layout, - pub _extra3: &'static ArgU16Layout, - pub _extra4: &'static ArgU16Layout, - pub _extra5: &'static ArgU16Layout, - pub _extra6: &'static ArgU16Layout, - pub _extra7: &'static ArgU16Layout, - pub _extra8: &'static ArgU16Layout, - pub _extra9: &'static ArgU16Layout, - pub _extra10: &'static ArgU16Layout, - pub _extra11: &'static ArgU16Layout, - pub _extra12: &'static ArgU16Layout, - pub _extra13: &'static ArgU16Layout, - pub _extra14: &'static ArgU16Layout, - pub _extra15: &'static ArgU16Layout, -} -impl risc0_zkp::layout::Component for ControlTable_SuperArm1Layout { - fn ty_name(&self) -> &'static str { - "ControlTable_SuperArm1Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_super", self._super)?; - v.visit_component("_extra0", self._extra0)?; - v.visit_component("_extra1", self._extra1)?; - v.visit_component("_extra2", self._extra2)?; - v.visit_component("_extra3", self._extra3)?; - v.visit_component("_extra4", self._extra4)?; - v.visit_component("_extra5", self._extra5)?; - v.visit_component("_extra6", self._extra6)?; - v.visit_component("_extra7", self._extra7)?; - v.visit_component("_extra8", self._extra8)?; - v.visit_component("_extra9", self._extra9)?; - v.visit_component("_extra10", self._extra10)?; - v.visit_component("_extra11", self._extra11)?; - v.visit_component("_extra12", self._extra12)?; - v.visit_component("_extra13", self._extra13)?; - v.visit_component("_extra14", self._extra14)?; - v.visit_component("_extra15", self._extra15)?; - Ok(()) - } -} -pub struct ControlTable_SuperLayout { - pub arm0: &'static ControlTable_SuperArm0Layout, - pub arm1: &'static ControlTable_SuperArm1Layout, -} -impl risc0_zkp::layout::Component for ControlTable_SuperLayout { - fn ty_name(&self) -> &'static str { - "ControlTable_SuperLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("arm0", self.arm0)?; - v.visit_component("arm1", self.arm1)?; - Ok(()) - } -} -pub type ArgU16Layout16LayoutArray = [&'static ArgU16Layout; 16]; -pub type ArgU8Layout16LayoutArray = [&'static ArgU8Layout; 16]; -pub struct _Arguments_ControlTable_SuperLayout { - pub arg_u16: &'static ArgU16Layout16LayoutArray, - pub arg_u8: &'static ArgU8Layout16LayoutArray, -} -impl risc0_zkp::layout::Component for _Arguments_ControlTable_SuperLayout { - fn ty_name(&self) -> &'static str { - "_Arguments_ControlTable_SuperLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("arg_u16", self.arg_u16)?; - v.visit_component("arg_u8", self.arg_u8)?; - Ok(()) - } -} -pub struct ControlTableLayout { - pub _super: &'static ControlTable_SuperLayout, - pub entry: &'static NondetRegLayout, - pub mode: &'static NondetRegLayout, - pub _arguments_control_table__super: &'static _Arguments_ControlTable_SuperLayout, -} -impl risc0_zkp::layout::Component for ControlTableLayout { - fn ty_name(&self) -> &'static str { - "ControlTableLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_super", self._super)?; - v.visit_component("entry", self.entry)?; - v.visit_component("mode", self.mode)?; - v.visit_component( - "_arguments_control_table__super", - self._arguments_control_table__super, - )?; - Ok(()) - } -} -pub struct Control0_SuperArm6Layout { - pub _super: &'static ControlTableLayout, - pub _extra0: &'static MemoryArgLayout, - pub _extra1: &'static MemoryArgLayout, - pub _extra2: &'static MemoryArgLayout, - pub _extra3: &'static MemoryArgLayout, - pub _extra4: &'static MemoryArgLayout, - pub _extra5: &'static MemoryArgLayout, - pub _extra6: &'static MemoryArgLayout, - pub _extra7: &'static MemoryArgLayout, - pub _extra8: &'static MemoryArgLayout, - pub _extra9: &'static MemoryArgLayout, - pub _extra10: &'static MemoryArgLayout, - pub _extra11: &'static MemoryArgLayout, - pub _extra12: &'static MemoryArgLayout, - pub _extra13: &'static MemoryArgLayout, - pub _extra14: &'static MemoryArgLayout, - pub _extra15: &'static MemoryArgLayout, - pub _extra16: &'static CycleArgLayout, - pub _extra17: &'static CycleArgLayout, - pub _extra18: &'static CycleArgLayout, - pub _extra19: &'static CycleArgLayout, - pub _extra20: &'static CycleArgLayout, - pub _extra21: &'static CycleArgLayout, - pub _extra22: &'static CycleArgLayout, - pub _extra23: &'static CycleArgLayout, -} -impl risc0_zkp::layout::Component for Control0_SuperArm6Layout { - fn ty_name(&self) -> &'static str { - "Control0_SuperArm6Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_super", self._super)?; - v.visit_component("_extra0", self._extra0)?; - v.visit_component("_extra1", self._extra1)?; - v.visit_component("_extra2", self._extra2)?; - v.visit_component("_extra3", self._extra3)?; - v.visit_component("_extra4", self._extra4)?; - v.visit_component("_extra5", self._extra5)?; - v.visit_component("_extra6", self._extra6)?; - v.visit_component("_extra7", self._extra7)?; - v.visit_component("_extra8", self._extra8)?; - v.visit_component("_extra9", self._extra9)?; - v.visit_component("_extra10", self._extra10)?; - v.visit_component("_extra11", self._extra11)?; - v.visit_component("_extra12", self._extra12)?; - v.visit_component("_extra13", self._extra13)?; - v.visit_component("_extra14", self._extra14)?; - v.visit_component("_extra15", self._extra15)?; - v.visit_component("_extra16", self._extra16)?; - v.visit_component("_extra17", self._extra17)?; - v.visit_component("_extra18", self._extra18)?; - v.visit_component("_extra19", self._extra19)?; - v.visit_component("_extra20", self._extra20)?; - v.visit_component("_extra21", self._extra21)?; - v.visit_component("_extra22", self._extra22)?; - v.visit_component("_extra23", self._extra23)?; - Ok(()) - } -} -pub struct Control0_SuperArm7Layout { - pub _extra0: &'static MemoryArgLayout, - pub _extra1: &'static MemoryArgLayout, - pub _extra2: &'static MemoryArgLayout, - pub _extra3: &'static MemoryArgLayout, - pub _extra4: &'static MemoryArgLayout, - pub _extra5: &'static MemoryArgLayout, - pub _extra6: &'static MemoryArgLayout, - pub _extra7: &'static MemoryArgLayout, - pub _extra8: &'static MemoryArgLayout, - pub _extra9: &'static MemoryArgLayout, - pub _extra10: &'static MemoryArgLayout, - pub _extra11: &'static MemoryArgLayout, - pub _extra12: &'static MemoryArgLayout, - pub _extra13: &'static MemoryArgLayout, - pub _extra14: &'static MemoryArgLayout, - pub _extra15: &'static MemoryArgLayout, - pub _extra16: &'static CycleArgLayout, - pub _extra17: &'static CycleArgLayout, - pub _extra18: &'static CycleArgLayout, - pub _extra19: &'static CycleArgLayout, - pub _extra20: &'static CycleArgLayout, - pub _extra21: &'static CycleArgLayout, - pub _extra22: &'static CycleArgLayout, - pub _extra23: &'static CycleArgLayout, - pub _extra24: &'static ArgU16Layout, - pub _extra25: &'static ArgU16Layout, - pub _extra26: &'static ArgU16Layout, - pub _extra27: &'static ArgU16Layout, - pub _extra28: &'static ArgU16Layout, - pub _extra29: &'static ArgU16Layout, - pub _extra30: &'static ArgU16Layout, - pub _extra31: &'static ArgU16Layout, - pub _extra32: &'static ArgU16Layout, - pub _extra33: &'static ArgU16Layout, - pub _extra34: &'static ArgU16Layout, - pub _extra35: &'static ArgU16Layout, - pub _extra36: &'static ArgU16Layout, - pub _extra37: &'static ArgU16Layout, - pub _extra38: &'static ArgU16Layout, - pub _extra39: &'static ArgU16Layout, - pub _extra40: &'static ArgU8Layout, - pub _extra41: &'static ArgU8Layout, - pub _extra42: &'static ArgU8Layout, - pub _extra43: &'static ArgU8Layout, - pub _extra44: &'static ArgU8Layout, - pub _extra45: &'static ArgU8Layout, - pub _extra46: &'static ArgU8Layout, - pub _extra47: &'static ArgU8Layout, - pub _extra48: &'static ArgU8Layout, - pub _extra49: &'static ArgU8Layout, - pub _extra50: &'static ArgU8Layout, - pub _extra51: &'static ArgU8Layout, - pub _extra52: &'static ArgU8Layout, - pub _extra53: &'static ArgU8Layout, - pub _extra54: &'static ArgU8Layout, - pub _extra55: &'static ArgU8Layout, -} -impl risc0_zkp::layout::Component for Control0_SuperArm7Layout { - fn ty_name(&self) -> &'static str { - "Control0_SuperArm7Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_extra0", self._extra0)?; - v.visit_component("_extra1", self._extra1)?; - v.visit_component("_extra2", self._extra2)?; - v.visit_component("_extra3", self._extra3)?; - v.visit_component("_extra4", self._extra4)?; - v.visit_component("_extra5", self._extra5)?; - v.visit_component("_extra6", self._extra6)?; - v.visit_component("_extra7", self._extra7)?; - v.visit_component("_extra8", self._extra8)?; - v.visit_component("_extra9", self._extra9)?; - v.visit_component("_extra10", self._extra10)?; - v.visit_component("_extra11", self._extra11)?; - v.visit_component("_extra12", self._extra12)?; - v.visit_component("_extra13", self._extra13)?; - v.visit_component("_extra14", self._extra14)?; - v.visit_component("_extra15", self._extra15)?; - v.visit_component("_extra16", self._extra16)?; - v.visit_component("_extra17", self._extra17)?; - v.visit_component("_extra18", self._extra18)?; - v.visit_component("_extra19", self._extra19)?; - v.visit_component("_extra20", self._extra20)?; - v.visit_component("_extra21", self._extra21)?; - v.visit_component("_extra22", self._extra22)?; - v.visit_component("_extra23", self._extra23)?; - v.visit_component("_extra24", self._extra24)?; - v.visit_component("_extra25", self._extra25)?; - v.visit_component("_extra26", self._extra26)?; - v.visit_component("_extra27", self._extra27)?; - v.visit_component("_extra28", self._extra28)?; - v.visit_component("_extra29", self._extra29)?; - v.visit_component("_extra30", self._extra30)?; - v.visit_component("_extra31", self._extra31)?; - v.visit_component("_extra32", self._extra32)?; - v.visit_component("_extra33", self._extra33)?; - v.visit_component("_extra34", self._extra34)?; - v.visit_component("_extra35", self._extra35)?; - v.visit_component("_extra36", self._extra36)?; - v.visit_component("_extra37", self._extra37)?; - v.visit_component("_extra38", self._extra38)?; - v.visit_component("_extra39", self._extra39)?; - v.visit_component("_extra40", self._extra40)?; - v.visit_component("_extra41", self._extra41)?; - v.visit_component("_extra42", self._extra42)?; - v.visit_component("_extra43", self._extra43)?; - v.visit_component("_extra44", self._extra44)?; - v.visit_component("_extra45", self._extra45)?; - v.visit_component("_extra46", self._extra46)?; - v.visit_component("_extra47", self._extra47)?; - v.visit_component("_extra48", self._extra48)?; - v.visit_component("_extra49", self._extra49)?; - v.visit_component("_extra50", self._extra50)?; - v.visit_component("_extra51", self._extra51)?; - v.visit_component("_extra52", self._extra52)?; - v.visit_component("_extra53", self._extra53)?; - v.visit_component("_extra54", self._extra54)?; - v.visit_component("_extra55", self._extra55)?; - Ok(()) - } -} -pub struct Control0_SuperLayout { - pub arm0: &'static Control0_SuperArm0Layout, - pub arm1: &'static Control0_SuperArm1Layout, - pub arm2: &'static Control0_SuperArm2Layout, - pub arm3: &'static Control0_SuperArm3Layout, - pub arm4: &'static Control0_SuperArm4Layout, - pub arm5: &'static Control0_SuperArm5Layout, - pub arm6: &'static Control0_SuperArm6Layout, - pub arm7: &'static Control0_SuperArm7Layout, -} -impl risc0_zkp::layout::Component for Control0_SuperLayout { - fn ty_name(&self) -> &'static str { - "Control0_SuperLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("arm0", self.arm0)?; - v.visit_component("arm1", self.arm1)?; - v.visit_component("arm2", self.arm2)?; - v.visit_component("arm3", self.arm3)?; - v.visit_component("arm4", self.arm4)?; - v.visit_component("arm5", self.arm5)?; - v.visit_component("arm6", self.arm6)?; - v.visit_component("arm7", self.arm7)?; - Ok(()) - } -} -pub struct _Arguments_Control0_SuperLayout { - pub memory_arg: &'static MemoryArgLayout16LayoutArray, - pub cycle_arg: &'static CycleArgLayout8LayoutArray, - pub arg_u16: &'static ArgU16Layout16LayoutArray, - pub arg_u8: &'static ArgU8Layout16LayoutArray, -} -impl risc0_zkp::layout::Component for _Arguments_Control0_SuperLayout { - fn ty_name(&self) -> &'static str { - "_Arguments_Control0_SuperLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("memory_arg", self.memory_arg)?; - v.visit_component("cycle_arg", self.cycle_arg)?; - v.visit_component("arg_u16", self.arg_u16)?; - v.visit_component("arg_u8", self.arg_u8)?; - Ok(()) - } -} -pub struct Control0Layout { - pub _super: &'static Control0_SuperLayout, - pub arg: &'static CycleArgLayout, - pub _arguments_control0__super: &'static _Arguments_Control0_SuperLayout, -} -impl risc0_zkp::layout::Component for Control0Layout { - fn ty_name(&self) -> &'static str { - "Control0Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_super", self._super)?; - v.visit_component("arg", self.arg)?; - v.visit_component( - "_arguments_control0__super", - self._arguments_control0__super, - )?; - Ok(()) - } -} -pub type MemoryArgLayout8LayoutArray = [&'static MemoryArgLayout; 8]; -pub type CycleArgLayout4LayoutArray = [&'static CycleArgLayout; 4]; -pub type ArgU16Layout2LayoutArray = [&'static ArgU16Layout; 2]; -pub struct _Arguments_ECall0OutputLayout { - pub memory_arg: &'static MemoryArgLayout8LayoutArray, - pub cycle_arg: &'static CycleArgLayout4LayoutArray, - pub arg_u16: &'static ArgU16Layout2LayoutArray, -} -impl risc0_zkp::layout::Component for _Arguments_ECall0OutputLayout { - fn ty_name(&self) -> &'static str { - "_Arguments_ECall0OutputLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("memory_arg", self.memory_arg)?; - v.visit_component("cycle_arg", self.cycle_arg)?; - v.visit_component("arg_u16", self.arg_u16)?; - Ok(()) - } -} -pub type NondetRegLayout4LayoutArray = [&'static NondetRegLayout; 4]; -pub struct OneHot_4_Layout { - pub _super: &'static NondetRegLayout4LayoutArray, -} -impl risc0_zkp::layout::Component for OneHot_4_Layout { - fn ty_name(&self) -> &'static str { - "OneHot_4_Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_super", self._super)?; - Ok(()) - } -} -pub struct MachineECallLayout { - pub load_inst: &'static MemoryReadLayout, - pub dispatch_idx: &'static MemoryReadLayout, - pub dispatch: &'static OneHot_4_Layout, -} -impl risc0_zkp::layout::Component for MachineECallLayout { - fn ty_name(&self) -> &'static str { - "MachineECallLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("load_inst", self.load_inst)?; - v.visit_component("dispatch_idx", self.dispatch_idx)?; - v.visit_component("dispatch", self.dispatch)?; - Ok(()) - } -} -pub struct ECall0OutputArm0Layout { - pub _super: &'static MachineECallLayout, - pub _extra0: &'static MemoryArgLayout, - pub _extra1: &'static MemoryArgLayout, - pub _extra2: &'static MemoryArgLayout, - pub _extra3: &'static MemoryArgLayout, - pub _extra4: &'static CycleArgLayout, - pub _extra5: &'static CycleArgLayout, - pub _extra6: &'static ArgU16Layout, - pub _extra7: &'static ArgU16Layout, -} -impl risc0_zkp::layout::Component for ECall0OutputArm0Layout { - fn ty_name(&self) -> &'static str { - "ECall0OutputArm0Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_super", self._super)?; - v.visit_component("_extra0", self._extra0)?; - v.visit_component("_extra1", self._extra1)?; - v.visit_component("_extra2", self._extra2)?; - v.visit_component("_extra3", self._extra3)?; - v.visit_component("_extra4", self._extra4)?; - v.visit_component("_extra5", self._extra5)?; - v.visit_component("_extra6", self._extra6)?; - v.visit_component("_extra7", self._extra7)?; - Ok(()) - } -} -pub struct ECallTerminateLayout { - pub a0: &'static MemoryReadLayout, - pub a1: &'static MemoryReadLayout, -} -impl risc0_zkp::layout::Component for ECallTerminateLayout { - fn ty_name(&self) -> &'static str { - "ECallTerminateLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("a0", self.a0)?; - v.visit_component("a1", self.a1)?; - Ok(()) - } -} -pub struct ECall0OutputArm1Layout { - pub _super: &'static ECallTerminateLayout, - pub _extra0: &'static MemoryArgLayout, - pub _extra1: &'static MemoryArgLayout, - pub _extra2: &'static MemoryArgLayout, - pub _extra3: &'static MemoryArgLayout, - pub _extra4: &'static CycleArgLayout, - pub _extra5: &'static CycleArgLayout, - pub _extra6: &'static ArgU16Layout, - pub _extra7: &'static ArgU16Layout, -} -impl risc0_zkp::layout::Component for ECall0OutputArm1Layout { - fn ty_name(&self) -> &'static str { - "ECall0OutputArm1Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_super", self._super)?; - v.visit_component("_extra0", self._extra0)?; - v.visit_component("_extra1", self._extra1)?; - v.visit_component("_extra2", self._extra2)?; - v.visit_component("_extra3", self._extra3)?; - v.visit_component("_extra4", self._extra4)?; - v.visit_component("_extra5", self._extra5)?; - v.visit_component("_extra6", self._extra6)?; - v.visit_component("_extra7", self._extra7)?; - Ok(()) - } -} -pub struct DecomposeLow2Layout { - pub high: &'static NondetRegLayout, - pub low2: &'static NondetRegLayout, - pub low2_hot: &'static OneHot_4_Layout, - pub high_zero: &'static IsZeroLayout, - pub is_zero: &'static NondetRegLayout, -} -impl risc0_zkp::layout::Component for DecomposeLow2Layout { - fn ty_name(&self) -> &'static str { - "DecomposeLow2Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("high", self.high)?; - v.visit_component("low2", self.low2)?; - v.visit_component("low2_hot", self.low2_hot)?; - v.visit_component("high_zero", self.high_zero)?; - v.visit_component("is_zero", self.is_zero)?; - Ok(()) - } -} -pub struct ECallHostReadSetupLayout { - pub fd: &'static MemoryReadLayout, - pub ptr: &'static MemoryReadLayout, - pub len: &'static MemoryReadLayout, - pub new_len: &'static NondetU16RegLayout, - pub diff: &'static U16RegLayout, - pub _0: &'static MemoryWriteLayout, - pub ptr_decomp: &'static DecomposeLow2Layout, - pub len_decomp: &'static DecomposeLow2Layout, - pub len123: &'static NondetRegLayout, - pub uneven: &'static NondetRegLayout, -} -impl risc0_zkp::layout::Component for ECallHostReadSetupLayout { - fn ty_name(&self) -> &'static str { - "ECallHostReadSetupLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("fd", self.fd)?; - v.visit_component("ptr", self.ptr)?; - v.visit_component("len", self.len)?; - v.visit_component("new_len", self.new_len)?; - v.visit_component("diff", self.diff)?; - v.visit_component("_0", self._0)?; - v.visit_component("ptr_decomp", self.ptr_decomp)?; - v.visit_component("len_decomp", self.len_decomp)?; - v.visit_component("len123", self.len123)?; - v.visit_component("uneven", self.uneven)?; - Ok(()) - } -} -pub struct ECallHostWriteLayout { - pub fd: &'static MemoryReadLayout, - pub ptr: &'static MemoryReadLayout, - pub len: &'static MemoryReadLayout, - pub new_len: &'static NondetU16RegLayout, - pub diff: &'static U16RegLayout, - pub _0: &'static MemoryWriteLayout, -} -impl risc0_zkp::layout::Component for ECallHostWriteLayout { - fn ty_name(&self) -> &'static str { - "ECallHostWriteLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("fd", self.fd)?; - v.visit_component("ptr", self.ptr)?; - v.visit_component("len", self.len)?; - v.visit_component("new_len", self.new_len)?; - v.visit_component("diff", self.diff)?; - v.visit_component("_0", self._0)?; - Ok(()) - } -} -pub struct ECall0OutputArm4Layout { - pub _extra0: &'static MemoryArgLayout, - pub _extra1: &'static MemoryArgLayout, - pub _extra2: &'static MemoryArgLayout, - pub _extra3: &'static MemoryArgLayout, - pub _extra4: &'static MemoryArgLayout, - pub _extra5: &'static MemoryArgLayout, - pub _extra6: &'static MemoryArgLayout, - pub _extra7: &'static MemoryArgLayout, - pub _extra8: &'static CycleArgLayout, - pub _extra9: &'static CycleArgLayout, - pub _extra10: &'static CycleArgLayout, - pub _extra11: &'static CycleArgLayout, - pub _extra12: &'static ArgU16Layout, - pub _extra13: &'static ArgU16Layout, -} -impl risc0_zkp::layout::Component for ECall0OutputArm4Layout { - fn ty_name(&self) -> &'static str { - "ECall0OutputArm4Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_extra0", self._extra0)?; - v.visit_component("_extra1", self._extra1)?; - v.visit_component("_extra2", self._extra2)?; - v.visit_component("_extra3", self._extra3)?; - v.visit_component("_extra4", self._extra4)?; - v.visit_component("_extra5", self._extra5)?; - v.visit_component("_extra6", self._extra6)?; - v.visit_component("_extra7", self._extra7)?; - v.visit_component("_extra8", self._extra8)?; - v.visit_component("_extra9", self._extra9)?; - v.visit_component("_extra10", self._extra10)?; - v.visit_component("_extra11", self._extra11)?; - v.visit_component("_extra12", self._extra12)?; - v.visit_component("_extra13", self._extra13)?; - Ok(()) - } -} -pub struct MemoryWriteUnconstrainedLayout { - pub io: &'static MemoryIOLayout, - pub _0: &'static IsForwardLayout, -} -impl risc0_zkp::layout::Component for MemoryWriteUnconstrainedLayout { - fn ty_name(&self) -> &'static str { - "MemoryWriteUnconstrainedLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("io", self.io)?; - v.visit_component("_0", self._0)?; - Ok(()) - } -} -pub struct ECallHostReadWords__0_SuperLayout { - pub addr: &'static NondetRegLayout, - pub _0: &'static MemoryWriteUnconstrainedLayout, -} -impl risc0_zkp::layout::Component for ECallHostReadWords__0_SuperLayout { - fn ty_name(&self) -> &'static str { - "ECallHostReadWords__0_SuperLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("addr", self.addr)?; - v.visit_component("_0", self._0)?; - Ok(()) - } -} -pub type ECallHostReadWords__0_SuperLayout4LayoutArray = - [&'static ECallHostReadWords__0_SuperLayout; 4]; -pub struct ECallHostReadWordsLayout { - pub len_decomp: &'static DecomposeLow2Layout, - pub words_decomp: &'static DecomposeLow2Layout, - pub _1: &'static ECallHostReadWords__0_SuperLayout4LayoutArray, - pub len_zero: &'static IsZeroLayout, -} -impl risc0_zkp::layout::Component for ECallHostReadWordsLayout { - fn ty_name(&self) -> &'static str { - "ECallHostReadWordsLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("len_decomp", self.len_decomp)?; - v.visit_component("words_decomp", self.words_decomp)?; - v.visit_component("_1", self._1)?; - v.visit_component("len_zero", self.len_zero)?; - Ok(()) - } -} -pub struct ECall0OutputArm5Layout { - pub _super: &'static ECallHostReadWordsLayout, - pub _extra0: &'static ArgU16Layout, - pub _extra1: &'static ArgU16Layout, -} -impl risc0_zkp::layout::Component for ECall0OutputArm5Layout { - fn ty_name(&self) -> &'static str { - "ECall0OutputArm5Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_super", self._super)?; - v.visit_component("_extra0", self._extra0)?; - v.visit_component("_extra1", self._extra1)?; - Ok(()) - } -} -pub struct ECall0OutputArm6Layout { - pub _extra0: &'static MemoryArgLayout, - pub _extra1: &'static MemoryArgLayout, - pub _extra2: &'static MemoryArgLayout, - pub _extra3: &'static MemoryArgLayout, - pub _extra4: &'static MemoryArgLayout, - pub _extra5: &'static MemoryArgLayout, - pub _extra6: &'static MemoryArgLayout, - pub _extra7: &'static MemoryArgLayout, - pub _extra8: &'static CycleArgLayout, - pub _extra9: &'static CycleArgLayout, - pub _extra10: &'static CycleArgLayout, - pub _extra11: &'static CycleArgLayout, - pub _extra12: &'static ArgU16Layout, - pub _extra13: &'static ArgU16Layout, -} -impl risc0_zkp::layout::Component for ECall0OutputArm6Layout { - fn ty_name(&self) -> &'static str { - "ECall0OutputArm6Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_extra0", self._extra0)?; - v.visit_component("_extra1", self._extra1)?; - v.visit_component("_extra2", self._extra2)?; - v.visit_component("_extra3", self._extra3)?; - v.visit_component("_extra4", self._extra4)?; - v.visit_component("_extra5", self._extra5)?; - v.visit_component("_extra6", self._extra6)?; - v.visit_component("_extra7", self._extra7)?; - v.visit_component("_extra8", self._extra8)?; - v.visit_component("_extra9", self._extra9)?; - v.visit_component("_extra10", self._extra10)?; - v.visit_component("_extra11", self._extra11)?; - v.visit_component("_extra12", self._extra12)?; - v.visit_component("_extra13", self._extra13)?; - Ok(()) - } -} -pub struct ECall0OutputArm7Layout { - pub _extra0: &'static MemoryArgLayout, - pub _extra1: &'static MemoryArgLayout, - pub _extra2: &'static MemoryArgLayout, - pub _extra3: &'static MemoryArgLayout, - pub _extra4: &'static MemoryArgLayout, - pub _extra5: &'static MemoryArgLayout, - pub _extra6: &'static MemoryArgLayout, - pub _extra7: &'static MemoryArgLayout, - pub _extra8: &'static CycleArgLayout, - pub _extra9: &'static CycleArgLayout, - pub _extra10: &'static CycleArgLayout, - pub _extra11: &'static CycleArgLayout, - pub _extra12: &'static ArgU16Layout, - pub _extra13: &'static ArgU16Layout, -} -impl risc0_zkp::layout::Component for ECall0OutputArm7Layout { - fn ty_name(&self) -> &'static str { - "ECall0OutputArm7Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_extra0", self._extra0)?; - v.visit_component("_extra1", self._extra1)?; - v.visit_component("_extra2", self._extra2)?; - v.visit_component("_extra3", self._extra3)?; - v.visit_component("_extra4", self._extra4)?; - v.visit_component("_extra5", self._extra5)?; - v.visit_component("_extra6", self._extra6)?; - v.visit_component("_extra7", self._extra7)?; - v.visit_component("_extra8", self._extra8)?; - v.visit_component("_extra9", self._extra9)?; - v.visit_component("_extra10", self._extra10)?; - v.visit_component("_extra11", self._extra11)?; - v.visit_component("_extra12", self._extra12)?; - v.visit_component("_extra13", self._extra13)?; - Ok(()) - } -} -pub struct ECall0OutputLayout { - pub arm0: &'static ECall0OutputArm0Layout, - pub arm1: &'static ECall0OutputArm1Layout, - pub arm2: &'static ECallHostReadSetupLayout, - pub arm3: &'static ECallHostWriteLayout, - pub arm4: &'static ECall0OutputArm4Layout, - pub arm5: &'static ECall0OutputArm5Layout, - pub arm6: &'static ECall0OutputArm6Layout, - pub arm7: &'static ECall0OutputArm7Layout, -} -impl risc0_zkp::layout::Component for ECall0OutputLayout { - fn ty_name(&self) -> &'static str { - "ECall0OutputLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("arm0", self.arm0)?; - v.visit_component("arm1", self.arm1)?; - v.visit_component("arm2", self.arm2)?; - v.visit_component("arm3", self.arm3)?; - v.visit_component("arm4", self.arm4)?; - v.visit_component("arm5", self.arm5)?; - v.visit_component("arm6", self.arm6)?; - v.visit_component("arm7", self.arm7)?; - Ok(()) - } -} -pub struct ECall0Layout { - pub s0: &'static NondetRegLayout, - pub s1: &'static NondetRegLayout, - pub s2: &'static NondetRegLayout, - pub pc_addr: &'static AddrDecomposeBitsLayout, - pub _arguments_e_call0_output: &'static _Arguments_ECall0OutputLayout, - pub output: &'static ECall0OutputLayout, - pub is_decode: &'static IsZeroLayout, - pub is_p2_entry: &'static IsZeroLayout, - pub add_pc: &'static NormalizeU32Layout, - pub arg: &'static CycleArgLayout, -} -impl risc0_zkp::layout::Component for ECall0Layout { - fn ty_name(&self) -> &'static str { - "ECall0Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("s0", self.s0)?; - v.visit_component("s1", self.s1)?; - v.visit_component("s2", self.s2)?; - v.visit_component("pc_addr", self.pc_addr)?; - v.visit_component("_arguments_e_call0_output", self._arguments_e_call0_output)?; - v.visit_component("output", self.output)?; - v.visit_component("is_decode", self.is_decode)?; - v.visit_component("is_p2_entry", self.is_p2_entry)?; - v.visit_component("add_pc", self.add_pc)?; - v.visit_component("arg", self.arg)?; - Ok(()) - } -} -pub type NondetRegLayout24LayoutArray = [&'static NondetRegLayout; 24]; -pub struct NondetExtRegLayout { - pub _super: &'static Reg, -} -impl risc0_zkp::layout::Component for NondetExtRegLayout { - fn ty_name(&self) -> &'static str { - "NondetExtRegLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_super", self._super)?; - Ok(()) - } -} -pub struct PoseidonStateLayout { - pub has_state: &'static NondetRegLayout, - pub state_addr: &'static NondetRegLayout, - pub buf_out_addr: &'static NondetRegLayout, - pub is_elem: &'static NondetRegLayout, - pub check_out: &'static NondetRegLayout, - pub load_tx_type: &'static NondetRegLayout, - pub next_state: &'static NondetRegLayout, - pub sub_state: &'static NondetRegLayout, - pub buf_in_addr: &'static NondetRegLayout, - pub count: &'static NondetRegLayout, - pub mode: &'static NondetRegLayout, - pub inner: &'static NondetRegLayout24LayoutArray, - pub zcheck: &'static NondetExtRegLayout, -} -impl risc0_zkp::layout::Component for PoseidonStateLayout { - fn ty_name(&self) -> &'static str { - "PoseidonStateLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("has_state", self.has_state)?; - v.visit_component("state_addr", self.state_addr)?; - v.visit_component("buf_out_addr", self.buf_out_addr)?; - v.visit_component("is_elem", self.is_elem)?; - v.visit_component("check_out", self.check_out)?; - v.visit_component("load_tx_type", self.load_tx_type)?; - v.visit_component("next_state", self.next_state)?; - v.visit_component("sub_state", self.sub_state)?; - v.visit_component("buf_in_addr", self.buf_in_addr)?; - v.visit_component("count", self.count)?; - v.visit_component("mode", self.mode)?; - v.visit_component("inner", self.inner)?; - v.visit_component("zcheck", self.zcheck)?; - Ok(()) - } -} -pub type ArgU8Layout2LayoutArray = [&'static ArgU8Layout; 2]; -pub struct _Arguments_Poseidon0StateLayout { - pub memory_arg: &'static MemoryArgLayout16LayoutArray, - pub cycle_arg: &'static CycleArgLayout8LayoutArray, - pub arg_u16: &'static ArgU16Layout16LayoutArray, - pub arg_u8: &'static ArgU8Layout2LayoutArray, -} -impl risc0_zkp::layout::Component for _Arguments_Poseidon0StateLayout { - fn ty_name(&self) -> &'static str { - "_Arguments_Poseidon0StateLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("memory_arg", self.memory_arg)?; - v.visit_component("cycle_arg", self.cycle_arg)?; - v.visit_component("arg_u16", self.arg_u16)?; - v.visit_component("arg_u8", self.arg_u8)?; - Ok(()) - } -} -pub struct PoseidonEntry_SuperArm0Layout { - pub _super: &'static PoseidonStateLayout, - pub _extra0: &'static MemoryArgLayout, - pub _extra1: &'static MemoryArgLayout, - pub _extra2: &'static MemoryArgLayout, - pub _extra3: &'static MemoryArgLayout, - pub _extra4: &'static MemoryArgLayout, - pub _extra5: &'static MemoryArgLayout, - pub _extra6: &'static MemoryArgLayout, - pub _extra7: &'static MemoryArgLayout, - pub _extra8: &'static CycleArgLayout, - pub _extra9: &'static CycleArgLayout, - pub _extra10: &'static CycleArgLayout, - pub _extra11: &'static CycleArgLayout, -} -impl risc0_zkp::layout::Component for PoseidonEntry_SuperArm0Layout { - fn ty_name(&self) -> &'static str { - "PoseidonEntry_SuperArm0Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_super", self._super)?; - v.visit_component("_extra0", self._extra0)?; - v.visit_component("_extra1", self._extra1)?; - v.visit_component("_extra2", self._extra2)?; - v.visit_component("_extra3", self._extra3)?; - v.visit_component("_extra4", self._extra4)?; - v.visit_component("_extra5", self._extra5)?; - v.visit_component("_extra6", self._extra6)?; - v.visit_component("_extra7", self._extra7)?; - v.visit_component("_extra8", self._extra8)?; - v.visit_component("_extra9", self._extra9)?; - v.visit_component("_extra10", self._extra10)?; - v.visit_component("_extra11", self._extra11)?; - Ok(()) - } -} -pub struct ReadAddrLayout { - pub addr32: &'static MemoryReadLayout, -} -impl risc0_zkp::layout::Component for ReadAddrLayout { - fn ty_name(&self) -> &'static str { - "ReadAddrLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("addr32", self.addr32)?; - Ok(()) - } -} -pub struct PoseidonEcallLayout { - pub _super: &'static PoseidonStateLayout, - pub state_addr: &'static ReadAddrLayout, - pub buf_in_addr: &'static ReadAddrLayout, - pub buf_out_addr: &'static ReadAddrLayout, - pub bits_and_count: &'static MemoryReadLayout, - pub _0: &'static IsZeroLayout, - pub is_elem: &'static NondetRegLayout, - pub check_out: &'static NondetRegLayout, - pub count_zero: &'static IsZeroLayout, -} -impl risc0_zkp::layout::Component for PoseidonEcallLayout { - fn ty_name(&self) -> &'static str { - "PoseidonEcallLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_super", self._super)?; - v.visit_component("state_addr", self.state_addr)?; - v.visit_component("buf_in_addr", self.buf_in_addr)?; - v.visit_component("buf_out_addr", self.buf_out_addr)?; - v.visit_component("bits_and_count", self.bits_and_count)?; - v.visit_component("_0", self._0)?; - v.visit_component("is_elem", self.is_elem)?; - v.visit_component("check_out", self.check_out)?; - v.visit_component("count_zero", self.count_zero)?; - Ok(()) - } -} -pub struct PoseidonEntry_SuperLayout { - pub _super: &'static PoseidonStateLayout, - pub arm0: &'static PoseidonEntry_SuperArm0Layout, - pub arm1: &'static PoseidonEcallLayout, -} -impl risc0_zkp::layout::Component for PoseidonEntry_SuperLayout { - fn ty_name(&self) -> &'static str { - "PoseidonEntry_SuperLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_super", self._super)?; - v.visit_component("arm0", self.arm0)?; - v.visit_component("arm1", self.arm1)?; - Ok(()) - } -} -pub struct _Arguments_PoseidonEntry_SuperLayout { - pub memory_arg: &'static MemoryArgLayout8LayoutArray, - pub cycle_arg: &'static CycleArgLayout4LayoutArray, -} -impl risc0_zkp::layout::Component for _Arguments_PoseidonEntry_SuperLayout { - fn ty_name(&self) -> &'static str { - "_Arguments_PoseidonEntry_SuperLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("memory_arg", self.memory_arg)?; - v.visit_component("cycle_arg", self.cycle_arg)?; - Ok(()) - } -} -pub struct PoseidonEntryLayout { - pub _super: &'static PoseidonEntry_SuperLayout, - pub pc_zero: &'static IsZeroLayout, - pub _arguments_poseidon_entry__super: &'static _Arguments_PoseidonEntry_SuperLayout, -} -impl risc0_zkp::layout::Component for PoseidonEntryLayout { - fn ty_name(&self) -> &'static str { - "PoseidonEntryLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_super", self._super)?; - v.visit_component("pc_zero", self.pc_zero)?; - v.visit_component( - "_arguments_poseidon_entry__super", - self._arguments_poseidon_entry__super, - )?; - Ok(()) - } -} -pub struct Poseidon0StateArm0Layout { - pub _super: &'static PoseidonEntryLayout, - pub _extra0: &'static MemoryArgLayout, - pub _extra1: &'static MemoryArgLayout, - pub _extra2: &'static MemoryArgLayout, - pub _extra3: &'static MemoryArgLayout, - pub _extra4: &'static MemoryArgLayout, - pub _extra5: &'static MemoryArgLayout, - pub _extra6: &'static MemoryArgLayout, - pub _extra7: &'static MemoryArgLayout, - pub _extra8: &'static CycleArgLayout, - pub _extra9: &'static CycleArgLayout, - pub _extra10: &'static CycleArgLayout, - pub _extra11: &'static CycleArgLayout, - pub _extra12: &'static ArgU16Layout, - pub _extra13: &'static ArgU16Layout, - pub _extra14: &'static ArgU16Layout, - pub _extra15: &'static ArgU16Layout, - pub _extra16: &'static ArgU16Layout, - pub _extra17: &'static ArgU16Layout, - pub _extra18: &'static ArgU16Layout, - pub _extra19: &'static ArgU16Layout, - pub _extra20: &'static ArgU16Layout, - pub _extra21: &'static ArgU16Layout, - pub _extra22: &'static ArgU16Layout, - pub _extra23: &'static ArgU16Layout, - pub _extra24: &'static ArgU16Layout, - pub _extra25: &'static ArgU16Layout, - pub _extra26: &'static ArgU16Layout, - pub _extra27: &'static ArgU16Layout, - pub _extra28: &'static ArgU8Layout, - pub _extra29: &'static ArgU8Layout, -} -impl risc0_zkp::layout::Component for Poseidon0StateArm0Layout { - fn ty_name(&self) -> &'static str { - "Poseidon0StateArm0Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_super", self._super)?; - v.visit_component("_extra0", self._extra0)?; - v.visit_component("_extra1", self._extra1)?; - v.visit_component("_extra2", self._extra2)?; - v.visit_component("_extra3", self._extra3)?; - v.visit_component("_extra4", self._extra4)?; - v.visit_component("_extra5", self._extra5)?; - v.visit_component("_extra6", self._extra6)?; - v.visit_component("_extra7", self._extra7)?; - v.visit_component("_extra8", self._extra8)?; - v.visit_component("_extra9", self._extra9)?; - v.visit_component("_extra10", self._extra10)?; - v.visit_component("_extra11", self._extra11)?; - v.visit_component("_extra12", self._extra12)?; - v.visit_component("_extra13", self._extra13)?; - v.visit_component("_extra14", self._extra14)?; - v.visit_component("_extra15", self._extra15)?; - v.visit_component("_extra16", self._extra16)?; - v.visit_component("_extra17", self._extra17)?; - v.visit_component("_extra18", self._extra18)?; - v.visit_component("_extra19", self._extra19)?; - v.visit_component("_extra20", self._extra20)?; - v.visit_component("_extra21", self._extra21)?; - v.visit_component("_extra22", self._extra22)?; - v.visit_component("_extra23", self._extra23)?; - v.visit_component("_extra24", self._extra24)?; - v.visit_component("_extra25", self._extra25)?; - v.visit_component("_extra26", self._extra26)?; - v.visit_component("_extra27", self._extra27)?; - v.visit_component("_extra28", self._extra28)?; - v.visit_component("_extra29", self._extra29)?; - Ok(()) - } -} -pub struct ReadElemLayout { - pub elem32: &'static MemoryReadLayout, -} -impl risc0_zkp::layout::Component for ReadElemLayout { - fn ty_name(&self) -> &'static str { - "ReadElemLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("elem32", self.elem32)?; - Ok(()) - } -} -pub type ReadElemLayout8LayoutArray = [&'static ReadElemLayout; 8]; -pub struct PoseidonLoadStateLayout { - pub _super: &'static PoseidonStateLayout, - pub load_list: &'static ReadElemLayout8LayoutArray, -} -impl risc0_zkp::layout::Component for PoseidonLoadStateLayout { - fn ty_name(&self) -> &'static str { - "PoseidonLoadStateLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_super", self._super)?; - v.visit_component("load_list", self.load_list)?; - Ok(()) - } -} -pub struct Poseidon0StateArm1Layout { - pub _super: &'static PoseidonLoadStateLayout, - pub _extra0: &'static ArgU16Layout, - pub _extra1: &'static ArgU16Layout, - pub _extra2: &'static ArgU16Layout, - pub _extra3: &'static ArgU16Layout, - pub _extra4: &'static ArgU16Layout, - pub _extra5: &'static ArgU16Layout, - pub _extra6: &'static ArgU16Layout, - pub _extra7: &'static ArgU16Layout, - pub _extra8: &'static ArgU16Layout, - pub _extra9: &'static ArgU16Layout, - pub _extra10: &'static ArgU16Layout, - pub _extra11: &'static ArgU16Layout, - pub _extra12: &'static ArgU16Layout, - pub _extra13: &'static ArgU16Layout, - pub _extra14: &'static ArgU16Layout, - pub _extra15: &'static ArgU16Layout, - pub _extra16: &'static ArgU8Layout, - pub _extra17: &'static ArgU8Layout, -} -impl risc0_zkp::layout::Component for Poseidon0StateArm1Layout { - fn ty_name(&self) -> &'static str { - "Poseidon0StateArm1Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_super", self._super)?; - v.visit_component("_extra0", self._extra0)?; - v.visit_component("_extra1", self._extra1)?; - v.visit_component("_extra2", self._extra2)?; - v.visit_component("_extra3", self._extra3)?; - v.visit_component("_extra4", self._extra4)?; - v.visit_component("_extra5", self._extra5)?; - v.visit_component("_extra6", self._extra6)?; - v.visit_component("_extra7", self._extra7)?; - v.visit_component("_extra8", self._extra8)?; - v.visit_component("_extra9", self._extra9)?; - v.visit_component("_extra10", self._extra10)?; - v.visit_component("_extra11", self._extra11)?; - v.visit_component("_extra12", self._extra12)?; - v.visit_component("_extra13", self._extra13)?; - v.visit_component("_extra14", self._extra14)?; - v.visit_component("_extra15", self._extra15)?; - v.visit_component("_extra16", self._extra16)?; - v.visit_component("_extra17", self._extra17)?; - Ok(()) - } -} -pub type NondetRegLayout3LayoutArray = [&'static NondetRegLayout; 3]; -pub struct OneHot_3_Layout { - pub _super: &'static NondetRegLayout3LayoutArray, -} -impl risc0_zkp::layout::Component for OneHot_3_Layout { - fn ty_name(&self) -> &'static str { - "OneHot_3_Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_super", self._super)?; - Ok(()) - } -} -pub struct MemoryGet_SuperArm1Layout { - pub _super: &'static MemoryPageInLayout, - pub _extra0: &'static CycleArgLayout, -} -impl risc0_zkp::layout::Component for MemoryGet_SuperArm1Layout { - fn ty_name(&self) -> &'static str { - "MemoryGet_SuperArm1Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_super", self._super)?; - v.visit_component("_extra0", self._extra0)?; - Ok(()) - } -} -pub struct MemoryGet_SuperLayout { - pub arm0: &'static MemoryReadLayout, - pub arm1: &'static MemoryGet_SuperArm1Layout, - pub arm2: &'static MemoryPageOutLayout, -} -impl risc0_zkp::layout::Component for MemoryGet_SuperLayout { - fn ty_name(&self) -> &'static str { - "MemoryGet_SuperLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("arm0", self.arm0)?; - v.visit_component("arm1", self.arm1)?; - v.visit_component("arm2", self.arm2)?; - Ok(()) - } -} -pub type MemoryArgLayout2LayoutArray = [&'static MemoryArgLayout; 2]; -pub type CycleArgLayout1LayoutArray = [&'static CycleArgLayout; 1]; -pub struct _Arguments_MemoryGet_SuperLayout { - pub memory_arg: &'static MemoryArgLayout2LayoutArray, - pub cycle_arg: &'static CycleArgLayout1LayoutArray, -} -impl risc0_zkp::layout::Component for _Arguments_MemoryGet_SuperLayout { - fn ty_name(&self) -> &'static str { - "_Arguments_MemoryGet_SuperLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("memory_arg", self.memory_arg)?; - v.visit_component("cycle_arg", self.cycle_arg)?; - Ok(()) - } -} -pub struct MemoryGetLayout { - pub _super: &'static MemoryGet_SuperLayout, - pub _arguments_memory_get__super: &'static _Arguments_MemoryGet_SuperLayout, -} -impl risc0_zkp::layout::Component for MemoryGetLayout { - fn ty_name(&self) -> &'static str { - "MemoryGetLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_super", self._super)?; - v.visit_component( - "_arguments_memory_get__super", - self._arguments_memory_get__super, - )?; - Ok(()) - } -} -pub type MemoryGetLayout8LayoutArray = [&'static MemoryGetLayout; 8]; -pub struct PoseidonLoadInShortLayout { - pub _super: &'static PoseidonStateLayout, - pub tx_type: &'static OneHot_3_Layout, - pub load_list: &'static MemoryGetLayout8LayoutArray, -} -impl risc0_zkp::layout::Component for PoseidonLoadInShortLayout { - fn ty_name(&self) -> &'static str { - "PoseidonLoadInShortLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_super", self._super)?; - v.visit_component("tx_type", self.tx_type)?; - v.visit_component("load_list", self.load_list)?; - Ok(()) - } -} -pub struct PoseidonLoadInLowLayout { - pub _super: &'static PoseidonStateLayout, - pub tx_type: &'static OneHot_3_Layout, - pub load_list: &'static MemoryGetLayout8LayoutArray, -} -impl risc0_zkp::layout::Component for PoseidonLoadInLowLayout { - fn ty_name(&self) -> &'static str { - "PoseidonLoadInLowLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_super", self._super)?; - v.visit_component("tx_type", self.tx_type)?; - v.visit_component("load_list", self.load_list)?; - Ok(()) - } -} -pub struct PoseidonLoadInHighLayout { - pub _super: &'static PoseidonStateLayout, - pub tx_type: &'static OneHot_3_Layout, - pub load_list: &'static MemoryGetLayout8LayoutArray, -} -impl risc0_zkp::layout::Component for PoseidonLoadInHighLayout { - fn ty_name(&self) -> &'static str { - "PoseidonLoadInHighLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_super", self._super)?; - v.visit_component("tx_type", self.tx_type)?; - v.visit_component("load_list", self.load_list)?; - Ok(()) - } -} -pub struct PoseidonLoadIn_SuperLayout { - pub _super: &'static PoseidonStateLayout, - pub arm0: &'static PoseidonLoadInShortLayout, - pub arm1: &'static PoseidonLoadInLowLayout, - pub arm2: &'static PoseidonLoadInHighLayout, -} -impl risc0_zkp::layout::Component for PoseidonLoadIn_SuperLayout { - fn ty_name(&self) -> &'static str { - "PoseidonLoadIn_SuperLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_super", self._super)?; - v.visit_component("arm0", self.arm0)?; - v.visit_component("arm1", self.arm1)?; - v.visit_component("arm2", self.arm2)?; - Ok(()) - } -} -pub struct _Arguments_PoseidonLoadIn_SuperLayout { - pub memory_arg: &'static MemoryArgLayout16LayoutArray, - pub cycle_arg: &'static CycleArgLayout8LayoutArray, -} -impl risc0_zkp::layout::Component for _Arguments_PoseidonLoadIn_SuperLayout { - fn ty_name(&self) -> &'static str { - "_Arguments_PoseidonLoadIn_SuperLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("memory_arg", self.memory_arg)?; - v.visit_component("cycle_arg", self.cycle_arg)?; - Ok(()) - } -} -pub struct PoseidonLoadInLayout { - pub _super: &'static PoseidonLoadIn_SuperLayout, - pub _0: &'static OneHot_3_Layout, - pub _arguments_poseidon_load_in__super: &'static _Arguments_PoseidonLoadIn_SuperLayout, -} -impl risc0_zkp::layout::Component for PoseidonLoadInLayout { - fn ty_name(&self) -> &'static str { - "PoseidonLoadInLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_super", self._super)?; - v.visit_component("_0", self._0)?; - v.visit_component( - "_arguments_poseidon_load_in__super", - self._arguments_poseidon_load_in__super, - )?; - Ok(()) - } -} -pub struct Poseidon0StateArm2Layout { - pub _super: &'static PoseidonLoadInLayout, - pub _extra0: &'static ArgU16Layout, - pub _extra1: &'static ArgU16Layout, - pub _extra2: &'static ArgU16Layout, - pub _extra3: &'static ArgU16Layout, - pub _extra4: &'static ArgU16Layout, - pub _extra5: &'static ArgU16Layout, - pub _extra6: &'static ArgU16Layout, - pub _extra7: &'static ArgU16Layout, - pub _extra8: &'static ArgU16Layout, - pub _extra9: &'static ArgU16Layout, - pub _extra10: &'static ArgU16Layout, - pub _extra11: &'static ArgU16Layout, - pub _extra12: &'static ArgU16Layout, - pub _extra13: &'static ArgU16Layout, - pub _extra14: &'static ArgU16Layout, - pub _extra15: &'static ArgU16Layout, - pub _extra16: &'static ArgU8Layout, - pub _extra17: &'static ArgU8Layout, -} -impl risc0_zkp::layout::Component for Poseidon0StateArm2Layout { - fn ty_name(&self) -> &'static str { - "Poseidon0StateArm2Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_super", self._super)?; - v.visit_component("_extra0", self._extra0)?; - v.visit_component("_extra1", self._extra1)?; - v.visit_component("_extra2", self._extra2)?; - v.visit_component("_extra3", self._extra3)?; - v.visit_component("_extra4", self._extra4)?; - v.visit_component("_extra5", self._extra5)?; - v.visit_component("_extra6", self._extra6)?; - v.visit_component("_extra7", self._extra7)?; - v.visit_component("_extra8", self._extra8)?; - v.visit_component("_extra9", self._extra9)?; - v.visit_component("_extra10", self._extra10)?; - v.visit_component("_extra11", self._extra11)?; - v.visit_component("_extra12", self._extra12)?; - v.visit_component("_extra13", self._extra13)?; - v.visit_component("_extra14", self._extra14)?; - v.visit_component("_extra15", self._extra15)?; - v.visit_component("_extra16", self._extra16)?; - v.visit_component("_extra17", self._extra17)?; - Ok(()) - } -} -pub struct Poseidon0StateArm3Layout { - pub _super: &'static PoseidonStateLayout, - pub _extra0: &'static MemoryArgLayout, - pub _extra1: &'static MemoryArgLayout, - pub _extra2: &'static MemoryArgLayout, - pub _extra3: &'static MemoryArgLayout, - pub _extra4: &'static MemoryArgLayout, - pub _extra5: &'static MemoryArgLayout, - pub _extra6: &'static MemoryArgLayout, - pub _extra7: &'static MemoryArgLayout, - pub _extra8: &'static MemoryArgLayout, - pub _extra9: &'static MemoryArgLayout, - pub _extra10: &'static MemoryArgLayout, - pub _extra11: &'static MemoryArgLayout, - pub _extra12: &'static MemoryArgLayout, - pub _extra13: &'static MemoryArgLayout, - pub _extra14: &'static MemoryArgLayout, - pub _extra15: &'static MemoryArgLayout, - pub _extra16: &'static CycleArgLayout, - pub _extra17: &'static CycleArgLayout, - pub _extra18: &'static CycleArgLayout, - pub _extra19: &'static CycleArgLayout, - pub _extra20: &'static CycleArgLayout, - pub _extra21: &'static CycleArgLayout, - pub _extra22: &'static CycleArgLayout, - pub _extra23: &'static CycleArgLayout, - pub _extra24: &'static ArgU16Layout, - pub _extra25: &'static ArgU16Layout, - pub _extra26: &'static ArgU16Layout, - pub _extra27: &'static ArgU16Layout, - pub _extra28: &'static ArgU16Layout, - pub _extra29: &'static ArgU16Layout, - pub _extra30: &'static ArgU16Layout, - pub _extra31: &'static ArgU16Layout, - pub _extra32: &'static ArgU16Layout, - pub _extra33: &'static ArgU16Layout, - pub _extra34: &'static ArgU16Layout, - pub _extra35: &'static ArgU16Layout, - pub _extra36: &'static ArgU16Layout, - pub _extra37: &'static ArgU16Layout, - pub _extra38: &'static ArgU16Layout, - pub _extra39: &'static ArgU16Layout, - pub _extra40: &'static ArgU8Layout, - pub _extra41: &'static ArgU8Layout, -} -impl risc0_zkp::layout::Component for Poseidon0StateArm3Layout { - fn ty_name(&self) -> &'static str { - "Poseidon0StateArm3Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_super", self._super)?; - v.visit_component("_extra0", self._extra0)?; - v.visit_component("_extra1", self._extra1)?; - v.visit_component("_extra2", self._extra2)?; - v.visit_component("_extra3", self._extra3)?; - v.visit_component("_extra4", self._extra4)?; - v.visit_component("_extra5", self._extra5)?; - v.visit_component("_extra6", self._extra6)?; - v.visit_component("_extra7", self._extra7)?; - v.visit_component("_extra8", self._extra8)?; - v.visit_component("_extra9", self._extra9)?; - v.visit_component("_extra10", self._extra10)?; - v.visit_component("_extra11", self._extra11)?; - v.visit_component("_extra12", self._extra12)?; - v.visit_component("_extra13", self._extra13)?; - v.visit_component("_extra14", self._extra14)?; - v.visit_component("_extra15", self._extra15)?; - v.visit_component("_extra16", self._extra16)?; - v.visit_component("_extra17", self._extra17)?; - v.visit_component("_extra18", self._extra18)?; - v.visit_component("_extra19", self._extra19)?; - v.visit_component("_extra20", self._extra20)?; - v.visit_component("_extra21", self._extra21)?; - v.visit_component("_extra22", self._extra22)?; - v.visit_component("_extra23", self._extra23)?; - v.visit_component("_extra24", self._extra24)?; - v.visit_component("_extra25", self._extra25)?; - v.visit_component("_extra26", self._extra26)?; - v.visit_component("_extra27", self._extra27)?; - v.visit_component("_extra28", self._extra28)?; - v.visit_component("_extra29", self._extra29)?; - v.visit_component("_extra30", self._extra30)?; - v.visit_component("_extra31", self._extra31)?; - v.visit_component("_extra32", self._extra32)?; - v.visit_component("_extra33", self._extra33)?; - v.visit_component("_extra34", self._extra34)?; - v.visit_component("_extra35", self._extra35)?; - v.visit_component("_extra36", self._extra36)?; - v.visit_component("_extra37", self._extra37)?; - v.visit_component("_extra38", self._extra38)?; - v.visit_component("_extra39", self._extra39)?; - v.visit_component("_extra40", self._extra40)?; - v.visit_component("_extra41", self._extra41)?; - Ok(()) - } -} -pub struct Poseidon0StateArm4Layout { - pub _super: &'static PoseidonStateLayout, - pub _extra0: &'static MemoryArgLayout, - pub _extra1: &'static MemoryArgLayout, - pub _extra2: &'static MemoryArgLayout, - pub _extra3: &'static MemoryArgLayout, - pub _extra4: &'static MemoryArgLayout, - pub _extra5: &'static MemoryArgLayout, - pub _extra6: &'static MemoryArgLayout, - pub _extra7: &'static MemoryArgLayout, - pub _extra8: &'static MemoryArgLayout, - pub _extra9: &'static MemoryArgLayout, - pub _extra10: &'static MemoryArgLayout, - pub _extra11: &'static MemoryArgLayout, - pub _extra12: &'static MemoryArgLayout, - pub _extra13: &'static MemoryArgLayout, - pub _extra14: &'static MemoryArgLayout, - pub _extra15: &'static MemoryArgLayout, - pub _extra16: &'static CycleArgLayout, - pub _extra17: &'static CycleArgLayout, - pub _extra18: &'static CycleArgLayout, - pub _extra19: &'static CycleArgLayout, - pub _extra20: &'static CycleArgLayout, - pub _extra21: &'static CycleArgLayout, - pub _extra22: &'static CycleArgLayout, - pub _extra23: &'static CycleArgLayout, - pub _extra24: &'static ArgU16Layout, - pub _extra25: &'static ArgU16Layout, - pub _extra26: &'static ArgU16Layout, - pub _extra27: &'static ArgU16Layout, - pub _extra28: &'static ArgU16Layout, - pub _extra29: &'static ArgU16Layout, - pub _extra30: &'static ArgU16Layout, - pub _extra31: &'static ArgU16Layout, - pub _extra32: &'static ArgU16Layout, - pub _extra33: &'static ArgU16Layout, - pub _extra34: &'static ArgU16Layout, - pub _extra35: &'static ArgU16Layout, - pub _extra36: &'static ArgU16Layout, - pub _extra37: &'static ArgU16Layout, - pub _extra38: &'static ArgU16Layout, - pub _extra39: &'static ArgU16Layout, - pub _extra40: &'static ArgU8Layout, - pub _extra41: &'static ArgU8Layout, -} -impl risc0_zkp::layout::Component for Poseidon0StateArm4Layout { - fn ty_name(&self) -> &'static str { - "Poseidon0StateArm4Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_super", self._super)?; - v.visit_component("_extra0", self._extra0)?; - v.visit_component("_extra1", self._extra1)?; - v.visit_component("_extra2", self._extra2)?; - v.visit_component("_extra3", self._extra3)?; - v.visit_component("_extra4", self._extra4)?; - v.visit_component("_extra5", self._extra5)?; - v.visit_component("_extra6", self._extra6)?; - v.visit_component("_extra7", self._extra7)?; - v.visit_component("_extra8", self._extra8)?; - v.visit_component("_extra9", self._extra9)?; - v.visit_component("_extra10", self._extra10)?; - v.visit_component("_extra11", self._extra11)?; - v.visit_component("_extra12", self._extra12)?; - v.visit_component("_extra13", self._extra13)?; - v.visit_component("_extra14", self._extra14)?; - v.visit_component("_extra15", self._extra15)?; - v.visit_component("_extra16", self._extra16)?; - v.visit_component("_extra17", self._extra17)?; - v.visit_component("_extra18", self._extra18)?; - v.visit_component("_extra19", self._extra19)?; - v.visit_component("_extra20", self._extra20)?; - v.visit_component("_extra21", self._extra21)?; - v.visit_component("_extra22", self._extra22)?; - v.visit_component("_extra23", self._extra23)?; - v.visit_component("_extra24", self._extra24)?; - v.visit_component("_extra25", self._extra25)?; - v.visit_component("_extra26", self._extra26)?; - v.visit_component("_extra27", self._extra27)?; - v.visit_component("_extra28", self._extra28)?; - v.visit_component("_extra29", self._extra29)?; - v.visit_component("_extra30", self._extra30)?; - v.visit_component("_extra31", self._extra31)?; - v.visit_component("_extra32", self._extra32)?; - v.visit_component("_extra33", self._extra33)?; - v.visit_component("_extra34", self._extra34)?; - v.visit_component("_extra35", self._extra35)?; - v.visit_component("_extra36", self._extra36)?; - v.visit_component("_extra37", self._extra37)?; - v.visit_component("_extra38", self._extra38)?; - v.visit_component("_extra39", self._extra39)?; - v.visit_component("_extra40", self._extra40)?; - v.visit_component("_extra41", self._extra41)?; - Ok(()) - } -} -pub struct PoseidonCheckOut__0_SuperLayout { - pub goal: &'static ReadElemLayout, -} -impl risc0_zkp::layout::Component for PoseidonCheckOut__0_SuperLayout { - fn ty_name(&self) -> &'static str { - "PoseidonCheckOut__0_SuperLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("goal", self.goal)?; - Ok(()) - } -} -pub type PoseidonCheckOut__0_SuperLayout8LayoutArray = - [&'static PoseidonCheckOut__0_SuperLayout; 8]; -pub struct PoseidonCheckOutLayout { - pub _super: &'static PoseidonStateLayout, - pub _1: &'static PoseidonCheckOut__0_SuperLayout8LayoutArray, - pub is_normal: &'static IsZeroLayout, - pub ext_inv: &'static NondetExtRegLayout, -} -impl risc0_zkp::layout::Component for PoseidonCheckOutLayout { - fn ty_name(&self) -> &'static str { - "PoseidonCheckOutLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_super", self._super)?; - v.visit_component("_1", self._1)?; - v.visit_component("is_normal", self.is_normal)?; - v.visit_component("ext_inv", self.ext_inv)?; - Ok(()) - } -} -pub struct PoseidonDoOut_SuperArm0Layout { - pub _super: &'static PoseidonCheckOutLayout, - pub _extra0: &'static ArgU16Layout, - pub _extra1: &'static ArgU16Layout, - pub _extra2: &'static ArgU16Layout, - pub _extra3: &'static ArgU16Layout, - pub _extra4: &'static ArgU16Layout, - pub _extra5: &'static ArgU16Layout, - pub _extra6: &'static ArgU16Layout, - pub _extra7: &'static ArgU16Layout, - pub _extra8: &'static ArgU16Layout, - pub _extra9: &'static ArgU16Layout, - pub _extra10: &'static ArgU16Layout, - pub _extra11: &'static ArgU16Layout, - pub _extra12: &'static ArgU16Layout, - pub _extra13: &'static ArgU16Layout, - pub _extra14: &'static ArgU16Layout, - pub _extra15: &'static ArgU16Layout, -} -impl risc0_zkp::layout::Component for PoseidonDoOut_SuperArm0Layout { - fn ty_name(&self) -> &'static str { - "PoseidonDoOut_SuperArm0Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_super", self._super)?; - v.visit_component("_extra0", self._extra0)?; - v.visit_component("_extra1", self._extra1)?; - v.visit_component("_extra2", self._extra2)?; - v.visit_component("_extra3", self._extra3)?; - v.visit_component("_extra4", self._extra4)?; - v.visit_component("_extra5", self._extra5)?; - v.visit_component("_extra6", self._extra6)?; - v.visit_component("_extra7", self._extra7)?; - v.visit_component("_extra8", self._extra8)?; - v.visit_component("_extra9", self._extra9)?; - v.visit_component("_extra10", self._extra10)?; - v.visit_component("_extra11", self._extra11)?; - v.visit_component("_extra12", self._extra12)?; - v.visit_component("_extra13", self._extra13)?; - v.visit_component("_extra14", self._extra14)?; - v.visit_component("_extra15", self._extra15)?; - Ok(()) - } -} -pub struct PoseidonStoreOut__0_SuperLayout { - pub low: &'static NondetU16RegLayout, - pub high: &'static U16RegLayout, - pub _0: &'static MemoryWriteLayout, -} -impl risc0_zkp::layout::Component for PoseidonStoreOut__0_SuperLayout { - fn ty_name(&self) -> &'static str { - "PoseidonStoreOut__0_SuperLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("low", self.low)?; - v.visit_component("high", self.high)?; - v.visit_component("_0", self._0)?; - Ok(()) - } -} -pub type PoseidonStoreOut__0_SuperLayout8LayoutArray = - [&'static PoseidonStoreOut__0_SuperLayout; 8]; -pub struct PoseidonStoreOutLayout { - pub _super: &'static PoseidonStateLayout, - pub _1: &'static PoseidonStoreOut__0_SuperLayout8LayoutArray, - pub is_normal: &'static IsZeroLayout, - pub ext_inv: &'static NondetExtRegLayout, -} -impl risc0_zkp::layout::Component for PoseidonStoreOutLayout { - fn ty_name(&self) -> &'static str { - "PoseidonStoreOutLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_super", self._super)?; - v.visit_component("_1", self._1)?; - v.visit_component("is_normal", self.is_normal)?; - v.visit_component("ext_inv", self.ext_inv)?; - Ok(()) - } -} -pub struct PoseidonDoOut_SuperLayout { - pub _super: &'static PoseidonStateLayout, - pub arm0: &'static PoseidonDoOut_SuperArm0Layout, - pub arm1: &'static PoseidonStoreOutLayout, -} -impl risc0_zkp::layout::Component for PoseidonDoOut_SuperLayout { - fn ty_name(&self) -> &'static str { - "PoseidonDoOut_SuperLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_super", self._super)?; - v.visit_component("arm0", self.arm0)?; - v.visit_component("arm1", self.arm1)?; - Ok(()) - } -} -pub struct _Arguments_PoseidonDoOut_SuperLayout { - pub memory_arg: &'static MemoryArgLayout16LayoutArray, - pub cycle_arg: &'static CycleArgLayout8LayoutArray, - pub arg_u16: &'static ArgU16Layout16LayoutArray, -} -impl risc0_zkp::layout::Component for _Arguments_PoseidonDoOut_SuperLayout { - fn ty_name(&self) -> &'static str { - "_Arguments_PoseidonDoOut_SuperLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("memory_arg", self.memory_arg)?; - v.visit_component("cycle_arg", self.cycle_arg)?; - v.visit_component("arg_u16", self.arg_u16)?; - Ok(()) - } -} -pub struct PoseidonDoOutLayout { - pub _super: &'static PoseidonDoOut_SuperLayout, - pub _arguments_poseidon_do_out__super: &'static _Arguments_PoseidonDoOut_SuperLayout, -} -impl risc0_zkp::layout::Component for PoseidonDoOutLayout { - fn ty_name(&self) -> &'static str { - "PoseidonDoOutLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_super", self._super)?; - v.visit_component( - "_arguments_poseidon_do_out__super", - self._arguments_poseidon_do_out__super, - )?; - Ok(()) - } -} -pub struct Poseidon0StateArm5Layout { - pub _super: &'static PoseidonDoOutLayout, - pub _extra0: &'static ArgU8Layout, - pub _extra1: &'static ArgU8Layout, -} -impl risc0_zkp::layout::Component for Poseidon0StateArm5Layout { - fn ty_name(&self) -> &'static str { - "Poseidon0StateArm5Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_super", self._super)?; - v.visit_component("_extra0", self._extra0)?; - v.visit_component("_extra1", self._extra1)?; - Ok(()) - } -} -pub struct PoseidonPaging_SuperLayout { - pub _super: &'static PoseidonStateLayout, - pub arm0: &'static PoseidonStateLayout, - pub arm1: &'static PoseidonStateLayout, - pub arm2: &'static PoseidonStateLayout, - pub arm3: &'static PoseidonStateLayout, - pub arm4: &'static PoseidonStateLayout, - pub arm5: &'static PoseidonStateLayout, -} -impl risc0_zkp::layout::Component for PoseidonPaging_SuperLayout { - fn ty_name(&self) -> &'static str { - "PoseidonPaging_SuperLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_super", self._super)?; - v.visit_component("arm0", self.arm0)?; - v.visit_component("arm1", self.arm1)?; - v.visit_component("arm2", self.arm2)?; - v.visit_component("arm3", self.arm3)?; - v.visit_component("arm4", self.arm4)?; - v.visit_component("arm5", self.arm5)?; - Ok(()) - } -} -pub type NondetRegLayout6LayoutArray = [&'static NondetRegLayout; 6]; -pub struct OneHot_6_Layout { - pub _super: &'static NondetRegLayout6LayoutArray, -} -impl risc0_zkp::layout::Component for OneHot_6_Layout { - fn ty_name(&self) -> &'static str { - "OneHot_6_Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_super", self._super)?; - Ok(()) - } -} -pub struct U8RegLayout { - pub ret: &'static NondetU8RegLayout, -} -impl risc0_zkp::layout::Component for U8RegLayout { - fn ty_name(&self) -> &'static str { - "U8RegLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("ret", self.ret)?; - Ok(()) - } -} -pub struct IsU24Layout { - pub low16: &'static NondetU16RegLayout, - pub _0: &'static U8RegLayout, -} -impl risc0_zkp::layout::Component for IsU24Layout { - fn ty_name(&self) -> &'static str { - "IsU24Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("low16", self.low16)?; - v.visit_component("_0", self._0)?; - Ok(()) - } -} -pub type ArgU16Layout1LayoutArray = [&'static ArgU16Layout; 1]; -pub type ArgU8Layout1LayoutArray = [&'static ArgU8Layout; 1]; -pub struct _Arguments_PoseidonPaging__1Layout { - pub arg_u16: &'static ArgU16Layout1LayoutArray, - pub arg_u8: &'static ArgU8Layout1LayoutArray, -} -impl risc0_zkp::layout::Component for _Arguments_PoseidonPaging__1Layout { - fn ty_name(&self) -> &'static str { - "_Arguments_PoseidonPaging__1Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("arg_u16", self.arg_u16)?; - v.visit_component("arg_u8", self.arg_u8)?; - Ok(()) - } -} -pub struct PoseidonPaging__1Arm0_SuperLayout { - pub _0: &'static IsU24Layout, -} -impl risc0_zkp::layout::Component for PoseidonPaging__1Arm0_SuperLayout { - fn ty_name(&self) -> &'static str { - "PoseidonPaging__1Arm0_SuperLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_0", self._0)?; - Ok(()) - } -} -pub struct PoseidonPaging__1Arm1_SuperLayout { - pub _0: &'static IsU24Layout, -} -impl risc0_zkp::layout::Component for PoseidonPaging__1Arm1_SuperLayout { - fn ty_name(&self) -> &'static str { - "PoseidonPaging__1Arm1_SuperLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_0", self._0)?; - Ok(()) - } -} -pub struct PoseidonPaging__1Layout { - pub arm0: &'static PoseidonPaging__1Arm0_SuperLayout, - pub arm1: &'static PoseidonPaging__1Arm1_SuperLayout, -} -impl risc0_zkp::layout::Component for PoseidonPaging__1Layout { - fn ty_name(&self) -> &'static str { - "PoseidonPaging__1Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("arm0", self.arm0)?; - v.visit_component("arm1", self.arm1)?; - Ok(()) - } -} -pub struct PoseidonPagingLayout { - pub _super: &'static PoseidonPaging_SuperLayout, - pub cur_idx: &'static NondetRegLayout, - pub cur_mode: &'static NondetRegLayout, - pub mode_split: &'static OneHot_6_Layout, - pub _0: &'static IsU24Layout, - pub _arguments_poseidon_paging__1: &'static _Arguments_PoseidonPaging__1Layout, - pub _3: &'static PoseidonPaging__1Layout, - pub _4: &'static NondetRegLayout, -} -impl risc0_zkp::layout::Component for PoseidonPagingLayout { - fn ty_name(&self) -> &'static str { - "PoseidonPagingLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_super", self._super)?; - v.visit_component("cur_idx", self.cur_idx)?; - v.visit_component("cur_mode", self.cur_mode)?; - v.visit_component("mode_split", self.mode_split)?; - v.visit_component("_0", self._0)?; - v.visit_component( - "_arguments_poseidon_paging__1", - self._arguments_poseidon_paging__1, - )?; - v.visit_component("_3", self._3)?; - v.visit_component("_4", self._4)?; - Ok(()) - } -} -pub struct Poseidon0StateArm6Layout { - pub _super: &'static PoseidonPagingLayout, - pub _extra0: &'static MemoryArgLayout, - pub _extra1: &'static MemoryArgLayout, - pub _extra2: &'static MemoryArgLayout, - pub _extra3: &'static MemoryArgLayout, - pub _extra4: &'static MemoryArgLayout, - pub _extra5: &'static MemoryArgLayout, - pub _extra6: &'static MemoryArgLayout, - pub _extra7: &'static MemoryArgLayout, - pub _extra8: &'static MemoryArgLayout, - pub _extra9: &'static MemoryArgLayout, - pub _extra10: &'static MemoryArgLayout, - pub _extra11: &'static MemoryArgLayout, - pub _extra12: &'static MemoryArgLayout, - pub _extra13: &'static MemoryArgLayout, - pub _extra14: &'static MemoryArgLayout, - pub _extra15: &'static MemoryArgLayout, - pub _extra16: &'static CycleArgLayout, - pub _extra17: &'static CycleArgLayout, - pub _extra18: &'static CycleArgLayout, - pub _extra19: &'static CycleArgLayout, - pub _extra20: &'static CycleArgLayout, - pub _extra21: &'static CycleArgLayout, - pub _extra22: &'static CycleArgLayout, - pub _extra23: &'static CycleArgLayout, - pub _extra24: &'static ArgU16Layout, - pub _extra25: &'static ArgU16Layout, - pub _extra26: &'static ArgU16Layout, - pub _extra27: &'static ArgU16Layout, - pub _extra28: &'static ArgU16Layout, - pub _extra29: &'static ArgU16Layout, - pub _extra30: &'static ArgU16Layout, - pub _extra31: &'static ArgU16Layout, - pub _extra32: &'static ArgU16Layout, - pub _extra33: &'static ArgU16Layout, - pub _extra34: &'static ArgU16Layout, - pub _extra35: &'static ArgU16Layout, - pub _extra36: &'static ArgU16Layout, - pub _extra37: &'static ArgU16Layout, -} -impl risc0_zkp::layout::Component for Poseidon0StateArm6Layout { - fn ty_name(&self) -> &'static str { - "Poseidon0StateArm6Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_super", self._super)?; - v.visit_component("_extra0", self._extra0)?; - v.visit_component("_extra1", self._extra1)?; - v.visit_component("_extra2", self._extra2)?; - v.visit_component("_extra3", self._extra3)?; - v.visit_component("_extra4", self._extra4)?; - v.visit_component("_extra5", self._extra5)?; - v.visit_component("_extra6", self._extra6)?; - v.visit_component("_extra7", self._extra7)?; - v.visit_component("_extra8", self._extra8)?; - v.visit_component("_extra9", self._extra9)?; - v.visit_component("_extra10", self._extra10)?; - v.visit_component("_extra11", self._extra11)?; - v.visit_component("_extra12", self._extra12)?; - v.visit_component("_extra13", self._extra13)?; - v.visit_component("_extra14", self._extra14)?; - v.visit_component("_extra15", self._extra15)?; - v.visit_component("_extra16", self._extra16)?; - v.visit_component("_extra17", self._extra17)?; - v.visit_component("_extra18", self._extra18)?; - v.visit_component("_extra19", self._extra19)?; - v.visit_component("_extra20", self._extra20)?; - v.visit_component("_extra21", self._extra21)?; - v.visit_component("_extra22", self._extra22)?; - v.visit_component("_extra23", self._extra23)?; - v.visit_component("_extra24", self._extra24)?; - v.visit_component("_extra25", self._extra25)?; - v.visit_component("_extra26", self._extra26)?; - v.visit_component("_extra27", self._extra27)?; - v.visit_component("_extra28", self._extra28)?; - v.visit_component("_extra29", self._extra29)?; - v.visit_component("_extra30", self._extra30)?; - v.visit_component("_extra31", self._extra31)?; - v.visit_component("_extra32", self._extra32)?; - v.visit_component("_extra33", self._extra33)?; - v.visit_component("_extra34", self._extra34)?; - v.visit_component("_extra35", self._extra35)?; - v.visit_component("_extra36", self._extra36)?; - v.visit_component("_extra37", self._extra37)?; - Ok(()) - } -} -pub struct PoseidonStoreState__0_SuperLayout { - pub low: &'static NondetU16RegLayout, - pub high: &'static U16RegLayout, - pub _0: &'static MemoryWriteLayout, -} -impl risc0_zkp::layout::Component for PoseidonStoreState__0_SuperLayout { - fn ty_name(&self) -> &'static str { - "PoseidonStoreState__0_SuperLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("low", self.low)?; - v.visit_component("high", self.high)?; - v.visit_component("_0", self._0)?; - Ok(()) - } -} -pub type PoseidonStoreState__0_SuperLayout8LayoutArray = - [&'static PoseidonStoreState__0_SuperLayout; 8]; -pub struct PoseidonStoreStateLayout { - pub _super: &'static PoseidonStateLayout, - pub _1: &'static PoseidonStoreState__0_SuperLayout8LayoutArray, -} -impl risc0_zkp::layout::Component for PoseidonStoreStateLayout { - fn ty_name(&self) -> &'static str { - "PoseidonStoreStateLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_super", self._super)?; - v.visit_component("_1", self._1)?; - Ok(()) - } -} -pub struct Poseidon0StateArm7Layout { - pub _super: &'static PoseidonStoreStateLayout, - pub _extra0: &'static ArgU8Layout, - pub _extra1: &'static ArgU8Layout, -} -impl risc0_zkp::layout::Component for Poseidon0StateArm7Layout { - fn ty_name(&self) -> &'static str { - "Poseidon0StateArm7Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_super", self._super)?; - v.visit_component("_extra0", self._extra0)?; - v.visit_component("_extra1", self._extra1)?; - Ok(()) - } -} -pub struct Poseidon0StateLayout { - pub _super: &'static PoseidonStateLayout, - pub arm0: &'static Poseidon0StateArm0Layout, - pub arm1: &'static Poseidon0StateArm1Layout, - pub arm2: &'static Poseidon0StateArm2Layout, - pub arm3: &'static Poseidon0StateArm3Layout, - pub arm4: &'static Poseidon0StateArm4Layout, - pub arm5: &'static Poseidon0StateArm5Layout, - pub arm6: &'static Poseidon0StateArm6Layout, - pub arm7: &'static Poseidon0StateArm7Layout, -} -impl risc0_zkp::layout::Component for Poseidon0StateLayout { - fn ty_name(&self) -> &'static str { - "Poseidon0StateLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_super", self._super)?; - v.visit_component("arm0", self.arm0)?; - v.visit_component("arm1", self.arm1)?; - v.visit_component("arm2", self.arm2)?; - v.visit_component("arm3", self.arm3)?; - v.visit_component("arm4", self.arm4)?; - v.visit_component("arm5", self.arm5)?; - v.visit_component("arm6", self.arm6)?; - v.visit_component("arm7", self.arm7)?; - Ok(()) - } -} -pub struct Poseidon0Layout { - pub state: &'static PoseidonStateLayout, - pub _arguments_poseidon0_state: &'static _Arguments_Poseidon0StateLayout, - pub state_redef: &'static Poseidon0StateLayout, - pub arg: &'static CycleArgLayout, -} -impl risc0_zkp::layout::Component for Poseidon0Layout { - fn ty_name(&self) -> &'static str { - "Poseidon0Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("state", self.state)?; - v.visit_component( - "_arguments_poseidon0_state", - self._arguments_poseidon0_state, - )?; - v.visit_component("state_redef", self.state_redef)?; - v.visit_component("arg", self.arg)?; - Ok(()) - } -} -pub struct SBoxLayout { - pub _super: &'static NondetRegLayout, - pub cubed: &'static NondetRegLayout, -} -impl risc0_zkp::layout::Component for SBoxLayout { - fn ty_name(&self) -> &'static str { - "SBoxLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_super", self._super)?; - v.visit_component("cubed", self.cubed)?; - Ok(()) - } -} -pub type SBoxLayout24LayoutArray = [&'static SBoxLayout; 24]; -pub struct DoExtRoundLayout { - pub _1: &'static SBoxLayout24LayoutArray, -} -impl risc0_zkp::layout::Component for DoExtRoundLayout { - fn ty_name(&self) -> &'static str { - "DoExtRoundLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_1", self._1)?; - Ok(()) - } -} -pub struct DoExtRoundByIdxLayout { - pub _super: &'static DoExtRoundLayout, - pub idx_hot: &'static OneHot_8_Layout, -} -impl risc0_zkp::layout::Component for DoExtRoundByIdxLayout { - fn ty_name(&self) -> &'static str { - "DoExtRoundByIdxLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_super", self._super)?; - v.visit_component("idx_hot", self.idx_hot)?; - Ok(()) - } -} -pub struct PoseidonExtRoundLayout { - pub _super: &'static PoseidonStateLayout, - pub is_round3: &'static IsZeroLayout, - pub is_round7: &'static IsZeroLayout, - pub last_block: &'static IsZeroLayout, - pub next_inner: &'static DoExtRoundByIdxLayout, -} -impl risc0_zkp::layout::Component for PoseidonExtRoundLayout { - fn ty_name(&self) -> &'static str { - "PoseidonExtRoundLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_super", self._super)?; - v.visit_component("is_round3", self.is_round3)?; - v.visit_component("is_round7", self.is_round7)?; - v.visit_component("last_block", self.last_block)?; - v.visit_component("next_inner", self.next_inner)?; - Ok(()) - } -} -pub struct DoIntRoundLayout { - pub sbox: &'static SBoxLayout, -} -impl risc0_zkp::layout::Component for DoIntRoundLayout { - fn ty_name(&self) -> &'static str { - "DoIntRoundLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("sbox", self.sbox)?; - Ok(()) - } -} -pub type DoIntRoundLayout21LayoutArray = [&'static DoIntRoundLayout; 21]; -pub struct DoIntRoundsLayout { - pub _super: &'static DoIntRoundLayout21LayoutArray, -} -impl risc0_zkp::layout::Component for DoIntRoundsLayout { - fn ty_name(&self) -> &'static str { - "DoIntRoundsLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_super", self._super)?; - Ok(()) - } -} -pub struct PoseidonIntRoundsLayout { - pub _super: &'static PoseidonStateLayout, - pub next_inner: &'static DoIntRoundsLayout, -} -impl risc0_zkp::layout::Component for PoseidonIntRoundsLayout { - fn ty_name(&self) -> &'static str { - "PoseidonIntRoundsLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_super", self._super)?; - v.visit_component("next_inner", self.next_inner)?; - Ok(()) - } -} -pub struct Poseidon1StateLayout { - pub _super: &'static PoseidonStateLayout, - pub arm0: &'static PoseidonExtRoundLayout, - pub arm1: &'static PoseidonIntRoundsLayout, - pub arm2: &'static PoseidonStateLayout, - pub arm3: &'static PoseidonStateLayout, - pub arm4: &'static PoseidonStateLayout, - pub arm5: &'static PoseidonStateLayout, - pub arm6: &'static PoseidonStateLayout, - pub arm7: &'static PoseidonStateLayout, -} -impl risc0_zkp::layout::Component for Poseidon1StateLayout { - fn ty_name(&self) -> &'static str { - "Poseidon1StateLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_super", self._super)?; - v.visit_component("arm0", self.arm0)?; - v.visit_component("arm1", self.arm1)?; - v.visit_component("arm2", self.arm2)?; - v.visit_component("arm3", self.arm3)?; - v.visit_component("arm4", self.arm4)?; - v.visit_component("arm5", self.arm5)?; - v.visit_component("arm6", self.arm6)?; - v.visit_component("arm7", self.arm7)?; - Ok(()) - } -} -pub struct Poseidon1Layout { - pub state: &'static PoseidonStateLayout, - pub state_redef: &'static Poseidon1StateLayout, - pub arg: &'static CycleArgLayout, -} -impl risc0_zkp::layout::Component for Poseidon1Layout { - fn ty_name(&self) -> &'static str { - "Poseidon1Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("state", self.state)?; - v.visit_component("state_redef", self.state_redef)?; - v.visit_component("arg", self.arg)?; - Ok(()) - } -} -pub struct TopInstResultLayout { - pub _selector: &'static NondetRegLayout11LayoutArray, - pub arm0: &'static Misc0Layout, - pub arm1: &'static Misc1Layout, - pub arm2: &'static Misc2Layout, - pub arm3: &'static Mul0Layout, - pub arm4: &'static Div0Layout, - pub arm5: &'static Mem0Layout, - pub arm6: &'static Mem1Layout, - pub arm7: &'static Control0Layout, - pub arm8: &'static ECall0Layout, - pub arm9: &'static Poseidon0Layout, - pub arm10: &'static Poseidon1Layout, -} -impl risc0_zkp::layout::Component for TopInstResultLayout { - fn ty_name(&self) -> &'static str { - "TopInstResultLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_selector", self._selector)?; - v.visit_component("arm0", self.arm0)?; - v.visit_component("arm1", self.arm1)?; - v.visit_component("arm2", self.arm2)?; - v.visit_component("arm3", self.arm3)?; - v.visit_component("arm4", self.arm4)?; - v.visit_component("arm5", self.arm5)?; - v.visit_component("arm6", self.arm6)?; - v.visit_component("arm7", self.arm7)?; - v.visit_component("arm8", self.arm8)?; - v.visit_component("arm9", self.arm9)?; - v.visit_component("arm10", self.arm10)?; - Ok(()) - } -} -pub struct TopLayout { - pub next_pc_low: &'static NondetRegLayout, - pub next_pc_high: &'static NondetRegLayout, - pub next_state_0: &'static NondetRegLayout, - pub next_machine_mode: &'static NondetRegLayout, - pub is_first_cycle: &'static NondetRegLayout, - pub cycle_nd: &'static NondetRegLayout, - pub cycle: &'static NondetRegLayout, - pub major: &'static NondetRegLayout, - pub minor: &'static NondetRegLayout, - pub inst_input: &'static InstInputLayout, - pub major_onehot: &'static OneHot_11_Layout, - pub inst_result: &'static TopInstResultLayout, -} -impl risc0_zkp::layout::Component for TopLayout { - fn ty_name(&self) -> &'static str { - "TopLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("next_pc_low", self.next_pc_low)?; - v.visit_component("next_pc_high", self.next_pc_high)?; - v.visit_component("next_state_0", self.next_state_0)?; - v.visit_component("next_machine_mode", self.next_machine_mode)?; - v.visit_component("is_first_cycle", self.is_first_cycle)?; - v.visit_component("cycle_nd", self.cycle_nd)?; - v.visit_component("cycle", self.cycle)?; - v.visit_component("major", self.major)?; - v.visit_component("minor", self.minor)?; - v.visit_component("inst_input", self.inst_input)?; - v.visit_component("major_onehot", self.major_onehot)?; - v.visit_component("inst_result", self.inst_result)?; - Ok(()) - } -} -pub struct DigestRegValues_SuperLayout { - pub low: &'static NondetRegLayout, - pub high: &'static NondetRegLayout, -} -impl risc0_zkp::layout::Component for DigestRegValues_SuperLayout { - fn ty_name(&self) -> &'static str { - "DigestRegValues_SuperLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("low", self.low)?; - v.visit_component("high", self.high)?; - Ok(()) - } -} -pub type DigestRegValues_SuperLayout8LayoutArray = [&'static DigestRegValues_SuperLayout; 8]; -pub struct DigestRegLayout { - pub values: &'static DigestRegValues_SuperLayout8LayoutArray, -} -impl risc0_zkp::layout::Component for DigestRegLayout { - fn ty_name(&self) -> &'static str { - "DigestRegLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("values", self.values)?; - Ok(()) - } -} -pub struct Arg_ArgU8Layout { - pub val: &'static Reg, -} -impl risc0_zkp::layout::Component for Arg_ArgU8Layout { - fn ty_name(&self) -> &'static str { - "Arg_ArgU8Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("val", self.val)?; - Ok(()) - } -} -pub struct Arg_ArgU16Layout { - pub val: &'static Reg, -} -impl risc0_zkp::layout::Component for Arg_ArgU16Layout { - fn ty_name(&self) -> &'static str { - "Arg_ArgU16Layout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("val", self.val)?; - Ok(()) - } -} -pub struct Arg_MemoryArgLayout { - pub addr: &'static Reg, - pub cycle: &'static Reg, - pub data_low: &'static Reg, - pub data_high: &'static Reg, -} -impl risc0_zkp::layout::Component for Arg_MemoryArgLayout { - fn ty_name(&self) -> &'static str { - "Arg_MemoryArgLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("addr", self.addr)?; - v.visit_component("cycle", self.cycle)?; - v.visit_component("data_low", self.data_low)?; - v.visit_component("data_high", self.data_high)?; - Ok(()) - } -} -pub struct Arg_CycleArgLayout { - pub cycle: &'static Reg, -} -impl risc0_zkp::layout::Component for Arg_CycleArgLayout { - fn ty_name(&self) -> &'static str { - "Arg_CycleArgLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("cycle", self.cycle)?; - Ok(()) - } -} -pub struct _accumLayout { - pub arg_u8: &'static Arg_ArgU8Layout, - pub arg_u16: &'static Arg_ArgU16Layout, - pub memory_arg: &'static Arg_MemoryArgLayout, - pub cycle_arg: &'static Arg_CycleArgLayout, - pub _offset: &'static Reg, -} -impl risc0_zkp::layout::Component for _accumLayout { - fn ty_name(&self) -> &'static str { - "_accumLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("arg_u8", self.arg_u8)?; - v.visit_component("arg_u16", self.arg_u16)?; - v.visit_component("memory_arg", self.memory_arg)?; - v.visit_component("cycle_arg", self.cycle_arg)?; - v.visit_component("_offset", self._offset)?; - Ok(()) - } -} -pub type Reg19LayoutArray = [&'static Reg; 19]; -pub struct LayoutAccumLayout { - pub columns: &'static Reg19LayoutArray, -} -impl risc0_zkp::layout::Component for LayoutAccumLayout { - fn ty_name(&self) -> &'static str { - "LayoutAccumLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("columns", self.columns)?; - Ok(()) - } -} -pub struct TestSuccRunLayout { - pub _0: &'static TopLayout, -} -impl risc0_zkp::layout::Component for TestSuccRunLayout { - fn ty_name(&self) -> &'static str { - "TestSuccRunLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("_0", self._0)?; - Ok(()) - } -} -pub struct _globalLayout { - pub input: &'static DigestRegLayout, - pub is_terminate: &'static NondetRegLayout, - pub output: &'static DigestRegLayout, - pub rng: &'static NondetExtRegLayout, - pub state_in: &'static DigestRegLayout, - pub state_out: &'static DigestRegLayout, - pub term_a0high: &'static NondetRegLayout, - pub term_a0low: &'static NondetRegLayout, - pub term_a1high: &'static NondetRegLayout, - pub term_a1low: &'static NondetRegLayout, -} -impl risc0_zkp::layout::Component for _globalLayout { - fn ty_name(&self) -> &'static str { - "_globalLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("input", self.input)?; - v.visit_component("is_terminate", self.is_terminate)?; - v.visit_component("output", self.output)?; - v.visit_component("rng", self.rng)?; - v.visit_component("state_in", self.state_in)?; - v.visit_component("state_out", self.state_out)?; - v.visit_component("term_a0high", self.term_a0high)?; - v.visit_component("term_a0low", self.term_a0low)?; - v.visit_component("term_a1high", self.term_a1high)?; - v.visit_component("term_a1low", self.term_a1low)?; - Ok(()) - } -} -pub struct _mixLayout { - pub randomness: &'static _accumLayout, -} -impl risc0_zkp::layout::Component for _mixLayout { - fn ty_name(&self) -> &'static str { - "_mixLayout" - } - #[allow(unused_variables)] - fn walk(&self, v: &mut V) -> core::fmt::Result { - v.visit_component("randomness", self.randomness)?; - Ok(()) - } -} -#[derive(Copy, Clone, Debug)] -pub struct NondetRegStruct { - pub _super: Val, -} -#[derive(Copy, Clone, Debug)] -pub struct NondetExtRegStruct { - pub _super: ExtVal, -} -#[derive(Copy, Clone, Debug)] -pub struct RegStruct { - pub _super: NondetRegStruct, -} -#[derive(Copy, Clone, Debug)] -pub struct BitRegStruct {} -#[derive(Copy, Clone, Debug)] -pub struct NondetFakeTwitRegStruct { - pub _super: Val, -} -#[derive(Copy, Clone, Debug)] -pub struct FakeTwitRegStruct {} -#[derive(Copy, Clone, Debug)] -pub struct ArgU8Struct { - pub count: NondetRegStruct, - pub val: NondetRegStruct, -} -#[derive(Copy, Clone, Debug)] -pub struct U8RegStruct {} -#[derive(Copy, Clone, Debug)] -pub struct ArgU16Struct { - pub count: NondetRegStruct, - pub val: NondetRegStruct, -} -#[derive(Copy, Clone, Debug)] -pub struct U16RegStruct { - pub _super: Val, -} -pub type Val5Array = [Val; 5]; -pub type Val16Array = [Val; 16]; -pub type NondetRegStruct5Array = [NondetRegStruct; 5]; -#[derive(Copy, Clone, Debug)] -pub struct ToBits_5_Struct { - pub _super: NondetRegStruct5Array, -} -#[derive(Copy, Clone, Debug)] -pub struct ValU32Struct { - pub low: Val, - pub high: Val, -} -#[derive(Copy, Clone, Debug)] -pub struct DenormedValU32Struct { - pub low: Val, - pub high: Val, -} -#[derive(Copy, Clone, Debug)] -pub struct NormalizeU32Struct { - pub _super: ValU32Struct, - pub carry: NondetRegStruct, -} -#[derive(Copy, Clone, Debug)] -pub struct AddrDecomposeStruct { - pub _super: Val, - pub low2: NondetRegStruct, -} -#[derive(Copy, Clone, Debug)] -pub struct AddrDecomposeBitsStruct { - pub _super: Val, - pub low0: NondetRegStruct, - pub low1: NondetRegStruct, - pub low2: Val, - pub addr: Val, -} -#[derive(Copy, Clone, Debug)] -pub struct CmpEqualStruct { - pub is_equal: RegStruct, -} -#[derive(Copy, Clone, Debug)] -pub struct CmpLessThanUnsignedStruct { - pub is_less_than: Val, -} -#[derive(Copy, Clone, Debug)] -pub struct CmpLessThanStruct { - pub is_less_than: RegStruct, -} -pub type NondetRegStruct16Array = [NondetRegStruct; 16]; -#[derive(Copy, Clone, Debug)] -pub struct ToBits_16_Struct { - pub _super: NondetRegStruct16Array, -} -#[derive(Copy, Clone, Debug)] -pub struct FromBits_16_Struct { - pub _super: Val, -} -#[derive(Copy, Clone, Debug)] -pub struct DecoderStruct { - pub opcode: NondetRegStruct, - pub rs1: Val, - pub rs2: Val, - pub rd: Val, - pub func7: Val, - pub func3: Val, - pub imm_i: ValU32Struct, - pub imm_s: ValU32Struct, - pub imm_b: ValU32Struct, - pub imm_u: ValU32Struct, - pub imm_j: ValU32Struct, -} -#[derive(Copy, Clone, Debug)] -pub struct MemoryArgStruct { - pub count: NondetRegStruct, - pub addr: NondetRegStruct, - pub cycle: NondetRegStruct, - pub data_low: NondetRegStruct, - pub data_high: NondetRegStruct, -} -#[derive(Copy, Clone, Debug)] -pub struct CycleArgStruct { - pub count: NondetRegStruct, - pub cycle: NondetRegStruct, -} -#[derive(Copy, Clone, Debug)] -pub struct IsCycleStruct {} -#[derive(Copy, Clone, Debug)] -pub struct MemoryIOStruct { - pub old_txn: MemoryArgStruct, - pub new_txn: MemoryArgStruct, -} -#[derive(Copy, Clone, Debug)] -pub struct IsForwardStruct {} -#[derive(Copy, Clone, Debug)] -pub struct GetDataStruct { - pub _super: ValU32Struct, - pub diff_low: Val, - pub diff_high: Val, -} -#[derive(Copy, Clone, Debug)] -pub struct MemoryWriteStruct {} -#[derive(Copy, Clone, Debug)] -pub struct MemoryWriteUnconstrainedStruct {} -pub type Val3Array = [Val; 3]; -pub type NondetRegStruct3Array = [NondetRegStruct; 3]; -#[derive(Copy, Clone, Debug)] -pub struct OneHot_3_Struct { - pub _super: NondetRegStruct3Array, -} -pub type Val8Array = [Val; 8]; -pub type NondetRegStruct8Array = [NondetRegStruct; 8]; -#[derive(Copy, Clone, Debug)] -pub struct OneHot_8_Struct { - pub _super: NondetRegStruct8Array, - pub bits: NondetRegStruct8Array, -} -#[derive(Copy, Clone, Debug)] -pub struct InstInputStruct { - pub pc_u32: ValU32Struct, - pub state: Val, - pub mode: Val, - pub minor_onehot: OneHot_8_Struct, -} -#[derive(Copy, Clone, Debug)] -pub struct WriteRdStruct {} -#[derive(Copy, Clone, Debug)] -pub struct ExpandU32Struct { - pub b0: NondetRegStruct, - pub b1: NondetRegStruct, - pub b2: NondetRegStruct, - pub b3: NondetRegStruct, - pub neg: Val, -} -#[derive(Copy, Clone, Debug)] -pub struct SplitTotalStruct { - pub out: NondetRegStruct, - pub carry: Val, -} -#[derive(Copy, Clone, Debug)] -pub struct MultiplySettingsStruct { - pub a_signed: Val, - pub b_signed: Val, - pub c_signed: Val, -} -#[derive(Copy, Clone, Debug)] -pub struct MultiplyAccumulateStruct { - pub out_low: ValU32Struct, - pub out_high: ValU32Struct, -} -#[derive(Copy, Clone, Debug)] -pub struct DivInputStruct { - pub _super: InstInputStruct, - pub ii: InstInputStruct, - pub decoded: DecoderStruct, - pub rs1: GetDataStruct, - pub rs2: GetDataStruct, -} -#[derive(Copy, Clone, Debug)] -pub struct DivideReturnStruct { - pub quot: ValU32Struct, - pub rem: ValU32Struct, -} -#[derive(Copy, Clone, Debug)] -pub struct InstOutputStruct { - pub new_pc: ValU32Struct, - pub new_state: Val, - pub new_mode: Val, -} -#[derive(Copy, Clone, Debug)] -pub struct MiscInputStruct { - pub _super: InstInputStruct, - pub ii: InstInputStruct, - pub decoded: DecoderStruct, - pub rs1: GetDataStruct, - pub rs2: GetDataStruct, -} -#[derive(Copy, Clone, Debug)] -pub struct MiscOutputStruct { - pub do_write: Val, - pub to_write: DenormedValU32Struct, - pub new_pc: DenormedValU32Struct, -} -#[derive(Copy, Clone, Debug)] -pub struct MulInputStruct { - pub _super: InstInputStruct, - pub ii: InstInputStruct, - pub decoded: DecoderStruct, - pub rs1: GetDataStruct, - pub rs2: GetDataStruct, -} -#[derive(Copy, Clone, Debug)] -pub struct DoMulStruct { - pub low: ValU32Struct, - pub high: ValU32Struct, -} -#[derive(Copy, Clone, Debug)] -pub struct MemLoadInputStruct { - pub ii: InstInputStruct, - pub decoded: DecoderStruct, - pub addr: AddrDecomposeBitsStruct, - pub data_0: GetDataStruct, -} -#[derive(Copy, Clone, Debug)] -pub struct MemStoreInputStruct { - pub decoded: DecoderStruct, - pub rs2: GetDataStruct, - pub addr: AddrDecomposeBitsStruct, - pub data_0: GetDataStruct, -} -#[derive(Copy, Clone, Debug)] -pub struct MemStoreFinalizeStruct {} -#[derive(Copy, Clone, Debug)] -pub struct SplitWordStruct { - pub byte0: NondetRegStruct, - pub byte1: NondetRegStruct, -} -#[derive(Copy, Clone, Debug)] -pub struct DigestRegValues_SuperStruct { - pub low: RegStruct, - pub high: RegStruct, -} -pub type DigestRegValues_SuperStruct8Array = [DigestRegValues_SuperStruct; 8]; -#[derive(Copy, Clone, Debug)] -pub struct DigestRegStruct { - pub values: DigestRegValues_SuperStruct8Array, -} -pub type ValU32Struct8Array = [ValU32Struct; 8]; -#[derive(Copy, Clone, Debug)] -pub struct ControlLoadRoot__0Struct {} -pub type ControlLoadRoot__0Struct8Array = [ControlLoadRoot__0Struct; 8]; -#[derive(Copy, Clone, Debug)] -pub struct ControlResume_SuperArm1_Super__0Struct {} -pub type ControlResume_SuperArm1_Super__0Struct8Array = [ControlResume_SuperArm1_Super__0Struct; 8]; -#[derive(Copy, Clone, Debug)] -pub struct ComponentStruct {} -pub type GetDataStruct8Array = [GetDataStruct; 8]; -#[derive(Copy, Clone, Debug)] -pub struct ControlTable_SuperArm0_Super__0Struct {} -#[derive(Copy, Clone, Debug)] -pub struct ControlTable_SuperArm1_Super__0Struct {} -pub type ControlTable_SuperArm0_Super__0Struct16Array = [ControlTable_SuperArm0_Super__0Struct; 16]; -pub type ControlTable_SuperArm1_Super__0Struct16Array = [ControlTable_SuperArm1_Super__0Struct; 16]; -pub type Val4Array = [Val; 4]; -pub type NondetRegStruct4Array = [NondetRegStruct; 4]; -#[derive(Copy, Clone, Debug)] -pub struct OneHot_4_Struct { - pub _super: NondetRegStruct4Array, -} -#[derive(Copy, Clone, Debug)] -pub struct ECallOutputStruct { - pub state: Val, - pub s0: Val, - pub s1: Val, - pub s2: Val, -} -#[derive(Copy, Clone, Debug)] -pub struct DecomposeLow2Struct { - pub high: NondetRegStruct, - pub low2: NondetRegStruct, - pub low2_hot: OneHot_4_Struct, - pub high_zero: NondetRegStruct, - pub is_zero: RegStruct, - pub low2_nonzero: Val, -} -#[derive(Copy, Clone, Debug)] -pub struct ECallHostReadWords__0Struct {} -pub type ECallHostReadWords__0Struct4Array = [ECallHostReadWords__0Struct; 4]; -pub type Val24Array = [Val; 24]; -#[derive(Copy, Clone, Debug)] -pub struct MultiplyByMInt_Super_SuperStruct { - pub _super: Val, -} -pub type MultiplyByMInt_Super_SuperStruct24Array = [MultiplyByMInt_Super_SuperStruct; 24]; -#[derive(Copy, Clone, Debug)] -pub struct MultiplyByMIntStruct { - pub _super: MultiplyByMInt_Super_SuperStruct24Array, -} -#[derive(Copy, Clone, Debug)] -pub struct DoIntRounds__0_SuperStruct { - pub _super: Val, -} -pub type DoIntRounds__0_SuperStruct21Array = [DoIntRounds__0_SuperStruct; 21]; -#[derive(Copy, Clone, Debug)] -pub struct DoIntRoundsStruct { - pub _super: Val24Array, -} -pub type RegStruct24Array = [RegStruct; 24]; -#[derive(Copy, Clone, Debug)] -pub struct MultiplyByMExt_Super_SuperStruct { - pub _super: Val, -} -pub type MultiplyByMExt_Super_SuperStruct24Array = [MultiplyByMExt_Super_SuperStruct; 24]; -#[derive(Copy, Clone, Debug)] -pub struct MultiplyByMExtStruct { - pub _super: MultiplyByMExt_Super_SuperStruct24Array, -} -#[derive(Copy, Clone, Debug)] -pub struct PoseidonStateStruct { - pub has_state: RegStruct, - pub state_addr: RegStruct, - pub buf_out_addr: RegStruct, - pub is_elem: RegStruct, - pub check_out: RegStruct, - pub load_tx_type: RegStruct, - pub next_state: RegStruct, - pub sub_state: RegStruct, - pub buf_in_addr: RegStruct, - pub count: RegStruct, - pub mode: RegStruct, - pub inner: RegStruct24Array, - pub zcheck: NondetExtRegStruct, -} -#[derive(Copy, Clone, Debug)] -pub struct PoseidonOpDefStruct { - pub has_state: Val, - pub state_addr: Val, - pub buf_out_addr: Val, - pub is_elem: Val, - pub check_out: Val, - pub load_tx_type: Val, -} -#[derive(Copy, Clone, Debug)] -pub struct ReadAddrStruct { - pub _super: Val, -} -#[derive(Copy, Clone, Debug)] -pub struct ReadElemStruct { - pub _super: Val, -} -pub type ReadElemStruct8Array = [ReadElemStruct; 8]; -#[derive(Copy, Clone, Debug)] -pub struct PoseidonCheckOut__0Struct {} -pub type PoseidonCheckOut__0Struct8Array = [PoseidonCheckOut__0Struct; 8]; -#[derive(Copy, Clone, Debug)] -pub struct PoseidonStoreOut__0Struct {} -pub type PoseidonStoreOut__0Struct8Array = [PoseidonStoreOut__0Struct; 8]; -#[derive(Copy, Clone, Debug)] -pub struct PoseidonStoreState__0Struct {} -pub type PoseidonStoreState__0Struct8Array = [PoseidonStoreState__0Struct; 8]; -#[derive(Copy, Clone, Debug)] -pub struct IsU24Struct {} -pub type Val6Array = [Val; 6]; -pub type NondetRegStruct6Array = [NondetRegStruct; 6]; -#[derive(Copy, Clone, Debug)] -pub struct OneHot_6_Struct { - pub _super: NondetRegStruct6Array, - pub bits: NondetRegStruct6Array, -} -pub type Val11Array = [Val; 11]; -pub type NondetRegStruct11Array = [NondetRegStruct; 11]; -#[derive(Copy, Clone, Debug)] -pub struct OneHot_11_Struct { - pub _super: NondetRegStruct11Array, -} -#[derive(Copy, Clone, Debug)] -pub struct TopStruct {} diff --git a/risc0/circuit/rv32im-v2/testdata/riscv-tests.tgz b/risc0/circuit/rv32im-v2/testdata/riscv-tests.tgz deleted file mode 100644 index 0a240186..00000000 Binary files a/risc0/circuit/rv32im-v2/testdata/riscv-tests.tgz and /dev/null differ diff --git a/zirgen/bootstrap/src/main.rs b/zirgen/bootstrap/src/main.rs index a4eb34f9..1a58b413 100644 --- a/zirgen/bootstrap/src/main.rs +++ b/zirgen/bootstrap/src/main.rs @@ -511,7 +511,7 @@ impl Bootstrap { fn rv32im_v2(&self) { self.install_from_bazel( "//zirgen/circuit/rv32im/v2/dsl:codegen", - self.output_or("risc0/circuit/rv32im-v2"), + self.output_and("risc0/circuit/rv32im-v2"), &[ Rule::copy("*.cpp", "kernels/cxx").base_suffix("-sys"), Rule::copy("*.cpp.inc", "kernels/cxx").base_suffix("-sys"), diff --git a/zirgen/circuit/rv32im/v2/dsl/inst_mem.zir b/zirgen/circuit/rv32im/v2/dsl/inst_mem.zir index 7f6c4f96..adb66f05 100644 --- a/zirgen/circuit/rv32im/v2/dsl/inst_mem.zir +++ b/zirgen/circuit/rv32im/v2/dsl/inst_mem.zir @@ -97,7 +97,7 @@ component OpLH(input: MemLoadInput) { input.addr.low0 = 0; low16 := input.addr.low1 * input.data.high + (1 - input.addr.low1) * input.data.low; highBit := NondetBitReg((low16 & 0x8000) / 0x8000); - low15x2 := NondetU8Reg((low16 & 0x7fff) * 2); + low15x2 := NondetU16Reg((low16 & 0x7fff) * 2); low16 = highBit * 0x8000 + low15x2 / 2; ValU32(low16, 0xffff * highBit) }